Commit | Line | Data |
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342ee437 MS |
1 | /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger. |
2 | ||
ecd75fc8 | 3 | Copyright (C) 1996-2014 Free Software Foundation, Inc. |
342ee437 MS |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
342ee437 MS |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
342ee437 | 19 | |
342ee437 MS |
20 | #include "defs.h" |
21 | #include "arch-utils.h" | |
22 | #include "dis-asm.h" | |
23 | #include "gdbtypes.h" | |
24 | #include "regcache.h" | |
0e9f083f | 25 | #include <string.h> |
342ee437 | 26 | #include "gdb_assert.h" |
025bb325 | 27 | #include "gdbcore.h" /* For write_memory_unsigned_integer. */ |
342ee437 | 28 | #include "value.h" |
342ee437 MS |
29 | #include "frame.h" |
30 | #include "frame-unwind.h" | |
31 | #include "frame-base.h" | |
342ee437 MS |
32 | #include "symtab.h" |
33 | #include "dwarf2-frame.h" | |
697e3bc9 | 34 | #include "osabi.h" |
ee3a2f01 | 35 | #include "infcall.h" |
6c02c64c | 36 | #include "prologue-value.h" |
effa26a9 | 37 | #include "target.h" |
342ee437 MS |
38 | |
39 | #include "mn10300-tdep.h" | |
40 | ||
6c02c64c KB |
41 | |
42 | /* The am33-2 has 64 registers. */ | |
43 | #define MN10300_MAX_NUM_REGS 64 | |
44 | ||
45 | /* This structure holds the results of a prologue analysis. */ | |
46 | struct mn10300_prologue | |
47 | { | |
d80b854b UW |
48 | /* The architecture for which we generated this prologue info. */ |
49 | struct gdbarch *gdbarch; | |
50 | ||
6c02c64c KB |
51 | /* The offset from the frame base to the stack pointer --- always |
52 | zero or negative. | |
53 | ||
54 | Calling this a "size" is a bit misleading, but given that the | |
55 | stack grows downwards, using offsets for everything keeps one | |
56 | from going completely sign-crazy: you never change anything's | |
57 | sign for an ADD instruction; always change the second operand's | |
58 | sign for a SUB instruction; and everything takes care of | |
59 | itself. */ | |
60 | int frame_size; | |
61 | ||
62 | /* Non-zero if this function has initialized the frame pointer from | |
63 | the stack pointer, zero otherwise. */ | |
64 | int has_frame_ptr; | |
65 | ||
66 | /* If has_frame_ptr is non-zero, this is the offset from the frame | |
67 | base to where the frame pointer points. This is always zero or | |
68 | negative. */ | |
69 | int frame_ptr_offset; | |
70 | ||
71 | /* The address of the first instruction at which the frame has been | |
72 | set up and the arguments are where the debug info says they are | |
73 | --- as best as we can tell. */ | |
74 | CORE_ADDR prologue_end; | |
75 | ||
76 | /* reg_offset[R] is the offset from the CFA at which register R is | |
77 | saved, or 1 if register R has not been saved. (Real values are | |
78 | always zero or negative.) */ | |
79 | int reg_offset[MN10300_MAX_NUM_REGS]; | |
80 | }; | |
81 | ||
342ee437 MS |
82 | |
83 | /* Compute the alignment required by a type. */ | |
84 | ||
85 | static int | |
86 | mn10300_type_align (struct type *type) | |
87 | { | |
88 | int i, align = 1; | |
89 | ||
90 | switch (TYPE_CODE (type)) | |
91 | { | |
92 | case TYPE_CODE_INT: | |
93 | case TYPE_CODE_ENUM: | |
94 | case TYPE_CODE_SET: | |
95 | case TYPE_CODE_RANGE: | |
96 | case TYPE_CODE_CHAR: | |
97 | case TYPE_CODE_BOOL: | |
98 | case TYPE_CODE_FLT: | |
99 | case TYPE_CODE_PTR: | |
100 | case TYPE_CODE_REF: | |
101 | return TYPE_LENGTH (type); | |
102 | ||
103 | case TYPE_CODE_COMPLEX: | |
104 | return TYPE_LENGTH (type) / 2; | |
105 | ||
106 | case TYPE_CODE_STRUCT: | |
107 | case TYPE_CODE_UNION: | |
108 | for (i = 0; i < TYPE_NFIELDS (type); i++) | |
109 | { | |
110 | int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i)); | |
111 | while (align < falign) | |
112 | align <<= 1; | |
113 | } | |
114 | return align; | |
115 | ||
116 | case TYPE_CODE_ARRAY: | |
117 | /* HACK! Structures containing arrays, even small ones, are not | |
118 | elligible for returning in registers. */ | |
119 | return 256; | |
120 | ||
121 | case TYPE_CODE_TYPEDEF: | |
122 | return mn10300_type_align (check_typedef (type)); | |
123 | ||
124 | default: | |
125 | internal_error (__FILE__, __LINE__, _("bad switch")); | |
126 | } | |
127 | } | |
128 | ||
342ee437 | 129 | /* Should call_function allocate stack space for a struct return? */ |
342ee437 | 130 | static int |
99fe5f9d | 131 | mn10300_use_struct_convention (struct type *type) |
342ee437 MS |
132 | { |
133 | /* Structures bigger than a pair of words can't be returned in | |
134 | registers. */ | |
135 | if (TYPE_LENGTH (type) > 8) | |
136 | return 1; | |
137 | ||
138 | switch (TYPE_CODE (type)) | |
139 | { | |
140 | case TYPE_CODE_STRUCT: | |
141 | case TYPE_CODE_UNION: | |
142 | /* Structures with a single field are handled as the field | |
143 | itself. */ | |
144 | if (TYPE_NFIELDS (type) == 1) | |
99fe5f9d | 145 | return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0)); |
342ee437 MS |
146 | |
147 | /* Structures with word or double-word size are passed in memory, as | |
148 | long as they require at least word alignment. */ | |
149 | if (mn10300_type_align (type) >= 4) | |
150 | return 0; | |
151 | ||
152 | return 1; | |
153 | ||
154 | /* Arrays are addressable, so they're never returned in | |
155 | registers. This condition can only hold when the array is | |
156 | the only field of a struct or union. */ | |
157 | case TYPE_CODE_ARRAY: | |
158 | return 1; | |
159 | ||
160 | case TYPE_CODE_TYPEDEF: | |
99fe5f9d | 161 | return mn10300_use_struct_convention (check_typedef (type)); |
342ee437 MS |
162 | |
163 | default: | |
164 | return 0; | |
165 | } | |
166 | } | |
167 | ||
342ee437 | 168 | static void |
99fe5f9d | 169 | mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type, |
948f8e3d | 170 | struct regcache *regcache, const gdb_byte *valbuf) |
342ee437 | 171 | { |
342ee437 MS |
172 | int len = TYPE_LENGTH (type); |
173 | int reg, regsz; | |
174 | ||
175 | if (TYPE_CODE (type) == TYPE_CODE_PTR) | |
176 | reg = 4; | |
177 | else | |
178 | reg = 0; | |
179 | ||
180 | regsz = register_size (gdbarch, reg); | |
181 | ||
182 | if (len <= regsz) | |
183 | regcache_raw_write_part (regcache, reg, 0, len, valbuf); | |
184 | else if (len <= 2 * regsz) | |
185 | { | |
186 | regcache_raw_write (regcache, reg, valbuf); | |
187 | gdb_assert (regsz == register_size (gdbarch, reg + 1)); | |
188 | regcache_raw_write_part (regcache, reg+1, 0, | |
948f8e3d | 189 | len - regsz, valbuf + regsz); |
342ee437 MS |
190 | } |
191 | else | |
192 | internal_error (__FILE__, __LINE__, | |
193 | _("Cannot store return value %d bytes long."), len); | |
194 | } | |
195 | ||
342ee437 | 196 | static void |
99fe5f9d | 197 | mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type, |
342ee437 MS |
198 | struct regcache *regcache, void *valbuf) |
199 | { | |
e362b510 | 200 | gdb_byte buf[MAX_REGISTER_SIZE]; |
342ee437 MS |
201 | int len = TYPE_LENGTH (type); |
202 | int reg, regsz; | |
203 | ||
204 | if (TYPE_CODE (type) == TYPE_CODE_PTR) | |
205 | reg = 4; | |
206 | else | |
207 | reg = 0; | |
208 | ||
209 | regsz = register_size (gdbarch, reg); | |
210 | if (len <= regsz) | |
211 | { | |
212 | regcache_raw_read (regcache, reg, buf); | |
213 | memcpy (valbuf, buf, len); | |
214 | } | |
215 | else if (len <= 2 * regsz) | |
216 | { | |
217 | regcache_raw_read (regcache, reg, buf); | |
218 | memcpy (valbuf, buf, regsz); | |
219 | gdb_assert (regsz == register_size (gdbarch, reg + 1)); | |
220 | regcache_raw_read (regcache, reg + 1, buf); | |
221 | memcpy ((char *) valbuf + regsz, buf, len - regsz); | |
222 | } | |
223 | else | |
224 | internal_error (__FILE__, __LINE__, | |
225 | _("Cannot extract return value %d bytes long."), len); | |
226 | } | |
227 | ||
99fe5f9d KB |
228 | /* Determine, for architecture GDBARCH, how a return value of TYPE |
229 | should be returned. If it is supposed to be returned in registers, | |
230 | and READBUF is non-zero, read the appropriate value from REGCACHE, | |
231 | and copy it into READBUF. If WRITEBUF is non-zero, write the value | |
232 | from WRITEBUF into REGCACHE. */ | |
233 | ||
234 | static enum return_value_convention | |
6a3a010b | 235 | mn10300_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 CV |
236 | struct type *type, struct regcache *regcache, |
237 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
99fe5f9d KB |
238 | { |
239 | if (mn10300_use_struct_convention (type)) | |
240 | return RETURN_VALUE_STRUCT_CONVENTION; | |
241 | ||
242 | if (readbuf) | |
243 | mn10300_extract_return_value (gdbarch, type, regcache, readbuf); | |
244 | if (writebuf) | |
245 | mn10300_store_return_value (gdbarch, type, regcache, writebuf); | |
246 | ||
247 | return RETURN_VALUE_REGISTER_CONVENTION; | |
248 | } | |
249 | ||
342ee437 MS |
250 | static char * |
251 | register_name (int reg, char **regs, long sizeof_regs) | |
252 | { | |
253 | if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0])) | |
254 | return NULL; | |
255 | else | |
256 | return regs[reg]; | |
257 | } | |
258 | ||
259 | static const char * | |
d93859e2 | 260 | mn10300_generic_register_name (struct gdbarch *gdbarch, int reg) |
342ee437 MS |
261 | { |
262 | static char *regs[] = | |
263 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
264 | "sp", "pc", "mdr", "psw", "lir", "lar", "", "", | |
265 | "", "", "", "", "", "", "", "", | |
266 | "", "", "", "", "", "", "", "fp" | |
267 | }; | |
268 | return register_name (reg, regs, sizeof regs); | |
269 | } | |
270 | ||
271 | ||
272 | static const char * | |
d93859e2 | 273 | am33_register_name (struct gdbarch *gdbarch, int reg) |
342ee437 MS |
274 | { |
275 | static char *regs[] = | |
276 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
277 | "sp", "pc", "mdr", "psw", "lir", "lar", "", | |
278 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
279 | "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", "" | |
280 | }; | |
281 | return register_name (reg, regs, sizeof regs); | |
282 | } | |
283 | ||
4640dd91 | 284 | static const char * |
d93859e2 | 285 | am33_2_register_name (struct gdbarch *gdbarch, int reg) |
4640dd91 KB |
286 | { |
287 | static char *regs[] = | |
288 | { | |
289 | "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
290 | "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0", | |
291 | "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp", | |
292 | "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "", | |
293 | "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", | |
294 | "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15", | |
295 | "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23", | |
296 | "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" | |
297 | }; | |
298 | return register_name (reg, regs, sizeof regs); | |
299 | } | |
342ee437 MS |
300 | |
301 | static struct type * | |
302 | mn10300_register_type (struct gdbarch *gdbarch, int reg) | |
303 | { | |
0dfff4cb | 304 | return builtin_type (gdbarch)->builtin_int; |
342ee437 MS |
305 | } |
306 | ||
307 | static CORE_ADDR | |
61a1198a | 308 | mn10300_read_pc (struct regcache *regcache) |
342ee437 | 309 | { |
61a1198a UW |
310 | ULONGEST val; |
311 | regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val); | |
312 | return val; | |
342ee437 MS |
313 | } |
314 | ||
315 | static void | |
61a1198a | 316 | mn10300_write_pc (struct regcache *regcache, CORE_ADDR val) |
342ee437 | 317 | { |
61a1198a | 318 | regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val); |
342ee437 MS |
319 | } |
320 | ||
321 | /* The breakpoint instruction must be the same size as the smallest | |
322 | instruction in the instruction set. | |
323 | ||
324 | The Matsushita mn10x00 processors have single byte instructions | |
325 | so we need a single byte breakpoint. Matsushita hasn't defined | |
326 | one, so we defined it ourselves. */ | |
327 | ||
44d100c3 | 328 | static const unsigned char * |
67d57894 MD |
329 | mn10300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr, |
330 | int *bp_size) | |
342ee437 | 331 | { |
948f8e3d | 332 | static gdb_byte breakpoint[] = {0xff}; |
342ee437 MS |
333 | *bp_size = 1; |
334 | return breakpoint; | |
335 | } | |
336 | ||
6c02c64c KB |
337 | /* Model the semantics of pushing a register onto the stack. This |
338 | is a helper function for mn10300_analyze_prologue, below. */ | |
339 | static void | |
340 | push_reg (pv_t *regs, struct pv_area *stack, int regnum) | |
341 | { | |
342 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4); | |
343 | pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[regnum]); | |
344 | } | |
345 | ||
346 | /* Translate an "r" register number extracted from an instruction encoding | |
347 | into a GDB register number. Adapted from a simulator function | |
348 | of the same name; see am33.igen. */ | |
349 | static int | |
350 | translate_rreg (int rreg) | |
351 | { | |
352 | /* The higher register numbers actually correspond to the | |
353 | basic machine's address and data registers. */ | |
354 | if (rreg > 7 && rreg < 12) | |
355 | return E_A0_REGNUM + rreg - 8; | |
356 | else if (rreg > 11 && rreg < 16) | |
357 | return E_D0_REGNUM + rreg - 12; | |
358 | else | |
359 | return E_E0_REGNUM + rreg; | |
360 | } | |
361 | ||
362 | /* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan. | |
9cacebf5 | 363 | |
6c02c64c KB |
364 | If VALUE is a saved register, ADDR says it was saved at a constant |
365 | offset from the frame base, and SIZE indicates that the whole | |
366 | register was saved, record its offset in RESULT_UNTYPED. */ | |
9cacebf5 | 367 | static void |
6c02c64c | 368 | check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value) |
9cacebf5 | 369 | { |
6c02c64c | 370 | struct mn10300_prologue *result = (struct mn10300_prologue *) result_untyped; |
9cacebf5 | 371 | |
6c02c64c KB |
372 | if (value.kind == pvk_register |
373 | && value.k == 0 | |
374 | && pv_is_register (addr, E_SP_REGNUM) | |
d80b854b | 375 | && size == register_size (result->gdbarch, value.reg)) |
6c02c64c KB |
376 | result->reg_offset[value.reg] = addr.k; |
377 | } | |
9cacebf5 | 378 | |
6c02c64c KB |
379 | /* Analyze the prologue to determine where registers are saved, |
380 | the end of the prologue, etc. The result of this analysis is | |
381 | returned in RESULT. See struct mn10300_prologue above for more | |
382 | information. */ | |
383 | static void | |
384 | mn10300_analyze_prologue (struct gdbarch *gdbarch, | |
385 | CORE_ADDR start_pc, CORE_ADDR limit_pc, | |
386 | struct mn10300_prologue *result) | |
387 | { | |
e17a4113 | 388 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
22e048c9 | 389 | CORE_ADDR pc; |
6c02c64c KB |
390 | int rn; |
391 | pv_t regs[MN10300_MAX_NUM_REGS]; | |
392 | struct pv_area *stack; | |
393 | struct cleanup *back_to; | |
394 | CORE_ADDR after_last_frame_setup_insn = start_pc; | |
395 | int am33_mode = AM33_MODE (gdbarch); | |
396 | ||
397 | memset (result, 0, sizeof (*result)); | |
d80b854b | 398 | result->gdbarch = gdbarch; |
9cacebf5 | 399 | |
6c02c64c | 400 | for (rn = 0; rn < MN10300_MAX_NUM_REGS; rn++) |
4640dd91 | 401 | { |
6c02c64c KB |
402 | regs[rn] = pv_register (rn, 0); |
403 | result->reg_offset[rn] = 1; | |
4640dd91 | 404 | } |
55f960e1 | 405 | stack = make_pv_area (E_SP_REGNUM, gdbarch_addr_bit (gdbarch)); |
6c02c64c KB |
406 | back_to = make_cleanup_free_pv_area (stack); |
407 | ||
408 | /* The typical call instruction will have saved the return address on the | |
409 | stack. Space for the return address has already been preallocated in | |
410 | the caller's frame. It's possible, such as when using -mrelax with gcc | |
411 | that other registers were saved as well. If this happens, we really | |
412 | have no chance of deciphering the frame. DWARF info can save the day | |
413 | when this happens. */ | |
414 | pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]); | |
415 | ||
416 | pc = start_pc; | |
417 | while (pc < limit_pc) | |
4640dd91 | 418 | { |
6c02c64c KB |
419 | int status; |
420 | gdb_byte instr[2]; | |
4640dd91 | 421 | |
6c02c64c KB |
422 | /* Instructions can be as small as one byte; however, we usually |
423 | need at least two bytes to do the decoding, so fetch that many | |
424 | to begin with. */ | |
425 | status = target_read_memory (pc, instr, 2); | |
426 | if (status != 0) | |
427 | break; | |
4640dd91 | 428 | |
6c02c64c KB |
429 | /* movm [regs], sp */ |
430 | if (instr[0] == 0xcf) | |
4640dd91 | 431 | { |
6c02c64c KB |
432 | gdb_byte save_mask; |
433 | ||
434 | save_mask = instr[1]; | |
435 | ||
436 | if ((save_mask & movm_exreg0_bit) && am33_mode) | |
437 | { | |
438 | push_reg (regs, stack, E_E2_REGNUM); | |
439 | push_reg (regs, stack, E_E3_REGNUM); | |
440 | } | |
441 | if ((save_mask & movm_exreg1_bit) && am33_mode) | |
4640dd91 | 442 | { |
6c02c64c KB |
443 | push_reg (regs, stack, E_E4_REGNUM); |
444 | push_reg (regs, stack, E_E5_REGNUM); | |
445 | push_reg (regs, stack, E_E6_REGNUM); | |
446 | push_reg (regs, stack, E_E7_REGNUM); | |
4640dd91 | 447 | } |
6c02c64c KB |
448 | if ((save_mask & movm_exother_bit) && am33_mode) |
449 | { | |
450 | push_reg (regs, stack, E_E0_REGNUM); | |
451 | push_reg (regs, stack, E_E1_REGNUM); | |
452 | push_reg (regs, stack, E_MDRQ_REGNUM); | |
453 | push_reg (regs, stack, E_MCRH_REGNUM); | |
454 | push_reg (regs, stack, E_MCRL_REGNUM); | |
455 | push_reg (regs, stack, E_MCVF_REGNUM); | |
456 | } | |
457 | if (save_mask & movm_d2_bit) | |
458 | push_reg (regs, stack, E_D2_REGNUM); | |
459 | if (save_mask & movm_d3_bit) | |
460 | push_reg (regs, stack, E_D3_REGNUM); | |
461 | if (save_mask & movm_a2_bit) | |
462 | push_reg (regs, stack, E_A2_REGNUM); | |
463 | if (save_mask & movm_a3_bit) | |
464 | push_reg (regs, stack, E_A3_REGNUM); | |
465 | if (save_mask & movm_other_bit) | |
466 | { | |
467 | push_reg (regs, stack, E_D0_REGNUM); | |
468 | push_reg (regs, stack, E_D1_REGNUM); | |
469 | push_reg (regs, stack, E_A0_REGNUM); | |
470 | push_reg (regs, stack, E_A1_REGNUM); | |
471 | push_reg (regs, stack, E_MDR_REGNUM); | |
472 | push_reg (regs, stack, E_LIR_REGNUM); | |
473 | push_reg (regs, stack, E_LAR_REGNUM); | |
474 | /* The `other' bit leaves a blank area of four bytes at | |
475 | the beginning of its block of saved registers, making | |
476 | it 32 bytes long in total. */ | |
477 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4); | |
478 | } | |
479 | ||
480 | pc += 2; | |
481 | after_last_frame_setup_insn = pc; | |
4640dd91 | 482 | } |
6c02c64c KB |
483 | /* mov sp, aN */ |
484 | else if ((instr[0] & 0xfc) == 0x3c) | |
485 | { | |
486 | int aN = instr[0] & 0x03; | |
4640dd91 | 487 | |
6c02c64c | 488 | regs[E_A0_REGNUM + aN] = regs[E_SP_REGNUM]; |
4640dd91 | 489 | |
6c02c64c KB |
490 | pc += 1; |
491 | if (aN == 3) | |
492 | after_last_frame_setup_insn = pc; | |
493 | } | |
494 | /* mov aM, aN */ | |
495 | else if ((instr[0] & 0xf0) == 0x90 | |
496 | && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2)) | |
497 | { | |
498 | int aN = instr[0] & 0x03; | |
499 | int aM = (instr[0] & 0x0c) >> 2; | |
9cacebf5 | 500 | |
6c02c64c | 501 | regs[E_A0_REGNUM + aN] = regs[E_A0_REGNUM + aM]; |
9cacebf5 | 502 | |
6c02c64c KB |
503 | pc += 1; |
504 | } | |
505 | /* mov dM, dN */ | |
506 | else if ((instr[0] & 0xf0) == 0x80 | |
507 | && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2)) | |
508 | { | |
509 | int dN = instr[0] & 0x03; | |
510 | int dM = (instr[0] & 0x0c) >> 2; | |
9cacebf5 | 511 | |
6c02c64c | 512 | regs[E_D0_REGNUM + dN] = regs[E_D0_REGNUM + dM]; |
9cacebf5 | 513 | |
6c02c64c KB |
514 | pc += 1; |
515 | } | |
516 | /* mov aM, dN */ | |
517 | else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xd0) | |
518 | { | |
519 | int dN = instr[1] & 0x03; | |
520 | int aM = (instr[1] & 0x0c) >> 2; | |
9cacebf5 | 521 | |
6c02c64c | 522 | regs[E_D0_REGNUM + dN] = regs[E_A0_REGNUM + aM]; |
9cacebf5 | 523 | |
6c02c64c KB |
524 | pc += 2; |
525 | } | |
526 | /* mov dM, aN */ | |
527 | else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xe0) | |
528 | { | |
529 | int aN = instr[1] & 0x03; | |
530 | int dM = (instr[1] & 0x0c) >> 2; | |
9cacebf5 | 531 | |
6c02c64c | 532 | regs[E_A0_REGNUM + aN] = regs[E_D0_REGNUM + dM]; |
9cacebf5 | 533 | |
6c02c64c KB |
534 | pc += 2; |
535 | } | |
536 | /* add imm8, SP */ | |
537 | else if (instr[0] == 0xf8 && instr[1] == 0xfe) | |
538 | { | |
539 | gdb_byte buf[1]; | |
540 | LONGEST imm8; | |
9cacebf5 | 541 | |
9cacebf5 | 542 | |
6c02c64c KB |
543 | status = target_read_memory (pc + 2, buf, 1); |
544 | if (status != 0) | |
545 | break; | |
9cacebf5 | 546 | |
e17a4113 | 547 | imm8 = extract_signed_integer (buf, 1, byte_order); |
6c02c64c | 548 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm8); |
9cacebf5 | 549 | |
6c02c64c KB |
550 | pc += 3; |
551 | /* Stack pointer adjustments are frame related. */ | |
552 | after_last_frame_setup_insn = pc; | |
553 | } | |
554 | /* add imm16, SP */ | |
555 | else if (instr[0] == 0xfa && instr[1] == 0xfe) | |
556 | { | |
557 | gdb_byte buf[2]; | |
558 | LONGEST imm16; | |
9cacebf5 | 559 | |
6c02c64c KB |
560 | status = target_read_memory (pc + 2, buf, 2); |
561 | if (status != 0) | |
562 | break; | |
9cacebf5 | 563 | |
e17a4113 | 564 | imm16 = extract_signed_integer (buf, 2, byte_order); |
6c02c64c | 565 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm16); |
9cacebf5 | 566 | |
6c02c64c KB |
567 | pc += 4; |
568 | /* Stack pointer adjustments are frame related. */ | |
569 | after_last_frame_setup_insn = pc; | |
570 | } | |
571 | /* add imm32, SP */ | |
572 | else if (instr[0] == 0xfc && instr[1] == 0xfe) | |
573 | { | |
574 | gdb_byte buf[4]; | |
575 | LONGEST imm32; | |
9cacebf5 | 576 | |
6c02c64c KB |
577 | status = target_read_memory (pc + 2, buf, 4); |
578 | if (status != 0) | |
579 | break; | |
9cacebf5 | 580 | |
9cacebf5 | 581 | |
e17a4113 | 582 | imm32 = extract_signed_integer (buf, 4, byte_order); |
6c02c64c | 583 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm32); |
9cacebf5 | 584 | |
6c02c64c KB |
585 | pc += 6; |
586 | /* Stack pointer adjustments are frame related. */ | |
587 | after_last_frame_setup_insn = pc; | |
588 | } | |
589 | /* add imm8, aN */ | |
590 | else if ((instr[0] & 0xfc) == 0x20) | |
591 | { | |
592 | int aN; | |
593 | LONGEST imm8; | |
9cacebf5 | 594 | |
6c02c64c | 595 | aN = instr[0] & 0x03; |
e17a4113 | 596 | imm8 = extract_signed_integer (&instr[1], 1, byte_order); |
9cacebf5 | 597 | |
6c02c64c KB |
598 | regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], |
599 | imm8); | |
9cacebf5 | 600 | |
6c02c64c KB |
601 | pc += 2; |
602 | } | |
603 | /* add imm16, aN */ | |
604 | else if (instr[0] == 0xfa && (instr[1] & 0xfc) == 0xd0) | |
605 | { | |
606 | int aN; | |
607 | LONGEST imm16; | |
608 | gdb_byte buf[2]; | |
9cacebf5 | 609 | |
6c02c64c | 610 | aN = instr[1] & 0x03; |
9cacebf5 | 611 | |
6c02c64c KB |
612 | status = target_read_memory (pc + 2, buf, 2); |
613 | if (status != 0) | |
614 | break; | |
9cacebf5 | 615 | |
9cacebf5 | 616 | |
e17a4113 | 617 | imm16 = extract_signed_integer (buf, 2, byte_order); |
9cacebf5 | 618 | |
6c02c64c KB |
619 | regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], |
620 | imm16); | |
9cacebf5 | 621 | |
6c02c64c KB |
622 | pc += 4; |
623 | } | |
624 | /* add imm32, aN */ | |
625 | else if (instr[0] == 0xfc && (instr[1] & 0xfc) == 0xd0) | |
626 | { | |
627 | int aN; | |
628 | LONGEST imm32; | |
629 | gdb_byte buf[4]; | |
9cacebf5 | 630 | |
6c02c64c | 631 | aN = instr[1] & 0x03; |
9cacebf5 | 632 | |
6c02c64c KB |
633 | status = target_read_memory (pc + 2, buf, 4); |
634 | if (status != 0) | |
635 | break; | |
9cacebf5 | 636 | |
e17a4113 | 637 | imm32 = extract_signed_integer (buf, 2, byte_order); |
9cacebf5 | 638 | |
6c02c64c KB |
639 | regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], |
640 | imm32); | |
641 | pc += 6; | |
642 | } | |
643 | /* fmov fsM, (rN) */ | |
644 | else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x30) | |
645 | { | |
646 | int fsM, sM, Y, rN; | |
647 | gdb_byte buf[1]; | |
9cacebf5 | 648 | |
6c02c64c | 649 | Y = (instr[1] & 0x02) >> 1; |
9cacebf5 | 650 | |
6c02c64c KB |
651 | status = target_read_memory (pc + 2, buf, 1); |
652 | if (status != 0) | |
653 | break; | |
9cacebf5 | 654 | |
6c02c64c KB |
655 | sM = (buf[0] & 0xf0) >> 4; |
656 | rN = buf[0] & 0x0f; | |
657 | fsM = (Y << 4) | sM; | |
9cacebf5 | 658 | |
6c02c64c KB |
659 | pv_area_store (stack, regs[translate_rreg (rN)], 4, |
660 | regs[E_FS0_REGNUM + fsM]); | |
9cacebf5 | 661 | |
6c02c64c KB |
662 | pc += 3; |
663 | } | |
664 | /* fmov fsM, (sp) */ | |
665 | else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x34) | |
666 | { | |
667 | int fsM, sM, Y; | |
668 | gdb_byte buf[1]; | |
9cacebf5 | 669 | |
6c02c64c | 670 | Y = (instr[1] & 0x02) >> 1; |
9cacebf5 | 671 | |
6c02c64c KB |
672 | status = target_read_memory (pc + 2, buf, 1); |
673 | if (status != 0) | |
674 | break; | |
9cacebf5 | 675 | |
6c02c64c KB |
676 | sM = (buf[0] & 0xf0) >> 4; |
677 | fsM = (Y << 4) | sM; | |
9cacebf5 | 678 | |
6c02c64c KB |
679 | pv_area_store (stack, regs[E_SP_REGNUM], 4, |
680 | regs[E_FS0_REGNUM + fsM]); | |
9cacebf5 | 681 | |
6c02c64c KB |
682 | pc += 3; |
683 | } | |
684 | /* fmov fsM, (rN, rI) */ | |
685 | else if (instr[0] == 0xfb && instr[1] == 0x37) | |
686 | { | |
687 | int fsM, sM, Z, rN, rI; | |
688 | gdb_byte buf[2]; | |
9cacebf5 | 689 | |
9cacebf5 | 690 | |
6c02c64c KB |
691 | status = target_read_memory (pc + 2, buf, 2); |
692 | if (status != 0) | |
693 | break; | |
83845630 | 694 | |
6c02c64c KB |
695 | rI = (buf[0] & 0xf0) >> 4; |
696 | rN = buf[0] & 0x0f; | |
697 | sM = (buf[1] & 0xf0) >> 4; | |
698 | Z = (buf[1] & 0x02) >> 1; | |
699 | fsM = (Z << 4) | sM; | |
83845630 | 700 | |
6c02c64c KB |
701 | pv_area_store (stack, |
702 | pv_add (regs[translate_rreg (rN)], | |
703 | regs[translate_rreg (rI)]), | |
704 | 4, regs[E_FS0_REGNUM + fsM]); | |
83845630 | 705 | |
6c02c64c KB |
706 | pc += 4; |
707 | } | |
708 | /* fmov fsM, (d8, rN) */ | |
709 | else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x30) | |
4640dd91 | 710 | { |
6c02c64c KB |
711 | int fsM, sM, Y, rN; |
712 | LONGEST d8; | |
713 | gdb_byte buf[2]; | |
714 | ||
715 | Y = (instr[1] & 0x02) >> 1; | |
716 | ||
717 | status = target_read_memory (pc + 2, buf, 2); | |
718 | if (status != 0) | |
719 | break; | |
720 | ||
721 | sM = (buf[0] & 0xf0) >> 4; | |
722 | rN = buf[0] & 0x0f; | |
723 | fsM = (Y << 4) | sM; | |
e17a4113 | 724 | d8 = extract_signed_integer (&buf[1], 1, byte_order); |
6c02c64c KB |
725 | |
726 | pv_area_store (stack, | |
727 | pv_add_constant (regs[translate_rreg (rN)], d8), | |
728 | 4, regs[E_FS0_REGNUM + fsM]); | |
729 | ||
730 | pc += 4; | |
4640dd91 | 731 | } |
6c02c64c KB |
732 | /* fmov fsM, (d24, rN) */ |
733 | else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x30) | |
83845630 | 734 | { |
6c02c64c KB |
735 | int fsM, sM, Y, rN; |
736 | LONGEST d24; | |
737 | gdb_byte buf[4]; | |
738 | ||
739 | Y = (instr[1] & 0x02) >> 1; | |
740 | ||
741 | status = target_read_memory (pc + 2, buf, 4); | |
83845630 | 742 | if (status != 0) |
6c02c64c KB |
743 | break; |
744 | ||
745 | sM = (buf[0] & 0xf0) >> 4; | |
746 | rN = buf[0] & 0x0f; | |
747 | fsM = (Y << 4) | sM; | |
e17a4113 | 748 | d24 = extract_signed_integer (&buf[1], 3, byte_order); |
6c02c64c KB |
749 | |
750 | pv_area_store (stack, | |
751 | pv_add_constant (regs[translate_rreg (rN)], d24), | |
752 | 4, regs[E_FS0_REGNUM + fsM]); | |
753 | ||
754 | pc += 6; | |
83845630 | 755 | } |
6c02c64c KB |
756 | /* fmov fsM, (d32, rN) */ |
757 | else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x30) | |
758 | { | |
759 | int fsM, sM, Y, rN; | |
760 | LONGEST d32; | |
761 | gdb_byte buf[5]; | |
4640dd91 | 762 | |
6c02c64c KB |
763 | Y = (instr[1] & 0x02) >> 1; |
764 | ||
765 | status = target_read_memory (pc + 2, buf, 5); | |
766 | if (status != 0) | |
767 | break; | |
768 | ||
769 | sM = (buf[0] & 0xf0) >> 4; | |
770 | rN = buf[0] & 0x0f; | |
771 | fsM = (Y << 4) | sM; | |
e17a4113 | 772 | d32 = extract_signed_integer (&buf[1], 4, byte_order); |
9cacebf5 | 773 | |
6c02c64c KB |
774 | pv_area_store (stack, |
775 | pv_add_constant (regs[translate_rreg (rN)], d32), | |
776 | 4, regs[E_FS0_REGNUM + fsM]); | |
777 | ||
778 | pc += 7; | |
779 | } | |
780 | /* fmov fsM, (d8, SP) */ | |
781 | else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x34) | |
9cacebf5 | 782 | { |
6c02c64c KB |
783 | int fsM, sM, Y; |
784 | LONGEST d8; | |
785 | gdb_byte buf[2]; | |
786 | ||
787 | Y = (instr[1] & 0x02) >> 1; | |
788 | ||
789 | status = target_read_memory (pc + 2, buf, 2); | |
790 | if (status != 0) | |
791 | break; | |
792 | ||
793 | sM = (buf[0] & 0xf0) >> 4; | |
794 | fsM = (Y << 4) | sM; | |
e17a4113 | 795 | d8 = extract_signed_integer (&buf[1], 1, byte_order); |
6c02c64c KB |
796 | |
797 | pv_area_store (stack, | |
798 | pv_add_constant (regs[E_SP_REGNUM], d8), | |
799 | 4, regs[E_FS0_REGNUM + fsM]); | |
800 | ||
801 | pc += 4; | |
9cacebf5 | 802 | } |
6c02c64c KB |
803 | /* fmov fsM, (d24, SP) */ |
804 | else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x34) | |
805 | { | |
806 | int fsM, sM, Y; | |
807 | LONGEST d24; | |
808 | gdb_byte buf[4]; | |
9cacebf5 | 809 | |
6c02c64c | 810 | Y = (instr[1] & 0x02) >> 1; |
9cacebf5 | 811 | |
6c02c64c KB |
812 | status = target_read_memory (pc + 2, buf, 4); |
813 | if (status != 0) | |
814 | break; | |
9cacebf5 | 815 | |
6c02c64c KB |
816 | sM = (buf[0] & 0xf0) >> 4; |
817 | fsM = (Y << 4) | sM; | |
e17a4113 | 818 | d24 = extract_signed_integer (&buf[1], 3, byte_order); |
9cacebf5 | 819 | |
6c02c64c KB |
820 | pv_area_store (stack, |
821 | pv_add_constant (regs[E_SP_REGNUM], d24), | |
822 | 4, regs[E_FS0_REGNUM + fsM]); | |
9cacebf5 | 823 | |
6c02c64c KB |
824 | pc += 6; |
825 | } | |
826 | /* fmov fsM, (d32, SP) */ | |
827 | else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x34) | |
828 | { | |
829 | int fsM, sM, Y; | |
830 | LONGEST d32; | |
831 | gdb_byte buf[5]; | |
9cacebf5 | 832 | |
6c02c64c | 833 | Y = (instr[1] & 0x02) >> 1; |
9cacebf5 | 834 | |
6c02c64c KB |
835 | status = target_read_memory (pc + 2, buf, 5); |
836 | if (status != 0) | |
837 | break; | |
838 | ||
839 | sM = (buf[0] & 0xf0) >> 4; | |
840 | fsM = (Y << 4) | sM; | |
e17a4113 | 841 | d32 = extract_signed_integer (&buf[1], 4, byte_order); |
6c02c64c KB |
842 | |
843 | pv_area_store (stack, | |
844 | pv_add_constant (regs[E_SP_REGNUM], d32), | |
845 | 4, regs[E_FS0_REGNUM + fsM]); | |
846 | ||
847 | pc += 7; | |
848 | } | |
849 | /* fmov fsM, (rN+) */ | |
850 | else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x31) | |
851 | { | |
852 | int fsM, sM, Y, rN, rN_regnum; | |
853 | gdb_byte buf[1]; | |
854 | ||
855 | Y = (instr[1] & 0x02) >> 1; | |
856 | ||
857 | status = target_read_memory (pc + 2, buf, 1); | |
858 | if (status != 0) | |
859 | break; | |
860 | ||
861 | sM = (buf[0] & 0xf0) >> 4; | |
862 | rN = buf[0] & 0x0f; | |
863 | fsM = (Y << 4) | sM; | |
864 | ||
865 | rN_regnum = translate_rreg (rN); | |
866 | ||
867 | pv_area_store (stack, regs[rN_regnum], 4, | |
868 | regs[E_FS0_REGNUM + fsM]); | |
869 | regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4); | |
870 | ||
871 | pc += 3; | |
872 | } | |
873 | /* fmov fsM, (rN+, imm8) */ | |
874 | else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x31) | |
875 | { | |
876 | int fsM, sM, Y, rN, rN_regnum; | |
877 | LONGEST imm8; | |
878 | gdb_byte buf[2]; | |
879 | ||
880 | Y = (instr[1] & 0x02) >> 1; | |
881 | ||
882 | status = target_read_memory (pc + 2, buf, 2); | |
883 | if (status != 0) | |
884 | break; | |
885 | ||
886 | sM = (buf[0] & 0xf0) >> 4; | |
887 | rN = buf[0] & 0x0f; | |
888 | fsM = (Y << 4) | sM; | |
e17a4113 | 889 | imm8 = extract_signed_integer (&buf[1], 1, byte_order); |
6c02c64c KB |
890 | |
891 | rN_regnum = translate_rreg (rN); | |
892 | ||
893 | pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); | |
894 | regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8); | |
895 | ||
896 | pc += 4; | |
897 | } | |
898 | /* fmov fsM, (rN+, imm24) */ | |
899 | else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x31) | |
900 | { | |
901 | int fsM, sM, Y, rN, rN_regnum; | |
902 | LONGEST imm24; | |
903 | gdb_byte buf[4]; | |
904 | ||
905 | Y = (instr[1] & 0x02) >> 1; | |
906 | ||
907 | status = target_read_memory (pc + 2, buf, 4); | |
908 | if (status != 0) | |
909 | break; | |
910 | ||
911 | sM = (buf[0] & 0xf0) >> 4; | |
912 | rN = buf[0] & 0x0f; | |
913 | fsM = (Y << 4) | sM; | |
e17a4113 | 914 | imm24 = extract_signed_integer (&buf[1], 3, byte_order); |
6c02c64c KB |
915 | |
916 | rN_regnum = translate_rreg (rN); | |
917 | ||
918 | pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); | |
919 | regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24); | |
920 | ||
921 | pc += 6; | |
922 | } | |
923 | /* fmov fsM, (rN+, imm32) */ | |
924 | else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x31) | |
925 | { | |
926 | int fsM, sM, Y, rN, rN_regnum; | |
927 | LONGEST imm32; | |
928 | gdb_byte buf[5]; | |
929 | ||
930 | Y = (instr[1] & 0x02) >> 1; | |
931 | ||
932 | status = target_read_memory (pc + 2, buf, 5); | |
933 | if (status != 0) | |
934 | break; | |
935 | ||
936 | sM = (buf[0] & 0xf0) >> 4; | |
937 | rN = buf[0] & 0x0f; | |
938 | fsM = (Y << 4) | sM; | |
e17a4113 | 939 | imm32 = extract_signed_integer (&buf[1], 4, byte_order); |
6c02c64c KB |
940 | |
941 | rN_regnum = translate_rreg (rN); | |
942 | ||
943 | pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); | |
944 | regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32); | |
945 | ||
946 | pc += 7; | |
947 | } | |
948 | /* mov imm8, aN */ | |
949 | else if ((instr[0] & 0xf0) == 0x90) | |
950 | { | |
951 | int aN = instr[0] & 0x03; | |
952 | LONGEST imm8; | |
9cacebf5 | 953 | |
e17a4113 | 954 | imm8 = extract_signed_integer (&instr[1], 1, byte_order); |
9cacebf5 | 955 | |
6c02c64c KB |
956 | regs[E_A0_REGNUM + aN] = pv_constant (imm8); |
957 | pc += 2; | |
958 | } | |
959 | /* mov imm16, aN */ | |
960 | else if ((instr[0] & 0xfc) == 0x24) | |
961 | { | |
962 | int aN = instr[0] & 0x03; | |
963 | gdb_byte buf[2]; | |
964 | LONGEST imm16; | |
965 | ||
966 | status = target_read_memory (pc + 1, buf, 2); | |
967 | if (status != 0) | |
968 | break; | |
969 | ||
e17a4113 | 970 | imm16 = extract_signed_integer (buf, 2, byte_order); |
6c02c64c KB |
971 | regs[E_A0_REGNUM + aN] = pv_constant (imm16); |
972 | pc += 3; | |
973 | } | |
974 | /* mov imm32, aN */ | |
975 | else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xdc)) | |
976 | { | |
977 | int aN = instr[1] & 0x03; | |
978 | gdb_byte buf[4]; | |
979 | LONGEST imm32; | |
980 | ||
981 | status = target_read_memory (pc + 2, buf, 4); | |
982 | if (status != 0) | |
983 | break; | |
984 | ||
e17a4113 | 985 | imm32 = extract_signed_integer (buf, 4, byte_order); |
6c02c64c KB |
986 | regs[E_A0_REGNUM + aN] = pv_constant (imm32); |
987 | pc += 6; | |
988 | } | |
989 | /* mov imm8, dN */ | |
990 | else if ((instr[0] & 0xf0) == 0x80) | |
991 | { | |
992 | int dN = instr[0] & 0x03; | |
993 | LONGEST imm8; | |
994 | ||
e17a4113 | 995 | imm8 = extract_signed_integer (&instr[1], 1, byte_order); |
6c02c64c KB |
996 | |
997 | regs[E_D0_REGNUM + dN] = pv_constant (imm8); | |
998 | pc += 2; | |
999 | } | |
1000 | /* mov imm16, dN */ | |
1001 | else if ((instr[0] & 0xfc) == 0x2c) | |
1002 | { | |
1003 | int dN = instr[0] & 0x03; | |
1004 | gdb_byte buf[2]; | |
1005 | LONGEST imm16; | |
1006 | ||
1007 | status = target_read_memory (pc + 1, buf, 2); | |
1008 | if (status != 0) | |
1009 | break; | |
1010 | ||
e17a4113 | 1011 | imm16 = extract_signed_integer (buf, 2, byte_order); |
6c02c64c KB |
1012 | regs[E_D0_REGNUM + dN] = pv_constant (imm16); |
1013 | pc += 3; | |
1014 | } | |
1015 | /* mov imm32, dN */ | |
1016 | else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xcc)) | |
1017 | { | |
1018 | int dN = instr[1] & 0x03; | |
1019 | gdb_byte buf[4]; | |
1020 | LONGEST imm32; | |
1021 | ||
1022 | status = target_read_memory (pc + 2, buf, 4); | |
1023 | if (status != 0) | |
1024 | break; | |
1025 | ||
e17a4113 | 1026 | imm32 = extract_signed_integer (buf, 4, byte_order); |
6c02c64c KB |
1027 | regs[E_D0_REGNUM + dN] = pv_constant (imm32); |
1028 | pc += 6; | |
1029 | } | |
1030 | else | |
1031 | { | |
1032 | /* We've hit some instruction that we don't recognize. Hopefully, | |
1033 | we have enough to do prologue analysis. */ | |
1034 | break; | |
1035 | } | |
1036 | } | |
1037 | ||
1038 | /* Is the frame size (offset, really) a known constant? */ | |
1039 | if (pv_is_register (regs[E_SP_REGNUM], E_SP_REGNUM)) | |
1040 | result->frame_size = regs[E_SP_REGNUM].k; | |
9cacebf5 | 1041 | |
6c02c64c KB |
1042 | /* Was the frame pointer initialized? */ |
1043 | if (pv_is_register (regs[E_A3_REGNUM], E_SP_REGNUM)) | |
1044 | { | |
1045 | result->has_frame_ptr = 1; | |
1046 | result->frame_ptr_offset = regs[E_A3_REGNUM].k; | |
9cacebf5 | 1047 | } |
6c02c64c KB |
1048 | |
1049 | /* Record where all the registers were saved. */ | |
1050 | pv_area_scan (stack, check_for_saved, (void *) result); | |
1051 | ||
1052 | result->prologue_end = after_last_frame_setup_insn; | |
1053 | ||
1054 | do_cleanups (back_to); | |
9cacebf5 MS |
1055 | } |
1056 | ||
342ee437 MS |
1057 | /* Function: skip_prologue |
1058 | Return the address of the first inst past the prologue of the function. */ | |
1059 | ||
1060 | static CORE_ADDR | |
6093d2eb | 1061 | mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
342ee437 | 1062 | { |
2c02bd72 | 1063 | const char *name; |
6c02c64c KB |
1064 | CORE_ADDR func_addr, func_end; |
1065 | struct mn10300_prologue p; | |
1066 | ||
1067 | /* Try to find the extent of the function that contains PC. */ | |
1068 | if (!find_pc_partial_function (pc, &name, &func_addr, &func_end)) | |
1069 | return pc; | |
1070 | ||
1071 | mn10300_analyze_prologue (gdbarch, pc, func_end, &p); | |
1072 | return p.prologue_end; | |
342ee437 MS |
1073 | } |
1074 | ||
6c02c64c KB |
1075 | /* Wrapper for mn10300_analyze_prologue: find the function start; |
1076 | use the current frame PC as the limit, then | |
1077 | invoke mn10300_analyze_prologue and return its result. */ | |
1078 | static struct mn10300_prologue * | |
1079 | mn10300_analyze_frame_prologue (struct frame_info *this_frame, | |
1080 | void **this_prologue_cache) | |
342ee437 | 1081 | { |
6c02c64c | 1082 | if (!*this_prologue_cache) |
93d42b30 | 1083 | { |
6c02c64c KB |
1084 | CORE_ADDR func_start, stop_addr; |
1085 | ||
1086 | *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct mn10300_prologue); | |
1087 | ||
1088 | func_start = get_frame_func (this_frame); | |
1089 | stop_addr = get_frame_pc (this_frame); | |
1090 | ||
1091 | /* If we couldn't find any function containing the PC, then | |
1092 | just initialize the prologue cache, but don't do anything. */ | |
1093 | if (!func_start) | |
1094 | stop_addr = func_start; | |
1095 | ||
1096 | mn10300_analyze_prologue (get_frame_arch (this_frame), | |
1097 | func_start, stop_addr, *this_prologue_cache); | |
93d42b30 | 1098 | } |
342ee437 | 1099 | |
6c02c64c KB |
1100 | return *this_prologue_cache; |
1101 | } | |
1102 | ||
1103 | /* Given the next frame and a prologue cache, return this frame's | |
1104 | base. */ | |
1105 | static CORE_ADDR | |
1106 | mn10300_frame_base (struct frame_info *this_frame, void **this_prologue_cache) | |
1107 | { | |
1108 | struct mn10300_prologue *p | |
1109 | = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache); | |
1110 | ||
1111 | /* In functions that use alloca, the distance between the stack | |
1112 | pointer and the frame base varies dynamically, so we can't use | |
1113 | the SP plus static information like prologue analysis to find the | |
1114 | frame base. However, such functions must have a frame pointer, | |
1115 | to be able to restore the SP on exit. So whenever we do have a | |
1116 | frame pointer, use that to find the base. */ | |
1117 | if (p->has_frame_ptr) | |
1118 | { | |
1119 | CORE_ADDR fp = get_frame_register_unsigned (this_frame, E_A3_REGNUM); | |
1120 | return fp - p->frame_ptr_offset; | |
1121 | } | |
1122 | else | |
1123 | { | |
1124 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); | |
1125 | return sp - p->frame_size; | |
1126 | } | |
342ee437 MS |
1127 | } |
1128 | ||
1129 | /* Here is a dummy implementation. */ | |
1130 | static struct frame_id | |
94afd7a6 | 1131 | mn10300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
342ee437 | 1132 | { |
94afd7a6 UW |
1133 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); |
1134 | CORE_ADDR pc = get_frame_register_unsigned (this_frame, E_PC_REGNUM); | |
1135 | return frame_id_build (sp, pc); | |
342ee437 MS |
1136 | } |
1137 | ||
342ee437 | 1138 | static void |
94afd7a6 | 1139 | mn10300_frame_this_id (struct frame_info *this_frame, |
342ee437 MS |
1140 | void **this_prologue_cache, |
1141 | struct frame_id *this_id) | |
1142 | { | |
025bb325 MS |
1143 | *this_id = frame_id_build (mn10300_frame_base (this_frame, |
1144 | this_prologue_cache), | |
6c02c64c | 1145 | get_frame_func (this_frame)); |
342ee437 | 1146 | |
342ee437 MS |
1147 | } |
1148 | ||
94afd7a6 UW |
1149 | static struct value * |
1150 | mn10300_frame_prev_register (struct frame_info *this_frame, | |
6c02c64c | 1151 | void **this_prologue_cache, int regnum) |
342ee437 | 1152 | { |
6c02c64c KB |
1153 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame)); |
1154 | struct mn10300_prologue *p | |
1155 | = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache); | |
1156 | CORE_ADDR frame_base = mn10300_frame_base (this_frame, this_prologue_cache); | |
1157 | int reg_size = register_size (get_frame_arch (this_frame), regnum); | |
1158 | ||
1159 | if (regnum == E_SP_REGNUM) | |
1160 | return frame_unwind_got_constant (this_frame, regnum, frame_base); | |
1161 | ||
1162 | /* If prologue analysis says we saved this register somewhere, | |
1163 | return a description of the stack slot holding it. */ | |
1164 | if (p->reg_offset[regnum] != 1) | |
1165 | return frame_unwind_got_memory (this_frame, regnum, | |
1166 | frame_base + p->reg_offset[regnum]); | |
1167 | ||
1168 | /* Otherwise, presume we haven't changed the value of this | |
1169 | register, and get it from the next frame. */ | |
1170 | return frame_unwind_got_register (this_frame, regnum, regnum); | |
342ee437 MS |
1171 | } |
1172 | ||
1173 | static const struct frame_unwind mn10300_frame_unwind = { | |
1174 | NORMAL_FRAME, | |
8fbca658 | 1175 | default_frame_unwind_stop_reason, |
342ee437 | 1176 | mn10300_frame_this_id, |
94afd7a6 UW |
1177 | mn10300_frame_prev_register, |
1178 | NULL, | |
1179 | default_frame_sniffer | |
342ee437 MS |
1180 | }; |
1181 | ||
1182 | static CORE_ADDR | |
6c02c64c | 1183 | mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame) |
342ee437 MS |
1184 | { |
1185 | ULONGEST pc; | |
1186 | ||
6c02c64c | 1187 | pc = frame_unwind_register_unsigned (this_frame, E_PC_REGNUM); |
342ee437 MS |
1188 | return pc; |
1189 | } | |
1190 | ||
1191 | static CORE_ADDR | |
6c02c64c | 1192 | mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame) |
342ee437 MS |
1193 | { |
1194 | ULONGEST sp; | |
1195 | ||
6c02c64c | 1196 | sp = frame_unwind_register_unsigned (this_frame, E_SP_REGNUM); |
342ee437 MS |
1197 | return sp; |
1198 | } | |
1199 | ||
1200 | static void | |
1201 | mn10300_frame_unwind_init (struct gdbarch *gdbarch) | |
1202 | { | |
94afd7a6 UW |
1203 | dwarf2_append_unwinders (gdbarch); |
1204 | frame_unwind_append_unwinder (gdbarch, &mn10300_frame_unwind); | |
94afd7a6 | 1205 | set_gdbarch_dummy_id (gdbarch, mn10300_dummy_id); |
342ee437 MS |
1206 | set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc); |
1207 | set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp); | |
1208 | } | |
1209 | ||
1210 | /* Function: push_dummy_call | |
1211 | * | |
1212 | * Set up machine state for a target call, including | |
1213 | * function arguments, stack, return address, etc. | |
1214 | * | |
1215 | */ | |
1216 | ||
1217 | static CORE_ADDR | |
1218 | mn10300_push_dummy_call (struct gdbarch *gdbarch, | |
1219 | struct value *target_func, | |
1220 | struct regcache *regcache, | |
1221 | CORE_ADDR bp_addr, | |
1222 | int nargs, struct value **args, | |
1223 | CORE_ADDR sp, | |
1224 | int struct_return, | |
1225 | CORE_ADDR struct_addr) | |
1226 | { | |
e17a4113 | 1227 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
342ee437 | 1228 | const int push_size = register_size (gdbarch, E_PC_REGNUM); |
1fb1ca27 | 1229 | int regs_used; |
342ee437 MS |
1230 | int len, arg_len; |
1231 | int stack_offset = 0; | |
1232 | int argnum; | |
948f8e3d PA |
1233 | const gdb_byte *val; |
1234 | gdb_byte valbuf[MAX_REGISTER_SIZE]; | |
342ee437 | 1235 | |
342ee437 MS |
1236 | /* This should be a nop, but align the stack just in case something |
1237 | went wrong. Stacks are four byte aligned on the mn10300. */ | |
1238 | sp &= ~3; | |
1239 | ||
1240 | /* Now make space on the stack for the args. | |
1241 | ||
1242 | XXX This doesn't appear to handle pass-by-invisible reference | |
1243 | arguments. */ | |
1fb1ca27 | 1244 | regs_used = struct_return ? 1 : 0; |
342ee437 MS |
1245 | for (len = 0, argnum = 0; argnum < nargs; argnum++) |
1246 | { | |
1247 | arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3; | |
342ee437 MS |
1248 | while (regs_used < 2 && arg_len > 0) |
1249 | { | |
1250 | regs_used++; | |
1251 | arg_len -= push_size; | |
1252 | } | |
1253 | len += arg_len; | |
1254 | } | |
1255 | ||
1256 | /* Allocate stack space. */ | |
1257 | sp -= len; | |
1258 | ||
1fb1ca27 MS |
1259 | if (struct_return) |
1260 | { | |
1261 | regs_used = 1; | |
9c9acae0 | 1262 | regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr); |
1fb1ca27 MS |
1263 | } |
1264 | else | |
1265 | regs_used = 0; | |
1266 | ||
025bb325 | 1267 | /* Push all arguments onto the stack. */ |
342ee437 MS |
1268 | for (argnum = 0; argnum < nargs; argnum++) |
1269 | { | |
1fb1ca27 MS |
1270 | /* FIXME what about structs? Unions? */ |
1271 | if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT | |
1272 | && TYPE_LENGTH (value_type (*args)) > 8) | |
1273 | { | |
1274 | /* Change to pointer-to-type. */ | |
1275 | arg_len = push_size; | |
e17a4113 | 1276 | store_unsigned_integer (valbuf, push_size, byte_order, |
42ae5230 | 1277 | value_address (*args)); |
1fb1ca27 MS |
1278 | val = &valbuf[0]; |
1279 | } | |
1280 | else | |
1281 | { | |
1282 | arg_len = TYPE_LENGTH (value_type (*args)); | |
948f8e3d | 1283 | val = value_contents (*args); |
1fb1ca27 | 1284 | } |
342ee437 MS |
1285 | |
1286 | while (regs_used < 2 && arg_len > 0) | |
1287 | { | |
9c9acae0 | 1288 | regcache_cooked_write_unsigned (regcache, regs_used, |
e17a4113 | 1289 | extract_unsigned_integer (val, push_size, byte_order)); |
342ee437 MS |
1290 | val += push_size; |
1291 | arg_len -= push_size; | |
1292 | regs_used++; | |
1293 | } | |
1294 | ||
1295 | while (arg_len > 0) | |
1296 | { | |
1297 | write_memory (sp + stack_offset, val, push_size); | |
1298 | arg_len -= push_size; | |
1299 | val += push_size; | |
1300 | stack_offset += push_size; | |
1301 | } | |
1302 | ||
1303 | args++; | |
1304 | } | |
1305 | ||
1306 | /* Make space for the flushback area. */ | |
1307 | sp -= 8; | |
1308 | ||
1309 | /* Push the return address that contains the magic breakpoint. */ | |
1310 | sp -= 4; | |
e17a4113 | 1311 | write_memory_unsigned_integer (sp, push_size, byte_order, bp_addr); |
a64ae7e0 CV |
1312 | |
1313 | /* The CPU also writes the return address always into the | |
1314 | MDR register on "call". */ | |
1315 | regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr); | |
1316 | ||
342ee437 MS |
1317 | /* Update $sp. */ |
1318 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); | |
ee3a2f01 KB |
1319 | |
1320 | /* On the mn10300, it's possible to move some of the stack adjustment | |
1321 | and saving of the caller-save registers out of the prologue and | |
1322 | into the call sites. (When using gcc, this optimization can | |
1323 | occur when using the -mrelax switch.) If this occurs, the dwarf2 | |
1324 | info will reflect this fact. We can test to see if this is the | |
1325 | case by creating a new frame using the current stack pointer and | |
1326 | the address of the function that we're about to call. We then | |
1327 | unwind SP and see if it's different than the SP of our newly | |
1328 | created frame. If the SP values are the same, the caller is not | |
1329 | expected to allocate any additional stack. On the other hand, if | |
1330 | the SP values are different, the difference determines the | |
1331 | additional stack that must be allocated. | |
1332 | ||
1333 | Note that we don't update the return value though because that's | |
1334 | the value of the stack just after pushing the arguments, but prior | |
1335 | to performing the call. This value is needed in order to | |
025bb325 | 1336 | construct the frame ID of the dummy call. */ |
ee3a2f01 KB |
1337 | { |
1338 | CORE_ADDR func_addr = find_function_addr (target_func, NULL); | |
1339 | CORE_ADDR unwound_sp | |
1340 | = mn10300_unwind_sp (gdbarch, create_new_frame (sp, func_addr)); | |
1341 | if (sp != unwound_sp) | |
1342 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, | |
1343 | sp - (unwound_sp - sp)); | |
1344 | } | |
1345 | ||
342ee437 MS |
1346 | return sp; |
1347 | } | |
1348 | ||
336c28c5 KB |
1349 | /* If DWARF2 is a register number appearing in Dwarf2 debug info, then |
1350 | mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB | |
1351 | register number. Why don't Dwarf2 and GDB use the same numbering? | |
1352 | Who knows? But since people have object files lying around with | |
1353 | the existing Dwarf2 numbering, and other people have written stubs | |
1354 | to work with the existing GDB, neither of them can change. So we | |
1355 | just have to cope. */ | |
1356 | static int | |
be8626e0 | 1357 | mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2) |
336c28c5 | 1358 | { |
c9f4d572 | 1359 | /* This table is supposed to be shaped like the gdbarch_register_name |
336c28c5 KB |
1360 | initializer in gcc/config/mn10300/mn10300.h. Registers which |
1361 | appear in GCC's numbering, but have no counterpart in GDB's | |
1362 | world, are marked with a -1. */ | |
1363 | static int dwarf2_to_gdb[] = { | |
c5bb7362 KB |
1364 | E_D0_REGNUM, E_D1_REGNUM, E_D2_REGNUM, E_D3_REGNUM, |
1365 | E_A0_REGNUM, E_A1_REGNUM, E_A2_REGNUM, E_A3_REGNUM, | |
1366 | -1, E_SP_REGNUM, | |
1367 | ||
1368 | E_E0_REGNUM, E_E1_REGNUM, E_E2_REGNUM, E_E3_REGNUM, | |
1369 | E_E4_REGNUM, E_E5_REGNUM, E_E6_REGNUM, E_E7_REGNUM, | |
1370 | ||
1371 | E_FS0_REGNUM + 0, E_FS0_REGNUM + 1, E_FS0_REGNUM + 2, E_FS0_REGNUM + 3, | |
1372 | E_FS0_REGNUM + 4, E_FS0_REGNUM + 5, E_FS0_REGNUM + 6, E_FS0_REGNUM + 7, | |
1373 | ||
1374 | E_FS0_REGNUM + 8, E_FS0_REGNUM + 9, E_FS0_REGNUM + 10, E_FS0_REGNUM + 11, | |
1375 | E_FS0_REGNUM + 12, E_FS0_REGNUM + 13, E_FS0_REGNUM + 14, E_FS0_REGNUM + 15, | |
1376 | ||
1377 | E_FS0_REGNUM + 16, E_FS0_REGNUM + 17, E_FS0_REGNUM + 18, E_FS0_REGNUM + 19, | |
1378 | E_FS0_REGNUM + 20, E_FS0_REGNUM + 21, E_FS0_REGNUM + 22, E_FS0_REGNUM + 23, | |
1379 | ||
1380 | E_FS0_REGNUM + 24, E_FS0_REGNUM + 25, E_FS0_REGNUM + 26, E_FS0_REGNUM + 27, | |
1381 | E_FS0_REGNUM + 28, E_FS0_REGNUM + 29, E_FS0_REGNUM + 30, E_FS0_REGNUM + 31, | |
1382 | ||
1383 | E_MDR_REGNUM, E_PSW_REGNUM, E_PC_REGNUM | |
336c28c5 KB |
1384 | }; |
1385 | ||
1386 | if (dwarf2 < 0 | |
bbc1a784 | 1387 | || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb)) |
154b82dc KB |
1388 | { |
1389 | warning (_("Bogus register number in debug info: %d"), dwarf2); | |
bbc1a784 | 1390 | return -1; |
154b82dc | 1391 | } |
336c28c5 KB |
1392 | |
1393 | return dwarf2_to_gdb[dwarf2]; | |
1394 | } | |
342ee437 MS |
1395 | |
1396 | static struct gdbarch * | |
1397 | mn10300_gdbarch_init (struct gdbarch_info info, | |
1398 | struct gdbarch_list *arches) | |
1399 | { | |
1400 | struct gdbarch *gdbarch; | |
1401 | struct gdbarch_tdep *tdep; | |
4640dd91 | 1402 | int num_regs; |
342ee437 MS |
1403 | |
1404 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1405 | if (arches != NULL) | |
1406 | return arches->gdbarch; | |
1407 | ||
1408 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); | |
1409 | gdbarch = gdbarch_alloc (&info, tdep); | |
1410 | ||
1411 | switch (info.bfd_arch_info->mach) | |
1412 | { | |
1413 | case 0: | |
1414 | case bfd_mach_mn10300: | |
1415 | set_gdbarch_register_name (gdbarch, mn10300_generic_register_name); | |
1416 | tdep->am33_mode = 0; | |
4640dd91 | 1417 | num_regs = 32; |
342ee437 MS |
1418 | break; |
1419 | case bfd_mach_am33: | |
1420 | set_gdbarch_register_name (gdbarch, am33_register_name); | |
1421 | tdep->am33_mode = 1; | |
4640dd91 KB |
1422 | num_regs = 32; |
1423 | break; | |
1424 | case bfd_mach_am33_2: | |
1425 | set_gdbarch_register_name (gdbarch, am33_2_register_name); | |
1426 | tdep->am33_mode = 2; | |
1427 | num_regs = 64; | |
1428 | set_gdbarch_fp0_regnum (gdbarch, 32); | |
342ee437 MS |
1429 | break; |
1430 | default: | |
1431 | internal_error (__FILE__, __LINE__, | |
1432 | _("mn10300_gdbarch_init: Unknown mn10300 variant")); | |
1433 | break; | |
1434 | } | |
1435 | ||
1b31f75d KB |
1436 | /* By default, chars are unsigned. */ |
1437 | set_gdbarch_char_signed (gdbarch, 0); | |
1438 | ||
342ee437 | 1439 | /* Registers. */ |
4640dd91 | 1440 | set_gdbarch_num_regs (gdbarch, num_regs); |
342ee437 MS |
1441 | set_gdbarch_register_type (gdbarch, mn10300_register_type); |
1442 | set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue); | |
1443 | set_gdbarch_read_pc (gdbarch, mn10300_read_pc); | |
1444 | set_gdbarch_write_pc (gdbarch, mn10300_write_pc); | |
1445 | set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); | |
1446 | set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); | |
336c28c5 | 1447 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum); |
342ee437 MS |
1448 | |
1449 | /* Stack unwinding. */ | |
1450 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1451 | /* Breakpoints. */ | |
1452 | set_gdbarch_breakpoint_from_pc (gdbarch, mn10300_breakpoint_from_pc); | |
025bb325 | 1453 | /* decr_pc_after_break? */ |
342ee437 MS |
1454 | /* Disassembly. */ |
1455 | set_gdbarch_print_insn (gdbarch, print_insn_mn10300); | |
1456 | ||
1457 | /* Stage 2 */ | |
99fe5f9d | 1458 | set_gdbarch_return_value (gdbarch, mn10300_return_value); |
342ee437 MS |
1459 | |
1460 | /* Stage 3 -- get target calls working. */ | |
1461 | set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call); | |
1462 | /* set_gdbarch_return_value (store, extract) */ | |
1463 | ||
1464 | ||
1465 | mn10300_frame_unwind_init (gdbarch); | |
1466 | ||
697e3bc9 KB |
1467 | /* Hook in ABI-specific overrides, if they have been registered. */ |
1468 | gdbarch_init_osabi (info, gdbarch); | |
1469 | ||
342ee437 MS |
1470 | return gdbarch; |
1471 | } | |
1472 | ||
025bb325 | 1473 | /* Dump out the mn10300 specific architecture information. */ |
342ee437 MS |
1474 | |
1475 | static void | |
d93859e2 | 1476 | mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file) |
342ee437 | 1477 | { |
d93859e2 | 1478 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
342ee437 MS |
1479 | fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n", |
1480 | tdep->am33_mode); | |
1481 | } | |
1482 | ||
63807e1d PA |
1483 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1484 | extern initialize_file_ftype _initialize_mn10300_tdep; | |
1485 | ||
342ee437 MS |
1486 | void |
1487 | _initialize_mn10300_tdep (void) | |
1488 | { | |
1489 | gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep); | |
1490 | } | |
1491 |