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342ee437 MS |
1 | /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger. |
2 | ||
6aba47ca DJ |
3 | Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
4 | 2007 Free Software Foundation, Inc. | |
342ee437 MS |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 10 | the Free Software Foundation; either version 3 of the License, or |
342ee437 MS |
11 | (at your option) any later version. |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
342ee437 | 20 | |
342ee437 MS |
21 | #include "defs.h" |
22 | #include "arch-utils.h" | |
23 | #include "dis-asm.h" | |
24 | #include "gdbtypes.h" | |
25 | #include "regcache.h" | |
26 | #include "gdb_string.h" | |
27 | #include "gdb_assert.h" | |
28 | #include "gdbcore.h" /* for write_memory_unsigned_integer */ | |
29 | #include "value.h" | |
30 | #include "gdbtypes.h" | |
31 | #include "frame.h" | |
32 | #include "frame-unwind.h" | |
33 | #include "frame-base.h" | |
34 | #include "trad-frame.h" | |
35 | #include "symtab.h" | |
36 | #include "dwarf2-frame.h" | |
697e3bc9 | 37 | #include "osabi.h" |
342ee437 MS |
38 | |
39 | #include "mn10300-tdep.h" | |
40 | ||
9cacebf5 MS |
41 | /* Forward decl. */ |
42 | extern struct trad_frame_cache *mn10300_frame_unwind_cache (struct frame_info*, | |
43 | void **); | |
342ee437 MS |
44 | |
45 | /* Compute the alignment required by a type. */ | |
46 | ||
47 | static int | |
48 | mn10300_type_align (struct type *type) | |
49 | { | |
50 | int i, align = 1; | |
51 | ||
52 | switch (TYPE_CODE (type)) | |
53 | { | |
54 | case TYPE_CODE_INT: | |
55 | case TYPE_CODE_ENUM: | |
56 | case TYPE_CODE_SET: | |
57 | case TYPE_CODE_RANGE: | |
58 | case TYPE_CODE_CHAR: | |
59 | case TYPE_CODE_BOOL: | |
60 | case TYPE_CODE_FLT: | |
61 | case TYPE_CODE_PTR: | |
62 | case TYPE_CODE_REF: | |
63 | return TYPE_LENGTH (type); | |
64 | ||
65 | case TYPE_CODE_COMPLEX: | |
66 | return TYPE_LENGTH (type) / 2; | |
67 | ||
68 | case TYPE_CODE_STRUCT: | |
69 | case TYPE_CODE_UNION: | |
70 | for (i = 0; i < TYPE_NFIELDS (type); i++) | |
71 | { | |
72 | int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i)); | |
73 | while (align < falign) | |
74 | align <<= 1; | |
75 | } | |
76 | return align; | |
77 | ||
78 | case TYPE_CODE_ARRAY: | |
79 | /* HACK! Structures containing arrays, even small ones, are not | |
80 | elligible for returning in registers. */ | |
81 | return 256; | |
82 | ||
83 | case TYPE_CODE_TYPEDEF: | |
84 | return mn10300_type_align (check_typedef (type)); | |
85 | ||
86 | default: | |
87 | internal_error (__FILE__, __LINE__, _("bad switch")); | |
88 | } | |
89 | } | |
90 | ||
342ee437 | 91 | /* Should call_function allocate stack space for a struct return? */ |
342ee437 | 92 | static int |
99fe5f9d | 93 | mn10300_use_struct_convention (struct type *type) |
342ee437 MS |
94 | { |
95 | /* Structures bigger than a pair of words can't be returned in | |
96 | registers. */ | |
97 | if (TYPE_LENGTH (type) > 8) | |
98 | return 1; | |
99 | ||
100 | switch (TYPE_CODE (type)) | |
101 | { | |
102 | case TYPE_CODE_STRUCT: | |
103 | case TYPE_CODE_UNION: | |
104 | /* Structures with a single field are handled as the field | |
105 | itself. */ | |
106 | if (TYPE_NFIELDS (type) == 1) | |
99fe5f9d | 107 | return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0)); |
342ee437 MS |
108 | |
109 | /* Structures with word or double-word size are passed in memory, as | |
110 | long as they require at least word alignment. */ | |
111 | if (mn10300_type_align (type) >= 4) | |
112 | return 0; | |
113 | ||
114 | return 1; | |
115 | ||
116 | /* Arrays are addressable, so they're never returned in | |
117 | registers. This condition can only hold when the array is | |
118 | the only field of a struct or union. */ | |
119 | case TYPE_CODE_ARRAY: | |
120 | return 1; | |
121 | ||
122 | case TYPE_CODE_TYPEDEF: | |
99fe5f9d | 123 | return mn10300_use_struct_convention (check_typedef (type)); |
342ee437 MS |
124 | |
125 | default: | |
126 | return 0; | |
127 | } | |
128 | } | |
129 | ||
342ee437 | 130 | static void |
99fe5f9d | 131 | mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type, |
342ee437 MS |
132 | struct regcache *regcache, const void *valbuf) |
133 | { | |
342ee437 MS |
134 | int len = TYPE_LENGTH (type); |
135 | int reg, regsz; | |
136 | ||
137 | if (TYPE_CODE (type) == TYPE_CODE_PTR) | |
138 | reg = 4; | |
139 | else | |
140 | reg = 0; | |
141 | ||
142 | regsz = register_size (gdbarch, reg); | |
143 | ||
144 | if (len <= regsz) | |
145 | regcache_raw_write_part (regcache, reg, 0, len, valbuf); | |
146 | else if (len <= 2 * regsz) | |
147 | { | |
148 | regcache_raw_write (regcache, reg, valbuf); | |
149 | gdb_assert (regsz == register_size (gdbarch, reg + 1)); | |
150 | regcache_raw_write_part (regcache, reg+1, 0, | |
151 | len - regsz, (char *) valbuf + regsz); | |
152 | } | |
153 | else | |
154 | internal_error (__FILE__, __LINE__, | |
155 | _("Cannot store return value %d bytes long."), len); | |
156 | } | |
157 | ||
342ee437 | 158 | static void |
99fe5f9d | 159 | mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type, |
342ee437 MS |
160 | struct regcache *regcache, void *valbuf) |
161 | { | |
342ee437 MS |
162 | char buf[MAX_REGISTER_SIZE]; |
163 | int len = TYPE_LENGTH (type); | |
164 | int reg, regsz; | |
165 | ||
166 | if (TYPE_CODE (type) == TYPE_CODE_PTR) | |
167 | reg = 4; | |
168 | else | |
169 | reg = 0; | |
170 | ||
171 | regsz = register_size (gdbarch, reg); | |
172 | if (len <= regsz) | |
173 | { | |
174 | regcache_raw_read (regcache, reg, buf); | |
175 | memcpy (valbuf, buf, len); | |
176 | } | |
177 | else if (len <= 2 * regsz) | |
178 | { | |
179 | regcache_raw_read (regcache, reg, buf); | |
180 | memcpy (valbuf, buf, regsz); | |
181 | gdb_assert (regsz == register_size (gdbarch, reg + 1)); | |
182 | regcache_raw_read (regcache, reg + 1, buf); | |
183 | memcpy ((char *) valbuf + regsz, buf, len - regsz); | |
184 | } | |
185 | else | |
186 | internal_error (__FILE__, __LINE__, | |
187 | _("Cannot extract return value %d bytes long."), len); | |
188 | } | |
189 | ||
99fe5f9d KB |
190 | /* Determine, for architecture GDBARCH, how a return value of TYPE |
191 | should be returned. If it is supposed to be returned in registers, | |
192 | and READBUF is non-zero, read the appropriate value from REGCACHE, | |
193 | and copy it into READBUF. If WRITEBUF is non-zero, write the value | |
194 | from WRITEBUF into REGCACHE. */ | |
195 | ||
196 | static enum return_value_convention | |
197 | mn10300_return_value (struct gdbarch *gdbarch, struct type *type, | |
198 | struct regcache *regcache, gdb_byte *readbuf, | |
199 | const gdb_byte *writebuf) | |
200 | { | |
201 | if (mn10300_use_struct_convention (type)) | |
202 | return RETURN_VALUE_STRUCT_CONVENTION; | |
203 | ||
204 | if (readbuf) | |
205 | mn10300_extract_return_value (gdbarch, type, regcache, readbuf); | |
206 | if (writebuf) | |
207 | mn10300_store_return_value (gdbarch, type, regcache, writebuf); | |
208 | ||
209 | return RETURN_VALUE_REGISTER_CONVENTION; | |
210 | } | |
211 | ||
342ee437 MS |
212 | static char * |
213 | register_name (int reg, char **regs, long sizeof_regs) | |
214 | { | |
215 | if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0])) | |
216 | return NULL; | |
217 | else | |
218 | return regs[reg]; | |
219 | } | |
220 | ||
221 | static const char * | |
d93859e2 | 222 | mn10300_generic_register_name (struct gdbarch *gdbarch, int reg) |
342ee437 MS |
223 | { |
224 | static char *regs[] = | |
225 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
226 | "sp", "pc", "mdr", "psw", "lir", "lar", "", "", | |
227 | "", "", "", "", "", "", "", "", | |
228 | "", "", "", "", "", "", "", "fp" | |
229 | }; | |
230 | return register_name (reg, regs, sizeof regs); | |
231 | } | |
232 | ||
233 | ||
234 | static const char * | |
d93859e2 | 235 | am33_register_name (struct gdbarch *gdbarch, int reg) |
342ee437 MS |
236 | { |
237 | static char *regs[] = | |
238 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
239 | "sp", "pc", "mdr", "psw", "lir", "lar", "", | |
240 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
241 | "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", "" | |
242 | }; | |
243 | return register_name (reg, regs, sizeof regs); | |
244 | } | |
245 | ||
4640dd91 | 246 | static const char * |
d93859e2 | 247 | am33_2_register_name (struct gdbarch *gdbarch, int reg) |
4640dd91 KB |
248 | { |
249 | static char *regs[] = | |
250 | { | |
251 | "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
252 | "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0", | |
253 | "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp", | |
254 | "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "", | |
255 | "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", | |
256 | "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15", | |
257 | "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23", | |
258 | "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" | |
259 | }; | |
260 | return register_name (reg, regs, sizeof regs); | |
261 | } | |
342ee437 MS |
262 | |
263 | static struct type * | |
264 | mn10300_register_type (struct gdbarch *gdbarch, int reg) | |
265 | { | |
266 | return builtin_type_int; | |
267 | } | |
268 | ||
269 | static CORE_ADDR | |
61a1198a | 270 | mn10300_read_pc (struct regcache *regcache) |
342ee437 | 271 | { |
61a1198a UW |
272 | ULONGEST val; |
273 | regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val); | |
274 | return val; | |
342ee437 MS |
275 | } |
276 | ||
277 | static void | |
61a1198a | 278 | mn10300_write_pc (struct regcache *regcache, CORE_ADDR val) |
342ee437 | 279 | { |
61a1198a | 280 | regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val); |
342ee437 MS |
281 | } |
282 | ||
283 | /* The breakpoint instruction must be the same size as the smallest | |
284 | instruction in the instruction set. | |
285 | ||
286 | The Matsushita mn10x00 processors have single byte instructions | |
287 | so we need a single byte breakpoint. Matsushita hasn't defined | |
288 | one, so we defined it ourselves. */ | |
289 | ||
290 | const static unsigned char * | |
67d57894 MD |
291 | mn10300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr, |
292 | int *bp_size) | |
342ee437 MS |
293 | { |
294 | static char breakpoint[] = {0xff}; | |
295 | *bp_size = 1; | |
296 | return breakpoint; | |
297 | } | |
298 | ||
4640dd91 | 299 | /* Set offsets of saved registers. |
9cacebf5 MS |
300 | This is a helper function for mn10300_analyze_prologue. */ |
301 | ||
302 | static void | |
4640dd91 | 303 | set_reg_offsets (struct frame_info *fi, |
9cacebf5 | 304 | void **this_cache, |
4640dd91 KB |
305 | int movm_args, |
306 | int fpregmask, | |
307 | int stack_extra_size, | |
308 | int frame_in_fp) | |
9cacebf5 MS |
309 | { |
310 | struct trad_frame_cache *cache; | |
311 | int offset = 0; | |
312 | CORE_ADDR base; | |
313 | ||
314 | if (fi == NULL || this_cache == NULL) | |
315 | return; | |
316 | ||
317 | cache = mn10300_frame_unwind_cache (fi, this_cache); | |
318 | if (cache == NULL) | |
319 | return; | |
320 | ||
4640dd91 KB |
321 | if (frame_in_fp) |
322 | { | |
323 | base = frame_unwind_register_unsigned (fi, E_A3_REGNUM); | |
324 | } | |
325 | else | |
326 | { | |
327 | base = frame_unwind_register_unsigned (fi, E_SP_REGNUM) + stack_extra_size; | |
328 | } | |
329 | ||
330 | trad_frame_set_this_base (cache, base); | |
331 | ||
332 | if (AM33_MODE == 2) | |
333 | { | |
334 | /* If bit N is set in fpregmask, fsN is saved on the stack. | |
335 | The floating point registers are saved in ascending order. | |
336 | For example: fs16 <- Frame Pointer | |
337 | fs17 Frame Pointer + 4 */ | |
338 | if (fpregmask != 0) | |
339 | { | |
340 | int i; | |
341 | for (i = 0; i < 32; i++) | |
342 | { | |
343 | if (fpregmask & (1 << i)) | |
344 | { | |
345 | trad_frame_set_reg_addr (cache, E_FS0_REGNUM + i, base + offset); | |
346 | offset += 4; | |
347 | } | |
348 | } | |
349 | } | |
350 | } | |
351 | ||
352 | ||
9cacebf5 MS |
353 | if (movm_args & movm_other_bit) |
354 | { | |
355 | /* The `other' bit leaves a blank area of four bytes at the | |
356 | beginning of its block of saved registers, making it 32 bytes | |
357 | long in total. */ | |
358 | trad_frame_set_reg_addr (cache, E_LAR_REGNUM, base + offset + 4); | |
359 | trad_frame_set_reg_addr (cache, E_LIR_REGNUM, base + offset + 8); | |
360 | trad_frame_set_reg_addr (cache, E_MDR_REGNUM, base + offset + 12); | |
361 | trad_frame_set_reg_addr (cache, E_A0_REGNUM + 1, base + offset + 16); | |
362 | trad_frame_set_reg_addr (cache, E_A0_REGNUM, base + offset + 20); | |
363 | trad_frame_set_reg_addr (cache, E_D0_REGNUM + 1, base + offset + 24); | |
364 | trad_frame_set_reg_addr (cache, E_D0_REGNUM, base + offset + 28); | |
365 | offset += 32; | |
366 | } | |
367 | ||
368 | if (movm_args & movm_a3_bit) | |
369 | { | |
370 | trad_frame_set_reg_addr (cache, E_A3_REGNUM, base + offset); | |
371 | offset += 4; | |
372 | } | |
373 | if (movm_args & movm_a2_bit) | |
374 | { | |
375 | trad_frame_set_reg_addr (cache, E_A2_REGNUM, base + offset); | |
376 | offset += 4; | |
377 | } | |
378 | if (movm_args & movm_d3_bit) | |
379 | { | |
380 | trad_frame_set_reg_addr (cache, E_D3_REGNUM, base + offset); | |
381 | offset += 4; | |
382 | } | |
383 | if (movm_args & movm_d2_bit) | |
384 | { | |
385 | trad_frame_set_reg_addr (cache, E_D2_REGNUM, base + offset); | |
386 | offset += 4; | |
387 | } | |
388 | if (AM33_MODE) | |
389 | { | |
390 | if (movm_args & movm_exother_bit) | |
391 | { | |
392 | trad_frame_set_reg_addr (cache, E_MCVF_REGNUM, base + offset); | |
393 | trad_frame_set_reg_addr (cache, E_MCRL_REGNUM, base + offset + 4); | |
394 | trad_frame_set_reg_addr (cache, E_MCRH_REGNUM, base + offset + 8); | |
395 | trad_frame_set_reg_addr (cache, E_MDRQ_REGNUM, base + offset + 12); | |
396 | trad_frame_set_reg_addr (cache, E_E1_REGNUM, base + offset + 16); | |
397 | trad_frame_set_reg_addr (cache, E_E0_REGNUM, base + offset + 20); | |
398 | offset += 24; | |
399 | } | |
400 | if (movm_args & movm_exreg1_bit) | |
401 | { | |
402 | trad_frame_set_reg_addr (cache, E_E7_REGNUM, base + offset); | |
403 | trad_frame_set_reg_addr (cache, E_E6_REGNUM, base + offset + 4); | |
404 | trad_frame_set_reg_addr (cache, E_E5_REGNUM, base + offset + 8); | |
405 | trad_frame_set_reg_addr (cache, E_E4_REGNUM, base + offset + 12); | |
406 | offset += 16; | |
407 | } | |
408 | if (movm_args & movm_exreg0_bit) | |
409 | { | |
410 | trad_frame_set_reg_addr (cache, E_E3_REGNUM, base + offset); | |
411 | trad_frame_set_reg_addr (cache, E_E2_REGNUM, base + offset + 4); | |
412 | offset += 8; | |
413 | } | |
414 | } | |
415 | /* The last (or first) thing on the stack will be the PC. */ | |
416 | trad_frame_set_reg_addr (cache, E_PC_REGNUM, base + offset); | |
417 | /* Save the SP in the 'traditional' way. | |
418 | This will be the same location where the PC is saved. */ | |
419 | trad_frame_set_reg_value (cache, E_SP_REGNUM, base + offset); | |
420 | } | |
421 | ||
422 | /* The main purpose of this file is dealing with prologues to extract | |
423 | information about stack frames and saved registers. | |
424 | ||
425 | In gcc/config/mn13000/mn10300.c, the expand_prologue prologue | |
426 | function is pretty readable, and has a nice explanation of how the | |
427 | prologue is generated. The prologues generated by that code will | |
428 | have the following form (NOTE: the current code doesn't handle all | |
429 | this!): | |
430 | ||
431 | + If this is an old-style varargs function, then its arguments | |
432 | need to be flushed back to the stack: | |
433 | ||
434 | mov d0,(4,sp) | |
435 | mov d1,(4,sp) | |
436 | ||
437 | + If we use any of the callee-saved registers, save them now. | |
438 | ||
439 | movm [some callee-saved registers],(sp) | |
440 | ||
441 | + If we have any floating-point registers to save: | |
442 | ||
443 | - Decrement the stack pointer to reserve space for the registers. | |
444 | If the function doesn't need a frame pointer, we may combine | |
445 | this with the adjustment that reserves space for the frame. | |
446 | ||
447 | add -SIZE, sp | |
448 | ||
449 | - Save the floating-point registers. We have two possible | |
450 | strategies: | |
451 | ||
452 | . Save them at fixed offset from the SP: | |
453 | ||
454 | fmov fsN,(OFFSETN,sp) | |
455 | fmov fsM,(OFFSETM,sp) | |
456 | ... | |
457 | ||
458 | Note that, if OFFSETN happens to be zero, you'll get the | |
459 | different opcode: fmov fsN,(sp) | |
460 | ||
461 | . Or, set a0 to the start of the save area, and then use | |
462 | post-increment addressing to save the FP registers. | |
463 | ||
464 | mov sp, a0 | |
465 | add SIZE, a0 | |
466 | fmov fsN,(a0+) | |
467 | fmov fsM,(a0+) | |
468 | ... | |
469 | ||
470 | + If the function needs a frame pointer, we set it here. | |
471 | ||
472 | mov sp, a3 | |
473 | ||
474 | + Now we reserve space for the stack frame proper. This could be | |
475 | merged into the `add -SIZE, sp' instruction for FP saves up | |
476 | above, unless we needed to set the frame pointer in the previous | |
477 | step, or the frame is so large that allocating the whole thing at | |
478 | once would put the FP register save slots out of reach of the | |
479 | addressing mode (128 bytes). | |
480 | ||
481 | add -SIZE, sp | |
482 | ||
483 | One day we might keep the stack pointer constant, that won't | |
484 | change the code for prologues, but it will make the frame | |
485 | pointerless case much more common. */ | |
486 | ||
487 | /* Analyze the prologue to determine where registers are saved, | |
488 | the end of the prologue, etc etc. Return the end of the prologue | |
489 | scanned. | |
490 | ||
491 | We store into FI (if non-null) several tidbits of information: | |
492 | ||
493 | * stack_size -- size of this stack frame. Note that if we stop in | |
494 | certain parts of the prologue/epilogue we may claim the size of the | |
495 | current frame is zero. This happens when the current frame has | |
496 | not been allocated yet or has already been deallocated. | |
497 | ||
498 | * fsr -- Addresses of registers saved in the stack by this frame. | |
499 | ||
500 | * status -- A (relatively) generic status indicator. It's a bitmask | |
501 | with the following bits: | |
502 | ||
503 | MY_FRAME_IN_SP: The base of the current frame is actually in | |
504 | the stack pointer. This can happen for frame pointerless | |
505 | functions, or cases where we're stopped in the prologue/epilogue | |
506 | itself. For these cases mn10300_analyze_prologue will need up | |
507 | update fi->frame before returning or analyzing the register | |
508 | save instructions. | |
509 | ||
510 | MY_FRAME_IN_FP: The base of the current frame is in the | |
511 | frame pointer register ($a3). | |
512 | ||
513 | NO_MORE_FRAMES: Set this if the current frame is "start" or | |
514 | if the first instruction looks like mov <imm>,sp. This tells | |
515 | frame chain to not bother trying to unwind past this frame. */ | |
516 | ||
517 | static CORE_ADDR | |
518 | mn10300_analyze_prologue (struct frame_info *fi, | |
519 | void **this_cache, | |
520 | CORE_ADDR pc) | |
521 | { | |
522 | CORE_ADDR func_addr, func_end, addr, stop; | |
4640dd91 | 523 | long stack_extra_size = 0; |
9cacebf5 MS |
524 | int imm_size; |
525 | unsigned char buf[4]; | |
4640dd91 KB |
526 | int status; |
527 | int movm_args = 0; | |
528 | int fpregmask = 0; | |
9cacebf5 | 529 | char *name; |
4640dd91 | 530 | int frame_in_fp = 0; |
9cacebf5 MS |
531 | |
532 | /* Use the PC in the frame if it's provided to look up the | |
533 | start of this function. | |
534 | ||
535 | Note: kevinb/2003-07-16: We used to do the following here: | |
536 | pc = (fi ? get_frame_pc (fi) : pc); | |
537 | But this is (now) badly broken when called from analyze_dummy_frame(). | |
538 | */ | |
539 | if (fi) | |
540 | { | |
541 | pc = (pc ? pc : get_frame_pc (fi)); | |
9cacebf5 MS |
542 | } |
543 | ||
544 | /* Find the start of this function. */ | |
545 | status = find_pc_partial_function (pc, &name, &func_addr, &func_end); | |
546 | ||
547 | /* Do nothing if we couldn't find the start of this function | |
548 | ||
549 | MVS: comment went on to say "or if we're stopped at the first | |
550 | instruction in the prologue" -- but code doesn't reflect that, | |
551 | and I don't want to do that anyway. */ | |
552 | if (status == 0) | |
553 | { | |
4640dd91 KB |
554 | addr = pc; |
555 | goto finish_prologue; | |
9cacebf5 MS |
556 | } |
557 | ||
558 | /* If we're in start, then give up. */ | |
559 | if (strcmp (name, "start") == 0) | |
560 | { | |
4640dd91 KB |
561 | addr = pc; |
562 | goto finish_prologue; | |
9cacebf5 MS |
563 | } |
564 | ||
9cacebf5 MS |
565 | /* Figure out where to stop scanning. */ |
566 | stop = fi ? pc : func_end; | |
567 | ||
568 | /* Don't walk off the end of the function. */ | |
569 | stop = stop > func_end ? func_end : stop; | |
570 | ||
571 | /* Start scanning on the first instruction of this function. */ | |
572 | addr = func_addr; | |
573 | ||
574 | /* Suck in two bytes. */ | |
4640dd91 | 575 | if (addr + 2 > stop || !safe_frame_unwind_memory (fi, addr, buf, 2)) |
9cacebf5 MS |
576 | goto finish_prologue; |
577 | ||
578 | /* First see if this insn sets the stack pointer from a register; if | |
579 | so, it's probably the initialization of the stack pointer in _start, | |
580 | so mark this as the bottom-most frame. */ | |
581 | if (buf[0] == 0xf2 && (buf[1] & 0xf3) == 0xf0) | |
582 | { | |
9cacebf5 MS |
583 | goto finish_prologue; |
584 | } | |
585 | ||
586 | /* Now look for movm [regs],sp, which saves the callee saved registers. | |
587 | ||
588 | At this time we don't know if fi->frame is valid, so we only note | |
589 | that we encountered a movm instruction. Later, we'll set the entries | |
590 | in fsr.regs as needed. */ | |
591 | if (buf[0] == 0xcf) | |
592 | { | |
593 | /* Extract the register list for the movm instruction. */ | |
594 | movm_args = buf[1]; | |
595 | ||
596 | addr += 2; | |
597 | ||
598 | /* Quit now if we're beyond the stop point. */ | |
599 | if (addr >= stop) | |
600 | goto finish_prologue; | |
601 | ||
602 | /* Get the next two bytes so the prologue scan can continue. */ | |
f2c8bc43 | 603 | if (!safe_frame_unwind_memory (fi, addr, buf, 2)) |
9cacebf5 MS |
604 | goto finish_prologue; |
605 | } | |
606 | ||
4640dd91 KB |
607 | if (AM33_MODE == 2) |
608 | { | |
609 | /* Determine if any floating point registers are to be saved. | |
610 | Look for one of the following three prologue formats: | |
611 | ||
612 | [movm [regs],(sp)] [movm [regs],(sp)] [movm [regs],(sp)] | |
613 | ||
614 | add -SIZE,sp add -SIZE,sp add -SIZE,sp | |
615 | fmov fs#,(sp) mov sp,a0/a1 mov sp,a0/a1 | |
616 | fmov fs#,(#,sp) fmov fs#,(a0/a1+) add SIZE2,a0/a1 | |
617 | ... ... fmov fs#,(a0/a1+) | |
618 | ... ... ... | |
619 | fmov fs#,(#,sp) fmov fs#,(a0/a1+) fmov fs#,(a0/a1+) | |
620 | ||
621 | [mov sp,a3] [mov sp,a3] | |
622 | [add -SIZE2,sp] [add -SIZE2,sp] */ | |
623 | ||
e92e42f5 KB |
624 | /* Remember the address at which we started in the event that we |
625 | don't ultimately find an fmov instruction. Once we're certain | |
626 | that we matched one of the above patterns, we'll set | |
627 | ``restore_addr'' to the appropriate value. Note: At one time | |
628 | in the past, this code attempted to not adjust ``addr'' until | |
629 | there was a fair degree of certainty that the pattern would be | |
630 | matched. However, that code did not wait until an fmov instruction | |
631 | was actually encountered. As a consequence, ``addr'' would | |
632 | sometimes be advanced even when no fmov instructions were found. */ | |
633 | CORE_ADDR restore_addr = addr; | |
634 | ||
4640dd91 KB |
635 | /* First, look for add -SIZE,sp (i.e. add imm8,sp (0xf8feXX) |
636 | or add imm16,sp (0xfafeXXXX) | |
637 | or add imm32,sp (0xfcfeXXXXXXXX)) */ | |
638 | imm_size = 0; | |
639 | if (buf[0] == 0xf8 && buf[1] == 0xfe) | |
640 | imm_size = 1; | |
641 | else if (buf[0] == 0xfa && buf[1] == 0xfe) | |
642 | imm_size = 2; | |
643 | else if (buf[0] == 0xfc && buf[1] == 0xfe) | |
644 | imm_size = 4; | |
645 | if (imm_size != 0) | |
646 | { | |
647 | /* An "add -#,sp" instruction has been found. "addr + 2 + imm_size" | |
648 | is the address of the next instruction. Don't modify "addr" until | |
649 | the next "floating point prologue" instruction is found. If this | |
650 | is not a prologue that saves floating point registers we need to | |
651 | be able to back out of this bit of code and continue with the | |
652 | prologue analysis. */ | |
653 | if (addr + 2 + imm_size < stop) | |
654 | { | |
655 | if (!safe_frame_unwind_memory (fi, addr + 2 + imm_size, buf, 3)) | |
656 | goto finish_prologue; | |
657 | if ((buf[0] & 0xfc) == 0x3c) | |
658 | { | |
659 | /* Occasionally, especially with C++ code, the "fmov" | |
660 | instructions will be preceded by "mov sp,aN" | |
661 | (aN => a0, a1, a2, or a3). | |
662 | ||
663 | This is a one byte instruction: mov sp,aN = 0011 11XX | |
664 | where XX is the register number. | |
665 | ||
e92e42f5 KB |
666 | Skip this instruction by incrementing addr. The "fmov" |
667 | instructions will have the form "fmov fs#,(aN+)" in this | |
668 | case, but that will not necessitate a change in the | |
669 | "fmov" parsing logic below. */ | |
4640dd91 KB |
670 | |
671 | addr++; | |
672 | ||
673 | if ((buf[1] & 0xfc) == 0x20) | |
674 | { | |
675 | /* Occasionally, especially with C++ code compiled with | |
676 | the -fomit-frame-pointer or -O3 options, the | |
677 | "mov sp,aN" instruction will be followed by an | |
678 | "add #,aN" instruction. This indicates the | |
679 | "stack_size", the size of the portion of the stack | |
680 | containing the arguments. This instruction format is: | |
681 | add #,aN = 0010 00XX YYYY YYYY | |
682 | where XX is the register number | |
683 | YYYY YYYY is the constant. | |
684 | Note the size of the stack (as a negative number) in | |
685 | the frame info structure. */ | |
686 | if (fi) | |
687 | stack_extra_size += -buf[2]; | |
688 | ||
689 | addr += 2; | |
690 | } | |
691 | } | |
692 | ||
693 | if ((buf[0] & 0xfc) == 0x3c || | |
694 | buf[0] == 0xf9 || buf[0] == 0xfb) | |
695 | { | |
696 | /* An "fmov" instruction has been found indicating that this | |
697 | prologue saves floating point registers (or, as described | |
698 | above, a "mov sp,aN" and possible "add #,aN" have been | |
699 | found and we will assume an "fmov" follows). Process the | |
700 | consecutive "fmov" instructions. */ | |
701 | for (addr += 2 + imm_size;;addr += imm_size) | |
702 | { | |
703 | int regnum; | |
704 | ||
705 | /* Read the "fmov" instruction. */ | |
706 | if (addr >= stop || | |
707 | !safe_frame_unwind_memory (fi, addr, buf, 4)) | |
708 | goto finish_prologue; | |
709 | ||
710 | if (buf[0] != 0xf9 && buf[0] != 0xfb) | |
711 | break; | |
712 | ||
e92e42f5 KB |
713 | /* An fmov instruction has just been seen. We can |
714 | now really commit to the pattern match. Set the | |
715 | address to restore at the end of this speculative | |
716 | bit of code to the actually address that we've | |
717 | been incrementing (or not) throughout the | |
718 | speculation. */ | |
719 | restore_addr = addr; | |
720 | ||
4640dd91 KB |
721 | /* Get the floating point register number from the |
722 | 2nd and 3rd bytes of the "fmov" instruction: | |
723 | Machine Code: 0000 00X0 YYYY 0000 => | |
724 | Regnum: 000X YYYY */ | |
725 | regnum = (buf[1] & 0x02) << 3; | |
726 | regnum |= ((buf[2] & 0xf0) >> 4) & 0x0f; | |
727 | ||
728 | /* Add this register number to the bit mask of floating | |
729 | point registers that have been saved. */ | |
730 | fpregmask |= 1 << regnum; | |
731 | ||
732 | /* Determine the length of this "fmov" instruction. | |
733 | fmov fs#,(sp) => 3 byte instruction | |
734 | fmov fs#,(#,sp) => 4 byte instruction */ | |
735 | imm_size = (buf[0] == 0xf9) ? 3 : 4; | |
736 | } | |
737 | } | |
738 | else | |
739 | { | |
740 | /* No "fmov" was found. Reread the two bytes at the original | |
741 | "addr" to reset the state. */ | |
e92e42f5 | 742 | addr = restore_addr; |
4640dd91 KB |
743 | if (!safe_frame_unwind_memory (fi, addr, buf, 2)) |
744 | goto finish_prologue; | |
745 | } | |
746 | } | |
747 | /* else the prologue consists entirely of an "add -SIZE,sp" | |
748 | instruction. Handle this below. */ | |
749 | } | |
750 | /* else no "add -SIZE,sp" was found indicating no floating point | |
e92e42f5 KB |
751 | registers are saved in this prologue. */ |
752 | ||
753 | /* In the pattern match code contained within this block, `restore_addr' | |
754 | is set to the starting address at the very beginning and then | |
755 | iteratively to the next address to start scanning at once the | |
756 | pattern match has succeeded. Thus `restore_addr' will contain | |
757 | the address to rewind to if the pattern match failed. If the | |
758 | match succeeded, `restore_addr' and `addr' will already have the | |
759 | same value. */ | |
760 | addr = restore_addr; | |
4640dd91 KB |
761 | } |
762 | ||
9cacebf5 MS |
763 | /* Now see if we set up a frame pointer via "mov sp,a3" */ |
764 | if (buf[0] == 0x3f) | |
765 | { | |
766 | addr += 1; | |
767 | ||
768 | /* The frame pointer is now valid. */ | |
769 | if (fi) | |
770 | { | |
4640dd91 | 771 | frame_in_fp = 1; |
9cacebf5 MS |
772 | } |
773 | ||
774 | /* Quit now if we're beyond the stop point. */ | |
775 | if (addr >= stop) | |
776 | goto finish_prologue; | |
777 | ||
778 | /* Get two more bytes so scanning can continue. */ | |
f2c8bc43 | 779 | if (!safe_frame_unwind_memory (fi, addr, buf, 2)) |
9cacebf5 MS |
780 | goto finish_prologue; |
781 | } | |
782 | ||
783 | /* Next we should allocate the local frame. No more prologue insns | |
784 | are found after allocating the local frame. | |
785 | ||
786 | Search for add imm8,sp (0xf8feXX) | |
787 | or add imm16,sp (0xfafeXXXX) | |
788 | or add imm32,sp (0xfcfeXXXXXXXX). | |
789 | ||
790 | If none of the above was found, then this prologue has no | |
791 | additional stack. */ | |
792 | ||
793 | imm_size = 0; | |
794 | if (buf[0] == 0xf8 && buf[1] == 0xfe) | |
795 | imm_size = 1; | |
796 | else if (buf[0] == 0xfa && buf[1] == 0xfe) | |
797 | imm_size = 2; | |
798 | else if (buf[0] == 0xfc && buf[1] == 0xfe) | |
799 | imm_size = 4; | |
800 | ||
801 | if (imm_size != 0) | |
802 | { | |
803 | /* Suck in imm_size more bytes, they'll hold the size of the | |
804 | current frame. */ | |
f2c8bc43 | 805 | if (!safe_frame_unwind_memory (fi, addr + 2, buf, imm_size)) |
9cacebf5 MS |
806 | goto finish_prologue; |
807 | ||
4640dd91 | 808 | /* Note the size of the stack. */ |
e92e42f5 | 809 | stack_extra_size -= extract_signed_integer (buf, imm_size); |
9cacebf5 MS |
810 | |
811 | /* We just consumed 2 + imm_size bytes. */ | |
812 | addr += 2 + imm_size; | |
813 | ||
814 | /* No more prologue insns follow, so begin preparation to return. */ | |
815 | goto finish_prologue; | |
816 | } | |
817 | /* Do the essentials and get out of here. */ | |
818 | finish_prologue: | |
819 | /* Note if/where callee saved registers were saved. */ | |
820 | if (fi) | |
4640dd91 | 821 | set_reg_offsets (fi, this_cache, movm_args, fpregmask, stack_extra_size, frame_in_fp); |
9cacebf5 MS |
822 | return addr; |
823 | } | |
824 | ||
342ee437 MS |
825 | /* Function: skip_prologue |
826 | Return the address of the first inst past the prologue of the function. */ | |
827 | ||
828 | static CORE_ADDR | |
829 | mn10300_skip_prologue (CORE_ADDR pc) | |
830 | { | |
9b3c083c | 831 | return mn10300_analyze_prologue (NULL, NULL, pc); |
342ee437 MS |
832 | } |
833 | ||
834 | /* Simple frame_unwind_cache. | |
835 | This finds the "extra info" for the frame. */ | |
836 | struct trad_frame_cache * | |
837 | mn10300_frame_unwind_cache (struct frame_info *next_frame, | |
838 | void **this_prologue_cache) | |
839 | { | |
840 | struct trad_frame_cache *cache; | |
1fb1ca27 | 841 | CORE_ADDR pc, start, end; |
ec20a626 | 842 | void *cache_p; |
342ee437 MS |
843 | |
844 | if (*this_prologue_cache) | |
845 | return (*this_prologue_cache); | |
846 | ||
ec20a626 | 847 | cache_p = trad_frame_cache_zalloc (next_frame); |
d93859e2 | 848 | pc = gdbarch_unwind_pc (get_frame_arch (next_frame), next_frame); |
ec20a626 UW |
849 | mn10300_analyze_prologue (next_frame, &cache_p, pc); |
850 | cache = cache_p; | |
851 | ||
1fb1ca27 MS |
852 | if (find_pc_partial_function (pc, NULL, &start, &end)) |
853 | trad_frame_set_id (cache, | |
854 | frame_id_build (trad_frame_get_this_base (cache), | |
855 | start)); | |
856 | else | |
93d42b30 DJ |
857 | { |
858 | start = frame_func_unwind (next_frame, NORMAL_FRAME); | |
859 | trad_frame_set_id (cache, | |
860 | frame_id_build (trad_frame_get_this_base (cache), | |
861 | start)); | |
862 | } | |
342ee437 MS |
863 | |
864 | (*this_prologue_cache) = cache; | |
865 | return cache; | |
866 | } | |
867 | ||
868 | /* Here is a dummy implementation. */ | |
869 | static struct frame_id | |
870 | mn10300_unwind_dummy_id (struct gdbarch *gdbarch, | |
871 | struct frame_info *next_frame) | |
872 | { | |
873 | return frame_id_build (frame_sp_unwind (next_frame), | |
874 | frame_pc_unwind (next_frame)); | |
875 | } | |
876 | ||
877 | /* Trad frame implementation. */ | |
878 | static void | |
879 | mn10300_frame_this_id (struct frame_info *next_frame, | |
880 | void **this_prologue_cache, | |
881 | struct frame_id *this_id) | |
882 | { | |
883 | struct trad_frame_cache *cache = | |
884 | mn10300_frame_unwind_cache (next_frame, this_prologue_cache); | |
885 | ||
886 | trad_frame_get_id (cache, this_id); | |
887 | } | |
888 | ||
889 | static void | |
890 | mn10300_frame_prev_register (struct frame_info *next_frame, | |
891 | void **this_prologue_cache, | |
892 | int regnum, int *optimizedp, | |
893 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
3e6b1689 | 894 | int *realnump, gdb_byte *bufferp) |
342ee437 MS |
895 | { |
896 | struct trad_frame_cache *cache = | |
897 | mn10300_frame_unwind_cache (next_frame, this_prologue_cache); | |
898 | ||
899 | trad_frame_get_register (cache, next_frame, regnum, optimizedp, | |
900 | lvalp, addrp, realnump, bufferp); | |
901 | /* Or... | |
902 | trad_frame_get_prev_register (next_frame, cache->prev_regs, regnum, | |
903 | optimizedp, lvalp, addrp, realnump, bufferp); | |
904 | */ | |
905 | } | |
906 | ||
907 | static const struct frame_unwind mn10300_frame_unwind = { | |
908 | NORMAL_FRAME, | |
909 | mn10300_frame_this_id, | |
910 | mn10300_frame_prev_register | |
911 | }; | |
912 | ||
913 | static CORE_ADDR | |
914 | mn10300_frame_base_address (struct frame_info *next_frame, | |
915 | void **this_prologue_cache) | |
916 | { | |
917 | struct trad_frame_cache *cache = | |
918 | mn10300_frame_unwind_cache (next_frame, this_prologue_cache); | |
919 | ||
920 | return trad_frame_get_this_base (cache); | |
921 | } | |
922 | ||
923 | static const struct frame_unwind * | |
924 | mn10300_frame_sniffer (struct frame_info *next_frame) | |
925 | { | |
926 | return &mn10300_frame_unwind; | |
927 | } | |
928 | ||
929 | static const struct frame_base mn10300_frame_base = { | |
930 | &mn10300_frame_unwind, | |
931 | mn10300_frame_base_address, | |
932 | mn10300_frame_base_address, | |
933 | mn10300_frame_base_address | |
934 | }; | |
935 | ||
936 | static CORE_ADDR | |
937 | mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
938 | { | |
939 | ULONGEST pc; | |
940 | ||
11411de3 | 941 | pc = frame_unwind_register_unsigned (next_frame, E_PC_REGNUM); |
342ee437 MS |
942 | return pc; |
943 | } | |
944 | ||
945 | static CORE_ADDR | |
946 | mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
947 | { | |
948 | ULONGEST sp; | |
949 | ||
11411de3 | 950 | sp = frame_unwind_register_unsigned (next_frame, E_SP_REGNUM); |
342ee437 MS |
951 | return sp; |
952 | } | |
953 | ||
954 | static void | |
955 | mn10300_frame_unwind_init (struct gdbarch *gdbarch) | |
956 | { | |
957 | frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); | |
958 | frame_unwind_append_sniffer (gdbarch, mn10300_frame_sniffer); | |
959 | frame_base_set_default (gdbarch, &mn10300_frame_base); | |
960 | set_gdbarch_unwind_dummy_id (gdbarch, mn10300_unwind_dummy_id); | |
961 | set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc); | |
962 | set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp); | |
963 | } | |
964 | ||
965 | /* Function: push_dummy_call | |
966 | * | |
967 | * Set up machine state for a target call, including | |
968 | * function arguments, stack, return address, etc. | |
969 | * | |
970 | */ | |
971 | ||
972 | static CORE_ADDR | |
973 | mn10300_push_dummy_call (struct gdbarch *gdbarch, | |
974 | struct value *target_func, | |
975 | struct regcache *regcache, | |
976 | CORE_ADDR bp_addr, | |
977 | int nargs, struct value **args, | |
978 | CORE_ADDR sp, | |
979 | int struct_return, | |
980 | CORE_ADDR struct_addr) | |
981 | { | |
982 | const int push_size = register_size (gdbarch, E_PC_REGNUM); | |
1fb1ca27 | 983 | int regs_used; |
342ee437 MS |
984 | int len, arg_len; |
985 | int stack_offset = 0; | |
986 | int argnum; | |
1fb1ca27 | 987 | char *val, valbuf[MAX_REGISTER_SIZE]; |
342ee437 | 988 | |
342ee437 MS |
989 | /* This should be a nop, but align the stack just in case something |
990 | went wrong. Stacks are four byte aligned on the mn10300. */ | |
991 | sp &= ~3; | |
992 | ||
993 | /* Now make space on the stack for the args. | |
994 | ||
995 | XXX This doesn't appear to handle pass-by-invisible reference | |
996 | arguments. */ | |
1fb1ca27 | 997 | regs_used = struct_return ? 1 : 0; |
342ee437 MS |
998 | for (len = 0, argnum = 0; argnum < nargs; argnum++) |
999 | { | |
1000 | arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3; | |
342ee437 MS |
1001 | while (regs_used < 2 && arg_len > 0) |
1002 | { | |
1003 | regs_used++; | |
1004 | arg_len -= push_size; | |
1005 | } | |
1006 | len += arg_len; | |
1007 | } | |
1008 | ||
1009 | /* Allocate stack space. */ | |
1010 | sp -= len; | |
1011 | ||
1fb1ca27 MS |
1012 | if (struct_return) |
1013 | { | |
1014 | regs_used = 1; | |
9c9acae0 | 1015 | regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr); |
1fb1ca27 MS |
1016 | } |
1017 | else | |
1018 | regs_used = 0; | |
1019 | ||
342ee437 MS |
1020 | /* Push all arguments onto the stack. */ |
1021 | for (argnum = 0; argnum < nargs; argnum++) | |
1022 | { | |
1fb1ca27 MS |
1023 | /* FIXME what about structs? Unions? */ |
1024 | if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT | |
1025 | && TYPE_LENGTH (value_type (*args)) > 8) | |
1026 | { | |
1027 | /* Change to pointer-to-type. */ | |
1028 | arg_len = push_size; | |
1029 | store_unsigned_integer (valbuf, push_size, | |
1030 | VALUE_ADDRESS (*args)); | |
1031 | val = &valbuf[0]; | |
1032 | } | |
1033 | else | |
1034 | { | |
1035 | arg_len = TYPE_LENGTH (value_type (*args)); | |
1036 | val = (char *) value_contents (*args); | |
1037 | } | |
342ee437 MS |
1038 | |
1039 | while (regs_used < 2 && arg_len > 0) | |
1040 | { | |
9c9acae0 UW |
1041 | regcache_cooked_write_unsigned (regcache, regs_used, |
1042 | extract_unsigned_integer (val, push_size)); | |
342ee437 MS |
1043 | val += push_size; |
1044 | arg_len -= push_size; | |
1045 | regs_used++; | |
1046 | } | |
1047 | ||
1048 | while (arg_len > 0) | |
1049 | { | |
1050 | write_memory (sp + stack_offset, val, push_size); | |
1051 | arg_len -= push_size; | |
1052 | val += push_size; | |
1053 | stack_offset += push_size; | |
1054 | } | |
1055 | ||
1056 | args++; | |
1057 | } | |
1058 | ||
1059 | /* Make space for the flushback area. */ | |
1060 | sp -= 8; | |
1061 | ||
1062 | /* Push the return address that contains the magic breakpoint. */ | |
1063 | sp -= 4; | |
1064 | write_memory_unsigned_integer (sp, push_size, bp_addr); | |
a64ae7e0 CV |
1065 | |
1066 | /* The CPU also writes the return address always into the | |
1067 | MDR register on "call". */ | |
1068 | regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr); | |
1069 | ||
342ee437 MS |
1070 | /* Update $sp. */ |
1071 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); | |
1072 | return sp; | |
1073 | } | |
1074 | ||
336c28c5 KB |
1075 | /* If DWARF2 is a register number appearing in Dwarf2 debug info, then |
1076 | mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB | |
1077 | register number. Why don't Dwarf2 and GDB use the same numbering? | |
1078 | Who knows? But since people have object files lying around with | |
1079 | the existing Dwarf2 numbering, and other people have written stubs | |
1080 | to work with the existing GDB, neither of them can change. So we | |
1081 | just have to cope. */ | |
1082 | static int | |
1083 | mn10300_dwarf2_reg_to_regnum (int dwarf2) | |
1084 | { | |
c9f4d572 | 1085 | /* This table is supposed to be shaped like the gdbarch_register_name |
336c28c5 KB |
1086 | initializer in gcc/config/mn10300/mn10300.h. Registers which |
1087 | appear in GCC's numbering, but have no counterpart in GDB's | |
1088 | world, are marked with a -1. */ | |
1089 | static int dwarf2_to_gdb[] = { | |
1090 | 0, 1, 2, 3, 4, 5, 6, 7, -1, 8, | |
1091 | 15, 16, 17, 18, 19, 20, 21, 22, | |
1092 | 32, 33, 34, 35, 36, 37, 38, 39, | |
1093 | 40, 41, 42, 43, 44, 45, 46, 47, | |
1094 | 48, 49, 50, 51, 52, 53, 54, 55, | |
bbc1a784 KB |
1095 | 56, 57, 58, 59, 60, 61, 62, 63, |
1096 | 9 | |
336c28c5 KB |
1097 | }; |
1098 | ||
1099 | if (dwarf2 < 0 | |
bbc1a784 | 1100 | || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb)) |
154b82dc KB |
1101 | { |
1102 | warning (_("Bogus register number in debug info: %d"), dwarf2); | |
bbc1a784 | 1103 | return -1; |
154b82dc | 1104 | } |
336c28c5 KB |
1105 | |
1106 | return dwarf2_to_gdb[dwarf2]; | |
1107 | } | |
342ee437 MS |
1108 | |
1109 | static struct gdbarch * | |
1110 | mn10300_gdbarch_init (struct gdbarch_info info, | |
1111 | struct gdbarch_list *arches) | |
1112 | { | |
1113 | struct gdbarch *gdbarch; | |
1114 | struct gdbarch_tdep *tdep; | |
4640dd91 | 1115 | int num_regs; |
342ee437 MS |
1116 | |
1117 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1118 | if (arches != NULL) | |
1119 | return arches->gdbarch; | |
1120 | ||
1121 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); | |
1122 | gdbarch = gdbarch_alloc (&info, tdep); | |
1123 | ||
1124 | switch (info.bfd_arch_info->mach) | |
1125 | { | |
1126 | case 0: | |
1127 | case bfd_mach_mn10300: | |
1128 | set_gdbarch_register_name (gdbarch, mn10300_generic_register_name); | |
1129 | tdep->am33_mode = 0; | |
4640dd91 | 1130 | num_regs = 32; |
342ee437 MS |
1131 | break; |
1132 | case bfd_mach_am33: | |
1133 | set_gdbarch_register_name (gdbarch, am33_register_name); | |
1134 | tdep->am33_mode = 1; | |
4640dd91 KB |
1135 | num_regs = 32; |
1136 | break; | |
1137 | case bfd_mach_am33_2: | |
1138 | set_gdbarch_register_name (gdbarch, am33_2_register_name); | |
1139 | tdep->am33_mode = 2; | |
1140 | num_regs = 64; | |
1141 | set_gdbarch_fp0_regnum (gdbarch, 32); | |
342ee437 MS |
1142 | break; |
1143 | default: | |
1144 | internal_error (__FILE__, __LINE__, | |
1145 | _("mn10300_gdbarch_init: Unknown mn10300 variant")); | |
1146 | break; | |
1147 | } | |
1148 | ||
1149 | /* Registers. */ | |
4640dd91 | 1150 | set_gdbarch_num_regs (gdbarch, num_regs); |
342ee437 MS |
1151 | set_gdbarch_register_type (gdbarch, mn10300_register_type); |
1152 | set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue); | |
1153 | set_gdbarch_read_pc (gdbarch, mn10300_read_pc); | |
1154 | set_gdbarch_write_pc (gdbarch, mn10300_write_pc); | |
1155 | set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); | |
1156 | set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); | |
336c28c5 | 1157 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum); |
342ee437 MS |
1158 | |
1159 | /* Stack unwinding. */ | |
1160 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1161 | /* Breakpoints. */ | |
1162 | set_gdbarch_breakpoint_from_pc (gdbarch, mn10300_breakpoint_from_pc); | |
1163 | /* decr_pc_after_break? */ | |
1164 | /* Disassembly. */ | |
1165 | set_gdbarch_print_insn (gdbarch, print_insn_mn10300); | |
1166 | ||
1167 | /* Stage 2 */ | |
99fe5f9d | 1168 | set_gdbarch_return_value (gdbarch, mn10300_return_value); |
342ee437 MS |
1169 | |
1170 | /* Stage 3 -- get target calls working. */ | |
1171 | set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call); | |
1172 | /* set_gdbarch_return_value (store, extract) */ | |
1173 | ||
1174 | ||
1175 | mn10300_frame_unwind_init (gdbarch); | |
1176 | ||
697e3bc9 KB |
1177 | /* Hook in ABI-specific overrides, if they have been registered. */ |
1178 | gdbarch_init_osabi (info, gdbarch); | |
1179 | ||
342ee437 MS |
1180 | return gdbarch; |
1181 | } | |
1182 | ||
1183 | /* Dump out the mn10300 specific architecture information. */ | |
1184 | ||
1185 | static void | |
d93859e2 | 1186 | mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file) |
342ee437 | 1187 | { |
d93859e2 | 1188 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
342ee437 MS |
1189 | fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n", |
1190 | tdep->am33_mode); | |
1191 | } | |
1192 | ||
1193 | void | |
1194 | _initialize_mn10300_tdep (void) | |
1195 | { | |
1196 | gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep); | |
1197 | } | |
1198 |