Commit | Line | Data |
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342ee437 MS |
1 | /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger. |
2 | ||
6aba47ca | 3 | Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
9b254dd1 | 4 | 2007, 2008 Free Software Foundation, Inc. |
342ee437 MS |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 10 | the Free Software Foundation; either version 3 of the License, or |
342ee437 MS |
11 | (at your option) any later version. |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
342ee437 | 20 | |
342ee437 MS |
21 | #include "defs.h" |
22 | #include "arch-utils.h" | |
23 | #include "dis-asm.h" | |
24 | #include "gdbtypes.h" | |
25 | #include "regcache.h" | |
26 | #include "gdb_string.h" | |
27 | #include "gdb_assert.h" | |
28 | #include "gdbcore.h" /* for write_memory_unsigned_integer */ | |
29 | #include "value.h" | |
30 | #include "gdbtypes.h" | |
31 | #include "frame.h" | |
32 | #include "frame-unwind.h" | |
33 | #include "frame-base.h" | |
34 | #include "trad-frame.h" | |
35 | #include "symtab.h" | |
36 | #include "dwarf2-frame.h" | |
697e3bc9 | 37 | #include "osabi.h" |
ee3a2f01 | 38 | #include "infcall.h" |
342ee437 MS |
39 | |
40 | #include "mn10300-tdep.h" | |
41 | ||
9cacebf5 MS |
42 | /* Forward decl. */ |
43 | extern struct trad_frame_cache *mn10300_frame_unwind_cache (struct frame_info*, | |
44 | void **); | |
342ee437 MS |
45 | |
46 | /* Compute the alignment required by a type. */ | |
47 | ||
48 | static int | |
49 | mn10300_type_align (struct type *type) | |
50 | { | |
51 | int i, align = 1; | |
52 | ||
53 | switch (TYPE_CODE (type)) | |
54 | { | |
55 | case TYPE_CODE_INT: | |
56 | case TYPE_CODE_ENUM: | |
57 | case TYPE_CODE_SET: | |
58 | case TYPE_CODE_RANGE: | |
59 | case TYPE_CODE_CHAR: | |
60 | case TYPE_CODE_BOOL: | |
61 | case TYPE_CODE_FLT: | |
62 | case TYPE_CODE_PTR: | |
63 | case TYPE_CODE_REF: | |
64 | return TYPE_LENGTH (type); | |
65 | ||
66 | case TYPE_CODE_COMPLEX: | |
67 | return TYPE_LENGTH (type) / 2; | |
68 | ||
69 | case TYPE_CODE_STRUCT: | |
70 | case TYPE_CODE_UNION: | |
71 | for (i = 0; i < TYPE_NFIELDS (type); i++) | |
72 | { | |
73 | int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i)); | |
74 | while (align < falign) | |
75 | align <<= 1; | |
76 | } | |
77 | return align; | |
78 | ||
79 | case TYPE_CODE_ARRAY: | |
80 | /* HACK! Structures containing arrays, even small ones, are not | |
81 | elligible for returning in registers. */ | |
82 | return 256; | |
83 | ||
84 | case TYPE_CODE_TYPEDEF: | |
85 | return mn10300_type_align (check_typedef (type)); | |
86 | ||
87 | default: | |
88 | internal_error (__FILE__, __LINE__, _("bad switch")); | |
89 | } | |
90 | } | |
91 | ||
342ee437 | 92 | /* Should call_function allocate stack space for a struct return? */ |
342ee437 | 93 | static int |
99fe5f9d | 94 | mn10300_use_struct_convention (struct type *type) |
342ee437 MS |
95 | { |
96 | /* Structures bigger than a pair of words can't be returned in | |
97 | registers. */ | |
98 | if (TYPE_LENGTH (type) > 8) | |
99 | return 1; | |
100 | ||
101 | switch (TYPE_CODE (type)) | |
102 | { | |
103 | case TYPE_CODE_STRUCT: | |
104 | case TYPE_CODE_UNION: | |
105 | /* Structures with a single field are handled as the field | |
106 | itself. */ | |
107 | if (TYPE_NFIELDS (type) == 1) | |
99fe5f9d | 108 | return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0)); |
342ee437 MS |
109 | |
110 | /* Structures with word or double-word size are passed in memory, as | |
111 | long as they require at least word alignment. */ | |
112 | if (mn10300_type_align (type) >= 4) | |
113 | return 0; | |
114 | ||
115 | return 1; | |
116 | ||
117 | /* Arrays are addressable, so they're never returned in | |
118 | registers. This condition can only hold when the array is | |
119 | the only field of a struct or union. */ | |
120 | case TYPE_CODE_ARRAY: | |
121 | return 1; | |
122 | ||
123 | case TYPE_CODE_TYPEDEF: | |
99fe5f9d | 124 | return mn10300_use_struct_convention (check_typedef (type)); |
342ee437 MS |
125 | |
126 | default: | |
127 | return 0; | |
128 | } | |
129 | } | |
130 | ||
342ee437 | 131 | static void |
99fe5f9d | 132 | mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type, |
342ee437 MS |
133 | struct regcache *regcache, const void *valbuf) |
134 | { | |
342ee437 MS |
135 | int len = TYPE_LENGTH (type); |
136 | int reg, regsz; | |
137 | ||
138 | if (TYPE_CODE (type) == TYPE_CODE_PTR) | |
139 | reg = 4; | |
140 | else | |
141 | reg = 0; | |
142 | ||
143 | regsz = register_size (gdbarch, reg); | |
144 | ||
145 | if (len <= regsz) | |
146 | regcache_raw_write_part (regcache, reg, 0, len, valbuf); | |
147 | else if (len <= 2 * regsz) | |
148 | { | |
149 | regcache_raw_write (regcache, reg, valbuf); | |
150 | gdb_assert (regsz == register_size (gdbarch, reg + 1)); | |
151 | regcache_raw_write_part (regcache, reg+1, 0, | |
152 | len - regsz, (char *) valbuf + regsz); | |
153 | } | |
154 | else | |
155 | internal_error (__FILE__, __LINE__, | |
156 | _("Cannot store return value %d bytes long."), len); | |
157 | } | |
158 | ||
342ee437 | 159 | static void |
99fe5f9d | 160 | mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type, |
342ee437 MS |
161 | struct regcache *regcache, void *valbuf) |
162 | { | |
342ee437 MS |
163 | char buf[MAX_REGISTER_SIZE]; |
164 | int len = TYPE_LENGTH (type); | |
165 | int reg, regsz; | |
166 | ||
167 | if (TYPE_CODE (type) == TYPE_CODE_PTR) | |
168 | reg = 4; | |
169 | else | |
170 | reg = 0; | |
171 | ||
172 | regsz = register_size (gdbarch, reg); | |
173 | if (len <= regsz) | |
174 | { | |
175 | regcache_raw_read (regcache, reg, buf); | |
176 | memcpy (valbuf, buf, len); | |
177 | } | |
178 | else if (len <= 2 * regsz) | |
179 | { | |
180 | regcache_raw_read (regcache, reg, buf); | |
181 | memcpy (valbuf, buf, regsz); | |
182 | gdb_assert (regsz == register_size (gdbarch, reg + 1)); | |
183 | regcache_raw_read (regcache, reg + 1, buf); | |
184 | memcpy ((char *) valbuf + regsz, buf, len - regsz); | |
185 | } | |
186 | else | |
187 | internal_error (__FILE__, __LINE__, | |
188 | _("Cannot extract return value %d bytes long."), len); | |
189 | } | |
190 | ||
99fe5f9d KB |
191 | /* Determine, for architecture GDBARCH, how a return value of TYPE |
192 | should be returned. If it is supposed to be returned in registers, | |
193 | and READBUF is non-zero, read the appropriate value from REGCACHE, | |
194 | and copy it into READBUF. If WRITEBUF is non-zero, write the value | |
195 | from WRITEBUF into REGCACHE. */ | |
196 | ||
197 | static enum return_value_convention | |
198 | mn10300_return_value (struct gdbarch *gdbarch, struct type *type, | |
199 | struct regcache *regcache, gdb_byte *readbuf, | |
200 | const gdb_byte *writebuf) | |
201 | { | |
202 | if (mn10300_use_struct_convention (type)) | |
203 | return RETURN_VALUE_STRUCT_CONVENTION; | |
204 | ||
205 | if (readbuf) | |
206 | mn10300_extract_return_value (gdbarch, type, regcache, readbuf); | |
207 | if (writebuf) | |
208 | mn10300_store_return_value (gdbarch, type, regcache, writebuf); | |
209 | ||
210 | return RETURN_VALUE_REGISTER_CONVENTION; | |
211 | } | |
212 | ||
342ee437 MS |
213 | static char * |
214 | register_name (int reg, char **regs, long sizeof_regs) | |
215 | { | |
216 | if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0])) | |
217 | return NULL; | |
218 | else | |
219 | return regs[reg]; | |
220 | } | |
221 | ||
222 | static const char * | |
d93859e2 | 223 | mn10300_generic_register_name (struct gdbarch *gdbarch, int reg) |
342ee437 MS |
224 | { |
225 | static char *regs[] = | |
226 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
227 | "sp", "pc", "mdr", "psw", "lir", "lar", "", "", | |
228 | "", "", "", "", "", "", "", "", | |
229 | "", "", "", "", "", "", "", "fp" | |
230 | }; | |
231 | return register_name (reg, regs, sizeof regs); | |
232 | } | |
233 | ||
234 | ||
235 | static const char * | |
d93859e2 | 236 | am33_register_name (struct gdbarch *gdbarch, int reg) |
342ee437 MS |
237 | { |
238 | static char *regs[] = | |
239 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
240 | "sp", "pc", "mdr", "psw", "lir", "lar", "", | |
241 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
242 | "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", "" | |
243 | }; | |
244 | return register_name (reg, regs, sizeof regs); | |
245 | } | |
246 | ||
4640dd91 | 247 | static const char * |
d93859e2 | 248 | am33_2_register_name (struct gdbarch *gdbarch, int reg) |
4640dd91 KB |
249 | { |
250 | static char *regs[] = | |
251 | { | |
252 | "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
253 | "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0", | |
254 | "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp", | |
255 | "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "", | |
256 | "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", | |
257 | "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15", | |
258 | "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23", | |
259 | "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" | |
260 | }; | |
261 | return register_name (reg, regs, sizeof regs); | |
262 | } | |
342ee437 MS |
263 | |
264 | static struct type * | |
265 | mn10300_register_type (struct gdbarch *gdbarch, int reg) | |
266 | { | |
267 | return builtin_type_int; | |
268 | } | |
269 | ||
270 | static CORE_ADDR | |
61a1198a | 271 | mn10300_read_pc (struct regcache *regcache) |
342ee437 | 272 | { |
61a1198a UW |
273 | ULONGEST val; |
274 | regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val); | |
275 | return val; | |
342ee437 MS |
276 | } |
277 | ||
278 | static void | |
61a1198a | 279 | mn10300_write_pc (struct regcache *regcache, CORE_ADDR val) |
342ee437 | 280 | { |
61a1198a | 281 | regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val); |
342ee437 MS |
282 | } |
283 | ||
284 | /* The breakpoint instruction must be the same size as the smallest | |
285 | instruction in the instruction set. | |
286 | ||
287 | The Matsushita mn10x00 processors have single byte instructions | |
288 | so we need a single byte breakpoint. Matsushita hasn't defined | |
289 | one, so we defined it ourselves. */ | |
290 | ||
291 | const static unsigned char * | |
67d57894 MD |
292 | mn10300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr, |
293 | int *bp_size) | |
342ee437 MS |
294 | { |
295 | static char breakpoint[] = {0xff}; | |
296 | *bp_size = 1; | |
297 | return breakpoint; | |
298 | } | |
299 | ||
4640dd91 | 300 | /* Set offsets of saved registers. |
9cacebf5 MS |
301 | This is a helper function for mn10300_analyze_prologue. */ |
302 | ||
303 | static void | |
4640dd91 | 304 | set_reg_offsets (struct frame_info *fi, |
9cacebf5 | 305 | void **this_cache, |
4640dd91 KB |
306 | int movm_args, |
307 | int fpregmask, | |
308 | int stack_extra_size, | |
309 | int frame_in_fp) | |
9cacebf5 | 310 | { |
d15cf01c | 311 | struct gdbarch *gdbarch; |
9cacebf5 MS |
312 | struct trad_frame_cache *cache; |
313 | int offset = 0; | |
314 | CORE_ADDR base; | |
315 | ||
316 | if (fi == NULL || this_cache == NULL) | |
317 | return; | |
318 | ||
319 | cache = mn10300_frame_unwind_cache (fi, this_cache); | |
320 | if (cache == NULL) | |
321 | return; | |
d15cf01c | 322 | gdbarch = get_frame_arch (fi); |
9cacebf5 | 323 | |
4640dd91 KB |
324 | if (frame_in_fp) |
325 | { | |
326 | base = frame_unwind_register_unsigned (fi, E_A3_REGNUM); | |
327 | } | |
328 | else | |
329 | { | |
d15cf01c MD |
330 | base = frame_unwind_register_unsigned (fi, E_SP_REGNUM) |
331 | + stack_extra_size; | |
4640dd91 KB |
332 | } |
333 | ||
334 | trad_frame_set_this_base (cache, base); | |
335 | ||
d15cf01c | 336 | if (AM33_MODE (gdbarch) == 2) |
4640dd91 KB |
337 | { |
338 | /* If bit N is set in fpregmask, fsN is saved on the stack. | |
339 | The floating point registers are saved in ascending order. | |
340 | For example: fs16 <- Frame Pointer | |
341 | fs17 Frame Pointer + 4 */ | |
342 | if (fpregmask != 0) | |
343 | { | |
344 | int i; | |
345 | for (i = 0; i < 32; i++) | |
346 | { | |
347 | if (fpregmask & (1 << i)) | |
348 | { | |
d15cf01c MD |
349 | trad_frame_set_reg_addr (cache, E_FS0_REGNUM + i, |
350 | base + offset); | |
4640dd91 KB |
351 | offset += 4; |
352 | } | |
353 | } | |
354 | } | |
355 | } | |
356 | ||
357 | ||
9cacebf5 MS |
358 | if (movm_args & movm_other_bit) |
359 | { | |
360 | /* The `other' bit leaves a blank area of four bytes at the | |
361 | beginning of its block of saved registers, making it 32 bytes | |
362 | long in total. */ | |
363 | trad_frame_set_reg_addr (cache, E_LAR_REGNUM, base + offset + 4); | |
364 | trad_frame_set_reg_addr (cache, E_LIR_REGNUM, base + offset + 8); | |
365 | trad_frame_set_reg_addr (cache, E_MDR_REGNUM, base + offset + 12); | |
366 | trad_frame_set_reg_addr (cache, E_A0_REGNUM + 1, base + offset + 16); | |
367 | trad_frame_set_reg_addr (cache, E_A0_REGNUM, base + offset + 20); | |
368 | trad_frame_set_reg_addr (cache, E_D0_REGNUM + 1, base + offset + 24); | |
369 | trad_frame_set_reg_addr (cache, E_D0_REGNUM, base + offset + 28); | |
370 | offset += 32; | |
371 | } | |
372 | ||
373 | if (movm_args & movm_a3_bit) | |
374 | { | |
375 | trad_frame_set_reg_addr (cache, E_A3_REGNUM, base + offset); | |
376 | offset += 4; | |
377 | } | |
378 | if (movm_args & movm_a2_bit) | |
379 | { | |
380 | trad_frame_set_reg_addr (cache, E_A2_REGNUM, base + offset); | |
381 | offset += 4; | |
382 | } | |
383 | if (movm_args & movm_d3_bit) | |
384 | { | |
385 | trad_frame_set_reg_addr (cache, E_D3_REGNUM, base + offset); | |
386 | offset += 4; | |
387 | } | |
388 | if (movm_args & movm_d2_bit) | |
389 | { | |
390 | trad_frame_set_reg_addr (cache, E_D2_REGNUM, base + offset); | |
391 | offset += 4; | |
392 | } | |
d15cf01c | 393 | if (AM33_MODE (gdbarch)) |
9cacebf5 MS |
394 | { |
395 | if (movm_args & movm_exother_bit) | |
396 | { | |
397 | trad_frame_set_reg_addr (cache, E_MCVF_REGNUM, base + offset); | |
398 | trad_frame_set_reg_addr (cache, E_MCRL_REGNUM, base + offset + 4); | |
399 | trad_frame_set_reg_addr (cache, E_MCRH_REGNUM, base + offset + 8); | |
400 | trad_frame_set_reg_addr (cache, E_MDRQ_REGNUM, base + offset + 12); | |
401 | trad_frame_set_reg_addr (cache, E_E1_REGNUM, base + offset + 16); | |
402 | trad_frame_set_reg_addr (cache, E_E0_REGNUM, base + offset + 20); | |
403 | offset += 24; | |
404 | } | |
405 | if (movm_args & movm_exreg1_bit) | |
406 | { | |
407 | trad_frame_set_reg_addr (cache, E_E7_REGNUM, base + offset); | |
408 | trad_frame_set_reg_addr (cache, E_E6_REGNUM, base + offset + 4); | |
409 | trad_frame_set_reg_addr (cache, E_E5_REGNUM, base + offset + 8); | |
410 | trad_frame_set_reg_addr (cache, E_E4_REGNUM, base + offset + 12); | |
411 | offset += 16; | |
412 | } | |
413 | if (movm_args & movm_exreg0_bit) | |
414 | { | |
415 | trad_frame_set_reg_addr (cache, E_E3_REGNUM, base + offset); | |
416 | trad_frame_set_reg_addr (cache, E_E2_REGNUM, base + offset + 4); | |
417 | offset += 8; | |
418 | } | |
419 | } | |
420 | /* The last (or first) thing on the stack will be the PC. */ | |
421 | trad_frame_set_reg_addr (cache, E_PC_REGNUM, base + offset); | |
422 | /* Save the SP in the 'traditional' way. | |
423 | This will be the same location where the PC is saved. */ | |
424 | trad_frame_set_reg_value (cache, E_SP_REGNUM, base + offset); | |
425 | } | |
426 | ||
427 | /* The main purpose of this file is dealing with prologues to extract | |
428 | information about stack frames and saved registers. | |
429 | ||
430 | In gcc/config/mn13000/mn10300.c, the expand_prologue prologue | |
431 | function is pretty readable, and has a nice explanation of how the | |
432 | prologue is generated. The prologues generated by that code will | |
433 | have the following form (NOTE: the current code doesn't handle all | |
434 | this!): | |
435 | ||
436 | + If this is an old-style varargs function, then its arguments | |
437 | need to be flushed back to the stack: | |
438 | ||
439 | mov d0,(4,sp) | |
440 | mov d1,(4,sp) | |
441 | ||
442 | + If we use any of the callee-saved registers, save them now. | |
443 | ||
444 | movm [some callee-saved registers],(sp) | |
445 | ||
446 | + If we have any floating-point registers to save: | |
447 | ||
448 | - Decrement the stack pointer to reserve space for the registers. | |
449 | If the function doesn't need a frame pointer, we may combine | |
450 | this with the adjustment that reserves space for the frame. | |
451 | ||
452 | add -SIZE, sp | |
453 | ||
454 | - Save the floating-point registers. We have two possible | |
455 | strategies: | |
456 | ||
457 | . Save them at fixed offset from the SP: | |
458 | ||
459 | fmov fsN,(OFFSETN,sp) | |
460 | fmov fsM,(OFFSETM,sp) | |
461 | ... | |
462 | ||
463 | Note that, if OFFSETN happens to be zero, you'll get the | |
464 | different opcode: fmov fsN,(sp) | |
465 | ||
466 | . Or, set a0 to the start of the save area, and then use | |
467 | post-increment addressing to save the FP registers. | |
468 | ||
469 | mov sp, a0 | |
470 | add SIZE, a0 | |
471 | fmov fsN,(a0+) | |
472 | fmov fsM,(a0+) | |
473 | ... | |
474 | ||
475 | + If the function needs a frame pointer, we set it here. | |
476 | ||
477 | mov sp, a3 | |
478 | ||
479 | + Now we reserve space for the stack frame proper. This could be | |
480 | merged into the `add -SIZE, sp' instruction for FP saves up | |
481 | above, unless we needed to set the frame pointer in the previous | |
482 | step, or the frame is so large that allocating the whole thing at | |
483 | once would put the FP register save slots out of reach of the | |
484 | addressing mode (128 bytes). | |
485 | ||
486 | add -SIZE, sp | |
487 | ||
488 | One day we might keep the stack pointer constant, that won't | |
489 | change the code for prologues, but it will make the frame | |
490 | pointerless case much more common. */ | |
491 | ||
492 | /* Analyze the prologue to determine where registers are saved, | |
493 | the end of the prologue, etc etc. Return the end of the prologue | |
494 | scanned. | |
495 | ||
496 | We store into FI (if non-null) several tidbits of information: | |
497 | ||
498 | * stack_size -- size of this stack frame. Note that if we stop in | |
499 | certain parts of the prologue/epilogue we may claim the size of the | |
500 | current frame is zero. This happens when the current frame has | |
501 | not been allocated yet or has already been deallocated. | |
502 | ||
503 | * fsr -- Addresses of registers saved in the stack by this frame. | |
504 | ||
505 | * status -- A (relatively) generic status indicator. It's a bitmask | |
506 | with the following bits: | |
507 | ||
508 | MY_FRAME_IN_SP: The base of the current frame is actually in | |
509 | the stack pointer. This can happen for frame pointerless | |
510 | functions, or cases where we're stopped in the prologue/epilogue | |
511 | itself. For these cases mn10300_analyze_prologue will need up | |
512 | update fi->frame before returning or analyzing the register | |
513 | save instructions. | |
514 | ||
515 | MY_FRAME_IN_FP: The base of the current frame is in the | |
516 | frame pointer register ($a3). | |
517 | ||
518 | NO_MORE_FRAMES: Set this if the current frame is "start" or | |
519 | if the first instruction looks like mov <imm>,sp. This tells | |
520 | frame chain to not bother trying to unwind past this frame. */ | |
521 | ||
522 | static CORE_ADDR | |
d15cf01c | 523 | mn10300_analyze_prologue (struct gdbarch *gdbarch, struct frame_info *fi, |
9cacebf5 MS |
524 | void **this_cache, |
525 | CORE_ADDR pc) | |
526 | { | |
527 | CORE_ADDR func_addr, func_end, addr, stop; | |
4640dd91 | 528 | long stack_extra_size = 0; |
9cacebf5 MS |
529 | int imm_size; |
530 | unsigned char buf[4]; | |
4640dd91 KB |
531 | int status; |
532 | int movm_args = 0; | |
533 | int fpregmask = 0; | |
9cacebf5 | 534 | char *name; |
4640dd91 | 535 | int frame_in_fp = 0; |
9cacebf5 MS |
536 | |
537 | /* Use the PC in the frame if it's provided to look up the | |
538 | start of this function. | |
539 | ||
540 | Note: kevinb/2003-07-16: We used to do the following here: | |
541 | pc = (fi ? get_frame_pc (fi) : pc); | |
542 | But this is (now) badly broken when called from analyze_dummy_frame(). | |
543 | */ | |
544 | if (fi) | |
545 | { | |
546 | pc = (pc ? pc : get_frame_pc (fi)); | |
9cacebf5 MS |
547 | } |
548 | ||
549 | /* Find the start of this function. */ | |
550 | status = find_pc_partial_function (pc, &name, &func_addr, &func_end); | |
551 | ||
552 | /* Do nothing if we couldn't find the start of this function | |
553 | ||
554 | MVS: comment went on to say "or if we're stopped at the first | |
555 | instruction in the prologue" -- but code doesn't reflect that, | |
556 | and I don't want to do that anyway. */ | |
557 | if (status == 0) | |
558 | { | |
4640dd91 KB |
559 | addr = pc; |
560 | goto finish_prologue; | |
9cacebf5 MS |
561 | } |
562 | ||
563 | /* If we're in start, then give up. */ | |
564 | if (strcmp (name, "start") == 0) | |
565 | { | |
4640dd91 KB |
566 | addr = pc; |
567 | goto finish_prologue; | |
9cacebf5 MS |
568 | } |
569 | ||
9cacebf5 MS |
570 | /* Figure out where to stop scanning. */ |
571 | stop = fi ? pc : func_end; | |
572 | ||
573 | /* Don't walk off the end of the function. */ | |
574 | stop = stop > func_end ? func_end : stop; | |
575 | ||
576 | /* Start scanning on the first instruction of this function. */ | |
577 | addr = func_addr; | |
578 | ||
579 | /* Suck in two bytes. */ | |
4640dd91 | 580 | if (addr + 2 > stop || !safe_frame_unwind_memory (fi, addr, buf, 2)) |
9cacebf5 MS |
581 | goto finish_prologue; |
582 | ||
583 | /* First see if this insn sets the stack pointer from a register; if | |
584 | so, it's probably the initialization of the stack pointer in _start, | |
585 | so mark this as the bottom-most frame. */ | |
586 | if (buf[0] == 0xf2 && (buf[1] & 0xf3) == 0xf0) | |
587 | { | |
9cacebf5 MS |
588 | goto finish_prologue; |
589 | } | |
590 | ||
591 | /* Now look for movm [regs],sp, which saves the callee saved registers. | |
592 | ||
593 | At this time we don't know if fi->frame is valid, so we only note | |
594 | that we encountered a movm instruction. Later, we'll set the entries | |
595 | in fsr.regs as needed. */ | |
596 | if (buf[0] == 0xcf) | |
597 | { | |
598 | /* Extract the register list for the movm instruction. */ | |
599 | movm_args = buf[1]; | |
600 | ||
601 | addr += 2; | |
602 | ||
603 | /* Quit now if we're beyond the stop point. */ | |
604 | if (addr >= stop) | |
605 | goto finish_prologue; | |
606 | ||
607 | /* Get the next two bytes so the prologue scan can continue. */ | |
f2c8bc43 | 608 | if (!safe_frame_unwind_memory (fi, addr, buf, 2)) |
9cacebf5 MS |
609 | goto finish_prologue; |
610 | } | |
611 | ||
83845630 KB |
612 | /* Check for "mov pc, a2", an instruction found in optimized, position |
613 | independent code. Skip it if found. */ | |
614 | if (buf[0] == 0xf0 && buf[1] == 0x2e) | |
615 | { | |
616 | addr += 2; | |
617 | ||
618 | /* Quit now if we're beyond the stop point. */ | |
619 | if (addr >= stop) | |
620 | goto finish_prologue; | |
621 | ||
622 | /* Get the next two bytes so the prologue scan can continue. */ | |
623 | status = read_memory_nobpt (addr, buf, 2); | |
624 | if (status != 0) | |
625 | goto finish_prologue; | |
626 | } | |
627 | ||
d15cf01c | 628 | if (AM33_MODE (gdbarch) == 2) |
4640dd91 KB |
629 | { |
630 | /* Determine if any floating point registers are to be saved. | |
631 | Look for one of the following three prologue formats: | |
632 | ||
633 | [movm [regs],(sp)] [movm [regs],(sp)] [movm [regs],(sp)] | |
634 | ||
635 | add -SIZE,sp add -SIZE,sp add -SIZE,sp | |
636 | fmov fs#,(sp) mov sp,a0/a1 mov sp,a0/a1 | |
637 | fmov fs#,(#,sp) fmov fs#,(a0/a1+) add SIZE2,a0/a1 | |
638 | ... ... fmov fs#,(a0/a1+) | |
639 | ... ... ... | |
640 | fmov fs#,(#,sp) fmov fs#,(a0/a1+) fmov fs#,(a0/a1+) | |
641 | ||
642 | [mov sp,a3] [mov sp,a3] | |
643 | [add -SIZE2,sp] [add -SIZE2,sp] */ | |
644 | ||
e92e42f5 KB |
645 | /* Remember the address at which we started in the event that we |
646 | don't ultimately find an fmov instruction. Once we're certain | |
647 | that we matched one of the above patterns, we'll set | |
648 | ``restore_addr'' to the appropriate value. Note: At one time | |
649 | in the past, this code attempted to not adjust ``addr'' until | |
650 | there was a fair degree of certainty that the pattern would be | |
651 | matched. However, that code did not wait until an fmov instruction | |
652 | was actually encountered. As a consequence, ``addr'' would | |
653 | sometimes be advanced even when no fmov instructions were found. */ | |
654 | CORE_ADDR restore_addr = addr; | |
83845630 | 655 | int fmov_found = 0; |
e92e42f5 | 656 | |
4640dd91 KB |
657 | /* First, look for add -SIZE,sp (i.e. add imm8,sp (0xf8feXX) |
658 | or add imm16,sp (0xfafeXXXX) | |
659 | or add imm32,sp (0xfcfeXXXXXXXX)) */ | |
660 | imm_size = 0; | |
661 | if (buf[0] == 0xf8 && buf[1] == 0xfe) | |
662 | imm_size = 1; | |
663 | else if (buf[0] == 0xfa && buf[1] == 0xfe) | |
664 | imm_size = 2; | |
665 | else if (buf[0] == 0xfc && buf[1] == 0xfe) | |
666 | imm_size = 4; | |
667 | if (imm_size != 0) | |
668 | { | |
669 | /* An "add -#,sp" instruction has been found. "addr + 2 + imm_size" | |
670 | is the address of the next instruction. Don't modify "addr" until | |
671 | the next "floating point prologue" instruction is found. If this | |
672 | is not a prologue that saves floating point registers we need to | |
673 | be able to back out of this bit of code and continue with the | |
674 | prologue analysis. */ | |
675 | if (addr + 2 + imm_size < stop) | |
676 | { | |
677 | if (!safe_frame_unwind_memory (fi, addr + 2 + imm_size, buf, 3)) | |
678 | goto finish_prologue; | |
679 | if ((buf[0] & 0xfc) == 0x3c) | |
680 | { | |
681 | /* Occasionally, especially with C++ code, the "fmov" | |
682 | instructions will be preceded by "mov sp,aN" | |
683 | (aN => a0, a1, a2, or a3). | |
684 | ||
685 | This is a one byte instruction: mov sp,aN = 0011 11XX | |
686 | where XX is the register number. | |
687 | ||
e92e42f5 KB |
688 | Skip this instruction by incrementing addr. The "fmov" |
689 | instructions will have the form "fmov fs#,(aN+)" in this | |
690 | case, but that will not necessitate a change in the | |
691 | "fmov" parsing logic below. */ | |
4640dd91 KB |
692 | |
693 | addr++; | |
694 | ||
695 | if ((buf[1] & 0xfc) == 0x20) | |
696 | { | |
697 | /* Occasionally, especially with C++ code compiled with | |
698 | the -fomit-frame-pointer or -O3 options, the | |
699 | "mov sp,aN" instruction will be followed by an | |
700 | "add #,aN" instruction. This indicates the | |
701 | "stack_size", the size of the portion of the stack | |
702 | containing the arguments. This instruction format is: | |
703 | add #,aN = 0010 00XX YYYY YYYY | |
704 | where XX is the register number | |
705 | YYYY YYYY is the constant. | |
706 | Note the size of the stack (as a negative number) in | |
707 | the frame info structure. */ | |
708 | if (fi) | |
709 | stack_extra_size += -buf[2]; | |
710 | ||
711 | addr += 2; | |
712 | } | |
713 | } | |
714 | ||
715 | if ((buf[0] & 0xfc) == 0x3c || | |
716 | buf[0] == 0xf9 || buf[0] == 0xfb) | |
717 | { | |
718 | /* An "fmov" instruction has been found indicating that this | |
719 | prologue saves floating point registers (or, as described | |
720 | above, a "mov sp,aN" and possible "add #,aN" have been | |
721 | found and we will assume an "fmov" follows). Process the | |
722 | consecutive "fmov" instructions. */ | |
723 | for (addr += 2 + imm_size;;addr += imm_size) | |
724 | { | |
725 | int regnum; | |
726 | ||
727 | /* Read the "fmov" instruction. */ | |
728 | if (addr >= stop || | |
729 | !safe_frame_unwind_memory (fi, addr, buf, 4)) | |
730 | goto finish_prologue; | |
731 | ||
732 | if (buf[0] != 0xf9 && buf[0] != 0xfb) | |
733 | break; | |
734 | ||
e92e42f5 | 735 | /* An fmov instruction has just been seen. We can |
83845630 KB |
736 | now really commit to the pattern match. */ |
737 | ||
738 | fmov_found = 1; | |
e92e42f5 | 739 | |
4640dd91 KB |
740 | /* Get the floating point register number from the |
741 | 2nd and 3rd bytes of the "fmov" instruction: | |
742 | Machine Code: 0000 00X0 YYYY 0000 => | |
743 | Regnum: 000X YYYY */ | |
744 | regnum = (buf[1] & 0x02) << 3; | |
745 | regnum |= ((buf[2] & 0xf0) >> 4) & 0x0f; | |
746 | ||
747 | /* Add this register number to the bit mask of floating | |
748 | point registers that have been saved. */ | |
749 | fpregmask |= 1 << regnum; | |
750 | ||
751 | /* Determine the length of this "fmov" instruction. | |
752 | fmov fs#,(sp) => 3 byte instruction | |
753 | fmov fs#,(#,sp) => 4 byte instruction */ | |
754 | imm_size = (buf[0] == 0xf9) ? 3 : 4; | |
755 | } | |
756 | } | |
4640dd91 | 757 | } |
4640dd91 | 758 | } |
83845630 KB |
759 | /* If no fmov instructions were found by the above sequence, reset |
760 | the state and pretend that the above bit of code never happened. */ | |
761 | if (!fmov_found) | |
762 | { | |
763 | addr = restore_addr; | |
764 | status = read_memory_nobpt (addr, buf, 2); | |
765 | if (status != 0) | |
766 | goto finish_prologue; | |
767 | stack_extra_size = 0; | |
768 | } | |
4640dd91 KB |
769 | } |
770 | ||
9cacebf5 MS |
771 | /* Now see if we set up a frame pointer via "mov sp,a3" */ |
772 | if (buf[0] == 0x3f) | |
773 | { | |
774 | addr += 1; | |
775 | ||
776 | /* The frame pointer is now valid. */ | |
777 | if (fi) | |
778 | { | |
4640dd91 | 779 | frame_in_fp = 1; |
9cacebf5 MS |
780 | } |
781 | ||
782 | /* Quit now if we're beyond the stop point. */ | |
783 | if (addr >= stop) | |
784 | goto finish_prologue; | |
785 | ||
786 | /* Get two more bytes so scanning can continue. */ | |
f2c8bc43 | 787 | if (!safe_frame_unwind_memory (fi, addr, buf, 2)) |
9cacebf5 MS |
788 | goto finish_prologue; |
789 | } | |
790 | ||
791 | /* Next we should allocate the local frame. No more prologue insns | |
792 | are found after allocating the local frame. | |
793 | ||
794 | Search for add imm8,sp (0xf8feXX) | |
795 | or add imm16,sp (0xfafeXXXX) | |
796 | or add imm32,sp (0xfcfeXXXXXXXX). | |
797 | ||
798 | If none of the above was found, then this prologue has no | |
799 | additional stack. */ | |
800 | ||
801 | imm_size = 0; | |
802 | if (buf[0] == 0xf8 && buf[1] == 0xfe) | |
803 | imm_size = 1; | |
804 | else if (buf[0] == 0xfa && buf[1] == 0xfe) | |
805 | imm_size = 2; | |
806 | else if (buf[0] == 0xfc && buf[1] == 0xfe) | |
807 | imm_size = 4; | |
808 | ||
809 | if (imm_size != 0) | |
810 | { | |
811 | /* Suck in imm_size more bytes, they'll hold the size of the | |
812 | current frame. */ | |
f2c8bc43 | 813 | if (!safe_frame_unwind_memory (fi, addr + 2, buf, imm_size)) |
9cacebf5 MS |
814 | goto finish_prologue; |
815 | ||
4640dd91 | 816 | /* Note the size of the stack. */ |
e92e42f5 | 817 | stack_extra_size -= extract_signed_integer (buf, imm_size); |
9cacebf5 MS |
818 | |
819 | /* We just consumed 2 + imm_size bytes. */ | |
820 | addr += 2 + imm_size; | |
821 | ||
822 | /* No more prologue insns follow, so begin preparation to return. */ | |
823 | goto finish_prologue; | |
824 | } | |
825 | /* Do the essentials and get out of here. */ | |
826 | finish_prologue: | |
827 | /* Note if/where callee saved registers were saved. */ | |
828 | if (fi) | |
d15cf01c MD |
829 | set_reg_offsets (fi, this_cache, movm_args, fpregmask, stack_extra_size, |
830 | frame_in_fp); | |
9cacebf5 MS |
831 | return addr; |
832 | } | |
833 | ||
342ee437 MS |
834 | /* Function: skip_prologue |
835 | Return the address of the first inst past the prologue of the function. */ | |
836 | ||
837 | static CORE_ADDR | |
6093d2eb | 838 | mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
342ee437 | 839 | { |
d15cf01c | 840 | return mn10300_analyze_prologue (gdbarch, NULL, NULL, pc); |
342ee437 MS |
841 | } |
842 | ||
843 | /* Simple frame_unwind_cache. | |
844 | This finds the "extra info" for the frame. */ | |
845 | struct trad_frame_cache * | |
846 | mn10300_frame_unwind_cache (struct frame_info *next_frame, | |
847 | void **this_prologue_cache) | |
848 | { | |
d15cf01c | 849 | struct gdbarch *gdbarch; |
342ee437 | 850 | struct trad_frame_cache *cache; |
1fb1ca27 | 851 | CORE_ADDR pc, start, end; |
ec20a626 | 852 | void *cache_p; |
342ee437 MS |
853 | |
854 | if (*this_prologue_cache) | |
855 | return (*this_prologue_cache); | |
856 | ||
d15cf01c | 857 | gdbarch = get_frame_arch (next_frame); |
ec20a626 | 858 | cache_p = trad_frame_cache_zalloc (next_frame); |
d15cf01c MD |
859 | pc = gdbarch_unwind_pc (gdbarch, next_frame); |
860 | mn10300_analyze_prologue (gdbarch, next_frame, &cache_p, pc); | |
ec20a626 UW |
861 | cache = cache_p; |
862 | ||
1fb1ca27 MS |
863 | if (find_pc_partial_function (pc, NULL, &start, &end)) |
864 | trad_frame_set_id (cache, | |
865 | frame_id_build (trad_frame_get_this_base (cache), | |
866 | start)); | |
867 | else | |
93d42b30 DJ |
868 | { |
869 | start = frame_func_unwind (next_frame, NORMAL_FRAME); | |
870 | trad_frame_set_id (cache, | |
871 | frame_id_build (trad_frame_get_this_base (cache), | |
872 | start)); | |
873 | } | |
342ee437 MS |
874 | |
875 | (*this_prologue_cache) = cache; | |
876 | return cache; | |
877 | } | |
878 | ||
879 | /* Here is a dummy implementation. */ | |
880 | static struct frame_id | |
881 | mn10300_unwind_dummy_id (struct gdbarch *gdbarch, | |
882 | struct frame_info *next_frame) | |
883 | { | |
884 | return frame_id_build (frame_sp_unwind (next_frame), | |
885 | frame_pc_unwind (next_frame)); | |
886 | } | |
887 | ||
888 | /* Trad frame implementation. */ | |
889 | static void | |
890 | mn10300_frame_this_id (struct frame_info *next_frame, | |
891 | void **this_prologue_cache, | |
892 | struct frame_id *this_id) | |
893 | { | |
894 | struct trad_frame_cache *cache = | |
895 | mn10300_frame_unwind_cache (next_frame, this_prologue_cache); | |
896 | ||
897 | trad_frame_get_id (cache, this_id); | |
898 | } | |
899 | ||
900 | static void | |
901 | mn10300_frame_prev_register (struct frame_info *next_frame, | |
902 | void **this_prologue_cache, | |
903 | int regnum, int *optimizedp, | |
904 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
3e6b1689 | 905 | int *realnump, gdb_byte *bufferp) |
342ee437 MS |
906 | { |
907 | struct trad_frame_cache *cache = | |
908 | mn10300_frame_unwind_cache (next_frame, this_prologue_cache); | |
909 | ||
910 | trad_frame_get_register (cache, next_frame, regnum, optimizedp, | |
911 | lvalp, addrp, realnump, bufferp); | |
912 | /* Or... | |
913 | trad_frame_get_prev_register (next_frame, cache->prev_regs, regnum, | |
914 | optimizedp, lvalp, addrp, realnump, bufferp); | |
915 | */ | |
916 | } | |
917 | ||
918 | static const struct frame_unwind mn10300_frame_unwind = { | |
919 | NORMAL_FRAME, | |
920 | mn10300_frame_this_id, | |
921 | mn10300_frame_prev_register | |
922 | }; | |
923 | ||
924 | static CORE_ADDR | |
925 | mn10300_frame_base_address (struct frame_info *next_frame, | |
926 | void **this_prologue_cache) | |
927 | { | |
928 | struct trad_frame_cache *cache = | |
929 | mn10300_frame_unwind_cache (next_frame, this_prologue_cache); | |
930 | ||
931 | return trad_frame_get_this_base (cache); | |
932 | } | |
933 | ||
934 | static const struct frame_unwind * | |
935 | mn10300_frame_sniffer (struct frame_info *next_frame) | |
936 | { | |
937 | return &mn10300_frame_unwind; | |
938 | } | |
939 | ||
940 | static const struct frame_base mn10300_frame_base = { | |
941 | &mn10300_frame_unwind, | |
942 | mn10300_frame_base_address, | |
943 | mn10300_frame_base_address, | |
944 | mn10300_frame_base_address | |
945 | }; | |
946 | ||
947 | static CORE_ADDR | |
948 | mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
949 | { | |
950 | ULONGEST pc; | |
951 | ||
11411de3 | 952 | pc = frame_unwind_register_unsigned (next_frame, E_PC_REGNUM); |
342ee437 MS |
953 | return pc; |
954 | } | |
955 | ||
956 | static CORE_ADDR | |
957 | mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
958 | { | |
959 | ULONGEST sp; | |
960 | ||
11411de3 | 961 | sp = frame_unwind_register_unsigned (next_frame, E_SP_REGNUM); |
342ee437 MS |
962 | return sp; |
963 | } | |
964 | ||
965 | static void | |
966 | mn10300_frame_unwind_init (struct gdbarch *gdbarch) | |
967 | { | |
968 | frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); | |
969 | frame_unwind_append_sniffer (gdbarch, mn10300_frame_sniffer); | |
970 | frame_base_set_default (gdbarch, &mn10300_frame_base); | |
971 | set_gdbarch_unwind_dummy_id (gdbarch, mn10300_unwind_dummy_id); | |
972 | set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc); | |
973 | set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp); | |
974 | } | |
975 | ||
976 | /* Function: push_dummy_call | |
977 | * | |
978 | * Set up machine state for a target call, including | |
979 | * function arguments, stack, return address, etc. | |
980 | * | |
981 | */ | |
982 | ||
983 | static CORE_ADDR | |
984 | mn10300_push_dummy_call (struct gdbarch *gdbarch, | |
985 | struct value *target_func, | |
986 | struct regcache *regcache, | |
987 | CORE_ADDR bp_addr, | |
988 | int nargs, struct value **args, | |
989 | CORE_ADDR sp, | |
990 | int struct_return, | |
991 | CORE_ADDR struct_addr) | |
992 | { | |
993 | const int push_size = register_size (gdbarch, E_PC_REGNUM); | |
1fb1ca27 | 994 | int regs_used; |
342ee437 MS |
995 | int len, arg_len; |
996 | int stack_offset = 0; | |
997 | int argnum; | |
1fb1ca27 | 998 | char *val, valbuf[MAX_REGISTER_SIZE]; |
342ee437 | 999 | |
342ee437 MS |
1000 | /* This should be a nop, but align the stack just in case something |
1001 | went wrong. Stacks are four byte aligned on the mn10300. */ | |
1002 | sp &= ~3; | |
1003 | ||
1004 | /* Now make space on the stack for the args. | |
1005 | ||
1006 | XXX This doesn't appear to handle pass-by-invisible reference | |
1007 | arguments. */ | |
1fb1ca27 | 1008 | regs_used = struct_return ? 1 : 0; |
342ee437 MS |
1009 | for (len = 0, argnum = 0; argnum < nargs; argnum++) |
1010 | { | |
1011 | arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3; | |
342ee437 MS |
1012 | while (regs_used < 2 && arg_len > 0) |
1013 | { | |
1014 | regs_used++; | |
1015 | arg_len -= push_size; | |
1016 | } | |
1017 | len += arg_len; | |
1018 | } | |
1019 | ||
1020 | /* Allocate stack space. */ | |
1021 | sp -= len; | |
1022 | ||
1fb1ca27 MS |
1023 | if (struct_return) |
1024 | { | |
1025 | regs_used = 1; | |
9c9acae0 | 1026 | regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr); |
1fb1ca27 MS |
1027 | } |
1028 | else | |
1029 | regs_used = 0; | |
1030 | ||
342ee437 MS |
1031 | /* Push all arguments onto the stack. */ |
1032 | for (argnum = 0; argnum < nargs; argnum++) | |
1033 | { | |
1fb1ca27 MS |
1034 | /* FIXME what about structs? Unions? */ |
1035 | if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT | |
1036 | && TYPE_LENGTH (value_type (*args)) > 8) | |
1037 | { | |
1038 | /* Change to pointer-to-type. */ | |
1039 | arg_len = push_size; | |
1040 | store_unsigned_integer (valbuf, push_size, | |
1041 | VALUE_ADDRESS (*args)); | |
1042 | val = &valbuf[0]; | |
1043 | } | |
1044 | else | |
1045 | { | |
1046 | arg_len = TYPE_LENGTH (value_type (*args)); | |
1047 | val = (char *) value_contents (*args); | |
1048 | } | |
342ee437 MS |
1049 | |
1050 | while (regs_used < 2 && arg_len > 0) | |
1051 | { | |
9c9acae0 UW |
1052 | regcache_cooked_write_unsigned (regcache, regs_used, |
1053 | extract_unsigned_integer (val, push_size)); | |
342ee437 MS |
1054 | val += push_size; |
1055 | arg_len -= push_size; | |
1056 | regs_used++; | |
1057 | } | |
1058 | ||
1059 | while (arg_len > 0) | |
1060 | { | |
1061 | write_memory (sp + stack_offset, val, push_size); | |
1062 | arg_len -= push_size; | |
1063 | val += push_size; | |
1064 | stack_offset += push_size; | |
1065 | } | |
1066 | ||
1067 | args++; | |
1068 | } | |
1069 | ||
1070 | /* Make space for the flushback area. */ | |
1071 | sp -= 8; | |
1072 | ||
1073 | /* Push the return address that contains the magic breakpoint. */ | |
1074 | sp -= 4; | |
1075 | write_memory_unsigned_integer (sp, push_size, bp_addr); | |
a64ae7e0 CV |
1076 | |
1077 | /* The CPU also writes the return address always into the | |
1078 | MDR register on "call". */ | |
1079 | regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr); | |
1080 | ||
342ee437 MS |
1081 | /* Update $sp. */ |
1082 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); | |
ee3a2f01 KB |
1083 | |
1084 | /* On the mn10300, it's possible to move some of the stack adjustment | |
1085 | and saving of the caller-save registers out of the prologue and | |
1086 | into the call sites. (When using gcc, this optimization can | |
1087 | occur when using the -mrelax switch.) If this occurs, the dwarf2 | |
1088 | info will reflect this fact. We can test to see if this is the | |
1089 | case by creating a new frame using the current stack pointer and | |
1090 | the address of the function that we're about to call. We then | |
1091 | unwind SP and see if it's different than the SP of our newly | |
1092 | created frame. If the SP values are the same, the caller is not | |
1093 | expected to allocate any additional stack. On the other hand, if | |
1094 | the SP values are different, the difference determines the | |
1095 | additional stack that must be allocated. | |
1096 | ||
1097 | Note that we don't update the return value though because that's | |
1098 | the value of the stack just after pushing the arguments, but prior | |
1099 | to performing the call. This value is needed in order to | |
1100 | construct the frame ID of the dummy call. */ | |
1101 | { | |
1102 | CORE_ADDR func_addr = find_function_addr (target_func, NULL); | |
1103 | CORE_ADDR unwound_sp | |
1104 | = mn10300_unwind_sp (gdbarch, create_new_frame (sp, func_addr)); | |
1105 | if (sp != unwound_sp) | |
1106 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, | |
1107 | sp - (unwound_sp - sp)); | |
1108 | } | |
1109 | ||
342ee437 MS |
1110 | return sp; |
1111 | } | |
1112 | ||
336c28c5 KB |
1113 | /* If DWARF2 is a register number appearing in Dwarf2 debug info, then |
1114 | mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB | |
1115 | register number. Why don't Dwarf2 and GDB use the same numbering? | |
1116 | Who knows? But since people have object files lying around with | |
1117 | the existing Dwarf2 numbering, and other people have written stubs | |
1118 | to work with the existing GDB, neither of them can change. So we | |
1119 | just have to cope. */ | |
1120 | static int | |
be8626e0 | 1121 | mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2) |
336c28c5 | 1122 | { |
c9f4d572 | 1123 | /* This table is supposed to be shaped like the gdbarch_register_name |
336c28c5 KB |
1124 | initializer in gcc/config/mn10300/mn10300.h. Registers which |
1125 | appear in GCC's numbering, but have no counterpart in GDB's | |
1126 | world, are marked with a -1. */ | |
1127 | static int dwarf2_to_gdb[] = { | |
1128 | 0, 1, 2, 3, 4, 5, 6, 7, -1, 8, | |
1129 | 15, 16, 17, 18, 19, 20, 21, 22, | |
1130 | 32, 33, 34, 35, 36, 37, 38, 39, | |
1131 | 40, 41, 42, 43, 44, 45, 46, 47, | |
1132 | 48, 49, 50, 51, 52, 53, 54, 55, | |
bbc1a784 KB |
1133 | 56, 57, 58, 59, 60, 61, 62, 63, |
1134 | 9 | |
336c28c5 KB |
1135 | }; |
1136 | ||
1137 | if (dwarf2 < 0 | |
bbc1a784 | 1138 | || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb)) |
154b82dc KB |
1139 | { |
1140 | warning (_("Bogus register number in debug info: %d"), dwarf2); | |
bbc1a784 | 1141 | return -1; |
154b82dc | 1142 | } |
336c28c5 KB |
1143 | |
1144 | return dwarf2_to_gdb[dwarf2]; | |
1145 | } | |
342ee437 MS |
1146 | |
1147 | static struct gdbarch * | |
1148 | mn10300_gdbarch_init (struct gdbarch_info info, | |
1149 | struct gdbarch_list *arches) | |
1150 | { | |
1151 | struct gdbarch *gdbarch; | |
1152 | struct gdbarch_tdep *tdep; | |
4640dd91 | 1153 | int num_regs; |
342ee437 MS |
1154 | |
1155 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1156 | if (arches != NULL) | |
1157 | return arches->gdbarch; | |
1158 | ||
1159 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); | |
1160 | gdbarch = gdbarch_alloc (&info, tdep); | |
1161 | ||
1162 | switch (info.bfd_arch_info->mach) | |
1163 | { | |
1164 | case 0: | |
1165 | case bfd_mach_mn10300: | |
1166 | set_gdbarch_register_name (gdbarch, mn10300_generic_register_name); | |
1167 | tdep->am33_mode = 0; | |
4640dd91 | 1168 | num_regs = 32; |
342ee437 MS |
1169 | break; |
1170 | case bfd_mach_am33: | |
1171 | set_gdbarch_register_name (gdbarch, am33_register_name); | |
1172 | tdep->am33_mode = 1; | |
4640dd91 KB |
1173 | num_regs = 32; |
1174 | break; | |
1175 | case bfd_mach_am33_2: | |
1176 | set_gdbarch_register_name (gdbarch, am33_2_register_name); | |
1177 | tdep->am33_mode = 2; | |
1178 | num_regs = 64; | |
1179 | set_gdbarch_fp0_regnum (gdbarch, 32); | |
342ee437 MS |
1180 | break; |
1181 | default: | |
1182 | internal_error (__FILE__, __LINE__, | |
1183 | _("mn10300_gdbarch_init: Unknown mn10300 variant")); | |
1184 | break; | |
1185 | } | |
1186 | ||
1187 | /* Registers. */ | |
4640dd91 | 1188 | set_gdbarch_num_regs (gdbarch, num_regs); |
342ee437 MS |
1189 | set_gdbarch_register_type (gdbarch, mn10300_register_type); |
1190 | set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue); | |
1191 | set_gdbarch_read_pc (gdbarch, mn10300_read_pc); | |
1192 | set_gdbarch_write_pc (gdbarch, mn10300_write_pc); | |
1193 | set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); | |
1194 | set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); | |
336c28c5 | 1195 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum); |
342ee437 MS |
1196 | |
1197 | /* Stack unwinding. */ | |
1198 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1199 | /* Breakpoints. */ | |
1200 | set_gdbarch_breakpoint_from_pc (gdbarch, mn10300_breakpoint_from_pc); | |
1201 | /* decr_pc_after_break? */ | |
1202 | /* Disassembly. */ | |
1203 | set_gdbarch_print_insn (gdbarch, print_insn_mn10300); | |
1204 | ||
1205 | /* Stage 2 */ | |
99fe5f9d | 1206 | set_gdbarch_return_value (gdbarch, mn10300_return_value); |
342ee437 MS |
1207 | |
1208 | /* Stage 3 -- get target calls working. */ | |
1209 | set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call); | |
1210 | /* set_gdbarch_return_value (store, extract) */ | |
1211 | ||
1212 | ||
1213 | mn10300_frame_unwind_init (gdbarch); | |
1214 | ||
697e3bc9 KB |
1215 | /* Hook in ABI-specific overrides, if they have been registered. */ |
1216 | gdbarch_init_osabi (info, gdbarch); | |
1217 | ||
342ee437 MS |
1218 | return gdbarch; |
1219 | } | |
1220 | ||
1221 | /* Dump out the mn10300 specific architecture information. */ | |
1222 | ||
1223 | static void | |
d93859e2 | 1224 | mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file) |
342ee437 | 1225 | { |
d93859e2 | 1226 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
342ee437 MS |
1227 | fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n", |
1228 | tdep->am33_mode); | |
1229 | } | |
1230 | ||
1231 | void | |
1232 | _initialize_mn10300_tdep (void) | |
1233 | { | |
1234 | gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep); | |
1235 | } | |
1236 |