Commit | Line | Data |
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342ee437 MS |
1 | /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger. |
2 | ||
e2882c85 | 3 | Copyright (C) 1996-2018 Free Software Foundation, Inc. |
342ee437 MS |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
342ee437 MS |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
342ee437 | 19 | |
342ee437 MS |
20 | #include "defs.h" |
21 | #include "arch-utils.h" | |
22 | #include "dis-asm.h" | |
23 | #include "gdbtypes.h" | |
24 | #include "regcache.h" | |
025bb325 | 25 | #include "gdbcore.h" /* For write_memory_unsigned_integer. */ |
342ee437 | 26 | #include "value.h" |
342ee437 MS |
27 | #include "frame.h" |
28 | #include "frame-unwind.h" | |
29 | #include "frame-base.h" | |
342ee437 MS |
30 | #include "symtab.h" |
31 | #include "dwarf2-frame.h" | |
697e3bc9 | 32 | #include "osabi.h" |
ee3a2f01 | 33 | #include "infcall.h" |
6c02c64c | 34 | #include "prologue-value.h" |
effa26a9 | 35 | #include "target.h" |
342ee437 MS |
36 | |
37 | #include "mn10300-tdep.h" | |
38 | ||
6c02c64c KB |
39 | |
40 | /* The am33-2 has 64 registers. */ | |
41 | #define MN10300_MAX_NUM_REGS 64 | |
42 | ||
b8b6e72f AH |
43 | /* Big enough to hold the size of the largest register in bytes. */ |
44 | #define MN10300_MAX_REGISTER_SIZE 64 | |
45 | ||
6c02c64c KB |
46 | /* This structure holds the results of a prologue analysis. */ |
47 | struct mn10300_prologue | |
48 | { | |
d80b854b UW |
49 | /* The architecture for which we generated this prologue info. */ |
50 | struct gdbarch *gdbarch; | |
51 | ||
6c02c64c KB |
52 | /* The offset from the frame base to the stack pointer --- always |
53 | zero or negative. | |
54 | ||
55 | Calling this a "size" is a bit misleading, but given that the | |
56 | stack grows downwards, using offsets for everything keeps one | |
57 | from going completely sign-crazy: you never change anything's | |
58 | sign for an ADD instruction; always change the second operand's | |
59 | sign for a SUB instruction; and everything takes care of | |
60 | itself. */ | |
61 | int frame_size; | |
62 | ||
63 | /* Non-zero if this function has initialized the frame pointer from | |
64 | the stack pointer, zero otherwise. */ | |
65 | int has_frame_ptr; | |
66 | ||
67 | /* If has_frame_ptr is non-zero, this is the offset from the frame | |
68 | base to where the frame pointer points. This is always zero or | |
69 | negative. */ | |
70 | int frame_ptr_offset; | |
71 | ||
72 | /* The address of the first instruction at which the frame has been | |
73 | set up and the arguments are where the debug info says they are | |
74 | --- as best as we can tell. */ | |
75 | CORE_ADDR prologue_end; | |
76 | ||
77 | /* reg_offset[R] is the offset from the CFA at which register R is | |
78 | saved, or 1 if register R has not been saved. (Real values are | |
79 | always zero or negative.) */ | |
80 | int reg_offset[MN10300_MAX_NUM_REGS]; | |
81 | }; | |
82 | ||
342ee437 MS |
83 | |
84 | /* Compute the alignment required by a type. */ | |
85 | ||
86 | static int | |
87 | mn10300_type_align (struct type *type) | |
88 | { | |
89 | int i, align = 1; | |
90 | ||
91 | switch (TYPE_CODE (type)) | |
92 | { | |
93 | case TYPE_CODE_INT: | |
94 | case TYPE_CODE_ENUM: | |
95 | case TYPE_CODE_SET: | |
96 | case TYPE_CODE_RANGE: | |
97 | case TYPE_CODE_CHAR: | |
98 | case TYPE_CODE_BOOL: | |
99 | case TYPE_CODE_FLT: | |
100 | case TYPE_CODE_PTR: | |
101 | case TYPE_CODE_REF: | |
aa006118 | 102 | case TYPE_CODE_RVALUE_REF: |
342ee437 MS |
103 | return TYPE_LENGTH (type); |
104 | ||
105 | case TYPE_CODE_COMPLEX: | |
106 | return TYPE_LENGTH (type) / 2; | |
107 | ||
108 | case TYPE_CODE_STRUCT: | |
109 | case TYPE_CODE_UNION: | |
110 | for (i = 0; i < TYPE_NFIELDS (type); i++) | |
111 | { | |
112 | int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i)); | |
113 | while (align < falign) | |
114 | align <<= 1; | |
115 | } | |
116 | return align; | |
117 | ||
118 | case TYPE_CODE_ARRAY: | |
119 | /* HACK! Structures containing arrays, even small ones, are not | |
120 | elligible for returning in registers. */ | |
121 | return 256; | |
122 | ||
123 | case TYPE_CODE_TYPEDEF: | |
124 | return mn10300_type_align (check_typedef (type)); | |
125 | ||
126 | default: | |
127 | internal_error (__FILE__, __LINE__, _("bad switch")); | |
128 | } | |
129 | } | |
130 | ||
342ee437 | 131 | /* Should call_function allocate stack space for a struct return? */ |
342ee437 | 132 | static int |
99fe5f9d | 133 | mn10300_use_struct_convention (struct type *type) |
342ee437 MS |
134 | { |
135 | /* Structures bigger than a pair of words can't be returned in | |
136 | registers. */ | |
137 | if (TYPE_LENGTH (type) > 8) | |
138 | return 1; | |
139 | ||
140 | switch (TYPE_CODE (type)) | |
141 | { | |
142 | case TYPE_CODE_STRUCT: | |
143 | case TYPE_CODE_UNION: | |
144 | /* Structures with a single field are handled as the field | |
145 | itself. */ | |
146 | if (TYPE_NFIELDS (type) == 1) | |
99fe5f9d | 147 | return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0)); |
342ee437 MS |
148 | |
149 | /* Structures with word or double-word size are passed in memory, as | |
150 | long as they require at least word alignment. */ | |
151 | if (mn10300_type_align (type) >= 4) | |
152 | return 0; | |
153 | ||
154 | return 1; | |
155 | ||
156 | /* Arrays are addressable, so they're never returned in | |
157 | registers. This condition can only hold when the array is | |
158 | the only field of a struct or union. */ | |
159 | case TYPE_CODE_ARRAY: | |
160 | return 1; | |
161 | ||
162 | case TYPE_CODE_TYPEDEF: | |
99fe5f9d | 163 | return mn10300_use_struct_convention (check_typedef (type)); |
342ee437 MS |
164 | |
165 | default: | |
166 | return 0; | |
167 | } | |
168 | } | |
169 | ||
342ee437 | 170 | static void |
99fe5f9d | 171 | mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type, |
948f8e3d | 172 | struct regcache *regcache, const gdb_byte *valbuf) |
342ee437 | 173 | { |
342ee437 MS |
174 | int len = TYPE_LENGTH (type); |
175 | int reg, regsz; | |
176 | ||
177 | if (TYPE_CODE (type) == TYPE_CODE_PTR) | |
178 | reg = 4; | |
179 | else | |
180 | reg = 0; | |
181 | ||
182 | regsz = register_size (gdbarch, reg); | |
183 | ||
184 | if (len <= regsz) | |
185 | regcache_raw_write_part (regcache, reg, 0, len, valbuf); | |
186 | else if (len <= 2 * regsz) | |
187 | { | |
188 | regcache_raw_write (regcache, reg, valbuf); | |
189 | gdb_assert (regsz == register_size (gdbarch, reg + 1)); | |
190 | regcache_raw_write_part (regcache, reg+1, 0, | |
948f8e3d | 191 | len - regsz, valbuf + regsz); |
342ee437 MS |
192 | } |
193 | else | |
194 | internal_error (__FILE__, __LINE__, | |
195 | _("Cannot store return value %d bytes long."), len); | |
196 | } | |
197 | ||
342ee437 | 198 | static void |
99fe5f9d | 199 | mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type, |
342ee437 MS |
200 | struct regcache *regcache, void *valbuf) |
201 | { | |
b8b6e72f | 202 | gdb_byte buf[MN10300_MAX_REGISTER_SIZE]; |
342ee437 MS |
203 | int len = TYPE_LENGTH (type); |
204 | int reg, regsz; | |
205 | ||
206 | if (TYPE_CODE (type) == TYPE_CODE_PTR) | |
207 | reg = 4; | |
208 | else | |
209 | reg = 0; | |
210 | ||
211 | regsz = register_size (gdbarch, reg); | |
b8b6e72f | 212 | gdb_assert (regsz <= MN10300_MAX_REGISTER_SIZE); |
342ee437 MS |
213 | if (len <= regsz) |
214 | { | |
215 | regcache_raw_read (regcache, reg, buf); | |
216 | memcpy (valbuf, buf, len); | |
217 | } | |
218 | else if (len <= 2 * regsz) | |
219 | { | |
220 | regcache_raw_read (regcache, reg, buf); | |
221 | memcpy (valbuf, buf, regsz); | |
222 | gdb_assert (regsz == register_size (gdbarch, reg + 1)); | |
223 | regcache_raw_read (regcache, reg + 1, buf); | |
224 | memcpy ((char *) valbuf + regsz, buf, len - regsz); | |
225 | } | |
226 | else | |
227 | internal_error (__FILE__, __LINE__, | |
228 | _("Cannot extract return value %d bytes long."), len); | |
229 | } | |
230 | ||
99fe5f9d KB |
231 | /* Determine, for architecture GDBARCH, how a return value of TYPE |
232 | should be returned. If it is supposed to be returned in registers, | |
233 | and READBUF is non-zero, read the appropriate value from REGCACHE, | |
234 | and copy it into READBUF. If WRITEBUF is non-zero, write the value | |
235 | from WRITEBUF into REGCACHE. */ | |
236 | ||
237 | static enum return_value_convention | |
6a3a010b | 238 | mn10300_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 CV |
239 | struct type *type, struct regcache *regcache, |
240 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
99fe5f9d KB |
241 | { |
242 | if (mn10300_use_struct_convention (type)) | |
243 | return RETURN_VALUE_STRUCT_CONVENTION; | |
244 | ||
245 | if (readbuf) | |
246 | mn10300_extract_return_value (gdbarch, type, regcache, readbuf); | |
247 | if (writebuf) | |
248 | mn10300_store_return_value (gdbarch, type, regcache, writebuf); | |
249 | ||
250 | return RETURN_VALUE_REGISTER_CONVENTION; | |
251 | } | |
252 | ||
a121b7c1 PA |
253 | static const char * |
254 | register_name (int reg, const char **regs, long sizeof_regs) | |
342ee437 MS |
255 | { |
256 | if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0])) | |
257 | return NULL; | |
258 | else | |
259 | return regs[reg]; | |
260 | } | |
261 | ||
262 | static const char * | |
d93859e2 | 263 | mn10300_generic_register_name (struct gdbarch *gdbarch, int reg) |
342ee437 | 264 | { |
a121b7c1 | 265 | static const char *regs[] = |
342ee437 MS |
266 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", |
267 | "sp", "pc", "mdr", "psw", "lir", "lar", "", "", | |
268 | "", "", "", "", "", "", "", "", | |
269 | "", "", "", "", "", "", "", "fp" | |
270 | }; | |
271 | return register_name (reg, regs, sizeof regs); | |
272 | } | |
273 | ||
274 | ||
275 | static const char * | |
d93859e2 | 276 | am33_register_name (struct gdbarch *gdbarch, int reg) |
342ee437 | 277 | { |
a121b7c1 | 278 | static const char *regs[] = |
342ee437 MS |
279 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", |
280 | "sp", "pc", "mdr", "psw", "lir", "lar", "", | |
281 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
282 | "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", "" | |
283 | }; | |
284 | return register_name (reg, regs, sizeof regs); | |
285 | } | |
286 | ||
4640dd91 | 287 | static const char * |
d93859e2 | 288 | am33_2_register_name (struct gdbarch *gdbarch, int reg) |
4640dd91 | 289 | { |
a121b7c1 | 290 | static const char *regs[] = |
4640dd91 KB |
291 | { |
292 | "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
293 | "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0", | |
294 | "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp", | |
295 | "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "", | |
296 | "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", | |
297 | "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15", | |
298 | "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23", | |
299 | "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" | |
300 | }; | |
301 | return register_name (reg, regs, sizeof regs); | |
302 | } | |
342ee437 MS |
303 | |
304 | static struct type * | |
305 | mn10300_register_type (struct gdbarch *gdbarch, int reg) | |
306 | { | |
0dfff4cb | 307 | return builtin_type (gdbarch)->builtin_int; |
342ee437 MS |
308 | } |
309 | ||
310 | static CORE_ADDR | |
61a1198a | 311 | mn10300_read_pc (struct regcache *regcache) |
342ee437 | 312 | { |
61a1198a UW |
313 | ULONGEST val; |
314 | regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val); | |
315 | return val; | |
342ee437 MS |
316 | } |
317 | ||
318 | static void | |
61a1198a | 319 | mn10300_write_pc (struct regcache *regcache, CORE_ADDR val) |
342ee437 | 320 | { |
61a1198a | 321 | regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val); |
342ee437 MS |
322 | } |
323 | ||
324 | /* The breakpoint instruction must be the same size as the smallest | |
325 | instruction in the instruction set. | |
326 | ||
327 | The Matsushita mn10x00 processors have single byte instructions | |
328 | so we need a single byte breakpoint. Matsushita hasn't defined | |
329 | one, so we defined it ourselves. */ | |
04180708 | 330 | constexpr gdb_byte mn10300_break_insn[] = {0xff}; |
342ee437 | 331 | |
04180708 | 332 | typedef BP_MANIPULATION (mn10300_break_insn) mn10300_breakpoint; |
342ee437 | 333 | |
6c02c64c KB |
334 | /* Model the semantics of pushing a register onto the stack. This |
335 | is a helper function for mn10300_analyze_prologue, below. */ | |
336 | static void | |
337 | push_reg (pv_t *regs, struct pv_area *stack, int regnum) | |
338 | { | |
339 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4); | |
f7b7ed97 | 340 | stack->store (regs[E_SP_REGNUM], 4, regs[regnum]); |
6c02c64c KB |
341 | } |
342 | ||
343 | /* Translate an "r" register number extracted from an instruction encoding | |
344 | into a GDB register number. Adapted from a simulator function | |
345 | of the same name; see am33.igen. */ | |
346 | static int | |
347 | translate_rreg (int rreg) | |
348 | { | |
349 | /* The higher register numbers actually correspond to the | |
350 | basic machine's address and data registers. */ | |
351 | if (rreg > 7 && rreg < 12) | |
352 | return E_A0_REGNUM + rreg - 8; | |
353 | else if (rreg > 11 && rreg < 16) | |
354 | return E_D0_REGNUM + rreg - 12; | |
355 | else | |
356 | return E_E0_REGNUM + rreg; | |
357 | } | |
358 | ||
f7b7ed97 | 359 | /* Find saved registers in a 'struct pv_area'; we pass this to pv_area::scan. |
9cacebf5 | 360 | |
6c02c64c KB |
361 | If VALUE is a saved register, ADDR says it was saved at a constant |
362 | offset from the frame base, and SIZE indicates that the whole | |
363 | register was saved, record its offset in RESULT_UNTYPED. */ | |
9cacebf5 | 364 | static void |
6c02c64c | 365 | check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value) |
9cacebf5 | 366 | { |
6c02c64c | 367 | struct mn10300_prologue *result = (struct mn10300_prologue *) result_untyped; |
9cacebf5 | 368 | |
6c02c64c KB |
369 | if (value.kind == pvk_register |
370 | && value.k == 0 | |
371 | && pv_is_register (addr, E_SP_REGNUM) | |
d80b854b | 372 | && size == register_size (result->gdbarch, value.reg)) |
6c02c64c KB |
373 | result->reg_offset[value.reg] = addr.k; |
374 | } | |
9cacebf5 | 375 | |
6c02c64c KB |
376 | /* Analyze the prologue to determine where registers are saved, |
377 | the end of the prologue, etc. The result of this analysis is | |
378 | returned in RESULT. See struct mn10300_prologue above for more | |
379 | information. */ | |
380 | static void | |
381 | mn10300_analyze_prologue (struct gdbarch *gdbarch, | |
382 | CORE_ADDR start_pc, CORE_ADDR limit_pc, | |
383 | struct mn10300_prologue *result) | |
384 | { | |
e17a4113 | 385 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
22e048c9 | 386 | CORE_ADDR pc; |
6c02c64c KB |
387 | int rn; |
388 | pv_t regs[MN10300_MAX_NUM_REGS]; | |
6c02c64c KB |
389 | CORE_ADDR after_last_frame_setup_insn = start_pc; |
390 | int am33_mode = AM33_MODE (gdbarch); | |
391 | ||
392 | memset (result, 0, sizeof (*result)); | |
d80b854b | 393 | result->gdbarch = gdbarch; |
9cacebf5 | 394 | |
6c02c64c | 395 | for (rn = 0; rn < MN10300_MAX_NUM_REGS; rn++) |
4640dd91 | 396 | { |
6c02c64c KB |
397 | regs[rn] = pv_register (rn, 0); |
398 | result->reg_offset[rn] = 1; | |
4640dd91 | 399 | } |
f7b7ed97 | 400 | pv_area stack (E_SP_REGNUM, gdbarch_addr_bit (gdbarch)); |
6c02c64c | 401 | |
f7b7ed97 TT |
402 | /* The typical call instruction will have saved the return address on the |
403 | stack. Space for the return address has already been preallocated in | |
404 | the caller's frame. It's possible, such as when using -mrelax with gcc | |
405 | that other registers were saved as well. If this happens, we really | |
406 | have no chance of deciphering the frame. DWARF info can save the day | |
407 | when this happens. */ | |
408 | stack.store (regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]); | |
6c02c64c KB |
409 | |
410 | pc = start_pc; | |
411 | while (pc < limit_pc) | |
4640dd91 | 412 | { |
6c02c64c KB |
413 | int status; |
414 | gdb_byte instr[2]; | |
4640dd91 | 415 | |
6c02c64c KB |
416 | /* Instructions can be as small as one byte; however, we usually |
417 | need at least two bytes to do the decoding, so fetch that many | |
418 | to begin with. */ | |
419 | status = target_read_memory (pc, instr, 2); | |
420 | if (status != 0) | |
421 | break; | |
4640dd91 | 422 | |
6c02c64c KB |
423 | /* movm [regs], sp */ |
424 | if (instr[0] == 0xcf) | |
4640dd91 | 425 | { |
6c02c64c KB |
426 | gdb_byte save_mask; |
427 | ||
428 | save_mask = instr[1]; | |
429 | ||
430 | if ((save_mask & movm_exreg0_bit) && am33_mode) | |
431 | { | |
f7b7ed97 TT |
432 | push_reg (regs, &stack, E_E2_REGNUM); |
433 | push_reg (regs, &stack, E_E3_REGNUM); | |
6c02c64c KB |
434 | } |
435 | if ((save_mask & movm_exreg1_bit) && am33_mode) | |
4640dd91 | 436 | { |
f7b7ed97 TT |
437 | push_reg (regs, &stack, E_E4_REGNUM); |
438 | push_reg (regs, &stack, E_E5_REGNUM); | |
439 | push_reg (regs, &stack, E_E6_REGNUM); | |
440 | push_reg (regs, &stack, E_E7_REGNUM); | |
4640dd91 | 441 | } |
6c02c64c KB |
442 | if ((save_mask & movm_exother_bit) && am33_mode) |
443 | { | |
f7b7ed97 TT |
444 | push_reg (regs, &stack, E_E0_REGNUM); |
445 | push_reg (regs, &stack, E_E1_REGNUM); | |
446 | push_reg (regs, &stack, E_MDRQ_REGNUM); | |
447 | push_reg (regs, &stack, E_MCRH_REGNUM); | |
448 | push_reg (regs, &stack, E_MCRL_REGNUM); | |
449 | push_reg (regs, &stack, E_MCVF_REGNUM); | |
6c02c64c KB |
450 | } |
451 | if (save_mask & movm_d2_bit) | |
f7b7ed97 | 452 | push_reg (regs, &stack, E_D2_REGNUM); |
6c02c64c | 453 | if (save_mask & movm_d3_bit) |
f7b7ed97 | 454 | push_reg (regs, &stack, E_D3_REGNUM); |
6c02c64c | 455 | if (save_mask & movm_a2_bit) |
f7b7ed97 | 456 | push_reg (regs, &stack, E_A2_REGNUM); |
6c02c64c | 457 | if (save_mask & movm_a3_bit) |
f7b7ed97 | 458 | push_reg (regs, &stack, E_A3_REGNUM); |
6c02c64c KB |
459 | if (save_mask & movm_other_bit) |
460 | { | |
f7b7ed97 TT |
461 | push_reg (regs, &stack, E_D0_REGNUM); |
462 | push_reg (regs, &stack, E_D1_REGNUM); | |
463 | push_reg (regs, &stack, E_A0_REGNUM); | |
464 | push_reg (regs, &stack, E_A1_REGNUM); | |
465 | push_reg (regs, &stack, E_MDR_REGNUM); | |
466 | push_reg (regs, &stack, E_LIR_REGNUM); | |
467 | push_reg (regs, &stack, E_LAR_REGNUM); | |
6c02c64c KB |
468 | /* The `other' bit leaves a blank area of four bytes at |
469 | the beginning of its block of saved registers, making | |
470 | it 32 bytes long in total. */ | |
471 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4); | |
472 | } | |
473 | ||
474 | pc += 2; | |
475 | after_last_frame_setup_insn = pc; | |
4640dd91 | 476 | } |
6c02c64c KB |
477 | /* mov sp, aN */ |
478 | else if ((instr[0] & 0xfc) == 0x3c) | |
479 | { | |
480 | int aN = instr[0] & 0x03; | |
4640dd91 | 481 | |
6c02c64c | 482 | regs[E_A0_REGNUM + aN] = regs[E_SP_REGNUM]; |
4640dd91 | 483 | |
6c02c64c KB |
484 | pc += 1; |
485 | if (aN == 3) | |
486 | after_last_frame_setup_insn = pc; | |
487 | } | |
488 | /* mov aM, aN */ | |
489 | else if ((instr[0] & 0xf0) == 0x90 | |
490 | && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2)) | |
491 | { | |
492 | int aN = instr[0] & 0x03; | |
493 | int aM = (instr[0] & 0x0c) >> 2; | |
9cacebf5 | 494 | |
6c02c64c | 495 | regs[E_A0_REGNUM + aN] = regs[E_A0_REGNUM + aM]; |
9cacebf5 | 496 | |
6c02c64c KB |
497 | pc += 1; |
498 | } | |
499 | /* mov dM, dN */ | |
500 | else if ((instr[0] & 0xf0) == 0x80 | |
501 | && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2)) | |
502 | { | |
503 | int dN = instr[0] & 0x03; | |
504 | int dM = (instr[0] & 0x0c) >> 2; | |
9cacebf5 | 505 | |
6c02c64c | 506 | regs[E_D0_REGNUM + dN] = regs[E_D0_REGNUM + dM]; |
9cacebf5 | 507 | |
6c02c64c KB |
508 | pc += 1; |
509 | } | |
510 | /* mov aM, dN */ | |
511 | else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xd0) | |
512 | { | |
513 | int dN = instr[1] & 0x03; | |
514 | int aM = (instr[1] & 0x0c) >> 2; | |
9cacebf5 | 515 | |
6c02c64c | 516 | regs[E_D0_REGNUM + dN] = regs[E_A0_REGNUM + aM]; |
9cacebf5 | 517 | |
6c02c64c KB |
518 | pc += 2; |
519 | } | |
520 | /* mov dM, aN */ | |
521 | else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xe0) | |
522 | { | |
523 | int aN = instr[1] & 0x03; | |
524 | int dM = (instr[1] & 0x0c) >> 2; | |
9cacebf5 | 525 | |
6c02c64c | 526 | regs[E_A0_REGNUM + aN] = regs[E_D0_REGNUM + dM]; |
9cacebf5 | 527 | |
6c02c64c KB |
528 | pc += 2; |
529 | } | |
530 | /* add imm8, SP */ | |
531 | else if (instr[0] == 0xf8 && instr[1] == 0xfe) | |
532 | { | |
533 | gdb_byte buf[1]; | |
534 | LONGEST imm8; | |
9cacebf5 | 535 | |
9cacebf5 | 536 | |
6c02c64c KB |
537 | status = target_read_memory (pc + 2, buf, 1); |
538 | if (status != 0) | |
539 | break; | |
9cacebf5 | 540 | |
e17a4113 | 541 | imm8 = extract_signed_integer (buf, 1, byte_order); |
6c02c64c | 542 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm8); |
9cacebf5 | 543 | |
6c02c64c KB |
544 | pc += 3; |
545 | /* Stack pointer adjustments are frame related. */ | |
546 | after_last_frame_setup_insn = pc; | |
547 | } | |
548 | /* add imm16, SP */ | |
549 | else if (instr[0] == 0xfa && instr[1] == 0xfe) | |
550 | { | |
551 | gdb_byte buf[2]; | |
552 | LONGEST imm16; | |
9cacebf5 | 553 | |
6c02c64c KB |
554 | status = target_read_memory (pc + 2, buf, 2); |
555 | if (status != 0) | |
556 | break; | |
9cacebf5 | 557 | |
e17a4113 | 558 | imm16 = extract_signed_integer (buf, 2, byte_order); |
6c02c64c | 559 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm16); |
9cacebf5 | 560 | |
6c02c64c KB |
561 | pc += 4; |
562 | /* Stack pointer adjustments are frame related. */ | |
563 | after_last_frame_setup_insn = pc; | |
564 | } | |
565 | /* add imm32, SP */ | |
566 | else if (instr[0] == 0xfc && instr[1] == 0xfe) | |
567 | { | |
568 | gdb_byte buf[4]; | |
569 | LONGEST imm32; | |
9cacebf5 | 570 | |
6c02c64c KB |
571 | status = target_read_memory (pc + 2, buf, 4); |
572 | if (status != 0) | |
573 | break; | |
9cacebf5 | 574 | |
9cacebf5 | 575 | |
e17a4113 | 576 | imm32 = extract_signed_integer (buf, 4, byte_order); |
6c02c64c | 577 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm32); |
9cacebf5 | 578 | |
6c02c64c KB |
579 | pc += 6; |
580 | /* Stack pointer adjustments are frame related. */ | |
581 | after_last_frame_setup_insn = pc; | |
582 | } | |
583 | /* add imm8, aN */ | |
584 | else if ((instr[0] & 0xfc) == 0x20) | |
585 | { | |
586 | int aN; | |
587 | LONGEST imm8; | |
9cacebf5 | 588 | |
6c02c64c | 589 | aN = instr[0] & 0x03; |
e17a4113 | 590 | imm8 = extract_signed_integer (&instr[1], 1, byte_order); |
9cacebf5 | 591 | |
6c02c64c KB |
592 | regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], |
593 | imm8); | |
9cacebf5 | 594 | |
6c02c64c KB |
595 | pc += 2; |
596 | } | |
597 | /* add imm16, aN */ | |
598 | else if (instr[0] == 0xfa && (instr[1] & 0xfc) == 0xd0) | |
599 | { | |
600 | int aN; | |
601 | LONGEST imm16; | |
602 | gdb_byte buf[2]; | |
9cacebf5 | 603 | |
6c02c64c | 604 | aN = instr[1] & 0x03; |
9cacebf5 | 605 | |
6c02c64c KB |
606 | status = target_read_memory (pc + 2, buf, 2); |
607 | if (status != 0) | |
608 | break; | |
9cacebf5 | 609 | |
9cacebf5 | 610 | |
e17a4113 | 611 | imm16 = extract_signed_integer (buf, 2, byte_order); |
9cacebf5 | 612 | |
6c02c64c KB |
613 | regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], |
614 | imm16); | |
9cacebf5 | 615 | |
6c02c64c KB |
616 | pc += 4; |
617 | } | |
618 | /* add imm32, aN */ | |
619 | else if (instr[0] == 0xfc && (instr[1] & 0xfc) == 0xd0) | |
620 | { | |
621 | int aN; | |
622 | LONGEST imm32; | |
623 | gdb_byte buf[4]; | |
9cacebf5 | 624 | |
6c02c64c | 625 | aN = instr[1] & 0x03; |
9cacebf5 | 626 | |
6c02c64c KB |
627 | status = target_read_memory (pc + 2, buf, 4); |
628 | if (status != 0) | |
629 | break; | |
9cacebf5 | 630 | |
e17a4113 | 631 | imm32 = extract_signed_integer (buf, 2, byte_order); |
9cacebf5 | 632 | |
6c02c64c KB |
633 | regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], |
634 | imm32); | |
635 | pc += 6; | |
636 | } | |
637 | /* fmov fsM, (rN) */ | |
638 | else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x30) | |
639 | { | |
640 | int fsM, sM, Y, rN; | |
641 | gdb_byte buf[1]; | |
9cacebf5 | 642 | |
6c02c64c | 643 | Y = (instr[1] & 0x02) >> 1; |
9cacebf5 | 644 | |
6c02c64c KB |
645 | status = target_read_memory (pc + 2, buf, 1); |
646 | if (status != 0) | |
647 | break; | |
9cacebf5 | 648 | |
6c02c64c KB |
649 | sM = (buf[0] & 0xf0) >> 4; |
650 | rN = buf[0] & 0x0f; | |
651 | fsM = (Y << 4) | sM; | |
9cacebf5 | 652 | |
f7b7ed97 TT |
653 | stack.store (regs[translate_rreg (rN)], 4, |
654 | regs[E_FS0_REGNUM + fsM]); | |
9cacebf5 | 655 | |
6c02c64c KB |
656 | pc += 3; |
657 | } | |
658 | /* fmov fsM, (sp) */ | |
659 | else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x34) | |
660 | { | |
661 | int fsM, sM, Y; | |
662 | gdb_byte buf[1]; | |
9cacebf5 | 663 | |
6c02c64c | 664 | Y = (instr[1] & 0x02) >> 1; |
9cacebf5 | 665 | |
6c02c64c KB |
666 | status = target_read_memory (pc + 2, buf, 1); |
667 | if (status != 0) | |
668 | break; | |
9cacebf5 | 669 | |
6c02c64c KB |
670 | sM = (buf[0] & 0xf0) >> 4; |
671 | fsM = (Y << 4) | sM; | |
9cacebf5 | 672 | |
f7b7ed97 TT |
673 | stack.store (regs[E_SP_REGNUM], 4, |
674 | regs[E_FS0_REGNUM + fsM]); | |
9cacebf5 | 675 | |
6c02c64c KB |
676 | pc += 3; |
677 | } | |
678 | /* fmov fsM, (rN, rI) */ | |
679 | else if (instr[0] == 0xfb && instr[1] == 0x37) | |
680 | { | |
681 | int fsM, sM, Z, rN, rI; | |
682 | gdb_byte buf[2]; | |
9cacebf5 | 683 | |
9cacebf5 | 684 | |
6c02c64c KB |
685 | status = target_read_memory (pc + 2, buf, 2); |
686 | if (status != 0) | |
687 | break; | |
83845630 | 688 | |
6c02c64c KB |
689 | rI = (buf[0] & 0xf0) >> 4; |
690 | rN = buf[0] & 0x0f; | |
691 | sM = (buf[1] & 0xf0) >> 4; | |
692 | Z = (buf[1] & 0x02) >> 1; | |
693 | fsM = (Z << 4) | sM; | |
83845630 | 694 | |
f7b7ed97 TT |
695 | stack.store (pv_add (regs[translate_rreg (rN)], |
696 | regs[translate_rreg (rI)]), | |
697 | 4, regs[E_FS0_REGNUM + fsM]); | |
83845630 | 698 | |
6c02c64c KB |
699 | pc += 4; |
700 | } | |
701 | /* fmov fsM, (d8, rN) */ | |
702 | else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x30) | |
4640dd91 | 703 | { |
6c02c64c KB |
704 | int fsM, sM, Y, rN; |
705 | LONGEST d8; | |
706 | gdb_byte buf[2]; | |
707 | ||
708 | Y = (instr[1] & 0x02) >> 1; | |
709 | ||
710 | status = target_read_memory (pc + 2, buf, 2); | |
711 | if (status != 0) | |
712 | break; | |
713 | ||
714 | sM = (buf[0] & 0xf0) >> 4; | |
715 | rN = buf[0] & 0x0f; | |
716 | fsM = (Y << 4) | sM; | |
e17a4113 | 717 | d8 = extract_signed_integer (&buf[1], 1, byte_order); |
6c02c64c | 718 | |
f7b7ed97 TT |
719 | stack.store (pv_add_constant (regs[translate_rreg (rN)], d8), |
720 | 4, regs[E_FS0_REGNUM + fsM]); | |
6c02c64c KB |
721 | |
722 | pc += 4; | |
4640dd91 | 723 | } |
6c02c64c KB |
724 | /* fmov fsM, (d24, rN) */ |
725 | else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x30) | |
83845630 | 726 | { |
6c02c64c KB |
727 | int fsM, sM, Y, rN; |
728 | LONGEST d24; | |
729 | gdb_byte buf[4]; | |
730 | ||
731 | Y = (instr[1] & 0x02) >> 1; | |
732 | ||
733 | status = target_read_memory (pc + 2, buf, 4); | |
83845630 | 734 | if (status != 0) |
6c02c64c KB |
735 | break; |
736 | ||
737 | sM = (buf[0] & 0xf0) >> 4; | |
738 | rN = buf[0] & 0x0f; | |
739 | fsM = (Y << 4) | sM; | |
e17a4113 | 740 | d24 = extract_signed_integer (&buf[1], 3, byte_order); |
6c02c64c | 741 | |
f7b7ed97 TT |
742 | stack.store (pv_add_constant (regs[translate_rreg (rN)], d24), |
743 | 4, regs[E_FS0_REGNUM + fsM]); | |
6c02c64c KB |
744 | |
745 | pc += 6; | |
83845630 | 746 | } |
6c02c64c KB |
747 | /* fmov fsM, (d32, rN) */ |
748 | else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x30) | |
749 | { | |
750 | int fsM, sM, Y, rN; | |
751 | LONGEST d32; | |
752 | gdb_byte buf[5]; | |
4640dd91 | 753 | |
6c02c64c KB |
754 | Y = (instr[1] & 0x02) >> 1; |
755 | ||
756 | status = target_read_memory (pc + 2, buf, 5); | |
757 | if (status != 0) | |
758 | break; | |
759 | ||
760 | sM = (buf[0] & 0xf0) >> 4; | |
761 | rN = buf[0] & 0x0f; | |
762 | fsM = (Y << 4) | sM; | |
e17a4113 | 763 | d32 = extract_signed_integer (&buf[1], 4, byte_order); |
9cacebf5 | 764 | |
f7b7ed97 TT |
765 | stack.store (pv_add_constant (regs[translate_rreg (rN)], d32), |
766 | 4, regs[E_FS0_REGNUM + fsM]); | |
6c02c64c KB |
767 | |
768 | pc += 7; | |
769 | } | |
770 | /* fmov fsM, (d8, SP) */ | |
771 | else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x34) | |
9cacebf5 | 772 | { |
6c02c64c KB |
773 | int fsM, sM, Y; |
774 | LONGEST d8; | |
775 | gdb_byte buf[2]; | |
776 | ||
777 | Y = (instr[1] & 0x02) >> 1; | |
778 | ||
779 | status = target_read_memory (pc + 2, buf, 2); | |
780 | if (status != 0) | |
781 | break; | |
782 | ||
783 | sM = (buf[0] & 0xf0) >> 4; | |
784 | fsM = (Y << 4) | sM; | |
e17a4113 | 785 | d8 = extract_signed_integer (&buf[1], 1, byte_order); |
6c02c64c | 786 | |
f7b7ed97 TT |
787 | stack.store (pv_add_constant (regs[E_SP_REGNUM], d8), |
788 | 4, regs[E_FS0_REGNUM + fsM]); | |
6c02c64c KB |
789 | |
790 | pc += 4; | |
9cacebf5 | 791 | } |
6c02c64c KB |
792 | /* fmov fsM, (d24, SP) */ |
793 | else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x34) | |
794 | { | |
795 | int fsM, sM, Y; | |
796 | LONGEST d24; | |
797 | gdb_byte buf[4]; | |
9cacebf5 | 798 | |
6c02c64c | 799 | Y = (instr[1] & 0x02) >> 1; |
9cacebf5 | 800 | |
6c02c64c KB |
801 | status = target_read_memory (pc + 2, buf, 4); |
802 | if (status != 0) | |
803 | break; | |
9cacebf5 | 804 | |
6c02c64c KB |
805 | sM = (buf[0] & 0xf0) >> 4; |
806 | fsM = (Y << 4) | sM; | |
e17a4113 | 807 | d24 = extract_signed_integer (&buf[1], 3, byte_order); |
9cacebf5 | 808 | |
f7b7ed97 TT |
809 | stack.store (pv_add_constant (regs[E_SP_REGNUM], d24), |
810 | 4, regs[E_FS0_REGNUM + fsM]); | |
9cacebf5 | 811 | |
6c02c64c KB |
812 | pc += 6; |
813 | } | |
814 | /* fmov fsM, (d32, SP) */ | |
815 | else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x34) | |
816 | { | |
817 | int fsM, sM, Y; | |
818 | LONGEST d32; | |
819 | gdb_byte buf[5]; | |
9cacebf5 | 820 | |
6c02c64c | 821 | Y = (instr[1] & 0x02) >> 1; |
9cacebf5 | 822 | |
6c02c64c KB |
823 | status = target_read_memory (pc + 2, buf, 5); |
824 | if (status != 0) | |
825 | break; | |
826 | ||
827 | sM = (buf[0] & 0xf0) >> 4; | |
828 | fsM = (Y << 4) | sM; | |
e17a4113 | 829 | d32 = extract_signed_integer (&buf[1], 4, byte_order); |
6c02c64c | 830 | |
f7b7ed97 TT |
831 | stack.store (pv_add_constant (regs[E_SP_REGNUM], d32), |
832 | 4, regs[E_FS0_REGNUM + fsM]); | |
6c02c64c KB |
833 | |
834 | pc += 7; | |
835 | } | |
836 | /* fmov fsM, (rN+) */ | |
837 | else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x31) | |
838 | { | |
839 | int fsM, sM, Y, rN, rN_regnum; | |
840 | gdb_byte buf[1]; | |
841 | ||
842 | Y = (instr[1] & 0x02) >> 1; | |
843 | ||
844 | status = target_read_memory (pc + 2, buf, 1); | |
845 | if (status != 0) | |
846 | break; | |
847 | ||
848 | sM = (buf[0] & 0xf0) >> 4; | |
849 | rN = buf[0] & 0x0f; | |
850 | fsM = (Y << 4) | sM; | |
851 | ||
852 | rN_regnum = translate_rreg (rN); | |
853 | ||
f7b7ed97 TT |
854 | stack.store (regs[rN_regnum], 4, |
855 | regs[E_FS0_REGNUM + fsM]); | |
6c02c64c KB |
856 | regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4); |
857 | ||
858 | pc += 3; | |
859 | } | |
860 | /* fmov fsM, (rN+, imm8) */ | |
861 | else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x31) | |
862 | { | |
863 | int fsM, sM, Y, rN, rN_regnum; | |
864 | LONGEST imm8; | |
865 | gdb_byte buf[2]; | |
866 | ||
867 | Y = (instr[1] & 0x02) >> 1; | |
868 | ||
869 | status = target_read_memory (pc + 2, buf, 2); | |
870 | if (status != 0) | |
871 | break; | |
872 | ||
873 | sM = (buf[0] & 0xf0) >> 4; | |
874 | rN = buf[0] & 0x0f; | |
875 | fsM = (Y << 4) | sM; | |
e17a4113 | 876 | imm8 = extract_signed_integer (&buf[1], 1, byte_order); |
6c02c64c KB |
877 | |
878 | rN_regnum = translate_rreg (rN); | |
879 | ||
f7b7ed97 | 880 | stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); |
6c02c64c KB |
881 | regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8); |
882 | ||
883 | pc += 4; | |
884 | } | |
885 | /* fmov fsM, (rN+, imm24) */ | |
886 | else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x31) | |
887 | { | |
888 | int fsM, sM, Y, rN, rN_regnum; | |
889 | LONGEST imm24; | |
890 | gdb_byte buf[4]; | |
891 | ||
892 | Y = (instr[1] & 0x02) >> 1; | |
893 | ||
894 | status = target_read_memory (pc + 2, buf, 4); | |
895 | if (status != 0) | |
896 | break; | |
897 | ||
898 | sM = (buf[0] & 0xf0) >> 4; | |
899 | rN = buf[0] & 0x0f; | |
900 | fsM = (Y << 4) | sM; | |
e17a4113 | 901 | imm24 = extract_signed_integer (&buf[1], 3, byte_order); |
6c02c64c KB |
902 | |
903 | rN_regnum = translate_rreg (rN); | |
904 | ||
f7b7ed97 | 905 | stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); |
6c02c64c KB |
906 | regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24); |
907 | ||
908 | pc += 6; | |
909 | } | |
910 | /* fmov fsM, (rN+, imm32) */ | |
911 | else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x31) | |
912 | { | |
913 | int fsM, sM, Y, rN, rN_regnum; | |
914 | LONGEST imm32; | |
915 | gdb_byte buf[5]; | |
916 | ||
917 | Y = (instr[1] & 0x02) >> 1; | |
918 | ||
919 | status = target_read_memory (pc + 2, buf, 5); | |
920 | if (status != 0) | |
921 | break; | |
922 | ||
923 | sM = (buf[0] & 0xf0) >> 4; | |
924 | rN = buf[0] & 0x0f; | |
925 | fsM = (Y << 4) | sM; | |
e17a4113 | 926 | imm32 = extract_signed_integer (&buf[1], 4, byte_order); |
6c02c64c KB |
927 | |
928 | rN_regnum = translate_rreg (rN); | |
929 | ||
f7b7ed97 | 930 | stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); |
6c02c64c KB |
931 | regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32); |
932 | ||
933 | pc += 7; | |
934 | } | |
935 | /* mov imm8, aN */ | |
936 | else if ((instr[0] & 0xf0) == 0x90) | |
937 | { | |
938 | int aN = instr[0] & 0x03; | |
939 | LONGEST imm8; | |
9cacebf5 | 940 | |
e17a4113 | 941 | imm8 = extract_signed_integer (&instr[1], 1, byte_order); |
9cacebf5 | 942 | |
6c02c64c KB |
943 | regs[E_A0_REGNUM + aN] = pv_constant (imm8); |
944 | pc += 2; | |
945 | } | |
946 | /* mov imm16, aN */ | |
947 | else if ((instr[0] & 0xfc) == 0x24) | |
948 | { | |
949 | int aN = instr[0] & 0x03; | |
950 | gdb_byte buf[2]; | |
951 | LONGEST imm16; | |
952 | ||
953 | status = target_read_memory (pc + 1, buf, 2); | |
954 | if (status != 0) | |
955 | break; | |
956 | ||
e17a4113 | 957 | imm16 = extract_signed_integer (buf, 2, byte_order); |
6c02c64c KB |
958 | regs[E_A0_REGNUM + aN] = pv_constant (imm16); |
959 | pc += 3; | |
960 | } | |
961 | /* mov imm32, aN */ | |
962 | else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xdc)) | |
963 | { | |
964 | int aN = instr[1] & 0x03; | |
965 | gdb_byte buf[4]; | |
966 | LONGEST imm32; | |
967 | ||
968 | status = target_read_memory (pc + 2, buf, 4); | |
969 | if (status != 0) | |
970 | break; | |
971 | ||
e17a4113 | 972 | imm32 = extract_signed_integer (buf, 4, byte_order); |
6c02c64c KB |
973 | regs[E_A0_REGNUM + aN] = pv_constant (imm32); |
974 | pc += 6; | |
975 | } | |
976 | /* mov imm8, dN */ | |
977 | else if ((instr[0] & 0xf0) == 0x80) | |
978 | { | |
979 | int dN = instr[0] & 0x03; | |
980 | LONGEST imm8; | |
981 | ||
e17a4113 | 982 | imm8 = extract_signed_integer (&instr[1], 1, byte_order); |
6c02c64c KB |
983 | |
984 | regs[E_D0_REGNUM + dN] = pv_constant (imm8); | |
985 | pc += 2; | |
986 | } | |
987 | /* mov imm16, dN */ | |
988 | else if ((instr[0] & 0xfc) == 0x2c) | |
989 | { | |
990 | int dN = instr[0] & 0x03; | |
991 | gdb_byte buf[2]; | |
992 | LONGEST imm16; | |
993 | ||
994 | status = target_read_memory (pc + 1, buf, 2); | |
995 | if (status != 0) | |
996 | break; | |
997 | ||
e17a4113 | 998 | imm16 = extract_signed_integer (buf, 2, byte_order); |
6c02c64c KB |
999 | regs[E_D0_REGNUM + dN] = pv_constant (imm16); |
1000 | pc += 3; | |
1001 | } | |
1002 | /* mov imm32, dN */ | |
1003 | else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xcc)) | |
1004 | { | |
1005 | int dN = instr[1] & 0x03; | |
1006 | gdb_byte buf[4]; | |
1007 | LONGEST imm32; | |
1008 | ||
1009 | status = target_read_memory (pc + 2, buf, 4); | |
1010 | if (status != 0) | |
1011 | break; | |
1012 | ||
e17a4113 | 1013 | imm32 = extract_signed_integer (buf, 4, byte_order); |
6c02c64c KB |
1014 | regs[E_D0_REGNUM + dN] = pv_constant (imm32); |
1015 | pc += 6; | |
1016 | } | |
1017 | else | |
1018 | { | |
1019 | /* We've hit some instruction that we don't recognize. Hopefully, | |
1020 | we have enough to do prologue analysis. */ | |
1021 | break; | |
1022 | } | |
1023 | } | |
1024 | ||
1025 | /* Is the frame size (offset, really) a known constant? */ | |
1026 | if (pv_is_register (regs[E_SP_REGNUM], E_SP_REGNUM)) | |
1027 | result->frame_size = regs[E_SP_REGNUM].k; | |
9cacebf5 | 1028 | |
6c02c64c KB |
1029 | /* Was the frame pointer initialized? */ |
1030 | if (pv_is_register (regs[E_A3_REGNUM], E_SP_REGNUM)) | |
1031 | { | |
1032 | result->has_frame_ptr = 1; | |
1033 | result->frame_ptr_offset = regs[E_A3_REGNUM].k; | |
9cacebf5 | 1034 | } |
6c02c64c KB |
1035 | |
1036 | /* Record where all the registers were saved. */ | |
f7b7ed97 | 1037 | stack.scan (check_for_saved, (void *) result); |
6c02c64c KB |
1038 | |
1039 | result->prologue_end = after_last_frame_setup_insn; | |
9cacebf5 MS |
1040 | } |
1041 | ||
342ee437 MS |
1042 | /* Function: skip_prologue |
1043 | Return the address of the first inst past the prologue of the function. */ | |
1044 | ||
1045 | static CORE_ADDR | |
6093d2eb | 1046 | mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
342ee437 | 1047 | { |
2c02bd72 | 1048 | const char *name; |
6c02c64c KB |
1049 | CORE_ADDR func_addr, func_end; |
1050 | struct mn10300_prologue p; | |
1051 | ||
1052 | /* Try to find the extent of the function that contains PC. */ | |
1053 | if (!find_pc_partial_function (pc, &name, &func_addr, &func_end)) | |
1054 | return pc; | |
1055 | ||
1056 | mn10300_analyze_prologue (gdbarch, pc, func_end, &p); | |
1057 | return p.prologue_end; | |
342ee437 MS |
1058 | } |
1059 | ||
6c02c64c KB |
1060 | /* Wrapper for mn10300_analyze_prologue: find the function start; |
1061 | use the current frame PC as the limit, then | |
1062 | invoke mn10300_analyze_prologue and return its result. */ | |
1063 | static struct mn10300_prologue * | |
1064 | mn10300_analyze_frame_prologue (struct frame_info *this_frame, | |
1065 | void **this_prologue_cache) | |
342ee437 | 1066 | { |
6c02c64c | 1067 | if (!*this_prologue_cache) |
93d42b30 | 1068 | { |
6c02c64c KB |
1069 | CORE_ADDR func_start, stop_addr; |
1070 | ||
1071 | *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct mn10300_prologue); | |
1072 | ||
1073 | func_start = get_frame_func (this_frame); | |
1074 | stop_addr = get_frame_pc (this_frame); | |
1075 | ||
1076 | /* If we couldn't find any function containing the PC, then | |
1077 | just initialize the prologue cache, but don't do anything. */ | |
1078 | if (!func_start) | |
1079 | stop_addr = func_start; | |
1080 | ||
1081 | mn10300_analyze_prologue (get_frame_arch (this_frame), | |
19ba03f4 SM |
1082 | func_start, stop_addr, |
1083 | ((struct mn10300_prologue *) | |
1084 | *this_prologue_cache)); | |
93d42b30 | 1085 | } |
342ee437 | 1086 | |
19ba03f4 | 1087 | return (struct mn10300_prologue *) *this_prologue_cache; |
6c02c64c KB |
1088 | } |
1089 | ||
1090 | /* Given the next frame and a prologue cache, return this frame's | |
1091 | base. */ | |
1092 | static CORE_ADDR | |
1093 | mn10300_frame_base (struct frame_info *this_frame, void **this_prologue_cache) | |
1094 | { | |
1095 | struct mn10300_prologue *p | |
1096 | = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache); | |
1097 | ||
1098 | /* In functions that use alloca, the distance between the stack | |
1099 | pointer and the frame base varies dynamically, so we can't use | |
1100 | the SP plus static information like prologue analysis to find the | |
1101 | frame base. However, such functions must have a frame pointer, | |
1102 | to be able to restore the SP on exit. So whenever we do have a | |
1103 | frame pointer, use that to find the base. */ | |
1104 | if (p->has_frame_ptr) | |
1105 | { | |
1106 | CORE_ADDR fp = get_frame_register_unsigned (this_frame, E_A3_REGNUM); | |
1107 | return fp - p->frame_ptr_offset; | |
1108 | } | |
1109 | else | |
1110 | { | |
1111 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); | |
1112 | return sp - p->frame_size; | |
1113 | } | |
342ee437 MS |
1114 | } |
1115 | ||
1116 | /* Here is a dummy implementation. */ | |
1117 | static struct frame_id | |
94afd7a6 | 1118 | mn10300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
342ee437 | 1119 | { |
94afd7a6 UW |
1120 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); |
1121 | CORE_ADDR pc = get_frame_register_unsigned (this_frame, E_PC_REGNUM); | |
1122 | return frame_id_build (sp, pc); | |
342ee437 MS |
1123 | } |
1124 | ||
342ee437 | 1125 | static void |
94afd7a6 | 1126 | mn10300_frame_this_id (struct frame_info *this_frame, |
342ee437 MS |
1127 | void **this_prologue_cache, |
1128 | struct frame_id *this_id) | |
1129 | { | |
025bb325 MS |
1130 | *this_id = frame_id_build (mn10300_frame_base (this_frame, |
1131 | this_prologue_cache), | |
6c02c64c | 1132 | get_frame_func (this_frame)); |
342ee437 | 1133 | |
342ee437 MS |
1134 | } |
1135 | ||
94afd7a6 UW |
1136 | static struct value * |
1137 | mn10300_frame_prev_register (struct frame_info *this_frame, | |
6c02c64c | 1138 | void **this_prologue_cache, int regnum) |
342ee437 | 1139 | { |
6c02c64c KB |
1140 | struct mn10300_prologue *p |
1141 | = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache); | |
1142 | CORE_ADDR frame_base = mn10300_frame_base (this_frame, this_prologue_cache); | |
6c02c64c KB |
1143 | |
1144 | if (regnum == E_SP_REGNUM) | |
1145 | return frame_unwind_got_constant (this_frame, regnum, frame_base); | |
1146 | ||
1147 | /* If prologue analysis says we saved this register somewhere, | |
1148 | return a description of the stack slot holding it. */ | |
1149 | if (p->reg_offset[regnum] != 1) | |
1150 | return frame_unwind_got_memory (this_frame, regnum, | |
1151 | frame_base + p->reg_offset[regnum]); | |
1152 | ||
1153 | /* Otherwise, presume we haven't changed the value of this | |
1154 | register, and get it from the next frame. */ | |
1155 | return frame_unwind_got_register (this_frame, regnum, regnum); | |
342ee437 MS |
1156 | } |
1157 | ||
1158 | static const struct frame_unwind mn10300_frame_unwind = { | |
1159 | NORMAL_FRAME, | |
8fbca658 | 1160 | default_frame_unwind_stop_reason, |
342ee437 | 1161 | mn10300_frame_this_id, |
94afd7a6 UW |
1162 | mn10300_frame_prev_register, |
1163 | NULL, | |
1164 | default_frame_sniffer | |
342ee437 MS |
1165 | }; |
1166 | ||
1167 | static CORE_ADDR | |
6c02c64c | 1168 | mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame) |
342ee437 MS |
1169 | { |
1170 | ULONGEST pc; | |
1171 | ||
6c02c64c | 1172 | pc = frame_unwind_register_unsigned (this_frame, E_PC_REGNUM); |
342ee437 MS |
1173 | return pc; |
1174 | } | |
1175 | ||
1176 | static CORE_ADDR | |
6c02c64c | 1177 | mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame) |
342ee437 MS |
1178 | { |
1179 | ULONGEST sp; | |
1180 | ||
6c02c64c | 1181 | sp = frame_unwind_register_unsigned (this_frame, E_SP_REGNUM); |
342ee437 MS |
1182 | return sp; |
1183 | } | |
1184 | ||
1185 | static void | |
1186 | mn10300_frame_unwind_init (struct gdbarch *gdbarch) | |
1187 | { | |
94afd7a6 UW |
1188 | dwarf2_append_unwinders (gdbarch); |
1189 | frame_unwind_append_unwinder (gdbarch, &mn10300_frame_unwind); | |
94afd7a6 | 1190 | set_gdbarch_dummy_id (gdbarch, mn10300_dummy_id); |
342ee437 MS |
1191 | set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc); |
1192 | set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp); | |
1193 | } | |
1194 | ||
1195 | /* Function: push_dummy_call | |
1196 | * | |
1197 | * Set up machine state for a target call, including | |
1198 | * function arguments, stack, return address, etc. | |
1199 | * | |
1200 | */ | |
1201 | ||
1202 | static CORE_ADDR | |
1203 | mn10300_push_dummy_call (struct gdbarch *gdbarch, | |
1204 | struct value *target_func, | |
1205 | struct regcache *regcache, | |
1206 | CORE_ADDR bp_addr, | |
1207 | int nargs, struct value **args, | |
1208 | CORE_ADDR sp, | |
1209 | int struct_return, | |
1210 | CORE_ADDR struct_addr) | |
1211 | { | |
e17a4113 | 1212 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
342ee437 | 1213 | const int push_size = register_size (gdbarch, E_PC_REGNUM); |
1fb1ca27 | 1214 | int regs_used; |
342ee437 MS |
1215 | int len, arg_len; |
1216 | int stack_offset = 0; | |
1217 | int argnum; | |
948f8e3d | 1218 | const gdb_byte *val; |
b8b6e72f | 1219 | gdb_byte valbuf[MN10300_MAX_REGISTER_SIZE]; |
342ee437 | 1220 | |
342ee437 MS |
1221 | /* This should be a nop, but align the stack just in case something |
1222 | went wrong. Stacks are four byte aligned on the mn10300. */ | |
1223 | sp &= ~3; | |
1224 | ||
1225 | /* Now make space on the stack for the args. | |
1226 | ||
1227 | XXX This doesn't appear to handle pass-by-invisible reference | |
1228 | arguments. */ | |
1fb1ca27 | 1229 | regs_used = struct_return ? 1 : 0; |
342ee437 MS |
1230 | for (len = 0, argnum = 0; argnum < nargs; argnum++) |
1231 | { | |
1232 | arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3; | |
342ee437 MS |
1233 | while (regs_used < 2 && arg_len > 0) |
1234 | { | |
1235 | regs_used++; | |
1236 | arg_len -= push_size; | |
1237 | } | |
1238 | len += arg_len; | |
1239 | } | |
1240 | ||
1241 | /* Allocate stack space. */ | |
1242 | sp -= len; | |
1243 | ||
1fb1ca27 MS |
1244 | if (struct_return) |
1245 | { | |
1246 | regs_used = 1; | |
9c9acae0 | 1247 | regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr); |
1fb1ca27 MS |
1248 | } |
1249 | else | |
1250 | regs_used = 0; | |
1251 | ||
025bb325 | 1252 | /* Push all arguments onto the stack. */ |
342ee437 MS |
1253 | for (argnum = 0; argnum < nargs; argnum++) |
1254 | { | |
1fb1ca27 MS |
1255 | /* FIXME what about structs? Unions? */ |
1256 | if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT | |
1257 | && TYPE_LENGTH (value_type (*args)) > 8) | |
1258 | { | |
1259 | /* Change to pointer-to-type. */ | |
1260 | arg_len = push_size; | |
b8b6e72f | 1261 | gdb_assert (push_size <= MN10300_MAX_REGISTER_SIZE); |
e17a4113 | 1262 | store_unsigned_integer (valbuf, push_size, byte_order, |
42ae5230 | 1263 | value_address (*args)); |
1fb1ca27 MS |
1264 | val = &valbuf[0]; |
1265 | } | |
1266 | else | |
1267 | { | |
1268 | arg_len = TYPE_LENGTH (value_type (*args)); | |
948f8e3d | 1269 | val = value_contents (*args); |
1fb1ca27 | 1270 | } |
342ee437 MS |
1271 | |
1272 | while (regs_used < 2 && arg_len > 0) | |
1273 | { | |
9c9acae0 | 1274 | regcache_cooked_write_unsigned (regcache, regs_used, |
e17a4113 | 1275 | extract_unsigned_integer (val, push_size, byte_order)); |
342ee437 MS |
1276 | val += push_size; |
1277 | arg_len -= push_size; | |
1278 | regs_used++; | |
1279 | } | |
1280 | ||
1281 | while (arg_len > 0) | |
1282 | { | |
1283 | write_memory (sp + stack_offset, val, push_size); | |
1284 | arg_len -= push_size; | |
1285 | val += push_size; | |
1286 | stack_offset += push_size; | |
1287 | } | |
1288 | ||
1289 | args++; | |
1290 | } | |
1291 | ||
1292 | /* Make space for the flushback area. */ | |
1293 | sp -= 8; | |
1294 | ||
1295 | /* Push the return address that contains the magic breakpoint. */ | |
1296 | sp -= 4; | |
e17a4113 | 1297 | write_memory_unsigned_integer (sp, push_size, byte_order, bp_addr); |
a64ae7e0 CV |
1298 | |
1299 | /* The CPU also writes the return address always into the | |
1300 | MDR register on "call". */ | |
1301 | regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr); | |
1302 | ||
342ee437 MS |
1303 | /* Update $sp. */ |
1304 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); | |
ee3a2f01 KB |
1305 | |
1306 | /* On the mn10300, it's possible to move some of the stack adjustment | |
1307 | and saving of the caller-save registers out of the prologue and | |
1308 | into the call sites. (When using gcc, this optimization can | |
1309 | occur when using the -mrelax switch.) If this occurs, the dwarf2 | |
1310 | info will reflect this fact. We can test to see if this is the | |
1311 | case by creating a new frame using the current stack pointer and | |
1312 | the address of the function that we're about to call. We then | |
1313 | unwind SP and see if it's different than the SP of our newly | |
1314 | created frame. If the SP values are the same, the caller is not | |
1315 | expected to allocate any additional stack. On the other hand, if | |
1316 | the SP values are different, the difference determines the | |
1317 | additional stack that must be allocated. | |
1318 | ||
1319 | Note that we don't update the return value though because that's | |
1320 | the value of the stack just after pushing the arguments, but prior | |
1321 | to performing the call. This value is needed in order to | |
025bb325 | 1322 | construct the frame ID of the dummy call. */ |
ee3a2f01 KB |
1323 | { |
1324 | CORE_ADDR func_addr = find_function_addr (target_func, NULL); | |
1325 | CORE_ADDR unwound_sp | |
1326 | = mn10300_unwind_sp (gdbarch, create_new_frame (sp, func_addr)); | |
1327 | if (sp != unwound_sp) | |
1328 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, | |
1329 | sp - (unwound_sp - sp)); | |
1330 | } | |
1331 | ||
342ee437 MS |
1332 | return sp; |
1333 | } | |
1334 | ||
336c28c5 KB |
1335 | /* If DWARF2 is a register number appearing in Dwarf2 debug info, then |
1336 | mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB | |
1337 | register number. Why don't Dwarf2 and GDB use the same numbering? | |
1338 | Who knows? But since people have object files lying around with | |
1339 | the existing Dwarf2 numbering, and other people have written stubs | |
1340 | to work with the existing GDB, neither of them can change. So we | |
1341 | just have to cope. */ | |
1342 | static int | |
be8626e0 | 1343 | mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2) |
336c28c5 | 1344 | { |
c9f4d572 | 1345 | /* This table is supposed to be shaped like the gdbarch_register_name |
336c28c5 KB |
1346 | initializer in gcc/config/mn10300/mn10300.h. Registers which |
1347 | appear in GCC's numbering, but have no counterpart in GDB's | |
1348 | world, are marked with a -1. */ | |
1349 | static int dwarf2_to_gdb[] = { | |
c5bb7362 KB |
1350 | E_D0_REGNUM, E_D1_REGNUM, E_D2_REGNUM, E_D3_REGNUM, |
1351 | E_A0_REGNUM, E_A1_REGNUM, E_A2_REGNUM, E_A3_REGNUM, | |
1352 | -1, E_SP_REGNUM, | |
1353 | ||
1354 | E_E0_REGNUM, E_E1_REGNUM, E_E2_REGNUM, E_E3_REGNUM, | |
1355 | E_E4_REGNUM, E_E5_REGNUM, E_E6_REGNUM, E_E7_REGNUM, | |
1356 | ||
1357 | E_FS0_REGNUM + 0, E_FS0_REGNUM + 1, E_FS0_REGNUM + 2, E_FS0_REGNUM + 3, | |
1358 | E_FS0_REGNUM + 4, E_FS0_REGNUM + 5, E_FS0_REGNUM + 6, E_FS0_REGNUM + 7, | |
1359 | ||
1360 | E_FS0_REGNUM + 8, E_FS0_REGNUM + 9, E_FS0_REGNUM + 10, E_FS0_REGNUM + 11, | |
1361 | E_FS0_REGNUM + 12, E_FS0_REGNUM + 13, E_FS0_REGNUM + 14, E_FS0_REGNUM + 15, | |
1362 | ||
1363 | E_FS0_REGNUM + 16, E_FS0_REGNUM + 17, E_FS0_REGNUM + 18, E_FS0_REGNUM + 19, | |
1364 | E_FS0_REGNUM + 20, E_FS0_REGNUM + 21, E_FS0_REGNUM + 22, E_FS0_REGNUM + 23, | |
1365 | ||
1366 | E_FS0_REGNUM + 24, E_FS0_REGNUM + 25, E_FS0_REGNUM + 26, E_FS0_REGNUM + 27, | |
1367 | E_FS0_REGNUM + 28, E_FS0_REGNUM + 29, E_FS0_REGNUM + 30, E_FS0_REGNUM + 31, | |
1368 | ||
1369 | E_MDR_REGNUM, E_PSW_REGNUM, E_PC_REGNUM | |
336c28c5 KB |
1370 | }; |
1371 | ||
1372 | if (dwarf2 < 0 | |
bbc1a784 | 1373 | || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb)) |
0fde2c53 | 1374 | return -1; |
336c28c5 KB |
1375 | |
1376 | return dwarf2_to_gdb[dwarf2]; | |
1377 | } | |
342ee437 MS |
1378 | |
1379 | static struct gdbarch * | |
1380 | mn10300_gdbarch_init (struct gdbarch_info info, | |
1381 | struct gdbarch_list *arches) | |
1382 | { | |
1383 | struct gdbarch *gdbarch; | |
1384 | struct gdbarch_tdep *tdep; | |
4640dd91 | 1385 | int num_regs; |
342ee437 MS |
1386 | |
1387 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1388 | if (arches != NULL) | |
1389 | return arches->gdbarch; | |
1390 | ||
cdd238da | 1391 | tdep = XCNEW (struct gdbarch_tdep); |
342ee437 MS |
1392 | gdbarch = gdbarch_alloc (&info, tdep); |
1393 | ||
1394 | switch (info.bfd_arch_info->mach) | |
1395 | { | |
1396 | case 0: | |
1397 | case bfd_mach_mn10300: | |
1398 | set_gdbarch_register_name (gdbarch, mn10300_generic_register_name); | |
1399 | tdep->am33_mode = 0; | |
4640dd91 | 1400 | num_regs = 32; |
342ee437 MS |
1401 | break; |
1402 | case bfd_mach_am33: | |
1403 | set_gdbarch_register_name (gdbarch, am33_register_name); | |
1404 | tdep->am33_mode = 1; | |
4640dd91 KB |
1405 | num_regs = 32; |
1406 | break; | |
1407 | case bfd_mach_am33_2: | |
1408 | set_gdbarch_register_name (gdbarch, am33_2_register_name); | |
1409 | tdep->am33_mode = 2; | |
1410 | num_regs = 64; | |
1411 | set_gdbarch_fp0_regnum (gdbarch, 32); | |
342ee437 MS |
1412 | break; |
1413 | default: | |
1414 | internal_error (__FILE__, __LINE__, | |
1415 | _("mn10300_gdbarch_init: Unknown mn10300 variant")); | |
1416 | break; | |
1417 | } | |
1418 | ||
1b31f75d KB |
1419 | /* By default, chars are unsigned. */ |
1420 | set_gdbarch_char_signed (gdbarch, 0); | |
1421 | ||
342ee437 | 1422 | /* Registers. */ |
4640dd91 | 1423 | set_gdbarch_num_regs (gdbarch, num_regs); |
342ee437 MS |
1424 | set_gdbarch_register_type (gdbarch, mn10300_register_type); |
1425 | set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue); | |
1426 | set_gdbarch_read_pc (gdbarch, mn10300_read_pc); | |
1427 | set_gdbarch_write_pc (gdbarch, mn10300_write_pc); | |
1428 | set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); | |
1429 | set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); | |
336c28c5 | 1430 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum); |
342ee437 MS |
1431 | |
1432 | /* Stack unwinding. */ | |
1433 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1434 | /* Breakpoints. */ | |
04180708 YQ |
1435 | set_gdbarch_breakpoint_kind_from_pc (gdbarch, |
1436 | mn10300_breakpoint::kind_from_pc); | |
1437 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, | |
1438 | mn10300_breakpoint::bp_from_kind); | |
025bb325 | 1439 | /* decr_pc_after_break? */ |
342ee437 MS |
1440 | |
1441 | /* Stage 2 */ | |
99fe5f9d | 1442 | set_gdbarch_return_value (gdbarch, mn10300_return_value); |
342ee437 MS |
1443 | |
1444 | /* Stage 3 -- get target calls working. */ | |
1445 | set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call); | |
1446 | /* set_gdbarch_return_value (store, extract) */ | |
1447 | ||
1448 | ||
1449 | mn10300_frame_unwind_init (gdbarch); | |
1450 | ||
697e3bc9 KB |
1451 | /* Hook in ABI-specific overrides, if they have been registered. */ |
1452 | gdbarch_init_osabi (info, gdbarch); | |
1453 | ||
342ee437 MS |
1454 | return gdbarch; |
1455 | } | |
1456 | ||
025bb325 | 1457 | /* Dump out the mn10300 specific architecture information. */ |
342ee437 MS |
1458 | |
1459 | static void | |
d93859e2 | 1460 | mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file) |
342ee437 | 1461 | { |
d93859e2 | 1462 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
342ee437 MS |
1463 | fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n", |
1464 | tdep->am33_mode); | |
1465 | } | |
1466 | ||
1467 | void | |
1468 | _initialize_mn10300_tdep (void) | |
1469 | { | |
1470 | gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep); | |
1471 | } | |
1472 |