gdb: recognize new DWARF attributes: defaulted, deleted, calling conv.
[deliverable/binutils-gdb.git] / gdb / mn10300-tdep.c
CommitLineData
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1/* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger.
2
42a4f53d 3 Copyright (C) 1996-2019 Free Software Foundation, Inc.
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
a9762ec7 9 the Free Software Foundation; either version 3 of the License, or
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10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
a9762ec7 18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
342ee437 19
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20#include "defs.h"
21#include "arch-utils.h"
22#include "dis-asm.h"
23#include "gdbtypes.h"
24#include "regcache.h"
025bb325 25#include "gdbcore.h" /* For write_memory_unsigned_integer. */
342ee437 26#include "value.h"
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27#include "frame.h"
28#include "frame-unwind.h"
29#include "frame-base.h"
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30#include "symtab.h"
31#include "dwarf2-frame.h"
697e3bc9 32#include "osabi.h"
ee3a2f01 33#include "infcall.h"
6c02c64c 34#include "prologue-value.h"
effa26a9 35#include "target.h"
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36
37#include "mn10300-tdep.h"
38
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39
40/* The am33-2 has 64 registers. */
41#define MN10300_MAX_NUM_REGS 64
42
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43/* Big enough to hold the size of the largest register in bytes. */
44#define MN10300_MAX_REGISTER_SIZE 64
45
6c02c64c
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46/* This structure holds the results of a prologue analysis. */
47struct mn10300_prologue
48{
d80b854b
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49 /* The architecture for which we generated this prologue info. */
50 struct gdbarch *gdbarch;
51
6c02c64c
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52 /* The offset from the frame base to the stack pointer --- always
53 zero or negative.
54
55 Calling this a "size" is a bit misleading, but given that the
56 stack grows downwards, using offsets for everything keeps one
57 from going completely sign-crazy: you never change anything's
58 sign for an ADD instruction; always change the second operand's
59 sign for a SUB instruction; and everything takes care of
60 itself. */
61 int frame_size;
62
63 /* Non-zero if this function has initialized the frame pointer from
64 the stack pointer, zero otherwise. */
65 int has_frame_ptr;
66
67 /* If has_frame_ptr is non-zero, this is the offset from the frame
68 base to where the frame pointer points. This is always zero or
69 negative. */
70 int frame_ptr_offset;
71
72 /* The address of the first instruction at which the frame has been
73 set up and the arguments are where the debug info says they are
74 --- as best as we can tell. */
75 CORE_ADDR prologue_end;
76
77 /* reg_offset[R] is the offset from the CFA at which register R is
78 saved, or 1 if register R has not been saved. (Real values are
79 always zero or negative.) */
80 int reg_offset[MN10300_MAX_NUM_REGS];
81};
82
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83
84/* Compute the alignment required by a type. */
85
86static int
87mn10300_type_align (struct type *type)
88{
89 int i, align = 1;
90
91 switch (TYPE_CODE (type))
92 {
93 case TYPE_CODE_INT:
94 case TYPE_CODE_ENUM:
95 case TYPE_CODE_SET:
96 case TYPE_CODE_RANGE:
97 case TYPE_CODE_CHAR:
98 case TYPE_CODE_BOOL:
99 case TYPE_CODE_FLT:
100 case TYPE_CODE_PTR:
101 case TYPE_CODE_REF:
aa006118 102 case TYPE_CODE_RVALUE_REF:
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103 return TYPE_LENGTH (type);
104
105 case TYPE_CODE_COMPLEX:
106 return TYPE_LENGTH (type) / 2;
107
108 case TYPE_CODE_STRUCT:
109 case TYPE_CODE_UNION:
110 for (i = 0; i < TYPE_NFIELDS (type); i++)
111 {
112 int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i));
113 while (align < falign)
114 align <<= 1;
115 }
116 return align;
117
118 case TYPE_CODE_ARRAY:
119 /* HACK! Structures containing arrays, even small ones, are not
85102364 120 eligible for returning in registers. */
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121 return 256;
122
123 case TYPE_CODE_TYPEDEF:
124 return mn10300_type_align (check_typedef (type));
125
126 default:
127 internal_error (__FILE__, __LINE__, _("bad switch"));
128 }
129}
130
342ee437 131/* Should call_function allocate stack space for a struct return? */
342ee437 132static int
99fe5f9d 133mn10300_use_struct_convention (struct type *type)
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134{
135 /* Structures bigger than a pair of words can't be returned in
136 registers. */
137 if (TYPE_LENGTH (type) > 8)
138 return 1;
139
140 switch (TYPE_CODE (type))
141 {
142 case TYPE_CODE_STRUCT:
143 case TYPE_CODE_UNION:
144 /* Structures with a single field are handled as the field
145 itself. */
146 if (TYPE_NFIELDS (type) == 1)
99fe5f9d 147 return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0));
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148
149 /* Structures with word or double-word size are passed in memory, as
150 long as they require at least word alignment. */
151 if (mn10300_type_align (type) >= 4)
152 return 0;
153
154 return 1;
155
156 /* Arrays are addressable, so they're never returned in
157 registers. This condition can only hold when the array is
158 the only field of a struct or union. */
159 case TYPE_CODE_ARRAY:
160 return 1;
161
162 case TYPE_CODE_TYPEDEF:
99fe5f9d 163 return mn10300_use_struct_convention (check_typedef (type));
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164
165 default:
166 return 0;
167 }
168}
169
342ee437 170static void
99fe5f9d 171mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type,
948f8e3d 172 struct regcache *regcache, const gdb_byte *valbuf)
342ee437 173{
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174 int len = TYPE_LENGTH (type);
175 int reg, regsz;
176
177 if (TYPE_CODE (type) == TYPE_CODE_PTR)
178 reg = 4;
179 else
180 reg = 0;
181
182 regsz = register_size (gdbarch, reg);
183
184 if (len <= regsz)
4f0420fd 185 regcache->raw_write_part (reg, 0, len, valbuf);
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186 else if (len <= 2 * regsz)
187 {
10eaee5f 188 regcache->raw_write (reg, valbuf);
342ee437 189 gdb_assert (regsz == register_size (gdbarch, reg + 1));
4f0420fd 190 regcache->raw_write_part (reg + 1, 0, len - regsz, valbuf + regsz);
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191 }
192 else
193 internal_error (__FILE__, __LINE__,
194 _("Cannot store return value %d bytes long."), len);
195}
196
342ee437 197static void
99fe5f9d 198mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type,
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199 struct regcache *regcache, void *valbuf)
200{
b8b6e72f 201 gdb_byte buf[MN10300_MAX_REGISTER_SIZE];
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202 int len = TYPE_LENGTH (type);
203 int reg, regsz;
204
205 if (TYPE_CODE (type) == TYPE_CODE_PTR)
206 reg = 4;
207 else
208 reg = 0;
209
210 regsz = register_size (gdbarch, reg);
b8b6e72f 211 gdb_assert (regsz <= MN10300_MAX_REGISTER_SIZE);
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212 if (len <= regsz)
213 {
0b883586 214 regcache->raw_read (reg, buf);
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215 memcpy (valbuf, buf, len);
216 }
217 else if (len <= 2 * regsz)
218 {
0b883586 219 regcache->raw_read (reg, buf);
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220 memcpy (valbuf, buf, regsz);
221 gdb_assert (regsz == register_size (gdbarch, reg + 1));
0b883586 222 regcache->raw_read (reg + 1, buf);
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223 memcpy ((char *) valbuf + regsz, buf, len - regsz);
224 }
225 else
226 internal_error (__FILE__, __LINE__,
227 _("Cannot extract return value %d bytes long."), len);
228}
229
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230/* Determine, for architecture GDBARCH, how a return value of TYPE
231 should be returned. If it is supposed to be returned in registers,
232 and READBUF is non-zero, read the appropriate value from REGCACHE,
233 and copy it into READBUF. If WRITEBUF is non-zero, write the value
234 from WRITEBUF into REGCACHE. */
235
236static enum return_value_convention
6a3a010b 237mn10300_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
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238 struct type *type, struct regcache *regcache,
239 gdb_byte *readbuf, const gdb_byte *writebuf)
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240{
241 if (mn10300_use_struct_convention (type))
242 return RETURN_VALUE_STRUCT_CONVENTION;
243
244 if (readbuf)
245 mn10300_extract_return_value (gdbarch, type, regcache, readbuf);
246 if (writebuf)
247 mn10300_store_return_value (gdbarch, type, regcache, writebuf);
248
249 return RETURN_VALUE_REGISTER_CONVENTION;
250}
251
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252static const char *
253register_name (int reg, const char **regs, long sizeof_regs)
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254{
255 if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0]))
256 return NULL;
257 else
258 return regs[reg];
259}
260
261static const char *
d93859e2 262mn10300_generic_register_name (struct gdbarch *gdbarch, int reg)
342ee437 263{
a121b7c1 264 static const char *regs[] =
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265 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
266 "sp", "pc", "mdr", "psw", "lir", "lar", "", "",
267 "", "", "", "", "", "", "", "",
268 "", "", "", "", "", "", "", "fp"
269 };
270 return register_name (reg, regs, sizeof regs);
271}
272
273
274static const char *
d93859e2 275am33_register_name (struct gdbarch *gdbarch, int reg)
342ee437 276{
a121b7c1 277 static const char *regs[] =
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278 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
279 "sp", "pc", "mdr", "psw", "lir", "lar", "",
280 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
281 "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", ""
282 };
283 return register_name (reg, regs, sizeof regs);
284}
285
4640dd91 286static const char *
d93859e2 287am33_2_register_name (struct gdbarch *gdbarch, int reg)
4640dd91 288{
a121b7c1 289 static const char *regs[] =
4640dd91
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290 {
291 "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3",
292 "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0",
293 "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp",
294 "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "",
295 "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7",
296 "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15",
297 "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23",
298 "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"
299 };
300 return register_name (reg, regs, sizeof regs);
301}
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302
303static struct type *
304mn10300_register_type (struct gdbarch *gdbarch, int reg)
305{
0dfff4cb 306 return builtin_type (gdbarch)->builtin_int;
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307}
308
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309/* The breakpoint instruction must be the same size as the smallest
310 instruction in the instruction set.
311
312 The Matsushita mn10x00 processors have single byte instructions
313 so we need a single byte breakpoint. Matsushita hasn't defined
314 one, so we defined it ourselves. */
04180708 315constexpr gdb_byte mn10300_break_insn[] = {0xff};
342ee437 316
04180708 317typedef BP_MANIPULATION (mn10300_break_insn) mn10300_breakpoint;
342ee437 318
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319/* Model the semantics of pushing a register onto the stack. This
320 is a helper function for mn10300_analyze_prologue, below. */
321static void
322push_reg (pv_t *regs, struct pv_area *stack, int regnum)
323{
324 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
f7b7ed97 325 stack->store (regs[E_SP_REGNUM], 4, regs[regnum]);
6c02c64c
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326}
327
328/* Translate an "r" register number extracted from an instruction encoding
329 into a GDB register number. Adapted from a simulator function
330 of the same name; see am33.igen. */
331static int
332translate_rreg (int rreg)
333{
334 /* The higher register numbers actually correspond to the
335 basic machine's address and data registers. */
336 if (rreg > 7 && rreg < 12)
337 return E_A0_REGNUM + rreg - 8;
338 else if (rreg > 11 && rreg < 16)
339 return E_D0_REGNUM + rreg - 12;
340 else
341 return E_E0_REGNUM + rreg;
342}
343
f7b7ed97 344/* Find saved registers in a 'struct pv_area'; we pass this to pv_area::scan.
9cacebf5 345
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346 If VALUE is a saved register, ADDR says it was saved at a constant
347 offset from the frame base, and SIZE indicates that the whole
348 register was saved, record its offset in RESULT_UNTYPED. */
9cacebf5 349static void
6c02c64c 350check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
9cacebf5 351{
6c02c64c 352 struct mn10300_prologue *result = (struct mn10300_prologue *) result_untyped;
9cacebf5 353
6c02c64c
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354 if (value.kind == pvk_register
355 && value.k == 0
356 && pv_is_register (addr, E_SP_REGNUM)
d80b854b 357 && size == register_size (result->gdbarch, value.reg))
6c02c64c
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358 result->reg_offset[value.reg] = addr.k;
359}
9cacebf5 360
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361/* Analyze the prologue to determine where registers are saved,
362 the end of the prologue, etc. The result of this analysis is
363 returned in RESULT. See struct mn10300_prologue above for more
364 information. */
365static void
366mn10300_analyze_prologue (struct gdbarch *gdbarch,
367 CORE_ADDR start_pc, CORE_ADDR limit_pc,
368 struct mn10300_prologue *result)
369{
e17a4113 370 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
22e048c9 371 CORE_ADDR pc;
6c02c64c
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372 int rn;
373 pv_t regs[MN10300_MAX_NUM_REGS];
6c02c64c
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374 CORE_ADDR after_last_frame_setup_insn = start_pc;
375 int am33_mode = AM33_MODE (gdbarch);
376
377 memset (result, 0, sizeof (*result));
d80b854b 378 result->gdbarch = gdbarch;
9cacebf5 379
6c02c64c 380 for (rn = 0; rn < MN10300_MAX_NUM_REGS; rn++)
4640dd91 381 {
6c02c64c
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382 regs[rn] = pv_register (rn, 0);
383 result->reg_offset[rn] = 1;
4640dd91 384 }
f7b7ed97 385 pv_area stack (E_SP_REGNUM, gdbarch_addr_bit (gdbarch));
6c02c64c 386
f7b7ed97
TT
387 /* The typical call instruction will have saved the return address on the
388 stack. Space for the return address has already been preallocated in
389 the caller's frame. It's possible, such as when using -mrelax with gcc
390 that other registers were saved as well. If this happens, we really
391 have no chance of deciphering the frame. DWARF info can save the day
392 when this happens. */
393 stack.store (regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]);
6c02c64c
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394
395 pc = start_pc;
396 while (pc < limit_pc)
4640dd91 397 {
6c02c64c
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398 int status;
399 gdb_byte instr[2];
4640dd91 400
6c02c64c
KB
401 /* Instructions can be as small as one byte; however, we usually
402 need at least two bytes to do the decoding, so fetch that many
403 to begin with. */
404 status = target_read_memory (pc, instr, 2);
405 if (status != 0)
406 break;
4640dd91 407
6c02c64c
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408 /* movm [regs], sp */
409 if (instr[0] == 0xcf)
4640dd91 410 {
6c02c64c
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411 gdb_byte save_mask;
412
413 save_mask = instr[1];
414
415 if ((save_mask & movm_exreg0_bit) && am33_mode)
416 {
f7b7ed97
TT
417 push_reg (regs, &stack, E_E2_REGNUM);
418 push_reg (regs, &stack, E_E3_REGNUM);
6c02c64c
KB
419 }
420 if ((save_mask & movm_exreg1_bit) && am33_mode)
4640dd91 421 {
f7b7ed97
TT
422 push_reg (regs, &stack, E_E4_REGNUM);
423 push_reg (regs, &stack, E_E5_REGNUM);
424 push_reg (regs, &stack, E_E6_REGNUM);
425 push_reg (regs, &stack, E_E7_REGNUM);
4640dd91 426 }
6c02c64c
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427 if ((save_mask & movm_exother_bit) && am33_mode)
428 {
f7b7ed97
TT
429 push_reg (regs, &stack, E_E0_REGNUM);
430 push_reg (regs, &stack, E_E1_REGNUM);
431 push_reg (regs, &stack, E_MDRQ_REGNUM);
432 push_reg (regs, &stack, E_MCRH_REGNUM);
433 push_reg (regs, &stack, E_MCRL_REGNUM);
434 push_reg (regs, &stack, E_MCVF_REGNUM);
6c02c64c
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435 }
436 if (save_mask & movm_d2_bit)
f7b7ed97 437 push_reg (regs, &stack, E_D2_REGNUM);
6c02c64c 438 if (save_mask & movm_d3_bit)
f7b7ed97 439 push_reg (regs, &stack, E_D3_REGNUM);
6c02c64c 440 if (save_mask & movm_a2_bit)
f7b7ed97 441 push_reg (regs, &stack, E_A2_REGNUM);
6c02c64c 442 if (save_mask & movm_a3_bit)
f7b7ed97 443 push_reg (regs, &stack, E_A3_REGNUM);
6c02c64c
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444 if (save_mask & movm_other_bit)
445 {
f7b7ed97
TT
446 push_reg (regs, &stack, E_D0_REGNUM);
447 push_reg (regs, &stack, E_D1_REGNUM);
448 push_reg (regs, &stack, E_A0_REGNUM);
449 push_reg (regs, &stack, E_A1_REGNUM);
450 push_reg (regs, &stack, E_MDR_REGNUM);
451 push_reg (regs, &stack, E_LIR_REGNUM);
452 push_reg (regs, &stack, E_LAR_REGNUM);
6c02c64c
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453 /* The `other' bit leaves a blank area of four bytes at
454 the beginning of its block of saved registers, making
455 it 32 bytes long in total. */
456 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4);
457 }
458
459 pc += 2;
460 after_last_frame_setup_insn = pc;
4640dd91 461 }
6c02c64c
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462 /* mov sp, aN */
463 else if ((instr[0] & 0xfc) == 0x3c)
464 {
465 int aN = instr[0] & 0x03;
4640dd91 466
6c02c64c 467 regs[E_A0_REGNUM + aN] = regs[E_SP_REGNUM];
4640dd91 468
6c02c64c
KB
469 pc += 1;
470 if (aN == 3)
471 after_last_frame_setup_insn = pc;
472 }
473 /* mov aM, aN */
474 else if ((instr[0] & 0xf0) == 0x90
475 && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
476 {
477 int aN = instr[0] & 0x03;
478 int aM = (instr[0] & 0x0c) >> 2;
9cacebf5 479
6c02c64c 480 regs[E_A0_REGNUM + aN] = regs[E_A0_REGNUM + aM];
9cacebf5 481
6c02c64c
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482 pc += 1;
483 }
484 /* mov dM, dN */
485 else if ((instr[0] & 0xf0) == 0x80
486 && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2))
487 {
488 int dN = instr[0] & 0x03;
489 int dM = (instr[0] & 0x0c) >> 2;
9cacebf5 490
6c02c64c 491 regs[E_D0_REGNUM + dN] = regs[E_D0_REGNUM + dM];
9cacebf5 492
6c02c64c
KB
493 pc += 1;
494 }
495 /* mov aM, dN */
496 else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xd0)
497 {
498 int dN = instr[1] & 0x03;
499 int aM = (instr[1] & 0x0c) >> 2;
9cacebf5 500
6c02c64c 501 regs[E_D0_REGNUM + dN] = regs[E_A0_REGNUM + aM];
9cacebf5 502
6c02c64c
KB
503 pc += 2;
504 }
505 /* mov dM, aN */
506 else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xe0)
507 {
508 int aN = instr[1] & 0x03;
509 int dM = (instr[1] & 0x0c) >> 2;
9cacebf5 510
6c02c64c 511 regs[E_A0_REGNUM + aN] = regs[E_D0_REGNUM + dM];
9cacebf5 512
6c02c64c
KB
513 pc += 2;
514 }
515 /* add imm8, SP */
516 else if (instr[0] == 0xf8 && instr[1] == 0xfe)
517 {
518 gdb_byte buf[1];
519 LONGEST imm8;
9cacebf5 520
9cacebf5 521
6c02c64c
KB
522 status = target_read_memory (pc + 2, buf, 1);
523 if (status != 0)
524 break;
9cacebf5 525
e17a4113 526 imm8 = extract_signed_integer (buf, 1, byte_order);
6c02c64c 527 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm8);
9cacebf5 528
6c02c64c
KB
529 pc += 3;
530 /* Stack pointer adjustments are frame related. */
531 after_last_frame_setup_insn = pc;
532 }
533 /* add imm16, SP */
534 else if (instr[0] == 0xfa && instr[1] == 0xfe)
535 {
536 gdb_byte buf[2];
537 LONGEST imm16;
9cacebf5 538
6c02c64c
KB
539 status = target_read_memory (pc + 2, buf, 2);
540 if (status != 0)
541 break;
9cacebf5 542
e17a4113 543 imm16 = extract_signed_integer (buf, 2, byte_order);
6c02c64c 544 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm16);
9cacebf5 545
6c02c64c
KB
546 pc += 4;
547 /* Stack pointer adjustments are frame related. */
548 after_last_frame_setup_insn = pc;
549 }
550 /* add imm32, SP */
551 else if (instr[0] == 0xfc && instr[1] == 0xfe)
552 {
553 gdb_byte buf[4];
554 LONGEST imm32;
9cacebf5 555
6c02c64c
KB
556 status = target_read_memory (pc + 2, buf, 4);
557 if (status != 0)
558 break;
9cacebf5 559
9cacebf5 560
e17a4113 561 imm32 = extract_signed_integer (buf, 4, byte_order);
6c02c64c 562 regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm32);
9cacebf5 563
6c02c64c
KB
564 pc += 6;
565 /* Stack pointer adjustments are frame related. */
566 after_last_frame_setup_insn = pc;
567 }
568 /* add imm8, aN */
569 else if ((instr[0] & 0xfc) == 0x20)
570 {
571 int aN;
572 LONGEST imm8;
9cacebf5 573
6c02c64c 574 aN = instr[0] & 0x03;
e17a4113 575 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
9cacebf5 576
6c02c64c
KB
577 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
578 imm8);
9cacebf5 579
6c02c64c
KB
580 pc += 2;
581 }
582 /* add imm16, aN */
583 else if (instr[0] == 0xfa && (instr[1] & 0xfc) == 0xd0)
584 {
585 int aN;
586 LONGEST imm16;
587 gdb_byte buf[2];
9cacebf5 588
6c02c64c 589 aN = instr[1] & 0x03;
9cacebf5 590
6c02c64c
KB
591 status = target_read_memory (pc + 2, buf, 2);
592 if (status != 0)
593 break;
9cacebf5 594
9cacebf5 595
e17a4113 596 imm16 = extract_signed_integer (buf, 2, byte_order);
9cacebf5 597
6c02c64c
KB
598 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
599 imm16);
9cacebf5 600
6c02c64c
KB
601 pc += 4;
602 }
603 /* add imm32, aN */
604 else if (instr[0] == 0xfc && (instr[1] & 0xfc) == 0xd0)
605 {
606 int aN;
607 LONGEST imm32;
608 gdb_byte buf[4];
9cacebf5 609
6c02c64c 610 aN = instr[1] & 0x03;
9cacebf5 611
6c02c64c
KB
612 status = target_read_memory (pc + 2, buf, 4);
613 if (status != 0)
614 break;
9cacebf5 615
e17a4113 616 imm32 = extract_signed_integer (buf, 2, byte_order);
9cacebf5 617
6c02c64c
KB
618 regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN],
619 imm32);
620 pc += 6;
621 }
622 /* fmov fsM, (rN) */
623 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x30)
624 {
625 int fsM, sM, Y, rN;
626 gdb_byte buf[1];
9cacebf5 627
6c02c64c 628 Y = (instr[1] & 0x02) >> 1;
9cacebf5 629
6c02c64c
KB
630 status = target_read_memory (pc + 2, buf, 1);
631 if (status != 0)
632 break;
9cacebf5 633
6c02c64c
KB
634 sM = (buf[0] & 0xf0) >> 4;
635 rN = buf[0] & 0x0f;
636 fsM = (Y << 4) | sM;
9cacebf5 637
f7b7ed97
TT
638 stack.store (regs[translate_rreg (rN)], 4,
639 regs[E_FS0_REGNUM + fsM]);
9cacebf5 640
6c02c64c
KB
641 pc += 3;
642 }
643 /* fmov fsM, (sp) */
644 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x34)
645 {
646 int fsM, sM, Y;
647 gdb_byte buf[1];
9cacebf5 648
6c02c64c 649 Y = (instr[1] & 0x02) >> 1;
9cacebf5 650
6c02c64c
KB
651 status = target_read_memory (pc + 2, buf, 1);
652 if (status != 0)
653 break;
9cacebf5 654
6c02c64c
KB
655 sM = (buf[0] & 0xf0) >> 4;
656 fsM = (Y << 4) | sM;
9cacebf5 657
f7b7ed97
TT
658 stack.store (regs[E_SP_REGNUM], 4,
659 regs[E_FS0_REGNUM + fsM]);
9cacebf5 660
6c02c64c
KB
661 pc += 3;
662 }
663 /* fmov fsM, (rN, rI) */
664 else if (instr[0] == 0xfb && instr[1] == 0x37)
665 {
666 int fsM, sM, Z, rN, rI;
667 gdb_byte buf[2];
9cacebf5 668
9cacebf5 669
6c02c64c
KB
670 status = target_read_memory (pc + 2, buf, 2);
671 if (status != 0)
672 break;
83845630 673
6c02c64c
KB
674 rI = (buf[0] & 0xf0) >> 4;
675 rN = buf[0] & 0x0f;
676 sM = (buf[1] & 0xf0) >> 4;
677 Z = (buf[1] & 0x02) >> 1;
678 fsM = (Z << 4) | sM;
83845630 679
f7b7ed97
TT
680 stack.store (pv_add (regs[translate_rreg (rN)],
681 regs[translate_rreg (rI)]),
682 4, regs[E_FS0_REGNUM + fsM]);
83845630 683
6c02c64c
KB
684 pc += 4;
685 }
686 /* fmov fsM, (d8, rN) */
687 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x30)
4640dd91 688 {
6c02c64c
KB
689 int fsM, sM, Y, rN;
690 LONGEST d8;
691 gdb_byte buf[2];
692
693 Y = (instr[1] & 0x02) >> 1;
694
695 status = target_read_memory (pc + 2, buf, 2);
696 if (status != 0)
697 break;
698
699 sM = (buf[0] & 0xf0) >> 4;
700 rN = buf[0] & 0x0f;
701 fsM = (Y << 4) | sM;
e17a4113 702 d8 = extract_signed_integer (&buf[1], 1, byte_order);
6c02c64c 703
f7b7ed97
TT
704 stack.store (pv_add_constant (regs[translate_rreg (rN)], d8),
705 4, regs[E_FS0_REGNUM + fsM]);
6c02c64c
KB
706
707 pc += 4;
4640dd91 708 }
6c02c64c
KB
709 /* fmov fsM, (d24, rN) */
710 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x30)
83845630 711 {
6c02c64c
KB
712 int fsM, sM, Y, rN;
713 LONGEST d24;
714 gdb_byte buf[4];
715
716 Y = (instr[1] & 0x02) >> 1;
717
718 status = target_read_memory (pc + 2, buf, 4);
83845630 719 if (status != 0)
6c02c64c
KB
720 break;
721
722 sM = (buf[0] & 0xf0) >> 4;
723 rN = buf[0] & 0x0f;
724 fsM = (Y << 4) | sM;
e17a4113 725 d24 = extract_signed_integer (&buf[1], 3, byte_order);
6c02c64c 726
f7b7ed97
TT
727 stack.store (pv_add_constant (regs[translate_rreg (rN)], d24),
728 4, regs[E_FS0_REGNUM + fsM]);
6c02c64c
KB
729
730 pc += 6;
83845630 731 }
6c02c64c
KB
732 /* fmov fsM, (d32, rN) */
733 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x30)
734 {
735 int fsM, sM, Y, rN;
736 LONGEST d32;
737 gdb_byte buf[5];
4640dd91 738
6c02c64c
KB
739 Y = (instr[1] & 0x02) >> 1;
740
741 status = target_read_memory (pc + 2, buf, 5);
742 if (status != 0)
743 break;
744
745 sM = (buf[0] & 0xf0) >> 4;
746 rN = buf[0] & 0x0f;
747 fsM = (Y << 4) | sM;
e17a4113 748 d32 = extract_signed_integer (&buf[1], 4, byte_order);
9cacebf5 749
f7b7ed97
TT
750 stack.store (pv_add_constant (regs[translate_rreg (rN)], d32),
751 4, regs[E_FS0_REGNUM + fsM]);
6c02c64c
KB
752
753 pc += 7;
754 }
755 /* fmov fsM, (d8, SP) */
756 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x34)
9cacebf5 757 {
6c02c64c
KB
758 int fsM, sM, Y;
759 LONGEST d8;
760 gdb_byte buf[2];
761
762 Y = (instr[1] & 0x02) >> 1;
763
764 status = target_read_memory (pc + 2, buf, 2);
765 if (status != 0)
766 break;
767
768 sM = (buf[0] & 0xf0) >> 4;
769 fsM = (Y << 4) | sM;
e17a4113 770 d8 = extract_signed_integer (&buf[1], 1, byte_order);
6c02c64c 771
f7b7ed97
TT
772 stack.store (pv_add_constant (regs[E_SP_REGNUM], d8),
773 4, regs[E_FS0_REGNUM + fsM]);
6c02c64c
KB
774
775 pc += 4;
9cacebf5 776 }
6c02c64c
KB
777 /* fmov fsM, (d24, SP) */
778 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x34)
779 {
780 int fsM, sM, Y;
781 LONGEST d24;
782 gdb_byte buf[4];
9cacebf5 783
6c02c64c 784 Y = (instr[1] & 0x02) >> 1;
9cacebf5 785
6c02c64c
KB
786 status = target_read_memory (pc + 2, buf, 4);
787 if (status != 0)
788 break;
9cacebf5 789
6c02c64c
KB
790 sM = (buf[0] & 0xf0) >> 4;
791 fsM = (Y << 4) | sM;
e17a4113 792 d24 = extract_signed_integer (&buf[1], 3, byte_order);
9cacebf5 793
f7b7ed97
TT
794 stack.store (pv_add_constant (regs[E_SP_REGNUM], d24),
795 4, regs[E_FS0_REGNUM + fsM]);
9cacebf5 796
6c02c64c
KB
797 pc += 6;
798 }
799 /* fmov fsM, (d32, SP) */
800 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x34)
801 {
802 int fsM, sM, Y;
803 LONGEST d32;
804 gdb_byte buf[5];
9cacebf5 805
6c02c64c 806 Y = (instr[1] & 0x02) >> 1;
9cacebf5 807
6c02c64c
KB
808 status = target_read_memory (pc + 2, buf, 5);
809 if (status != 0)
810 break;
811
812 sM = (buf[0] & 0xf0) >> 4;
813 fsM = (Y << 4) | sM;
e17a4113 814 d32 = extract_signed_integer (&buf[1], 4, byte_order);
6c02c64c 815
f7b7ed97
TT
816 stack.store (pv_add_constant (regs[E_SP_REGNUM], d32),
817 4, regs[E_FS0_REGNUM + fsM]);
6c02c64c
KB
818
819 pc += 7;
820 }
821 /* fmov fsM, (rN+) */
822 else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x31)
823 {
824 int fsM, sM, Y, rN, rN_regnum;
825 gdb_byte buf[1];
826
827 Y = (instr[1] & 0x02) >> 1;
828
829 status = target_read_memory (pc + 2, buf, 1);
830 if (status != 0)
831 break;
832
833 sM = (buf[0] & 0xf0) >> 4;
834 rN = buf[0] & 0x0f;
835 fsM = (Y << 4) | sM;
836
837 rN_regnum = translate_rreg (rN);
838
f7b7ed97
TT
839 stack.store (regs[rN_regnum], 4,
840 regs[E_FS0_REGNUM + fsM]);
6c02c64c
KB
841 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4);
842
843 pc += 3;
844 }
845 /* fmov fsM, (rN+, imm8) */
846 else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x31)
847 {
848 int fsM, sM, Y, rN, rN_regnum;
849 LONGEST imm8;
850 gdb_byte buf[2];
851
852 Y = (instr[1] & 0x02) >> 1;
853
854 status = target_read_memory (pc + 2, buf, 2);
855 if (status != 0)
856 break;
857
858 sM = (buf[0] & 0xf0) >> 4;
859 rN = buf[0] & 0x0f;
860 fsM = (Y << 4) | sM;
e17a4113 861 imm8 = extract_signed_integer (&buf[1], 1, byte_order);
6c02c64c
KB
862
863 rN_regnum = translate_rreg (rN);
864
f7b7ed97 865 stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
6c02c64c
KB
866 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8);
867
868 pc += 4;
869 }
870 /* fmov fsM, (rN+, imm24) */
871 else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x31)
872 {
873 int fsM, sM, Y, rN, rN_regnum;
874 LONGEST imm24;
875 gdb_byte buf[4];
876
877 Y = (instr[1] & 0x02) >> 1;
878
879 status = target_read_memory (pc + 2, buf, 4);
880 if (status != 0)
881 break;
882
883 sM = (buf[0] & 0xf0) >> 4;
884 rN = buf[0] & 0x0f;
885 fsM = (Y << 4) | sM;
e17a4113 886 imm24 = extract_signed_integer (&buf[1], 3, byte_order);
6c02c64c
KB
887
888 rN_regnum = translate_rreg (rN);
889
f7b7ed97 890 stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
6c02c64c
KB
891 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24);
892
893 pc += 6;
894 }
895 /* fmov fsM, (rN+, imm32) */
896 else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x31)
897 {
898 int fsM, sM, Y, rN, rN_regnum;
899 LONGEST imm32;
900 gdb_byte buf[5];
901
902 Y = (instr[1] & 0x02) >> 1;
903
904 status = target_read_memory (pc + 2, buf, 5);
905 if (status != 0)
906 break;
907
908 sM = (buf[0] & 0xf0) >> 4;
909 rN = buf[0] & 0x0f;
910 fsM = (Y << 4) | sM;
e17a4113 911 imm32 = extract_signed_integer (&buf[1], 4, byte_order);
6c02c64c
KB
912
913 rN_regnum = translate_rreg (rN);
914
f7b7ed97 915 stack.store (regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]);
6c02c64c
KB
916 regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32);
917
918 pc += 7;
919 }
920 /* mov imm8, aN */
921 else if ((instr[0] & 0xf0) == 0x90)
922 {
923 int aN = instr[0] & 0x03;
924 LONGEST imm8;
9cacebf5 925
e17a4113 926 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
9cacebf5 927
6c02c64c
KB
928 regs[E_A0_REGNUM + aN] = pv_constant (imm8);
929 pc += 2;
930 }
931 /* mov imm16, aN */
932 else if ((instr[0] & 0xfc) == 0x24)
933 {
934 int aN = instr[0] & 0x03;
935 gdb_byte buf[2];
936 LONGEST imm16;
937
938 status = target_read_memory (pc + 1, buf, 2);
939 if (status != 0)
940 break;
941
e17a4113 942 imm16 = extract_signed_integer (buf, 2, byte_order);
6c02c64c
KB
943 regs[E_A0_REGNUM + aN] = pv_constant (imm16);
944 pc += 3;
945 }
946 /* mov imm32, aN */
947 else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xdc))
948 {
949 int aN = instr[1] & 0x03;
950 gdb_byte buf[4];
951 LONGEST imm32;
952
953 status = target_read_memory (pc + 2, buf, 4);
954 if (status != 0)
955 break;
956
e17a4113 957 imm32 = extract_signed_integer (buf, 4, byte_order);
6c02c64c
KB
958 regs[E_A0_REGNUM + aN] = pv_constant (imm32);
959 pc += 6;
960 }
961 /* mov imm8, dN */
962 else if ((instr[0] & 0xf0) == 0x80)
963 {
964 int dN = instr[0] & 0x03;
965 LONGEST imm8;
966
e17a4113 967 imm8 = extract_signed_integer (&instr[1], 1, byte_order);
6c02c64c
KB
968
969 regs[E_D0_REGNUM + dN] = pv_constant (imm8);
970 pc += 2;
971 }
972 /* mov imm16, dN */
973 else if ((instr[0] & 0xfc) == 0x2c)
974 {
975 int dN = instr[0] & 0x03;
976 gdb_byte buf[2];
977 LONGEST imm16;
978
979 status = target_read_memory (pc + 1, buf, 2);
980 if (status != 0)
981 break;
982
e17a4113 983 imm16 = extract_signed_integer (buf, 2, byte_order);
6c02c64c
KB
984 regs[E_D0_REGNUM + dN] = pv_constant (imm16);
985 pc += 3;
986 }
987 /* mov imm32, dN */
988 else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xcc))
989 {
990 int dN = instr[1] & 0x03;
991 gdb_byte buf[4];
992 LONGEST imm32;
993
994 status = target_read_memory (pc + 2, buf, 4);
995 if (status != 0)
996 break;
997
e17a4113 998 imm32 = extract_signed_integer (buf, 4, byte_order);
6c02c64c
KB
999 regs[E_D0_REGNUM + dN] = pv_constant (imm32);
1000 pc += 6;
1001 }
1002 else
1003 {
1004 /* We've hit some instruction that we don't recognize. Hopefully,
1005 we have enough to do prologue analysis. */
1006 break;
1007 }
1008 }
1009
1010 /* Is the frame size (offset, really) a known constant? */
1011 if (pv_is_register (regs[E_SP_REGNUM], E_SP_REGNUM))
1012 result->frame_size = regs[E_SP_REGNUM].k;
9cacebf5 1013
6c02c64c
KB
1014 /* Was the frame pointer initialized? */
1015 if (pv_is_register (regs[E_A3_REGNUM], E_SP_REGNUM))
1016 {
1017 result->has_frame_ptr = 1;
1018 result->frame_ptr_offset = regs[E_A3_REGNUM].k;
9cacebf5 1019 }
6c02c64c
KB
1020
1021 /* Record where all the registers were saved. */
f7b7ed97 1022 stack.scan (check_for_saved, (void *) result);
6c02c64c
KB
1023
1024 result->prologue_end = after_last_frame_setup_insn;
9cacebf5
MS
1025}
1026
342ee437
MS
1027/* Function: skip_prologue
1028 Return the address of the first inst past the prologue of the function. */
1029
1030static CORE_ADDR
6093d2eb 1031mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
342ee437 1032{
2c02bd72 1033 const char *name;
6c02c64c
KB
1034 CORE_ADDR func_addr, func_end;
1035 struct mn10300_prologue p;
1036
1037 /* Try to find the extent of the function that contains PC. */
1038 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
1039 return pc;
1040
1041 mn10300_analyze_prologue (gdbarch, pc, func_end, &p);
1042 return p.prologue_end;
342ee437
MS
1043}
1044
6c02c64c
KB
1045/* Wrapper for mn10300_analyze_prologue: find the function start;
1046 use the current frame PC as the limit, then
1047 invoke mn10300_analyze_prologue and return its result. */
1048static struct mn10300_prologue *
1049mn10300_analyze_frame_prologue (struct frame_info *this_frame,
1050 void **this_prologue_cache)
342ee437 1051{
6c02c64c 1052 if (!*this_prologue_cache)
93d42b30 1053 {
6c02c64c
KB
1054 CORE_ADDR func_start, stop_addr;
1055
1056 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct mn10300_prologue);
1057
1058 func_start = get_frame_func (this_frame);
1059 stop_addr = get_frame_pc (this_frame);
1060
1061 /* If we couldn't find any function containing the PC, then
1062 just initialize the prologue cache, but don't do anything. */
1063 if (!func_start)
1064 stop_addr = func_start;
1065
1066 mn10300_analyze_prologue (get_frame_arch (this_frame),
19ba03f4
SM
1067 func_start, stop_addr,
1068 ((struct mn10300_prologue *)
1069 *this_prologue_cache));
93d42b30 1070 }
342ee437 1071
19ba03f4 1072 return (struct mn10300_prologue *) *this_prologue_cache;
6c02c64c
KB
1073}
1074
1075/* Given the next frame and a prologue cache, return this frame's
1076 base. */
1077static CORE_ADDR
1078mn10300_frame_base (struct frame_info *this_frame, void **this_prologue_cache)
1079{
1080 struct mn10300_prologue *p
1081 = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache);
1082
1083 /* In functions that use alloca, the distance between the stack
1084 pointer and the frame base varies dynamically, so we can't use
1085 the SP plus static information like prologue analysis to find the
1086 frame base. However, such functions must have a frame pointer,
1087 to be able to restore the SP on exit. So whenever we do have a
1088 frame pointer, use that to find the base. */
1089 if (p->has_frame_ptr)
1090 {
1091 CORE_ADDR fp = get_frame_register_unsigned (this_frame, E_A3_REGNUM);
1092 return fp - p->frame_ptr_offset;
1093 }
1094 else
1095 {
1096 CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM);
1097 return sp - p->frame_size;
1098 }
342ee437
MS
1099}
1100
342ee437 1101static void
94afd7a6 1102mn10300_frame_this_id (struct frame_info *this_frame,
342ee437
MS
1103 void **this_prologue_cache,
1104 struct frame_id *this_id)
1105{
025bb325
MS
1106 *this_id = frame_id_build (mn10300_frame_base (this_frame,
1107 this_prologue_cache),
6c02c64c 1108 get_frame_func (this_frame));
342ee437 1109
342ee437
MS
1110}
1111
94afd7a6
UW
1112static struct value *
1113mn10300_frame_prev_register (struct frame_info *this_frame,
6c02c64c 1114 void **this_prologue_cache, int regnum)
342ee437 1115{
6c02c64c
KB
1116 struct mn10300_prologue *p
1117 = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache);
1118 CORE_ADDR frame_base = mn10300_frame_base (this_frame, this_prologue_cache);
6c02c64c
KB
1119
1120 if (regnum == E_SP_REGNUM)
1121 return frame_unwind_got_constant (this_frame, regnum, frame_base);
1122
1123 /* If prologue analysis says we saved this register somewhere,
1124 return a description of the stack slot holding it. */
1125 if (p->reg_offset[regnum] != 1)
1126 return frame_unwind_got_memory (this_frame, regnum,
1127 frame_base + p->reg_offset[regnum]);
1128
1129 /* Otherwise, presume we haven't changed the value of this
1130 register, and get it from the next frame. */
1131 return frame_unwind_got_register (this_frame, regnum, regnum);
342ee437
MS
1132}
1133
1134static const struct frame_unwind mn10300_frame_unwind = {
1135 NORMAL_FRAME,
8fbca658 1136 default_frame_unwind_stop_reason,
342ee437 1137 mn10300_frame_this_id,
94afd7a6
UW
1138 mn10300_frame_prev_register,
1139 NULL,
1140 default_frame_sniffer
342ee437
MS
1141};
1142
342ee437
MS
1143static void
1144mn10300_frame_unwind_init (struct gdbarch *gdbarch)
1145{
94afd7a6
UW
1146 dwarf2_append_unwinders (gdbarch);
1147 frame_unwind_append_unwinder (gdbarch, &mn10300_frame_unwind);
342ee437
MS
1148}
1149
1150/* Function: push_dummy_call
1151 *
1152 * Set up machine state for a target call, including
1153 * function arguments, stack, return address, etc.
1154 *
1155 */
1156
1157static CORE_ADDR
1158mn10300_push_dummy_call (struct gdbarch *gdbarch,
1159 struct value *target_func,
1160 struct regcache *regcache,
1161 CORE_ADDR bp_addr,
1162 int nargs, struct value **args,
1163 CORE_ADDR sp,
cf84fa6b 1164 function_call_return_method return_method,
342ee437
MS
1165 CORE_ADDR struct_addr)
1166{
e17a4113 1167 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
342ee437 1168 const int push_size = register_size (gdbarch, E_PC_REGNUM);
1fb1ca27 1169 int regs_used;
342ee437
MS
1170 int len, arg_len;
1171 int stack_offset = 0;
1172 int argnum;
948f8e3d 1173 const gdb_byte *val;
b8b6e72f 1174 gdb_byte valbuf[MN10300_MAX_REGISTER_SIZE];
342ee437 1175
342ee437
MS
1176 /* This should be a nop, but align the stack just in case something
1177 went wrong. Stacks are four byte aligned on the mn10300. */
1178 sp &= ~3;
1179
1180 /* Now make space on the stack for the args.
1181
1182 XXX This doesn't appear to handle pass-by-invisible reference
1183 arguments. */
cf84fa6b 1184 regs_used = (return_method == return_method_struct) ? 1 : 0;
342ee437
MS
1185 for (len = 0, argnum = 0; argnum < nargs; argnum++)
1186 {
1187 arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3;
342ee437
MS
1188 while (regs_used < 2 && arg_len > 0)
1189 {
1190 regs_used++;
1191 arg_len -= push_size;
1192 }
1193 len += arg_len;
1194 }
1195
1196 /* Allocate stack space. */
1197 sp -= len;
1198
cf84fa6b 1199 if (return_method == return_method_struct)
1fb1ca27
MS
1200 {
1201 regs_used = 1;
9c9acae0 1202 regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr);
1fb1ca27
MS
1203 }
1204 else
1205 regs_used = 0;
1206
025bb325 1207 /* Push all arguments onto the stack. */
342ee437
MS
1208 for (argnum = 0; argnum < nargs; argnum++)
1209 {
1fb1ca27
MS
1210 /* FIXME what about structs? Unions? */
1211 if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT
1212 && TYPE_LENGTH (value_type (*args)) > 8)
1213 {
1214 /* Change to pointer-to-type. */
1215 arg_len = push_size;
b8b6e72f 1216 gdb_assert (push_size <= MN10300_MAX_REGISTER_SIZE);
e17a4113 1217 store_unsigned_integer (valbuf, push_size, byte_order,
42ae5230 1218 value_address (*args));
1fb1ca27
MS
1219 val = &valbuf[0];
1220 }
1221 else
1222 {
1223 arg_len = TYPE_LENGTH (value_type (*args));
948f8e3d 1224 val = value_contents (*args);
1fb1ca27 1225 }
342ee437
MS
1226
1227 while (regs_used < 2 && arg_len > 0)
1228 {
9c9acae0 1229 regcache_cooked_write_unsigned (regcache, regs_used,
e17a4113 1230 extract_unsigned_integer (val, push_size, byte_order));
342ee437
MS
1231 val += push_size;
1232 arg_len -= push_size;
1233 regs_used++;
1234 }
1235
1236 while (arg_len > 0)
1237 {
1238 write_memory (sp + stack_offset, val, push_size);
1239 arg_len -= push_size;
1240 val += push_size;
1241 stack_offset += push_size;
1242 }
1243
1244 args++;
1245 }
1246
1247 /* Make space for the flushback area. */
1248 sp -= 8;
1249
1250 /* Push the return address that contains the magic breakpoint. */
1251 sp -= 4;
e17a4113 1252 write_memory_unsigned_integer (sp, push_size, byte_order, bp_addr);
a64ae7e0
CV
1253
1254 /* The CPU also writes the return address always into the
1255 MDR register on "call". */
1256 regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr);
1257
342ee437
MS
1258 /* Update $sp. */
1259 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp);
ee3a2f01
KB
1260
1261 /* On the mn10300, it's possible to move some of the stack adjustment
1262 and saving of the caller-save registers out of the prologue and
1263 into the call sites. (When using gcc, this optimization can
1264 occur when using the -mrelax switch.) If this occurs, the dwarf2
1265 info will reflect this fact. We can test to see if this is the
1266 case by creating a new frame using the current stack pointer and
1267 the address of the function that we're about to call. We then
1268 unwind SP and see if it's different than the SP of our newly
1269 created frame. If the SP values are the same, the caller is not
1270 expected to allocate any additional stack. On the other hand, if
1271 the SP values are different, the difference determines the
1272 additional stack that must be allocated.
1273
1274 Note that we don't update the return value though because that's
1275 the value of the stack just after pushing the arguments, but prior
1276 to performing the call. This value is needed in order to
025bb325 1277 construct the frame ID of the dummy call. */
ee3a2f01
KB
1278 {
1279 CORE_ADDR func_addr = find_function_addr (target_func, NULL);
1280 CORE_ADDR unwound_sp
aee6c3cd 1281 = gdbarch_unwind_sp (gdbarch, create_new_frame (sp, func_addr));
ee3a2f01
KB
1282 if (sp != unwound_sp)
1283 regcache_cooked_write_unsigned (regcache, E_SP_REGNUM,
1284 sp - (unwound_sp - sp));
1285 }
1286
342ee437
MS
1287 return sp;
1288}
1289
336c28c5
KB
1290/* If DWARF2 is a register number appearing in Dwarf2 debug info, then
1291 mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB
1292 register number. Why don't Dwarf2 and GDB use the same numbering?
1293 Who knows? But since people have object files lying around with
1294 the existing Dwarf2 numbering, and other people have written stubs
1295 to work with the existing GDB, neither of them can change. So we
1296 just have to cope. */
1297static int
be8626e0 1298mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2)
336c28c5 1299{
c9f4d572 1300 /* This table is supposed to be shaped like the gdbarch_register_name
336c28c5
KB
1301 initializer in gcc/config/mn10300/mn10300.h. Registers which
1302 appear in GCC's numbering, but have no counterpart in GDB's
1303 world, are marked with a -1. */
1304 static int dwarf2_to_gdb[] = {
c5bb7362
KB
1305 E_D0_REGNUM, E_D1_REGNUM, E_D2_REGNUM, E_D3_REGNUM,
1306 E_A0_REGNUM, E_A1_REGNUM, E_A2_REGNUM, E_A3_REGNUM,
1307 -1, E_SP_REGNUM,
1308
1309 E_E0_REGNUM, E_E1_REGNUM, E_E2_REGNUM, E_E3_REGNUM,
1310 E_E4_REGNUM, E_E5_REGNUM, E_E6_REGNUM, E_E7_REGNUM,
1311
1312 E_FS0_REGNUM + 0, E_FS0_REGNUM + 1, E_FS0_REGNUM + 2, E_FS0_REGNUM + 3,
1313 E_FS0_REGNUM + 4, E_FS0_REGNUM + 5, E_FS0_REGNUM + 6, E_FS0_REGNUM + 7,
1314
1315 E_FS0_REGNUM + 8, E_FS0_REGNUM + 9, E_FS0_REGNUM + 10, E_FS0_REGNUM + 11,
1316 E_FS0_REGNUM + 12, E_FS0_REGNUM + 13, E_FS0_REGNUM + 14, E_FS0_REGNUM + 15,
1317
1318 E_FS0_REGNUM + 16, E_FS0_REGNUM + 17, E_FS0_REGNUM + 18, E_FS0_REGNUM + 19,
1319 E_FS0_REGNUM + 20, E_FS0_REGNUM + 21, E_FS0_REGNUM + 22, E_FS0_REGNUM + 23,
1320
1321 E_FS0_REGNUM + 24, E_FS0_REGNUM + 25, E_FS0_REGNUM + 26, E_FS0_REGNUM + 27,
1322 E_FS0_REGNUM + 28, E_FS0_REGNUM + 29, E_FS0_REGNUM + 30, E_FS0_REGNUM + 31,
1323
1324 E_MDR_REGNUM, E_PSW_REGNUM, E_PC_REGNUM
336c28c5
KB
1325 };
1326
1327 if (dwarf2 < 0
bbc1a784 1328 || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb))
0fde2c53 1329 return -1;
336c28c5
KB
1330
1331 return dwarf2_to_gdb[dwarf2];
1332}
342ee437
MS
1333
1334static struct gdbarch *
1335mn10300_gdbarch_init (struct gdbarch_info info,
1336 struct gdbarch_list *arches)
1337{
1338 struct gdbarch *gdbarch;
1339 struct gdbarch_tdep *tdep;
4640dd91 1340 int num_regs;
342ee437
MS
1341
1342 arches = gdbarch_list_lookup_by_info (arches, &info);
1343 if (arches != NULL)
1344 return arches->gdbarch;
1345
cdd238da 1346 tdep = XCNEW (struct gdbarch_tdep);
342ee437
MS
1347 gdbarch = gdbarch_alloc (&info, tdep);
1348
1349 switch (info.bfd_arch_info->mach)
1350 {
1351 case 0:
1352 case bfd_mach_mn10300:
1353 set_gdbarch_register_name (gdbarch, mn10300_generic_register_name);
1354 tdep->am33_mode = 0;
4640dd91 1355 num_regs = 32;
342ee437
MS
1356 break;
1357 case bfd_mach_am33:
1358 set_gdbarch_register_name (gdbarch, am33_register_name);
1359 tdep->am33_mode = 1;
4640dd91
KB
1360 num_regs = 32;
1361 break;
1362 case bfd_mach_am33_2:
1363 set_gdbarch_register_name (gdbarch, am33_2_register_name);
1364 tdep->am33_mode = 2;
1365 num_regs = 64;
1366 set_gdbarch_fp0_regnum (gdbarch, 32);
342ee437
MS
1367 break;
1368 default:
1369 internal_error (__FILE__, __LINE__,
1370 _("mn10300_gdbarch_init: Unknown mn10300 variant"));
1371 break;
1372 }
1373
1b31f75d
KB
1374 /* By default, chars are unsigned. */
1375 set_gdbarch_char_signed (gdbarch, 0);
1376
342ee437 1377 /* Registers. */
4640dd91 1378 set_gdbarch_num_regs (gdbarch, num_regs);
342ee437
MS
1379 set_gdbarch_register_type (gdbarch, mn10300_register_type);
1380 set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue);
342ee437
MS
1381 set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM);
1382 set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM);
336c28c5 1383 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum);
342ee437
MS
1384
1385 /* Stack unwinding. */
1386 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1387 /* Breakpoints. */
04180708
YQ
1388 set_gdbarch_breakpoint_kind_from_pc (gdbarch,
1389 mn10300_breakpoint::kind_from_pc);
1390 set_gdbarch_sw_breakpoint_from_kind (gdbarch,
1391 mn10300_breakpoint::bp_from_kind);
025bb325 1392 /* decr_pc_after_break? */
342ee437
MS
1393
1394 /* Stage 2 */
99fe5f9d 1395 set_gdbarch_return_value (gdbarch, mn10300_return_value);
342ee437
MS
1396
1397 /* Stage 3 -- get target calls working. */
1398 set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call);
1399 /* set_gdbarch_return_value (store, extract) */
1400
1401
1402 mn10300_frame_unwind_init (gdbarch);
1403
697e3bc9
KB
1404 /* Hook in ABI-specific overrides, if they have been registered. */
1405 gdbarch_init_osabi (info, gdbarch);
1406
342ee437
MS
1407 return gdbarch;
1408}
1409
025bb325 1410/* Dump out the mn10300 specific architecture information. */
342ee437
MS
1411
1412static void
d93859e2 1413mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file)
342ee437 1414{
d93859e2 1415 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
342ee437
MS
1416 fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n",
1417 tdep->am33_mode);
1418}
1419
1420void
1421_initialize_mn10300_tdep (void)
1422{
1423 gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep);
1424}
1425
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