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342ee437 MS |
1 | /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger. |
2 | ||
6aba47ca | 3 | Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
0fb0cc75 | 4 | 2007, 2008, 2009 Free Software Foundation, Inc. |
342ee437 MS |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 10 | the Free Software Foundation; either version 3 of the License, or |
342ee437 MS |
11 | (at your option) any later version. |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
342ee437 | 20 | |
342ee437 MS |
21 | #include "defs.h" |
22 | #include "arch-utils.h" | |
23 | #include "dis-asm.h" | |
24 | #include "gdbtypes.h" | |
25 | #include "regcache.h" | |
26 | #include "gdb_string.h" | |
27 | #include "gdb_assert.h" | |
28 | #include "gdbcore.h" /* for write_memory_unsigned_integer */ | |
29 | #include "value.h" | |
30 | #include "gdbtypes.h" | |
31 | #include "frame.h" | |
32 | #include "frame-unwind.h" | |
33 | #include "frame-base.h" | |
342ee437 MS |
34 | #include "symtab.h" |
35 | #include "dwarf2-frame.h" | |
697e3bc9 | 36 | #include "osabi.h" |
ee3a2f01 | 37 | #include "infcall.h" |
6c02c64c | 38 | #include "prologue-value.h" |
effa26a9 | 39 | #include "target.h" |
342ee437 MS |
40 | |
41 | #include "mn10300-tdep.h" | |
42 | ||
6c02c64c KB |
43 | |
44 | /* The am33-2 has 64 registers. */ | |
45 | #define MN10300_MAX_NUM_REGS 64 | |
46 | ||
47 | /* This structure holds the results of a prologue analysis. */ | |
48 | struct mn10300_prologue | |
49 | { | |
50 | /* The offset from the frame base to the stack pointer --- always | |
51 | zero or negative. | |
52 | ||
53 | Calling this a "size" is a bit misleading, but given that the | |
54 | stack grows downwards, using offsets for everything keeps one | |
55 | from going completely sign-crazy: you never change anything's | |
56 | sign for an ADD instruction; always change the second operand's | |
57 | sign for a SUB instruction; and everything takes care of | |
58 | itself. */ | |
59 | int frame_size; | |
60 | ||
61 | /* Non-zero if this function has initialized the frame pointer from | |
62 | the stack pointer, zero otherwise. */ | |
63 | int has_frame_ptr; | |
64 | ||
65 | /* If has_frame_ptr is non-zero, this is the offset from the frame | |
66 | base to where the frame pointer points. This is always zero or | |
67 | negative. */ | |
68 | int frame_ptr_offset; | |
69 | ||
70 | /* The address of the first instruction at which the frame has been | |
71 | set up and the arguments are where the debug info says they are | |
72 | --- as best as we can tell. */ | |
73 | CORE_ADDR prologue_end; | |
74 | ||
75 | /* reg_offset[R] is the offset from the CFA at which register R is | |
76 | saved, or 1 if register R has not been saved. (Real values are | |
77 | always zero or negative.) */ | |
78 | int reg_offset[MN10300_MAX_NUM_REGS]; | |
79 | }; | |
80 | ||
342ee437 MS |
81 | |
82 | /* Compute the alignment required by a type. */ | |
83 | ||
84 | static int | |
85 | mn10300_type_align (struct type *type) | |
86 | { | |
87 | int i, align = 1; | |
88 | ||
89 | switch (TYPE_CODE (type)) | |
90 | { | |
91 | case TYPE_CODE_INT: | |
92 | case TYPE_CODE_ENUM: | |
93 | case TYPE_CODE_SET: | |
94 | case TYPE_CODE_RANGE: | |
95 | case TYPE_CODE_CHAR: | |
96 | case TYPE_CODE_BOOL: | |
97 | case TYPE_CODE_FLT: | |
98 | case TYPE_CODE_PTR: | |
99 | case TYPE_CODE_REF: | |
100 | return TYPE_LENGTH (type); | |
101 | ||
102 | case TYPE_CODE_COMPLEX: | |
103 | return TYPE_LENGTH (type) / 2; | |
104 | ||
105 | case TYPE_CODE_STRUCT: | |
106 | case TYPE_CODE_UNION: | |
107 | for (i = 0; i < TYPE_NFIELDS (type); i++) | |
108 | { | |
109 | int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i)); | |
110 | while (align < falign) | |
111 | align <<= 1; | |
112 | } | |
113 | return align; | |
114 | ||
115 | case TYPE_CODE_ARRAY: | |
116 | /* HACK! Structures containing arrays, even small ones, are not | |
117 | elligible for returning in registers. */ | |
118 | return 256; | |
119 | ||
120 | case TYPE_CODE_TYPEDEF: | |
121 | return mn10300_type_align (check_typedef (type)); | |
122 | ||
123 | default: | |
124 | internal_error (__FILE__, __LINE__, _("bad switch")); | |
125 | } | |
126 | } | |
127 | ||
342ee437 | 128 | /* Should call_function allocate stack space for a struct return? */ |
342ee437 | 129 | static int |
99fe5f9d | 130 | mn10300_use_struct_convention (struct type *type) |
342ee437 MS |
131 | { |
132 | /* Structures bigger than a pair of words can't be returned in | |
133 | registers. */ | |
134 | if (TYPE_LENGTH (type) > 8) | |
135 | return 1; | |
136 | ||
137 | switch (TYPE_CODE (type)) | |
138 | { | |
139 | case TYPE_CODE_STRUCT: | |
140 | case TYPE_CODE_UNION: | |
141 | /* Structures with a single field are handled as the field | |
142 | itself. */ | |
143 | if (TYPE_NFIELDS (type) == 1) | |
99fe5f9d | 144 | return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0)); |
342ee437 MS |
145 | |
146 | /* Structures with word or double-word size are passed in memory, as | |
147 | long as they require at least word alignment. */ | |
148 | if (mn10300_type_align (type) >= 4) | |
149 | return 0; | |
150 | ||
151 | return 1; | |
152 | ||
153 | /* Arrays are addressable, so they're never returned in | |
154 | registers. This condition can only hold when the array is | |
155 | the only field of a struct or union. */ | |
156 | case TYPE_CODE_ARRAY: | |
157 | return 1; | |
158 | ||
159 | case TYPE_CODE_TYPEDEF: | |
99fe5f9d | 160 | return mn10300_use_struct_convention (check_typedef (type)); |
342ee437 MS |
161 | |
162 | default: | |
163 | return 0; | |
164 | } | |
165 | } | |
166 | ||
342ee437 | 167 | static void |
99fe5f9d | 168 | mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type, |
342ee437 MS |
169 | struct regcache *regcache, const void *valbuf) |
170 | { | |
342ee437 MS |
171 | int len = TYPE_LENGTH (type); |
172 | int reg, regsz; | |
173 | ||
174 | if (TYPE_CODE (type) == TYPE_CODE_PTR) | |
175 | reg = 4; | |
176 | else | |
177 | reg = 0; | |
178 | ||
179 | regsz = register_size (gdbarch, reg); | |
180 | ||
181 | if (len <= regsz) | |
182 | regcache_raw_write_part (regcache, reg, 0, len, valbuf); | |
183 | else if (len <= 2 * regsz) | |
184 | { | |
185 | regcache_raw_write (regcache, reg, valbuf); | |
186 | gdb_assert (regsz == register_size (gdbarch, reg + 1)); | |
187 | regcache_raw_write_part (regcache, reg+1, 0, | |
188 | len - regsz, (char *) valbuf + regsz); | |
189 | } | |
190 | else | |
191 | internal_error (__FILE__, __LINE__, | |
192 | _("Cannot store return value %d bytes long."), len); | |
193 | } | |
194 | ||
342ee437 | 195 | static void |
99fe5f9d | 196 | mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type, |
342ee437 MS |
197 | struct regcache *regcache, void *valbuf) |
198 | { | |
342ee437 MS |
199 | char buf[MAX_REGISTER_SIZE]; |
200 | int len = TYPE_LENGTH (type); | |
201 | int reg, regsz; | |
202 | ||
203 | if (TYPE_CODE (type) == TYPE_CODE_PTR) | |
204 | reg = 4; | |
205 | else | |
206 | reg = 0; | |
207 | ||
208 | regsz = register_size (gdbarch, reg); | |
209 | if (len <= regsz) | |
210 | { | |
211 | regcache_raw_read (regcache, reg, buf); | |
212 | memcpy (valbuf, buf, len); | |
213 | } | |
214 | else if (len <= 2 * regsz) | |
215 | { | |
216 | regcache_raw_read (regcache, reg, buf); | |
217 | memcpy (valbuf, buf, regsz); | |
218 | gdb_assert (regsz == register_size (gdbarch, reg + 1)); | |
219 | regcache_raw_read (regcache, reg + 1, buf); | |
220 | memcpy ((char *) valbuf + regsz, buf, len - regsz); | |
221 | } | |
222 | else | |
223 | internal_error (__FILE__, __LINE__, | |
224 | _("Cannot extract return value %d bytes long."), len); | |
225 | } | |
226 | ||
99fe5f9d KB |
227 | /* Determine, for architecture GDBARCH, how a return value of TYPE |
228 | should be returned. If it is supposed to be returned in registers, | |
229 | and READBUF is non-zero, read the appropriate value from REGCACHE, | |
230 | and copy it into READBUF. If WRITEBUF is non-zero, write the value | |
231 | from WRITEBUF into REGCACHE. */ | |
232 | ||
233 | static enum return_value_convention | |
c055b101 CV |
234 | mn10300_return_value (struct gdbarch *gdbarch, struct type *func_type, |
235 | struct type *type, struct regcache *regcache, | |
236 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
99fe5f9d KB |
237 | { |
238 | if (mn10300_use_struct_convention (type)) | |
239 | return RETURN_VALUE_STRUCT_CONVENTION; | |
240 | ||
241 | if (readbuf) | |
242 | mn10300_extract_return_value (gdbarch, type, regcache, readbuf); | |
243 | if (writebuf) | |
244 | mn10300_store_return_value (gdbarch, type, regcache, writebuf); | |
245 | ||
246 | return RETURN_VALUE_REGISTER_CONVENTION; | |
247 | } | |
248 | ||
342ee437 MS |
249 | static char * |
250 | register_name (int reg, char **regs, long sizeof_regs) | |
251 | { | |
252 | if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0])) | |
253 | return NULL; | |
254 | else | |
255 | return regs[reg]; | |
256 | } | |
257 | ||
258 | static const char * | |
d93859e2 | 259 | mn10300_generic_register_name (struct gdbarch *gdbarch, int reg) |
342ee437 MS |
260 | { |
261 | static char *regs[] = | |
262 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
263 | "sp", "pc", "mdr", "psw", "lir", "lar", "", "", | |
264 | "", "", "", "", "", "", "", "", | |
265 | "", "", "", "", "", "", "", "fp" | |
266 | }; | |
267 | return register_name (reg, regs, sizeof regs); | |
268 | } | |
269 | ||
270 | ||
271 | static const char * | |
d93859e2 | 272 | am33_register_name (struct gdbarch *gdbarch, int reg) |
342ee437 MS |
273 | { |
274 | static char *regs[] = | |
275 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
276 | "sp", "pc", "mdr", "psw", "lir", "lar", "", | |
277 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
278 | "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", "" | |
279 | }; | |
280 | return register_name (reg, regs, sizeof regs); | |
281 | } | |
282 | ||
4640dd91 | 283 | static const char * |
d93859e2 | 284 | am33_2_register_name (struct gdbarch *gdbarch, int reg) |
4640dd91 KB |
285 | { |
286 | static char *regs[] = | |
287 | { | |
288 | "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
289 | "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0", | |
290 | "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp", | |
291 | "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "", | |
292 | "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", | |
293 | "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15", | |
294 | "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23", | |
295 | "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" | |
296 | }; | |
297 | return register_name (reg, regs, sizeof regs); | |
298 | } | |
342ee437 MS |
299 | |
300 | static struct type * | |
301 | mn10300_register_type (struct gdbarch *gdbarch, int reg) | |
302 | { | |
0dfff4cb | 303 | return builtin_type (gdbarch)->builtin_int; |
342ee437 MS |
304 | } |
305 | ||
306 | static CORE_ADDR | |
61a1198a | 307 | mn10300_read_pc (struct regcache *regcache) |
342ee437 | 308 | { |
61a1198a UW |
309 | ULONGEST val; |
310 | regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val); | |
311 | return val; | |
342ee437 MS |
312 | } |
313 | ||
314 | static void | |
61a1198a | 315 | mn10300_write_pc (struct regcache *regcache, CORE_ADDR val) |
342ee437 | 316 | { |
61a1198a | 317 | regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val); |
342ee437 MS |
318 | } |
319 | ||
320 | /* The breakpoint instruction must be the same size as the smallest | |
321 | instruction in the instruction set. | |
322 | ||
323 | The Matsushita mn10x00 processors have single byte instructions | |
324 | so we need a single byte breakpoint. Matsushita hasn't defined | |
325 | one, so we defined it ourselves. */ | |
326 | ||
327 | const static unsigned char * | |
67d57894 MD |
328 | mn10300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr, |
329 | int *bp_size) | |
342ee437 MS |
330 | { |
331 | static char breakpoint[] = {0xff}; | |
332 | *bp_size = 1; | |
333 | return breakpoint; | |
334 | } | |
335 | ||
6c02c64c KB |
336 | /* Model the semantics of pushing a register onto the stack. This |
337 | is a helper function for mn10300_analyze_prologue, below. */ | |
338 | static void | |
339 | push_reg (pv_t *regs, struct pv_area *stack, int regnum) | |
340 | { | |
341 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4); | |
342 | pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[regnum]); | |
343 | } | |
344 | ||
345 | /* Translate an "r" register number extracted from an instruction encoding | |
346 | into a GDB register number. Adapted from a simulator function | |
347 | of the same name; see am33.igen. */ | |
348 | static int | |
349 | translate_rreg (int rreg) | |
350 | { | |
351 | /* The higher register numbers actually correspond to the | |
352 | basic machine's address and data registers. */ | |
353 | if (rreg > 7 && rreg < 12) | |
354 | return E_A0_REGNUM + rreg - 8; | |
355 | else if (rreg > 11 && rreg < 16) | |
356 | return E_D0_REGNUM + rreg - 12; | |
357 | else | |
358 | return E_E0_REGNUM + rreg; | |
359 | } | |
360 | ||
361 | /* Find saved registers in a 'struct pv_area'; we pass this to pv_area_scan. | |
9cacebf5 | 362 | |
6c02c64c KB |
363 | If VALUE is a saved register, ADDR says it was saved at a constant |
364 | offset from the frame base, and SIZE indicates that the whole | |
365 | register was saved, record its offset in RESULT_UNTYPED. */ | |
9cacebf5 | 366 | static void |
6c02c64c | 367 | check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value) |
9cacebf5 | 368 | { |
6c02c64c | 369 | struct mn10300_prologue *result = (struct mn10300_prologue *) result_untyped; |
9cacebf5 | 370 | |
6c02c64c KB |
371 | if (value.kind == pvk_register |
372 | && value.k == 0 | |
373 | && pv_is_register (addr, E_SP_REGNUM) | |
374 | && size == register_size (current_gdbarch, value.reg)) | |
375 | result->reg_offset[value.reg] = addr.k; | |
376 | } | |
9cacebf5 | 377 | |
6c02c64c KB |
378 | /* Analyze the prologue to determine where registers are saved, |
379 | the end of the prologue, etc. The result of this analysis is | |
380 | returned in RESULT. See struct mn10300_prologue above for more | |
381 | information. */ | |
382 | static void | |
383 | mn10300_analyze_prologue (struct gdbarch *gdbarch, | |
384 | CORE_ADDR start_pc, CORE_ADDR limit_pc, | |
385 | struct mn10300_prologue *result) | |
386 | { | |
387 | CORE_ADDR pc, next_pc; | |
388 | int rn; | |
389 | pv_t regs[MN10300_MAX_NUM_REGS]; | |
390 | struct pv_area *stack; | |
391 | struct cleanup *back_to; | |
392 | CORE_ADDR after_last_frame_setup_insn = start_pc; | |
393 | int am33_mode = AM33_MODE (gdbarch); | |
394 | ||
395 | memset (result, 0, sizeof (*result)); | |
9cacebf5 | 396 | |
6c02c64c | 397 | for (rn = 0; rn < MN10300_MAX_NUM_REGS; rn++) |
4640dd91 | 398 | { |
6c02c64c KB |
399 | regs[rn] = pv_register (rn, 0); |
400 | result->reg_offset[rn] = 1; | |
4640dd91 | 401 | } |
6c02c64c KB |
402 | stack = make_pv_area (E_SP_REGNUM); |
403 | back_to = make_cleanup_free_pv_area (stack); | |
404 | ||
405 | /* The typical call instruction will have saved the return address on the | |
406 | stack. Space for the return address has already been preallocated in | |
407 | the caller's frame. It's possible, such as when using -mrelax with gcc | |
408 | that other registers were saved as well. If this happens, we really | |
409 | have no chance of deciphering the frame. DWARF info can save the day | |
410 | when this happens. */ | |
411 | pv_area_store (stack, regs[E_SP_REGNUM], 4, regs[E_PC_REGNUM]); | |
412 | ||
413 | pc = start_pc; | |
414 | while (pc < limit_pc) | |
4640dd91 | 415 | { |
6c02c64c KB |
416 | int status; |
417 | gdb_byte instr[2]; | |
4640dd91 | 418 | |
6c02c64c KB |
419 | /* Instructions can be as small as one byte; however, we usually |
420 | need at least two bytes to do the decoding, so fetch that many | |
421 | to begin with. */ | |
422 | status = target_read_memory (pc, instr, 2); | |
423 | if (status != 0) | |
424 | break; | |
4640dd91 | 425 | |
6c02c64c KB |
426 | /* movm [regs], sp */ |
427 | if (instr[0] == 0xcf) | |
4640dd91 | 428 | { |
6c02c64c KB |
429 | gdb_byte save_mask; |
430 | ||
431 | save_mask = instr[1]; | |
432 | ||
433 | if ((save_mask & movm_exreg0_bit) && am33_mode) | |
434 | { | |
435 | push_reg (regs, stack, E_E2_REGNUM); | |
436 | push_reg (regs, stack, E_E3_REGNUM); | |
437 | } | |
438 | if ((save_mask & movm_exreg1_bit) && am33_mode) | |
4640dd91 | 439 | { |
6c02c64c KB |
440 | push_reg (regs, stack, E_E4_REGNUM); |
441 | push_reg (regs, stack, E_E5_REGNUM); | |
442 | push_reg (regs, stack, E_E6_REGNUM); | |
443 | push_reg (regs, stack, E_E7_REGNUM); | |
4640dd91 | 444 | } |
6c02c64c KB |
445 | if ((save_mask & movm_exother_bit) && am33_mode) |
446 | { | |
447 | push_reg (regs, stack, E_E0_REGNUM); | |
448 | push_reg (regs, stack, E_E1_REGNUM); | |
449 | push_reg (regs, stack, E_MDRQ_REGNUM); | |
450 | push_reg (regs, stack, E_MCRH_REGNUM); | |
451 | push_reg (regs, stack, E_MCRL_REGNUM); | |
452 | push_reg (regs, stack, E_MCVF_REGNUM); | |
453 | } | |
454 | if (save_mask & movm_d2_bit) | |
455 | push_reg (regs, stack, E_D2_REGNUM); | |
456 | if (save_mask & movm_d3_bit) | |
457 | push_reg (regs, stack, E_D3_REGNUM); | |
458 | if (save_mask & movm_a2_bit) | |
459 | push_reg (regs, stack, E_A2_REGNUM); | |
460 | if (save_mask & movm_a3_bit) | |
461 | push_reg (regs, stack, E_A3_REGNUM); | |
462 | if (save_mask & movm_other_bit) | |
463 | { | |
464 | push_reg (regs, stack, E_D0_REGNUM); | |
465 | push_reg (regs, stack, E_D1_REGNUM); | |
466 | push_reg (regs, stack, E_A0_REGNUM); | |
467 | push_reg (regs, stack, E_A1_REGNUM); | |
468 | push_reg (regs, stack, E_MDR_REGNUM); | |
469 | push_reg (regs, stack, E_LIR_REGNUM); | |
470 | push_reg (regs, stack, E_LAR_REGNUM); | |
471 | /* The `other' bit leaves a blank area of four bytes at | |
472 | the beginning of its block of saved registers, making | |
473 | it 32 bytes long in total. */ | |
474 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], -4); | |
475 | } | |
476 | ||
477 | pc += 2; | |
478 | after_last_frame_setup_insn = pc; | |
4640dd91 | 479 | } |
6c02c64c KB |
480 | /* mov sp, aN */ |
481 | else if ((instr[0] & 0xfc) == 0x3c) | |
482 | { | |
483 | int aN = instr[0] & 0x03; | |
4640dd91 | 484 | |
6c02c64c | 485 | regs[E_A0_REGNUM + aN] = regs[E_SP_REGNUM]; |
4640dd91 | 486 | |
6c02c64c KB |
487 | pc += 1; |
488 | if (aN == 3) | |
489 | after_last_frame_setup_insn = pc; | |
490 | } | |
491 | /* mov aM, aN */ | |
492 | else if ((instr[0] & 0xf0) == 0x90 | |
493 | && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2)) | |
494 | { | |
495 | int aN = instr[0] & 0x03; | |
496 | int aM = (instr[0] & 0x0c) >> 2; | |
9cacebf5 | 497 | |
6c02c64c | 498 | regs[E_A0_REGNUM + aN] = regs[E_A0_REGNUM + aM]; |
9cacebf5 | 499 | |
6c02c64c KB |
500 | pc += 1; |
501 | } | |
502 | /* mov dM, dN */ | |
503 | else if ((instr[0] & 0xf0) == 0x80 | |
504 | && (instr[0] & 0x03) != ((instr[0] & 0x0c) >> 2)) | |
505 | { | |
506 | int dN = instr[0] & 0x03; | |
507 | int dM = (instr[0] & 0x0c) >> 2; | |
9cacebf5 | 508 | |
6c02c64c | 509 | regs[E_D0_REGNUM + dN] = regs[E_D0_REGNUM + dM]; |
9cacebf5 | 510 | |
6c02c64c KB |
511 | pc += 1; |
512 | } | |
513 | /* mov aM, dN */ | |
514 | else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xd0) | |
515 | { | |
516 | int dN = instr[1] & 0x03; | |
517 | int aM = (instr[1] & 0x0c) >> 2; | |
9cacebf5 | 518 | |
6c02c64c | 519 | regs[E_D0_REGNUM + dN] = regs[E_A0_REGNUM + aM]; |
9cacebf5 | 520 | |
6c02c64c KB |
521 | pc += 2; |
522 | } | |
523 | /* mov dM, aN */ | |
524 | else if (instr[0] == 0xf1 && (instr[1] & 0xf0) == 0xe0) | |
525 | { | |
526 | int aN = instr[1] & 0x03; | |
527 | int dM = (instr[1] & 0x0c) >> 2; | |
9cacebf5 | 528 | |
6c02c64c | 529 | regs[E_A0_REGNUM + aN] = regs[E_D0_REGNUM + dM]; |
9cacebf5 | 530 | |
6c02c64c KB |
531 | pc += 2; |
532 | } | |
533 | /* add imm8, SP */ | |
534 | else if (instr[0] == 0xf8 && instr[1] == 0xfe) | |
535 | { | |
536 | gdb_byte buf[1]; | |
537 | LONGEST imm8; | |
9cacebf5 | 538 | |
9cacebf5 | 539 | |
6c02c64c KB |
540 | status = target_read_memory (pc + 2, buf, 1); |
541 | if (status != 0) | |
542 | break; | |
9cacebf5 | 543 | |
6c02c64c KB |
544 | imm8 = extract_signed_integer (buf, 1); |
545 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm8); | |
9cacebf5 | 546 | |
6c02c64c KB |
547 | pc += 3; |
548 | /* Stack pointer adjustments are frame related. */ | |
549 | after_last_frame_setup_insn = pc; | |
550 | } | |
551 | /* add imm16, SP */ | |
552 | else if (instr[0] == 0xfa && instr[1] == 0xfe) | |
553 | { | |
554 | gdb_byte buf[2]; | |
555 | LONGEST imm16; | |
9cacebf5 | 556 | |
6c02c64c KB |
557 | status = target_read_memory (pc + 2, buf, 2); |
558 | if (status != 0) | |
559 | break; | |
9cacebf5 | 560 | |
6c02c64c KB |
561 | imm16 = extract_signed_integer (buf, 2); |
562 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm16); | |
9cacebf5 | 563 | |
6c02c64c KB |
564 | pc += 4; |
565 | /* Stack pointer adjustments are frame related. */ | |
566 | after_last_frame_setup_insn = pc; | |
567 | } | |
568 | /* add imm32, SP */ | |
569 | else if (instr[0] == 0xfc && instr[1] == 0xfe) | |
570 | { | |
571 | gdb_byte buf[4]; | |
572 | LONGEST imm32; | |
9cacebf5 | 573 | |
6c02c64c KB |
574 | status = target_read_memory (pc + 2, buf, 4); |
575 | if (status != 0) | |
576 | break; | |
9cacebf5 | 577 | |
9cacebf5 | 578 | |
6c02c64c KB |
579 | imm32 = extract_signed_integer (buf, 4); |
580 | regs[E_SP_REGNUM] = pv_add_constant (regs[E_SP_REGNUM], imm32); | |
9cacebf5 | 581 | |
6c02c64c KB |
582 | pc += 6; |
583 | /* Stack pointer adjustments are frame related. */ | |
584 | after_last_frame_setup_insn = pc; | |
585 | } | |
586 | /* add imm8, aN */ | |
587 | else if ((instr[0] & 0xfc) == 0x20) | |
588 | { | |
589 | int aN; | |
590 | LONGEST imm8; | |
9cacebf5 | 591 | |
6c02c64c KB |
592 | aN = instr[0] & 0x03; |
593 | imm8 = extract_signed_integer (&instr[1], 1); | |
9cacebf5 | 594 | |
6c02c64c KB |
595 | regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], |
596 | imm8); | |
9cacebf5 | 597 | |
6c02c64c KB |
598 | pc += 2; |
599 | } | |
600 | /* add imm16, aN */ | |
601 | else if (instr[0] == 0xfa && (instr[1] & 0xfc) == 0xd0) | |
602 | { | |
603 | int aN; | |
604 | LONGEST imm16; | |
605 | gdb_byte buf[2]; | |
9cacebf5 | 606 | |
6c02c64c | 607 | aN = instr[1] & 0x03; |
9cacebf5 | 608 | |
6c02c64c KB |
609 | status = target_read_memory (pc + 2, buf, 2); |
610 | if (status != 0) | |
611 | break; | |
9cacebf5 | 612 | |
9cacebf5 | 613 | |
6c02c64c | 614 | imm16 = extract_signed_integer (buf, 2); |
9cacebf5 | 615 | |
6c02c64c KB |
616 | regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], |
617 | imm16); | |
9cacebf5 | 618 | |
6c02c64c KB |
619 | pc += 4; |
620 | } | |
621 | /* add imm32, aN */ | |
622 | else if (instr[0] == 0xfc && (instr[1] & 0xfc) == 0xd0) | |
623 | { | |
624 | int aN; | |
625 | LONGEST imm32; | |
626 | gdb_byte buf[4]; | |
9cacebf5 | 627 | |
6c02c64c | 628 | aN = instr[1] & 0x03; |
9cacebf5 | 629 | |
6c02c64c KB |
630 | status = target_read_memory (pc + 2, buf, 4); |
631 | if (status != 0) | |
632 | break; | |
9cacebf5 | 633 | |
6c02c64c | 634 | imm32 = extract_signed_integer (buf, 2); |
9cacebf5 | 635 | |
6c02c64c KB |
636 | regs[E_A0_REGNUM + aN] = pv_add_constant (regs[E_A0_REGNUM + aN], |
637 | imm32); | |
638 | pc += 6; | |
639 | } | |
640 | /* fmov fsM, (rN) */ | |
641 | else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x30) | |
642 | { | |
643 | int fsM, sM, Y, rN; | |
644 | gdb_byte buf[1]; | |
9cacebf5 | 645 | |
6c02c64c | 646 | Y = (instr[1] & 0x02) >> 1; |
9cacebf5 | 647 | |
6c02c64c KB |
648 | status = target_read_memory (pc + 2, buf, 1); |
649 | if (status != 0) | |
650 | break; | |
9cacebf5 | 651 | |
6c02c64c KB |
652 | sM = (buf[0] & 0xf0) >> 4; |
653 | rN = buf[0] & 0x0f; | |
654 | fsM = (Y << 4) | sM; | |
9cacebf5 | 655 | |
6c02c64c KB |
656 | pv_area_store (stack, regs[translate_rreg (rN)], 4, |
657 | regs[E_FS0_REGNUM + fsM]); | |
9cacebf5 | 658 | |
6c02c64c KB |
659 | pc += 3; |
660 | } | |
661 | /* fmov fsM, (sp) */ | |
662 | else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x34) | |
663 | { | |
664 | int fsM, sM, Y; | |
665 | gdb_byte buf[1]; | |
9cacebf5 | 666 | |
6c02c64c | 667 | Y = (instr[1] & 0x02) >> 1; |
9cacebf5 | 668 | |
6c02c64c KB |
669 | status = target_read_memory (pc + 2, buf, 1); |
670 | if (status != 0) | |
671 | break; | |
9cacebf5 | 672 | |
6c02c64c KB |
673 | sM = (buf[0] & 0xf0) >> 4; |
674 | fsM = (Y << 4) | sM; | |
9cacebf5 | 675 | |
6c02c64c KB |
676 | pv_area_store (stack, regs[E_SP_REGNUM], 4, |
677 | regs[E_FS0_REGNUM + fsM]); | |
9cacebf5 | 678 | |
6c02c64c KB |
679 | pc += 3; |
680 | } | |
681 | /* fmov fsM, (rN, rI) */ | |
682 | else if (instr[0] == 0xfb && instr[1] == 0x37) | |
683 | { | |
684 | int fsM, sM, Z, rN, rI; | |
685 | gdb_byte buf[2]; | |
9cacebf5 | 686 | |
9cacebf5 | 687 | |
6c02c64c KB |
688 | status = target_read_memory (pc + 2, buf, 2); |
689 | if (status != 0) | |
690 | break; | |
83845630 | 691 | |
6c02c64c KB |
692 | rI = (buf[0] & 0xf0) >> 4; |
693 | rN = buf[0] & 0x0f; | |
694 | sM = (buf[1] & 0xf0) >> 4; | |
695 | Z = (buf[1] & 0x02) >> 1; | |
696 | fsM = (Z << 4) | sM; | |
83845630 | 697 | |
6c02c64c KB |
698 | pv_area_store (stack, |
699 | pv_add (regs[translate_rreg (rN)], | |
700 | regs[translate_rreg (rI)]), | |
701 | 4, regs[E_FS0_REGNUM + fsM]); | |
83845630 | 702 | |
6c02c64c KB |
703 | pc += 4; |
704 | } | |
705 | /* fmov fsM, (d8, rN) */ | |
706 | else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x30) | |
4640dd91 | 707 | { |
6c02c64c KB |
708 | int fsM, sM, Y, rN; |
709 | LONGEST d8; | |
710 | gdb_byte buf[2]; | |
711 | ||
712 | Y = (instr[1] & 0x02) >> 1; | |
713 | ||
714 | status = target_read_memory (pc + 2, buf, 2); | |
715 | if (status != 0) | |
716 | break; | |
717 | ||
718 | sM = (buf[0] & 0xf0) >> 4; | |
719 | rN = buf[0] & 0x0f; | |
720 | fsM = (Y << 4) | sM; | |
721 | d8 = extract_signed_integer (&buf[1], 1); | |
722 | ||
723 | pv_area_store (stack, | |
724 | pv_add_constant (regs[translate_rreg (rN)], d8), | |
725 | 4, regs[E_FS0_REGNUM + fsM]); | |
726 | ||
727 | pc += 4; | |
4640dd91 | 728 | } |
6c02c64c KB |
729 | /* fmov fsM, (d24, rN) */ |
730 | else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x30) | |
83845630 | 731 | { |
6c02c64c KB |
732 | int fsM, sM, Y, rN; |
733 | LONGEST d24; | |
734 | gdb_byte buf[4]; | |
735 | ||
736 | Y = (instr[1] & 0x02) >> 1; | |
737 | ||
738 | status = target_read_memory (pc + 2, buf, 4); | |
83845630 | 739 | if (status != 0) |
6c02c64c KB |
740 | break; |
741 | ||
742 | sM = (buf[0] & 0xf0) >> 4; | |
743 | rN = buf[0] & 0x0f; | |
744 | fsM = (Y << 4) | sM; | |
745 | d24 = extract_signed_integer (&buf[1], 3); | |
746 | ||
747 | pv_area_store (stack, | |
748 | pv_add_constant (regs[translate_rreg (rN)], d24), | |
749 | 4, regs[E_FS0_REGNUM + fsM]); | |
750 | ||
751 | pc += 6; | |
83845630 | 752 | } |
6c02c64c KB |
753 | /* fmov fsM, (d32, rN) */ |
754 | else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x30) | |
755 | { | |
756 | int fsM, sM, Y, rN; | |
757 | LONGEST d32; | |
758 | gdb_byte buf[5]; | |
4640dd91 | 759 | |
6c02c64c KB |
760 | Y = (instr[1] & 0x02) >> 1; |
761 | ||
762 | status = target_read_memory (pc + 2, buf, 5); | |
763 | if (status != 0) | |
764 | break; | |
765 | ||
766 | sM = (buf[0] & 0xf0) >> 4; | |
767 | rN = buf[0] & 0x0f; | |
768 | fsM = (Y << 4) | sM; | |
769 | d32 = extract_signed_integer (&buf[1], 4); | |
9cacebf5 | 770 | |
6c02c64c KB |
771 | pv_area_store (stack, |
772 | pv_add_constant (regs[translate_rreg (rN)], d32), | |
773 | 4, regs[E_FS0_REGNUM + fsM]); | |
774 | ||
775 | pc += 7; | |
776 | } | |
777 | /* fmov fsM, (d8, SP) */ | |
778 | else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x34) | |
9cacebf5 | 779 | { |
6c02c64c KB |
780 | int fsM, sM, Y; |
781 | LONGEST d8; | |
782 | gdb_byte buf[2]; | |
783 | ||
784 | Y = (instr[1] & 0x02) >> 1; | |
785 | ||
786 | status = target_read_memory (pc + 2, buf, 2); | |
787 | if (status != 0) | |
788 | break; | |
789 | ||
790 | sM = (buf[0] & 0xf0) >> 4; | |
791 | fsM = (Y << 4) | sM; | |
792 | d8 = extract_signed_integer (&buf[1], 1); | |
793 | ||
794 | pv_area_store (stack, | |
795 | pv_add_constant (regs[E_SP_REGNUM], d8), | |
796 | 4, regs[E_FS0_REGNUM + fsM]); | |
797 | ||
798 | pc += 4; | |
9cacebf5 | 799 | } |
6c02c64c KB |
800 | /* fmov fsM, (d24, SP) */ |
801 | else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x34) | |
802 | { | |
803 | int fsM, sM, Y; | |
804 | LONGEST d24; | |
805 | gdb_byte buf[4]; | |
9cacebf5 | 806 | |
6c02c64c | 807 | Y = (instr[1] & 0x02) >> 1; |
9cacebf5 | 808 | |
6c02c64c KB |
809 | status = target_read_memory (pc + 2, buf, 4); |
810 | if (status != 0) | |
811 | break; | |
9cacebf5 | 812 | |
6c02c64c KB |
813 | sM = (buf[0] & 0xf0) >> 4; |
814 | fsM = (Y << 4) | sM; | |
815 | d24 = extract_signed_integer (&buf[1], 3); | |
9cacebf5 | 816 | |
6c02c64c KB |
817 | pv_area_store (stack, |
818 | pv_add_constant (regs[E_SP_REGNUM], d24), | |
819 | 4, regs[E_FS0_REGNUM + fsM]); | |
9cacebf5 | 820 | |
6c02c64c KB |
821 | pc += 6; |
822 | } | |
823 | /* fmov fsM, (d32, SP) */ | |
824 | else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x34) | |
825 | { | |
826 | int fsM, sM, Y; | |
827 | LONGEST d32; | |
828 | gdb_byte buf[5]; | |
9cacebf5 | 829 | |
6c02c64c | 830 | Y = (instr[1] & 0x02) >> 1; |
9cacebf5 | 831 | |
6c02c64c KB |
832 | status = target_read_memory (pc + 2, buf, 5); |
833 | if (status != 0) | |
834 | break; | |
835 | ||
836 | sM = (buf[0] & 0xf0) >> 4; | |
837 | fsM = (Y << 4) | sM; | |
838 | d32 = extract_signed_integer (&buf[1], 4); | |
839 | ||
840 | pv_area_store (stack, | |
841 | pv_add_constant (regs[E_SP_REGNUM], d32), | |
842 | 4, regs[E_FS0_REGNUM + fsM]); | |
843 | ||
844 | pc += 7; | |
845 | } | |
846 | /* fmov fsM, (rN+) */ | |
847 | else if (instr[0] == 0xf9 && (instr[1] & 0xfd) == 0x31) | |
848 | { | |
849 | int fsM, sM, Y, rN, rN_regnum; | |
850 | gdb_byte buf[1]; | |
851 | ||
852 | Y = (instr[1] & 0x02) >> 1; | |
853 | ||
854 | status = target_read_memory (pc + 2, buf, 1); | |
855 | if (status != 0) | |
856 | break; | |
857 | ||
858 | sM = (buf[0] & 0xf0) >> 4; | |
859 | rN = buf[0] & 0x0f; | |
860 | fsM = (Y << 4) | sM; | |
861 | ||
862 | rN_regnum = translate_rreg (rN); | |
863 | ||
864 | pv_area_store (stack, regs[rN_regnum], 4, | |
865 | regs[E_FS0_REGNUM + fsM]); | |
866 | regs[rN_regnum] = pv_add_constant (regs[rN_regnum], 4); | |
867 | ||
868 | pc += 3; | |
869 | } | |
870 | /* fmov fsM, (rN+, imm8) */ | |
871 | else if (instr[0] == 0xfb && (instr[1] & 0xfd) == 0x31) | |
872 | { | |
873 | int fsM, sM, Y, rN, rN_regnum; | |
874 | LONGEST imm8; | |
875 | gdb_byte buf[2]; | |
876 | ||
877 | Y = (instr[1] & 0x02) >> 1; | |
878 | ||
879 | status = target_read_memory (pc + 2, buf, 2); | |
880 | if (status != 0) | |
881 | break; | |
882 | ||
883 | sM = (buf[0] & 0xf0) >> 4; | |
884 | rN = buf[0] & 0x0f; | |
885 | fsM = (Y << 4) | sM; | |
886 | imm8 = extract_signed_integer (&buf[1], 1); | |
887 | ||
888 | rN_regnum = translate_rreg (rN); | |
889 | ||
890 | pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); | |
891 | regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm8); | |
892 | ||
893 | pc += 4; | |
894 | } | |
895 | /* fmov fsM, (rN+, imm24) */ | |
896 | else if (instr[0] == 0xfd && (instr[1] & 0xfd) == 0x31) | |
897 | { | |
898 | int fsM, sM, Y, rN, rN_regnum; | |
899 | LONGEST imm24; | |
900 | gdb_byte buf[4]; | |
901 | ||
902 | Y = (instr[1] & 0x02) >> 1; | |
903 | ||
904 | status = target_read_memory (pc + 2, buf, 4); | |
905 | if (status != 0) | |
906 | break; | |
907 | ||
908 | sM = (buf[0] & 0xf0) >> 4; | |
909 | rN = buf[0] & 0x0f; | |
910 | fsM = (Y << 4) | sM; | |
911 | imm24 = extract_signed_integer (&buf[1], 3); | |
912 | ||
913 | rN_regnum = translate_rreg (rN); | |
914 | ||
915 | pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); | |
916 | regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm24); | |
917 | ||
918 | pc += 6; | |
919 | } | |
920 | /* fmov fsM, (rN+, imm32) */ | |
921 | else if (instr[0] == 0xfe && (instr[1] & 0xfd) == 0x31) | |
922 | { | |
923 | int fsM, sM, Y, rN, rN_regnum; | |
924 | LONGEST imm32; | |
925 | gdb_byte buf[5]; | |
926 | ||
927 | Y = (instr[1] & 0x02) >> 1; | |
928 | ||
929 | status = target_read_memory (pc + 2, buf, 5); | |
930 | if (status != 0) | |
931 | break; | |
932 | ||
933 | sM = (buf[0] & 0xf0) >> 4; | |
934 | rN = buf[0] & 0x0f; | |
935 | fsM = (Y << 4) | sM; | |
936 | imm32 = extract_signed_integer (&buf[1], 4); | |
937 | ||
938 | rN_regnum = translate_rreg (rN); | |
939 | ||
940 | pv_area_store (stack, regs[rN_regnum], 4, regs[E_FS0_REGNUM + fsM]); | |
941 | regs[rN_regnum] = pv_add_constant (regs[rN_regnum], imm32); | |
942 | ||
943 | pc += 7; | |
944 | } | |
945 | /* mov imm8, aN */ | |
946 | else if ((instr[0] & 0xf0) == 0x90) | |
947 | { | |
948 | int aN = instr[0] & 0x03; | |
949 | LONGEST imm8; | |
9cacebf5 | 950 | |
6c02c64c | 951 | imm8 = extract_signed_integer (&instr[1], 1); |
9cacebf5 | 952 | |
6c02c64c KB |
953 | regs[E_A0_REGNUM + aN] = pv_constant (imm8); |
954 | pc += 2; | |
955 | } | |
956 | /* mov imm16, aN */ | |
957 | else if ((instr[0] & 0xfc) == 0x24) | |
958 | { | |
959 | int aN = instr[0] & 0x03; | |
960 | gdb_byte buf[2]; | |
961 | LONGEST imm16; | |
962 | ||
963 | status = target_read_memory (pc + 1, buf, 2); | |
964 | if (status != 0) | |
965 | break; | |
966 | ||
967 | imm16 = extract_signed_integer (buf, 2); | |
968 | regs[E_A0_REGNUM + aN] = pv_constant (imm16); | |
969 | pc += 3; | |
970 | } | |
971 | /* mov imm32, aN */ | |
972 | else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xdc)) | |
973 | { | |
974 | int aN = instr[1] & 0x03; | |
975 | gdb_byte buf[4]; | |
976 | LONGEST imm32; | |
977 | ||
978 | status = target_read_memory (pc + 2, buf, 4); | |
979 | if (status != 0) | |
980 | break; | |
981 | ||
982 | imm32 = extract_signed_integer (buf, 4); | |
983 | regs[E_A0_REGNUM + aN] = pv_constant (imm32); | |
984 | pc += 6; | |
985 | } | |
986 | /* mov imm8, dN */ | |
987 | else if ((instr[0] & 0xf0) == 0x80) | |
988 | { | |
989 | int dN = instr[0] & 0x03; | |
990 | LONGEST imm8; | |
991 | ||
992 | imm8 = extract_signed_integer (&instr[1], 1); | |
993 | ||
994 | regs[E_D0_REGNUM + dN] = pv_constant (imm8); | |
995 | pc += 2; | |
996 | } | |
997 | /* mov imm16, dN */ | |
998 | else if ((instr[0] & 0xfc) == 0x2c) | |
999 | { | |
1000 | int dN = instr[0] & 0x03; | |
1001 | gdb_byte buf[2]; | |
1002 | LONGEST imm16; | |
1003 | ||
1004 | status = target_read_memory (pc + 1, buf, 2); | |
1005 | if (status != 0) | |
1006 | break; | |
1007 | ||
1008 | imm16 = extract_signed_integer (buf, 2); | |
1009 | regs[E_D0_REGNUM + dN] = pv_constant (imm16); | |
1010 | pc += 3; | |
1011 | } | |
1012 | /* mov imm32, dN */ | |
1013 | else if (instr[0] == 0xfc && ((instr[1] & 0xfc) == 0xcc)) | |
1014 | { | |
1015 | int dN = instr[1] & 0x03; | |
1016 | gdb_byte buf[4]; | |
1017 | LONGEST imm32; | |
1018 | ||
1019 | status = target_read_memory (pc + 2, buf, 4); | |
1020 | if (status != 0) | |
1021 | break; | |
1022 | ||
1023 | imm32 = extract_signed_integer (buf, 4); | |
1024 | regs[E_D0_REGNUM + dN] = pv_constant (imm32); | |
1025 | pc += 6; | |
1026 | } | |
1027 | else | |
1028 | { | |
1029 | /* We've hit some instruction that we don't recognize. Hopefully, | |
1030 | we have enough to do prologue analysis. */ | |
1031 | break; | |
1032 | } | |
1033 | } | |
1034 | ||
1035 | /* Is the frame size (offset, really) a known constant? */ | |
1036 | if (pv_is_register (regs[E_SP_REGNUM], E_SP_REGNUM)) | |
1037 | result->frame_size = regs[E_SP_REGNUM].k; | |
9cacebf5 | 1038 | |
6c02c64c KB |
1039 | /* Was the frame pointer initialized? */ |
1040 | if (pv_is_register (regs[E_A3_REGNUM], E_SP_REGNUM)) | |
1041 | { | |
1042 | result->has_frame_ptr = 1; | |
1043 | result->frame_ptr_offset = regs[E_A3_REGNUM].k; | |
9cacebf5 | 1044 | } |
6c02c64c KB |
1045 | |
1046 | /* Record where all the registers were saved. */ | |
1047 | pv_area_scan (stack, check_for_saved, (void *) result); | |
1048 | ||
1049 | result->prologue_end = after_last_frame_setup_insn; | |
1050 | ||
1051 | do_cleanups (back_to); | |
9cacebf5 MS |
1052 | } |
1053 | ||
342ee437 MS |
1054 | /* Function: skip_prologue |
1055 | Return the address of the first inst past the prologue of the function. */ | |
1056 | ||
1057 | static CORE_ADDR | |
6093d2eb | 1058 | mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
342ee437 | 1059 | { |
6c02c64c KB |
1060 | char *name; |
1061 | CORE_ADDR func_addr, func_end; | |
1062 | struct mn10300_prologue p; | |
1063 | ||
1064 | /* Try to find the extent of the function that contains PC. */ | |
1065 | if (!find_pc_partial_function (pc, &name, &func_addr, &func_end)) | |
1066 | return pc; | |
1067 | ||
1068 | mn10300_analyze_prologue (gdbarch, pc, func_end, &p); | |
1069 | return p.prologue_end; | |
342ee437 MS |
1070 | } |
1071 | ||
6c02c64c KB |
1072 | /* Wrapper for mn10300_analyze_prologue: find the function start; |
1073 | use the current frame PC as the limit, then | |
1074 | invoke mn10300_analyze_prologue and return its result. */ | |
1075 | static struct mn10300_prologue * | |
1076 | mn10300_analyze_frame_prologue (struct frame_info *this_frame, | |
1077 | void **this_prologue_cache) | |
342ee437 | 1078 | { |
6c02c64c | 1079 | if (!*this_prologue_cache) |
93d42b30 | 1080 | { |
6c02c64c KB |
1081 | CORE_ADDR func_start, stop_addr; |
1082 | ||
1083 | *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct mn10300_prologue); | |
1084 | ||
1085 | func_start = get_frame_func (this_frame); | |
1086 | stop_addr = get_frame_pc (this_frame); | |
1087 | ||
1088 | /* If we couldn't find any function containing the PC, then | |
1089 | just initialize the prologue cache, but don't do anything. */ | |
1090 | if (!func_start) | |
1091 | stop_addr = func_start; | |
1092 | ||
1093 | mn10300_analyze_prologue (get_frame_arch (this_frame), | |
1094 | func_start, stop_addr, *this_prologue_cache); | |
93d42b30 | 1095 | } |
342ee437 | 1096 | |
6c02c64c KB |
1097 | return *this_prologue_cache; |
1098 | } | |
1099 | ||
1100 | /* Given the next frame and a prologue cache, return this frame's | |
1101 | base. */ | |
1102 | static CORE_ADDR | |
1103 | mn10300_frame_base (struct frame_info *this_frame, void **this_prologue_cache) | |
1104 | { | |
1105 | struct mn10300_prologue *p | |
1106 | = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache); | |
1107 | ||
1108 | /* In functions that use alloca, the distance between the stack | |
1109 | pointer and the frame base varies dynamically, so we can't use | |
1110 | the SP plus static information like prologue analysis to find the | |
1111 | frame base. However, such functions must have a frame pointer, | |
1112 | to be able to restore the SP on exit. So whenever we do have a | |
1113 | frame pointer, use that to find the base. */ | |
1114 | if (p->has_frame_ptr) | |
1115 | { | |
1116 | CORE_ADDR fp = get_frame_register_unsigned (this_frame, E_A3_REGNUM); | |
1117 | return fp - p->frame_ptr_offset; | |
1118 | } | |
1119 | else | |
1120 | { | |
1121 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); | |
1122 | return sp - p->frame_size; | |
1123 | } | |
342ee437 MS |
1124 | } |
1125 | ||
1126 | /* Here is a dummy implementation. */ | |
1127 | static struct frame_id | |
94afd7a6 | 1128 | mn10300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
342ee437 | 1129 | { |
94afd7a6 UW |
1130 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); |
1131 | CORE_ADDR pc = get_frame_register_unsigned (this_frame, E_PC_REGNUM); | |
1132 | return frame_id_build (sp, pc); | |
342ee437 MS |
1133 | } |
1134 | ||
342ee437 | 1135 | static void |
94afd7a6 | 1136 | mn10300_frame_this_id (struct frame_info *this_frame, |
342ee437 MS |
1137 | void **this_prologue_cache, |
1138 | struct frame_id *this_id) | |
1139 | { | |
6c02c64c KB |
1140 | *this_id = frame_id_build (mn10300_frame_base (this_frame, this_prologue_cache), |
1141 | get_frame_func (this_frame)); | |
342ee437 | 1142 | |
342ee437 MS |
1143 | } |
1144 | ||
94afd7a6 UW |
1145 | static struct value * |
1146 | mn10300_frame_prev_register (struct frame_info *this_frame, | |
6c02c64c | 1147 | void **this_prologue_cache, int regnum) |
342ee437 | 1148 | { |
6c02c64c KB |
1149 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (this_frame)); |
1150 | struct mn10300_prologue *p | |
1151 | = mn10300_analyze_frame_prologue (this_frame, this_prologue_cache); | |
1152 | CORE_ADDR frame_base = mn10300_frame_base (this_frame, this_prologue_cache); | |
1153 | int reg_size = register_size (get_frame_arch (this_frame), regnum); | |
1154 | ||
1155 | if (regnum == E_SP_REGNUM) | |
1156 | return frame_unwind_got_constant (this_frame, regnum, frame_base); | |
1157 | ||
1158 | /* If prologue analysis says we saved this register somewhere, | |
1159 | return a description of the stack slot holding it. */ | |
1160 | if (p->reg_offset[regnum] != 1) | |
1161 | return frame_unwind_got_memory (this_frame, regnum, | |
1162 | frame_base + p->reg_offset[regnum]); | |
1163 | ||
1164 | /* Otherwise, presume we haven't changed the value of this | |
1165 | register, and get it from the next frame. */ | |
1166 | return frame_unwind_got_register (this_frame, regnum, regnum); | |
342ee437 MS |
1167 | } |
1168 | ||
1169 | static const struct frame_unwind mn10300_frame_unwind = { | |
1170 | NORMAL_FRAME, | |
1171 | mn10300_frame_this_id, | |
94afd7a6 UW |
1172 | mn10300_frame_prev_register, |
1173 | NULL, | |
1174 | default_frame_sniffer | |
342ee437 MS |
1175 | }; |
1176 | ||
1177 | static CORE_ADDR | |
6c02c64c | 1178 | mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame) |
342ee437 MS |
1179 | { |
1180 | ULONGEST pc; | |
1181 | ||
6c02c64c | 1182 | pc = frame_unwind_register_unsigned (this_frame, E_PC_REGNUM); |
342ee437 MS |
1183 | return pc; |
1184 | } | |
1185 | ||
1186 | static CORE_ADDR | |
6c02c64c | 1187 | mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame) |
342ee437 MS |
1188 | { |
1189 | ULONGEST sp; | |
1190 | ||
6c02c64c | 1191 | sp = frame_unwind_register_unsigned (this_frame, E_SP_REGNUM); |
342ee437 MS |
1192 | return sp; |
1193 | } | |
1194 | ||
1195 | static void | |
1196 | mn10300_frame_unwind_init (struct gdbarch *gdbarch) | |
1197 | { | |
94afd7a6 UW |
1198 | dwarf2_append_unwinders (gdbarch); |
1199 | frame_unwind_append_unwinder (gdbarch, &mn10300_frame_unwind); | |
94afd7a6 | 1200 | set_gdbarch_dummy_id (gdbarch, mn10300_dummy_id); |
342ee437 MS |
1201 | set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc); |
1202 | set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp); | |
1203 | } | |
1204 | ||
1205 | /* Function: push_dummy_call | |
1206 | * | |
1207 | * Set up machine state for a target call, including | |
1208 | * function arguments, stack, return address, etc. | |
1209 | * | |
1210 | */ | |
1211 | ||
1212 | static CORE_ADDR | |
1213 | mn10300_push_dummy_call (struct gdbarch *gdbarch, | |
1214 | struct value *target_func, | |
1215 | struct regcache *regcache, | |
1216 | CORE_ADDR bp_addr, | |
1217 | int nargs, struct value **args, | |
1218 | CORE_ADDR sp, | |
1219 | int struct_return, | |
1220 | CORE_ADDR struct_addr) | |
1221 | { | |
1222 | const int push_size = register_size (gdbarch, E_PC_REGNUM); | |
1fb1ca27 | 1223 | int regs_used; |
342ee437 MS |
1224 | int len, arg_len; |
1225 | int stack_offset = 0; | |
1226 | int argnum; | |
1fb1ca27 | 1227 | char *val, valbuf[MAX_REGISTER_SIZE]; |
342ee437 | 1228 | |
342ee437 MS |
1229 | /* This should be a nop, but align the stack just in case something |
1230 | went wrong. Stacks are four byte aligned on the mn10300. */ | |
1231 | sp &= ~3; | |
1232 | ||
1233 | /* Now make space on the stack for the args. | |
1234 | ||
1235 | XXX This doesn't appear to handle pass-by-invisible reference | |
1236 | arguments. */ | |
1fb1ca27 | 1237 | regs_used = struct_return ? 1 : 0; |
342ee437 MS |
1238 | for (len = 0, argnum = 0; argnum < nargs; argnum++) |
1239 | { | |
1240 | arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3; | |
342ee437 MS |
1241 | while (regs_used < 2 && arg_len > 0) |
1242 | { | |
1243 | regs_used++; | |
1244 | arg_len -= push_size; | |
1245 | } | |
1246 | len += arg_len; | |
1247 | } | |
1248 | ||
1249 | /* Allocate stack space. */ | |
1250 | sp -= len; | |
1251 | ||
1fb1ca27 MS |
1252 | if (struct_return) |
1253 | { | |
1254 | regs_used = 1; | |
9c9acae0 | 1255 | regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr); |
1fb1ca27 MS |
1256 | } |
1257 | else | |
1258 | regs_used = 0; | |
1259 | ||
342ee437 MS |
1260 | /* Push all arguments onto the stack. */ |
1261 | for (argnum = 0; argnum < nargs; argnum++) | |
1262 | { | |
1fb1ca27 MS |
1263 | /* FIXME what about structs? Unions? */ |
1264 | if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT | |
1265 | && TYPE_LENGTH (value_type (*args)) > 8) | |
1266 | { | |
1267 | /* Change to pointer-to-type. */ | |
1268 | arg_len = push_size; | |
1269 | store_unsigned_integer (valbuf, push_size, | |
42ae5230 | 1270 | value_address (*args)); |
1fb1ca27 MS |
1271 | val = &valbuf[0]; |
1272 | } | |
1273 | else | |
1274 | { | |
1275 | arg_len = TYPE_LENGTH (value_type (*args)); | |
1276 | val = (char *) value_contents (*args); | |
1277 | } | |
342ee437 MS |
1278 | |
1279 | while (regs_used < 2 && arg_len > 0) | |
1280 | { | |
9c9acae0 UW |
1281 | regcache_cooked_write_unsigned (regcache, regs_used, |
1282 | extract_unsigned_integer (val, push_size)); | |
342ee437 MS |
1283 | val += push_size; |
1284 | arg_len -= push_size; | |
1285 | regs_used++; | |
1286 | } | |
1287 | ||
1288 | while (arg_len > 0) | |
1289 | { | |
1290 | write_memory (sp + stack_offset, val, push_size); | |
1291 | arg_len -= push_size; | |
1292 | val += push_size; | |
1293 | stack_offset += push_size; | |
1294 | } | |
1295 | ||
1296 | args++; | |
1297 | } | |
1298 | ||
1299 | /* Make space for the flushback area. */ | |
1300 | sp -= 8; | |
1301 | ||
1302 | /* Push the return address that contains the magic breakpoint. */ | |
1303 | sp -= 4; | |
1304 | write_memory_unsigned_integer (sp, push_size, bp_addr); | |
a64ae7e0 CV |
1305 | |
1306 | /* The CPU also writes the return address always into the | |
1307 | MDR register on "call". */ | |
1308 | regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr); | |
1309 | ||
342ee437 MS |
1310 | /* Update $sp. */ |
1311 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); | |
ee3a2f01 KB |
1312 | |
1313 | /* On the mn10300, it's possible to move some of the stack adjustment | |
1314 | and saving of the caller-save registers out of the prologue and | |
1315 | into the call sites. (When using gcc, this optimization can | |
1316 | occur when using the -mrelax switch.) If this occurs, the dwarf2 | |
1317 | info will reflect this fact. We can test to see if this is the | |
1318 | case by creating a new frame using the current stack pointer and | |
1319 | the address of the function that we're about to call. We then | |
1320 | unwind SP and see if it's different than the SP of our newly | |
1321 | created frame. If the SP values are the same, the caller is not | |
1322 | expected to allocate any additional stack. On the other hand, if | |
1323 | the SP values are different, the difference determines the | |
1324 | additional stack that must be allocated. | |
1325 | ||
1326 | Note that we don't update the return value though because that's | |
1327 | the value of the stack just after pushing the arguments, but prior | |
1328 | to performing the call. This value is needed in order to | |
1329 | construct the frame ID of the dummy call. */ | |
1330 | { | |
1331 | CORE_ADDR func_addr = find_function_addr (target_func, NULL); | |
1332 | CORE_ADDR unwound_sp | |
1333 | = mn10300_unwind_sp (gdbarch, create_new_frame (sp, func_addr)); | |
1334 | if (sp != unwound_sp) | |
1335 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, | |
1336 | sp - (unwound_sp - sp)); | |
1337 | } | |
1338 | ||
342ee437 MS |
1339 | return sp; |
1340 | } | |
1341 | ||
336c28c5 KB |
1342 | /* If DWARF2 is a register number appearing in Dwarf2 debug info, then |
1343 | mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB | |
1344 | register number. Why don't Dwarf2 and GDB use the same numbering? | |
1345 | Who knows? But since people have object files lying around with | |
1346 | the existing Dwarf2 numbering, and other people have written stubs | |
1347 | to work with the existing GDB, neither of them can change. So we | |
1348 | just have to cope. */ | |
1349 | static int | |
be8626e0 | 1350 | mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2) |
336c28c5 | 1351 | { |
c9f4d572 | 1352 | /* This table is supposed to be shaped like the gdbarch_register_name |
336c28c5 KB |
1353 | initializer in gcc/config/mn10300/mn10300.h. Registers which |
1354 | appear in GCC's numbering, but have no counterpart in GDB's | |
1355 | world, are marked with a -1. */ | |
1356 | static int dwarf2_to_gdb[] = { | |
1357 | 0, 1, 2, 3, 4, 5, 6, 7, -1, 8, | |
1358 | 15, 16, 17, 18, 19, 20, 21, 22, | |
1359 | 32, 33, 34, 35, 36, 37, 38, 39, | |
1360 | 40, 41, 42, 43, 44, 45, 46, 47, | |
1361 | 48, 49, 50, 51, 52, 53, 54, 55, | |
bbc1a784 | 1362 | 56, 57, 58, 59, 60, 61, 62, 63, |
6c02c64c | 1363 | 9, 11 |
336c28c5 KB |
1364 | }; |
1365 | ||
1366 | if (dwarf2 < 0 | |
bbc1a784 | 1367 | || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb)) |
154b82dc KB |
1368 | { |
1369 | warning (_("Bogus register number in debug info: %d"), dwarf2); | |
bbc1a784 | 1370 | return -1; |
154b82dc | 1371 | } |
336c28c5 KB |
1372 | |
1373 | return dwarf2_to_gdb[dwarf2]; | |
1374 | } | |
342ee437 MS |
1375 | |
1376 | static struct gdbarch * | |
1377 | mn10300_gdbarch_init (struct gdbarch_info info, | |
1378 | struct gdbarch_list *arches) | |
1379 | { | |
1380 | struct gdbarch *gdbarch; | |
1381 | struct gdbarch_tdep *tdep; | |
4640dd91 | 1382 | int num_regs; |
342ee437 MS |
1383 | |
1384 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1385 | if (arches != NULL) | |
1386 | return arches->gdbarch; | |
1387 | ||
1388 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); | |
1389 | gdbarch = gdbarch_alloc (&info, tdep); | |
1390 | ||
1391 | switch (info.bfd_arch_info->mach) | |
1392 | { | |
1393 | case 0: | |
1394 | case bfd_mach_mn10300: | |
1395 | set_gdbarch_register_name (gdbarch, mn10300_generic_register_name); | |
1396 | tdep->am33_mode = 0; | |
4640dd91 | 1397 | num_regs = 32; |
342ee437 MS |
1398 | break; |
1399 | case bfd_mach_am33: | |
1400 | set_gdbarch_register_name (gdbarch, am33_register_name); | |
1401 | tdep->am33_mode = 1; | |
4640dd91 KB |
1402 | num_regs = 32; |
1403 | break; | |
1404 | case bfd_mach_am33_2: | |
1405 | set_gdbarch_register_name (gdbarch, am33_2_register_name); | |
1406 | tdep->am33_mode = 2; | |
1407 | num_regs = 64; | |
1408 | set_gdbarch_fp0_regnum (gdbarch, 32); | |
342ee437 MS |
1409 | break; |
1410 | default: | |
1411 | internal_error (__FILE__, __LINE__, | |
1412 | _("mn10300_gdbarch_init: Unknown mn10300 variant")); | |
1413 | break; | |
1414 | } | |
1415 | ||
1b31f75d KB |
1416 | /* By default, chars are unsigned. */ |
1417 | set_gdbarch_char_signed (gdbarch, 0); | |
1418 | ||
342ee437 | 1419 | /* Registers. */ |
4640dd91 | 1420 | set_gdbarch_num_regs (gdbarch, num_regs); |
342ee437 MS |
1421 | set_gdbarch_register_type (gdbarch, mn10300_register_type); |
1422 | set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue); | |
1423 | set_gdbarch_read_pc (gdbarch, mn10300_read_pc); | |
1424 | set_gdbarch_write_pc (gdbarch, mn10300_write_pc); | |
1425 | set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); | |
1426 | set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); | |
336c28c5 | 1427 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum); |
342ee437 MS |
1428 | |
1429 | /* Stack unwinding. */ | |
1430 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1431 | /* Breakpoints. */ | |
1432 | set_gdbarch_breakpoint_from_pc (gdbarch, mn10300_breakpoint_from_pc); | |
1433 | /* decr_pc_after_break? */ | |
1434 | /* Disassembly. */ | |
1435 | set_gdbarch_print_insn (gdbarch, print_insn_mn10300); | |
1436 | ||
1437 | /* Stage 2 */ | |
99fe5f9d | 1438 | set_gdbarch_return_value (gdbarch, mn10300_return_value); |
342ee437 MS |
1439 | |
1440 | /* Stage 3 -- get target calls working. */ | |
1441 | set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call); | |
1442 | /* set_gdbarch_return_value (store, extract) */ | |
1443 | ||
1444 | ||
1445 | mn10300_frame_unwind_init (gdbarch); | |
1446 | ||
697e3bc9 KB |
1447 | /* Hook in ABI-specific overrides, if they have been registered. */ |
1448 | gdbarch_init_osabi (info, gdbarch); | |
1449 | ||
342ee437 MS |
1450 | return gdbarch; |
1451 | } | |
1452 | ||
1453 | /* Dump out the mn10300 specific architecture information. */ | |
1454 | ||
1455 | static void | |
d93859e2 | 1456 | mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file) |
342ee437 | 1457 | { |
d93859e2 | 1458 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
342ee437 MS |
1459 | fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n", |
1460 | tdep->am33_mode); | |
1461 | } | |
1462 | ||
63807e1d PA |
1463 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1464 | extern initialize_file_ftype _initialize_mn10300_tdep; | |
1465 | ||
342ee437 MS |
1466 | void |
1467 | _initialize_mn10300_tdep (void) | |
1468 | { | |
1469 | gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep); | |
1470 | } | |
1471 |