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342ee437 MS |
1 | /* Target-dependent code for the Matsushita MN10300 for GDB, the GNU debugger. |
2 | ||
6aba47ca | 3 | Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, |
0fb0cc75 | 4 | 2007, 2008, 2009 Free Software Foundation, Inc. |
342ee437 MS |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 10 | the Free Software Foundation; either version 3 of the License, or |
342ee437 MS |
11 | (at your option) any later version. |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 19 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
342ee437 | 20 | |
342ee437 MS |
21 | #include "defs.h" |
22 | #include "arch-utils.h" | |
23 | #include "dis-asm.h" | |
24 | #include "gdbtypes.h" | |
25 | #include "regcache.h" | |
26 | #include "gdb_string.h" | |
27 | #include "gdb_assert.h" | |
28 | #include "gdbcore.h" /* for write_memory_unsigned_integer */ | |
29 | #include "value.h" | |
30 | #include "gdbtypes.h" | |
31 | #include "frame.h" | |
32 | #include "frame-unwind.h" | |
33 | #include "frame-base.h" | |
34 | #include "trad-frame.h" | |
35 | #include "symtab.h" | |
36 | #include "dwarf2-frame.h" | |
697e3bc9 | 37 | #include "osabi.h" |
ee3a2f01 | 38 | #include "infcall.h" |
effa26a9 | 39 | #include "target.h" |
342ee437 MS |
40 | |
41 | #include "mn10300-tdep.h" | |
42 | ||
9cacebf5 MS |
43 | /* Forward decl. */ |
44 | extern struct trad_frame_cache *mn10300_frame_unwind_cache (struct frame_info*, | |
45 | void **); | |
342ee437 MS |
46 | |
47 | /* Compute the alignment required by a type. */ | |
48 | ||
49 | static int | |
50 | mn10300_type_align (struct type *type) | |
51 | { | |
52 | int i, align = 1; | |
53 | ||
54 | switch (TYPE_CODE (type)) | |
55 | { | |
56 | case TYPE_CODE_INT: | |
57 | case TYPE_CODE_ENUM: | |
58 | case TYPE_CODE_SET: | |
59 | case TYPE_CODE_RANGE: | |
60 | case TYPE_CODE_CHAR: | |
61 | case TYPE_CODE_BOOL: | |
62 | case TYPE_CODE_FLT: | |
63 | case TYPE_CODE_PTR: | |
64 | case TYPE_CODE_REF: | |
65 | return TYPE_LENGTH (type); | |
66 | ||
67 | case TYPE_CODE_COMPLEX: | |
68 | return TYPE_LENGTH (type) / 2; | |
69 | ||
70 | case TYPE_CODE_STRUCT: | |
71 | case TYPE_CODE_UNION: | |
72 | for (i = 0; i < TYPE_NFIELDS (type); i++) | |
73 | { | |
74 | int falign = mn10300_type_align (TYPE_FIELD_TYPE (type, i)); | |
75 | while (align < falign) | |
76 | align <<= 1; | |
77 | } | |
78 | return align; | |
79 | ||
80 | case TYPE_CODE_ARRAY: | |
81 | /* HACK! Structures containing arrays, even small ones, are not | |
82 | elligible for returning in registers. */ | |
83 | return 256; | |
84 | ||
85 | case TYPE_CODE_TYPEDEF: | |
86 | return mn10300_type_align (check_typedef (type)); | |
87 | ||
88 | default: | |
89 | internal_error (__FILE__, __LINE__, _("bad switch")); | |
90 | } | |
91 | } | |
92 | ||
342ee437 | 93 | /* Should call_function allocate stack space for a struct return? */ |
342ee437 | 94 | static int |
99fe5f9d | 95 | mn10300_use_struct_convention (struct type *type) |
342ee437 MS |
96 | { |
97 | /* Structures bigger than a pair of words can't be returned in | |
98 | registers. */ | |
99 | if (TYPE_LENGTH (type) > 8) | |
100 | return 1; | |
101 | ||
102 | switch (TYPE_CODE (type)) | |
103 | { | |
104 | case TYPE_CODE_STRUCT: | |
105 | case TYPE_CODE_UNION: | |
106 | /* Structures with a single field are handled as the field | |
107 | itself. */ | |
108 | if (TYPE_NFIELDS (type) == 1) | |
99fe5f9d | 109 | return mn10300_use_struct_convention (TYPE_FIELD_TYPE (type, 0)); |
342ee437 MS |
110 | |
111 | /* Structures with word or double-word size are passed in memory, as | |
112 | long as they require at least word alignment. */ | |
113 | if (mn10300_type_align (type) >= 4) | |
114 | return 0; | |
115 | ||
116 | return 1; | |
117 | ||
118 | /* Arrays are addressable, so they're never returned in | |
119 | registers. This condition can only hold when the array is | |
120 | the only field of a struct or union. */ | |
121 | case TYPE_CODE_ARRAY: | |
122 | return 1; | |
123 | ||
124 | case TYPE_CODE_TYPEDEF: | |
99fe5f9d | 125 | return mn10300_use_struct_convention (check_typedef (type)); |
342ee437 MS |
126 | |
127 | default: | |
128 | return 0; | |
129 | } | |
130 | } | |
131 | ||
342ee437 | 132 | static void |
99fe5f9d | 133 | mn10300_store_return_value (struct gdbarch *gdbarch, struct type *type, |
342ee437 MS |
134 | struct regcache *regcache, const void *valbuf) |
135 | { | |
342ee437 MS |
136 | int len = TYPE_LENGTH (type); |
137 | int reg, regsz; | |
138 | ||
139 | if (TYPE_CODE (type) == TYPE_CODE_PTR) | |
140 | reg = 4; | |
141 | else | |
142 | reg = 0; | |
143 | ||
144 | regsz = register_size (gdbarch, reg); | |
145 | ||
146 | if (len <= regsz) | |
147 | regcache_raw_write_part (regcache, reg, 0, len, valbuf); | |
148 | else if (len <= 2 * regsz) | |
149 | { | |
150 | regcache_raw_write (regcache, reg, valbuf); | |
151 | gdb_assert (regsz == register_size (gdbarch, reg + 1)); | |
152 | regcache_raw_write_part (regcache, reg+1, 0, | |
153 | len - regsz, (char *) valbuf + regsz); | |
154 | } | |
155 | else | |
156 | internal_error (__FILE__, __LINE__, | |
157 | _("Cannot store return value %d bytes long."), len); | |
158 | } | |
159 | ||
342ee437 | 160 | static void |
99fe5f9d | 161 | mn10300_extract_return_value (struct gdbarch *gdbarch, struct type *type, |
342ee437 MS |
162 | struct regcache *regcache, void *valbuf) |
163 | { | |
342ee437 MS |
164 | char buf[MAX_REGISTER_SIZE]; |
165 | int len = TYPE_LENGTH (type); | |
166 | int reg, regsz; | |
167 | ||
168 | if (TYPE_CODE (type) == TYPE_CODE_PTR) | |
169 | reg = 4; | |
170 | else | |
171 | reg = 0; | |
172 | ||
173 | regsz = register_size (gdbarch, reg); | |
174 | if (len <= regsz) | |
175 | { | |
176 | regcache_raw_read (regcache, reg, buf); | |
177 | memcpy (valbuf, buf, len); | |
178 | } | |
179 | else if (len <= 2 * regsz) | |
180 | { | |
181 | regcache_raw_read (regcache, reg, buf); | |
182 | memcpy (valbuf, buf, regsz); | |
183 | gdb_assert (regsz == register_size (gdbarch, reg + 1)); | |
184 | regcache_raw_read (regcache, reg + 1, buf); | |
185 | memcpy ((char *) valbuf + regsz, buf, len - regsz); | |
186 | } | |
187 | else | |
188 | internal_error (__FILE__, __LINE__, | |
189 | _("Cannot extract return value %d bytes long."), len); | |
190 | } | |
191 | ||
99fe5f9d KB |
192 | /* Determine, for architecture GDBARCH, how a return value of TYPE |
193 | should be returned. If it is supposed to be returned in registers, | |
194 | and READBUF is non-zero, read the appropriate value from REGCACHE, | |
195 | and copy it into READBUF. If WRITEBUF is non-zero, write the value | |
196 | from WRITEBUF into REGCACHE. */ | |
197 | ||
198 | static enum return_value_convention | |
c055b101 CV |
199 | mn10300_return_value (struct gdbarch *gdbarch, struct type *func_type, |
200 | struct type *type, struct regcache *regcache, | |
201 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
99fe5f9d KB |
202 | { |
203 | if (mn10300_use_struct_convention (type)) | |
204 | return RETURN_VALUE_STRUCT_CONVENTION; | |
205 | ||
206 | if (readbuf) | |
207 | mn10300_extract_return_value (gdbarch, type, regcache, readbuf); | |
208 | if (writebuf) | |
209 | mn10300_store_return_value (gdbarch, type, regcache, writebuf); | |
210 | ||
211 | return RETURN_VALUE_REGISTER_CONVENTION; | |
212 | } | |
213 | ||
342ee437 MS |
214 | static char * |
215 | register_name (int reg, char **regs, long sizeof_regs) | |
216 | { | |
217 | if (reg < 0 || reg >= sizeof_regs / sizeof (regs[0])) | |
218 | return NULL; | |
219 | else | |
220 | return regs[reg]; | |
221 | } | |
222 | ||
223 | static const char * | |
d93859e2 | 224 | mn10300_generic_register_name (struct gdbarch *gdbarch, int reg) |
342ee437 MS |
225 | { |
226 | static char *regs[] = | |
227 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
228 | "sp", "pc", "mdr", "psw", "lir", "lar", "", "", | |
229 | "", "", "", "", "", "", "", "", | |
230 | "", "", "", "", "", "", "", "fp" | |
231 | }; | |
232 | return register_name (reg, regs, sizeof regs); | |
233 | } | |
234 | ||
235 | ||
236 | static const char * | |
d93859e2 | 237 | am33_register_name (struct gdbarch *gdbarch, int reg) |
342ee437 MS |
238 | { |
239 | static char *regs[] = | |
240 | { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
241 | "sp", "pc", "mdr", "psw", "lir", "lar", "", | |
242 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
243 | "ssp", "msp", "usp", "mcrh", "mcrl", "mcvf", "", "", "" | |
244 | }; | |
245 | return register_name (reg, regs, sizeof regs); | |
246 | } | |
247 | ||
4640dd91 | 248 | static const char * |
d93859e2 | 249 | am33_2_register_name (struct gdbarch *gdbarch, int reg) |
4640dd91 KB |
250 | { |
251 | static char *regs[] = | |
252 | { | |
253 | "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", | |
254 | "sp", "pc", "mdr", "psw", "lir", "lar", "mdrq", "r0", | |
255 | "r1", "r2", "r3", "r4", "r5", "r6", "r7", "ssp", | |
256 | "msp", "usp", "mcrh", "mcrl", "mcvf", "fpcr", "", "", | |
257 | "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7", | |
258 | "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15", | |
259 | "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23", | |
260 | "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31" | |
261 | }; | |
262 | return register_name (reg, regs, sizeof regs); | |
263 | } | |
342ee437 MS |
264 | |
265 | static struct type * | |
266 | mn10300_register_type (struct gdbarch *gdbarch, int reg) | |
267 | { | |
0dfff4cb | 268 | return builtin_type (gdbarch)->builtin_int; |
342ee437 MS |
269 | } |
270 | ||
271 | static CORE_ADDR | |
61a1198a | 272 | mn10300_read_pc (struct regcache *regcache) |
342ee437 | 273 | { |
61a1198a UW |
274 | ULONGEST val; |
275 | regcache_cooked_read_unsigned (regcache, E_PC_REGNUM, &val); | |
276 | return val; | |
342ee437 MS |
277 | } |
278 | ||
279 | static void | |
61a1198a | 280 | mn10300_write_pc (struct regcache *regcache, CORE_ADDR val) |
342ee437 | 281 | { |
61a1198a | 282 | regcache_cooked_write_unsigned (regcache, E_PC_REGNUM, val); |
342ee437 MS |
283 | } |
284 | ||
285 | /* The breakpoint instruction must be the same size as the smallest | |
286 | instruction in the instruction set. | |
287 | ||
288 | The Matsushita mn10x00 processors have single byte instructions | |
289 | so we need a single byte breakpoint. Matsushita hasn't defined | |
290 | one, so we defined it ourselves. */ | |
291 | ||
292 | const static unsigned char * | |
67d57894 MD |
293 | mn10300_breakpoint_from_pc (struct gdbarch *gdbarch, CORE_ADDR *bp_addr, |
294 | int *bp_size) | |
342ee437 MS |
295 | { |
296 | static char breakpoint[] = {0xff}; | |
297 | *bp_size = 1; | |
298 | return breakpoint; | |
299 | } | |
300 | ||
4640dd91 | 301 | /* Set offsets of saved registers. |
9cacebf5 MS |
302 | This is a helper function for mn10300_analyze_prologue. */ |
303 | ||
304 | static void | |
4640dd91 | 305 | set_reg_offsets (struct frame_info *fi, |
9cacebf5 | 306 | void **this_cache, |
4640dd91 KB |
307 | int movm_args, |
308 | int fpregmask, | |
309 | int stack_extra_size, | |
310 | int frame_in_fp) | |
9cacebf5 | 311 | { |
d15cf01c | 312 | struct gdbarch *gdbarch; |
9cacebf5 MS |
313 | struct trad_frame_cache *cache; |
314 | int offset = 0; | |
315 | CORE_ADDR base; | |
316 | ||
317 | if (fi == NULL || this_cache == NULL) | |
318 | return; | |
319 | ||
320 | cache = mn10300_frame_unwind_cache (fi, this_cache); | |
321 | if (cache == NULL) | |
322 | return; | |
d15cf01c | 323 | gdbarch = get_frame_arch (fi); |
9cacebf5 | 324 | |
4640dd91 KB |
325 | if (frame_in_fp) |
326 | { | |
ba2c6aec | 327 | base = get_frame_register_unsigned (fi, E_A3_REGNUM); |
4640dd91 KB |
328 | } |
329 | else | |
330 | { | |
ba2c6aec | 331 | base = get_frame_register_unsigned (fi, E_SP_REGNUM) |
d15cf01c | 332 | + stack_extra_size; |
4640dd91 KB |
333 | } |
334 | ||
335 | trad_frame_set_this_base (cache, base); | |
336 | ||
d15cf01c | 337 | if (AM33_MODE (gdbarch) == 2) |
4640dd91 KB |
338 | { |
339 | /* If bit N is set in fpregmask, fsN is saved on the stack. | |
340 | The floating point registers are saved in ascending order. | |
341 | For example: fs16 <- Frame Pointer | |
342 | fs17 Frame Pointer + 4 */ | |
343 | if (fpregmask != 0) | |
344 | { | |
345 | int i; | |
346 | for (i = 0; i < 32; i++) | |
347 | { | |
348 | if (fpregmask & (1 << i)) | |
349 | { | |
d15cf01c MD |
350 | trad_frame_set_reg_addr (cache, E_FS0_REGNUM + i, |
351 | base + offset); | |
4640dd91 KB |
352 | offset += 4; |
353 | } | |
354 | } | |
355 | } | |
356 | } | |
357 | ||
358 | ||
9cacebf5 MS |
359 | if (movm_args & movm_other_bit) |
360 | { | |
361 | /* The `other' bit leaves a blank area of four bytes at the | |
362 | beginning of its block of saved registers, making it 32 bytes | |
363 | long in total. */ | |
364 | trad_frame_set_reg_addr (cache, E_LAR_REGNUM, base + offset + 4); | |
365 | trad_frame_set_reg_addr (cache, E_LIR_REGNUM, base + offset + 8); | |
366 | trad_frame_set_reg_addr (cache, E_MDR_REGNUM, base + offset + 12); | |
367 | trad_frame_set_reg_addr (cache, E_A0_REGNUM + 1, base + offset + 16); | |
368 | trad_frame_set_reg_addr (cache, E_A0_REGNUM, base + offset + 20); | |
369 | trad_frame_set_reg_addr (cache, E_D0_REGNUM + 1, base + offset + 24); | |
370 | trad_frame_set_reg_addr (cache, E_D0_REGNUM, base + offset + 28); | |
371 | offset += 32; | |
372 | } | |
373 | ||
374 | if (movm_args & movm_a3_bit) | |
375 | { | |
376 | trad_frame_set_reg_addr (cache, E_A3_REGNUM, base + offset); | |
377 | offset += 4; | |
378 | } | |
379 | if (movm_args & movm_a2_bit) | |
380 | { | |
381 | trad_frame_set_reg_addr (cache, E_A2_REGNUM, base + offset); | |
382 | offset += 4; | |
383 | } | |
384 | if (movm_args & movm_d3_bit) | |
385 | { | |
386 | trad_frame_set_reg_addr (cache, E_D3_REGNUM, base + offset); | |
387 | offset += 4; | |
388 | } | |
389 | if (movm_args & movm_d2_bit) | |
390 | { | |
391 | trad_frame_set_reg_addr (cache, E_D2_REGNUM, base + offset); | |
392 | offset += 4; | |
393 | } | |
d15cf01c | 394 | if (AM33_MODE (gdbarch)) |
9cacebf5 MS |
395 | { |
396 | if (movm_args & movm_exother_bit) | |
397 | { | |
398 | trad_frame_set_reg_addr (cache, E_MCVF_REGNUM, base + offset); | |
399 | trad_frame_set_reg_addr (cache, E_MCRL_REGNUM, base + offset + 4); | |
400 | trad_frame_set_reg_addr (cache, E_MCRH_REGNUM, base + offset + 8); | |
401 | trad_frame_set_reg_addr (cache, E_MDRQ_REGNUM, base + offset + 12); | |
402 | trad_frame_set_reg_addr (cache, E_E1_REGNUM, base + offset + 16); | |
403 | trad_frame_set_reg_addr (cache, E_E0_REGNUM, base + offset + 20); | |
404 | offset += 24; | |
405 | } | |
406 | if (movm_args & movm_exreg1_bit) | |
407 | { | |
408 | trad_frame_set_reg_addr (cache, E_E7_REGNUM, base + offset); | |
409 | trad_frame_set_reg_addr (cache, E_E6_REGNUM, base + offset + 4); | |
410 | trad_frame_set_reg_addr (cache, E_E5_REGNUM, base + offset + 8); | |
411 | trad_frame_set_reg_addr (cache, E_E4_REGNUM, base + offset + 12); | |
412 | offset += 16; | |
413 | } | |
414 | if (movm_args & movm_exreg0_bit) | |
415 | { | |
416 | trad_frame_set_reg_addr (cache, E_E3_REGNUM, base + offset); | |
417 | trad_frame_set_reg_addr (cache, E_E2_REGNUM, base + offset + 4); | |
418 | offset += 8; | |
419 | } | |
420 | } | |
421 | /* The last (or first) thing on the stack will be the PC. */ | |
422 | trad_frame_set_reg_addr (cache, E_PC_REGNUM, base + offset); | |
423 | /* Save the SP in the 'traditional' way. | |
424 | This will be the same location where the PC is saved. */ | |
425 | trad_frame_set_reg_value (cache, E_SP_REGNUM, base + offset); | |
426 | } | |
427 | ||
428 | /* The main purpose of this file is dealing with prologues to extract | |
429 | information about stack frames and saved registers. | |
430 | ||
431 | In gcc/config/mn13000/mn10300.c, the expand_prologue prologue | |
432 | function is pretty readable, and has a nice explanation of how the | |
433 | prologue is generated. The prologues generated by that code will | |
434 | have the following form (NOTE: the current code doesn't handle all | |
435 | this!): | |
436 | ||
437 | + If this is an old-style varargs function, then its arguments | |
438 | need to be flushed back to the stack: | |
439 | ||
440 | mov d0,(4,sp) | |
441 | mov d1,(4,sp) | |
442 | ||
443 | + If we use any of the callee-saved registers, save them now. | |
444 | ||
445 | movm [some callee-saved registers],(sp) | |
446 | ||
447 | + If we have any floating-point registers to save: | |
448 | ||
449 | - Decrement the stack pointer to reserve space for the registers. | |
450 | If the function doesn't need a frame pointer, we may combine | |
451 | this with the adjustment that reserves space for the frame. | |
452 | ||
453 | add -SIZE, sp | |
454 | ||
455 | - Save the floating-point registers. We have two possible | |
456 | strategies: | |
457 | ||
458 | . Save them at fixed offset from the SP: | |
459 | ||
460 | fmov fsN,(OFFSETN,sp) | |
461 | fmov fsM,(OFFSETM,sp) | |
462 | ... | |
463 | ||
464 | Note that, if OFFSETN happens to be zero, you'll get the | |
465 | different opcode: fmov fsN,(sp) | |
466 | ||
467 | . Or, set a0 to the start of the save area, and then use | |
468 | post-increment addressing to save the FP registers. | |
469 | ||
470 | mov sp, a0 | |
471 | add SIZE, a0 | |
472 | fmov fsN,(a0+) | |
473 | fmov fsM,(a0+) | |
474 | ... | |
475 | ||
476 | + If the function needs a frame pointer, we set it here. | |
477 | ||
478 | mov sp, a3 | |
479 | ||
480 | + Now we reserve space for the stack frame proper. This could be | |
481 | merged into the `add -SIZE, sp' instruction for FP saves up | |
482 | above, unless we needed to set the frame pointer in the previous | |
483 | step, or the frame is so large that allocating the whole thing at | |
484 | once would put the FP register save slots out of reach of the | |
485 | addressing mode (128 bytes). | |
486 | ||
487 | add -SIZE, sp | |
488 | ||
489 | One day we might keep the stack pointer constant, that won't | |
490 | change the code for prologues, but it will make the frame | |
491 | pointerless case much more common. */ | |
492 | ||
493 | /* Analyze the prologue to determine where registers are saved, | |
494 | the end of the prologue, etc etc. Return the end of the prologue | |
495 | scanned. | |
496 | ||
497 | We store into FI (if non-null) several tidbits of information: | |
498 | ||
499 | * stack_size -- size of this stack frame. Note that if we stop in | |
500 | certain parts of the prologue/epilogue we may claim the size of the | |
501 | current frame is zero. This happens when the current frame has | |
502 | not been allocated yet or has already been deallocated. | |
503 | ||
504 | * fsr -- Addresses of registers saved in the stack by this frame. | |
505 | ||
506 | * status -- A (relatively) generic status indicator. It's a bitmask | |
507 | with the following bits: | |
508 | ||
509 | MY_FRAME_IN_SP: The base of the current frame is actually in | |
510 | the stack pointer. This can happen for frame pointerless | |
511 | functions, or cases where we're stopped in the prologue/epilogue | |
512 | itself. For these cases mn10300_analyze_prologue will need up | |
513 | update fi->frame before returning or analyzing the register | |
514 | save instructions. | |
515 | ||
516 | MY_FRAME_IN_FP: The base of the current frame is in the | |
517 | frame pointer register ($a3). | |
518 | ||
519 | NO_MORE_FRAMES: Set this if the current frame is "start" or | |
520 | if the first instruction looks like mov <imm>,sp. This tells | |
521 | frame chain to not bother trying to unwind past this frame. */ | |
522 | ||
523 | static CORE_ADDR | |
d15cf01c | 524 | mn10300_analyze_prologue (struct gdbarch *gdbarch, struct frame_info *fi, |
9cacebf5 MS |
525 | void **this_cache, |
526 | CORE_ADDR pc) | |
527 | { | |
528 | CORE_ADDR func_addr, func_end, addr, stop; | |
4640dd91 | 529 | long stack_extra_size = 0; |
9cacebf5 MS |
530 | int imm_size; |
531 | unsigned char buf[4]; | |
4640dd91 KB |
532 | int status; |
533 | int movm_args = 0; | |
534 | int fpregmask = 0; | |
9cacebf5 | 535 | char *name; |
4640dd91 | 536 | int frame_in_fp = 0; |
9cacebf5 MS |
537 | |
538 | /* Use the PC in the frame if it's provided to look up the | |
539 | start of this function. | |
540 | ||
541 | Note: kevinb/2003-07-16: We used to do the following here: | |
542 | pc = (fi ? get_frame_pc (fi) : pc); | |
543 | But this is (now) badly broken when called from analyze_dummy_frame(). | |
544 | */ | |
545 | if (fi) | |
546 | { | |
547 | pc = (pc ? pc : get_frame_pc (fi)); | |
9cacebf5 MS |
548 | } |
549 | ||
550 | /* Find the start of this function. */ | |
551 | status = find_pc_partial_function (pc, &name, &func_addr, &func_end); | |
552 | ||
553 | /* Do nothing if we couldn't find the start of this function | |
554 | ||
555 | MVS: comment went on to say "or if we're stopped at the first | |
556 | instruction in the prologue" -- but code doesn't reflect that, | |
557 | and I don't want to do that anyway. */ | |
558 | if (status == 0) | |
559 | { | |
4640dd91 KB |
560 | addr = pc; |
561 | goto finish_prologue; | |
9cacebf5 MS |
562 | } |
563 | ||
564 | /* If we're in start, then give up. */ | |
565 | if (strcmp (name, "start") == 0) | |
566 | { | |
4640dd91 KB |
567 | addr = pc; |
568 | goto finish_prologue; | |
9cacebf5 MS |
569 | } |
570 | ||
9cacebf5 MS |
571 | /* Figure out where to stop scanning. */ |
572 | stop = fi ? pc : func_end; | |
573 | ||
574 | /* Don't walk off the end of the function. */ | |
575 | stop = stop > func_end ? func_end : stop; | |
576 | ||
577 | /* Start scanning on the first instruction of this function. */ | |
578 | addr = func_addr; | |
579 | ||
580 | /* Suck in two bytes. */ | |
4640dd91 | 581 | if (addr + 2 > stop || !safe_frame_unwind_memory (fi, addr, buf, 2)) |
9cacebf5 MS |
582 | goto finish_prologue; |
583 | ||
584 | /* First see if this insn sets the stack pointer from a register; if | |
585 | so, it's probably the initialization of the stack pointer in _start, | |
586 | so mark this as the bottom-most frame. */ | |
587 | if (buf[0] == 0xf2 && (buf[1] & 0xf3) == 0xf0) | |
588 | { | |
9cacebf5 MS |
589 | goto finish_prologue; |
590 | } | |
591 | ||
592 | /* Now look for movm [regs],sp, which saves the callee saved registers. | |
593 | ||
594 | At this time we don't know if fi->frame is valid, so we only note | |
595 | that we encountered a movm instruction. Later, we'll set the entries | |
596 | in fsr.regs as needed. */ | |
597 | if (buf[0] == 0xcf) | |
598 | { | |
599 | /* Extract the register list for the movm instruction. */ | |
600 | movm_args = buf[1]; | |
601 | ||
602 | addr += 2; | |
603 | ||
604 | /* Quit now if we're beyond the stop point. */ | |
605 | if (addr >= stop) | |
606 | goto finish_prologue; | |
607 | ||
608 | /* Get the next two bytes so the prologue scan can continue. */ | |
f2c8bc43 | 609 | if (!safe_frame_unwind_memory (fi, addr, buf, 2)) |
9cacebf5 MS |
610 | goto finish_prologue; |
611 | } | |
612 | ||
83845630 KB |
613 | /* Check for "mov pc, a2", an instruction found in optimized, position |
614 | independent code. Skip it if found. */ | |
615 | if (buf[0] == 0xf0 && buf[1] == 0x2e) | |
616 | { | |
617 | addr += 2; | |
618 | ||
619 | /* Quit now if we're beyond the stop point. */ | |
620 | if (addr >= stop) | |
621 | goto finish_prologue; | |
622 | ||
623 | /* Get the next two bytes so the prologue scan can continue. */ | |
8defab1a | 624 | status = target_read_memory (addr, buf, 2); |
83845630 KB |
625 | if (status != 0) |
626 | goto finish_prologue; | |
627 | } | |
628 | ||
d15cf01c | 629 | if (AM33_MODE (gdbarch) == 2) |
4640dd91 KB |
630 | { |
631 | /* Determine if any floating point registers are to be saved. | |
632 | Look for one of the following three prologue formats: | |
633 | ||
634 | [movm [regs],(sp)] [movm [regs],(sp)] [movm [regs],(sp)] | |
635 | ||
636 | add -SIZE,sp add -SIZE,sp add -SIZE,sp | |
637 | fmov fs#,(sp) mov sp,a0/a1 mov sp,a0/a1 | |
638 | fmov fs#,(#,sp) fmov fs#,(a0/a1+) add SIZE2,a0/a1 | |
639 | ... ... fmov fs#,(a0/a1+) | |
640 | ... ... ... | |
641 | fmov fs#,(#,sp) fmov fs#,(a0/a1+) fmov fs#,(a0/a1+) | |
642 | ||
643 | [mov sp,a3] [mov sp,a3] | |
644 | [add -SIZE2,sp] [add -SIZE2,sp] */ | |
645 | ||
e92e42f5 KB |
646 | /* Remember the address at which we started in the event that we |
647 | don't ultimately find an fmov instruction. Once we're certain | |
648 | that we matched one of the above patterns, we'll set | |
649 | ``restore_addr'' to the appropriate value. Note: At one time | |
650 | in the past, this code attempted to not adjust ``addr'' until | |
651 | there was a fair degree of certainty that the pattern would be | |
652 | matched. However, that code did not wait until an fmov instruction | |
653 | was actually encountered. As a consequence, ``addr'' would | |
654 | sometimes be advanced even when no fmov instructions were found. */ | |
655 | CORE_ADDR restore_addr = addr; | |
83845630 | 656 | int fmov_found = 0; |
e92e42f5 | 657 | |
4640dd91 KB |
658 | /* First, look for add -SIZE,sp (i.e. add imm8,sp (0xf8feXX) |
659 | or add imm16,sp (0xfafeXXXX) | |
660 | or add imm32,sp (0xfcfeXXXXXXXX)) */ | |
661 | imm_size = 0; | |
662 | if (buf[0] == 0xf8 && buf[1] == 0xfe) | |
663 | imm_size = 1; | |
664 | else if (buf[0] == 0xfa && buf[1] == 0xfe) | |
665 | imm_size = 2; | |
666 | else if (buf[0] == 0xfc && buf[1] == 0xfe) | |
667 | imm_size = 4; | |
668 | if (imm_size != 0) | |
669 | { | |
670 | /* An "add -#,sp" instruction has been found. "addr + 2 + imm_size" | |
671 | is the address of the next instruction. Don't modify "addr" until | |
672 | the next "floating point prologue" instruction is found. If this | |
673 | is not a prologue that saves floating point registers we need to | |
674 | be able to back out of this bit of code and continue with the | |
675 | prologue analysis. */ | |
676 | if (addr + 2 + imm_size < stop) | |
677 | { | |
678 | if (!safe_frame_unwind_memory (fi, addr + 2 + imm_size, buf, 3)) | |
679 | goto finish_prologue; | |
680 | if ((buf[0] & 0xfc) == 0x3c) | |
681 | { | |
682 | /* Occasionally, especially with C++ code, the "fmov" | |
683 | instructions will be preceded by "mov sp,aN" | |
684 | (aN => a0, a1, a2, or a3). | |
685 | ||
686 | This is a one byte instruction: mov sp,aN = 0011 11XX | |
687 | where XX is the register number. | |
688 | ||
e92e42f5 KB |
689 | Skip this instruction by incrementing addr. The "fmov" |
690 | instructions will have the form "fmov fs#,(aN+)" in this | |
691 | case, but that will not necessitate a change in the | |
692 | "fmov" parsing logic below. */ | |
4640dd91 KB |
693 | |
694 | addr++; | |
695 | ||
696 | if ((buf[1] & 0xfc) == 0x20) | |
697 | { | |
698 | /* Occasionally, especially with C++ code compiled with | |
699 | the -fomit-frame-pointer or -O3 options, the | |
700 | "mov sp,aN" instruction will be followed by an | |
701 | "add #,aN" instruction. This indicates the | |
702 | "stack_size", the size of the portion of the stack | |
703 | containing the arguments. This instruction format is: | |
704 | add #,aN = 0010 00XX YYYY YYYY | |
705 | where XX is the register number | |
706 | YYYY YYYY is the constant. | |
707 | Note the size of the stack (as a negative number) in | |
708 | the frame info structure. */ | |
709 | if (fi) | |
710 | stack_extra_size += -buf[2]; | |
711 | ||
712 | addr += 2; | |
713 | } | |
714 | } | |
715 | ||
716 | if ((buf[0] & 0xfc) == 0x3c || | |
717 | buf[0] == 0xf9 || buf[0] == 0xfb) | |
718 | { | |
719 | /* An "fmov" instruction has been found indicating that this | |
720 | prologue saves floating point registers (or, as described | |
721 | above, a "mov sp,aN" and possible "add #,aN" have been | |
722 | found and we will assume an "fmov" follows). Process the | |
723 | consecutive "fmov" instructions. */ | |
724 | for (addr += 2 + imm_size;;addr += imm_size) | |
725 | { | |
726 | int regnum; | |
727 | ||
728 | /* Read the "fmov" instruction. */ | |
729 | if (addr >= stop || | |
730 | !safe_frame_unwind_memory (fi, addr, buf, 4)) | |
731 | goto finish_prologue; | |
732 | ||
733 | if (buf[0] != 0xf9 && buf[0] != 0xfb) | |
734 | break; | |
735 | ||
e92e42f5 | 736 | /* An fmov instruction has just been seen. We can |
83845630 KB |
737 | now really commit to the pattern match. */ |
738 | ||
739 | fmov_found = 1; | |
e92e42f5 | 740 | |
4640dd91 KB |
741 | /* Get the floating point register number from the |
742 | 2nd and 3rd bytes of the "fmov" instruction: | |
743 | Machine Code: 0000 00X0 YYYY 0000 => | |
744 | Regnum: 000X YYYY */ | |
745 | regnum = (buf[1] & 0x02) << 3; | |
746 | regnum |= ((buf[2] & 0xf0) >> 4) & 0x0f; | |
747 | ||
748 | /* Add this register number to the bit mask of floating | |
749 | point registers that have been saved. */ | |
750 | fpregmask |= 1 << regnum; | |
751 | ||
752 | /* Determine the length of this "fmov" instruction. | |
753 | fmov fs#,(sp) => 3 byte instruction | |
754 | fmov fs#,(#,sp) => 4 byte instruction */ | |
755 | imm_size = (buf[0] == 0xf9) ? 3 : 4; | |
756 | } | |
757 | } | |
4640dd91 | 758 | } |
4640dd91 | 759 | } |
83845630 KB |
760 | /* If no fmov instructions were found by the above sequence, reset |
761 | the state and pretend that the above bit of code never happened. */ | |
762 | if (!fmov_found) | |
763 | { | |
764 | addr = restore_addr; | |
8defab1a | 765 | status = target_read_memory (addr, buf, 2); |
83845630 KB |
766 | if (status != 0) |
767 | goto finish_prologue; | |
768 | stack_extra_size = 0; | |
769 | } | |
4640dd91 KB |
770 | } |
771 | ||
9cacebf5 MS |
772 | /* Now see if we set up a frame pointer via "mov sp,a3" */ |
773 | if (buf[0] == 0x3f) | |
774 | { | |
775 | addr += 1; | |
776 | ||
777 | /* The frame pointer is now valid. */ | |
778 | if (fi) | |
779 | { | |
4640dd91 | 780 | frame_in_fp = 1; |
9cacebf5 MS |
781 | } |
782 | ||
783 | /* Quit now if we're beyond the stop point. */ | |
784 | if (addr >= stop) | |
785 | goto finish_prologue; | |
786 | ||
787 | /* Get two more bytes so scanning can continue. */ | |
f2c8bc43 | 788 | if (!safe_frame_unwind_memory (fi, addr, buf, 2)) |
9cacebf5 MS |
789 | goto finish_prologue; |
790 | } | |
791 | ||
792 | /* Next we should allocate the local frame. No more prologue insns | |
793 | are found after allocating the local frame. | |
794 | ||
795 | Search for add imm8,sp (0xf8feXX) | |
796 | or add imm16,sp (0xfafeXXXX) | |
797 | or add imm32,sp (0xfcfeXXXXXXXX). | |
798 | ||
799 | If none of the above was found, then this prologue has no | |
800 | additional stack. */ | |
801 | ||
802 | imm_size = 0; | |
803 | if (buf[0] == 0xf8 && buf[1] == 0xfe) | |
804 | imm_size = 1; | |
805 | else if (buf[0] == 0xfa && buf[1] == 0xfe) | |
806 | imm_size = 2; | |
807 | else if (buf[0] == 0xfc && buf[1] == 0xfe) | |
808 | imm_size = 4; | |
809 | ||
810 | if (imm_size != 0) | |
811 | { | |
812 | /* Suck in imm_size more bytes, they'll hold the size of the | |
813 | current frame. */ | |
f2c8bc43 | 814 | if (!safe_frame_unwind_memory (fi, addr + 2, buf, imm_size)) |
9cacebf5 MS |
815 | goto finish_prologue; |
816 | ||
4640dd91 | 817 | /* Note the size of the stack. */ |
e92e42f5 | 818 | stack_extra_size -= extract_signed_integer (buf, imm_size); |
9cacebf5 MS |
819 | |
820 | /* We just consumed 2 + imm_size bytes. */ | |
821 | addr += 2 + imm_size; | |
822 | ||
823 | /* No more prologue insns follow, so begin preparation to return. */ | |
824 | goto finish_prologue; | |
825 | } | |
826 | /* Do the essentials and get out of here. */ | |
827 | finish_prologue: | |
828 | /* Note if/where callee saved registers were saved. */ | |
829 | if (fi) | |
d15cf01c MD |
830 | set_reg_offsets (fi, this_cache, movm_args, fpregmask, stack_extra_size, |
831 | frame_in_fp); | |
9cacebf5 MS |
832 | return addr; |
833 | } | |
834 | ||
342ee437 MS |
835 | /* Function: skip_prologue |
836 | Return the address of the first inst past the prologue of the function. */ | |
837 | ||
838 | static CORE_ADDR | |
6093d2eb | 839 | mn10300_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
342ee437 | 840 | { |
d15cf01c | 841 | return mn10300_analyze_prologue (gdbarch, NULL, NULL, pc); |
342ee437 MS |
842 | } |
843 | ||
844 | /* Simple frame_unwind_cache. | |
845 | This finds the "extra info" for the frame. */ | |
846 | struct trad_frame_cache * | |
94afd7a6 | 847 | mn10300_frame_unwind_cache (struct frame_info *this_frame, |
342ee437 MS |
848 | void **this_prologue_cache) |
849 | { | |
d15cf01c | 850 | struct gdbarch *gdbarch; |
342ee437 | 851 | struct trad_frame_cache *cache; |
1fb1ca27 | 852 | CORE_ADDR pc, start, end; |
ec20a626 | 853 | void *cache_p; |
342ee437 MS |
854 | |
855 | if (*this_prologue_cache) | |
856 | return (*this_prologue_cache); | |
857 | ||
94afd7a6 UW |
858 | gdbarch = get_frame_arch (this_frame); |
859 | cache_p = trad_frame_cache_zalloc (this_frame); | |
860 | pc = get_frame_register_unsigned (this_frame, E_PC_REGNUM); | |
861 | mn10300_analyze_prologue (gdbarch, this_frame, &cache_p, pc); | |
ec20a626 UW |
862 | cache = cache_p; |
863 | ||
1fb1ca27 MS |
864 | if (find_pc_partial_function (pc, NULL, &start, &end)) |
865 | trad_frame_set_id (cache, | |
866 | frame_id_build (trad_frame_get_this_base (cache), | |
867 | start)); | |
868 | else | |
93d42b30 | 869 | { |
94afd7a6 | 870 | start = get_frame_func (this_frame); |
93d42b30 DJ |
871 | trad_frame_set_id (cache, |
872 | frame_id_build (trad_frame_get_this_base (cache), | |
873 | start)); | |
874 | } | |
342ee437 MS |
875 | |
876 | (*this_prologue_cache) = cache; | |
877 | return cache; | |
878 | } | |
879 | ||
880 | /* Here is a dummy implementation. */ | |
881 | static struct frame_id | |
94afd7a6 | 882 | mn10300_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
342ee437 | 883 | { |
94afd7a6 UW |
884 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, E_SP_REGNUM); |
885 | CORE_ADDR pc = get_frame_register_unsigned (this_frame, E_PC_REGNUM); | |
886 | return frame_id_build (sp, pc); | |
342ee437 MS |
887 | } |
888 | ||
889 | /* Trad frame implementation. */ | |
890 | static void | |
94afd7a6 | 891 | mn10300_frame_this_id (struct frame_info *this_frame, |
342ee437 MS |
892 | void **this_prologue_cache, |
893 | struct frame_id *this_id) | |
894 | { | |
895 | struct trad_frame_cache *cache = | |
94afd7a6 | 896 | mn10300_frame_unwind_cache (this_frame, this_prologue_cache); |
342ee437 MS |
897 | |
898 | trad_frame_get_id (cache, this_id); | |
899 | } | |
900 | ||
94afd7a6 UW |
901 | static struct value * |
902 | mn10300_frame_prev_register (struct frame_info *this_frame, | |
903 | void **this_prologue_cache, int regnum) | |
342ee437 MS |
904 | { |
905 | struct trad_frame_cache *cache = | |
94afd7a6 | 906 | mn10300_frame_unwind_cache (this_frame, this_prologue_cache); |
342ee437 | 907 | |
94afd7a6 | 908 | return trad_frame_get_register (cache, this_frame, regnum); |
342ee437 MS |
909 | } |
910 | ||
911 | static const struct frame_unwind mn10300_frame_unwind = { | |
912 | NORMAL_FRAME, | |
913 | mn10300_frame_this_id, | |
94afd7a6 UW |
914 | mn10300_frame_prev_register, |
915 | NULL, | |
916 | default_frame_sniffer | |
342ee437 MS |
917 | }; |
918 | ||
919 | static CORE_ADDR | |
94afd7a6 | 920 | mn10300_frame_base_address (struct frame_info *this_frame, |
342ee437 MS |
921 | void **this_prologue_cache) |
922 | { | |
923 | struct trad_frame_cache *cache = | |
94afd7a6 | 924 | mn10300_frame_unwind_cache (this_frame, this_prologue_cache); |
342ee437 MS |
925 | |
926 | return trad_frame_get_this_base (cache); | |
927 | } | |
928 | ||
342ee437 MS |
929 | static const struct frame_base mn10300_frame_base = { |
930 | &mn10300_frame_unwind, | |
931 | mn10300_frame_base_address, | |
932 | mn10300_frame_base_address, | |
933 | mn10300_frame_base_address | |
934 | }; | |
935 | ||
936 | static CORE_ADDR | |
937 | mn10300_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
938 | { | |
939 | ULONGEST pc; | |
940 | ||
11411de3 | 941 | pc = frame_unwind_register_unsigned (next_frame, E_PC_REGNUM); |
342ee437 MS |
942 | return pc; |
943 | } | |
944 | ||
945 | static CORE_ADDR | |
946 | mn10300_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
947 | { | |
948 | ULONGEST sp; | |
949 | ||
11411de3 | 950 | sp = frame_unwind_register_unsigned (next_frame, E_SP_REGNUM); |
342ee437 MS |
951 | return sp; |
952 | } | |
953 | ||
954 | static void | |
955 | mn10300_frame_unwind_init (struct gdbarch *gdbarch) | |
956 | { | |
94afd7a6 UW |
957 | dwarf2_append_unwinders (gdbarch); |
958 | frame_unwind_append_unwinder (gdbarch, &mn10300_frame_unwind); | |
342ee437 | 959 | frame_base_set_default (gdbarch, &mn10300_frame_base); |
94afd7a6 | 960 | set_gdbarch_dummy_id (gdbarch, mn10300_dummy_id); |
342ee437 MS |
961 | set_gdbarch_unwind_pc (gdbarch, mn10300_unwind_pc); |
962 | set_gdbarch_unwind_sp (gdbarch, mn10300_unwind_sp); | |
963 | } | |
964 | ||
965 | /* Function: push_dummy_call | |
966 | * | |
967 | * Set up machine state for a target call, including | |
968 | * function arguments, stack, return address, etc. | |
969 | * | |
970 | */ | |
971 | ||
972 | static CORE_ADDR | |
973 | mn10300_push_dummy_call (struct gdbarch *gdbarch, | |
974 | struct value *target_func, | |
975 | struct regcache *regcache, | |
976 | CORE_ADDR bp_addr, | |
977 | int nargs, struct value **args, | |
978 | CORE_ADDR sp, | |
979 | int struct_return, | |
980 | CORE_ADDR struct_addr) | |
981 | { | |
982 | const int push_size = register_size (gdbarch, E_PC_REGNUM); | |
1fb1ca27 | 983 | int regs_used; |
342ee437 MS |
984 | int len, arg_len; |
985 | int stack_offset = 0; | |
986 | int argnum; | |
1fb1ca27 | 987 | char *val, valbuf[MAX_REGISTER_SIZE]; |
342ee437 | 988 | |
342ee437 MS |
989 | /* This should be a nop, but align the stack just in case something |
990 | went wrong. Stacks are four byte aligned on the mn10300. */ | |
991 | sp &= ~3; | |
992 | ||
993 | /* Now make space on the stack for the args. | |
994 | ||
995 | XXX This doesn't appear to handle pass-by-invisible reference | |
996 | arguments. */ | |
1fb1ca27 | 997 | regs_used = struct_return ? 1 : 0; |
342ee437 MS |
998 | for (len = 0, argnum = 0; argnum < nargs; argnum++) |
999 | { | |
1000 | arg_len = (TYPE_LENGTH (value_type (args[argnum])) + 3) & ~3; | |
342ee437 MS |
1001 | while (regs_used < 2 && arg_len > 0) |
1002 | { | |
1003 | regs_used++; | |
1004 | arg_len -= push_size; | |
1005 | } | |
1006 | len += arg_len; | |
1007 | } | |
1008 | ||
1009 | /* Allocate stack space. */ | |
1010 | sp -= len; | |
1011 | ||
1fb1ca27 MS |
1012 | if (struct_return) |
1013 | { | |
1014 | regs_used = 1; | |
9c9acae0 | 1015 | regcache_cooked_write_unsigned (regcache, E_D0_REGNUM, struct_addr); |
1fb1ca27 MS |
1016 | } |
1017 | else | |
1018 | regs_used = 0; | |
1019 | ||
342ee437 MS |
1020 | /* Push all arguments onto the stack. */ |
1021 | for (argnum = 0; argnum < nargs; argnum++) | |
1022 | { | |
1fb1ca27 MS |
1023 | /* FIXME what about structs? Unions? */ |
1024 | if (TYPE_CODE (value_type (*args)) == TYPE_CODE_STRUCT | |
1025 | && TYPE_LENGTH (value_type (*args)) > 8) | |
1026 | { | |
1027 | /* Change to pointer-to-type. */ | |
1028 | arg_len = push_size; | |
1029 | store_unsigned_integer (valbuf, push_size, | |
1030 | VALUE_ADDRESS (*args)); | |
1031 | val = &valbuf[0]; | |
1032 | } | |
1033 | else | |
1034 | { | |
1035 | arg_len = TYPE_LENGTH (value_type (*args)); | |
1036 | val = (char *) value_contents (*args); | |
1037 | } | |
342ee437 MS |
1038 | |
1039 | while (regs_used < 2 && arg_len > 0) | |
1040 | { | |
9c9acae0 UW |
1041 | regcache_cooked_write_unsigned (regcache, regs_used, |
1042 | extract_unsigned_integer (val, push_size)); | |
342ee437 MS |
1043 | val += push_size; |
1044 | arg_len -= push_size; | |
1045 | regs_used++; | |
1046 | } | |
1047 | ||
1048 | while (arg_len > 0) | |
1049 | { | |
1050 | write_memory (sp + stack_offset, val, push_size); | |
1051 | arg_len -= push_size; | |
1052 | val += push_size; | |
1053 | stack_offset += push_size; | |
1054 | } | |
1055 | ||
1056 | args++; | |
1057 | } | |
1058 | ||
1059 | /* Make space for the flushback area. */ | |
1060 | sp -= 8; | |
1061 | ||
1062 | /* Push the return address that contains the magic breakpoint. */ | |
1063 | sp -= 4; | |
1064 | write_memory_unsigned_integer (sp, push_size, bp_addr); | |
a64ae7e0 CV |
1065 | |
1066 | /* The CPU also writes the return address always into the | |
1067 | MDR register on "call". */ | |
1068 | regcache_cooked_write_unsigned (regcache, E_MDR_REGNUM, bp_addr); | |
1069 | ||
342ee437 MS |
1070 | /* Update $sp. */ |
1071 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, sp); | |
ee3a2f01 KB |
1072 | |
1073 | /* On the mn10300, it's possible to move some of the stack adjustment | |
1074 | and saving of the caller-save registers out of the prologue and | |
1075 | into the call sites. (When using gcc, this optimization can | |
1076 | occur when using the -mrelax switch.) If this occurs, the dwarf2 | |
1077 | info will reflect this fact. We can test to see if this is the | |
1078 | case by creating a new frame using the current stack pointer and | |
1079 | the address of the function that we're about to call. We then | |
1080 | unwind SP and see if it's different than the SP of our newly | |
1081 | created frame. If the SP values are the same, the caller is not | |
1082 | expected to allocate any additional stack. On the other hand, if | |
1083 | the SP values are different, the difference determines the | |
1084 | additional stack that must be allocated. | |
1085 | ||
1086 | Note that we don't update the return value though because that's | |
1087 | the value of the stack just after pushing the arguments, but prior | |
1088 | to performing the call. This value is needed in order to | |
1089 | construct the frame ID of the dummy call. */ | |
1090 | { | |
1091 | CORE_ADDR func_addr = find_function_addr (target_func, NULL); | |
1092 | CORE_ADDR unwound_sp | |
1093 | = mn10300_unwind_sp (gdbarch, create_new_frame (sp, func_addr)); | |
1094 | if (sp != unwound_sp) | |
1095 | regcache_cooked_write_unsigned (regcache, E_SP_REGNUM, | |
1096 | sp - (unwound_sp - sp)); | |
1097 | } | |
1098 | ||
342ee437 MS |
1099 | return sp; |
1100 | } | |
1101 | ||
336c28c5 KB |
1102 | /* If DWARF2 is a register number appearing in Dwarf2 debug info, then |
1103 | mn10300_dwarf2_reg_to_regnum (DWARF2) is the corresponding GDB | |
1104 | register number. Why don't Dwarf2 and GDB use the same numbering? | |
1105 | Who knows? But since people have object files lying around with | |
1106 | the existing Dwarf2 numbering, and other people have written stubs | |
1107 | to work with the existing GDB, neither of them can change. So we | |
1108 | just have to cope. */ | |
1109 | static int | |
be8626e0 | 1110 | mn10300_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int dwarf2) |
336c28c5 | 1111 | { |
c9f4d572 | 1112 | /* This table is supposed to be shaped like the gdbarch_register_name |
336c28c5 KB |
1113 | initializer in gcc/config/mn10300/mn10300.h. Registers which |
1114 | appear in GCC's numbering, but have no counterpart in GDB's | |
1115 | world, are marked with a -1. */ | |
1116 | static int dwarf2_to_gdb[] = { | |
1117 | 0, 1, 2, 3, 4, 5, 6, 7, -1, 8, | |
1118 | 15, 16, 17, 18, 19, 20, 21, 22, | |
1119 | 32, 33, 34, 35, 36, 37, 38, 39, | |
1120 | 40, 41, 42, 43, 44, 45, 46, 47, | |
1121 | 48, 49, 50, 51, 52, 53, 54, 55, | |
bbc1a784 KB |
1122 | 56, 57, 58, 59, 60, 61, 62, 63, |
1123 | 9 | |
336c28c5 KB |
1124 | }; |
1125 | ||
1126 | if (dwarf2 < 0 | |
bbc1a784 | 1127 | || dwarf2 >= ARRAY_SIZE (dwarf2_to_gdb)) |
154b82dc KB |
1128 | { |
1129 | warning (_("Bogus register number in debug info: %d"), dwarf2); | |
bbc1a784 | 1130 | return -1; |
154b82dc | 1131 | } |
336c28c5 KB |
1132 | |
1133 | return dwarf2_to_gdb[dwarf2]; | |
1134 | } | |
342ee437 MS |
1135 | |
1136 | static struct gdbarch * | |
1137 | mn10300_gdbarch_init (struct gdbarch_info info, | |
1138 | struct gdbarch_list *arches) | |
1139 | { | |
1140 | struct gdbarch *gdbarch; | |
1141 | struct gdbarch_tdep *tdep; | |
4640dd91 | 1142 | int num_regs; |
342ee437 MS |
1143 | |
1144 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1145 | if (arches != NULL) | |
1146 | return arches->gdbarch; | |
1147 | ||
1148 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); | |
1149 | gdbarch = gdbarch_alloc (&info, tdep); | |
1150 | ||
1151 | switch (info.bfd_arch_info->mach) | |
1152 | { | |
1153 | case 0: | |
1154 | case bfd_mach_mn10300: | |
1155 | set_gdbarch_register_name (gdbarch, mn10300_generic_register_name); | |
1156 | tdep->am33_mode = 0; | |
4640dd91 | 1157 | num_regs = 32; |
342ee437 MS |
1158 | break; |
1159 | case bfd_mach_am33: | |
1160 | set_gdbarch_register_name (gdbarch, am33_register_name); | |
1161 | tdep->am33_mode = 1; | |
4640dd91 KB |
1162 | num_regs = 32; |
1163 | break; | |
1164 | case bfd_mach_am33_2: | |
1165 | set_gdbarch_register_name (gdbarch, am33_2_register_name); | |
1166 | tdep->am33_mode = 2; | |
1167 | num_regs = 64; | |
1168 | set_gdbarch_fp0_regnum (gdbarch, 32); | |
342ee437 MS |
1169 | break; |
1170 | default: | |
1171 | internal_error (__FILE__, __LINE__, | |
1172 | _("mn10300_gdbarch_init: Unknown mn10300 variant")); | |
1173 | break; | |
1174 | } | |
1175 | ||
1176 | /* Registers. */ | |
4640dd91 | 1177 | set_gdbarch_num_regs (gdbarch, num_regs); |
342ee437 MS |
1178 | set_gdbarch_register_type (gdbarch, mn10300_register_type); |
1179 | set_gdbarch_skip_prologue (gdbarch, mn10300_skip_prologue); | |
1180 | set_gdbarch_read_pc (gdbarch, mn10300_read_pc); | |
1181 | set_gdbarch_write_pc (gdbarch, mn10300_write_pc); | |
1182 | set_gdbarch_pc_regnum (gdbarch, E_PC_REGNUM); | |
1183 | set_gdbarch_sp_regnum (gdbarch, E_SP_REGNUM); | |
336c28c5 | 1184 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, mn10300_dwarf2_reg_to_regnum); |
342ee437 MS |
1185 | |
1186 | /* Stack unwinding. */ | |
1187 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1188 | /* Breakpoints. */ | |
1189 | set_gdbarch_breakpoint_from_pc (gdbarch, mn10300_breakpoint_from_pc); | |
1190 | /* decr_pc_after_break? */ | |
1191 | /* Disassembly. */ | |
1192 | set_gdbarch_print_insn (gdbarch, print_insn_mn10300); | |
1193 | ||
1194 | /* Stage 2 */ | |
99fe5f9d | 1195 | set_gdbarch_return_value (gdbarch, mn10300_return_value); |
342ee437 MS |
1196 | |
1197 | /* Stage 3 -- get target calls working. */ | |
1198 | set_gdbarch_push_dummy_call (gdbarch, mn10300_push_dummy_call); | |
1199 | /* set_gdbarch_return_value (store, extract) */ | |
1200 | ||
1201 | ||
1202 | mn10300_frame_unwind_init (gdbarch); | |
1203 | ||
697e3bc9 KB |
1204 | /* Hook in ABI-specific overrides, if they have been registered. */ |
1205 | gdbarch_init_osabi (info, gdbarch); | |
1206 | ||
342ee437 MS |
1207 | return gdbarch; |
1208 | } | |
1209 | ||
1210 | /* Dump out the mn10300 specific architecture information. */ | |
1211 | ||
1212 | static void | |
d93859e2 | 1213 | mn10300_dump_tdep (struct gdbarch *gdbarch, struct ui_file *file) |
342ee437 | 1214 | { |
d93859e2 | 1215 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
342ee437 MS |
1216 | fprintf_unfiltered (file, "mn10300_dump_tdep: am33_mode = %d\n", |
1217 | tdep->am33_mode); | |
1218 | } | |
1219 | ||
63807e1d PA |
1220 | /* Provide a prototype to silence -Wmissing-prototypes. */ |
1221 | extern initialize_file_ftype _initialize_mn10300_tdep; | |
1222 | ||
342ee437 MS |
1223 | void |
1224 | _initialize_mn10300_tdep (void) | |
1225 | { | |
1226 | gdbarch_register (bfd_arch_mn10300, mn10300_gdbarch_init, mn10300_dump_tdep); | |
1227 | } | |
1228 |