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d7066cce AG |
1 | /* Target-dependent code for Moxie. |
2 | ||
ecd75fc8 | 3 | Copyright (C) 2009-2014 Free Software Foundation, Inc. |
d7066cce AG |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 3 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
19 | ||
20 | #include "defs.h" | |
21 | #include "frame.h" | |
22 | #include "frame-unwind.h" | |
23 | #include "frame-base.h" | |
24 | #include "symtab.h" | |
25 | #include "gdbtypes.h" | |
26 | #include "gdbcmd.h" | |
27 | #include "gdbcore.h" | |
d7066cce AG |
28 | #include "value.h" |
29 | #include "inferior.h" | |
30 | #include "symfile.h" | |
31 | #include "objfiles.h" | |
32 | #include "osabi.h" | |
33 | #include "language.h" | |
34 | #include "arch-utils.h" | |
35 | #include "regcache.h" | |
36 | #include "trad-frame.h" | |
37 | #include "dis-asm.h" | |
451fa05e | 38 | #include "record.h" |
d02ed0bb | 39 | #include "record-full.h" |
d7066cce | 40 | |
d7066cce AG |
41 | #include "moxie-tdep.h" |
42 | ||
43 | /* Local functions. */ | |
44 | ||
45 | extern void _initialize_moxie_tdep (void); | |
46 | ||
47 | /* Use an invalid address value as 'not available' marker. */ | |
48 | enum { REG_UNAVAIL = (CORE_ADDR) -1 }; | |
49 | ||
50 | struct moxie_frame_cache | |
51 | { | |
52 | /* Base address. */ | |
53 | CORE_ADDR base; | |
54 | CORE_ADDR pc; | |
55 | LONGEST framesize; | |
56 | CORE_ADDR saved_regs[MOXIE_NUM_REGS]; | |
57 | CORE_ADDR saved_sp; | |
58 | }; | |
59 | ||
60 | /* Implement the "frame_align" gdbarch method. */ | |
61 | ||
62 | static CORE_ADDR | |
63 | moxie_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp) | |
64 | { | |
65 | /* Align to the size of an instruction (so that they can safely be | |
66 | pushed onto the stack. */ | |
67 | return sp & ~1; | |
68 | } | |
69 | ||
70 | /* Implement the "breakpoint_from_pc" gdbarch method. */ | |
71 | ||
44d100c3 | 72 | static const unsigned char * |
451fa05e | 73 | moxie_breakpoint_from_pc (struct gdbarch *gdbarch, |
d7066cce AG |
74 | CORE_ADDR *pcptr, int *lenptr) |
75 | { | |
76 | static unsigned char breakpoint[] = { 0x35, 0x00 }; | |
77 | ||
78 | *lenptr = sizeof (breakpoint); | |
79 | return breakpoint; | |
80 | } | |
81 | ||
82 | /* Moxie register names. */ | |
83 | ||
84 | char *moxie_register_names[] = { | |
85 | "$fp", "$sp", "$r0", "$r1", "$r2", | |
86 | "$r3", "$r4", "$r5", "$r6", "$r7", | |
87 | "$r8", "$r9", "$r10", "$r11", "$r12", | |
88 | "$r13", "$pc", "$cc" }; | |
89 | ||
90 | /* Implement the "register_name" gdbarch method. */ | |
91 | ||
92 | static const char * | |
93 | moxie_register_name (struct gdbarch *gdbarch, int reg_nr) | |
94 | { | |
95 | if (reg_nr < 0) | |
96 | return NULL; | |
97 | if (reg_nr >= MOXIE_NUM_REGS) | |
98 | return NULL; | |
99 | return moxie_register_names[reg_nr]; | |
100 | } | |
101 | ||
102 | /* Implement the "register_type" gdbarch method. */ | |
103 | ||
104 | static struct type * | |
105 | moxie_register_type (struct gdbarch *gdbarch, int reg_nr) | |
106 | { | |
107 | if (reg_nr == MOXIE_PC_REGNUM) | |
108 | return builtin_type (gdbarch)->builtin_func_ptr; | |
109 | else if (reg_nr == MOXIE_SP_REGNUM || reg_nr == MOXIE_FP_REGNUM) | |
110 | return builtin_type (gdbarch)->builtin_data_ptr; | |
111 | else | |
df4df182 | 112 | return builtin_type (gdbarch)->builtin_int32; |
d7066cce AG |
113 | } |
114 | ||
115 | /* Write into appropriate registers a function return value | |
116 | of type TYPE, given in virtual format. */ | |
117 | ||
118 | static void | |
119 | moxie_store_return_value (struct type *type, struct regcache *regcache, | |
120 | const void *valbuf) | |
121 | { | |
e17a4113 UW |
122 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
123 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
d7066cce AG |
124 | CORE_ADDR regval; |
125 | int len = TYPE_LENGTH (type); | |
126 | ||
127 | /* Things always get returned in RET1_REGNUM, RET2_REGNUM. */ | |
e17a4113 | 128 | regval = extract_unsigned_integer (valbuf, len > 4 ? 4 : len, byte_order); |
d7066cce AG |
129 | regcache_cooked_write_unsigned (regcache, RET1_REGNUM, regval); |
130 | if (len > 4) | |
131 | { | |
e17a4113 UW |
132 | regval = extract_unsigned_integer ((gdb_byte *) valbuf + 4, |
133 | len - 4, byte_order); | |
d7066cce AG |
134 | regcache_cooked_write_unsigned (regcache, RET1_REGNUM + 1, regval); |
135 | } | |
136 | } | |
137 | ||
138 | /* Decode the instructions within the given address range. Decide | |
139 | when we must have reached the end of the function prologue. If a | |
140 | frame_info pointer is provided, fill in its saved_regs etc. | |
141 | ||
142 | Returns the address of the first instruction after the prologue. */ | |
143 | ||
144 | static CORE_ADDR | |
145 | moxie_analyze_prologue (CORE_ADDR start_addr, CORE_ADDR end_addr, | |
99f75275 AG |
146 | struct moxie_frame_cache *cache, |
147 | struct gdbarch *gdbarch) | |
d7066cce | 148 | { |
e17a4113 | 149 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
d7066cce AG |
150 | CORE_ADDR next_addr; |
151 | ULONGEST inst, inst2; | |
152 | LONGEST offset; | |
153 | int regnum; | |
154 | ||
155 | /* Record where the jsra instruction saves the PC and FP. */ | |
156 | cache->saved_regs[MOXIE_PC_REGNUM] = -4; | |
157 | cache->saved_regs[MOXIE_FP_REGNUM] = 0; | |
158 | cache->framesize = 0; | |
159 | ||
160 | if (start_addr >= end_addr) | |
161 | return end_addr; | |
162 | ||
163 | for (next_addr = start_addr; next_addr < end_addr; ) | |
164 | { | |
e17a4113 | 165 | inst = read_memory_unsigned_integer (next_addr, 2, byte_order); |
d7066cce | 166 | |
5152ff90 AG |
167 | /* Match "push $sp $rN" where N is between 0 and 13 inclusive. */ |
168 | if (inst >= 0x0612 && inst <= 0x061f) | |
d7066cce AG |
169 | { |
170 | regnum = inst & 0x000f; | |
171 | cache->framesize += 4; | |
172 | cache->saved_regs[regnum] = cache->framesize; | |
173 | next_addr += 2; | |
174 | } | |
4ee73e90 AG |
175 | else |
176 | break; | |
ce0bf488 | 177 | } |
d7066cce | 178 | |
ce0bf488 | 179 | inst = read_memory_unsigned_integer (next_addr, 2, byte_order); |
d7066cce | 180 | |
ce0bf488 AG |
181 | /* Optional stack allocation for args and local vars <= 4 |
182 | byte. */ | |
5152ff90 | 183 | if (inst == 0x01e0) /* ldi.l $r12, X */ |
ce0bf488 AG |
184 | { |
185 | offset = read_memory_integer (next_addr + 2, 4, byte_order); | |
186 | inst2 = read_memory_unsigned_integer (next_addr + 6, 2, byte_order); | |
187 | ||
5152ff90 | 188 | if (inst2 == 0x291e) /* sub.l $sp, $r12 */ |
ce0bf488 AG |
189 | { |
190 | cache->framesize += offset; | |
191 | } | |
192 | ||
193 | return (next_addr + 8); | |
194 | } | |
5152ff90 | 195 | else if ((inst & 0xff00) == 0x9100) /* dec $sp, X */ |
ce0bf488 AG |
196 | { |
197 | cache->framesize += (inst & 0x00ff); | |
198 | next_addr += 2; | |
d7066cce | 199 | |
ce0bf488 AG |
200 | while (next_addr < end_addr) |
201 | { | |
202 | inst = read_memory_unsigned_integer (next_addr, 2, byte_order); | |
5152ff90 | 203 | if ((inst & 0xff00) != 0x9100) /* no more dec $sp, X */ |
ce0bf488 AG |
204 | break; |
205 | cache->framesize += (inst & 0x00ff); | |
206 | next_addr += 2; | |
d7066cce | 207 | } |
d7066cce AG |
208 | } |
209 | ||
210 | return next_addr; | |
211 | } | |
212 | ||
213 | /* Find the end of function prologue. */ | |
214 | ||
215 | static CORE_ADDR | |
216 | moxie_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) | |
217 | { | |
218 | CORE_ADDR func_addr = 0, func_end = 0; | |
2c02bd72 | 219 | const char *func_name; |
d7066cce AG |
220 | |
221 | /* See if we can determine the end of the prologue via the symbol table. | |
222 | If so, then return either PC, or the PC after the prologue, whichever | |
223 | is greater. */ | |
224 | if (find_pc_partial_function (pc, &func_name, &func_addr, &func_end)) | |
225 | { | |
d80b854b UW |
226 | CORE_ADDR post_prologue_pc |
227 | = skip_prologue_using_sal (gdbarch, func_addr); | |
d7066cce AG |
228 | if (post_prologue_pc != 0) |
229 | return max (pc, post_prologue_pc); | |
230 | else | |
231 | { | |
232 | /* Can't determine prologue from the symbol table, need to examine | |
233 | instructions. */ | |
234 | struct symtab_and_line sal; | |
235 | struct symbol *sym; | |
236 | struct moxie_frame_cache cache; | |
237 | CORE_ADDR plg_end; | |
238 | ||
239 | memset (&cache, 0, sizeof cache); | |
240 | ||
241 | plg_end = moxie_analyze_prologue (func_addr, | |
99f75275 | 242 | func_end, &cache, gdbarch); |
d7066cce AG |
243 | /* Found a function. */ |
244 | sym = lookup_symbol (func_name, NULL, VAR_DOMAIN, NULL); | |
245 | /* Don't use line number debug info for assembly source | |
025bb325 | 246 | files. */ |
d7066cce AG |
247 | if (sym && SYMBOL_LANGUAGE (sym) != language_asm) |
248 | { | |
249 | sal = find_pc_line (func_addr, 0); | |
250 | if (sal.end && sal.end < func_end) | |
251 | { | |
252 | /* Found a line number, use it as end of | |
253 | prologue. */ | |
254 | return sal.end; | |
255 | } | |
256 | } | |
257 | /* No useable line symbol. Use result of prologue parsing | |
258 | method. */ | |
259 | return plg_end; | |
260 | } | |
261 | } | |
262 | ||
263 | /* No function symbol -- just return the PC. */ | |
264 | return (CORE_ADDR) pc; | |
265 | } | |
266 | ||
267 | struct moxie_unwind_cache | |
268 | { | |
269 | /* The previous frame's inner most stack address. Used as this | |
270 | frame ID's stack_addr. */ | |
271 | CORE_ADDR prev_sp; | |
272 | /* The frame's base, optionally used by the high-level debug info. */ | |
273 | CORE_ADDR base; | |
274 | int size; | |
275 | /* How far the SP and r13 (FP) have been offset from the start of | |
276 | the stack frame (as defined by the previous frame's stack | |
277 | pointer). */ | |
278 | LONGEST sp_offset; | |
279 | LONGEST r13_offset; | |
280 | int uses_frame; | |
281 | /* Table indicating the location of each and every register. */ | |
282 | struct trad_frame_saved_reg *saved_regs; | |
283 | }; | |
284 | ||
6ed1ff02 AG |
285 | /* Read an unsigned integer from the inferior, and adjust |
286 | endianess. */ | |
287 | static ULONGEST | |
288 | moxie_process_readu (CORE_ADDR addr, gdb_byte *buf, | |
289 | int length, enum bfd_endian byte_order) | |
290 | { | |
291 | if (target_read_memory (addr, buf, length)) | |
292 | { | |
293 | if (record_debug) | |
294 | printf_unfiltered (_("Process record: error reading memory at " | |
295 | "addr 0x%s len = %d.\n"), | |
296 | paddress (target_gdbarch (), addr), length); | |
297 | return -1; | |
298 | } | |
299 | ||
300 | return extract_unsigned_integer (buf, length, byte_order); | |
301 | } | |
302 | ||
303 | ||
304 | /* Helper macro to extract the signed 10-bit offset from a 16-bit | |
305 | branch instruction. */ | |
306 | #define INST2OFFSET(o) ((((signed short)((o & ((1<<10)-1))<<6))>>6)<<1) | |
307 | ||
308 | /* Insert a single step breakpoint. */ | |
309 | ||
310 | static int | |
311 | moxie_software_single_step (struct frame_info *frame) | |
312 | { | |
313 | struct gdbarch *gdbarch = get_frame_arch (frame); | |
314 | struct address_space *aspace = get_frame_address_space (frame); | |
315 | CORE_ADDR addr; | |
316 | gdb_byte buf[4]; | |
317 | uint16_t inst; | |
318 | uint32_t tmpu32; | |
319 | ULONGEST fp; | |
320 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
321 | struct regcache *regcache = get_current_regcache (); | |
322 | ||
323 | addr = get_frame_pc (frame); | |
324 | ||
325 | inst = (uint16_t) moxie_process_readu (addr, buf, 2, byte_order); | |
326 | ||
327 | /* Decode instruction. */ | |
328 | if (inst & (1 << 15)) | |
329 | { | |
330 | if (inst & (1 << 14)) | |
331 | { | |
332 | /* This is a Form 3 instruction. */ | |
333 | int opcode = (inst >> 10 & 0xf); | |
334 | ||
335 | switch (opcode) | |
336 | { | |
337 | case 0x00: /* beq */ | |
338 | case 0x01: /* bne */ | |
339 | case 0x02: /* blt */ | |
340 | case 0x03: /* bgt */ | |
341 | case 0x04: /* bltu */ | |
342 | case 0x05: /* bgtu */ | |
343 | case 0x06: /* bge */ | |
344 | case 0x07: /* ble */ | |
345 | case 0x08: /* bgeu */ | |
346 | case 0x09: /* bleu */ | |
347 | /* Insert breaks on both branches, because we can't currently tell | |
348 | which way things will go. */ | |
349 | insert_single_step_breakpoint (gdbarch, aspace, addr + 2); | |
350 | insert_single_step_breakpoint (gdbarch, aspace, addr + 2 + INST2OFFSET(inst)); | |
351 | break; | |
352 | default: | |
353 | { | |
354 | /* Do nothing. */ | |
355 | break; | |
356 | } | |
357 | } | |
358 | } | |
359 | else | |
360 | { | |
361 | /* This is a Form 2 instruction. They are all 16 bits. */ | |
362 | insert_single_step_breakpoint (gdbarch, aspace, addr + 2); | |
363 | } | |
364 | } | |
365 | else | |
366 | { | |
367 | /* This is a Form 1 instruction. */ | |
368 | int opcode = inst >> 8; | |
369 | ||
370 | switch (opcode) | |
371 | { | |
372 | /* 16-bit instructions. */ | |
373 | case 0x00: /* nop */ | |
374 | case 0x02: /* mov (register-to-register) */ | |
375 | case 0x05: /* add.l */ | |
376 | case 0x06: /* push */ | |
377 | case 0x07: /* pop */ | |
378 | case 0x0a: /* ld.l (register indirect) */ | |
379 | case 0x0b: /* st.l */ | |
380 | case 0x0e: /* cmp */ | |
381 | case 0x0f: | |
382 | case 0x10: | |
383 | case 0x11: | |
384 | case 0x12: | |
385 | case 0x13: | |
386 | case 0x14: | |
387 | case 0x15: | |
388 | case 0x16: | |
389 | case 0x17: | |
390 | case 0x18: | |
391 | case 0x1c: /* ld.b (register indirect) */ | |
392 | case 0x1e: /* st.b */ | |
393 | case 0x21: /* ld.s (register indirect) */ | |
394 | case 0x23: /* st.s */ | |
395 | case 0x26: /* and */ | |
396 | case 0x27: /* lshr */ | |
397 | case 0x28: /* ashl */ | |
398 | case 0x29: /* sub.l */ | |
399 | case 0x2a: /* neg */ | |
400 | case 0x2b: /* or */ | |
401 | case 0x2c: /* not */ | |
402 | case 0x2d: /* ashr */ | |
403 | case 0x2e: /* xor */ | |
404 | case 0x2f: /* mul.l */ | |
405 | case 0x31: /* div.l */ | |
406 | case 0x32: /* udiv.l */ | |
407 | case 0x33: /* mod.l */ | |
408 | case 0x34: /* umod.l */ | |
409 | insert_single_step_breakpoint (gdbarch, aspace, addr + 2); | |
410 | break; | |
411 | ||
412 | /* 48-bit instructions. */ | |
413 | case 0x01: /* ldi.l (immediate) */ | |
414 | case 0x08: /* lda.l */ | |
415 | case 0x09: /* sta.l */ | |
416 | case 0x0c: /* ldo.l */ | |
417 | case 0x0d: /* sto.l */ | |
418 | case 0x1b: /* ldi.b (immediate) */ | |
419 | case 0x1d: /* lda.b */ | |
420 | case 0x1f: /* sta.b */ | |
421 | case 0x20: /* ldi.s (immediate) */ | |
422 | case 0x22: /* lda.s */ | |
423 | case 0x24: /* sta.s */ | |
424 | case 0x36: /* ldo.b */ | |
425 | case 0x37: /* sto.b */ | |
426 | case 0x38: /* ldo.s */ | |
427 | case 0x39: /* sto.s */ | |
428 | insert_single_step_breakpoint (gdbarch, aspace, addr + 6); | |
429 | break; | |
430 | ||
431 | /* Control flow instructions. */ | |
432 | case 0x03: /* jsra */ | |
433 | case 0x1a: /* jmpa */ | |
434 | insert_single_step_breakpoint (gdbarch, aspace, | |
435 | moxie_process_readu (addr + 2, | |
436 | buf, 4, | |
437 | byte_order)); | |
438 | break; | |
439 | ||
440 | case 0x04: /* ret */ | |
441 | regcache_cooked_read_unsigned (regcache, MOXIE_FP_REGNUM, &fp); | |
442 | insert_single_step_breakpoint (gdbarch, aspace, | |
443 | moxie_process_readu (fp + 4, | |
444 | buf, 4, | |
445 | byte_order)); | |
446 | break; | |
447 | ||
448 | case 0x19: /* jsr */ | |
449 | case 0x25: /* jmp */ | |
450 | regcache_raw_read (regcache, | |
451 | (inst >> 4) & 0xf, (gdb_byte *) & tmpu32); | |
452 | insert_single_step_breakpoint (gdbarch, aspace, | |
453 | tmpu32); | |
454 | break; | |
455 | ||
456 | case 0x30: /* swi */ | |
457 | case 0x35: /* brk */ | |
458 | /* Unsupported, for now. */ | |
459 | break; | |
460 | } | |
461 | } | |
462 | ||
463 | return 1; | |
464 | } | |
465 | ||
d7066cce AG |
466 | /* Implement the "read_pc" gdbarch method. */ |
467 | ||
468 | static CORE_ADDR | |
469 | moxie_read_pc (struct regcache *regcache) | |
470 | { | |
471 | ULONGEST pc; | |
472 | ||
473 | regcache_cooked_read_unsigned (regcache, MOXIE_PC_REGNUM, &pc); | |
474 | return pc; | |
475 | } | |
476 | ||
477 | /* Implement the "write_pc" gdbarch method. */ | |
478 | ||
479 | static void | |
480 | moxie_write_pc (struct regcache *regcache, CORE_ADDR val) | |
481 | { | |
482 | regcache_cooked_write_unsigned (regcache, MOXIE_PC_REGNUM, val); | |
483 | } | |
484 | ||
451fa05e | 485 | /* Implement the "unwind_sp" gdbarch method. */ |
d7066cce AG |
486 | |
487 | static CORE_ADDR | |
488 | moxie_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
489 | { | |
490 | return frame_unwind_register_unsigned (next_frame, MOXIE_SP_REGNUM); | |
491 | } | |
492 | ||
493 | /* Given a return value in `regbuf' with a type `valtype', | |
494 | extract and copy its value into `valbuf'. */ | |
495 | ||
496 | static void | |
497 | moxie_extract_return_value (struct type *type, struct regcache *regcache, | |
498 | void *dst) | |
499 | { | |
e17a4113 UW |
500 | struct gdbarch *gdbarch = get_regcache_arch (regcache); |
501 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
d7066cce AG |
502 | bfd_byte *valbuf = dst; |
503 | int len = TYPE_LENGTH (type); | |
504 | ULONGEST tmp; | |
505 | ||
506 | /* By using store_unsigned_integer we avoid having to do | |
507 | anything special for small big-endian values. */ | |
508 | regcache_cooked_read_unsigned (regcache, RET1_REGNUM, &tmp); | |
e17a4113 | 509 | store_unsigned_integer (valbuf, (len > 4 ? len - 4 : len), byte_order, tmp); |
d7066cce AG |
510 | |
511 | /* Ignore return values more than 8 bytes in size because the moxie | |
512 | returns anything more than 8 bytes in the stack. */ | |
513 | if (len > 4) | |
514 | { | |
515 | regcache_cooked_read_unsigned (regcache, RET1_REGNUM + 1, &tmp); | |
e17a4113 | 516 | store_unsigned_integer (valbuf + len - 4, 4, byte_order, tmp); |
d7066cce AG |
517 | } |
518 | } | |
519 | ||
520 | /* Implement the "return_value" gdbarch method. */ | |
521 | ||
522 | static enum return_value_convention | |
6a3a010b | 523 | moxie_return_value (struct gdbarch *gdbarch, struct value *function, |
d7066cce AG |
524 | struct type *valtype, struct regcache *regcache, |
525 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
526 | { | |
527 | if (TYPE_LENGTH (valtype) > 8) | |
528 | return RETURN_VALUE_STRUCT_CONVENTION; | |
529 | else | |
530 | { | |
531 | if (readbuf != NULL) | |
532 | moxie_extract_return_value (valtype, regcache, readbuf); | |
533 | if (writebuf != NULL) | |
534 | moxie_store_return_value (valtype, regcache, writebuf); | |
535 | return RETURN_VALUE_REGISTER_CONVENTION; | |
536 | } | |
537 | } | |
538 | ||
539 | /* Allocate and initialize a moxie_frame_cache object. */ | |
540 | ||
541 | static struct moxie_frame_cache * | |
542 | moxie_alloc_frame_cache (void) | |
543 | { | |
544 | struct moxie_frame_cache *cache; | |
545 | int i; | |
546 | ||
547 | cache = FRAME_OBSTACK_ZALLOC (struct moxie_frame_cache); | |
548 | ||
549 | cache->base = 0; | |
550 | cache->saved_sp = 0; | |
551 | cache->pc = 0; | |
552 | cache->framesize = 0; | |
553 | for (i = 0; i < MOXIE_NUM_REGS; ++i) | |
554 | cache->saved_regs[i] = REG_UNAVAIL; | |
555 | ||
556 | return cache; | |
557 | } | |
558 | ||
559 | /* Populate a moxie_frame_cache object for this_frame. */ | |
560 | ||
561 | static struct moxie_frame_cache * | |
562 | moxie_frame_cache (struct frame_info *this_frame, void **this_cache) | |
563 | { | |
564 | struct moxie_frame_cache *cache; | |
565 | CORE_ADDR current_pc; | |
566 | int i; | |
567 | ||
568 | if (*this_cache) | |
569 | return *this_cache; | |
570 | ||
571 | cache = moxie_alloc_frame_cache (); | |
572 | *this_cache = cache; | |
573 | ||
574 | cache->base = get_frame_register_unsigned (this_frame, MOXIE_FP_REGNUM); | |
575 | if (cache->base == 0) | |
576 | return cache; | |
577 | ||
578 | cache->pc = get_frame_func (this_frame); | |
579 | current_pc = get_frame_pc (this_frame); | |
580 | if (cache->pc) | |
99f75275 AG |
581 | { |
582 | struct gdbarch *gdbarch = get_frame_arch (this_frame); | |
583 | moxie_analyze_prologue (cache->pc, current_pc, cache, gdbarch); | |
584 | } | |
d7066cce AG |
585 | |
586 | cache->saved_sp = cache->base - cache->framesize; | |
587 | ||
588 | for (i = 0; i < MOXIE_NUM_REGS; ++i) | |
589 | if (cache->saved_regs[i] != REG_UNAVAIL) | |
590 | cache->saved_regs[i] = cache->base - cache->saved_regs[i]; | |
591 | ||
592 | return cache; | |
593 | } | |
594 | ||
595 | /* Implement the "unwind_pc" gdbarch method. */ | |
596 | ||
597 | static CORE_ADDR | |
598 | moxie_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
599 | { | |
600 | return frame_unwind_register_unsigned (next_frame, MOXIE_PC_REGNUM); | |
601 | } | |
602 | ||
603 | /* Given a GDB frame, determine the address of the calling function's | |
604 | frame. This will be used to create a new GDB frame struct. */ | |
605 | ||
606 | static void | |
607 | moxie_frame_this_id (struct frame_info *this_frame, | |
608 | void **this_prologue_cache, struct frame_id *this_id) | |
609 | { | |
610 | struct moxie_frame_cache *cache = moxie_frame_cache (this_frame, | |
611 | this_prologue_cache); | |
612 | ||
613 | /* This marks the outermost frame. */ | |
614 | if (cache->base == 0) | |
615 | return; | |
616 | ||
617 | *this_id = frame_id_build (cache->saved_sp, cache->pc); | |
618 | } | |
619 | ||
620 | /* Get the value of register regnum in the previous stack frame. */ | |
621 | ||
622 | static struct value * | |
623 | moxie_frame_prev_register (struct frame_info *this_frame, | |
624 | void **this_prologue_cache, int regnum) | |
625 | { | |
626 | struct moxie_frame_cache *cache = moxie_frame_cache (this_frame, | |
627 | this_prologue_cache); | |
628 | ||
629 | gdb_assert (regnum >= 0); | |
630 | ||
631 | if (regnum == MOXIE_SP_REGNUM && cache->saved_sp) | |
632 | return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp); | |
633 | ||
634 | if (regnum < MOXIE_NUM_REGS && cache->saved_regs[regnum] != REG_UNAVAIL) | |
635 | return frame_unwind_got_memory (this_frame, regnum, | |
636 | cache->saved_regs[regnum]); | |
637 | ||
638 | return frame_unwind_got_register (this_frame, regnum, regnum); | |
639 | } | |
640 | ||
641 | static const struct frame_unwind moxie_frame_unwind = { | |
642 | NORMAL_FRAME, | |
8fbca658 | 643 | default_frame_unwind_stop_reason, |
d7066cce AG |
644 | moxie_frame_this_id, |
645 | moxie_frame_prev_register, | |
646 | NULL, | |
647 | default_frame_sniffer | |
648 | }; | |
649 | ||
650 | /* Return the base address of this_frame. */ | |
651 | ||
652 | static CORE_ADDR | |
653 | moxie_frame_base_address (struct frame_info *this_frame, void **this_cache) | |
654 | { | |
655 | struct moxie_frame_cache *cache = moxie_frame_cache (this_frame, | |
656 | this_cache); | |
657 | ||
658 | return cache->base; | |
659 | } | |
660 | ||
661 | static const struct frame_base moxie_frame_base = { | |
662 | &moxie_frame_unwind, | |
663 | moxie_frame_base_address, | |
664 | moxie_frame_base_address, | |
665 | moxie_frame_base_address | |
666 | }; | |
667 | ||
668 | static struct frame_id | |
669 | moxie_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) | |
670 | { | |
671 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, MOXIE_SP_REGNUM); | |
672 | ||
673 | return frame_id_build (sp, get_frame_pc (this_frame)); | |
674 | } | |
675 | ||
451fa05e AG |
676 | /* Parse the current instruction and record the values of the registers and |
677 | memory that will be changed in current instruction to "record_arch_list". | |
025bb325 | 678 | Return -1 if something wrong. */ |
451fa05e | 679 | |
693be288 | 680 | static int |
451fa05e AG |
681 | moxie_process_record (struct gdbarch *gdbarch, struct regcache *regcache, |
682 | CORE_ADDR addr) | |
683 | { | |
684 | gdb_byte buf[4]; | |
685 | uint16_t inst; | |
686 | uint32_t tmpu32; | |
687 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
688 | ||
689 | if (record_debug > 1) | |
690 | fprintf_unfiltered (gdb_stdlog, "Process record: moxie_process_record " | |
691 | "addr = 0x%s\n", | |
f5656ead | 692 | paddress (target_gdbarch (), addr)); |
451fa05e AG |
693 | |
694 | inst = (uint16_t) moxie_process_readu (addr, buf, 2, byte_order); | |
695 | ||
696 | /* Decode instruction. */ | |
697 | if (inst & (1 << 15)) | |
698 | { | |
699 | if (inst & (1 << 14)) | |
700 | { | |
701 | /* This is a Form 3 instruction. */ | |
702 | int opcode = (inst >> 10 & 0xf); | |
703 | ||
704 | switch (opcode) | |
705 | { | |
706 | case 0x00: /* beq */ | |
707 | case 0x01: /* bne */ | |
708 | case 0x02: /* blt */ | |
709 | case 0x03: /* bgt */ | |
710 | case 0x04: /* bltu */ | |
711 | case 0x05: /* bgtu */ | |
712 | case 0x06: /* bge */ | |
713 | case 0x07: /* ble */ | |
714 | case 0x08: /* bgeu */ | |
715 | case 0x09: /* bleu */ | |
716 | /* Do nothing. */ | |
717 | break; | |
718 | default: | |
719 | { | |
720 | /* Do nothing. */ | |
721 | break; | |
722 | } | |
723 | } | |
724 | } | |
725 | else | |
726 | { | |
727 | /* This is a Form 2 instruction. */ | |
728 | int opcode = (inst >> 12 & 0x3); | |
729 | switch (opcode) | |
730 | { | |
731 | case 0x00: /* inc */ | |
732 | case 0x01: /* dec */ | |
733 | case 0x02: /* gsr */ | |
734 | { | |
735 | int reg = (inst >> 8) & 0xf; | |
25ea693b | 736 | if (record_full_arch_list_add_reg (regcache, reg)) |
451fa05e AG |
737 | return -1; |
738 | } | |
739 | break; | |
740 | case 0x03: /* ssr */ | |
741 | { | |
742 | /* Do nothing until GDB learns about moxie's special | |
743 | registers. */ | |
744 | } | |
745 | break; | |
746 | default: | |
747 | /* Do nothing. */ | |
748 | break; | |
749 | } | |
750 | } | |
751 | } | |
752 | else | |
753 | { | |
754 | /* This is a Form 1 instruction. */ | |
755 | int opcode = inst >> 8; | |
756 | ||
757 | switch (opcode) | |
758 | { | |
759 | case 0x00: /* nop */ | |
760 | /* Do nothing. */ | |
761 | break; | |
762 | case 0x01: /* ldi.l (immediate) */ | |
763 | case 0x02: /* mov (register-to-register) */ | |
764 | { | |
765 | int reg = (inst >> 4) & 0xf; | |
25ea693b | 766 | if (record_full_arch_list_add_reg (regcache, reg)) |
451fa05e AG |
767 | return -1; |
768 | } | |
769 | break; | |
770 | case 0x03: /* jsra */ | |
771 | { | |
772 | regcache_raw_read (regcache, | |
773 | MOXIE_SP_REGNUM, (gdb_byte *) & tmpu32); | |
774 | tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32, | |
775 | 4, byte_order); | |
25ea693b MM |
776 | if (record_full_arch_list_add_reg (regcache, MOXIE_FP_REGNUM) |
777 | || (record_full_arch_list_add_reg (regcache, | |
778 | MOXIE_SP_REGNUM)) | |
779 | || record_full_arch_list_add_mem (tmpu32 - 12, 12)) | |
451fa05e AG |
780 | return -1; |
781 | } | |
782 | break; | |
783 | case 0x04: /* ret */ | |
784 | { | |
25ea693b MM |
785 | if (record_full_arch_list_add_reg (regcache, MOXIE_FP_REGNUM) |
786 | || (record_full_arch_list_add_reg (regcache, | |
787 | MOXIE_SP_REGNUM))) | |
451fa05e AG |
788 | return -1; |
789 | } | |
790 | break; | |
791 | case 0x05: /* add.l */ | |
792 | { | |
793 | int reg = (inst >> 4) & 0xf; | |
25ea693b | 794 | if (record_full_arch_list_add_reg (regcache, reg)) |
451fa05e AG |
795 | return -1; |
796 | } | |
797 | break; | |
798 | case 0x06: /* push */ | |
799 | { | |
800 | int reg = (inst >> 4) & 0xf; | |
801 | regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32); | |
802 | tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32, | |
803 | 4, byte_order); | |
25ea693b MM |
804 | if (record_full_arch_list_add_reg (regcache, reg) |
805 | || record_full_arch_list_add_mem (tmpu32 - 4, 4)) | |
451fa05e AG |
806 | return -1; |
807 | } | |
808 | break; | |
809 | case 0x07: /* pop */ | |
810 | { | |
811 | int a = (inst >> 4) & 0xf; | |
812 | int b = inst & 0xf; | |
25ea693b MM |
813 | if (record_full_arch_list_add_reg (regcache, a) |
814 | || record_full_arch_list_add_reg (regcache, b)) | |
451fa05e AG |
815 | return -1; |
816 | } | |
817 | break; | |
818 | case 0x08: /* lda.l */ | |
819 | { | |
820 | int reg = (inst >> 4) & 0xf; | |
25ea693b | 821 | if (record_full_arch_list_add_reg (regcache, reg)) |
451fa05e AG |
822 | return -1; |
823 | } | |
824 | break; | |
825 | case 0x09: /* sta.l */ | |
826 | { | |
827 | tmpu32 = (uint32_t) moxie_process_readu (addr+2, buf, | |
828 | 4, byte_order); | |
25ea693b | 829 | if (record_full_arch_list_add_mem (tmpu32, 4)) |
451fa05e AG |
830 | return -1; |
831 | } | |
832 | break; | |
833 | case 0x0a: /* ld.l (register indirect) */ | |
834 | { | |
835 | int reg = (inst >> 4) & 0xf; | |
25ea693b | 836 | if (record_full_arch_list_add_reg (regcache, reg)) |
451fa05e AG |
837 | return -1; |
838 | } | |
839 | break; | |
840 | case 0x0b: /* st.l */ | |
841 | { | |
842 | int reg = (inst >> 4) & 0xf; | |
843 | regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32); | |
844 | tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32, | |
845 | 4, byte_order); | |
25ea693b | 846 | if (record_full_arch_list_add_mem (tmpu32, 4)) |
451fa05e AG |
847 | return -1; |
848 | } | |
849 | break; | |
850 | case 0x0c: /* ldo.l */ | |
851 | { | |
852 | int reg = (inst >> 4) & 0xf; | |
25ea693b | 853 | if (record_full_arch_list_add_reg (regcache, reg)) |
451fa05e AG |
854 | return -1; |
855 | } | |
856 | break; | |
857 | case 0x0d: /* sto.l */ | |
858 | { | |
859 | int reg = (inst >> 4) & 0xf; | |
860 | uint32_t offset = (uint32_t) moxie_process_readu (addr+2, buf, 4, | |
861 | byte_order); | |
862 | regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32); | |
863 | tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32, | |
864 | 4, byte_order); | |
865 | tmpu32 += offset; | |
25ea693b | 866 | if (record_full_arch_list_add_mem (tmpu32, 4)) |
451fa05e AG |
867 | return -1; |
868 | } | |
869 | break; | |
870 | case 0x0e: /* cmp */ | |
871 | { | |
25ea693b | 872 | if (record_full_arch_list_add_reg (regcache, MOXIE_CC_REGNUM)) |
451fa05e AG |
873 | return -1; |
874 | } | |
875 | break; | |
876 | case 0x0f: | |
877 | case 0x10: | |
878 | case 0x11: | |
879 | case 0x12: | |
880 | case 0x13: | |
881 | case 0x14: | |
882 | case 0x15: | |
883 | case 0x16: | |
884 | case 0x17: | |
885 | case 0x18: | |
886 | { | |
887 | /* Do nothing. */ | |
888 | break; | |
889 | } | |
890 | case 0x19: /* jsr */ | |
891 | { | |
892 | regcache_raw_read (regcache, | |
893 | MOXIE_SP_REGNUM, (gdb_byte *) & tmpu32); | |
894 | tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32, | |
895 | 4, byte_order); | |
25ea693b MM |
896 | if (record_full_arch_list_add_reg (regcache, MOXIE_FP_REGNUM) |
897 | || (record_full_arch_list_add_reg (regcache, | |
898 | MOXIE_SP_REGNUM)) | |
899 | || record_full_arch_list_add_mem (tmpu32 - 12, 12)) | |
451fa05e AG |
900 | return -1; |
901 | } | |
902 | break; | |
903 | case 0x1a: /* jmpa */ | |
904 | { | |
905 | /* Do nothing. */ | |
906 | } | |
907 | break; | |
908 | case 0x1b: /* ldi.b (immediate) */ | |
909 | case 0x1c: /* ld.b (register indirect) */ | |
910 | case 0x1d: /* lda.b */ | |
911 | { | |
912 | int reg = (inst >> 4) & 0xf; | |
25ea693b | 913 | if (record_full_arch_list_add_reg (regcache, reg)) |
451fa05e AG |
914 | return -1; |
915 | } | |
916 | break; | |
917 | case 0x1e: /* st.b */ | |
918 | { | |
919 | int reg = (inst >> 4) & 0xf; | |
920 | regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32); | |
921 | tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32, | |
922 | 4, byte_order); | |
25ea693b | 923 | if (record_full_arch_list_add_mem (tmpu32, 1)) |
451fa05e AG |
924 | return -1; |
925 | } | |
926 | break; | |
927 | case 0x1f: /* sta.b */ | |
928 | { | |
948f8e3d | 929 | tmpu32 = moxie_process_readu (addr+2, buf, 4, byte_order); |
25ea693b | 930 | if (record_full_arch_list_add_mem (tmpu32, 1)) |
451fa05e AG |
931 | return -1; |
932 | } | |
933 | break; | |
934 | case 0x20: /* ldi.s (immediate) */ | |
935 | case 0x21: /* ld.s (register indirect) */ | |
936 | case 0x22: /* lda.s */ | |
937 | { | |
938 | int reg = (inst >> 4) & 0xf; | |
25ea693b | 939 | if (record_full_arch_list_add_reg (regcache, reg)) |
451fa05e AG |
940 | return -1; |
941 | } | |
942 | break; | |
943 | case 0x23: /* st.s */ | |
944 | { | |
945 | int reg = (inst >> 4) & 0xf; | |
946 | regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32); | |
947 | tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32, | |
948 | 4, byte_order); | |
25ea693b | 949 | if (record_full_arch_list_add_mem (tmpu32, 2)) |
451fa05e AG |
950 | return -1; |
951 | } | |
952 | break; | |
953 | case 0x24: /* sta.s */ | |
954 | { | |
948f8e3d | 955 | tmpu32 = moxie_process_readu (addr+2, buf, 4, byte_order); |
25ea693b | 956 | if (record_full_arch_list_add_mem (tmpu32, 2)) |
451fa05e AG |
957 | return -1; |
958 | } | |
959 | break; | |
960 | case 0x25: /* jmp */ | |
961 | { | |
962 | /* Do nothing. */ | |
963 | } | |
964 | break; | |
965 | case 0x26: /* and */ | |
966 | case 0x27: /* lshr */ | |
967 | case 0x28: /* ashl */ | |
968 | case 0x29: /* sub.l */ | |
969 | case 0x2a: /* neg */ | |
970 | case 0x2b: /* or */ | |
971 | case 0x2c: /* not */ | |
972 | case 0x2d: /* ashr */ | |
973 | case 0x2e: /* xor */ | |
974 | case 0x2f: /* mul.l */ | |
975 | { | |
976 | int reg = (inst >> 4) & 0xf; | |
25ea693b | 977 | if (record_full_arch_list_add_reg (regcache, reg)) |
451fa05e AG |
978 | return -1; |
979 | } | |
980 | break; | |
981 | case 0x30: /* swi */ | |
982 | { | |
983 | /* We currently implement support for libgloss' | |
984 | system calls. */ | |
985 | ||
948f8e3d | 986 | int inum = moxie_process_readu (addr+2, buf, 4, byte_order); |
451fa05e AG |
987 | |
988 | switch (inum) | |
989 | { | |
990 | case 0x1: /* SYS_exit */ | |
991 | { | |
992 | /* Do nothing. */ | |
993 | } | |
994 | break; | |
995 | case 0x2: /* SYS_open */ | |
996 | { | |
25ea693b | 997 | if (record_full_arch_list_add_reg (regcache, RET1_REGNUM)) |
451fa05e AG |
998 | return -1; |
999 | } | |
1000 | break; | |
1001 | case 0x4: /* SYS_read */ | |
1002 | { | |
1003 | uint32_t length, ptr; | |
1004 | ||
1005 | /* Read buffer pointer is in $r1. */ | |
1006 | regcache_raw_read (regcache, 3, (gdb_byte *) & ptr); | |
1007 | ptr = extract_unsigned_integer ((gdb_byte *) & ptr, | |
1008 | 4, byte_order); | |
1009 | ||
025bb325 | 1010 | /* String length is at 0x12($fp). */ |
451fa05e AG |
1011 | regcache_raw_read (regcache, |
1012 | MOXIE_FP_REGNUM, (gdb_byte *) & tmpu32); | |
1013 | tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32, | |
1014 | 4, byte_order); | |
948f8e3d | 1015 | length = moxie_process_readu (tmpu32+20, buf, 4, byte_order); |
451fa05e | 1016 | |
25ea693b | 1017 | if (record_full_arch_list_add_mem (ptr, length)) |
451fa05e AG |
1018 | return -1; |
1019 | } | |
1020 | break; | |
1021 | case 0x5: /* SYS_write */ | |
1022 | { | |
25ea693b | 1023 | if (record_full_arch_list_add_reg (regcache, RET1_REGNUM)) |
451fa05e AG |
1024 | return -1; |
1025 | } | |
1026 | break; | |
1027 | default: | |
1028 | break; | |
1029 | } | |
1030 | } | |
1031 | break; | |
1032 | case 0x31: /* div.l */ | |
1033 | case 0x32: /* udiv.l */ | |
1034 | case 0x33: /* mod.l */ | |
1035 | case 0x34: /* umod.l */ | |
1036 | { | |
1037 | int reg = (inst >> 4) & 0xf; | |
25ea693b | 1038 | if (record_full_arch_list_add_reg (regcache, reg)) |
451fa05e AG |
1039 | return -1; |
1040 | } | |
1041 | break; | |
1042 | case 0x35: /* brk */ | |
1043 | /* Do nothing. */ | |
1044 | break; | |
1045 | case 0x36: /* ldo.b */ | |
1046 | { | |
1047 | int reg = (inst >> 4) & 0xf; | |
25ea693b | 1048 | if (record_full_arch_list_add_reg (regcache, reg)) |
451fa05e AG |
1049 | return -1; |
1050 | } | |
1051 | break; | |
1052 | case 0x37: /* sto.b */ | |
1053 | { | |
1054 | int reg = (inst >> 4) & 0xf; | |
1055 | uint32_t offset = (uint32_t) moxie_process_readu (addr+2, buf, 4, | |
1056 | byte_order); | |
1057 | regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32); | |
1058 | tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32, | |
1059 | 4, byte_order); | |
1060 | tmpu32 += offset; | |
25ea693b | 1061 | if (record_full_arch_list_add_mem (tmpu32, 1)) |
451fa05e AG |
1062 | return -1; |
1063 | } | |
1064 | break; | |
1065 | case 0x38: /* ldo.s */ | |
1066 | { | |
1067 | int reg = (inst >> 4) & 0xf; | |
25ea693b | 1068 | if (record_full_arch_list_add_reg (regcache, reg)) |
451fa05e AG |
1069 | return -1; |
1070 | } | |
1071 | break; | |
1072 | case 0x39: /* sto.s */ | |
1073 | { | |
1074 | int reg = (inst >> 4) & 0xf; | |
1075 | uint32_t offset = (uint32_t) moxie_process_readu (addr+2, buf, 4, | |
1076 | byte_order); | |
1077 | regcache_raw_read (regcache, reg, (gdb_byte *) & tmpu32); | |
1078 | tmpu32 = extract_unsigned_integer ((gdb_byte *) & tmpu32, | |
1079 | 4, byte_order); | |
1080 | tmpu32 += offset; | |
25ea693b | 1081 | if (record_full_arch_list_add_mem (tmpu32, 2)) |
451fa05e AG |
1082 | return -1; |
1083 | } | |
1084 | break; | |
1085 | default: | |
1086 | /* Do nothing. */ | |
1087 | break; | |
1088 | } | |
1089 | } | |
1090 | ||
25ea693b | 1091 | if (record_full_arch_list_add_reg (regcache, MOXIE_PC_REGNUM)) |
451fa05e | 1092 | return -1; |
25ea693b | 1093 | if (record_full_arch_list_add_end ()) |
451fa05e AG |
1094 | return -1; |
1095 | return 0; | |
1096 | } | |
1097 | ||
d7066cce AG |
1098 | /* Allocate and initialize the moxie gdbarch object. */ |
1099 | ||
1100 | static struct gdbarch * | |
1101 | moxie_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1102 | { | |
1103 | struct gdbarch *gdbarch; | |
1104 | struct gdbarch_tdep *tdep; | |
1105 | ||
1106 | /* If there is already a candidate, use it. */ | |
1107 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
1108 | if (arches != NULL) | |
1109 | return arches->gdbarch; | |
1110 | ||
1111 | /* Allocate space for the new architecture. */ | |
70ba0933 | 1112 | tdep = XNEW (struct gdbarch_tdep); |
d7066cce AG |
1113 | gdbarch = gdbarch_alloc (&info, tdep); |
1114 | ||
1115 | set_gdbarch_read_pc (gdbarch, moxie_read_pc); | |
1116 | set_gdbarch_write_pc (gdbarch, moxie_write_pc); | |
1117 | set_gdbarch_unwind_sp (gdbarch, moxie_unwind_sp); | |
1118 | ||
1119 | set_gdbarch_num_regs (gdbarch, MOXIE_NUM_REGS); | |
1120 | set_gdbarch_sp_regnum (gdbarch, MOXIE_SP_REGNUM); | |
451fa05e | 1121 | set_gdbarch_pc_regnum (gdbarch, MOXIE_PC_REGNUM); |
d7066cce AG |
1122 | set_gdbarch_register_name (gdbarch, moxie_register_name); |
1123 | set_gdbarch_register_type (gdbarch, moxie_register_type); | |
1124 | ||
1125 | set_gdbarch_return_value (gdbarch, moxie_return_value); | |
1126 | ||
1127 | set_gdbarch_skip_prologue (gdbarch, moxie_skip_prologue); | |
1128 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1129 | set_gdbarch_breakpoint_from_pc (gdbarch, moxie_breakpoint_from_pc); | |
1130 | set_gdbarch_frame_align (gdbarch, moxie_frame_align); | |
1131 | ||
1132 | frame_base_set_default (gdbarch, &moxie_frame_base); | |
1133 | ||
1134 | /* Methods for saving / extracting a dummy frame's ID. The ID's | |
1135 | stack address must match the SP value returned by | |
1136 | PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */ | |
1137 | set_gdbarch_dummy_id (gdbarch, moxie_dummy_id); | |
1138 | ||
1139 | set_gdbarch_unwind_pc (gdbarch, moxie_unwind_pc); | |
1140 | ||
1141 | set_gdbarch_print_insn (gdbarch, print_insn_moxie); | |
1142 | ||
1143 | /* Hook in ABI-specific overrides, if they have been registered. */ | |
1144 | gdbarch_init_osabi (info, gdbarch); | |
1145 | ||
1146 | /* Hook in the default unwinders. */ | |
1147 | frame_unwind_append_unwinder (gdbarch, &moxie_frame_unwind); | |
1148 | ||
6ed1ff02 AG |
1149 | /* Single stepping. */ |
1150 | set_gdbarch_software_single_step (gdbarch, moxie_software_single_step); | |
1151 | ||
d7066cce AG |
1152 | /* Support simple overlay manager. */ |
1153 | set_gdbarch_overlay_update (gdbarch, simple_overlay_update); | |
1154 | ||
451fa05e AG |
1155 | /* Support reverse debugging. */ |
1156 | set_gdbarch_process_record (gdbarch, moxie_process_record); | |
1157 | ||
d7066cce AG |
1158 | return gdbarch; |
1159 | } | |
1160 | ||
1161 | /* Register this machine's init routine. */ | |
1162 | ||
1163 | void | |
1164 | _initialize_moxie_tdep (void) | |
1165 | { | |
1166 | register_gdbarch_init (bfd_arch_moxie, moxie_gdbarch_init); | |
1167 | } |