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d031aafb | 1 | /* Target-dependent code for Morpho mt processor, for GDB. |
61def6bd | 2 | |
197e01b6 | 3 | Copyright (C) 2005 Free Software Foundation, Inc. |
61def6bd KB |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
197e01b6 EZ |
19 | Foundation, Inc., 51 Franklin Street, Fifth Floor, |
20 | Boston, MA 02110-1301, USA. */ | |
61def6bd KB |
21 | |
22 | /* Contributed by Michael Snyder, msnyder@redhat.com. */ | |
23 | ||
24 | #include "defs.h" | |
25 | #include "frame.h" | |
26 | #include "frame-unwind.h" | |
27 | #include "frame-base.h" | |
28 | #include "symtab.h" | |
29 | #include "dis-asm.h" | |
30 | #include "arch-utils.h" | |
31 | #include "gdbtypes.h" | |
32 | #include "gdb_string.h" | |
33 | #include "regcache.h" | |
34 | #include "reggroups.h" | |
35 | #include "gdbcore.h" | |
36 | #include "trad-frame.h" | |
37 | #include "inferior.h" | |
38 | #include "dwarf2-frame.h" | |
39 | #include "infcall.h" | |
40 | #include "gdb_assert.h" | |
41 | ||
d031aafb | 42 | enum mt_arch_constants |
61def6bd | 43 | { |
d031aafb | 44 | MT_MAX_STRUCT_SIZE = 16 |
61def6bd KB |
45 | }; |
46 | ||
d031aafb | 47 | enum mt_gdb_regnums |
61def6bd | 48 | { |
d031aafb NS |
49 | MT_R0_REGNUM, /* 32 bit regs. */ |
50 | MT_R1_REGNUM, | |
51 | MT_1ST_ARGREG = MT_R1_REGNUM, | |
52 | MT_R2_REGNUM, | |
53 | MT_R3_REGNUM, | |
54 | MT_R4_REGNUM, | |
55 | MT_LAST_ARGREG = MT_R4_REGNUM, | |
56 | MT_R5_REGNUM, | |
57 | MT_R6_REGNUM, | |
58 | MT_R7_REGNUM, | |
59 | MT_R8_REGNUM, | |
60 | MT_R9_REGNUM, | |
61 | MT_R10_REGNUM, | |
62 | MT_R11_REGNUM, | |
63 | MT_R12_REGNUM, | |
64 | MT_FP_REGNUM = MT_R12_REGNUM, | |
65 | MT_R13_REGNUM, | |
66 | MT_SP_REGNUM = MT_R13_REGNUM, | |
67 | MT_R14_REGNUM, | |
68 | MT_RA_REGNUM = MT_R14_REGNUM, | |
69 | MT_R15_REGNUM, | |
70 | MT_IRA_REGNUM = MT_R15_REGNUM, | |
71 | MT_PC_REGNUM, | |
61def6bd KB |
72 | |
73 | /* Interrupt Enable pseudo-register, exported by SID. */ | |
d031aafb | 74 | MT_INT_ENABLE_REGNUM, |
61def6bd KB |
75 | /* End of CPU regs. */ |
76 | ||
d031aafb | 77 | MT_NUM_CPU_REGS, |
61def6bd KB |
78 | |
79 | /* Co-processor registers. */ | |
d031aafb NS |
80 | MT_COPRO_REGNUM = MT_NUM_CPU_REGS, /* 16 bit regs. */ |
81 | MT_CPR0_REGNUM, | |
82 | MT_CPR1_REGNUM, | |
83 | MT_CPR2_REGNUM, | |
84 | MT_CPR3_REGNUM, | |
85 | MT_CPR4_REGNUM, | |
86 | MT_CPR5_REGNUM, | |
87 | MT_CPR6_REGNUM, | |
88 | MT_CPR7_REGNUM, | |
89 | MT_CPR8_REGNUM, | |
90 | MT_CPR9_REGNUM, | |
91 | MT_CPR10_REGNUM, | |
92 | MT_CPR11_REGNUM, | |
93 | MT_CPR12_REGNUM, | |
94 | MT_CPR13_REGNUM, | |
95 | MT_CPR14_REGNUM, | |
96 | MT_CPR15_REGNUM, | |
97 | MT_BYPA_REGNUM, /* 32 bit regs. */ | |
98 | MT_BYPB_REGNUM, | |
99 | MT_BYPC_REGNUM, | |
100 | MT_FLAG_REGNUM, | |
101 | MT_CONTEXT_REGNUM, /* 38 bits (treat as array of | |
61def6bd | 102 | six bytes). */ |
d031aafb NS |
103 | MT_MAC_REGNUM, /* 32 bits. */ |
104 | MT_Z1_REGNUM, /* 16 bits. */ | |
105 | MT_Z2_REGNUM, /* 16 bits. */ | |
106 | MT_ICHANNEL_REGNUM, /* 32 bits. */ | |
107 | MT_ISCRAMB_REGNUM, /* 32 bits. */ | |
108 | MT_QSCRAMB_REGNUM, /* 32 bits. */ | |
109 | MT_OUT_REGNUM, /* 16 bits. */ | |
110 | MT_EXMAC_REGNUM, /* 32 bits (8 used). */ | |
111 | MT_QCHANNEL_REGNUM, /* 32 bits. */ | |
61def6bd KB |
112 | |
113 | /* Number of real registers. */ | |
d031aafb | 114 | MT_NUM_REGS, |
61def6bd KB |
115 | |
116 | /* Pseudo-registers. */ | |
d031aafb NS |
117 | MT_COPRO_PSEUDOREG_REGNUM = MT_NUM_REGS, |
118 | MT_MAC_PSEUDOREG_REGNUM, | |
61def6bd KB |
119 | |
120 | /* Two pseudo-regs ('coprocessor' and 'mac'). */ | |
d031aafb | 121 | MT_NUM_PSEUDO_REGS = 2 |
61def6bd KB |
122 | }; |
123 | ||
124 | /* Return name of register number specified by REGNUM. */ | |
125 | ||
126 | static const char * | |
d031aafb | 127 | mt_register_name (int regnum) |
61def6bd | 128 | { |
58b78171 | 129 | static const char *const register_names[] = { |
61def6bd KB |
130 | /* CPU regs. */ |
131 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
132 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
133 | "pc", "IE", | |
134 | /* Co-processor regs. */ | |
135 | "", /* copro register. */ | |
136 | "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", | |
137 | "cr8", "cr9", "cr10", "cr11", "cr12", "cr13", "cr14", "cr15", | |
138 | "bypa", "bypb", "bypc", "flag", "context", "" /* mac. */ , "z1", "z2", | |
139 | "Ichannel", "Iscramb", "Qscramb", "out", "" /* ex-mac. */ , "Qchannel", | |
140 | /* Pseudo-registers. */ | |
141 | "coprocessor", "MAC" | |
142 | }; | |
143 | ||
144 | gdb_assert (regnum >= 0 && regnum < ARRAY_SIZE (register_names)); | |
145 | return register_names[regnum]; | |
146 | } | |
147 | ||
148 | /* Given ARCH and a register number specified by REGNUM, return the | |
149 | type of that register. */ | |
150 | ||
151 | static struct type * | |
d031aafb | 152 | mt_register_type (struct gdbarch *arch, int regnum) |
61def6bd KB |
153 | { |
154 | static struct type *void_func_ptr = NULL; | |
155 | static struct type *void_ptr = NULL; | |
156 | static struct type *copro_type; | |
157 | ||
d031aafb | 158 | if (regnum >= 0 && regnum < MT_NUM_REGS + MT_NUM_PSEUDO_REGS) |
61def6bd KB |
159 | { |
160 | if (void_func_ptr == NULL) | |
161 | { | |
162 | struct type *temp; | |
163 | ||
164 | void_ptr = lookup_pointer_type (builtin_type_void); | |
165 | void_func_ptr = | |
166 | lookup_pointer_type (lookup_function_type (builtin_type_void)); | |
167 | temp = create_range_type (NULL, builtin_type_unsigned_int, 0, 1); | |
168 | copro_type = create_array_type (NULL, builtin_type_int16, temp); | |
169 | } | |
170 | switch (regnum) | |
171 | { | |
d031aafb NS |
172 | case MT_PC_REGNUM: |
173 | case MT_RA_REGNUM: | |
174 | case MT_IRA_REGNUM: | |
61def6bd | 175 | return void_func_ptr; |
d031aafb NS |
176 | case MT_SP_REGNUM: |
177 | case MT_FP_REGNUM: | |
61def6bd | 178 | return void_ptr; |
d031aafb NS |
179 | case MT_INT_ENABLE_REGNUM: |
180 | case MT_ICHANNEL_REGNUM: | |
181 | case MT_QCHANNEL_REGNUM: | |
182 | case MT_ISCRAMB_REGNUM: | |
183 | case MT_QSCRAMB_REGNUM: | |
61def6bd | 184 | return builtin_type_int32; |
d031aafb NS |
185 | case MT_EXMAC_REGNUM: |
186 | case MT_MAC_REGNUM: | |
61def6bd | 187 | return builtin_type_uint32; |
d031aafb NS |
188 | case MT_BYPA_REGNUM: |
189 | case MT_BYPB_REGNUM: | |
190 | case MT_BYPC_REGNUM: | |
191 | case MT_Z1_REGNUM: | |
192 | case MT_Z2_REGNUM: | |
193 | case MT_OUT_REGNUM: | |
61def6bd | 194 | return builtin_type_int16; |
d031aafb | 195 | case MT_CONTEXT_REGNUM: |
61def6bd | 196 | return builtin_type_long_long; |
d031aafb NS |
197 | case MT_COPRO_REGNUM: |
198 | case MT_COPRO_PSEUDOREG_REGNUM: | |
61def6bd | 199 | return copro_type; |
d031aafb | 200 | case MT_MAC_PSEUDOREG_REGNUM: |
3950dc3f NS |
201 | if (gdbarch_bfd_arch_info (arch)->mach == bfd_mach_mrisc2 |
202 | || gdbarch_bfd_arch_info (arch)->mach == bfd_mach_ms2) | |
61def6bd KB |
203 | return builtin_type_uint64; |
204 | else | |
205 | return builtin_type_uint32; | |
d031aafb | 206 | case MT_FLAG_REGNUM: |
61def6bd KB |
207 | return builtin_type_unsigned_char; |
208 | default: | |
d031aafb | 209 | if (regnum >= MT_R0_REGNUM && regnum <= MT_R15_REGNUM) |
61def6bd | 210 | return builtin_type_int32; |
d031aafb | 211 | else if (regnum >= MT_CPR0_REGNUM && regnum <= MT_CPR15_REGNUM) |
61def6bd KB |
212 | return builtin_type_int16; |
213 | } | |
214 | } | |
215 | internal_error (__FILE__, __LINE__, | |
d031aafb | 216 | _("mt_register_type: illegal register number %d"), regnum); |
61def6bd KB |
217 | } |
218 | ||
219 | /* Return true if register REGNUM is a member of the register group | |
220 | specified by GROUP. */ | |
221 | ||
222 | static int | |
d031aafb | 223 | mt_register_reggroup_p (struct gdbarch *gdbarch, int regnum, |
61def6bd KB |
224 | struct reggroup *group) |
225 | { | |
226 | /* Groups of registers that can be displayed via "info reg". */ | |
227 | if (group == all_reggroup) | |
228 | return (regnum >= 0 | |
d031aafb NS |
229 | && regnum < MT_NUM_REGS + MT_NUM_PSEUDO_REGS |
230 | && mt_register_name (regnum)[0] != '\0'); | |
61def6bd KB |
231 | |
232 | if (group == general_reggroup) | |
d031aafb | 233 | return (regnum >= MT_R0_REGNUM && regnum <= MT_R15_REGNUM); |
61def6bd KB |
234 | |
235 | if (group == float_reggroup) | |
236 | return 0; /* No float regs. */ | |
237 | ||
238 | if (group == vector_reggroup) | |
239 | return 0; /* No vector regs. */ | |
240 | ||
241 | /* For any that are not handled above. */ | |
242 | return default_register_reggroup_p (gdbarch, regnum, group); | |
243 | } | |
244 | ||
245 | /* Return the return value convention used for a given type TYPE. | |
246 | Optionally, fetch or set the return value via READBUF or | |
247 | WRITEBUF respectively using REGCACHE for the register | |
248 | values. */ | |
249 | ||
250 | static enum return_value_convention | |
d031aafb | 251 | mt_return_value (struct gdbarch *gdbarch, struct type *type, |
61def6bd KB |
252 | struct regcache *regcache, gdb_byte *readbuf, |
253 | const gdb_byte *writebuf) | |
254 | { | |
255 | if (TYPE_LENGTH (type) > 4) | |
256 | { | |
257 | /* Return values > 4 bytes are returned in memory, | |
258 | pointed to by R11. */ | |
259 | if (readbuf) | |
260 | { | |
261 | ULONGEST addr; | |
262 | ||
d031aafb | 263 | regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &addr); |
61def6bd KB |
264 | read_memory (addr, readbuf, TYPE_LENGTH (type)); |
265 | } | |
266 | ||
267 | if (writebuf) | |
268 | { | |
269 | ULONGEST addr; | |
270 | ||
d031aafb | 271 | regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &addr); |
61def6bd KB |
272 | write_memory (addr, writebuf, TYPE_LENGTH (type)); |
273 | } | |
274 | ||
275 | return RETURN_VALUE_ABI_RETURNS_ADDRESS; | |
276 | } | |
277 | else | |
278 | { | |
279 | if (readbuf) | |
280 | { | |
281 | ULONGEST temp; | |
282 | ||
283 | /* Return values of <= 4 bytes are returned in R11. */ | |
d031aafb | 284 | regcache_cooked_read_unsigned (regcache, MT_R11_REGNUM, &temp); |
61def6bd KB |
285 | store_unsigned_integer (readbuf, TYPE_LENGTH (type), temp); |
286 | } | |
287 | ||
288 | if (writebuf) | |
289 | { | |
290 | if (TYPE_LENGTH (type) < 4) | |
291 | { | |
292 | gdb_byte buf[4]; | |
293 | /* Add leading zeros to the value. */ | |
294 | memset (buf, 0, sizeof (buf)); | |
295 | memcpy (buf + sizeof (buf) - TYPE_LENGTH (type), | |
296 | writebuf, TYPE_LENGTH (type)); | |
d031aafb | 297 | regcache_cooked_write (regcache, MT_R11_REGNUM, buf); |
61def6bd KB |
298 | } |
299 | else /* (TYPE_LENGTH (type) == 4 */ | |
d031aafb | 300 | regcache_cooked_write (regcache, MT_R11_REGNUM, writebuf); |
61def6bd KB |
301 | } |
302 | ||
303 | return RETURN_VALUE_REGISTER_CONVENTION; | |
304 | } | |
305 | } | |
306 | ||
307 | /* If the input address, PC, is in a function prologue, return the | |
308 | address of the end of the prologue, otherwise return the input | |
309 | address. | |
310 | ||
311 | Note: PC is likely to be the function start, since this function | |
312 | is mainly used for advancing a breakpoint to the first line, or | |
313 | stepping to the first line when we have stepped into a function | |
314 | call. */ | |
315 | ||
316 | static CORE_ADDR | |
d031aafb | 317 | mt_skip_prologue (CORE_ADDR pc) |
61def6bd KB |
318 | { |
319 | CORE_ADDR func_addr = 0, func_end = 0; | |
320 | char *func_name; | |
321 | unsigned long instr; | |
322 | ||
323 | if (find_pc_partial_function (pc, &func_name, &func_addr, &func_end)) | |
324 | { | |
325 | struct symtab_and_line sal; | |
326 | struct symbol *sym; | |
327 | ||
328 | /* Found a function. */ | |
329 | sym = lookup_symbol (func_name, NULL, VAR_DOMAIN, NULL, NULL); | |
330 | if (sym && SYMBOL_LANGUAGE (sym) != language_asm) | |
331 | { | |
332 | /* Don't use this trick for assembly source files. */ | |
333 | sal = find_pc_line (func_addr, 0); | |
334 | ||
335 | if (sal.end && sal.end < func_end) | |
336 | { | |
337 | /* Found a line number, use it as end of prologue. */ | |
338 | return sal.end; | |
339 | } | |
340 | } | |
341 | } | |
342 | ||
343 | /* No function symbol, or no line symbol. Use prologue scanning method. */ | |
344 | for (;; pc += 4) | |
345 | { | |
346 | instr = read_memory_unsigned_integer (pc, 4); | |
347 | if (instr == 0x12000000) /* nop */ | |
348 | continue; | |
349 | if (instr == 0x12ddc000) /* copy sp into fp */ | |
350 | continue; | |
351 | instr >>= 16; | |
352 | if (instr == 0x05dd) /* subi sp, sp, imm */ | |
353 | continue; | |
354 | if (instr >= 0x43c0 && instr <= 0x43df) /* push */ | |
355 | continue; | |
356 | /* Not an obvious prologue instruction. */ | |
357 | break; | |
358 | } | |
359 | ||
360 | return pc; | |
361 | } | |
362 | ||
363 | /* The breakpoint instruction must be the same size as the smallest | |
364 | instruction in the instruction set. | |
365 | ||
3950dc3f NS |
366 | The BP for ms1 is defined as 0x68000000 (BREAK). |
367 | The BP for ms2 is defined as 0x69000000 (illegal) */ | |
61def6bd KB |
368 | |
369 | static const gdb_byte * | |
d031aafb | 370 | mt_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size) |
61def6bd | 371 | { |
3950dc3f NS |
372 | static gdb_byte ms1_breakpoint[] = { 0x68, 0, 0, 0 }; |
373 | static gdb_byte ms2_breakpoint[] = { 0x69, 0, 0, 0 }; | |
61def6bd KB |
374 | |
375 | *bp_size = 4; | |
3950dc3f NS |
376 | if (gdbarch_bfd_arch_info (current_gdbarch)->mach == bfd_mach_ms2) |
377 | return ms2_breakpoint; | |
378 | ||
379 | return ms1_breakpoint; | |
61def6bd KB |
380 | } |
381 | ||
382 | /* Fetch the pseudo registers: | |
383 | ||
384 | There are two pseudo-registers: | |
385 | 1) The 'coprocessor' pseudo-register (which mirrors the | |
386 | "real" coprocessor register sent by the target), and | |
387 | 2) The 'MAC' pseudo-register (which represents the union | |
388 | of the original 32 bit target MAC register and the new | |
389 | 8-bit extended-MAC register). */ | |
390 | ||
391 | static void | |
d031aafb | 392 | mt_pseudo_register_read (struct gdbarch *gdbarch, |
61def6bd KB |
393 | struct regcache *regcache, int regno, gdb_byte *buf) |
394 | { | |
395 | switch (regno) | |
396 | { | |
d031aafb NS |
397 | case MT_COPRO_REGNUM: |
398 | case MT_COPRO_PSEUDOREG_REGNUM: | |
399 | regcache_raw_read (regcache, MT_COPRO_REGNUM, buf); | |
61def6bd | 400 | break; |
d031aafb NS |
401 | case MT_MAC_REGNUM: |
402 | case MT_MAC_PSEUDOREG_REGNUM: | |
3950dc3f NS |
403 | if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2 |
404 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2) | |
61def6bd KB |
405 | { |
406 | ULONGEST oldmac = 0, ext_mac = 0; | |
407 | ULONGEST newmac; | |
408 | ||
d031aafb NS |
409 | regcache_cooked_read_unsigned (regcache, MT_MAC_REGNUM, &oldmac); |
410 | regcache_cooked_read_unsigned (regcache, MT_EXMAC_REGNUM, &ext_mac); | |
61def6bd KB |
411 | newmac = |
412 | (oldmac & 0xffffffff) | ((long long) (ext_mac & 0xff) << 32); | |
413 | store_signed_integer (buf, 8, newmac); | |
414 | } | |
415 | else | |
d031aafb | 416 | regcache_raw_read (regcache, MT_MAC_REGNUM, buf); |
61def6bd KB |
417 | break; |
418 | default: | |
419 | internal_error (__FILE__, __LINE__, | |
d031aafb | 420 | _("mt_pseudo_register_read: bad reg # (%d)"), regno); |
61def6bd KB |
421 | break; |
422 | } | |
423 | } | |
424 | ||
425 | /* Write the pseudo registers: | |
426 | ||
d031aafb | 427 | Mt pseudo-registers are stored directly to the target. The |
61def6bd KB |
428 | 'coprocessor' register is special, because when it is modified, all |
429 | the other coprocessor regs must be flushed from the reg cache. */ | |
430 | ||
431 | static void | |
d031aafb | 432 | mt_pseudo_register_write (struct gdbarch *gdbarch, |
61def6bd KB |
433 | struct regcache *regcache, |
434 | int regno, const gdb_byte *buf) | |
435 | { | |
436 | int i; | |
437 | ||
438 | switch (regno) | |
439 | { | |
d031aafb NS |
440 | case MT_COPRO_REGNUM: |
441 | case MT_COPRO_PSEUDOREG_REGNUM: | |
442 | regcache_raw_write (regcache, MT_COPRO_REGNUM, buf); | |
443 | for (i = MT_NUM_CPU_REGS; i < MT_NUM_REGS; i++) | |
61def6bd KB |
444 | set_register_cached (i, 0); |
445 | break; | |
d031aafb NS |
446 | case MT_MAC_REGNUM: |
447 | case MT_MAC_PSEUDOREG_REGNUM: | |
3950dc3f NS |
448 | if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2 |
449 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2) | |
61def6bd KB |
450 | { |
451 | /* The 8-byte MAC pseudo-register must be broken down into two | |
452 | 32-byte registers. */ | |
453 | unsigned int oldmac, ext_mac; | |
454 | ULONGEST newmac; | |
455 | ||
456 | newmac = extract_unsigned_integer (buf, 8); | |
457 | oldmac = newmac & 0xffffffff; | |
458 | ext_mac = (newmac >> 32) & 0xff; | |
d031aafb NS |
459 | regcache_cooked_write_unsigned (regcache, MT_MAC_REGNUM, oldmac); |
460 | regcache_cooked_write_unsigned (regcache, MT_EXMAC_REGNUM, ext_mac); | |
61def6bd KB |
461 | } |
462 | else | |
d031aafb | 463 | regcache_raw_write (regcache, MT_MAC_REGNUM, buf); |
61def6bd KB |
464 | break; |
465 | default: | |
466 | internal_error (__FILE__, __LINE__, | |
d031aafb | 467 | _("mt_pseudo_register_write: bad reg # (%d)"), regno); |
61def6bd KB |
468 | break; |
469 | } | |
470 | } | |
471 | ||
472 | static CORE_ADDR | |
d031aafb | 473 | mt_frame_align (struct gdbarch *gdbarch, CORE_ADDR sp) |
61def6bd KB |
474 | { |
475 | /* Register size is 4 bytes. */ | |
476 | return align_down (sp, 4); | |
477 | } | |
478 | ||
479 | /* Implements the "info registers" command. When ``all'' is non-zero, | |
480 | the coprocessor registers will be printed in addition to the rest | |
481 | of the registers. */ | |
482 | ||
483 | static void | |
d031aafb | 484 | mt_registers_info (struct gdbarch *gdbarch, |
61def6bd KB |
485 | struct ui_file *file, |
486 | struct frame_info *frame, int regnum, int all) | |
487 | { | |
488 | if (regnum == -1) | |
489 | { | |
490 | int lim; | |
491 | ||
d031aafb | 492 | lim = all ? MT_NUM_REGS : MT_NUM_CPU_REGS; |
61def6bd KB |
493 | |
494 | for (regnum = 0; regnum < lim; regnum++) | |
495 | { | |
496 | /* Don't display the Qchannel register since it will be displayed | |
497 | along with Ichannel. (See below.) */ | |
d031aafb | 498 | if (regnum == MT_QCHANNEL_REGNUM) |
61def6bd KB |
499 | continue; |
500 | ||
d031aafb | 501 | mt_registers_info (gdbarch, file, frame, regnum, all); |
61def6bd KB |
502 | |
503 | /* Display the Qchannel register immediately after Ichannel. */ | |
d031aafb NS |
504 | if (regnum == MT_ICHANNEL_REGNUM) |
505 | mt_registers_info (gdbarch, file, frame, MT_QCHANNEL_REGNUM, all); | |
61def6bd KB |
506 | } |
507 | } | |
508 | else | |
509 | { | |
d031aafb | 510 | if (regnum == MT_EXMAC_REGNUM) |
61def6bd | 511 | return; |
d031aafb | 512 | else if (regnum == MT_CONTEXT_REGNUM) |
61def6bd KB |
513 | { |
514 | /* Special output handling for 38-bit context register. */ | |
515 | unsigned char *buff; | |
516 | unsigned int *bytes, i, regsize; | |
517 | ||
518 | regsize = register_size (gdbarch, regnum); | |
519 | ||
520 | buff = alloca (regsize); | |
521 | bytes = alloca (regsize * sizeof (*bytes)); | |
522 | ||
523 | frame_register_read (frame, regnum, buff); | |
524 | ||
525 | fputs_filtered (REGISTER_NAME (regnum), file); | |
526 | print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), file); | |
527 | fputs_filtered ("0x", file); | |
528 | ||
529 | for (i = 0; i < regsize; i++) | |
530 | fprintf_filtered (file, "%02x", (unsigned int) | |
531 | extract_unsigned_integer (buff + i, 1)); | |
532 | fputs_filtered ("\t", file); | |
533 | print_longest (file, 'd', 0, | |
534 | extract_unsigned_integer (buff, regsize)); | |
535 | fputs_filtered ("\n", file); | |
536 | } | |
d031aafb NS |
537 | else if (regnum == MT_COPRO_REGNUM |
538 | || regnum == MT_COPRO_PSEUDOREG_REGNUM) | |
61def6bd KB |
539 | { |
540 | /* Special output handling for the 'coprocessor' register. */ | |
58b78171 | 541 | gdb_byte *buf; |
61def6bd | 542 | |
d031aafb NS |
543 | buf = alloca (register_size (gdbarch, MT_COPRO_REGNUM)); |
544 | frame_register_read (frame, MT_COPRO_REGNUM, buf); | |
61def6bd | 545 | /* And print. */ |
d031aafb | 546 | regnum = MT_COPRO_PSEUDOREG_REGNUM; |
61def6bd KB |
547 | fputs_filtered (REGISTER_NAME (regnum), file); |
548 | print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), file); | |
549 | val_print (register_type (gdbarch, regnum), buf, | |
550 | 0, 0, file, 0, 1, 0, Val_no_prettyprint); | |
551 | fputs_filtered ("\n", file); | |
552 | } | |
d031aafb | 553 | else if (regnum == MT_MAC_REGNUM || regnum == MT_MAC_PSEUDOREG_REGNUM) |
61def6bd KB |
554 | { |
555 | ULONGEST oldmac, ext_mac, newmac; | |
58b78171 | 556 | gdb_byte buf[3 * sizeof (LONGEST)]; |
61def6bd KB |
557 | |
558 | /* Get the two "real" mac registers. */ | |
d031aafb | 559 | frame_register_read (frame, MT_MAC_REGNUM, buf); |
3950dc3f | 560 | oldmac = extract_unsigned_integer |
d031aafb | 561 | (buf, register_size (gdbarch, MT_MAC_REGNUM)); |
58b78171 NS |
562 | if (gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_mrisc2 |
563 | || gdbarch_bfd_arch_info (gdbarch)->mach == bfd_mach_ms2) | |
61def6bd | 564 | { |
d031aafb | 565 | frame_register_read (frame, MT_EXMAC_REGNUM, buf); |
3950dc3f | 566 | ext_mac = extract_unsigned_integer |
d031aafb | 567 | (buf, register_size (gdbarch, MT_EXMAC_REGNUM)); |
61def6bd KB |
568 | } |
569 | else | |
570 | ext_mac = 0; | |
571 | ||
572 | /* Add them together. */ | |
573 | newmac = (oldmac & 0xffffffff) + ((ext_mac & 0xff) << 32); | |
574 | ||
575 | /* And print. */ | |
d031aafb | 576 | regnum = MT_MAC_PSEUDOREG_REGNUM; |
61def6bd KB |
577 | fputs_filtered (REGISTER_NAME (regnum), file); |
578 | print_spaces_filtered (15 - strlen (REGISTER_NAME (regnum)), file); | |
579 | fputs_filtered ("0x", file); | |
580 | print_longest (file, 'x', 0, newmac); | |
581 | fputs_filtered ("\t", file); | |
582 | print_longest (file, 'u', 0, newmac); | |
583 | fputs_filtered ("\n", file); | |
584 | } | |
585 | else | |
586 | default_print_registers_info (gdbarch, file, frame, regnum, all); | |
587 | } | |
588 | } | |
589 | ||
590 | /* Set up the callee's arguments for an inferior function call. The | |
591 | arguments are pushed on the stack or are placed in registers as | |
592 | appropriate. It also sets up the return address (which points to | |
593 | the call dummy breakpoint). | |
594 | ||
595 | Returns the updated (and aligned) stack pointer. */ | |
596 | ||
597 | static CORE_ADDR | |
d031aafb | 598 | mt_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
61def6bd KB |
599 | struct regcache *regcache, CORE_ADDR bp_addr, |
600 | int nargs, struct value **args, CORE_ADDR sp, | |
601 | int struct_return, CORE_ADDR struct_addr) | |
602 | { | |
603 | #define wordsize 4 | |
d031aafb NS |
604 | gdb_byte buf[MT_MAX_STRUCT_SIZE]; |
605 | int argreg = MT_1ST_ARGREG; | |
61def6bd KB |
606 | int split_param_len = 0; |
607 | int stack_dest = sp; | |
608 | int slacklen; | |
609 | int typelen; | |
610 | int i, j; | |
611 | ||
d031aafb NS |
612 | /* First handle however many args we can fit into MT_1ST_ARGREG thru |
613 | MT_LAST_ARGREG. */ | |
614 | for (i = 0; i < nargs && argreg <= MT_LAST_ARGREG; i++) | |
61def6bd | 615 | { |
58b78171 | 616 | const gdb_byte *val; |
61def6bd KB |
617 | typelen = TYPE_LENGTH (value_type (args[i])); |
618 | switch (typelen) | |
619 | { | |
620 | case 1: | |
621 | case 2: | |
622 | case 3: | |
623 | case 4: | |
624 | regcache_cooked_write_unsigned (regcache, argreg++, | |
625 | extract_unsigned_integer | |
626 | (value_contents (args[i]), | |
627 | wordsize)); | |
628 | break; | |
629 | case 8: | |
630 | case 12: | |
631 | case 16: | |
632 | val = value_contents (args[i]); | |
633 | while (typelen > 0) | |
634 | { | |
d031aafb | 635 | if (argreg <= MT_LAST_ARGREG) |
61def6bd KB |
636 | { |
637 | /* This word of the argument is passed in a register. */ | |
638 | regcache_cooked_write_unsigned (regcache, argreg++, | |
639 | extract_unsigned_integer | |
640 | (val, wordsize)); | |
641 | typelen -= wordsize; | |
642 | val += wordsize; | |
643 | } | |
644 | else | |
645 | { | |
646 | /* Remainder of this arg must be passed on the stack | |
647 | (deferred to do later). */ | |
648 | split_param_len = typelen; | |
649 | memcpy (buf, val, typelen); | |
650 | break; /* No more args can be handled in regs. */ | |
651 | } | |
652 | } | |
653 | break; | |
654 | default: | |
655 | /* By reverse engineering of gcc output, args bigger than | |
656 | 16 bytes go on the stack, and their address is passed | |
657 | in the argreg. */ | |
658 | stack_dest -= typelen; | |
659 | write_memory (stack_dest, value_contents (args[i]), typelen); | |
660 | regcache_cooked_write_unsigned (regcache, argreg++, stack_dest); | |
661 | break; | |
662 | } | |
663 | } | |
664 | ||
665 | /* Next, the rest of the arguments go onto the stack, in reverse order. */ | |
666 | for (j = nargs - 1; j >= i; j--) | |
667 | { | |
58b78171 NS |
668 | gdb_byte *val; |
669 | ||
61def6bd KB |
670 | /* Right-justify the value in an aligned-length buffer. */ |
671 | typelen = TYPE_LENGTH (value_type (args[j])); | |
672 | slacklen = (wordsize - (typelen % wordsize)) % wordsize; | |
673 | val = alloca (typelen + slacklen); | |
674 | memcpy (val, value_contents (args[j]), typelen); | |
675 | memset (val + typelen, 0, slacklen); | |
676 | /* Now write this data to the stack. */ | |
677 | stack_dest -= typelen + slacklen; | |
678 | write_memory (stack_dest, val, typelen + slacklen); | |
679 | } | |
680 | ||
681 | /* Finally, if a param needs to be split between registers and stack, | |
682 | write the second half to the stack now. */ | |
683 | if (split_param_len != 0) | |
684 | { | |
685 | stack_dest -= split_param_len; | |
686 | write_memory (stack_dest, buf, split_param_len); | |
687 | } | |
688 | ||
689 | /* Set up return address (provided to us as bp_addr). */ | |
d031aafb | 690 | regcache_cooked_write_unsigned (regcache, MT_RA_REGNUM, bp_addr); |
61def6bd KB |
691 | |
692 | /* Store struct return address, if given. */ | |
693 | if (struct_return && struct_addr != 0) | |
d031aafb | 694 | regcache_cooked_write_unsigned (regcache, MT_R11_REGNUM, struct_addr); |
61def6bd KB |
695 | |
696 | /* Set aside 16 bytes for the callee to save regs 1-4. */ | |
697 | stack_dest -= 16; | |
698 | ||
699 | /* Update the stack pointer. */ | |
d031aafb | 700 | regcache_cooked_write_unsigned (regcache, MT_SP_REGNUM, stack_dest); |
61def6bd KB |
701 | |
702 | /* And that should do it. Return the new stack pointer. */ | |
703 | return stack_dest; | |
704 | } | |
705 | ||
706 | ||
707 | /* The 'unwind_cache' data structure. */ | |
708 | ||
d031aafb | 709 | struct mt_unwind_cache |
61def6bd KB |
710 | { |
711 | /* The previous frame's inner most stack address. | |
712 | Used as this frame ID's stack_addr. */ | |
713 | CORE_ADDR prev_sp; | |
714 | CORE_ADDR frame_base; | |
715 | int framesize; | |
716 | int frameless_p; | |
717 | ||
718 | /* Table indicating the location of each and every register. */ | |
719 | struct trad_frame_saved_reg *saved_regs; | |
720 | }; | |
721 | ||
722 | /* Initialize an unwind_cache. Build up the saved_regs table etc. for | |
723 | the frame. */ | |
724 | ||
d031aafb NS |
725 | static struct mt_unwind_cache * |
726 | mt_frame_unwind_cache (struct frame_info *next_frame, | |
61def6bd KB |
727 | void **this_prologue_cache) |
728 | { | |
729 | struct gdbarch *gdbarch; | |
d031aafb | 730 | struct mt_unwind_cache *info; |
61def6bd KB |
731 | CORE_ADDR next_addr, start_addr, end_addr, prologue_end_addr; |
732 | unsigned long instr, upper_half, delayed_store = 0; | |
733 | int regnum, offset; | |
734 | ULONGEST sp, fp; | |
735 | ||
736 | if ((*this_prologue_cache)) | |
737 | return (*this_prologue_cache); | |
738 | ||
739 | gdbarch = get_frame_arch (next_frame); | |
d031aafb | 740 | info = FRAME_OBSTACK_ZALLOC (struct mt_unwind_cache); |
61def6bd KB |
741 | (*this_prologue_cache) = info; |
742 | ||
743 | info->prev_sp = 0; | |
744 | info->framesize = 0; | |
745 | info->frame_base = 0; | |
746 | info->frameless_p = 1; | |
747 | info->saved_regs = trad_frame_alloc_saved_regs (next_frame); | |
748 | ||
749 | /* Grab the frame-relative values of SP and FP, needed below. | |
750 | The frame_saved_register function will find them on the | |
751 | stack or in the registers as appropriate. */ | |
d031aafb NS |
752 | frame_unwind_unsigned_register (next_frame, MT_SP_REGNUM, &sp); |
753 | frame_unwind_unsigned_register (next_frame, MT_FP_REGNUM, &fp); | |
61def6bd KB |
754 | |
755 | start_addr = frame_func_unwind (next_frame); | |
756 | ||
757 | /* Return early if GDB couldn't find the function. */ | |
758 | if (start_addr == 0) | |
759 | return info; | |
760 | ||
761 | end_addr = frame_pc_unwind (next_frame); | |
762 | prologue_end_addr = skip_prologue_using_sal (start_addr); | |
763 | if (end_addr == 0) | |
764 | for (next_addr = start_addr; next_addr < end_addr; next_addr += 4) | |
765 | { | |
766 | instr = get_frame_memory_unsigned (next_frame, next_addr, 4); | |
767 | if (delayed_store) /* previous instr was a push */ | |
768 | { | |
769 | upper_half = delayed_store >> 16; | |
770 | regnum = upper_half & 0xf; | |
771 | offset = delayed_store & 0xffff; | |
772 | switch (upper_half & 0xfff0) | |
773 | { | |
774 | case 0x43c0: /* push using frame pointer */ | |
775 | info->saved_regs[regnum].addr = offset; | |
776 | break; | |
777 | case 0x43d0: /* push using stack pointer */ | |
778 | info->saved_regs[regnum].addr = offset; | |
779 | break; | |
780 | default: /* lint */ | |
781 | break; | |
782 | } | |
783 | delayed_store = 0; | |
784 | } | |
785 | ||
786 | switch (instr) | |
787 | { | |
788 | case 0x12000000: /* NO-OP */ | |
789 | continue; | |
790 | case 0x12ddc000: /* copy sp into fp */ | |
791 | info->frameless_p = 0; /* Record that the frame pointer is in use. */ | |
792 | continue; | |
793 | default: | |
794 | upper_half = instr >> 16; | |
795 | if (upper_half == 0x05dd || /* subi sp, sp, imm */ | |
796 | upper_half == 0x07dd) /* subui sp, sp, imm */ | |
797 | { | |
798 | /* Record the frame size. */ | |
799 | info->framesize = instr & 0xffff; | |
800 | continue; | |
801 | } | |
802 | if ((upper_half & 0xfff0) == 0x43c0 || /* frame push */ | |
803 | (upper_half & 0xfff0) == 0x43d0) /* stack push */ | |
804 | { | |
805 | /* Save this instruction, but don't record the | |
806 | pushed register as 'saved' until we see the | |
807 | next instruction. That's because of deferred stores | |
808 | on this target -- GDB won't be able to read the register | |
809 | from the stack until one instruction later. */ | |
810 | delayed_store = instr; | |
811 | continue; | |
812 | } | |
813 | /* Not a prologue instruction. Is this the end of the prologue? | |
814 | This is the most difficult decision; when to stop scanning. | |
815 | ||
816 | If we have no line symbol, then the best thing we can do | |
817 | is to stop scanning when we encounter an instruction that | |
818 | is not likely to be a part of the prologue. | |
819 | ||
820 | But if we do have a line symbol, then we should | |
821 | keep scanning until we reach it (or we reach end_addr). */ | |
822 | ||
823 | if (prologue_end_addr && (prologue_end_addr > (next_addr + 4))) | |
824 | continue; /* Keep scanning, recording saved_regs etc. */ | |
825 | else | |
826 | break; /* Quit scanning: breakpoint can be set here. */ | |
827 | } | |
828 | } | |
829 | ||
830 | /* Special handling for the "saved" address of the SP: | |
831 | The SP is of course never saved on the stack at all, so | |
832 | by convention what we put here is simply the previous | |
833 | _value_ of the SP (as opposed to an address where the | |
834 | previous value would have been pushed). This will also | |
835 | give us the frame base address. */ | |
836 | ||
837 | if (info->frameless_p) | |
838 | { | |
839 | info->frame_base = sp + info->framesize; | |
840 | info->prev_sp = sp + info->framesize; | |
841 | } | |
842 | else | |
843 | { | |
844 | info->frame_base = fp + info->framesize; | |
845 | info->prev_sp = fp + info->framesize; | |
846 | } | |
847 | /* Save prev_sp in saved_regs as a value, not as an address. */ | |
d031aafb | 848 | trad_frame_set_value (info->saved_regs, MT_SP_REGNUM, info->prev_sp); |
61def6bd KB |
849 | |
850 | /* Now convert frame offsets to actual addresses (not offsets). */ | |
d031aafb | 851 | for (regnum = 0; regnum < MT_NUM_REGS; regnum++) |
61def6bd KB |
852 | if (trad_frame_addr_p (info->saved_regs, regnum)) |
853 | info->saved_regs[regnum].addr += info->frame_base - info->framesize; | |
854 | ||
855 | /* The call instruction moves the caller's PC in the callee's RA reg. | |
856 | Since this is an unwind, do the reverse. Copy the location of RA | |
857 | into PC (the address / regnum) so that a request for PC will be | |
858 | converted into a request for the RA. */ | |
d031aafb | 859 | info->saved_regs[MT_PC_REGNUM] = info->saved_regs[MT_RA_REGNUM]; |
61def6bd KB |
860 | |
861 | return info; | |
862 | } | |
863 | ||
864 | static CORE_ADDR | |
d031aafb | 865 | mt_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) |
61def6bd KB |
866 | { |
867 | ULONGEST pc; | |
868 | ||
d031aafb | 869 | frame_unwind_unsigned_register (next_frame, MT_PC_REGNUM, &pc); |
61def6bd KB |
870 | return pc; |
871 | } | |
872 | ||
873 | static CORE_ADDR | |
d031aafb | 874 | mt_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) |
61def6bd KB |
875 | { |
876 | ULONGEST sp; | |
877 | ||
d031aafb | 878 | frame_unwind_unsigned_register (next_frame, MT_SP_REGNUM, &sp); |
61def6bd KB |
879 | return sp; |
880 | } | |
881 | ||
882 | /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that | |
883 | dummy frame. The frame ID's base needs to match the TOS value | |
884 | saved by save_dummy_frame_tos(), and the PC match the dummy frame's | |
885 | breakpoint. */ | |
886 | ||
887 | static struct frame_id | |
d031aafb | 888 | mt_unwind_dummy_id (struct gdbarch *gdbarch, struct frame_info *next_frame) |
61def6bd | 889 | { |
d031aafb | 890 | return frame_id_build (mt_unwind_sp (gdbarch, next_frame), |
61def6bd KB |
891 | frame_pc_unwind (next_frame)); |
892 | } | |
893 | ||
894 | /* Given a GDB frame, determine the address of the calling function's | |
895 | frame. This will be used to create a new GDB frame struct. */ | |
896 | ||
897 | static void | |
d031aafb | 898 | mt_frame_this_id (struct frame_info *next_frame, |
61def6bd KB |
899 | void **this_prologue_cache, struct frame_id *this_id) |
900 | { | |
d031aafb NS |
901 | struct mt_unwind_cache *info = |
902 | mt_frame_unwind_cache (next_frame, this_prologue_cache); | |
61def6bd KB |
903 | |
904 | if (!(info == NULL || info->prev_sp == 0)) | |
905 | { | |
906 | (*this_id) = frame_id_build (info->prev_sp, | |
907 | frame_func_unwind (next_frame)); | |
908 | } | |
909 | return; | |
910 | } | |
911 | ||
912 | static void | |
d031aafb | 913 | mt_frame_prev_register (struct frame_info *next_frame, |
61def6bd KB |
914 | void **this_prologue_cache, |
915 | int regnum, int *optimizedp, | |
916 | enum lval_type *lvalp, CORE_ADDR *addrp, | |
917 | int *realnump, gdb_byte *bufferp) | |
918 | { | |
d031aafb NS |
919 | struct mt_unwind_cache *info = |
920 | mt_frame_unwind_cache (next_frame, this_prologue_cache); | |
61def6bd KB |
921 | |
922 | trad_frame_get_prev_register (next_frame, info->saved_regs, regnum, | |
923 | optimizedp, lvalp, addrp, realnump, bufferp); | |
924 | } | |
925 | ||
926 | static CORE_ADDR | |
d031aafb | 927 | mt_frame_base_address (struct frame_info *next_frame, |
61def6bd KB |
928 | void **this_prologue_cache) |
929 | { | |
d031aafb NS |
930 | struct mt_unwind_cache *info = |
931 | mt_frame_unwind_cache (next_frame, this_prologue_cache); | |
61def6bd KB |
932 | |
933 | return info->frame_base; | |
934 | } | |
935 | ||
936 | /* This is a shared interface: the 'frame_unwind' object is what's | |
937 | returned by the 'sniffer' function, and in turn specifies how to | |
938 | get a frame's ID and prev_regs. | |
939 | ||
940 | This exports the 'prev_register' and 'this_id' methods. */ | |
941 | ||
d031aafb | 942 | static const struct frame_unwind mt_frame_unwind = { |
61def6bd | 943 | NORMAL_FRAME, |
d031aafb NS |
944 | mt_frame_this_id, |
945 | mt_frame_prev_register | |
61def6bd KB |
946 | }; |
947 | ||
948 | /* The sniffer is a registered function that identifies our family of | |
949 | frame unwind functions (this_id and prev_register). */ | |
950 | ||
951 | static const struct frame_unwind * | |
d031aafb | 952 | mt_frame_sniffer (struct frame_info *next_frame) |
61def6bd | 953 | { |
d031aafb | 954 | return &mt_frame_unwind; |
61def6bd KB |
955 | } |
956 | ||
957 | /* Another shared interface: the 'frame_base' object specifies how to | |
958 | unwind a frame and secure the base addresses for frame objects | |
959 | (locals, args). */ | |
960 | ||
d031aafb NS |
961 | static struct frame_base mt_frame_base = { |
962 | &mt_frame_unwind, | |
963 | mt_frame_base_address, | |
964 | mt_frame_base_address, | |
965 | mt_frame_base_address | |
61def6bd KB |
966 | }; |
967 | ||
968 | static struct gdbarch * | |
d031aafb | 969 | mt_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
61def6bd KB |
970 | { |
971 | struct gdbarch *gdbarch; | |
61def6bd KB |
972 | |
973 | /* Find a candidate among the list of pre-declared architectures. */ | |
974 | arches = gdbarch_list_lookup_by_info (arches, &info); | |
975 | if (arches != NULL) | |
976 | return arches->gdbarch; | |
977 | ||
978 | /* None found, create a new architecture from the information | |
979 | provided. */ | |
980 | gdbarch = gdbarch_alloc (&info, NULL); | |
981 | ||
982 | switch (info.byte_order) | |
983 | { | |
984 | case BFD_ENDIAN_BIG: | |
985 | set_gdbarch_float_format (gdbarch, &floatformat_ieee_single_big); | |
986 | set_gdbarch_double_format (gdbarch, &floatformat_ieee_double_big); | |
987 | set_gdbarch_long_double_format (gdbarch, &floatformat_ieee_double_big); | |
988 | break; | |
989 | case BFD_ENDIAN_LITTLE: | |
990 | set_gdbarch_float_format (gdbarch, &floatformat_ieee_single_little); | |
991 | set_gdbarch_double_format (gdbarch, &floatformat_ieee_double_little); | |
992 | set_gdbarch_long_double_format (gdbarch, | |
993 | &floatformat_ieee_double_little); | |
994 | break; | |
995 | default: | |
996 | internal_error (__FILE__, __LINE__, | |
d031aafb | 997 | _("mt_gdbarch_init: bad byte order for float format")); |
61def6bd KB |
998 | } |
999 | ||
d031aafb NS |
1000 | set_gdbarch_register_name (gdbarch, mt_register_name); |
1001 | set_gdbarch_num_regs (gdbarch, MT_NUM_REGS); | |
1002 | set_gdbarch_num_pseudo_regs (gdbarch, MT_NUM_PSEUDO_REGS); | |
1003 | set_gdbarch_pc_regnum (gdbarch, MT_PC_REGNUM); | |
1004 | set_gdbarch_sp_regnum (gdbarch, MT_SP_REGNUM); | |
1005 | set_gdbarch_pseudo_register_read (gdbarch, mt_pseudo_register_read); | |
1006 | set_gdbarch_pseudo_register_write (gdbarch, mt_pseudo_register_write); | |
1007 | set_gdbarch_skip_prologue (gdbarch, mt_skip_prologue); | |
61def6bd | 1008 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); |
d031aafb | 1009 | set_gdbarch_breakpoint_from_pc (gdbarch, mt_breakpoint_from_pc); |
61def6bd KB |
1010 | set_gdbarch_decr_pc_after_break (gdbarch, 0); |
1011 | set_gdbarch_frame_args_skip (gdbarch, 0); | |
d031aafb NS |
1012 | set_gdbarch_print_insn (gdbarch, print_insn_mt); |
1013 | set_gdbarch_register_type (gdbarch, mt_register_type); | |
1014 | set_gdbarch_register_reggroup_p (gdbarch, mt_register_reggroup_p); | |
61def6bd | 1015 | |
d031aafb NS |
1016 | set_gdbarch_return_value (gdbarch, mt_return_value); |
1017 | set_gdbarch_sp_regnum (gdbarch, MT_SP_REGNUM); | |
61def6bd | 1018 | |
d031aafb | 1019 | set_gdbarch_frame_align (gdbarch, mt_frame_align); |
61def6bd | 1020 | |
d031aafb | 1021 | set_gdbarch_print_registers_info (gdbarch, mt_registers_info); |
61def6bd | 1022 | |
d031aafb | 1023 | set_gdbarch_push_dummy_call (gdbarch, mt_push_dummy_call); |
61def6bd KB |
1024 | |
1025 | /* Target builtin data types. */ | |
1026 | set_gdbarch_short_bit (gdbarch, 16); | |
1027 | set_gdbarch_int_bit (gdbarch, 32); | |
1028 | set_gdbarch_long_bit (gdbarch, 32); | |
1029 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1030 | set_gdbarch_float_bit (gdbarch, 32); | |
1031 | set_gdbarch_double_bit (gdbarch, 64); | |
1032 | set_gdbarch_long_double_bit (gdbarch, 64); | |
1033 | set_gdbarch_ptr_bit (gdbarch, 32); | |
1034 | ||
1035 | /* Register the DWARF 2 sniffer first, and then the traditional prologue | |
1036 | based sniffer. */ | |
1037 | frame_unwind_append_sniffer (gdbarch, dwarf2_frame_sniffer); | |
d031aafb NS |
1038 | frame_unwind_append_sniffer (gdbarch, mt_frame_sniffer); |
1039 | frame_base_set_default (gdbarch, &mt_frame_base); | |
61def6bd KB |
1040 | |
1041 | /* Register the 'unwind_pc' method. */ | |
d031aafb NS |
1042 | set_gdbarch_unwind_pc (gdbarch, mt_unwind_pc); |
1043 | set_gdbarch_unwind_sp (gdbarch, mt_unwind_sp); | |
61def6bd KB |
1044 | |
1045 | /* Methods for saving / extracting a dummy frame's ID. | |
1046 | The ID's stack address must match the SP value returned by | |
1047 | PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */ | |
d031aafb | 1048 | set_gdbarch_unwind_dummy_id (gdbarch, mt_unwind_dummy_id); |
61def6bd KB |
1049 | |
1050 | return gdbarch; | |
1051 | } | |
1052 | ||
1053 | void | |
d031aafb | 1054 | _initialize_mt_tdep (void) |
61def6bd | 1055 | { |
d031aafb | 1056 | register_gdbarch_init (bfd_arch_mt, mt_gdbarch_init); |
61def6bd | 1057 | } |