Support 68HC12 arch in Gdb
[deliverable/binutils-gdb.git] / gdb / ns32km3-nat.c
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1/* Low level interface to ns532 running mach 3.0.
2 Copyright (C) 1992 Free Software Foundation, Inc.
3
c5aa993b 4 This file is part of GDB.
c906108c 5
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6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
c906108c 10
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11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
c906108c 15
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16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
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20
21#include "defs.h"
22#include "inferior.h"
23
24#include <stdio.h>
25
26#include <mach.h>
27#include <mach/message.h>
28#include <mach/exception.h>
29#include <mach_error.h>
30
31#define private static
c906108c 32\f
c5aa993b 33
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34/* Find offsets to thread states at compile time.
35 * If your compiler does not grok this, calculate offsets
36 * offsets yourself and use them (or get a compatible compiler :-)
37 */
38
39#define REG_N_OFFSET(reg) (int)(&((struct ns532_combined_state *)0)->ts.reg)
40#define REG_F_OFFSET(reg) (int)(&((struct ns532_combined_state *)0)->fs.reg)
41
42/* at reg_offset[i] is the offset to the ns532_combined_state
43 * location where the gdb registers[i] is stored.
44 */
45
c5aa993b 46static int reg_offset[] =
c906108c 47{
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48 REG_N_OFFSET (r0), REG_N_OFFSET (r1), REG_N_OFFSET (r2), REG_N_OFFSET (r3),
49 REG_N_OFFSET (r4), REG_N_OFFSET (r5), REG_N_OFFSET (r6), REG_N_OFFSET (r7),
50 REG_F_OFFSET (l0a), REG_F_OFFSET (l0b), REG_F_OFFSET (l2a), REG_F_OFFSET (l2b),
51 REG_F_OFFSET (l4a), REG_F_OFFSET (l4b), REG_F_OFFSET (l6a), REG_F_OFFSET (l6b),
52REG_N_OFFSET (sp), REG_N_OFFSET (fp), REG_N_OFFSET (pc), REG_N_OFFSET (psr),
53 REG_F_OFFSET (fsr),
54 REG_F_OFFSET (l0a), REG_F_OFFSET (l1a), REG_F_OFFSET (l2a), REG_F_OFFSET (l3a),
55 REG_F_OFFSET (l4a), REG_F_OFFSET (l5a), REG_F_OFFSET (l6a), REG_F_OFFSET (l7a),
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56};
57
58#define REG_ADDRESS(state,regnum) ((char *)(state)+reg_offset[regnum])
59
60/* Fetch COUNT contiguous registers from thread STATE starting from REGNUM
61 * Caller knows that the regs handled in one transaction are of same size.
62 */
63#define FETCH_REGS(state, regnum, count) \
64 memcpy (&registers[REGISTER_BYTE (regnum)], \
65 (char *)state+reg_offset[ regnum ], \
66 count*REGISTER_SIZE)
67
68/* Store COUNT contiguous registers to thread STATE starting from REGNUM */
69#define STORE_REGS(state, regnum, count) \
70 memcpy ((char *)state+reg_offset[ regnum ], \
71 &registers[REGISTER_BYTE (regnum)], \
72 count*REGISTER_SIZE)
73\f
74/*
75 * Fetch inferiors registers for gdb.
76 * REGNO specifies which (as gdb views it) register, -1 for all.
77 */
78
79void
fba45db2 80fetch_inferior_registers (int regno)
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81{
82 kern_return_t ret;
83 thread_state_data_t state;
84 unsigned int stateCnt = NS532_COMBINED_STATE_COUNT;
85 int index;
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86
87 if (!MACH_PORT_VALID (current_thread))
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88 error ("fetch inferior registers: Invalid thread");
89
90 if (must_suspend_thread)
91 setup_thread (current_thread, 1);
92
93 ret = thread_get_state (current_thread,
94 NS532_COMBINED_STATE,
95 state,
96 &stateCnt);
97
98 if (ret != KERN_SUCCESS)
99 warning ("fetch_inferior_registers: %s ",
100 mach_error_string (ret));
101#if 0
102 /* It may be more effective to store validate all of them,
103 * since we fetched them all anyway
104 */
105 else if (regno != -1)
c5aa993b 106 supply_register (regno, (char *) state + reg_offset[regno]);
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107#endif
108 else
109 {
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110 for (index = 0; index < NUM_REGS; index++)
111 supply_register (index, (char *) state + reg_offset[index]);
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112 }
113
114 if (must_suspend_thread)
115 setup_thread (current_thread, 0);
116}
117\f
118/* Store our register values back into the inferior.
119 * If REGNO is -1, do this for all registers.
120 * Otherwise, REGNO specifies which register
121 *
122 * On mach3 all registers are always saved in one call.
123 */
124void
fba45db2 125store_inferior_registers (int regno)
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126{
127 kern_return_t ret;
128 thread_state_data_t state;
129 unsigned int stateCnt = NS532_COMBINED_STATE_COUNT;
130 register int index;
131
c5aa993b 132 if (!MACH_PORT_VALID (current_thread))
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133 error ("store inferior registers: Invalid thread");
134
135 if (must_suspend_thread)
136 setup_thread (current_thread, 1);
137
138 /* Fetch the state of the current thread */
139 ret = thread_get_state (current_thread,
140 NS532_COMBINED_STATE,
141 state,
142 &stateCnt);
143
c5aa993b 144 if (ret != KERN_SUCCESS)
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145 {
146 warning ("store_inferior_registers (get): %s",
147 mach_error_string (ret));
148 if (must_suspend_thread)
149 setup_thread (current_thread, 0);
150 return;
151 }
152
153 /* move gdb's registers to thread's state
c5aa993b 154
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155 * Since we save all registers anyway, save the ones
156 * that gdb thinks are valid (e.g. ignore the regno
157 * parameter)
158 */
159#if 0
160 if (regno != -1)
161 STORE_REGS (state, regno, 1);
162 else
163#endif
164 {
c5aa993b 165 for (index = 0; index < NUM_REGS; index++)
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166 STORE_REGS (state, index, 1);
167 }
c5aa993b 168
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169 /* Write gdb's current view of register to the thread
170 */
171 ret = thread_set_state (current_thread,
172 NS532_COMBINED_STATE,
173 state,
174 NS532_COMBINED_STATE_COUNT);
c5aa993b 175
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176 if (ret != KERN_SUCCESS)
177 warning ("store_inferior_registers (set): %s",
178 mach_error_string (ret));
179
180 if (must_suspend_thread)
181 setup_thread (current_thread, 0);
182}
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