Commit | Line | Data |
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9abe5450 | 1 | /* PPC GNU/Linux native support. |
2555fe1a AC |
2 | |
3 | Copyright 1988, 1989, 1991, 1992, 1994, 1996, 2000, 2001, 2002, | |
4 | 2003 Free Software Foundation, Inc. | |
c877c8e6 KB |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
05f13b9c EZ |
20 | Foundation, Inc., 59 Temple Place - Suite 330, |
21 | Boston, MA 02111-1307, USA. */ | |
c877c8e6 KB |
22 | |
23 | #include "defs.h" | |
e162d11b | 24 | #include "gdb_string.h" |
c877c8e6 KB |
25 | #include "frame.h" |
26 | #include "inferior.h" | |
27 | #include "gdbcore.h" | |
4e052eda | 28 | #include "regcache.h" |
c877c8e6 KB |
29 | |
30 | #include <sys/types.h> | |
31 | #include <sys/param.h> | |
32 | #include <signal.h> | |
33 | #include <sys/user.h> | |
34 | #include <sys/ioctl.h> | |
2555fe1a | 35 | #include "gdb_wait.h" |
c877c8e6 KB |
36 | #include <fcntl.h> |
37 | #include <sys/procfs.h> | |
45229ea4 | 38 | #include <sys/ptrace.h> |
c877c8e6 | 39 | |
c60c0f5f MS |
40 | /* Prototypes for supply_gregset etc. */ |
41 | #include "gregset.h" | |
16333c4f | 42 | #include "ppc-tdep.h" |
c60c0f5f | 43 | |
45229ea4 EZ |
44 | #ifndef PT_READ_U |
45 | #define PT_READ_U PTRACE_PEEKUSR | |
46 | #endif | |
47 | #ifndef PT_WRITE_U | |
48 | #define PT_WRITE_U PTRACE_POKEUSR | |
49 | #endif | |
50 | ||
51 | /* Default the type of the ptrace transfer to int. */ | |
52 | #ifndef PTRACE_XFER_TYPE | |
53 | #define PTRACE_XFER_TYPE int | |
54 | #endif | |
55 | ||
9abe5450 EZ |
56 | /* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a |
57 | configure time check. Some older glibc's (for instance 2.2.1) | |
58 | don't have a specific powerpc version of ptrace.h, and fall back on | |
59 | a generic one. In such cases, sys/ptrace.h defines | |
60 | PTRACE_GETFPXREGS and PTRACE_SETFPXREGS to the same numbers that | |
61 | ppc kernel's asm/ptrace.h defines PTRACE_GETVRREGS and | |
62 | PTRACE_SETVRREGS to be. This also makes a configury check pretty | |
63 | much useless. */ | |
64 | ||
65 | /* These definitions should really come from the glibc header files, | |
66 | but Glibc doesn't know about the vrregs yet. */ | |
67 | #ifndef PTRACE_GETVRREGS | |
68 | #define PTRACE_GETVRREGS 18 | |
69 | #define PTRACE_SETVRREGS 19 | |
70 | #endif | |
71 | ||
72 | /* This oddity is because the Linux kernel defines elf_vrregset_t as | |
73 | an array of 33 16 bytes long elements. I.e. it leaves out vrsave. | |
74 | However the PTRACE_GETVRREGS and PTRACE_SETVRREGS requests return | |
75 | the vrsave as an extra 4 bytes at the end. I opted for creating a | |
76 | flat array of chars, so that it is easier to manipulate for gdb. | |
77 | ||
78 | There are 32 vector registers 16 bytes longs, plus a VSCR register | |
79 | which is only 4 bytes long, but is fetched as a 16 bytes | |
80 | quantity. Up to here we have the elf_vrregset_t structure. | |
81 | Appended to this there is space for the VRSAVE register: 4 bytes. | |
82 | Even though this vrsave register is not included in the regset | |
83 | typedef, it is handled by the ptrace requests. | |
84 | ||
85 | Note that GNU/Linux doesn't support little endian PPC hardware, | |
86 | therefore the offset at which the real value of the VSCR register | |
87 | is located will be always 12 bytes. | |
88 | ||
89 | The layout is like this (where x is the actual value of the vscr reg): */ | |
90 | ||
91 | /* *INDENT-OFF* */ | |
92 | /* | |
93 | |.|.|.|.|.....|.|.|.|.||.|.|.|x||.| | |
94 | <-------> <-------><-------><-> | |
95 | VR0 VR31 VSCR VRSAVE | |
96 | */ | |
97 | /* *INDENT-ON* */ | |
98 | ||
99 | #define SIZEOF_VRREGS 33*16+4 | |
100 | ||
101 | typedef char gdb_vrregset_t[SIZEOF_VRREGS]; | |
102 | ||
103 | /* For runtime check of ptrace support for VRREGS. */ | |
104 | int have_ptrace_getvrregs = 1; | |
105 | ||
c877c8e6 | 106 | int |
fba45db2 | 107 | kernel_u_size (void) |
c877c8e6 KB |
108 | { |
109 | return (sizeof (struct user)); | |
110 | } | |
111 | ||
16333c4f EZ |
112 | /* *INDENT-OFF* */ |
113 | /* registers layout, as presented by the ptrace interface: | |
114 | PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7, | |
115 | PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15, | |
116 | PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23, | |
117 | PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31, | |
118 | PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14, | |
119 | PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30, | |
120 | PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46, | |
121 | PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62, | |
122 | PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */ | |
123 | /* *INDENT_ON * */ | |
c877c8e6 | 124 | |
45229ea4 EZ |
125 | static int |
126 | ppc_register_u_addr (int regno) | |
c877c8e6 | 127 | { |
16333c4f | 128 | int u_addr = -1; |
dc5cfeb6 | 129 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); |
49ff75ad | 130 | int wordsize = tdep->wordsize; |
16333c4f EZ |
131 | |
132 | /* General purpose registers occupy 1 slot each in the buffer */ | |
dc5cfeb6 | 133 | if (regno >= tdep->ppc_gp0_regnum && regno <= tdep->ppc_gplast_regnum ) |
49ff75ad | 134 | u_addr = ((PT_R0 + regno) * wordsize); |
16333c4f | 135 | |
49ff75ad JB |
136 | /* Floating point regs: eight bytes each in both 32- and 64-bit |
137 | ptrace interfaces. Thus, two slots each in 32-bit interface, one | |
138 | slot each in 64-bit interface. */ | |
16333c4f | 139 | if (regno >= FP0_REGNUM && regno <= FPLAST_REGNUM) |
49ff75ad | 140 | u_addr = (PT_FPR0 * wordsize) + ((regno - FP0_REGNUM) * 8); |
16333c4f EZ |
141 | |
142 | /* UISA special purpose registers: 1 slot each */ | |
143 | if (regno == PC_REGNUM) | |
49ff75ad | 144 | u_addr = PT_NIP * wordsize; |
dc5cfeb6 | 145 | if (regno == tdep->ppc_lr_regnum) |
49ff75ad | 146 | u_addr = PT_LNK * wordsize; |
dc5cfeb6 | 147 | if (regno == tdep->ppc_cr_regnum) |
49ff75ad | 148 | u_addr = PT_CCR * wordsize; |
dc5cfeb6 | 149 | if (regno == tdep->ppc_xer_regnum) |
49ff75ad | 150 | u_addr = PT_XER * wordsize; |
dc5cfeb6 | 151 | if (regno == tdep->ppc_ctr_regnum) |
49ff75ad | 152 | u_addr = PT_CTR * wordsize; |
f8c59253 | 153 | #ifdef PT_MQ |
dc5cfeb6 | 154 | if (regno == tdep->ppc_mq_regnum) |
49ff75ad | 155 | u_addr = PT_MQ * wordsize; |
f8c59253 | 156 | #endif |
dc5cfeb6 | 157 | if (regno == tdep->ppc_ps_regnum) |
49ff75ad | 158 | u_addr = PT_MSR * wordsize; |
e3f36dbd | 159 | if (regno == tdep->ppc_fpscr_regnum) |
49ff75ad | 160 | u_addr = PT_FPSCR * wordsize; |
16333c4f EZ |
161 | |
162 | return u_addr; | |
c877c8e6 KB |
163 | } |
164 | ||
45229ea4 EZ |
165 | static int |
166 | ppc_ptrace_cannot_fetch_store_register (int regno) | |
167 | { | |
168 | return (ppc_register_u_addr (regno) == -1); | |
169 | } | |
170 | ||
9abe5450 EZ |
171 | /* The Linux kernel ptrace interface for AltiVec registers uses the |
172 | registers set mechanism, as opposed to the interface for all the | |
173 | other registers, that stores/fetches each register individually. */ | |
174 | static void | |
175 | fetch_altivec_register (int tid, int regno) | |
176 | { | |
177 | int ret; | |
178 | int offset = 0; | |
179 | gdb_vrregset_t regs; | |
180 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
12c266ea | 181 | int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum); |
9abe5450 EZ |
182 | |
183 | ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s); | |
184 | if (ret < 0) | |
185 | { | |
186 | if (errno == EIO) | |
187 | { | |
188 | have_ptrace_getvrregs = 0; | |
189 | return; | |
190 | } | |
191 | perror_with_name ("Unable to fetch AltiVec register"); | |
192 | } | |
193 | ||
194 | /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes | |
195 | long on the hardware. We deal only with the lower 4 bytes of the | |
196 | vector. VRSAVE is at the end of the array in a 4 bytes slot, so | |
197 | there is no need to define an offset for it. */ | |
198 | if (regno == (tdep->ppc_vrsave_regnum - 1)) | |
12c266ea | 199 | offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum); |
9abe5450 EZ |
200 | |
201 | supply_register (regno, | |
202 | regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset); | |
203 | } | |
204 | ||
45229ea4 | 205 | static void |
05f13b9c | 206 | fetch_register (int tid, int regno) |
45229ea4 EZ |
207 | { |
208 | /* This isn't really an address. But ptrace thinks of it as one. */ | |
209 | char mess[128]; /* For messages */ | |
52f0bd74 | 210 | int i; |
45229ea4 | 211 | unsigned int offset; /* Offset of registers within the u area. */ |
d9d9c31f | 212 | char buf[MAX_REGISTER_SIZE]; |
45229ea4 EZ |
213 | CORE_ADDR regaddr = ppc_register_u_addr (regno); |
214 | ||
9abe5450 EZ |
215 | if (altivec_register_p (regno)) |
216 | { | |
217 | /* If this is the first time through, or if it is not the first | |
218 | time through, and we have comfirmed that there is kernel | |
219 | support for such a ptrace request, then go and fetch the | |
220 | register. */ | |
221 | if (have_ptrace_getvrregs) | |
222 | { | |
223 | fetch_altivec_register (tid, regno); | |
224 | return; | |
225 | } | |
226 | /* If we have discovered that there is no ptrace support for | |
227 | AltiVec registers, fall through and return zeroes, because | |
228 | regaddr will be -1 in this case. */ | |
229 | } | |
230 | ||
45229ea4 EZ |
231 | if (regaddr == -1) |
232 | { | |
12c266ea | 233 | memset (buf, '\0', DEPRECATED_REGISTER_RAW_SIZE (regno)); /* Supply zeroes */ |
45229ea4 EZ |
234 | supply_register (regno, buf); |
235 | return; | |
236 | } | |
237 | ||
12c266ea | 238 | for (i = 0; i < DEPRECATED_REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE)) |
45229ea4 EZ |
239 | { |
240 | errno = 0; | |
241 | *(PTRACE_XFER_TYPE *) & buf[i] = ptrace (PT_READ_U, tid, | |
242 | (PTRACE_ARG3_TYPE) regaddr, 0); | |
243 | regaddr += sizeof (PTRACE_XFER_TYPE); | |
244 | if (errno != 0) | |
245 | { | |
246 | sprintf (mess, "reading register %s (#%d)", | |
247 | REGISTER_NAME (regno), regno); | |
248 | perror_with_name (mess); | |
249 | } | |
250 | } | |
251 | supply_register (regno, buf); | |
252 | } | |
253 | ||
9abe5450 EZ |
254 | static void |
255 | supply_vrregset (gdb_vrregset_t *vrregsetp) | |
256 | { | |
257 | int i; | |
258 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
259 | int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1; | |
12c266ea AC |
260 | int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum); |
261 | int offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum); | |
9abe5450 EZ |
262 | |
263 | for (i = 0; i < num_of_vrregs; i++) | |
264 | { | |
265 | /* The last 2 registers of this set are only 32 bit long, not | |
266 | 128. However an offset is necessary only for VSCR because it | |
267 | occupies a whole vector, while VRSAVE occupies a full 4 bytes | |
268 | slot. */ | |
269 | if (i == (num_of_vrregs - 2)) | |
270 | supply_register (tdep->ppc_vr0_regnum + i, | |
271 | *vrregsetp + i * vrregsize + offset); | |
272 | else | |
273 | supply_register (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize); | |
274 | } | |
275 | } | |
276 | ||
277 | static void | |
278 | fetch_altivec_registers (int tid) | |
279 | { | |
280 | int ret; | |
281 | gdb_vrregset_t regs; | |
282 | ||
283 | ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s); | |
284 | if (ret < 0) | |
285 | { | |
286 | if (errno == EIO) | |
287 | { | |
288 | have_ptrace_getvrregs = 0; | |
289 | return; | |
290 | } | |
291 | perror_with_name ("Unable to fetch AltiVec registers"); | |
292 | } | |
293 | supply_vrregset (®s); | |
294 | } | |
295 | ||
45229ea4 | 296 | static void |
05f13b9c | 297 | fetch_ppc_registers (int tid) |
45229ea4 EZ |
298 | { |
299 | int i; | |
9abe5450 EZ |
300 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); |
301 | ||
e3f36dbd | 302 | for (i = 0; i <= tdep->ppc_fpscr_regnum; i++) |
05f13b9c | 303 | fetch_register (tid, i); |
e3f36dbd KB |
304 | if (tdep->ppc_mq_regnum != -1) |
305 | fetch_register (tid, tdep->ppc_mq_regnum); | |
9abe5450 EZ |
306 | if (have_ptrace_getvrregs) |
307 | if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1) | |
308 | fetch_altivec_registers (tid); | |
45229ea4 EZ |
309 | } |
310 | ||
311 | /* Fetch registers from the child process. Fetch all registers if | |
312 | regno == -1, otherwise fetch all general registers or all floating | |
313 | point registers depending upon the value of regno. */ | |
314 | void | |
315 | fetch_inferior_registers (int regno) | |
316 | { | |
9abe5450 | 317 | /* Overload thread id onto process id */ |
05f13b9c EZ |
318 | int tid = TIDGET (inferior_ptid); |
319 | ||
320 | /* No thread id, just use process id */ | |
321 | if (tid == 0) | |
322 | tid = PIDGET (inferior_ptid); | |
323 | ||
9abe5450 | 324 | if (regno == -1) |
05f13b9c | 325 | fetch_ppc_registers (tid); |
45229ea4 | 326 | else |
05f13b9c | 327 | fetch_register (tid, regno); |
45229ea4 EZ |
328 | } |
329 | ||
330 | /* Store one register. */ | |
9abe5450 EZ |
331 | static void |
332 | store_altivec_register (int tid, int regno) | |
333 | { | |
334 | int ret; | |
335 | int offset = 0; | |
336 | gdb_vrregset_t regs; | |
337 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
12c266ea | 338 | int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum); |
9abe5450 EZ |
339 | |
340 | ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s); | |
341 | if (ret < 0) | |
342 | { | |
343 | if (errno == EIO) | |
344 | { | |
345 | have_ptrace_getvrregs = 0; | |
346 | return; | |
347 | } | |
348 | perror_with_name ("Unable to fetch AltiVec register"); | |
349 | } | |
350 | ||
351 | /* VSCR is fetched as a 16 bytes quantity, but it is really 4 bytes | |
352 | long on the hardware. */ | |
353 | if (regno == (tdep->ppc_vrsave_regnum - 1)) | |
12c266ea | 354 | offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum); |
9abe5450 EZ |
355 | |
356 | regcache_collect (regno, | |
357 | regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset); | |
358 | ||
359 | ret = ptrace (PTRACE_SETVRREGS, tid, 0, ®s); | |
360 | if (ret < 0) | |
361 | perror_with_name ("Unable to store AltiVec register"); | |
362 | } | |
363 | ||
45229ea4 | 364 | static void |
05f13b9c | 365 | store_register (int tid, int regno) |
45229ea4 EZ |
366 | { |
367 | /* This isn't really an address. But ptrace thinks of it as one. */ | |
368 | CORE_ADDR regaddr = ppc_register_u_addr (regno); | |
369 | char mess[128]; /* For messages */ | |
52f0bd74 | 370 | int i; |
45229ea4 | 371 | unsigned int offset; /* Offset of registers within the u area. */ |
d9d9c31f | 372 | char buf[MAX_REGISTER_SIZE]; |
45229ea4 | 373 | |
9abe5450 | 374 | if (altivec_register_p (regno)) |
45229ea4 | 375 | { |
9abe5450 | 376 | store_altivec_register (tid, regno); |
45229ea4 EZ |
377 | return; |
378 | } | |
379 | ||
9abe5450 EZ |
380 | if (regaddr == -1) |
381 | return; | |
382 | ||
45229ea4 | 383 | regcache_collect (regno, buf); |
12c266ea | 384 | for (i = 0; i < DEPRECATED_REGISTER_RAW_SIZE (regno); i += sizeof (PTRACE_XFER_TYPE)) |
45229ea4 EZ |
385 | { |
386 | errno = 0; | |
387 | ptrace (PT_WRITE_U, tid, (PTRACE_ARG3_TYPE) regaddr, | |
388 | *(PTRACE_XFER_TYPE *) & buf[i]); | |
389 | regaddr += sizeof (PTRACE_XFER_TYPE); | |
e3f36dbd KB |
390 | |
391 | if (errno == EIO | |
392 | && regno == gdbarch_tdep (current_gdbarch)->ppc_fpscr_regnum) | |
393 | { | |
394 | /* Some older kernel versions don't allow fpscr to be written. */ | |
395 | continue; | |
396 | } | |
397 | ||
45229ea4 EZ |
398 | if (errno != 0) |
399 | { | |
400 | sprintf (mess, "writing register %s (#%d)", | |
401 | REGISTER_NAME (regno), regno); | |
402 | perror_with_name (mess); | |
403 | } | |
404 | } | |
405 | } | |
406 | ||
9abe5450 EZ |
407 | static void |
408 | fill_vrregset (gdb_vrregset_t *vrregsetp) | |
409 | { | |
410 | int i; | |
411 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
412 | int num_of_vrregs = tdep->ppc_vrsave_regnum - tdep->ppc_vr0_regnum + 1; | |
12c266ea AC |
413 | int vrregsize = DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum); |
414 | int offset = vrregsize - DEPRECATED_REGISTER_RAW_SIZE (tdep->ppc_vrsave_regnum); | |
9abe5450 EZ |
415 | |
416 | for (i = 0; i < num_of_vrregs; i++) | |
417 | { | |
418 | /* The last 2 registers of this set are only 32 bit long, not | |
419 | 128, but only VSCR is fetched as a 16 bytes quantity. */ | |
420 | if (i == (num_of_vrregs - 2)) | |
421 | regcache_collect (tdep->ppc_vr0_regnum + i, | |
422 | *vrregsetp + i * vrregsize + offset); | |
423 | else | |
424 | regcache_collect (tdep->ppc_vr0_regnum + i, *vrregsetp + i * vrregsize); | |
425 | } | |
426 | } | |
427 | ||
428 | static void | |
429 | store_altivec_registers (int tid) | |
430 | { | |
431 | int ret; | |
432 | gdb_vrregset_t regs; | |
433 | ||
0897f59b | 434 | ret = ptrace (PTRACE_GETVRREGS, tid, 0, ®s); |
9abe5450 EZ |
435 | if (ret < 0) |
436 | { | |
437 | if (errno == EIO) | |
438 | { | |
439 | have_ptrace_getvrregs = 0; | |
440 | return; | |
441 | } | |
442 | perror_with_name ("Couldn't get AltiVec registers"); | |
443 | } | |
444 | ||
445 | fill_vrregset (®s); | |
446 | ||
0897f59b | 447 | if (ptrace (PTRACE_SETVRREGS, tid, 0, ®s) < 0) |
9abe5450 EZ |
448 | perror_with_name ("Couldn't write AltiVec registers"); |
449 | } | |
450 | ||
45229ea4 | 451 | static void |
05f13b9c | 452 | store_ppc_registers (int tid) |
45229ea4 EZ |
453 | { |
454 | int i; | |
9abe5450 | 455 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); |
45229ea4 | 456 | |
e3f36dbd | 457 | for (i = 0; i <= tdep->ppc_fpscr_regnum; i++) |
05f13b9c | 458 | store_register (tid, i); |
e3f36dbd KB |
459 | if (tdep->ppc_mq_regnum != -1) |
460 | store_register (tid, tdep->ppc_mq_regnum); | |
9abe5450 EZ |
461 | if (have_ptrace_getvrregs) |
462 | if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1) | |
463 | store_altivec_registers (tid); | |
45229ea4 EZ |
464 | } |
465 | ||
466 | void | |
467 | store_inferior_registers (int regno) | |
468 | { | |
05f13b9c EZ |
469 | /* Overload thread id onto process id */ |
470 | int tid = TIDGET (inferior_ptid); | |
471 | ||
472 | /* No thread id, just use process id */ | |
473 | if (tid == 0) | |
474 | tid = PIDGET (inferior_ptid); | |
475 | ||
45229ea4 | 476 | if (regno >= 0) |
05f13b9c | 477 | store_register (tid, regno); |
45229ea4 | 478 | else |
05f13b9c | 479 | store_ppc_registers (tid); |
45229ea4 EZ |
480 | } |
481 | ||
50c9bd31 | 482 | void |
8ae45c11 | 483 | supply_gregset (gdb_gregset_t *gregsetp) |
c877c8e6 | 484 | { |
2fda4977 | 485 | ppc_linux_supply_gregset ((char *) gregsetp); |
c877c8e6 KB |
486 | } |
487 | ||
fdb28ac4 | 488 | void |
8ae45c11 | 489 | fill_gregset (gdb_gregset_t *gregsetp, int regno) |
fdb28ac4 KB |
490 | { |
491 | int regi; | |
2ac44c70 | 492 | elf_greg_t *regp = (elf_greg_t *) gregsetp; |
dc5cfeb6 | 493 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); |
fdb28ac4 | 494 | |
fdb28ac4 KB |
495 | for (regi = 0; regi < 32; regi++) |
496 | { | |
16333c4f EZ |
497 | if ((regno == -1) || regno == regi) |
498 | regcache_collect (regi, regp + PT_R0 + regi); | |
fdb28ac4 KB |
499 | } |
500 | ||
16333c4f EZ |
501 | if ((regno == -1) || regno == PC_REGNUM) |
502 | regcache_collect (PC_REGNUM, regp + PT_NIP); | |
05f13b9c | 503 | if ((regno == -1) || regno == tdep->ppc_lr_regnum) |
dc5cfeb6 | 504 | regcache_collect (tdep->ppc_lr_regnum, regp + PT_LNK); |
05f13b9c | 505 | if ((regno == -1) || regno == tdep->ppc_cr_regnum) |
dc5cfeb6 | 506 | regcache_collect (tdep->ppc_cr_regnum, regp + PT_CCR); |
05f13b9c | 507 | if ((regno == -1) || regno == tdep->ppc_xer_regnum) |
dc5cfeb6 | 508 | regcache_collect (tdep->ppc_xer_regnum, regp + PT_XER); |
05f13b9c | 509 | if ((regno == -1) || regno == tdep->ppc_ctr_regnum) |
dc5cfeb6 | 510 | regcache_collect (tdep->ppc_ctr_regnum, regp + PT_CTR); |
f8c59253 | 511 | #ifdef PT_MQ |
e3f36dbd KB |
512 | if (((regno == -1) || regno == tdep->ppc_mq_regnum) |
513 | && (tdep->ppc_mq_regnum != -1)) | |
dc5cfeb6 | 514 | regcache_collect (tdep->ppc_mq_regnum, regp + PT_MQ); |
f8c59253 | 515 | #endif |
05f13b9c | 516 | if ((regno == -1) || regno == tdep->ppc_ps_regnum) |
dc5cfeb6 | 517 | regcache_collect (tdep->ppc_ps_regnum, regp + PT_MSR); |
fdb28ac4 KB |
518 | } |
519 | ||
50c9bd31 | 520 | void |
8ae45c11 | 521 | supply_fpregset (gdb_fpregset_t * fpregsetp) |
c877c8e6 | 522 | { |
2fda4977 | 523 | ppc_linux_supply_fpregset ((char *) fpregsetp); |
c877c8e6 | 524 | } |
fdb28ac4 | 525 | |
9abe5450 EZ |
526 | /* Given a pointer to a floating point register set in /proc format |
527 | (fpregset_t *), update the register specified by REGNO from gdb's | |
528 | idea of the current floating point register set. If REGNO is -1, | |
529 | update them all. */ | |
fdb28ac4 | 530 | void |
8ae45c11 | 531 | fill_fpregset (gdb_fpregset_t *fpregsetp, int regno) |
fdb28ac4 KB |
532 | { |
533 | int regi; | |
e3f36dbd | 534 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); |
fdb28ac4 KB |
535 | |
536 | for (regi = 0; regi < 32; regi++) | |
537 | { | |
538 | if ((regno == -1) || (regno == FP0_REGNUM + regi)) | |
f00d3753 | 539 | regcache_collect (FP0_REGNUM + regi, (char *) (*fpregsetp + regi)); |
fdb28ac4 | 540 | } |
e3f36dbd KB |
541 | if ((regno == -1) || regno == tdep->ppc_fpscr_regnum) |
542 | regcache_collect (tdep->ppc_fpscr_regnum, (char *) (*fpregsetp + regi)); | |
fdb28ac4 | 543 | } |