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c877c8e6 | 1 | /* Target-dependent code for GDB, the GNU debugger. |
4e052eda | 2 | |
6aba47ca | 3 | Copyright (C) 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, |
9b254dd1 | 4 | 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 |
76a9d10f | 5 | Free Software Foundation, Inc. |
c877c8e6 KB |
6 | |
7 | This file is part of GDB. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 11 | the Free Software Foundation; either version 3 of the License, or |
c877c8e6 KB |
12 | (at your option) any later version. |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
c877c8e6 KB |
21 | |
22 | #include "defs.h" | |
23 | #include "frame.h" | |
24 | #include "inferior.h" | |
25 | #include "symtab.h" | |
26 | #include "target.h" | |
27 | #include "gdbcore.h" | |
28 | #include "gdbcmd.h" | |
29 | #include "symfile.h" | |
30 | #include "objfiles.h" | |
4e052eda | 31 | #include "regcache.h" |
fd0407d6 | 32 | #include "value.h" |
4be87837 | 33 | #include "osabi.h" |
f9be684a | 34 | #include "regset.h" |
6ded7999 | 35 | #include "solib-svr4.h" |
9aa1e687 | 36 | #include "ppc-tdep.h" |
7284e1be | 37 | #include "ppc-linux-tdep.h" |
61a65099 KB |
38 | #include "trad-frame.h" |
39 | #include "frame-unwind.h" | |
a8f60bfc | 40 | #include "tramp-frame.h" |
9aa1e687 | 41 | |
7284e1be UW |
42 | #include "features/rs6000/powerpc-32l.c" |
43 | #include "features/rs6000/powerpc-altivec32l.c" | |
604c2f83 | 44 | #include "features/rs6000/powerpc-vsx32l.c" |
7284e1be UW |
45 | #include "features/rs6000/powerpc-64l.c" |
46 | #include "features/rs6000/powerpc-altivec64l.c" | |
604c2f83 | 47 | #include "features/rs6000/powerpc-vsx64l.c" |
7284e1be UW |
48 | #include "features/rs6000/powerpc-e500l.c" |
49 | ||
c877c8e6 | 50 | |
122a33de KB |
51 | /* ppc_linux_memory_remove_breakpoints attempts to remove a breakpoint |
52 | in much the same fashion as memory_remove_breakpoint in mem-break.c, | |
53 | but is careful not to write back the previous contents if the code | |
54 | in question has changed in between inserting the breakpoint and | |
55 | removing it. | |
56 | ||
57 | Here is the problem that we're trying to solve... | |
58 | ||
59 | Once upon a time, before introducing this function to remove | |
60 | breakpoints from the inferior, setting a breakpoint on a shared | |
61 | library function prior to running the program would not work | |
62 | properly. In order to understand the problem, it is first | |
63 | necessary to understand a little bit about dynamic linking on | |
64 | this platform. | |
65 | ||
66 | A call to a shared library function is accomplished via a bl | |
67 | (branch-and-link) instruction whose branch target is an entry | |
68 | in the procedure linkage table (PLT). The PLT in the object | |
69 | file is uninitialized. To gdb, prior to running the program, the | |
70 | entries in the PLT are all zeros. | |
71 | ||
72 | Once the program starts running, the shared libraries are loaded | |
73 | and the procedure linkage table is initialized, but the entries in | |
74 | the table are not (necessarily) resolved. Once a function is | |
75 | actually called, the code in the PLT is hit and the function is | |
76 | resolved. In order to better illustrate this, an example is in | |
77 | order; the following example is from the gdb testsuite. | |
78 | ||
79 | We start the program shmain. | |
80 | ||
81 | [kev@arroyo testsuite]$ ../gdb gdb.base/shmain | |
82 | [...] | |
83 | ||
84 | We place two breakpoints, one on shr1 and the other on main. | |
85 | ||
86 | (gdb) b shr1 | |
87 | Breakpoint 1 at 0x100409d4 | |
88 | (gdb) b main | |
89 | Breakpoint 2 at 0x100006a0: file gdb.base/shmain.c, line 44. | |
90 | ||
91 | Examine the instruction (and the immediatly following instruction) | |
92 | upon which the breakpoint was placed. Note that the PLT entry | |
93 | for shr1 contains zeros. | |
94 | ||
95 | (gdb) x/2i 0x100409d4 | |
96 | 0x100409d4 <shr1>: .long 0x0 | |
97 | 0x100409d8 <shr1+4>: .long 0x0 | |
98 | ||
99 | Now run 'til main. | |
100 | ||
101 | (gdb) r | |
102 | Starting program: gdb.base/shmain | |
103 | Breakpoint 1 at 0xffaf790: file gdb.base/shr1.c, line 19. | |
104 | ||
105 | Breakpoint 2, main () | |
106 | at gdb.base/shmain.c:44 | |
107 | 44 g = 1; | |
108 | ||
109 | Examine the PLT again. Note that the loading of the shared | |
110 | library has initialized the PLT to code which loads a constant | |
111 | (which I think is an index into the GOT) into r11 and then | |
112 | branchs a short distance to the code which actually does the | |
113 | resolving. | |
114 | ||
115 | (gdb) x/2i 0x100409d4 | |
116 | 0x100409d4 <shr1>: li r11,4 | |
117 | 0x100409d8 <shr1+4>: b 0x10040984 <sg+4> | |
118 | (gdb) c | |
119 | Continuing. | |
120 | ||
121 | Breakpoint 1, shr1 (x=1) | |
122 | at gdb.base/shr1.c:19 | |
123 | 19 l = 1; | |
124 | ||
125 | Now we've hit the breakpoint at shr1. (The breakpoint was | |
126 | reset from the PLT entry to the actual shr1 function after the | |
127 | shared library was loaded.) Note that the PLT entry has been | |
128 | resolved to contain a branch that takes us directly to shr1. | |
129 | (The real one, not the PLT entry.) | |
130 | ||
131 | (gdb) x/2i 0x100409d4 | |
132 | 0x100409d4 <shr1>: b 0xffaf76c <shr1> | |
133 | 0x100409d8 <shr1+4>: b 0x10040984 <sg+4> | |
134 | ||
135 | The thing to note here is that the PLT entry for shr1 has been | |
136 | changed twice. | |
137 | ||
138 | Now the problem should be obvious. GDB places a breakpoint (a | |
139 | trap instruction) on the zero value of the PLT entry for shr1. | |
140 | Later on, after the shared library had been loaded and the PLT | |
141 | initialized, GDB gets a signal indicating this fact and attempts | |
142 | (as it always does when it stops) to remove all the breakpoints. | |
143 | ||
144 | The breakpoint removal was causing the former contents (a zero | |
145 | word) to be written back to the now initialized PLT entry thus | |
146 | destroying a portion of the initialization that had occurred only a | |
147 | short time ago. When execution continued, the zero word would be | |
148 | executed as an instruction an an illegal instruction trap was | |
149 | generated instead. (0 is not a legal instruction.) | |
150 | ||
151 | The fix for this problem was fairly straightforward. The function | |
152 | memory_remove_breakpoint from mem-break.c was copied to this file, | |
153 | modified slightly, and renamed to ppc_linux_memory_remove_breakpoint. | |
154 | In tm-linux.h, MEMORY_REMOVE_BREAKPOINT is defined to call this new | |
155 | function. | |
156 | ||
157 | The differences between ppc_linux_memory_remove_breakpoint () and | |
158 | memory_remove_breakpoint () are minor. All that the former does | |
159 | that the latter does not is check to make sure that the breakpoint | |
160 | location actually contains a breakpoint (trap instruction) prior | |
161 | to attempting to write back the old contents. If it does contain | |
162 | a trap instruction, we allow the old contents to be written back. | |
163 | Otherwise, we silently do nothing. | |
164 | ||
165 | The big question is whether memory_remove_breakpoint () should be | |
166 | changed to have the same functionality. The downside is that more | |
167 | traffic is generated for remote targets since we'll have an extra | |
168 | fetch of a memory word each time a breakpoint is removed. | |
169 | ||
170 | For the time being, we'll leave this self-modifying-code-friendly | |
171 | version in ppc-linux-tdep.c, but it ought to be migrated somewhere | |
172 | else in the event that some other platform has similar needs with | |
173 | regard to removing breakpoints in some potentially self modifying | |
174 | code. */ | |
482ca3f5 | 175 | int |
ae4b2284 MD |
176 | ppc_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, |
177 | struct bp_target_info *bp_tgt) | |
482ca3f5 | 178 | { |
8181d85f | 179 | CORE_ADDR addr = bp_tgt->placed_address; |
f4f9705a | 180 | const unsigned char *bp; |
482ca3f5 KB |
181 | int val; |
182 | int bplen; | |
50fd1280 | 183 | gdb_byte old_contents[BREAKPOINT_MAX]; |
8defab1a | 184 | struct cleanup *cleanup; |
482ca3f5 KB |
185 | |
186 | /* Determine appropriate breakpoint contents and size for this address. */ | |
ae4b2284 | 187 | bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); |
482ca3f5 | 188 | if (bp == NULL) |
8a3fe4f8 | 189 | error (_("Software breakpoints not implemented for this target.")); |
482ca3f5 | 190 | |
8defab1a DJ |
191 | /* Make sure we see the memory breakpoints. */ |
192 | cleanup = make_show_memory_breakpoints_cleanup (1); | |
482ca3f5 KB |
193 | val = target_read_memory (addr, old_contents, bplen); |
194 | ||
195 | /* If our breakpoint is no longer at the address, this means that the | |
196 | program modified the code on us, so it is wrong to put back the | |
197 | old value */ | |
198 | if (val == 0 && memcmp (bp, old_contents, bplen) == 0) | |
8181d85f | 199 | val = target_write_memory (addr, bp_tgt->shadow_contents, bplen); |
482ca3f5 | 200 | |
8defab1a | 201 | do_cleanups (cleanup); |
482ca3f5 KB |
202 | return val; |
203 | } | |
6ded7999 | 204 | |
b9ff3018 AC |
205 | /* For historic reasons, PPC 32 GNU/Linux follows PowerOpen rather |
206 | than the 32 bit SYSV R4 ABI structure return convention - all | |
207 | structures, no matter their size, are put in memory. Vectors, | |
208 | which were added later, do get returned in a register though. */ | |
209 | ||
05580c65 | 210 | static enum return_value_convention |
c055b101 CV |
211 | ppc_linux_return_value (struct gdbarch *gdbarch, struct type *func_type, |
212 | struct type *valtype, struct regcache *regcache, | |
213 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
b9ff3018 | 214 | { |
05580c65 AC |
215 | if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT |
216 | || TYPE_CODE (valtype) == TYPE_CODE_UNION) | |
217 | && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8) | |
218 | && TYPE_VECTOR (valtype))) | |
219 | return RETURN_VALUE_STRUCT_CONVENTION; | |
220 | else | |
c055b101 CV |
221 | return ppc_sysv_abi_return_value (gdbarch, func_type, valtype, regcache, |
222 | readbuf, writebuf); | |
b9ff3018 AC |
223 | } |
224 | ||
f470a70a JB |
225 | /* Macros for matching instructions. Note that, since all the |
226 | operands are masked off before they're or-ed into the instruction, | |
227 | you can use -1 to make masks. */ | |
228 | ||
229 | #define insn_d(opcd, rts, ra, d) \ | |
230 | ((((opcd) & 0x3f) << 26) \ | |
231 | | (((rts) & 0x1f) << 21) \ | |
232 | | (((ra) & 0x1f) << 16) \ | |
233 | | ((d) & 0xffff)) | |
234 | ||
235 | #define insn_ds(opcd, rts, ra, d, xo) \ | |
236 | ((((opcd) & 0x3f) << 26) \ | |
237 | | (((rts) & 0x1f) << 21) \ | |
238 | | (((ra) & 0x1f) << 16) \ | |
239 | | ((d) & 0xfffc) \ | |
240 | | ((xo) & 0x3)) | |
241 | ||
242 | #define insn_xfx(opcd, rts, spr, xo) \ | |
243 | ((((opcd) & 0x3f) << 26) \ | |
244 | | (((rts) & 0x1f) << 21) \ | |
245 | | (((spr) & 0x1f) << 16) \ | |
246 | | (((spr) & 0x3e0) << 6) \ | |
247 | | (((xo) & 0x3ff) << 1)) | |
248 | ||
249 | /* Read a PPC instruction from memory. PPC instructions are always | |
250 | big-endian, no matter what endianness the program is running in, so | |
251 | we can't use read_memory_integer or one of its friends here. */ | |
252 | static unsigned int | |
253 | read_insn (CORE_ADDR pc) | |
254 | { | |
255 | unsigned char buf[4]; | |
256 | ||
257 | read_memory (pc, buf, 4); | |
258 | return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3]; | |
259 | } | |
260 | ||
261 | ||
262 | /* An instruction to match. */ | |
263 | struct insn_pattern | |
264 | { | |
265 | unsigned int mask; /* mask the insn with this... */ | |
266 | unsigned int data; /* ...and see if it matches this. */ | |
267 | int optional; /* If non-zero, this insn may be absent. */ | |
268 | }; | |
269 | ||
270 | /* Return non-zero if the instructions at PC match the series | |
271 | described in PATTERN, or zero otherwise. PATTERN is an array of | |
272 | 'struct insn_pattern' objects, terminated by an entry whose mask is | |
273 | zero. | |
274 | ||
275 | When the match is successful, fill INSN[i] with what PATTERN[i] | |
276 | matched. If PATTERN[i] is optional, and the instruction wasn't | |
277 | present, set INSN[i] to 0 (which is not a valid PPC instruction). | |
278 | INSN should have as many elements as PATTERN. Note that, if | |
279 | PATTERN contains optional instructions which aren't present in | |
280 | memory, then INSN will have holes, so INSN[i] isn't necessarily the | |
281 | i'th instruction in memory. */ | |
282 | static int | |
283 | insns_match_pattern (CORE_ADDR pc, | |
284 | struct insn_pattern *pattern, | |
285 | unsigned int *insn) | |
286 | { | |
287 | int i; | |
288 | ||
289 | for (i = 0; pattern[i].mask; i++) | |
290 | { | |
291 | insn[i] = read_insn (pc); | |
292 | if ((insn[i] & pattern[i].mask) == pattern[i].data) | |
293 | pc += 4; | |
294 | else if (pattern[i].optional) | |
295 | insn[i] = 0; | |
296 | else | |
297 | return 0; | |
298 | } | |
299 | ||
300 | return 1; | |
301 | } | |
302 | ||
303 | ||
304 | /* Return the 'd' field of the d-form instruction INSN, properly | |
305 | sign-extended. */ | |
306 | static CORE_ADDR | |
307 | insn_d_field (unsigned int insn) | |
308 | { | |
309 | return ((((CORE_ADDR) insn & 0xffff) ^ 0x8000) - 0x8000); | |
310 | } | |
311 | ||
312 | ||
313 | /* Return the 'ds' field of the ds-form instruction INSN, with the two | |
314 | zero bits concatenated at the right, and properly | |
315 | sign-extended. */ | |
316 | static CORE_ADDR | |
317 | insn_ds_field (unsigned int insn) | |
318 | { | |
319 | return ((((CORE_ADDR) insn & 0xfffc) ^ 0x8000) - 0x8000); | |
320 | } | |
321 | ||
322 | ||
e538d2d7 | 323 | /* If DESC is the address of a 64-bit PowerPC GNU/Linux function |
d64558a5 JB |
324 | descriptor, return the descriptor's entry point. */ |
325 | static CORE_ADDR | |
326 | ppc64_desc_entry_point (CORE_ADDR desc) | |
327 | { | |
328 | /* The first word of the descriptor is the entry point. */ | |
329 | return (CORE_ADDR) read_memory_unsigned_integer (desc, 8); | |
330 | } | |
331 | ||
332 | ||
f470a70a JB |
333 | /* Pattern for the standard linkage function. These are built by |
334 | build_plt_stub in elf64-ppc.c, whose GLINK argument is always | |
335 | zero. */ | |
42848c96 | 336 | static struct insn_pattern ppc64_standard_linkage1[] = |
f470a70a JB |
337 | { |
338 | /* addis r12, r2, <any> */ | |
339 | { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 }, | |
340 | ||
341 | /* std r2, 40(r1) */ | |
342 | { -1, insn_ds (62, 2, 1, 40, 0), 0 }, | |
343 | ||
344 | /* ld r11, <any>(r12) */ | |
345 | { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 }, | |
346 | ||
347 | /* addis r12, r12, 1 <optional> */ | |
42848c96 | 348 | { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 }, |
f470a70a JB |
349 | |
350 | /* ld r2, <any>(r12) */ | |
351 | { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 }, | |
352 | ||
353 | /* addis r12, r12, 1 <optional> */ | |
42848c96 | 354 | { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 }, |
f470a70a JB |
355 | |
356 | /* mtctr r11 */ | |
42848c96 | 357 | { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 }, |
f470a70a JB |
358 | |
359 | /* ld r11, <any>(r12) */ | |
360 | { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 }, | |
361 | ||
362 | /* bctr */ | |
363 | { -1, 0x4e800420, 0 }, | |
364 | ||
365 | { 0, 0, 0 } | |
366 | }; | |
42848c96 UW |
367 | #define PPC64_STANDARD_LINKAGE1_LEN \ |
368 | (sizeof (ppc64_standard_linkage1) / sizeof (ppc64_standard_linkage1[0])) | |
369 | ||
370 | static struct insn_pattern ppc64_standard_linkage2[] = | |
371 | { | |
372 | /* addis r12, r2, <any> */ | |
373 | { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 }, | |
374 | ||
375 | /* std r2, 40(r1) */ | |
376 | { -1, insn_ds (62, 2, 1, 40, 0), 0 }, | |
377 | ||
378 | /* ld r11, <any>(r12) */ | |
379 | { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 }, | |
380 | ||
381 | /* addi r12, r12, <any> <optional> */ | |
382 | { insn_d (-1, -1, -1, 0), insn_d (14, 12, 12, 0), 1 }, | |
383 | ||
384 | /* mtctr r11 */ | |
385 | { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 }, | |
386 | ||
387 | /* ld r2, <any>(r12) */ | |
388 | { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 }, | |
389 | ||
390 | /* ld r11, <any>(r12) */ | |
391 | { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 }, | |
392 | ||
393 | /* bctr */ | |
394 | { -1, 0x4e800420, 0 }, | |
395 | ||
396 | { 0, 0, 0 } | |
397 | }; | |
398 | #define PPC64_STANDARD_LINKAGE2_LEN \ | |
399 | (sizeof (ppc64_standard_linkage2) / sizeof (ppc64_standard_linkage2[0])) | |
400 | ||
401 | static struct insn_pattern ppc64_standard_linkage3[] = | |
402 | { | |
403 | /* std r2, 40(r1) */ | |
404 | { -1, insn_ds (62, 2, 1, 40, 0), 0 }, | |
405 | ||
406 | /* ld r11, <any>(r2) */ | |
407 | { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 }, | |
408 | ||
409 | /* addi r2, r2, <any> <optional> */ | |
410 | { insn_d (-1, -1, -1, 0), insn_d (14, 2, 2, 0), 1 }, | |
411 | ||
412 | /* mtctr r11 */ | |
413 | { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 }, | |
414 | ||
415 | /* ld r11, <any>(r2) */ | |
416 | { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 }, | |
417 | ||
418 | /* ld r2, <any>(r2) */ | |
419 | { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 2, 0, 0), 0 }, | |
420 | ||
421 | /* bctr */ | |
422 | { -1, 0x4e800420, 0 }, | |
423 | ||
424 | { 0, 0, 0 } | |
425 | }; | |
426 | #define PPC64_STANDARD_LINKAGE3_LEN \ | |
427 | (sizeof (ppc64_standard_linkage3) / sizeof (ppc64_standard_linkage3[0])) | |
428 | ||
f470a70a | 429 | |
f470a70a JB |
430 | /* When the dynamic linker is doing lazy symbol resolution, the first |
431 | call to a function in another object will go like this: | |
432 | ||
433 | - The user's function calls the linkage function: | |
434 | ||
435 | 100007c4: 4b ff fc d5 bl 10000498 | |
436 | 100007c8: e8 41 00 28 ld r2,40(r1) | |
437 | ||
438 | - The linkage function loads the entry point (and other stuff) from | |
439 | the function descriptor in the PLT, and jumps to it: | |
440 | ||
441 | 10000498: 3d 82 00 00 addis r12,r2,0 | |
442 | 1000049c: f8 41 00 28 std r2,40(r1) | |
443 | 100004a0: e9 6c 80 98 ld r11,-32616(r12) | |
444 | 100004a4: e8 4c 80 a0 ld r2,-32608(r12) | |
445 | 100004a8: 7d 69 03 a6 mtctr r11 | |
446 | 100004ac: e9 6c 80 a8 ld r11,-32600(r12) | |
447 | 100004b0: 4e 80 04 20 bctr | |
448 | ||
449 | - But since this is the first time that PLT entry has been used, it | |
450 | sends control to its glink entry. That loads the number of the | |
451 | PLT entry and jumps to the common glink0 code: | |
452 | ||
453 | 10000c98: 38 00 00 00 li r0,0 | |
454 | 10000c9c: 4b ff ff dc b 10000c78 | |
455 | ||
456 | - The common glink0 code then transfers control to the dynamic | |
457 | linker's fixup code: | |
458 | ||
459 | 10000c78: e8 41 00 28 ld r2,40(r1) | |
460 | 10000c7c: 3d 82 00 00 addis r12,r2,0 | |
461 | 10000c80: e9 6c 80 80 ld r11,-32640(r12) | |
462 | 10000c84: e8 4c 80 88 ld r2,-32632(r12) | |
463 | 10000c88: 7d 69 03 a6 mtctr r11 | |
464 | 10000c8c: e9 6c 80 90 ld r11,-32624(r12) | |
465 | 10000c90: 4e 80 04 20 bctr | |
466 | ||
467 | Eventually, this code will figure out how to skip all of this, | |
468 | including the dynamic linker. At the moment, we just get through | |
469 | the linkage function. */ | |
470 | ||
471 | /* If the current thread is about to execute a series of instructions | |
472 | at PC matching the ppc64_standard_linkage pattern, and INSN is the result | |
473 | from that pattern match, return the code address to which the | |
474 | standard linkage function will send them. (This doesn't deal with | |
475 | dynamic linker lazy symbol resolution stubs.) */ | |
476 | static CORE_ADDR | |
42848c96 UW |
477 | ppc64_standard_linkage1_target (struct frame_info *frame, |
478 | CORE_ADDR pc, unsigned int *insn) | |
f470a70a | 479 | { |
52f729a7 | 480 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame)); |
f470a70a JB |
481 | |
482 | /* The address of the function descriptor this linkage function | |
483 | references. */ | |
484 | CORE_ADDR desc | |
52f729a7 UW |
485 | = ((CORE_ADDR) get_frame_register_unsigned (frame, |
486 | tdep->ppc_gp0_regnum + 2) | |
f470a70a JB |
487 | + (insn_d_field (insn[0]) << 16) |
488 | + insn_ds_field (insn[2])); | |
489 | ||
490 | /* The first word of the descriptor is the entry point. Return that. */ | |
d64558a5 | 491 | return ppc64_desc_entry_point (desc); |
f470a70a JB |
492 | } |
493 | ||
6207416c | 494 | static struct core_regset_section ppc_linux_vsx_regset_sections[] = |
17ea7499 CES |
495 | { |
496 | { ".reg", 268 }, | |
497 | { ".reg2", 264 }, | |
498 | { ".reg-ppc-vmx", 544 }, | |
604c2f83 | 499 | { ".reg-ppc-vsx", 256 }, |
17ea7499 CES |
500 | { NULL, 0} |
501 | }; | |
502 | ||
6207416c LM |
503 | static struct core_regset_section ppc_linux_vmx_regset_sections[] = |
504 | { | |
505 | { ".reg", 268 }, | |
506 | { ".reg2", 264 }, | |
507 | { ".reg-ppc-vmx", 544 }, | |
508 | { NULL, 0} | |
509 | }; | |
510 | ||
511 | static struct core_regset_section ppc_linux_fp_regset_sections[] = | |
512 | { | |
513 | { ".reg", 268 }, | |
514 | { ".reg2", 264 }, | |
515 | { NULL, 0} | |
516 | }; | |
517 | ||
42848c96 UW |
518 | static CORE_ADDR |
519 | ppc64_standard_linkage2_target (struct frame_info *frame, | |
520 | CORE_ADDR pc, unsigned int *insn) | |
521 | { | |
522 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame)); | |
523 | ||
524 | /* The address of the function descriptor this linkage function | |
525 | references. */ | |
526 | CORE_ADDR desc | |
527 | = ((CORE_ADDR) get_frame_register_unsigned (frame, | |
528 | tdep->ppc_gp0_regnum + 2) | |
529 | + (insn_d_field (insn[0]) << 16) | |
530 | + insn_ds_field (insn[2])); | |
531 | ||
532 | /* The first word of the descriptor is the entry point. Return that. */ | |
533 | return ppc64_desc_entry_point (desc); | |
534 | } | |
535 | ||
536 | static CORE_ADDR | |
537 | ppc64_standard_linkage3_target (struct frame_info *frame, | |
538 | CORE_ADDR pc, unsigned int *insn) | |
539 | { | |
540 | struct gdbarch_tdep *tdep = gdbarch_tdep (get_frame_arch (frame)); | |
541 | ||
542 | /* The address of the function descriptor this linkage function | |
543 | references. */ | |
544 | CORE_ADDR desc | |
545 | = ((CORE_ADDR) get_frame_register_unsigned (frame, | |
546 | tdep->ppc_gp0_regnum + 2) | |
547 | + insn_ds_field (insn[1])); | |
548 | ||
549 | /* The first word of the descriptor is the entry point. Return that. */ | |
550 | return ppc64_desc_entry_point (desc); | |
551 | } | |
552 | ||
f470a70a JB |
553 | |
554 | /* Given that we've begun executing a call trampoline at PC, return | |
555 | the entry point of the function the trampoline will go to. */ | |
556 | static CORE_ADDR | |
52f729a7 | 557 | ppc64_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc) |
f470a70a | 558 | { |
42848c96 UW |
559 | unsigned int ppc64_standard_linkage1_insn[PPC64_STANDARD_LINKAGE1_LEN]; |
560 | unsigned int ppc64_standard_linkage2_insn[PPC64_STANDARD_LINKAGE2_LEN]; | |
561 | unsigned int ppc64_standard_linkage3_insn[PPC64_STANDARD_LINKAGE3_LEN]; | |
562 | CORE_ADDR target; | |
563 | ||
564 | if (insns_match_pattern (pc, ppc64_standard_linkage1, | |
565 | ppc64_standard_linkage1_insn)) | |
566 | pc = ppc64_standard_linkage1_target (frame, pc, | |
567 | ppc64_standard_linkage1_insn); | |
568 | else if (insns_match_pattern (pc, ppc64_standard_linkage2, | |
569 | ppc64_standard_linkage2_insn)) | |
570 | pc = ppc64_standard_linkage2_target (frame, pc, | |
571 | ppc64_standard_linkage2_insn); | |
572 | else if (insns_match_pattern (pc, ppc64_standard_linkage3, | |
573 | ppc64_standard_linkage3_insn)) | |
574 | pc = ppc64_standard_linkage3_target (frame, pc, | |
575 | ppc64_standard_linkage3_insn); | |
f470a70a JB |
576 | else |
577 | return 0; | |
42848c96 UW |
578 | |
579 | /* The PLT descriptor will either point to the already resolved target | |
580 | address, or else to a glink stub. As the latter carry synthetic @plt | |
581 | symbols, find_solib_trampoline_target should be able to resolve them. */ | |
582 | target = find_solib_trampoline_target (frame, pc); | |
583 | return target? target : pc; | |
f470a70a JB |
584 | } |
585 | ||
586 | ||
00d5f93a | 587 | /* Support for convert_from_func_ptr_addr (ARCH, ADDR, TARG) on PPC64 |
e2d0e7eb | 588 | GNU/Linux. |
02631ec0 JB |
589 | |
590 | Usually a function pointer's representation is simply the address | |
2bbe3cc1 DJ |
591 | of the function. On GNU/Linux on the PowerPC however, a function |
592 | pointer may be a pointer to a function descriptor. | |
593 | ||
594 | For PPC64, a function descriptor is a TOC entry, in a data section, | |
595 | which contains three words: the first word is the address of the | |
596 | function, the second word is the TOC pointer (r2), and the third word | |
597 | is the static chain value. | |
598 | ||
2bbe3cc1 DJ |
599 | Throughout GDB it is currently assumed that a function pointer contains |
600 | the address of the function, which is not easy to fix. In addition, the | |
e538d2d7 JB |
601 | conversion of a function address to a function pointer would |
602 | require allocation of a TOC entry in the inferior's memory space, | |
603 | with all its drawbacks. To be able to call C++ virtual methods in | |
604 | the inferior (which are called via function pointers), | |
605 | find_function_addr uses this function to get the function address | |
2bbe3cc1 | 606 | from a function pointer. |
02631ec0 | 607 | |
2bbe3cc1 DJ |
608 | If ADDR points at what is clearly a function descriptor, transform |
609 | it into the address of the corresponding function, if needed. Be | |
610 | conservative, otherwise GDB will do the transformation on any | |
611 | random addresses such as occur when there is no symbol table. */ | |
02631ec0 JB |
612 | |
613 | static CORE_ADDR | |
00d5f93a UW |
614 | ppc64_linux_convert_from_func_ptr_addr (struct gdbarch *gdbarch, |
615 | CORE_ADDR addr, | |
616 | struct target_ops *targ) | |
02631ec0 | 617 | { |
b6591e8b | 618 | struct section_table *s = target_section_by_addr (targ, addr); |
02631ec0 | 619 | |
9b540880 | 620 | /* Check if ADDR points to a function descriptor. */ |
00d5f93a | 621 | if (s && strcmp (s->the_bfd_section->name, ".opd") == 0) |
e84ee240 UW |
622 | { |
623 | /* There may be relocations that need to be applied to the .opd | |
624 | section. Unfortunately, this function may be called at a time | |
625 | where these relocations have not yet been performed -- this can | |
626 | happen for example shortly after a library has been loaded with | |
627 | dlopen, but ld.so has not yet applied the relocations. | |
628 | ||
629 | To cope with both the case where the relocation has been applied, | |
630 | and the case where it has not yet been applied, we do *not* read | |
631 | the (maybe) relocated value from target memory, but we instead | |
632 | read the non-relocated value from the BFD, and apply the relocation | |
633 | offset manually. | |
634 | ||
635 | This makes the assumption that all .opd entries are always relocated | |
636 | by the same offset the section itself was relocated. This should | |
637 | always be the case for GNU/Linux executables and shared libraries. | |
638 | Note that other kind of object files (e.g. those added via | |
639 | add-symbol-files) will currently never end up here anyway, as this | |
640 | function accesses *target* sections only; only the main exec and | |
641 | shared libraries are ever added to the target. */ | |
642 | ||
643 | gdb_byte buf[8]; | |
644 | int res; | |
645 | ||
646 | res = bfd_get_section_contents (s->bfd, s->the_bfd_section, | |
647 | &buf, addr - s->addr, 8); | |
648 | if (res != 0) | |
649 | return extract_unsigned_integer (buf, 8) | |
650 | - bfd_section_vma (s->bfd, s->the_bfd_section) + s->addr; | |
651 | } | |
9b540880 AC |
652 | |
653 | return addr; | |
02631ec0 JB |
654 | } |
655 | ||
7284e1be UW |
656 | /* Wrappers to handle Linux-only registers. */ |
657 | ||
658 | static void | |
659 | ppc_linux_supply_gregset (const struct regset *regset, | |
660 | struct regcache *regcache, | |
661 | int regnum, const void *gregs, size_t len) | |
662 | { | |
663 | const struct ppc_reg_offsets *offsets = regset->descr; | |
664 | ||
665 | ppc_supply_gregset (regset, regcache, regnum, gregs, len); | |
666 | ||
667 | if (ppc_linux_trap_reg_p (get_regcache_arch (regcache))) | |
668 | { | |
669 | /* "orig_r3" is stored 2 slots after "pc". */ | |
670 | if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM) | |
671 | ppc_supply_reg (regcache, PPC_ORIG_R3_REGNUM, gregs, | |
672 | offsets->pc_offset + 2 * offsets->gpr_size, | |
673 | offsets->gpr_size); | |
674 | ||
675 | /* "trap" is stored 8 slots after "pc". */ | |
676 | if (regnum == -1 || regnum == PPC_TRAP_REGNUM) | |
677 | ppc_supply_reg (regcache, PPC_TRAP_REGNUM, gregs, | |
678 | offsets->pc_offset + 8 * offsets->gpr_size, | |
679 | offsets->gpr_size); | |
680 | } | |
681 | } | |
f2db237a | 682 | |
f9be684a | 683 | static void |
f2db237a AM |
684 | ppc_linux_collect_gregset (const struct regset *regset, |
685 | const struct regcache *regcache, | |
686 | int regnum, void *gregs, size_t len) | |
f9be684a | 687 | { |
7284e1be UW |
688 | const struct ppc_reg_offsets *offsets = regset->descr; |
689 | ||
690 | /* Clear areas in the linux gregset not written elsewhere. */ | |
f2db237a AM |
691 | if (regnum == -1) |
692 | memset (gregs, 0, len); | |
7284e1be | 693 | |
f2db237a | 694 | ppc_collect_gregset (regset, regcache, regnum, gregs, len); |
7284e1be UW |
695 | |
696 | if (ppc_linux_trap_reg_p (get_regcache_arch (regcache))) | |
697 | { | |
698 | /* "orig_r3" is stored 2 slots after "pc". */ | |
699 | if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM) | |
700 | ppc_collect_reg (regcache, PPC_ORIG_R3_REGNUM, gregs, | |
701 | offsets->pc_offset + 2 * offsets->gpr_size, | |
702 | offsets->gpr_size); | |
703 | ||
704 | /* "trap" is stored 8 slots after "pc". */ | |
705 | if (regnum == -1 || regnum == PPC_TRAP_REGNUM) | |
706 | ppc_collect_reg (regcache, PPC_TRAP_REGNUM, gregs, | |
707 | offsets->pc_offset + 8 * offsets->gpr_size, | |
708 | offsets->gpr_size); | |
709 | } | |
f9be684a AC |
710 | } |
711 | ||
f2db237a AM |
712 | /* Regset descriptions. */ |
713 | static const struct ppc_reg_offsets ppc32_linux_reg_offsets = | |
714 | { | |
715 | /* General-purpose registers. */ | |
716 | /* .r0_offset = */ 0, | |
717 | /* .gpr_size = */ 4, | |
718 | /* .xr_size = */ 4, | |
719 | /* .pc_offset = */ 128, | |
720 | /* .ps_offset = */ 132, | |
721 | /* .cr_offset = */ 152, | |
722 | /* .lr_offset = */ 144, | |
723 | /* .ctr_offset = */ 140, | |
724 | /* .xer_offset = */ 148, | |
725 | /* .mq_offset = */ 156, | |
726 | ||
727 | /* Floating-point registers. */ | |
728 | /* .f0_offset = */ 0, | |
729 | /* .fpscr_offset = */ 256, | |
730 | /* .fpscr_size = */ 8, | |
731 | ||
732 | /* AltiVec registers. */ | |
733 | /* .vr0_offset = */ 0, | |
06caf7d2 CES |
734 | /* .vscr_offset = */ 512 + 12, |
735 | /* .vrsave_offset = */ 528 | |
f2db237a | 736 | }; |
f9be684a | 737 | |
f2db237a AM |
738 | static const struct ppc_reg_offsets ppc64_linux_reg_offsets = |
739 | { | |
740 | /* General-purpose registers. */ | |
741 | /* .r0_offset = */ 0, | |
742 | /* .gpr_size = */ 8, | |
743 | /* .xr_size = */ 8, | |
744 | /* .pc_offset = */ 256, | |
745 | /* .ps_offset = */ 264, | |
746 | /* .cr_offset = */ 304, | |
747 | /* .lr_offset = */ 288, | |
748 | /* .ctr_offset = */ 280, | |
749 | /* .xer_offset = */ 296, | |
750 | /* .mq_offset = */ 312, | |
751 | ||
752 | /* Floating-point registers. */ | |
753 | /* .f0_offset = */ 0, | |
754 | /* .fpscr_offset = */ 256, | |
755 | /* .fpscr_size = */ 8, | |
756 | ||
757 | /* AltiVec registers. */ | |
758 | /* .vr0_offset = */ 0, | |
06caf7d2 CES |
759 | /* .vscr_offset = */ 512 + 12, |
760 | /* .vrsave_offset = */ 528 | |
f2db237a | 761 | }; |
2fda4977 | 762 | |
f2db237a AM |
763 | static const struct regset ppc32_linux_gregset = { |
764 | &ppc32_linux_reg_offsets, | |
7284e1be | 765 | ppc_linux_supply_gregset, |
f2db237a AM |
766 | ppc_linux_collect_gregset, |
767 | NULL | |
f9be684a AC |
768 | }; |
769 | ||
f2db237a AM |
770 | static const struct regset ppc64_linux_gregset = { |
771 | &ppc64_linux_reg_offsets, | |
7284e1be | 772 | ppc_linux_supply_gregset, |
f2db237a AM |
773 | ppc_linux_collect_gregset, |
774 | NULL | |
775 | }; | |
f9be684a | 776 | |
f2db237a AM |
777 | static const struct regset ppc32_linux_fpregset = { |
778 | &ppc32_linux_reg_offsets, | |
779 | ppc_supply_fpregset, | |
780 | ppc_collect_fpregset, | |
781 | NULL | |
f9be684a AC |
782 | }; |
783 | ||
06caf7d2 CES |
784 | static const struct regset ppc32_linux_vrregset = { |
785 | &ppc32_linux_reg_offsets, | |
786 | ppc_supply_vrregset, | |
787 | ppc_collect_vrregset, | |
788 | NULL | |
789 | }; | |
790 | ||
604c2f83 LM |
791 | static const struct regset ppc32_linux_vsxregset = { |
792 | &ppc32_linux_reg_offsets, | |
793 | ppc_supply_vsxregset, | |
794 | ppc_collect_vsxregset, | |
795 | NULL | |
796 | }; | |
797 | ||
f2db237a AM |
798 | const struct regset * |
799 | ppc_linux_gregset (int wordsize) | |
2fda4977 | 800 | { |
f2db237a | 801 | return wordsize == 8 ? &ppc64_linux_gregset : &ppc32_linux_gregset; |
2fda4977 DJ |
802 | } |
803 | ||
f2db237a AM |
804 | const struct regset * |
805 | ppc_linux_fpregset (void) | |
806 | { | |
807 | return &ppc32_linux_fpregset; | |
808 | } | |
2fda4977 | 809 | |
f9be684a AC |
810 | static const struct regset * |
811 | ppc_linux_regset_from_core_section (struct gdbarch *core_arch, | |
812 | const char *sect_name, size_t sect_size) | |
2fda4977 | 813 | { |
f9be684a AC |
814 | struct gdbarch_tdep *tdep = gdbarch_tdep (core_arch); |
815 | if (strcmp (sect_name, ".reg") == 0) | |
2fda4977 | 816 | { |
f9be684a AC |
817 | if (tdep->wordsize == 4) |
818 | return &ppc32_linux_gregset; | |
2fda4977 | 819 | else |
f9be684a | 820 | return &ppc64_linux_gregset; |
2fda4977 | 821 | } |
f9be684a | 822 | if (strcmp (sect_name, ".reg2") == 0) |
f2db237a | 823 | return &ppc32_linux_fpregset; |
06caf7d2 CES |
824 | if (strcmp (sect_name, ".reg-ppc-vmx") == 0) |
825 | return &ppc32_linux_vrregset; | |
604c2f83 LM |
826 | if (strcmp (sect_name, ".reg-ppc-vsx") == 0) |
827 | return &ppc32_linux_vsxregset; | |
f9be684a | 828 | return NULL; |
2fda4977 DJ |
829 | } |
830 | ||
a8f60bfc | 831 | static void |
5366653e | 832 | ppc_linux_sigtramp_cache (struct frame_info *this_frame, |
a8f60bfc AC |
833 | struct trad_frame_cache *this_cache, |
834 | CORE_ADDR func, LONGEST offset, | |
835 | int bias) | |
836 | { | |
837 | CORE_ADDR base; | |
838 | CORE_ADDR regs; | |
839 | CORE_ADDR gpregs; | |
840 | CORE_ADDR fpregs; | |
841 | int i; | |
5366653e | 842 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8f60bfc AC |
843 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
844 | ||
5366653e DJ |
845 | base = get_frame_register_unsigned (this_frame, |
846 | gdbarch_sp_regnum (gdbarch)); | |
847 | if (bias > 0 && get_frame_pc (this_frame) != func) | |
a8f60bfc AC |
848 | /* See below, some signal trampolines increment the stack as their |
849 | first instruction, need to compensate for that. */ | |
850 | base -= bias; | |
851 | ||
852 | /* Find the address of the register buffer pointer. */ | |
853 | regs = base + offset; | |
854 | /* Use that to find the address of the corresponding register | |
855 | buffers. */ | |
856 | gpregs = read_memory_unsigned_integer (regs, tdep->wordsize); | |
857 | fpregs = gpregs + 48 * tdep->wordsize; | |
858 | ||
859 | /* General purpose. */ | |
860 | for (i = 0; i < 32; i++) | |
861 | { | |
862 | int regnum = i + tdep->ppc_gp0_regnum; | |
863 | trad_frame_set_reg_addr (this_cache, regnum, gpregs + i * tdep->wordsize); | |
864 | } | |
3e8c568d | 865 | trad_frame_set_reg_addr (this_cache, |
40a6adc1 | 866 | gdbarch_pc_regnum (gdbarch), |
3e8c568d | 867 | gpregs + 32 * tdep->wordsize); |
a8f60bfc AC |
868 | trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, |
869 | gpregs + 35 * tdep->wordsize); | |
870 | trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, | |
871 | gpregs + 36 * tdep->wordsize); | |
872 | trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, | |
873 | gpregs + 37 * tdep->wordsize); | |
874 | trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, | |
875 | gpregs + 38 * tdep->wordsize); | |
876 | ||
7284e1be UW |
877 | if (ppc_linux_trap_reg_p (gdbarch)) |
878 | { | |
879 | trad_frame_set_reg_addr (this_cache, PPC_ORIG_R3_REGNUM, | |
880 | gpregs + 34 * tdep->wordsize); | |
881 | trad_frame_set_reg_addr (this_cache, PPC_TRAP_REGNUM, | |
882 | gpregs + 40 * tdep->wordsize); | |
883 | } | |
884 | ||
60f140f9 PG |
885 | if (ppc_floating_point_unit_p (gdbarch)) |
886 | { | |
887 | /* Floating point registers. */ | |
888 | for (i = 0; i < 32; i++) | |
889 | { | |
40a6adc1 | 890 | int regnum = i + gdbarch_fp0_regnum (gdbarch); |
60f140f9 PG |
891 | trad_frame_set_reg_addr (this_cache, regnum, |
892 | fpregs + i * tdep->wordsize); | |
893 | } | |
894 | trad_frame_set_reg_addr (this_cache, tdep->ppc_fpscr_regnum, | |
4019046a | 895 | fpregs + 32 * tdep->wordsize); |
60f140f9 | 896 | } |
a8f60bfc AC |
897 | trad_frame_set_id (this_cache, frame_id_build (base, func)); |
898 | } | |
899 | ||
900 | static void | |
901 | ppc32_linux_sigaction_cache_init (const struct tramp_frame *self, | |
5366653e | 902 | struct frame_info *this_frame, |
a8f60bfc AC |
903 | struct trad_frame_cache *this_cache, |
904 | CORE_ADDR func) | |
905 | { | |
5366653e | 906 | ppc_linux_sigtramp_cache (this_frame, this_cache, func, |
a8f60bfc AC |
907 | 0xd0 /* Offset to ucontext_t. */ |
908 | + 0x30 /* Offset to .reg. */, | |
909 | 0); | |
910 | } | |
911 | ||
912 | static void | |
913 | ppc64_linux_sigaction_cache_init (const struct tramp_frame *self, | |
5366653e | 914 | struct frame_info *this_frame, |
a8f60bfc AC |
915 | struct trad_frame_cache *this_cache, |
916 | CORE_ADDR func) | |
917 | { | |
5366653e | 918 | ppc_linux_sigtramp_cache (this_frame, this_cache, func, |
a8f60bfc AC |
919 | 0x80 /* Offset to ucontext_t. */ |
920 | + 0xe0 /* Offset to .reg. */, | |
921 | 128); | |
922 | } | |
923 | ||
924 | static void | |
925 | ppc32_linux_sighandler_cache_init (const struct tramp_frame *self, | |
5366653e | 926 | struct frame_info *this_frame, |
a8f60bfc AC |
927 | struct trad_frame_cache *this_cache, |
928 | CORE_ADDR func) | |
929 | { | |
5366653e | 930 | ppc_linux_sigtramp_cache (this_frame, this_cache, func, |
a8f60bfc AC |
931 | 0x40 /* Offset to ucontext_t. */ |
932 | + 0x1c /* Offset to .reg. */, | |
933 | 0); | |
934 | } | |
935 | ||
936 | static void | |
937 | ppc64_linux_sighandler_cache_init (const struct tramp_frame *self, | |
5366653e | 938 | struct frame_info *this_frame, |
a8f60bfc AC |
939 | struct trad_frame_cache *this_cache, |
940 | CORE_ADDR func) | |
941 | { | |
5366653e | 942 | ppc_linux_sigtramp_cache (this_frame, this_cache, func, |
a8f60bfc AC |
943 | 0x80 /* Offset to struct sigcontext. */ |
944 | + 0x38 /* Offset to .reg. */, | |
945 | 128); | |
946 | } | |
947 | ||
948 | static struct tramp_frame ppc32_linux_sigaction_tramp_frame = { | |
949 | SIGTRAMP_FRAME, | |
950 | 4, | |
951 | { | |
952 | { 0x380000ac, -1 }, /* li r0, 172 */ | |
953 | { 0x44000002, -1 }, /* sc */ | |
954 | { TRAMP_SENTINEL_INSN }, | |
955 | }, | |
956 | ppc32_linux_sigaction_cache_init | |
957 | }; | |
958 | static struct tramp_frame ppc64_linux_sigaction_tramp_frame = { | |
959 | SIGTRAMP_FRAME, | |
960 | 4, | |
961 | { | |
962 | { 0x38210080, -1 }, /* addi r1,r1,128 */ | |
963 | { 0x380000ac, -1 }, /* li r0, 172 */ | |
964 | { 0x44000002, -1 }, /* sc */ | |
965 | { TRAMP_SENTINEL_INSN }, | |
966 | }, | |
967 | ppc64_linux_sigaction_cache_init | |
968 | }; | |
969 | static struct tramp_frame ppc32_linux_sighandler_tramp_frame = { | |
970 | SIGTRAMP_FRAME, | |
971 | 4, | |
972 | { | |
973 | { 0x38000077, -1 }, /* li r0,119 */ | |
974 | { 0x44000002, -1 }, /* sc */ | |
975 | { TRAMP_SENTINEL_INSN }, | |
976 | }, | |
977 | ppc32_linux_sighandler_cache_init | |
978 | }; | |
979 | static struct tramp_frame ppc64_linux_sighandler_tramp_frame = { | |
980 | SIGTRAMP_FRAME, | |
981 | 4, | |
982 | { | |
983 | { 0x38210080, -1 }, /* addi r1,r1,128 */ | |
984 | { 0x38000077, -1 }, /* li r0,119 */ | |
985 | { 0x44000002, -1 }, /* sc */ | |
986 | { TRAMP_SENTINEL_INSN }, | |
987 | }, | |
988 | ppc64_linux_sighandler_cache_init | |
989 | }; | |
990 | ||
7284e1be UW |
991 | |
992 | /* Return 1 if PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM are usable. */ | |
993 | int | |
994 | ppc_linux_trap_reg_p (struct gdbarch *gdbarch) | |
995 | { | |
996 | /* If we do not have a target description with registers, then | |
997 | the special registers will not be included in the register set. */ | |
998 | if (!tdesc_has_registers (gdbarch_target_desc (gdbarch))) | |
999 | return 0; | |
1000 | ||
1001 | /* If we do, then it is safe to check the size. */ | |
1002 | return register_size (gdbarch, PPC_ORIG_R3_REGNUM) > 0 | |
1003 | && register_size (gdbarch, PPC_TRAP_REGNUM) > 0; | |
1004 | } | |
1005 | ||
1006 | static void | |
1007 | ppc_linux_write_pc (struct regcache *regcache, CORE_ADDR pc) | |
1008 | { | |
1009 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
1010 | ||
1011 | regcache_cooked_write_unsigned (regcache, gdbarch_pc_regnum (gdbarch), pc); | |
1012 | ||
1013 | /* Set special TRAP register to -1 to prevent the kernel from | |
1014 | messing with the PC we just installed, if we happen to be | |
1015 | within an interrupted system call that the kernel wants to | |
1016 | restart. | |
1017 | ||
1018 | Note that after we return from the dummy call, the TRAP and | |
1019 | ORIG_R3 registers will be automatically restored, and the | |
1020 | kernel continues to restart the system call at this point. */ | |
1021 | if (ppc_linux_trap_reg_p (gdbarch)) | |
1022 | regcache_cooked_write_unsigned (regcache, PPC_TRAP_REGNUM, -1); | |
1023 | } | |
1024 | ||
1025 | static const struct target_desc * | |
1026 | ppc_linux_core_read_description (struct gdbarch *gdbarch, | |
1027 | struct target_ops *target, | |
1028 | bfd *abfd) | |
1029 | { | |
1030 | asection *altivec = bfd_get_section_by_name (abfd, ".reg-ppc-vmx"); | |
604c2f83 | 1031 | asection *vsx = bfd_get_section_by_name (abfd, ".reg-ppc-vsx"); |
7284e1be UW |
1032 | asection *section = bfd_get_section_by_name (abfd, ".reg"); |
1033 | if (! section) | |
1034 | return NULL; | |
1035 | ||
1036 | switch (bfd_section_size (abfd, section)) | |
1037 | { | |
1038 | case 48 * 4: | |
604c2f83 LM |
1039 | if (vsx) |
1040 | return tdesc_powerpc_vsx32l; | |
1041 | else if (altivec) | |
1042 | return tdesc_powerpc_altivec32l; | |
1043 | else | |
1044 | return tdesc_powerpc_32l; | |
7284e1be UW |
1045 | |
1046 | case 48 * 8: | |
604c2f83 LM |
1047 | if (vsx) |
1048 | return tdesc_powerpc_vsx64l; | |
1049 | else if (altivec) | |
1050 | return tdesc_powerpc_altivec64l; | |
1051 | else | |
1052 | return tdesc_powerpc_64l; | |
7284e1be UW |
1053 | |
1054 | default: | |
1055 | return NULL; | |
1056 | } | |
1057 | } | |
1058 | ||
7b112f9c JT |
1059 | static void |
1060 | ppc_linux_init_abi (struct gdbarch_info info, | |
1061 | struct gdbarch *gdbarch) | |
1062 | { | |
1063 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
7284e1be | 1064 | struct tdesc_arch_data *tdesc_data = (void *) info.tdep_info; |
7b112f9c | 1065 | |
b14d30e1 JM |
1066 | /* PPC GNU/Linux uses either 64-bit or 128-bit long doubles; where |
1067 | 128-bit, they are IBM long double, not IEEE quad long double as | |
1068 | in the System V ABI PowerPC Processor Supplement. We can safely | |
1069 | let them default to 128-bit, since the debug info will give the | |
1070 | size of type actually used in each case. */ | |
1071 | set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT); | |
1072 | set_gdbarch_long_double_format (gdbarch, floatformats_ibm_long_double); | |
0598a43c | 1073 | |
7284e1be UW |
1074 | /* Handle inferior calls during interrupted system calls. */ |
1075 | set_gdbarch_write_pc (gdbarch, ppc_linux_write_pc); | |
1076 | ||
7b112f9c JT |
1077 | if (tdep->wordsize == 4) |
1078 | { | |
b9ff3018 AC |
1079 | /* Until November 2001, gcc did not comply with the 32 bit SysV |
1080 | R4 ABI requirement that structures less than or equal to 8 | |
1081 | bytes should be returned in registers. Instead GCC was using | |
1082 | the the AIX/PowerOpen ABI - everything returned in memory | |
1083 | (well ignoring vectors that is). When this was corrected, it | |
1084 | wasn't fixed for GNU/Linux native platform. Use the | |
1085 | PowerOpen struct convention. */ | |
05580c65 | 1086 | set_gdbarch_return_value (gdbarch, ppc_linux_return_value); |
b9ff3018 | 1087 | |
7b112f9c JT |
1088 | set_gdbarch_memory_remove_breakpoint (gdbarch, |
1089 | ppc_linux_memory_remove_breakpoint); | |
61a65099 | 1090 | |
f470a70a | 1091 | /* Shared library handling. */ |
8526f328 | 1092 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
7b112f9c | 1093 | set_solib_svr4_fetch_link_map_offsets |
76a9d10f | 1094 | (gdbarch, svr4_ilp32_fetch_link_map_offsets); |
a8f60bfc AC |
1095 | |
1096 | /* Trampolines. */ | |
1097 | tramp_frame_prepend_unwinder (gdbarch, &ppc32_linux_sigaction_tramp_frame); | |
1098 | tramp_frame_prepend_unwinder (gdbarch, &ppc32_linux_sighandler_tramp_frame); | |
7b112f9c | 1099 | } |
f470a70a JB |
1100 | |
1101 | if (tdep->wordsize == 8) | |
1102 | { | |
00d5f93a UW |
1103 | /* Handle PPC GNU/Linux 64-bit function pointers (which are really |
1104 | function descriptors). */ | |
1105 | set_gdbarch_convert_from_func_ptr_addr | |
1106 | (gdbarch, ppc64_linux_convert_from_func_ptr_addr); | |
1107 | ||
fb318ff7 | 1108 | /* Shared library handling. */ |
2bbe3cc1 | 1109 | set_gdbarch_skip_trampoline_code (gdbarch, ppc64_skip_trampoline_code); |
fb318ff7 DJ |
1110 | set_solib_svr4_fetch_link_map_offsets |
1111 | (gdbarch, svr4_lp64_fetch_link_map_offsets); | |
1112 | ||
a8f60bfc AC |
1113 | /* Trampolines. */ |
1114 | tramp_frame_prepend_unwinder (gdbarch, &ppc64_linux_sigaction_tramp_frame); | |
1115 | tramp_frame_prepend_unwinder (gdbarch, &ppc64_linux_sighandler_tramp_frame); | |
f470a70a | 1116 | } |
f9be684a | 1117 | set_gdbarch_regset_from_core_section (gdbarch, ppc_linux_regset_from_core_section); |
7284e1be | 1118 | set_gdbarch_core_read_description (gdbarch, ppc_linux_core_read_description); |
b2756930 | 1119 | |
17ea7499 | 1120 | /* Supported register sections. */ |
6207416c LM |
1121 | if (tdesc_find_feature (info.target_desc, |
1122 | "org.gnu.gdb.power.vsx")) | |
1123 | set_gdbarch_core_regset_sections (gdbarch, ppc_linux_vsx_regset_sections); | |
1124 | else if (tdesc_find_feature (info.target_desc, | |
1125 | "org.gnu.gdb.power.altivec")) | |
1126 | set_gdbarch_core_regset_sections (gdbarch, ppc_linux_vmx_regset_sections); | |
1127 | else | |
1128 | set_gdbarch_core_regset_sections (gdbarch, ppc_linux_fp_regset_sections); | |
17ea7499 | 1129 | |
b2756930 KB |
1130 | /* Enable TLS support. */ |
1131 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | |
1132 | svr4_fetch_objfile_link_map); | |
7284e1be UW |
1133 | |
1134 | if (tdesc_data) | |
1135 | { | |
1136 | const struct tdesc_feature *feature; | |
1137 | ||
1138 | /* If we have target-described registers, then we can safely | |
1139 | reserve a number for PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM | |
1140 | (whether they are described or not). */ | |
1141 | gdb_assert (gdbarch_num_regs (gdbarch) <= PPC_ORIG_R3_REGNUM); | |
1142 | set_gdbarch_num_regs (gdbarch, PPC_TRAP_REGNUM + 1); | |
1143 | ||
1144 | /* If they are present, then assign them to the reserved number. */ | |
1145 | feature = tdesc_find_feature (info.target_desc, | |
1146 | "org.gnu.gdb.power.linux"); | |
1147 | if (feature != NULL) | |
1148 | { | |
1149 | tdesc_numbered_register (feature, tdesc_data, | |
1150 | PPC_ORIG_R3_REGNUM, "orig_r3"); | |
1151 | tdesc_numbered_register (feature, tdesc_data, | |
1152 | PPC_TRAP_REGNUM, "trap"); | |
1153 | } | |
1154 | } | |
7b112f9c JT |
1155 | } |
1156 | ||
1157 | void | |
1158 | _initialize_ppc_linux_tdep (void) | |
1159 | { | |
0a0a4ac3 AC |
1160 | /* Register for all sub-familes of the POWER/PowerPC: 32-bit and |
1161 | 64-bit PowerPC, and the older rs6k. */ | |
1162 | gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc, GDB_OSABI_LINUX, | |
1163 | ppc_linux_init_abi); | |
1164 | gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc64, GDB_OSABI_LINUX, | |
1165 | ppc_linux_init_abi); | |
1166 | gdbarch_register_osabi (bfd_arch_rs6000, bfd_mach_rs6k, GDB_OSABI_LINUX, | |
1167 | ppc_linux_init_abi); | |
7284e1be UW |
1168 | |
1169 | /* Initialize the Linux target descriptions. */ | |
1170 | initialize_tdesc_powerpc_32l (); | |
1171 | initialize_tdesc_powerpc_altivec32l (); | |
604c2f83 | 1172 | initialize_tdesc_powerpc_vsx32l (); |
7284e1be UW |
1173 | initialize_tdesc_powerpc_64l (); |
1174 | initialize_tdesc_powerpc_altivec64l (); | |
604c2f83 | 1175 | initialize_tdesc_powerpc_vsx64l (); |
7284e1be | 1176 | initialize_tdesc_powerpc_e500l (); |
7b112f9c | 1177 | } |