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c877c8e6 | 1 | /* Target-dependent code for GDB, the GNU debugger. |
4e052eda | 2 | |
42a4f53d | 3 | Copyright (C) 1986-2019 Free Software Foundation, Inc. |
c877c8e6 KB |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
c877c8e6 KB |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
c877c8e6 KB |
19 | |
20 | #include "defs.h" | |
21 | #include "frame.h" | |
22 | #include "inferior.h" | |
23 | #include "symtab.h" | |
24 | #include "target.h" | |
25 | #include "gdbcore.h" | |
26 | #include "gdbcmd.h" | |
27 | #include "symfile.h" | |
28 | #include "objfiles.h" | |
4e052eda | 29 | #include "regcache.h" |
fd0407d6 | 30 | #include "value.h" |
4be87837 | 31 | #include "osabi.h" |
f9be684a | 32 | #include "regset.h" |
6ded7999 | 33 | #include "solib-svr4.h" |
85e747d2 | 34 | #include "solib-spu.h" |
cc5f0d61 UW |
35 | #include "solib.h" |
36 | #include "solist.h" | |
9aa1e687 | 37 | #include "ppc-tdep.h" |
d78489bf | 38 | #include "ppc64-tdep.h" |
7284e1be | 39 | #include "ppc-linux-tdep.h" |
bd64614e PFC |
40 | #include "arch/ppc-linux-common.h" |
41 | #include "arch/ppc-linux-tdesc.h" | |
5d853008 | 42 | #include "glibc-tdep.h" |
61a65099 KB |
43 | #include "trad-frame.h" |
44 | #include "frame-unwind.h" | |
a8f60bfc | 45 | #include "tramp-frame.h" |
76727919 | 46 | #include "observable.h" |
85e747d2 UW |
47 | #include "auxv.h" |
48 | #include "elf/common.h" | |
591a12a1 | 49 | #include "elf/ppc64.h" |
cc5f0d61 UW |
50 | #include "arch-utils.h" |
51 | #include "spu-tdep.h" | |
a96d9b2e | 52 | #include "xml-syscall.h" |
a5ee0f0c | 53 | #include "linux-tdep.h" |
b4cdae6f WW |
54 | #include "linux-record.h" |
55 | #include "record-full.h" | |
cf90fd9a | 56 | #include "infrun.h" |
9aa1e687 | 57 | |
55aa24fb SDJ |
58 | #include "stap-probe.h" |
59 | #include "ax.h" | |
60 | #include "ax-gdb.h" | |
61 | #include "cli/cli-utils.h" | |
62 | #include "parser-defs.h" | |
63 | #include "user-regs.h" | |
64 | #include <ctype.h> | |
a2f63b2e | 65 | #include "elf-bfd.h" |
55aa24fb | 66 | |
7284e1be UW |
67 | #include "features/rs6000/powerpc-32l.c" |
68 | #include "features/rs6000/powerpc-altivec32l.c" | |
f4d9bade | 69 | #include "features/rs6000/powerpc-cell32l.c" |
604c2f83 | 70 | #include "features/rs6000/powerpc-vsx32l.c" |
69abc51c TJB |
71 | #include "features/rs6000/powerpc-isa205-32l.c" |
72 | #include "features/rs6000/powerpc-isa205-altivec32l.c" | |
73 | #include "features/rs6000/powerpc-isa205-vsx32l.c" | |
7ca18ed6 | 74 | #include "features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.c" |
f2cf6173 | 75 | #include "features/rs6000/powerpc-isa207-vsx32l.c" |
8d619c01 | 76 | #include "features/rs6000/powerpc-isa207-htm-vsx32l.c" |
7284e1be UW |
77 | #include "features/rs6000/powerpc-64l.c" |
78 | #include "features/rs6000/powerpc-altivec64l.c" | |
f4d9bade | 79 | #include "features/rs6000/powerpc-cell64l.c" |
604c2f83 | 80 | #include "features/rs6000/powerpc-vsx64l.c" |
69abc51c TJB |
81 | #include "features/rs6000/powerpc-isa205-64l.c" |
82 | #include "features/rs6000/powerpc-isa205-altivec64l.c" | |
83 | #include "features/rs6000/powerpc-isa205-vsx64l.c" | |
7ca18ed6 | 84 | #include "features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.c" |
f2cf6173 | 85 | #include "features/rs6000/powerpc-isa207-vsx64l.c" |
8d619c01 | 86 | #include "features/rs6000/powerpc-isa207-htm-vsx64l.c" |
7284e1be UW |
87 | #include "features/rs6000/powerpc-e500l.c" |
88 | ||
5d853008 ME |
89 | /* Shared library operations for PowerPC-Linux. */ |
90 | static struct target_so_ops powerpc_so_ops; | |
91 | ||
a96d9b2e SDJ |
92 | /* The syscall's XML filename for PPC and PPC64. */ |
93 | #define XML_SYSCALL_FILENAME_PPC "syscalls/ppc-linux.xml" | |
94 | #define XML_SYSCALL_FILENAME_PPC64 "syscalls/ppc64-linux.xml" | |
c877c8e6 | 95 | |
122a33de KB |
96 | /* ppc_linux_memory_remove_breakpoints attempts to remove a breakpoint |
97 | in much the same fashion as memory_remove_breakpoint in mem-break.c, | |
98 | but is careful not to write back the previous contents if the code | |
99 | in question has changed in between inserting the breakpoint and | |
100 | removing it. | |
101 | ||
102 | Here is the problem that we're trying to solve... | |
103 | ||
104 | Once upon a time, before introducing this function to remove | |
105 | breakpoints from the inferior, setting a breakpoint on a shared | |
106 | library function prior to running the program would not work | |
107 | properly. In order to understand the problem, it is first | |
108 | necessary to understand a little bit about dynamic linking on | |
109 | this platform. | |
110 | ||
111 | A call to a shared library function is accomplished via a bl | |
112 | (branch-and-link) instruction whose branch target is an entry | |
113 | in the procedure linkage table (PLT). The PLT in the object | |
114 | file is uninitialized. To gdb, prior to running the program, the | |
115 | entries in the PLT are all zeros. | |
116 | ||
117 | Once the program starts running, the shared libraries are loaded | |
118 | and the procedure linkage table is initialized, but the entries in | |
119 | the table are not (necessarily) resolved. Once a function is | |
120 | actually called, the code in the PLT is hit and the function is | |
121 | resolved. In order to better illustrate this, an example is in | |
122 | order; the following example is from the gdb testsuite. | |
123 | ||
124 | We start the program shmain. | |
125 | ||
126 | [kev@arroyo testsuite]$ ../gdb gdb.base/shmain | |
127 | [...] | |
128 | ||
129 | We place two breakpoints, one on shr1 and the other on main. | |
130 | ||
131 | (gdb) b shr1 | |
132 | Breakpoint 1 at 0x100409d4 | |
133 | (gdb) b main | |
134 | Breakpoint 2 at 0x100006a0: file gdb.base/shmain.c, line 44. | |
135 | ||
136 | Examine the instruction (and the immediatly following instruction) | |
137 | upon which the breakpoint was placed. Note that the PLT entry | |
138 | for shr1 contains zeros. | |
139 | ||
140 | (gdb) x/2i 0x100409d4 | |
141 | 0x100409d4 <shr1>: .long 0x0 | |
142 | 0x100409d8 <shr1+4>: .long 0x0 | |
143 | ||
144 | Now run 'til main. | |
145 | ||
146 | (gdb) r | |
147 | Starting program: gdb.base/shmain | |
148 | Breakpoint 1 at 0xffaf790: file gdb.base/shr1.c, line 19. | |
149 | ||
150 | Breakpoint 2, main () | |
151 | at gdb.base/shmain.c:44 | |
152 | 44 g = 1; | |
153 | ||
154 | Examine the PLT again. Note that the loading of the shared | |
155 | library has initialized the PLT to code which loads a constant | |
156 | (which I think is an index into the GOT) into r11 and then | |
157 | branchs a short distance to the code which actually does the | |
158 | resolving. | |
159 | ||
160 | (gdb) x/2i 0x100409d4 | |
161 | 0x100409d4 <shr1>: li r11,4 | |
162 | 0x100409d8 <shr1+4>: b 0x10040984 <sg+4> | |
163 | (gdb) c | |
164 | Continuing. | |
165 | ||
166 | Breakpoint 1, shr1 (x=1) | |
167 | at gdb.base/shr1.c:19 | |
168 | 19 l = 1; | |
169 | ||
170 | Now we've hit the breakpoint at shr1. (The breakpoint was | |
171 | reset from the PLT entry to the actual shr1 function after the | |
172 | shared library was loaded.) Note that the PLT entry has been | |
0df8b418 | 173 | resolved to contain a branch that takes us directly to shr1. |
122a33de KB |
174 | (The real one, not the PLT entry.) |
175 | ||
176 | (gdb) x/2i 0x100409d4 | |
177 | 0x100409d4 <shr1>: b 0xffaf76c <shr1> | |
178 | 0x100409d8 <shr1+4>: b 0x10040984 <sg+4> | |
179 | ||
180 | The thing to note here is that the PLT entry for shr1 has been | |
181 | changed twice. | |
182 | ||
183 | Now the problem should be obvious. GDB places a breakpoint (a | |
0df8b418 | 184 | trap instruction) on the zero value of the PLT entry for shr1. |
122a33de KB |
185 | Later on, after the shared library had been loaded and the PLT |
186 | initialized, GDB gets a signal indicating this fact and attempts | |
187 | (as it always does when it stops) to remove all the breakpoints. | |
188 | ||
189 | The breakpoint removal was causing the former contents (a zero | |
190 | word) to be written back to the now initialized PLT entry thus | |
191 | destroying a portion of the initialization that had occurred only a | |
192 | short time ago. When execution continued, the zero word would be | |
766062f6 | 193 | executed as an instruction an illegal instruction trap was |
122a33de KB |
194 | generated instead. (0 is not a legal instruction.) |
195 | ||
196 | The fix for this problem was fairly straightforward. The function | |
197 | memory_remove_breakpoint from mem-break.c was copied to this file, | |
198 | modified slightly, and renamed to ppc_linux_memory_remove_breakpoint. | |
199 | In tm-linux.h, MEMORY_REMOVE_BREAKPOINT is defined to call this new | |
200 | function. | |
201 | ||
202 | The differences between ppc_linux_memory_remove_breakpoint () and | |
203 | memory_remove_breakpoint () are minor. All that the former does | |
204 | that the latter does not is check to make sure that the breakpoint | |
205 | location actually contains a breakpoint (trap instruction) prior | |
206 | to attempting to write back the old contents. If it does contain | |
0df8b418 | 207 | a trap instruction, we allow the old contents to be written back. |
122a33de KB |
208 | Otherwise, we silently do nothing. |
209 | ||
210 | The big question is whether memory_remove_breakpoint () should be | |
211 | changed to have the same functionality. The downside is that more | |
212 | traffic is generated for remote targets since we'll have an extra | |
213 | fetch of a memory word each time a breakpoint is removed. | |
214 | ||
215 | For the time being, we'll leave this self-modifying-code-friendly | |
216 | version in ppc-linux-tdep.c, but it ought to be migrated somewhere | |
217 | else in the event that some other platform has similar needs with | |
218 | regard to removing breakpoints in some potentially self modifying | |
219 | code. */ | |
63807e1d | 220 | static int |
ae4b2284 MD |
221 | ppc_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, |
222 | struct bp_target_info *bp_tgt) | |
482ca3f5 | 223 | { |
0d5ed153 | 224 | CORE_ADDR addr = bp_tgt->reqstd_address; |
f4f9705a | 225 | const unsigned char *bp; |
482ca3f5 KB |
226 | int val; |
227 | int bplen; | |
50fd1280 | 228 | gdb_byte old_contents[BREAKPOINT_MAX]; |
482ca3f5 KB |
229 | |
230 | /* Determine appropriate breakpoint contents and size for this address. */ | |
ae4b2284 | 231 | bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); |
482ca3f5 | 232 | |
8defab1a | 233 | /* Make sure we see the memory breakpoints. */ |
cb85b21b TT |
234 | scoped_restore restore_memory |
235 | = make_scoped_restore_show_memory_breakpoints (1); | |
482ca3f5 KB |
236 | val = target_read_memory (addr, old_contents, bplen); |
237 | ||
238 | /* If our breakpoint is no longer at the address, this means that the | |
239 | program modified the code on us, so it is wrong to put back the | |
0df8b418 | 240 | old value. */ |
482ca3f5 | 241 | if (val == 0 && memcmp (bp, old_contents, bplen) == 0) |
dd110abf | 242 | val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen); |
482ca3f5 KB |
243 | |
244 | return val; | |
245 | } | |
6ded7999 | 246 | |
b9ff3018 AC |
247 | /* For historic reasons, PPC 32 GNU/Linux follows PowerOpen rather |
248 | than the 32 bit SYSV R4 ABI structure return convention - all | |
249 | structures, no matter their size, are put in memory. Vectors, | |
250 | which were added later, do get returned in a register though. */ | |
251 | ||
05580c65 | 252 | static enum return_value_convention |
6a3a010b | 253 | ppc_linux_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 CV |
254 | struct type *valtype, struct regcache *regcache, |
255 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
b9ff3018 | 256 | { |
05580c65 AC |
257 | if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT |
258 | || TYPE_CODE (valtype) == TYPE_CODE_UNION) | |
259 | && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8) | |
260 | && TYPE_VECTOR (valtype))) | |
261 | return RETURN_VALUE_STRUCT_CONVENTION; | |
262 | else | |
6a3a010b | 263 | return ppc_sysv_abi_return_value (gdbarch, function, valtype, regcache, |
c055b101 | 264 | readbuf, writebuf); |
b9ff3018 AC |
265 | } |
266 | ||
7433498b AM |
267 | /* PLT stub in an executable. */ |
268 | static const struct ppc_insn_pattern powerpc32_plt_stub[] = | |
5d853008 ME |
269 | { |
270 | { 0xffff0000, 0x3d600000, 0 }, /* lis r11, xxxx */ | |
271 | { 0xffff0000, 0x816b0000, 0 }, /* lwz r11, xxxx(r11) */ | |
272 | { 0xffffffff, 0x7d6903a6, 0 }, /* mtctr r11 */ | |
273 | { 0xffffffff, 0x4e800420, 0 }, /* bctr */ | |
274 | { 0, 0, 0 } | |
275 | }; | |
276 | ||
7433498b AM |
277 | /* PLT stubs in a shared library or PIE. |
278 | The first variant is used when the PLT entry is within +/-32k of | |
279 | the GOT pointer (r30). */ | |
280 | static const struct ppc_insn_pattern powerpc32_plt_stub_so_1[] = | |
5d853008 ME |
281 | { |
282 | { 0xffff0000, 0x817e0000, 0 }, /* lwz r11, xxxx(r30) */ | |
283 | { 0xffffffff, 0x7d6903a6, 0 }, /* mtctr r11 */ | |
284 | { 0xffffffff, 0x4e800420, 0 }, /* bctr */ | |
5d853008 ME |
285 | { 0, 0, 0 } |
286 | }; | |
7433498b AM |
287 | |
288 | /* The second variant is used when the PLT entry is more than +/-32k | |
289 | from the GOT pointer (r30). */ | |
290 | static const struct ppc_insn_pattern powerpc32_plt_stub_so_2[] = | |
291 | { | |
292 | { 0xffff0000, 0x3d7e0000, 0 }, /* addis r11, r30, xxxx */ | |
293 | { 0xffff0000, 0x816b0000, 0 }, /* lwz r11, xxxx(r11) */ | |
294 | { 0xffffffff, 0x7d6903a6, 0 }, /* mtctr r11 */ | |
295 | { 0xffffffff, 0x4e800420, 0 }, /* bctr */ | |
296 | { 0, 0, 0 } | |
297 | }; | |
298 | ||
299 | /* The max number of insns we check using ppc_insns_match_pattern. */ | |
300 | #define POWERPC32_PLT_CHECK_LEN (ARRAY_SIZE (powerpc32_plt_stub) - 1) | |
5d853008 ME |
301 | |
302 | /* Check if PC is in PLT stub. For non-secure PLT, stub is in .plt | |
303 | section. For secure PLT, stub is in .text and we need to check | |
304 | instruction patterns. */ | |
305 | ||
306 | static int | |
307 | powerpc_linux_in_dynsym_resolve_code (CORE_ADDR pc) | |
308 | { | |
7cbd4a93 | 309 | struct bound_minimal_symbol sym; |
5d853008 ME |
310 | |
311 | /* Check whether PC is in the dynamic linker. This also checks | |
312 | whether it is in the .plt section, used by non-PIC executables. */ | |
313 | if (svr4_in_dynsym_resolve_code (pc)) | |
314 | return 1; | |
315 | ||
316 | /* Check if we are in the resolver. */ | |
317 | sym = lookup_minimal_symbol_by_pc (pc); | |
7cbd4a93 | 318 | if (sym.minsym != NULL |
efd66ac6 TT |
319 | && (strcmp (MSYMBOL_LINKAGE_NAME (sym.minsym), "__glink") == 0 |
320 | || strcmp (MSYMBOL_LINKAGE_NAME (sym.minsym), | |
7cbd4a93 | 321 | "__glink_PLTresolve") == 0)) |
5d853008 ME |
322 | return 1; |
323 | ||
324 | return 0; | |
325 | } | |
326 | ||
ddeca1df WW |
327 | /* Follow PLT stub to actual routine. |
328 | ||
329 | When the execution direction is EXEC_REVERSE, scan backward to | |
330 | check whether we are in the middle of a PLT stub. Currently, | |
7433498b | 331 | we only look-behind at most 4 instructions (the max length of a PLT |
ddeca1df | 332 | stub sequence. */ |
5d853008 ME |
333 | |
334 | static CORE_ADDR | |
335 | ppc_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc) | |
336 | { | |
7433498b | 337 | unsigned int insnbuf[POWERPC32_PLT_CHECK_LEN]; |
5d853008 ME |
338 | struct gdbarch *gdbarch = get_frame_arch (frame); |
339 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
340 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
341 | CORE_ADDR target = 0; | |
cf90fd9a | 342 | int scan_limit, i; |
5d853008 | 343 | |
cf90fd9a WW |
344 | scan_limit = 1; |
345 | /* When reverse-debugging, scan backward to check whether we are | |
346 | in the middle of trampoline code. */ | |
347 | if (execution_direction == EXEC_REVERSE) | |
7433498b | 348 | scan_limit = 4; /* At most 4 instructions. */ |
5d853008 | 349 | |
cf90fd9a | 350 | for (i = 0; i < scan_limit; i++) |
5d853008 | 351 | { |
cf90fd9a WW |
352 | if (ppc_insns_match_pattern (frame, pc, powerpc32_plt_stub, insnbuf)) |
353 | { | |
7433498b | 354 | /* Calculate PLT entry address from |
cf90fd9a | 355 | lis r11, xxxx |
7433498b AM |
356 | lwz r11, xxxx(r11). */ |
357 | target = ((ppc_insn_d_field (insnbuf[0]) << 16) | |
358 | + ppc_insn_d_field (insnbuf[1])); | |
359 | } | |
360 | else if (i < ARRAY_SIZE (powerpc32_plt_stub_so_1) - 1 | |
361 | && ppc_insns_match_pattern (frame, pc, powerpc32_plt_stub_so_1, | |
362 | insnbuf)) | |
363 | { | |
364 | /* Calculate PLT entry address from | |
365 | lwz r11, xxxx(r30). */ | |
366 | target = (ppc_insn_d_field (insnbuf[0]) | |
367 | + get_frame_register_unsigned (frame, | |
368 | tdep->ppc_gp0_regnum + 30)); | |
cf90fd9a | 369 | } |
7433498b | 370 | else if (ppc_insns_match_pattern (frame, pc, powerpc32_plt_stub_so_2, |
cf90fd9a WW |
371 | insnbuf)) |
372 | { | |
7433498b AM |
373 | /* Calculate PLT entry address from |
374 | addis r11, r30, xxxx | |
375 | lwz r11, xxxx(r11). */ | |
376 | target = ((ppc_insn_d_field (insnbuf[0]) << 16) | |
377 | + ppc_insn_d_field (insnbuf[1]) | |
378 | + get_frame_register_unsigned (frame, | |
379 | tdep->ppc_gp0_regnum + 30)); | |
cf90fd9a WW |
380 | } |
381 | else | |
382 | { | |
7433498b | 383 | /* Scan backward one more instruction if it doesn't match. */ |
cf90fd9a WW |
384 | pc -= 4; |
385 | continue; | |
386 | } | |
387 | ||
7433498b | 388 | target = read_memory_unsigned_integer (target, 4, byte_order); |
cf90fd9a | 389 | return target; |
5d853008 ME |
390 | } |
391 | ||
cf90fd9a | 392 | return 0; |
5d853008 | 393 | } |
f470a70a | 394 | |
7284e1be UW |
395 | /* Wrappers to handle Linux-only registers. */ |
396 | ||
397 | static void | |
398 | ppc_linux_supply_gregset (const struct regset *regset, | |
399 | struct regcache *regcache, | |
400 | int regnum, const void *gregs, size_t len) | |
401 | { | |
19ba03f4 SM |
402 | const struct ppc_reg_offsets *offsets |
403 | = (const struct ppc_reg_offsets *) regset->regmap; | |
7284e1be UW |
404 | |
405 | ppc_supply_gregset (regset, regcache, regnum, gregs, len); | |
406 | ||
ac7936df | 407 | if (ppc_linux_trap_reg_p (regcache->arch ())) |
7284e1be UW |
408 | { |
409 | /* "orig_r3" is stored 2 slots after "pc". */ | |
410 | if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM) | |
19ba03f4 | 411 | ppc_supply_reg (regcache, PPC_ORIG_R3_REGNUM, (const gdb_byte *) gregs, |
7284e1be UW |
412 | offsets->pc_offset + 2 * offsets->gpr_size, |
413 | offsets->gpr_size); | |
414 | ||
415 | /* "trap" is stored 8 slots after "pc". */ | |
416 | if (regnum == -1 || regnum == PPC_TRAP_REGNUM) | |
19ba03f4 | 417 | ppc_supply_reg (regcache, PPC_TRAP_REGNUM, (const gdb_byte *) gregs, |
7284e1be UW |
418 | offsets->pc_offset + 8 * offsets->gpr_size, |
419 | offsets->gpr_size); | |
420 | } | |
421 | } | |
f2db237a | 422 | |
f9be684a | 423 | static void |
f2db237a AM |
424 | ppc_linux_collect_gregset (const struct regset *regset, |
425 | const struct regcache *regcache, | |
426 | int regnum, void *gregs, size_t len) | |
f9be684a | 427 | { |
19ba03f4 SM |
428 | const struct ppc_reg_offsets *offsets |
429 | = (const struct ppc_reg_offsets *) regset->regmap; | |
7284e1be UW |
430 | |
431 | /* Clear areas in the linux gregset not written elsewhere. */ | |
f2db237a AM |
432 | if (regnum == -1) |
433 | memset (gregs, 0, len); | |
7284e1be | 434 | |
f2db237a | 435 | ppc_collect_gregset (regset, regcache, regnum, gregs, len); |
7284e1be | 436 | |
ac7936df | 437 | if (ppc_linux_trap_reg_p (regcache->arch ())) |
7284e1be UW |
438 | { |
439 | /* "orig_r3" is stored 2 slots after "pc". */ | |
440 | if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM) | |
19ba03f4 | 441 | ppc_collect_reg (regcache, PPC_ORIG_R3_REGNUM, (gdb_byte *) gregs, |
7284e1be UW |
442 | offsets->pc_offset + 2 * offsets->gpr_size, |
443 | offsets->gpr_size); | |
444 | ||
445 | /* "trap" is stored 8 slots after "pc". */ | |
446 | if (regnum == -1 || regnum == PPC_TRAP_REGNUM) | |
19ba03f4 | 447 | ppc_collect_reg (regcache, PPC_TRAP_REGNUM, (gdb_byte *) gregs, |
7284e1be UW |
448 | offsets->pc_offset + 8 * offsets->gpr_size, |
449 | offsets->gpr_size); | |
450 | } | |
f9be684a AC |
451 | } |
452 | ||
f2db237a AM |
453 | /* Regset descriptions. */ |
454 | static const struct ppc_reg_offsets ppc32_linux_reg_offsets = | |
455 | { | |
456 | /* General-purpose registers. */ | |
457 | /* .r0_offset = */ 0, | |
458 | /* .gpr_size = */ 4, | |
459 | /* .xr_size = */ 4, | |
460 | /* .pc_offset = */ 128, | |
461 | /* .ps_offset = */ 132, | |
462 | /* .cr_offset = */ 152, | |
463 | /* .lr_offset = */ 144, | |
464 | /* .ctr_offset = */ 140, | |
465 | /* .xer_offset = */ 148, | |
466 | /* .mq_offset = */ 156, | |
467 | ||
468 | /* Floating-point registers. */ | |
469 | /* .f0_offset = */ 0, | |
470 | /* .fpscr_offset = */ 256, | |
1d75a658 | 471 | /* .fpscr_size = */ 8 |
f2db237a | 472 | }; |
f9be684a | 473 | |
f2db237a AM |
474 | static const struct ppc_reg_offsets ppc64_linux_reg_offsets = |
475 | { | |
476 | /* General-purpose registers. */ | |
477 | /* .r0_offset = */ 0, | |
478 | /* .gpr_size = */ 8, | |
479 | /* .xr_size = */ 8, | |
480 | /* .pc_offset = */ 256, | |
481 | /* .ps_offset = */ 264, | |
482 | /* .cr_offset = */ 304, | |
483 | /* .lr_offset = */ 288, | |
484 | /* .ctr_offset = */ 280, | |
485 | /* .xer_offset = */ 296, | |
486 | /* .mq_offset = */ 312, | |
487 | ||
488 | /* Floating-point registers. */ | |
489 | /* .f0_offset = */ 0, | |
490 | /* .fpscr_offset = */ 256, | |
1d75a658 | 491 | /* .fpscr_size = */ 8 |
f2db237a | 492 | }; |
2fda4977 | 493 | |
f2db237a AM |
494 | static const struct regset ppc32_linux_gregset = { |
495 | &ppc32_linux_reg_offsets, | |
7284e1be | 496 | ppc_linux_supply_gregset, |
09424cff | 497 | ppc_linux_collect_gregset |
f9be684a AC |
498 | }; |
499 | ||
f2db237a AM |
500 | static const struct regset ppc64_linux_gregset = { |
501 | &ppc64_linux_reg_offsets, | |
7284e1be | 502 | ppc_linux_supply_gregset, |
09424cff | 503 | ppc_linux_collect_gregset |
f2db237a | 504 | }; |
f9be684a | 505 | |
f2db237a AM |
506 | static const struct regset ppc32_linux_fpregset = { |
507 | &ppc32_linux_reg_offsets, | |
508 | ppc_supply_fpregset, | |
09424cff | 509 | ppc_collect_fpregset |
f9be684a AC |
510 | }; |
511 | ||
1d75a658 PFC |
512 | static const struct regcache_map_entry ppc32_le_linux_vrregmap[] = |
513 | { | |
514 | { 32, PPC_VR0_REGNUM, 16 }, | |
515 | { 1, PPC_VSCR_REGNUM, 4 }, | |
516 | { 1, REGCACHE_MAP_SKIP, 12 }, | |
517 | { 1, PPC_VRSAVE_REGNUM, 4 }, | |
518 | { 1, REGCACHE_MAP_SKIP, 12 }, | |
519 | { 0 } | |
520 | }; | |
521 | ||
522 | static const struct regcache_map_entry ppc32_be_linux_vrregmap[] = | |
523 | { | |
524 | { 32, PPC_VR0_REGNUM, 16 }, | |
525 | { 1, REGCACHE_MAP_SKIP, 12}, | |
526 | { 1, PPC_VSCR_REGNUM, 4 }, | |
527 | { 1, PPC_VRSAVE_REGNUM, 4 }, | |
528 | { 1, REGCACHE_MAP_SKIP, 12 }, | |
529 | { 0 } | |
530 | }; | |
531 | ||
532 | static const struct regset ppc32_le_linux_vrregset = { | |
533 | ppc32_le_linux_vrregmap, | |
534 | regcache_supply_regset, | |
5c849b22 | 535 | regcache_collect_regset |
1d75a658 PFC |
536 | }; |
537 | ||
538 | static const struct regset ppc32_be_linux_vrregset = { | |
539 | ppc32_be_linux_vrregmap, | |
540 | regcache_supply_regset, | |
5c849b22 | 541 | regcache_collect_regset |
06caf7d2 CES |
542 | }; |
543 | ||
2c3305f6 PFC |
544 | static const struct regcache_map_entry ppc32_linux_vsxregmap[] = |
545 | { | |
546 | { 32, PPC_VSR0_UPPER_REGNUM, 8 }, | |
547 | { 0 } | |
548 | }; | |
549 | ||
604c2f83 | 550 | static const struct regset ppc32_linux_vsxregset = { |
2c3305f6 PFC |
551 | ppc32_linux_vsxregmap, |
552 | regcache_supply_regset, | |
553 | regcache_collect_regset | |
604c2f83 LM |
554 | }; |
555 | ||
7ca18ed6 EBM |
556 | /* Program Priorty Register regmap. */ |
557 | ||
558 | static const struct regcache_map_entry ppc32_regmap_ppr[] = | |
559 | { | |
560 | { 1, PPC_PPR_REGNUM, 8 }, | |
561 | { 0 } | |
562 | }; | |
563 | ||
564 | /* Program Priorty Register regset. */ | |
565 | ||
566 | const struct regset ppc32_linux_pprregset = { | |
567 | ppc32_regmap_ppr, | |
568 | regcache_supply_regset, | |
569 | regcache_collect_regset | |
570 | }; | |
571 | ||
572 | /* Data Stream Control Register regmap. */ | |
573 | ||
574 | static const struct regcache_map_entry ppc32_regmap_dscr[] = | |
575 | { | |
576 | { 1, PPC_DSCR_REGNUM, 8 }, | |
577 | { 0 } | |
578 | }; | |
579 | ||
580 | /* Data Stream Control Register regset. */ | |
581 | ||
582 | const struct regset ppc32_linux_dscrregset = { | |
583 | ppc32_regmap_dscr, | |
584 | regcache_supply_regset, | |
585 | regcache_collect_regset | |
586 | }; | |
587 | ||
f2cf6173 EBM |
588 | /* Target Address Register regmap. */ |
589 | ||
590 | static const struct regcache_map_entry ppc32_regmap_tar[] = | |
591 | { | |
592 | { 1, PPC_TAR_REGNUM, 8 }, | |
593 | { 0 } | |
594 | }; | |
595 | ||
596 | /* Target Address Register regset. */ | |
597 | ||
598 | const struct regset ppc32_linux_tarregset = { | |
599 | ppc32_regmap_tar, | |
600 | regcache_supply_regset, | |
601 | regcache_collect_regset | |
602 | }; | |
603 | ||
232bfb86 EBM |
604 | /* Event-Based Branching regmap. */ |
605 | ||
606 | static const struct regcache_map_entry ppc32_regmap_ebb[] = | |
607 | { | |
608 | { 1, PPC_EBBRR_REGNUM, 8 }, | |
609 | { 1, PPC_EBBHR_REGNUM, 8 }, | |
610 | { 1, PPC_BESCR_REGNUM, 8 }, | |
611 | { 0 } | |
612 | }; | |
613 | ||
614 | /* Event-Based Branching regset. */ | |
615 | ||
616 | const struct regset ppc32_linux_ebbregset = { | |
617 | ppc32_regmap_ebb, | |
618 | regcache_supply_regset, | |
619 | regcache_collect_regset | |
620 | }; | |
621 | ||
622 | /* Performance Monitoring Unit regmap. */ | |
623 | ||
624 | static const struct regcache_map_entry ppc32_regmap_pmu[] = | |
625 | { | |
626 | { 1, PPC_SIAR_REGNUM, 8 }, | |
627 | { 1, PPC_SDAR_REGNUM, 8 }, | |
628 | { 1, PPC_SIER_REGNUM, 8 }, | |
629 | { 1, PPC_MMCR2_REGNUM, 8 }, | |
630 | { 1, PPC_MMCR0_REGNUM, 8 }, | |
631 | { 0 } | |
632 | }; | |
633 | ||
634 | /* Performance Monitoring Unit regset. */ | |
635 | ||
636 | const struct regset ppc32_linux_pmuregset = { | |
637 | ppc32_regmap_pmu, | |
638 | regcache_supply_regset, | |
639 | regcache_collect_regset | |
640 | }; | |
641 | ||
8d619c01 EBM |
642 | /* Hardware Transactional Memory special-purpose register regmap. */ |
643 | ||
644 | static const struct regcache_map_entry ppc32_regmap_tm_spr[] = | |
645 | { | |
646 | { 1, PPC_TFHAR_REGNUM, 8 }, | |
647 | { 1, PPC_TEXASR_REGNUM, 8 }, | |
648 | { 1, PPC_TFIAR_REGNUM, 8 }, | |
649 | { 0 } | |
650 | }; | |
651 | ||
652 | /* Hardware Transactional Memory special-purpose register regset. */ | |
653 | ||
654 | const struct regset ppc32_linux_tm_sprregset = { | |
655 | ppc32_regmap_tm_spr, | |
656 | regcache_supply_regset, | |
657 | regcache_collect_regset | |
658 | }; | |
659 | ||
660 | /* Regmaps for the Hardware Transactional Memory checkpointed | |
661 | general-purpose regsets for 32-bit, 64-bit big-endian, and 64-bit | |
662 | little endian targets. The ptrace and core file buffers for 64-bit | |
663 | targets use 8-byte fields for the 4-byte registers, and the | |
664 | position of the register in the fields depends on the endianess. | |
665 | The 32-bit regmap is the same for both endian types because the | |
666 | fields are all 4-byte long. | |
667 | ||
668 | The layout of checkpointed GPR regset is the same as a regular | |
669 | struct pt_regs, but we skip all registers that are not actually | |
670 | checkpointed by the processor (e.g. msr, nip), except when | |
671 | generating a core file. The 64-bit regset is 48 * 8 bytes long. | |
672 | In some 64-bit kernels, the regset for a 32-bit inferior has the | |
673 | same length, but all the registers are squeezed in the first half | |
674 | (48 * 4 bytes). The pt_regs struct calls the regular cr ccr, but | |
675 | we use ccr for "checkpointed condition register". Note that CR | |
676 | (condition register) field 0 is not checkpointed, but the kernel | |
677 | returns all 4 bytes. The skipped registers should not be touched | |
678 | when writing the regset to the inferior (with | |
679 | PTRACE_SETREGSET). */ | |
680 | ||
681 | static const struct regcache_map_entry ppc32_regmap_cgpr[] = | |
682 | { | |
683 | { 32, PPC_CR0_REGNUM, 4 }, | |
684 | { 3, REGCACHE_MAP_SKIP, 4 }, /* nip, msr, orig_gpr3. */ | |
685 | { 1, PPC_CCTR_REGNUM, 4 }, | |
686 | { 1, PPC_CLR_REGNUM, 4 }, | |
687 | { 1, PPC_CXER_REGNUM, 4 }, | |
688 | { 1, PPC_CCR_REGNUM, 4 }, | |
689 | { 9, REGCACHE_MAP_SKIP, 4 }, /* All the rest. */ | |
690 | { 0 } | |
691 | }; | |
692 | ||
693 | static const struct regcache_map_entry ppc64_le_regmap_cgpr[] = | |
694 | { | |
695 | { 32, PPC_CR0_REGNUM, 8 }, | |
696 | { 3, REGCACHE_MAP_SKIP, 8 }, | |
697 | { 1, PPC_CCTR_REGNUM, 8 }, | |
698 | { 1, PPC_CLR_REGNUM, 8 }, | |
699 | { 1, PPC_CXER_REGNUM, 4 }, | |
700 | { 1, REGCACHE_MAP_SKIP, 4 }, /* CXER padding. */ | |
701 | { 1, PPC_CCR_REGNUM, 4 }, | |
702 | { 1, REGCACHE_MAP_SKIP, 4}, /* CCR padding. */ | |
703 | { 9, REGCACHE_MAP_SKIP, 8}, | |
704 | { 0 } | |
705 | }; | |
706 | ||
707 | static const struct regcache_map_entry ppc64_be_regmap_cgpr[] = | |
708 | { | |
709 | { 32, PPC_CR0_REGNUM, 8 }, | |
710 | { 3, REGCACHE_MAP_SKIP, 8 }, | |
711 | { 1, PPC_CCTR_REGNUM, 8 }, | |
712 | { 1, PPC_CLR_REGNUM, 8 }, | |
713 | { 1, REGCACHE_MAP_SKIP, 4}, /* CXER padding. */ | |
714 | { 1, PPC_CXER_REGNUM, 4 }, | |
715 | { 1, REGCACHE_MAP_SKIP, 4}, /* CCR padding. */ | |
716 | { 1, PPC_CCR_REGNUM, 4 }, | |
717 | { 9, REGCACHE_MAP_SKIP, 8}, | |
718 | { 0 } | |
719 | }; | |
720 | ||
721 | /* Regsets for the Hardware Transactional Memory checkpointed | |
722 | general-purpose registers for 32-bit, 64-bit big-endian, and 64-bit | |
723 | little endian targets. | |
724 | ||
725 | Some 64-bit kernels generate a checkpointed gpr note section with | |
726 | 48*8 bytes for a 32-bit thread, of which only 48*4 are actually | |
727 | used, so we set the variable size flag in the corresponding regset | |
728 | to accept this case. */ | |
729 | ||
730 | static const struct regset ppc32_linux_cgprregset = { | |
731 | ppc32_regmap_cgpr, | |
732 | regcache_supply_regset, | |
733 | regcache_collect_regset, | |
734 | REGSET_VARIABLE_SIZE | |
735 | }; | |
736 | ||
737 | static const struct regset ppc64_be_linux_cgprregset = { | |
738 | ppc64_be_regmap_cgpr, | |
739 | regcache_supply_regset, | |
740 | regcache_collect_regset | |
741 | }; | |
742 | ||
743 | static const struct regset ppc64_le_linux_cgprregset = { | |
744 | ppc64_le_regmap_cgpr, | |
745 | regcache_supply_regset, | |
746 | regcache_collect_regset | |
747 | }; | |
748 | ||
749 | /* Hardware Transactional Memory checkpointed floating-point regmap. */ | |
750 | ||
751 | static const struct regcache_map_entry ppc32_regmap_cfpr[] = | |
752 | { | |
753 | { 32, PPC_CF0_REGNUM, 8 }, | |
754 | { 1, PPC_CFPSCR_REGNUM, 8 }, | |
755 | { 0 } | |
756 | }; | |
757 | ||
758 | /* Hardware Transactional Memory checkpointed floating-point regset. */ | |
759 | ||
760 | const struct regset ppc32_linux_cfprregset = { | |
761 | ppc32_regmap_cfpr, | |
762 | regcache_supply_regset, | |
763 | regcache_collect_regset | |
764 | }; | |
765 | ||
766 | /* Regmaps for the Hardware Transactional Memory checkpointed vector | |
767 | regsets, for big and little endian targets. The position of the | |
768 | 4-byte VSCR in its 16-byte field depends on the endianess. */ | |
769 | ||
770 | static const struct regcache_map_entry ppc32_le_regmap_cvmx[] = | |
771 | { | |
772 | { 32, PPC_CVR0_REGNUM, 16 }, | |
773 | { 1, PPC_CVSCR_REGNUM, 4 }, | |
774 | { 1, REGCACHE_MAP_SKIP, 12 }, | |
775 | { 1, PPC_CVRSAVE_REGNUM, 4 }, | |
776 | { 1, REGCACHE_MAP_SKIP, 12 }, | |
777 | { 0 } | |
778 | }; | |
779 | ||
780 | static const struct regcache_map_entry ppc32_be_regmap_cvmx[] = | |
781 | { | |
782 | { 32, PPC_CVR0_REGNUM, 16 }, | |
783 | { 1, REGCACHE_MAP_SKIP, 12 }, | |
784 | { 1, PPC_CVSCR_REGNUM, 4 }, | |
785 | { 1, PPC_CVRSAVE_REGNUM, 4 }, | |
786 | { 1, REGCACHE_MAP_SKIP, 12}, | |
787 | { 0 } | |
788 | }; | |
789 | ||
790 | /* Hardware Transactional Memory checkpointed vector regsets, for little | |
791 | and big endian targets. */ | |
792 | ||
793 | static const struct regset ppc32_le_linux_cvmxregset = { | |
794 | ppc32_le_regmap_cvmx, | |
795 | regcache_supply_regset, | |
796 | regcache_collect_regset | |
797 | }; | |
798 | ||
799 | static const struct regset ppc32_be_linux_cvmxregset = { | |
800 | ppc32_be_regmap_cvmx, | |
801 | regcache_supply_regset, | |
802 | regcache_collect_regset | |
803 | }; | |
804 | ||
805 | /* Hardware Transactional Memory checkpointed vector-scalar regmap. */ | |
806 | ||
807 | static const struct regcache_map_entry ppc32_regmap_cvsx[] = | |
808 | { | |
809 | { 32, PPC_CVSR0_UPPER_REGNUM, 8 }, | |
810 | { 0 } | |
811 | }; | |
812 | ||
813 | /* Hardware Transactional Memory checkpointed vector-scalar regset. */ | |
814 | ||
815 | const struct regset ppc32_linux_cvsxregset = { | |
816 | ppc32_regmap_cvsx, | |
817 | regcache_supply_regset, | |
818 | regcache_collect_regset | |
819 | }; | |
820 | ||
821 | /* Hardware Transactional Memory checkpointed Program Priority Register | |
822 | regmap. */ | |
823 | ||
824 | static const struct regcache_map_entry ppc32_regmap_cppr[] = | |
825 | { | |
826 | { 1, PPC_CPPR_REGNUM, 8 }, | |
827 | { 0 } | |
828 | }; | |
829 | ||
830 | /* Hardware Transactional Memory checkpointed Program Priority Register | |
831 | regset. */ | |
832 | ||
833 | const struct regset ppc32_linux_cpprregset = { | |
834 | ppc32_regmap_cppr, | |
835 | regcache_supply_regset, | |
836 | regcache_collect_regset | |
837 | }; | |
838 | ||
839 | /* Hardware Transactional Memory checkpointed Data Stream Control | |
840 | Register regmap. */ | |
841 | ||
842 | static const struct regcache_map_entry ppc32_regmap_cdscr[] = | |
843 | { | |
844 | { 1, PPC_CDSCR_REGNUM, 8 }, | |
845 | { 0 } | |
846 | }; | |
847 | ||
848 | /* Hardware Transactional Memory checkpointed Data Stream Control | |
849 | Register regset. */ | |
850 | ||
851 | const struct regset ppc32_linux_cdscrregset = { | |
852 | ppc32_regmap_cdscr, | |
853 | regcache_supply_regset, | |
854 | regcache_collect_regset | |
855 | }; | |
856 | ||
857 | /* Hardware Transactional Memory checkpointed Target Address Register | |
858 | regmap. */ | |
859 | ||
860 | static const struct regcache_map_entry ppc32_regmap_ctar[] = | |
861 | { | |
862 | { 1, PPC_CTAR_REGNUM, 8 }, | |
863 | { 0 } | |
864 | }; | |
865 | ||
866 | /* Hardware Transactional Memory checkpointed Target Address Register | |
867 | regset. */ | |
868 | ||
869 | const struct regset ppc32_linux_ctarregset = { | |
870 | ppc32_regmap_ctar, | |
871 | regcache_supply_regset, | |
872 | regcache_collect_regset | |
873 | }; | |
874 | ||
f2db237a AM |
875 | const struct regset * |
876 | ppc_linux_gregset (int wordsize) | |
2fda4977 | 877 | { |
f2db237a | 878 | return wordsize == 8 ? &ppc64_linux_gregset : &ppc32_linux_gregset; |
2fda4977 DJ |
879 | } |
880 | ||
f2db237a AM |
881 | const struct regset * |
882 | ppc_linux_fpregset (void) | |
883 | { | |
884 | return &ppc32_linux_fpregset; | |
885 | } | |
2fda4977 | 886 | |
1d75a658 PFC |
887 | const struct regset * |
888 | ppc_linux_vrregset (struct gdbarch *gdbarch) | |
889 | { | |
890 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
891 | return &ppc32_be_linux_vrregset; | |
892 | else | |
893 | return &ppc32_le_linux_vrregset; | |
894 | } | |
895 | ||
2c3305f6 PFC |
896 | const struct regset * |
897 | ppc_linux_vsxregset (void) | |
898 | { | |
899 | return &ppc32_linux_vsxregset; | |
900 | } | |
901 | ||
8d619c01 EBM |
902 | const struct regset * |
903 | ppc_linux_cgprregset (struct gdbarch *gdbarch) | |
904 | { | |
905 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
906 | ||
907 | if (tdep->wordsize == 4) | |
908 | { | |
909 | return &ppc32_linux_cgprregset; | |
910 | } | |
911 | else | |
912 | { | |
913 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
914 | return &ppc64_be_linux_cgprregset; | |
915 | else | |
916 | return &ppc64_le_linux_cgprregset; | |
917 | } | |
918 | } | |
919 | ||
920 | const struct regset * | |
921 | ppc_linux_cvmxregset (struct gdbarch *gdbarch) | |
922 | { | |
923 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
924 | return &ppc32_be_linux_cvmxregset; | |
925 | else | |
926 | return &ppc32_le_linux_cvmxregset; | |
927 | } | |
928 | ||
929 | /* Collect function used to generate the core note for the | |
930 | checkpointed GPR regset. Here, we don't want to skip the | |
931 | "checkpointed" NIP and MSR, so that the note section we generate is | |
932 | similar to the one generated by the kernel. To avoid having to | |
933 | define additional registers in GDB which are not actually | |
934 | checkpointed in the architecture, we copy TFHAR to the checkpointed | |
935 | NIP slot, which is what the kernel does, and copy the regular MSR | |
936 | to the checkpointed MSR slot, which will have a similar value in | |
937 | most cases. */ | |
938 | ||
939 | static void | |
940 | ppc_linux_collect_core_cpgrregset (const struct regset *regset, | |
941 | const struct regcache *regcache, | |
942 | int regnum, void *buf, size_t len) | |
943 | { | |
944 | struct gdbarch *gdbarch = regcache->arch (); | |
945 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
946 | ||
947 | const struct regset *cgprregset = ppc_linux_cgprregset (gdbarch); | |
948 | ||
949 | /* We collect the checkpointed GPRs already defined in the regular | |
950 | regmap, then overlay TFHAR/MSR on the checkpointed NIP/MSR | |
951 | slots. */ | |
952 | cgprregset->collect_regset (cgprregset, regcache, regnum, buf, len); | |
953 | ||
954 | /* Check that we are collecting all the registers, which should be | |
955 | the case when generating a core file. */ | |
956 | if (regnum != -1) | |
957 | return; | |
958 | ||
959 | /* PT_NIP and PT_MSR are 32 and 33 for powerpc. Don't redefine | |
960 | these symbols since this file can run on clients in other | |
961 | architectures where they can already be defined to other | |
962 | values. */ | |
963 | int pt_offset = 32; | |
964 | ||
965 | /* Check that our buffer is long enough to hold two slots at | |
966 | pt_offset * wordsize, one for NIP and one for MSR. */ | |
967 | gdb_assert ((pt_offset + 2) * tdep->wordsize <= len); | |
968 | ||
969 | /* TFHAR is 8 bytes wide, but the NIP slot for a 32-bit thread is | |
970 | 4-bytes long. We use raw_collect_integer which handles | |
971 | differences in the sizes for the source and destination buffers | |
972 | for both endian modes. */ | |
973 | (regcache->raw_collect_integer | |
974 | (PPC_TFHAR_REGNUM, ((gdb_byte *) buf) + pt_offset * tdep->wordsize, | |
975 | tdep->wordsize, false)); | |
976 | ||
977 | pt_offset = 33; | |
978 | ||
979 | (regcache->raw_collect_integer | |
980 | (PPC_MSR_REGNUM, ((gdb_byte *) buf) + pt_offset * tdep->wordsize, | |
981 | tdep->wordsize, false)); | |
982 | } | |
983 | ||
5aa82d05 AA |
984 | /* Iterate over supported core file register note sections. */ |
985 | ||
986 | static void | |
987 | ppc_linux_iterate_over_regset_sections (struct gdbarch *gdbarch, | |
988 | iterate_over_regset_sections_cb *cb, | |
989 | void *cb_data, | |
990 | const struct regcache *regcache) | |
991 | { | |
992 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
993 | int have_altivec = tdep->ppc_vr0_regnum != -1; | |
994 | int have_vsx = tdep->ppc_vsr0_upper_regnum != -1; | |
7ca18ed6 EBM |
995 | int have_ppr = tdep->ppc_ppr_regnum != -1; |
996 | int have_dscr = tdep->ppc_dscr_regnum != -1; | |
f2cf6173 | 997 | int have_tar = tdep->ppc_tar_regnum != -1; |
5aa82d05 | 998 | |
8f0435f7 | 999 | if (tdep->wordsize == 4) |
a616bb94 | 1000 | cb (".reg", 48 * 4, 48 * 4, &ppc32_linux_gregset, NULL, cb_data); |
8f0435f7 | 1001 | else |
a616bb94 | 1002 | cb (".reg", 48 * 8, 48 * 8, &ppc64_linux_gregset, NULL, cb_data); |
8f0435f7 | 1003 | |
a616bb94 | 1004 | cb (".reg2", 264, 264, &ppc32_linux_fpregset, NULL, cb_data); |
5aa82d05 AA |
1005 | |
1006 | if (have_altivec) | |
1d75a658 PFC |
1007 | { |
1008 | const struct regset *vrregset = ppc_linux_vrregset (gdbarch); | |
a616bb94 AH |
1009 | cb (".reg-ppc-vmx", PPC_LINUX_SIZEOF_VRREGSET, PPC_LINUX_SIZEOF_VRREGSET, |
1010 | vrregset, "ppc Altivec", cb_data); | |
1d75a658 | 1011 | } |
5aa82d05 AA |
1012 | |
1013 | if (have_vsx) | |
a616bb94 | 1014 | cb (".reg-ppc-vsx", PPC_LINUX_SIZEOF_VSXREGSET, PPC_LINUX_SIZEOF_VSXREGSET, |
d078308a | 1015 | &ppc32_linux_vsxregset, "POWER7 VSX", cb_data); |
7ca18ed6 EBM |
1016 | |
1017 | if (have_ppr) | |
1018 | cb (".reg-ppc-ppr", PPC_LINUX_SIZEOF_PPRREGSET, | |
1019 | PPC_LINUX_SIZEOF_PPRREGSET, | |
1020 | &ppc32_linux_pprregset, "Priority Program Register", cb_data); | |
1021 | ||
1022 | if (have_dscr) | |
1023 | cb (".reg-ppc-dscr", PPC_LINUX_SIZEOF_DSCRREGSET, | |
1024 | PPC_LINUX_SIZEOF_DSCRREGSET, | |
1025 | &ppc32_linux_dscrregset, "Data Stream Control Register", | |
1026 | cb_data); | |
f2cf6173 EBM |
1027 | |
1028 | if (have_tar) | |
1029 | cb (".reg-ppc-tar", PPC_LINUX_SIZEOF_TARREGSET, | |
1030 | PPC_LINUX_SIZEOF_TARREGSET, | |
1031 | &ppc32_linux_tarregset, "Target Address Register", cb_data); | |
232bfb86 EBM |
1032 | |
1033 | /* EBB registers are unavailable when ptrace returns ENODATA. Check | |
1034 | availability when generating a core file (regcache != NULL). */ | |
1035 | if (tdep->have_ebb) | |
1036 | if (regcache == NULL | |
1037 | || REG_VALID == regcache->get_register_status (PPC_BESCR_REGNUM)) | |
1038 | cb (".reg-ppc-ebb", PPC_LINUX_SIZEOF_EBBREGSET, | |
1039 | PPC_LINUX_SIZEOF_EBBREGSET, | |
1040 | &ppc32_linux_ebbregset, "Event-based Branching Registers", | |
1041 | cb_data); | |
1042 | ||
1043 | if (tdep->ppc_mmcr0_regnum != -1) | |
1044 | cb (".reg-ppc-pmu", PPC_LINUX_SIZEOF_PMUREGSET, | |
1045 | PPC_LINUX_SIZEOF_PMUREGSET, | |
1046 | &ppc32_linux_pmuregset, "Performance Monitor Registers", | |
1047 | cb_data); | |
8d619c01 EBM |
1048 | |
1049 | if (tdep->have_htm_spr) | |
1050 | cb (".reg-ppc-tm-spr", PPC_LINUX_SIZEOF_TM_SPRREGSET, | |
1051 | PPC_LINUX_SIZEOF_TM_SPRREGSET, | |
1052 | &ppc32_linux_tm_sprregset, | |
1053 | "Hardware Transactional Memory Special Purpose Registers", | |
1054 | cb_data); | |
1055 | ||
1056 | /* Checkpointed registers can be unavailable, don't call back if | |
1057 | we are generating a core file. */ | |
1058 | ||
1059 | if (tdep->have_htm_core) | |
1060 | { | |
1061 | /* Only generate the checkpointed GPR core note if we also have | |
1062 | access to the HTM SPRs, because we need TFHAR to fill the | |
1063 | "checkpointed" NIP slot. We can read a core file without it | |
1064 | since GDB is not aware of this NIP as a visible register. */ | |
1065 | if (regcache == NULL || | |
1066 | (REG_VALID == regcache->get_register_status (PPC_CR0_REGNUM) | |
1067 | && tdep->have_htm_spr)) | |
1068 | { | |
1069 | int cgpr_size = (tdep->wordsize == 4? | |
1070 | PPC32_LINUX_SIZEOF_CGPRREGSET | |
1071 | : PPC64_LINUX_SIZEOF_CGPRREGSET); | |
1072 | ||
1073 | const struct regset *cgprregset = | |
1074 | ppc_linux_cgprregset (gdbarch); | |
1075 | ||
1076 | if (regcache != NULL) | |
1077 | { | |
1078 | struct regset core_cgprregset = *cgprregset; | |
1079 | ||
1080 | core_cgprregset.collect_regset | |
1081 | = ppc_linux_collect_core_cpgrregset; | |
1082 | ||
1083 | cb (".reg-ppc-tm-cgpr", | |
1084 | cgpr_size, cgpr_size, | |
1085 | &core_cgprregset, | |
1086 | "Checkpointed General Purpose Registers", cb_data); | |
1087 | } | |
1088 | else | |
1089 | { | |
1090 | cb (".reg-ppc-tm-cgpr", | |
1091 | cgpr_size, cgpr_size, | |
1092 | cgprregset, | |
1093 | "Checkpointed General Purpose Registers", cb_data); | |
1094 | } | |
1095 | } | |
1096 | } | |
1097 | ||
1098 | if (tdep->have_htm_fpu) | |
1099 | { | |
1100 | if (regcache == NULL || | |
1101 | REG_VALID == regcache->get_register_status (PPC_CF0_REGNUM)) | |
1102 | cb (".reg-ppc-tm-cfpr", PPC_LINUX_SIZEOF_CFPRREGSET, | |
1103 | PPC_LINUX_SIZEOF_CFPRREGSET, | |
1104 | &ppc32_linux_cfprregset, | |
1105 | "Checkpointed Floating Point Registers", cb_data); | |
1106 | } | |
1107 | ||
1108 | if (tdep->have_htm_altivec) | |
1109 | { | |
1110 | if (regcache == NULL || | |
1111 | REG_VALID == regcache->get_register_status (PPC_CVR0_REGNUM)) | |
1112 | { | |
1113 | const struct regset *cvmxregset = | |
1114 | ppc_linux_cvmxregset (gdbarch); | |
1115 | ||
1116 | cb (".reg-ppc-tm-cvmx", PPC_LINUX_SIZEOF_CVMXREGSET, | |
1117 | PPC_LINUX_SIZEOF_CVMXREGSET, | |
1118 | cvmxregset, | |
1119 | "Checkpointed Altivec (VMX) Registers", cb_data); | |
1120 | } | |
1121 | } | |
1122 | ||
1123 | if (tdep->have_htm_vsx) | |
1124 | { | |
1125 | if (regcache == NULL || | |
1126 | (REG_VALID | |
1127 | == regcache->get_register_status (PPC_CVSR0_UPPER_REGNUM))) | |
1128 | cb (".reg-ppc-tm-cvsx", PPC_LINUX_SIZEOF_CVSXREGSET, | |
1129 | PPC_LINUX_SIZEOF_CVSXREGSET, | |
1130 | &ppc32_linux_cvsxregset, | |
1131 | "Checkpointed VSX Registers", cb_data); | |
1132 | } | |
1133 | ||
1134 | if (tdep->ppc_cppr_regnum != -1) | |
1135 | { | |
1136 | if (regcache == NULL || | |
1137 | REG_VALID == regcache->get_register_status (PPC_CPPR_REGNUM)) | |
1138 | cb (".reg-ppc-tm-cppr", PPC_LINUX_SIZEOF_CPPRREGSET, | |
1139 | PPC_LINUX_SIZEOF_CPPRREGSET, | |
1140 | &ppc32_linux_cpprregset, | |
1141 | "Checkpointed Priority Program Register", cb_data); | |
1142 | } | |
1143 | ||
1144 | if (tdep->ppc_cdscr_regnum != -1) | |
1145 | { | |
1146 | if (regcache == NULL || | |
1147 | REG_VALID == regcache->get_register_status (PPC_CDSCR_REGNUM)) | |
1148 | cb (".reg-ppc-tm-cdscr", PPC_LINUX_SIZEOF_CDSCRREGSET, | |
1149 | PPC_LINUX_SIZEOF_CDSCRREGSET, | |
1150 | &ppc32_linux_cdscrregset, | |
1151 | "Checkpointed Data Stream Control Register", cb_data); | |
1152 | } | |
1153 | ||
1154 | if (tdep->ppc_ctar_regnum) | |
1155 | { | |
1156 | if ( regcache == NULL || | |
1157 | REG_VALID == regcache->get_register_status (PPC_CTAR_REGNUM)) | |
1158 | cb (".reg-ppc-tm-ctar", PPC_LINUX_SIZEOF_CTARREGSET, | |
1159 | PPC_LINUX_SIZEOF_CTARREGSET, | |
1160 | &ppc32_linux_ctarregset, | |
1161 | "Checkpointed Target Address Register", cb_data); | |
1162 | } | |
5aa82d05 AA |
1163 | } |
1164 | ||
a8f60bfc | 1165 | static void |
5366653e | 1166 | ppc_linux_sigtramp_cache (struct frame_info *this_frame, |
a8f60bfc AC |
1167 | struct trad_frame_cache *this_cache, |
1168 | CORE_ADDR func, LONGEST offset, | |
1169 | int bias) | |
1170 | { | |
1171 | CORE_ADDR base; | |
1172 | CORE_ADDR regs; | |
1173 | CORE_ADDR gpregs; | |
1174 | CORE_ADDR fpregs; | |
1175 | int i; | |
5366653e | 1176 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8f60bfc | 1177 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
e17a4113 | 1178 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
a8f60bfc | 1179 | |
5366653e DJ |
1180 | base = get_frame_register_unsigned (this_frame, |
1181 | gdbarch_sp_regnum (gdbarch)); | |
1182 | if (bias > 0 && get_frame_pc (this_frame) != func) | |
a8f60bfc AC |
1183 | /* See below, some signal trampolines increment the stack as their |
1184 | first instruction, need to compensate for that. */ | |
1185 | base -= bias; | |
1186 | ||
1187 | /* Find the address of the register buffer pointer. */ | |
1188 | regs = base + offset; | |
1189 | /* Use that to find the address of the corresponding register | |
1190 | buffers. */ | |
e17a4113 | 1191 | gpregs = read_memory_unsigned_integer (regs, tdep->wordsize, byte_order); |
a8f60bfc AC |
1192 | fpregs = gpregs + 48 * tdep->wordsize; |
1193 | ||
1194 | /* General purpose. */ | |
1195 | for (i = 0; i < 32; i++) | |
1196 | { | |
1197 | int regnum = i + tdep->ppc_gp0_regnum; | |
0df8b418 MS |
1198 | trad_frame_set_reg_addr (this_cache, |
1199 | regnum, gpregs + i * tdep->wordsize); | |
a8f60bfc | 1200 | } |
3e8c568d | 1201 | trad_frame_set_reg_addr (this_cache, |
40a6adc1 | 1202 | gdbarch_pc_regnum (gdbarch), |
3e8c568d | 1203 | gpregs + 32 * tdep->wordsize); |
a8f60bfc AC |
1204 | trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, |
1205 | gpregs + 35 * tdep->wordsize); | |
1206 | trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, | |
1207 | gpregs + 36 * tdep->wordsize); | |
1208 | trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, | |
1209 | gpregs + 37 * tdep->wordsize); | |
1210 | trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, | |
1211 | gpregs + 38 * tdep->wordsize); | |
1212 | ||
7284e1be UW |
1213 | if (ppc_linux_trap_reg_p (gdbarch)) |
1214 | { | |
1215 | trad_frame_set_reg_addr (this_cache, PPC_ORIG_R3_REGNUM, | |
1216 | gpregs + 34 * tdep->wordsize); | |
1217 | trad_frame_set_reg_addr (this_cache, PPC_TRAP_REGNUM, | |
1218 | gpregs + 40 * tdep->wordsize); | |
1219 | } | |
1220 | ||
60f140f9 PG |
1221 | if (ppc_floating_point_unit_p (gdbarch)) |
1222 | { | |
1223 | /* Floating point registers. */ | |
1224 | for (i = 0; i < 32; i++) | |
1225 | { | |
40a6adc1 | 1226 | int regnum = i + gdbarch_fp0_regnum (gdbarch); |
60f140f9 PG |
1227 | trad_frame_set_reg_addr (this_cache, regnum, |
1228 | fpregs + i * tdep->wordsize); | |
1229 | } | |
1230 | trad_frame_set_reg_addr (this_cache, tdep->ppc_fpscr_regnum, | |
4019046a | 1231 | fpregs + 32 * tdep->wordsize); |
60f140f9 | 1232 | } |
a8f60bfc AC |
1233 | trad_frame_set_id (this_cache, frame_id_build (base, func)); |
1234 | } | |
1235 | ||
1236 | static void | |
1237 | ppc32_linux_sigaction_cache_init (const struct tramp_frame *self, | |
5366653e | 1238 | struct frame_info *this_frame, |
a8f60bfc AC |
1239 | struct trad_frame_cache *this_cache, |
1240 | CORE_ADDR func) | |
1241 | { | |
5366653e | 1242 | ppc_linux_sigtramp_cache (this_frame, this_cache, func, |
a8f60bfc AC |
1243 | 0xd0 /* Offset to ucontext_t. */ |
1244 | + 0x30 /* Offset to .reg. */, | |
1245 | 0); | |
1246 | } | |
1247 | ||
1248 | static void | |
1249 | ppc64_linux_sigaction_cache_init (const struct tramp_frame *self, | |
5366653e | 1250 | struct frame_info *this_frame, |
a8f60bfc AC |
1251 | struct trad_frame_cache *this_cache, |
1252 | CORE_ADDR func) | |
1253 | { | |
5366653e | 1254 | ppc_linux_sigtramp_cache (this_frame, this_cache, func, |
a8f60bfc AC |
1255 | 0x80 /* Offset to ucontext_t. */ |
1256 | + 0xe0 /* Offset to .reg. */, | |
1257 | 128); | |
1258 | } | |
1259 | ||
1260 | static void | |
1261 | ppc32_linux_sighandler_cache_init (const struct tramp_frame *self, | |
5366653e | 1262 | struct frame_info *this_frame, |
a8f60bfc AC |
1263 | struct trad_frame_cache *this_cache, |
1264 | CORE_ADDR func) | |
1265 | { | |
5366653e | 1266 | ppc_linux_sigtramp_cache (this_frame, this_cache, func, |
a8f60bfc AC |
1267 | 0x40 /* Offset to ucontext_t. */ |
1268 | + 0x1c /* Offset to .reg. */, | |
1269 | 0); | |
1270 | } | |
1271 | ||
1272 | static void | |
1273 | ppc64_linux_sighandler_cache_init (const struct tramp_frame *self, | |
5366653e | 1274 | struct frame_info *this_frame, |
a8f60bfc AC |
1275 | struct trad_frame_cache *this_cache, |
1276 | CORE_ADDR func) | |
1277 | { | |
5366653e | 1278 | ppc_linux_sigtramp_cache (this_frame, this_cache, func, |
a8f60bfc AC |
1279 | 0x80 /* Offset to struct sigcontext. */ |
1280 | + 0x38 /* Offset to .reg. */, | |
1281 | 128); | |
1282 | } | |
1283 | ||
1284 | static struct tramp_frame ppc32_linux_sigaction_tramp_frame = { | |
1285 | SIGTRAMP_FRAME, | |
1286 | 4, | |
1287 | { | |
7bc02706 TT |
1288 | { 0x380000ac, ULONGEST_MAX }, /* li r0, 172 */ |
1289 | { 0x44000002, ULONGEST_MAX }, /* sc */ | |
a8f60bfc AC |
1290 | { TRAMP_SENTINEL_INSN }, |
1291 | }, | |
1292 | ppc32_linux_sigaction_cache_init | |
1293 | }; | |
1294 | static struct tramp_frame ppc64_linux_sigaction_tramp_frame = { | |
1295 | SIGTRAMP_FRAME, | |
1296 | 4, | |
1297 | { | |
7bc02706 TT |
1298 | { 0x38210080, ULONGEST_MAX }, /* addi r1,r1,128 */ |
1299 | { 0x380000ac, ULONGEST_MAX }, /* li r0, 172 */ | |
1300 | { 0x44000002, ULONGEST_MAX }, /* sc */ | |
a8f60bfc AC |
1301 | { TRAMP_SENTINEL_INSN }, |
1302 | }, | |
1303 | ppc64_linux_sigaction_cache_init | |
1304 | }; | |
1305 | static struct tramp_frame ppc32_linux_sighandler_tramp_frame = { | |
1306 | SIGTRAMP_FRAME, | |
1307 | 4, | |
1308 | { | |
7bc02706 TT |
1309 | { 0x38000077, ULONGEST_MAX }, /* li r0,119 */ |
1310 | { 0x44000002, ULONGEST_MAX }, /* sc */ | |
a8f60bfc AC |
1311 | { TRAMP_SENTINEL_INSN }, |
1312 | }, | |
1313 | ppc32_linux_sighandler_cache_init | |
1314 | }; | |
1315 | static struct tramp_frame ppc64_linux_sighandler_tramp_frame = { | |
1316 | SIGTRAMP_FRAME, | |
1317 | 4, | |
1318 | { | |
7bc02706 TT |
1319 | { 0x38210080, ULONGEST_MAX }, /* addi r1,r1,128 */ |
1320 | { 0x38000077, ULONGEST_MAX }, /* li r0,119 */ | |
1321 | { 0x44000002, ULONGEST_MAX }, /* sc */ | |
a8f60bfc AC |
1322 | { TRAMP_SENTINEL_INSN }, |
1323 | }, | |
1324 | ppc64_linux_sighandler_cache_init | |
1325 | }; | |
1326 | ||
7284e1be UW |
1327 | /* Return 1 if PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM are usable. */ |
1328 | int | |
1329 | ppc_linux_trap_reg_p (struct gdbarch *gdbarch) | |
1330 | { | |
1331 | /* If we do not have a target description with registers, then | |
1332 | the special registers will not be included in the register set. */ | |
1333 | if (!tdesc_has_registers (gdbarch_target_desc (gdbarch))) | |
1334 | return 0; | |
1335 | ||
1336 | /* If we do, then it is safe to check the size. */ | |
1337 | return register_size (gdbarch, PPC_ORIG_R3_REGNUM) > 0 | |
1338 | && register_size (gdbarch, PPC_TRAP_REGNUM) > 0; | |
1339 | } | |
1340 | ||
a96d9b2e SDJ |
1341 | /* Return the current system call's number present in the |
1342 | r0 register. When the function fails, it returns -1. */ | |
1343 | static LONGEST | |
1344 | ppc_linux_get_syscall_number (struct gdbarch *gdbarch, | |
00431a78 | 1345 | thread_info *thread) |
a96d9b2e | 1346 | { |
00431a78 | 1347 | struct regcache *regcache = get_thread_regcache (thread); |
a96d9b2e SDJ |
1348 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
1349 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
a96d9b2e SDJ |
1350 | |
1351 | /* Make sure we're in a 32- or 64-bit machine */ | |
1352 | gdb_assert (tdep->wordsize == 4 || tdep->wordsize == 8); | |
1353 | ||
779bc38e TT |
1354 | /* The content of a register */ |
1355 | gdb::byte_vector buf (tdep->wordsize); | |
a96d9b2e SDJ |
1356 | |
1357 | /* Getting the system call number from the register. | |
1358 | When dealing with PowerPC architecture, this information | |
1359 | is stored at 0th register. */ | |
dca08e1f | 1360 | regcache->cooked_read (tdep->ppc_gp0_regnum, buf.data ()); |
a96d9b2e | 1361 | |
779bc38e | 1362 | return extract_signed_integer (buf.data (), tdep->wordsize, byte_order); |
a96d9b2e SDJ |
1363 | } |
1364 | ||
b4cdae6f WW |
1365 | /* PPC process record-replay */ |
1366 | ||
1367 | static struct linux_record_tdep ppc_linux_record_tdep; | |
1368 | static struct linux_record_tdep ppc64_linux_record_tdep; | |
1369 | ||
ddeca1df WW |
1370 | /* ppc_canonicalize_syscall maps from the native PowerPC Linux set of |
1371 | syscall ids into a canonical set of syscall ids used by process | |
1372 | record. (See arch/powerpc/include/uapi/asm/unistd.h in kernel tree.) | |
1373 | Return -1 if this system call is not supported by process record. | |
1374 | Otherwise, return the syscall number for preocess reocrd of given | |
1375 | SYSCALL. */ | |
1376 | ||
b4cdae6f WW |
1377 | static enum gdb_syscall |
1378 | ppc_canonicalize_syscall (int syscall) | |
1379 | { | |
aead7601 SM |
1380 | int result = -1; |
1381 | ||
b4cdae6f | 1382 | if (syscall <= 165) |
aead7601 | 1383 | result = syscall; |
b4cdae6f | 1384 | else if (syscall >= 167 && syscall <= 190) /* Skip query_module 166 */ |
aead7601 | 1385 | result = syscall + 1; |
b4cdae6f | 1386 | else if (syscall >= 192 && syscall <= 197) /* mmap2 */ |
aead7601 | 1387 | result = syscall; |
b4cdae6f | 1388 | else if (syscall == 208) /* tkill */ |
aead7601 | 1389 | result = gdb_sys_tkill; |
b4cdae6f | 1390 | else if (syscall >= 207 && syscall <= 220) /* gettid */ |
aead7601 | 1391 | result = syscall + 224 - 207; |
b4cdae6f | 1392 | else if (syscall >= 234 && syscall <= 239) /* exit_group */ |
aead7601 SM |
1393 | result = syscall + 252 - 234; |
1394 | else if (syscall >= 240 && syscall <= 248) /* timer_create */ | |
1395 | result = syscall += 259 - 240; | |
1396 | else if (syscall >= 250 && syscall <= 251) /* tgkill */ | |
1397 | result = syscall + 270 - 250; | |
b4cdae6f | 1398 | else if (syscall == 336) |
aead7601 | 1399 | result = gdb_sys_recv; |
b4cdae6f | 1400 | else if (syscall == 337) |
aead7601 | 1401 | result = gdb_sys_recvfrom; |
b4cdae6f | 1402 | else if (syscall == 342) |
aead7601 SM |
1403 | result = gdb_sys_recvmsg; |
1404 | ||
1405 | return (enum gdb_syscall) result; | |
b4cdae6f WW |
1406 | } |
1407 | ||
ddeca1df WW |
1408 | /* Record registers which might be clobbered during system call. |
1409 | Return 0 if successful. */ | |
1410 | ||
b4cdae6f WW |
1411 | static int |
1412 | ppc_linux_syscall_record (struct regcache *regcache) | |
1413 | { | |
ac7936df | 1414 | struct gdbarch *gdbarch = regcache->arch (); |
b4cdae6f WW |
1415 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
1416 | ULONGEST scnum; | |
1417 | enum gdb_syscall syscall_gdb; | |
1418 | int ret; | |
b4cdae6f WW |
1419 | |
1420 | regcache_raw_read_unsigned (regcache, tdep->ppc_gp0_regnum, &scnum); | |
1421 | syscall_gdb = ppc_canonicalize_syscall (scnum); | |
1422 | ||
1423 | if (syscall_gdb < 0) | |
1424 | { | |
1425 | printf_unfiltered (_("Process record and replay target doesn't " | |
1426 | "support syscall number %d\n"), (int) scnum); | |
1427 | return 0; | |
1428 | } | |
1429 | ||
1430 | if (syscall_gdb == gdb_sys_sigreturn | |
1431 | || syscall_gdb == gdb_sys_rt_sigreturn) | |
1432 | { | |
1433 | int i, j; | |
1434 | int regsets[] = { tdep->ppc_gp0_regnum, | |
1435 | tdep->ppc_fp0_regnum, | |
1436 | tdep->ppc_vr0_regnum, | |
1437 | tdep->ppc_vsr0_upper_regnum }; | |
1438 | ||
1439 | for (j = 0; j < 4; j++) | |
1440 | { | |
1441 | if (regsets[j] == -1) | |
1442 | continue; | |
1443 | for (i = 0; i < 32; i++) | |
1444 | { | |
1445 | if (record_full_arch_list_add_reg (regcache, regsets[j] + i)) | |
1446 | return -1; | |
1447 | } | |
1448 | } | |
1449 | ||
1450 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_cr_regnum)) | |
1451 | return -1; | |
1452 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_ctr_regnum)) | |
1453 | return -1; | |
1454 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_lr_regnum)) | |
1455 | return -1; | |
1456 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_xer_regnum)) | |
1457 | return -1; | |
1458 | ||
1459 | return 0; | |
1460 | } | |
1461 | ||
1462 | if (tdep->wordsize == 8) | |
1463 | ret = record_linux_system_call (syscall_gdb, regcache, | |
1464 | &ppc64_linux_record_tdep); | |
1465 | else | |
1466 | ret = record_linux_system_call (syscall_gdb, regcache, | |
1467 | &ppc_linux_record_tdep); | |
1468 | ||
1469 | if (ret != 0) | |
1470 | return ret; | |
1471 | ||
1472 | /* Record registers clobbered during syscall. */ | |
b926417a | 1473 | for (int i = 3; i <= 12; i++) |
b4cdae6f WW |
1474 | { |
1475 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_gp0_regnum + i)) | |
1476 | return -1; | |
1477 | } | |
1478 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_gp0_regnum + 0)) | |
1479 | return -1; | |
1480 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_cr_regnum)) | |
1481 | return -1; | |
1482 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_ctr_regnum)) | |
1483 | return -1; | |
1484 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_lr_regnum)) | |
1485 | return -1; | |
1486 | ||
1487 | return 0; | |
1488 | } | |
1489 | ||
ddeca1df WW |
1490 | /* Record registers which might be clobbered during signal handling. |
1491 | Return 0 if successful. */ | |
1492 | ||
b4cdae6f WW |
1493 | static int |
1494 | ppc_linux_record_signal (struct gdbarch *gdbarch, struct regcache *regcache, | |
1495 | enum gdb_signal signal) | |
1496 | { | |
1497 | /* See handle_rt_signal64 in arch/powerpc/kernel/signal_64.c | |
1498 | handle_rt_signal32 in arch/powerpc/kernel/signal_32.c | |
1499 | arch/powerpc/include/asm/ptrace.h | |
1500 | for details. */ | |
1501 | const int SIGNAL_FRAMESIZE = 128; | |
1502 | const int sizeof_rt_sigframe = 1440 * 2 + 8 * 2 + 4 * 6 + 8 + 8 + 128 + 512; | |
1503 | ULONGEST sp; | |
1504 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
1505 | int i; | |
1506 | ||
1507 | for (i = 3; i <= 12; i++) | |
1508 | { | |
1509 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_gp0_regnum + i)) | |
1510 | return -1; | |
1511 | } | |
1512 | ||
1513 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_lr_regnum)) | |
1514 | return -1; | |
1515 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_cr_regnum)) | |
1516 | return -1; | |
1517 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_ctr_regnum)) | |
1518 | return -1; | |
1519 | if (record_full_arch_list_add_reg (regcache, gdbarch_pc_regnum (gdbarch))) | |
1520 | return -1; | |
1521 | if (record_full_arch_list_add_reg (regcache, gdbarch_sp_regnum (gdbarch))) | |
1522 | return -1; | |
1523 | ||
1524 | /* Record the change in the stack. | |
1525 | frame-size = sizeof (struct rt_sigframe) + SIGNAL_FRAMESIZE */ | |
1526 | regcache_raw_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch), &sp); | |
1527 | sp -= SIGNAL_FRAMESIZE; | |
1528 | sp -= sizeof_rt_sigframe; | |
1529 | ||
1530 | if (record_full_arch_list_add_mem (sp, SIGNAL_FRAMESIZE + sizeof_rt_sigframe)) | |
1531 | return -1; | |
1532 | ||
1533 | if (record_full_arch_list_add_end ()) | |
1534 | return -1; | |
1535 | ||
1536 | return 0; | |
1537 | } | |
1538 | ||
7284e1be UW |
1539 | static void |
1540 | ppc_linux_write_pc (struct regcache *regcache, CORE_ADDR pc) | |
1541 | { | |
ac7936df | 1542 | struct gdbarch *gdbarch = regcache->arch (); |
7284e1be UW |
1543 | |
1544 | regcache_cooked_write_unsigned (regcache, gdbarch_pc_regnum (gdbarch), pc); | |
1545 | ||
1546 | /* Set special TRAP register to -1 to prevent the kernel from | |
1547 | messing with the PC we just installed, if we happen to be | |
1548 | within an interrupted system call that the kernel wants to | |
1549 | restart. | |
1550 | ||
1551 | Note that after we return from the dummy call, the TRAP and | |
1552 | ORIG_R3 registers will be automatically restored, and the | |
1553 | kernel continues to restart the system call at this point. */ | |
1554 | if (ppc_linux_trap_reg_p (gdbarch)) | |
1555 | regcache_cooked_write_unsigned (regcache, PPC_TRAP_REGNUM, -1); | |
1556 | } | |
1557 | ||
f4d9bade UW |
1558 | static int |
1559 | ppc_linux_spu_section (bfd *abfd, asection *asect, void *user_data) | |
1560 | { | |
61012eef | 1561 | return startswith (bfd_section_name (abfd, asect), "SPU/"); |
f4d9bade UW |
1562 | } |
1563 | ||
7284e1be UW |
1564 | static const struct target_desc * |
1565 | ppc_linux_core_read_description (struct gdbarch *gdbarch, | |
1566 | struct target_ops *target, | |
1567 | bfd *abfd) | |
1568 | { | |
bd64614e | 1569 | struct ppc_linux_features features = ppc_linux_no_features; |
f4d9bade | 1570 | asection *cell = bfd_sections_find_if (abfd, ppc_linux_spu_section, NULL); |
7284e1be | 1571 | asection *altivec = bfd_get_section_by_name (abfd, ".reg-ppc-vmx"); |
604c2f83 | 1572 | asection *vsx = bfd_get_section_by_name (abfd, ".reg-ppc-vsx"); |
7284e1be | 1573 | asection *section = bfd_get_section_by_name (abfd, ".reg"); |
7ca18ed6 EBM |
1574 | asection *ppr = bfd_get_section_by_name (abfd, ".reg-ppc-ppr"); |
1575 | asection *dscr = bfd_get_section_by_name (abfd, ".reg-ppc-dscr"); | |
f2cf6173 | 1576 | asection *tar = bfd_get_section_by_name (abfd, ".reg-ppc-tar"); |
232bfb86 | 1577 | asection *pmu = bfd_get_section_by_name (abfd, ".reg-ppc-pmu"); |
8d619c01 | 1578 | asection *htmspr = bfd_get_section_by_name (abfd, ".reg-ppc-tm-spr"); |
bd64614e | 1579 | |
7284e1be UW |
1580 | if (! section) |
1581 | return NULL; | |
1582 | ||
1583 | switch (bfd_section_size (abfd, section)) | |
1584 | { | |
1585 | case 48 * 4: | |
bd64614e PFC |
1586 | features.wordsize = 4; |
1587 | break; | |
7284e1be | 1588 | case 48 * 8: |
bd64614e PFC |
1589 | features.wordsize = 8; |
1590 | break; | |
7284e1be UW |
1591 | default: |
1592 | return NULL; | |
1593 | } | |
bd64614e PFC |
1594 | |
1595 | if (cell) | |
1596 | features.cell = true; | |
1597 | ||
1598 | if (altivec) | |
1599 | features.altivec = true; | |
1600 | ||
1601 | if (vsx) | |
1602 | features.vsx = true; | |
1603 | ||
0f83012e | 1604 | CORE_ADDR hwcap = linux_get_hwcap (target); |
0ec848ad PFC |
1605 | |
1606 | features.isa205 = ppc_linux_has_isa205 (hwcap); | |
1607 | ||
7ca18ed6 | 1608 | if (ppr && dscr) |
f2cf6173 EBM |
1609 | { |
1610 | features.ppr_dscr = true; | |
232bfb86 EBM |
1611 | |
1612 | /* We don't require the EBB note section to be present in the | |
1613 | core file to select isa207 because these registers could have | |
1614 | been unavailable when the core file was created. They will | |
1615 | be in the tdep but will show as unavailable. */ | |
1616 | if (tar && pmu) | |
8d619c01 EBM |
1617 | { |
1618 | features.isa207 = true; | |
1619 | if (htmspr) | |
1620 | features.htm = true; | |
1621 | } | |
f2cf6173 | 1622 | } |
7ca18ed6 | 1623 | |
bd64614e | 1624 | return ppc_linux_match_description (features); |
7284e1be UW |
1625 | } |
1626 | ||
591a12a1 UW |
1627 | |
1628 | /* Implementation of `gdbarch_elf_make_msymbol_special', as defined in | |
1629 | gdbarch.h. This implementation is used for the ELFv2 ABI only. */ | |
1630 | ||
1631 | static void | |
1632 | ppc_elfv2_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym) | |
1633 | { | |
1634 | elf_symbol_type *elf_sym = (elf_symbol_type *)sym; | |
1635 | ||
1636 | /* If the symbol is marked as having a local entry point, set a target | |
1637 | flag in the msymbol. We currently only support local entry point | |
1638 | offsets of 8 bytes, which is the only entry point offset ever used | |
1639 | by current compilers. If/when other offsets are ever used, we will | |
1640 | have to use additional target flag bits to store them. */ | |
1641 | switch (PPC64_LOCAL_ENTRY_OFFSET (elf_sym->internal_elf_sym.st_other)) | |
1642 | { | |
1643 | default: | |
1644 | break; | |
1645 | case 8: | |
1646 | MSYMBOL_TARGET_FLAG_1 (msym) = 1; | |
1647 | break; | |
1648 | } | |
1649 | } | |
1650 | ||
1651 | /* Implementation of `gdbarch_skip_entrypoint', as defined in | |
1652 | gdbarch.h. This implementation is used for the ELFv2 ABI only. */ | |
1653 | ||
1654 | static CORE_ADDR | |
1655 | ppc_elfv2_skip_entrypoint (struct gdbarch *gdbarch, CORE_ADDR pc) | |
1656 | { | |
1657 | struct bound_minimal_symbol fun; | |
1658 | int local_entry_offset = 0; | |
1659 | ||
1660 | fun = lookup_minimal_symbol_by_pc (pc); | |
1661 | if (fun.minsym == NULL) | |
1662 | return pc; | |
1663 | ||
1664 | /* See ppc_elfv2_elf_make_msymbol_special for how local entry point | |
1665 | offset values are encoded. */ | |
1666 | if (MSYMBOL_TARGET_FLAG_1 (fun.minsym)) | |
1667 | local_entry_offset = 8; | |
1668 | ||
77e371c0 TT |
1669 | if (BMSYMBOL_VALUE_ADDRESS (fun) <= pc |
1670 | && pc < BMSYMBOL_VALUE_ADDRESS (fun) + local_entry_offset) | |
1671 | return BMSYMBOL_VALUE_ADDRESS (fun) + local_entry_offset; | |
591a12a1 UW |
1672 | |
1673 | return pc; | |
1674 | } | |
1675 | ||
55aa24fb SDJ |
1676 | /* Implementation of `gdbarch_stap_is_single_operand', as defined in |
1677 | gdbarch.h. */ | |
1678 | ||
1679 | static int | |
1680 | ppc_stap_is_single_operand (struct gdbarch *gdbarch, const char *s) | |
1681 | { | |
1682 | return (*s == 'i' /* Literal number. */ | |
1683 | || (isdigit (*s) && s[1] == '(' | |
1684 | && isdigit (s[2])) /* Displacement. */ | |
1685 | || (*s == '(' && isdigit (s[1])) /* Register indirection. */ | |
1686 | || isdigit (*s)); /* Register value. */ | |
1687 | } | |
1688 | ||
1689 | /* Implementation of `gdbarch_stap_parse_special_token', as defined in | |
1690 | gdbarch.h. */ | |
1691 | ||
1692 | static int | |
1693 | ppc_stap_parse_special_token (struct gdbarch *gdbarch, | |
1694 | struct stap_parse_info *p) | |
1695 | { | |
1696 | if (isdigit (*p->arg)) | |
1697 | { | |
1698 | /* This temporary pointer is needed because we have to do a lookahead. | |
1699 | We could be dealing with a register displacement, and in such case | |
1700 | we would not need to do anything. */ | |
1701 | const char *s = p->arg; | |
1702 | char *regname; | |
1703 | int len; | |
1704 | struct stoken str; | |
1705 | ||
1706 | while (isdigit (*s)) | |
1707 | ++s; | |
1708 | ||
1709 | if (*s == '(') | |
1710 | { | |
1711 | /* It is a register displacement indeed. Returning 0 means we are | |
1712 | deferring the treatment of this case to the generic parser. */ | |
1713 | return 0; | |
1714 | } | |
1715 | ||
1716 | len = s - p->arg; | |
224c3ddb | 1717 | regname = (char *) alloca (len + 2); |
55aa24fb SDJ |
1718 | regname[0] = 'r'; |
1719 | ||
1720 | strncpy (regname + 1, p->arg, len); | |
1721 | ++len; | |
1722 | regname[len] = '\0'; | |
1723 | ||
1724 | if (user_reg_map_name_to_regnum (gdbarch, regname, len) == -1) | |
1725 | error (_("Invalid register name `%s' on expression `%s'."), | |
1726 | regname, p->saved_arg); | |
1727 | ||
410a0ff2 | 1728 | write_exp_elt_opcode (&p->pstate, OP_REGISTER); |
55aa24fb SDJ |
1729 | str.ptr = regname; |
1730 | str.length = len; | |
410a0ff2 SDJ |
1731 | write_exp_string (&p->pstate, str); |
1732 | write_exp_elt_opcode (&p->pstate, OP_REGISTER); | |
55aa24fb SDJ |
1733 | |
1734 | p->arg = s; | |
1735 | } | |
1736 | else | |
1737 | { | |
1738 | /* All the other tokens should be handled correctly by the generic | |
1739 | parser. */ | |
1740 | return 0; | |
1741 | } | |
1742 | ||
1743 | return 1; | |
1744 | } | |
cc5f0d61 UW |
1745 | |
1746 | /* Cell/B.E. active SPE context tracking support. */ | |
1747 | ||
1748 | static struct objfile *spe_context_objfile = NULL; | |
1749 | static CORE_ADDR spe_context_lm_addr = 0; | |
1750 | static CORE_ADDR spe_context_offset = 0; | |
1751 | ||
1752 | static ptid_t spe_context_cache_ptid; | |
1753 | static CORE_ADDR spe_context_cache_address; | |
1754 | ||
1755 | /* Hook into inferior_created, solib_loaded, and solib_unloaded observers | |
1756 | to track whether we've loaded a version of libspe2 (as static or dynamic | |
1757 | library) that provides the __spe_current_active_context variable. */ | |
1758 | static void | |
1759 | ppc_linux_spe_context_lookup (struct objfile *objfile) | |
1760 | { | |
3b7344d5 | 1761 | struct bound_minimal_symbol sym; |
cc5f0d61 UW |
1762 | |
1763 | if (!objfile) | |
1764 | { | |
1765 | spe_context_objfile = NULL; | |
1766 | spe_context_lm_addr = 0; | |
1767 | spe_context_offset = 0; | |
1768 | spe_context_cache_ptid = minus_one_ptid; | |
1769 | spe_context_cache_address = 0; | |
1770 | return; | |
1771 | } | |
1772 | ||
1773 | sym = lookup_minimal_symbol ("__spe_current_active_context", NULL, objfile); | |
3b7344d5 | 1774 | if (sym.minsym) |
cc5f0d61 UW |
1775 | { |
1776 | spe_context_objfile = objfile; | |
1777 | spe_context_lm_addr = svr4_fetch_objfile_link_map (objfile); | |
ef36892e | 1778 | spe_context_offset = MSYMBOL_VALUE_RAW_ADDRESS (sym.minsym); |
cc5f0d61 UW |
1779 | spe_context_cache_ptid = minus_one_ptid; |
1780 | spe_context_cache_address = 0; | |
1781 | return; | |
1782 | } | |
1783 | } | |
1784 | ||
1785 | static void | |
1786 | ppc_linux_spe_context_inferior_created (struct target_ops *t, int from_tty) | |
1787 | { | |
cc5f0d61 | 1788 | ppc_linux_spe_context_lookup (NULL); |
2030c079 | 1789 | for (objfile *objfile : current_program_space->objfiles ()) |
cc5f0d61 UW |
1790 | ppc_linux_spe_context_lookup (objfile); |
1791 | } | |
1792 | ||
1793 | static void | |
1794 | ppc_linux_spe_context_solib_loaded (struct so_list *so) | |
1795 | { | |
1796 | if (strstr (so->so_original_name, "/libspe") != NULL) | |
1797 | { | |
7e559477 | 1798 | solib_read_symbols (so, 0); |
cc5f0d61 UW |
1799 | ppc_linux_spe_context_lookup (so->objfile); |
1800 | } | |
1801 | } | |
1802 | ||
1803 | static void | |
1804 | ppc_linux_spe_context_solib_unloaded (struct so_list *so) | |
1805 | { | |
1806 | if (so->objfile == spe_context_objfile) | |
1807 | ppc_linux_spe_context_lookup (NULL); | |
1808 | } | |
1809 | ||
1810 | /* Retrieve contents of the N'th element in the current thread's | |
1811 | linked SPE context list into ID and NPC. Return the address of | |
1812 | said context element, or 0 if not found. */ | |
1813 | static CORE_ADDR | |
1814 | ppc_linux_spe_context (int wordsize, enum bfd_endian byte_order, | |
1815 | int n, int *id, unsigned int *npc) | |
1816 | { | |
1817 | CORE_ADDR spe_context = 0; | |
1818 | gdb_byte buf[16]; | |
1819 | int i; | |
1820 | ||
1821 | /* Quick exit if we have not found __spe_current_active_context. */ | |
1822 | if (!spe_context_objfile) | |
1823 | return 0; | |
1824 | ||
1825 | /* Look up cached address of thread-local variable. */ | |
d7e15655 | 1826 | if (spe_context_cache_ptid != inferior_ptid) |
cc5f0d61 | 1827 | { |
8b88a78e | 1828 | struct target_ops *target = current_top_target (); |
cc5f0d61 | 1829 | |
a70b8144 | 1830 | try |
cc5f0d61 UW |
1831 | { |
1832 | /* We do not call target_translate_tls_address here, because | |
1833 | svr4_fetch_objfile_link_map may invalidate the frame chain, | |
1834 | which must not do while inside a frame sniffer. | |
1835 | ||
1836 | Instead, we have cached the lm_addr value, and use that to | |
1837 | directly call the target's to_get_thread_local_address. */ | |
1838 | spe_context_cache_address | |
f6ac5f3d PA |
1839 | = target->get_thread_local_address (inferior_ptid, |
1840 | spe_context_lm_addr, | |
1841 | spe_context_offset); | |
cc5f0d61 UW |
1842 | spe_context_cache_ptid = inferior_ptid; |
1843 | } | |
1844 | ||
230d2906 | 1845 | catch (const gdb_exception_error &ex) |
492d29ea PA |
1846 | { |
1847 | return 0; | |
1848 | } | |
cc5f0d61 UW |
1849 | } |
1850 | ||
1851 | /* Read variable value. */ | |
1852 | if (target_read_memory (spe_context_cache_address, buf, wordsize) == 0) | |
1853 | spe_context = extract_unsigned_integer (buf, wordsize, byte_order); | |
1854 | ||
1855 | /* Cyle through to N'th linked list element. */ | |
1856 | for (i = 0; i < n && spe_context; i++) | |
1857 | if (target_read_memory (spe_context + align_up (12, wordsize), | |
1858 | buf, wordsize) == 0) | |
1859 | spe_context = extract_unsigned_integer (buf, wordsize, byte_order); | |
1860 | else | |
1861 | spe_context = 0; | |
1862 | ||
1863 | /* Read current context. */ | |
1864 | if (spe_context | |
1865 | && target_read_memory (spe_context, buf, 12) != 0) | |
1866 | spe_context = 0; | |
1867 | ||
1868 | /* Extract data elements. */ | |
1869 | if (spe_context) | |
1870 | { | |
1871 | if (id) | |
1872 | *id = extract_signed_integer (buf, 4, byte_order); | |
1873 | if (npc) | |
1874 | *npc = extract_unsigned_integer (buf + 4, 4, byte_order); | |
1875 | } | |
1876 | ||
1877 | return spe_context; | |
1878 | } | |
1879 | ||
1880 | ||
1881 | /* Cell/B.E. cross-architecture unwinder support. */ | |
1882 | ||
1883 | struct ppu2spu_cache | |
1884 | { | |
1885 | struct frame_id frame_id; | |
daf6667d | 1886 | readonly_detached_regcache *regcache; |
cc5f0d61 UW |
1887 | }; |
1888 | ||
1889 | static struct gdbarch * | |
1890 | ppu2spu_prev_arch (struct frame_info *this_frame, void **this_cache) | |
1891 | { | |
19ba03f4 | 1892 | struct ppu2spu_cache *cache = (struct ppu2spu_cache *) *this_cache; |
ac7936df | 1893 | return cache->regcache->arch (); |
cc5f0d61 UW |
1894 | } |
1895 | ||
1896 | static void | |
1897 | ppu2spu_this_id (struct frame_info *this_frame, | |
1898 | void **this_cache, struct frame_id *this_id) | |
1899 | { | |
19ba03f4 | 1900 | struct ppu2spu_cache *cache = (struct ppu2spu_cache *) *this_cache; |
cc5f0d61 UW |
1901 | *this_id = cache->frame_id; |
1902 | } | |
1903 | ||
1904 | static struct value * | |
1905 | ppu2spu_prev_register (struct frame_info *this_frame, | |
1906 | void **this_cache, int regnum) | |
1907 | { | |
19ba03f4 | 1908 | struct ppu2spu_cache *cache = (struct ppu2spu_cache *) *this_cache; |
ac7936df | 1909 | struct gdbarch *gdbarch = cache->regcache->arch (); |
cc5f0d61 UW |
1910 | gdb_byte *buf; |
1911 | ||
224c3ddb | 1912 | buf = (gdb_byte *) alloca (register_size (gdbarch, regnum)); |
a536c6d7 | 1913 | |
d679c21a | 1914 | cache->regcache->cooked_read (regnum, buf); |
cc5f0d61 UW |
1915 | return frame_unwind_got_bytes (this_frame, regnum, buf); |
1916 | } | |
1917 | ||
1918 | struct ppu2spu_data | |
1919 | { | |
1920 | struct gdbarch *gdbarch; | |
1921 | int id; | |
1922 | unsigned int npc; | |
1923 | gdb_byte gprs[128*16]; | |
1924 | }; | |
1925 | ||
f486487f | 1926 | static enum register_status |
302abd6e | 1927 | ppu2spu_unwind_register (ppu2spu_data *data, int regnum, gdb_byte *buf) |
cc5f0d61 | 1928 | { |
cc5f0d61 UW |
1929 | enum bfd_endian byte_order = gdbarch_byte_order (data->gdbarch); |
1930 | ||
1931 | if (regnum >= 0 && regnum < SPU_NUM_GPRS) | |
1932 | memcpy (buf, data->gprs + 16*regnum, 16); | |
1933 | else if (regnum == SPU_ID_REGNUM) | |
1934 | store_unsigned_integer (buf, 4, byte_order, data->id); | |
1935 | else if (regnum == SPU_PC_REGNUM) | |
1936 | store_unsigned_integer (buf, 4, byte_order, data->npc); | |
1937 | else | |
a536c6d7 | 1938 | return REG_UNAVAILABLE; |
cc5f0d61 | 1939 | |
a536c6d7 | 1940 | return REG_VALID; |
cc5f0d61 UW |
1941 | } |
1942 | ||
1943 | static int | |
1944 | ppu2spu_sniffer (const struct frame_unwind *self, | |
1945 | struct frame_info *this_frame, void **this_prologue_cache) | |
1946 | { | |
1947 | struct gdbarch *gdbarch = get_frame_arch (this_frame); | |
1948 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
1949 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
1950 | struct ppu2spu_data data; | |
1951 | struct frame_info *fi; | |
1952 | CORE_ADDR base, func, backchain, spe_context; | |
1953 | gdb_byte buf[8]; | |
1954 | int n = 0; | |
1955 | ||
1956 | /* Count the number of SPU contexts already in the frame chain. */ | |
1957 | for (fi = get_next_frame (this_frame); fi; fi = get_next_frame (fi)) | |
1958 | if (get_frame_type (fi) == ARCH_FRAME | |
1959 | && gdbarch_bfd_arch_info (get_frame_arch (fi))->arch == bfd_arch_spu) | |
1960 | n++; | |
1961 | ||
1962 | base = get_frame_sp (this_frame); | |
1963 | func = get_frame_pc (this_frame); | |
1964 | if (target_read_memory (base, buf, tdep->wordsize)) | |
1965 | return 0; | |
1966 | backchain = extract_unsigned_integer (buf, tdep->wordsize, byte_order); | |
1967 | ||
1968 | spe_context = ppc_linux_spe_context (tdep->wordsize, byte_order, | |
1969 | n, &data.id, &data.npc); | |
1970 | if (spe_context && base <= spe_context && spe_context < backchain) | |
1971 | { | |
1972 | char annex[32]; | |
1973 | ||
1974 | /* Find gdbarch for SPU. */ | |
1975 | struct gdbarch_info info; | |
1976 | gdbarch_info_init (&info); | |
1977 | info.bfd_arch_info = bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu); | |
1978 | info.byte_order = BFD_ENDIAN_BIG; | |
1979 | info.osabi = GDB_OSABI_LINUX; | |
0dba2a6c | 1980 | info.id = &data.id; |
cc5f0d61 UW |
1981 | data.gdbarch = gdbarch_find_by_info (info); |
1982 | if (!data.gdbarch) | |
1983 | return 0; | |
1984 | ||
1985 | xsnprintf (annex, sizeof annex, "%d/regs", data.id); | |
8b88a78e | 1986 | if (target_read (current_top_target (), TARGET_OBJECT_SPU, annex, |
cc5f0d61 UW |
1987 | data.gprs, 0, sizeof data.gprs) |
1988 | == sizeof data.gprs) | |
1989 | { | |
b926417a | 1990 | auto cooked_read = [&data] (int regnum, gdb_byte *out_buf) |
302abd6e | 1991 | { |
b926417a | 1992 | return ppu2spu_unwind_register (&data, regnum, out_buf); |
302abd6e | 1993 | }; |
cc5f0d61 UW |
1994 | struct ppu2spu_cache *cache |
1995 | = FRAME_OBSTACK_CALLOC (1, struct ppu2spu_cache); | |
daf6667d | 1996 | std::unique_ptr<readonly_detached_regcache> regcache |
302abd6e | 1997 | (new readonly_detached_regcache (data.gdbarch, cooked_read)); |
cc5f0d61 UW |
1998 | |
1999 | cache->frame_id = frame_id_build (base, func); | |
9ac86b52 | 2000 | cache->regcache = regcache.release (); |
cc5f0d61 UW |
2001 | *this_prologue_cache = cache; |
2002 | return 1; | |
2003 | } | |
2004 | } | |
2005 | ||
2006 | return 0; | |
2007 | } | |
2008 | ||
2009 | static void | |
2010 | ppu2spu_dealloc_cache (struct frame_info *self, void *this_cache) | |
2011 | { | |
19ba03f4 | 2012 | struct ppu2spu_cache *cache = (struct ppu2spu_cache *) this_cache; |
c0e383c6 | 2013 | delete cache->regcache; |
cc5f0d61 UW |
2014 | } |
2015 | ||
2016 | static const struct frame_unwind ppu2spu_unwind = { | |
2017 | ARCH_FRAME, | |
8fbca658 | 2018 | default_frame_unwind_stop_reason, |
cc5f0d61 UW |
2019 | ppu2spu_this_id, |
2020 | ppu2spu_prev_register, | |
2021 | NULL, | |
2022 | ppu2spu_sniffer, | |
2023 | ppu2spu_dealloc_cache, | |
2024 | ppu2spu_prev_arch, | |
2025 | }; | |
2026 | ||
ddeca1df WW |
2027 | /* Initialize linux_record_tdep if not initialized yet. |
2028 | WORDSIZE is 4 or 8 for 32- or 64-bit PowerPC Linux respectively. | |
2029 | Sizes of data structures are initialized accordingly. */ | |
b4cdae6f WW |
2030 | |
2031 | static void | |
2032 | ppc_init_linux_record_tdep (struct linux_record_tdep *record_tdep, | |
2033 | int wordsize) | |
2034 | { | |
2035 | /* Simply return if it had been initialized. */ | |
2036 | if (record_tdep->size_pointer != 0) | |
2037 | return; | |
2038 | ||
2039 | /* These values are the size of the type that will be used in a system | |
2040 | call. They are obtained from Linux Kernel source. */ | |
2041 | ||
2042 | if (wordsize == 8) | |
2043 | { | |
2044 | record_tdep->size_pointer = 8; | |
2045 | record_tdep->size__old_kernel_stat = 32; | |
2046 | record_tdep->size_tms = 32; | |
2047 | record_tdep->size_loff_t = 8; | |
2048 | record_tdep->size_flock = 32; | |
2049 | record_tdep->size_oldold_utsname = 45; | |
2050 | record_tdep->size_ustat = 32; | |
7571f7f2 MK |
2051 | record_tdep->size_old_sigaction = 32; |
2052 | record_tdep->size_old_sigset_t = 8; | |
b4cdae6f WW |
2053 | record_tdep->size_rlimit = 16; |
2054 | record_tdep->size_rusage = 144; | |
2055 | record_tdep->size_timeval = 16; | |
2056 | record_tdep->size_timezone = 8; | |
2057 | record_tdep->size_old_gid_t = 4; | |
2058 | record_tdep->size_old_uid_t = 4; | |
2059 | record_tdep->size_fd_set = 128; | |
72aded86 | 2060 | record_tdep->size_old_dirent = 280; |
b4cdae6f WW |
2061 | record_tdep->size_statfs = 120; |
2062 | record_tdep->size_statfs64 = 120; | |
2063 | record_tdep->size_sockaddr = 16; | |
2064 | record_tdep->size_int = 4; | |
2065 | record_tdep->size_long = 8; | |
2066 | record_tdep->size_ulong = 8; | |
2067 | record_tdep->size_msghdr = 56; | |
2068 | record_tdep->size_itimerval = 32; | |
2069 | record_tdep->size_stat = 144; | |
2070 | record_tdep->size_old_utsname = 325; | |
2071 | record_tdep->size_sysinfo = 112; | |
2072 | record_tdep->size_msqid_ds = 120; | |
2073 | record_tdep->size_shmid_ds = 112; | |
2074 | record_tdep->size_new_utsname = 390; | |
2075 | record_tdep->size_timex = 208; | |
2076 | record_tdep->size_mem_dqinfo = 24; | |
2077 | record_tdep->size_if_dqblk = 72; | |
2078 | record_tdep->size_fs_quota_stat = 80; | |
2079 | record_tdep->size_timespec = 16; | |
2080 | record_tdep->size_pollfd = 8; | |
2081 | record_tdep->size_NFS_FHSIZE = 32; | |
2082 | record_tdep->size_knfsd_fh = 132; | |
c28ebe25 | 2083 | record_tdep->size_TASK_COMM_LEN = 16; |
7571f7f2 MK |
2084 | record_tdep->size_sigaction = 32; |
2085 | record_tdep->size_sigset_t = 8; | |
b4cdae6f WW |
2086 | record_tdep->size_siginfo_t = 128; |
2087 | record_tdep->size_cap_user_data_t = 8; | |
2088 | record_tdep->size_stack_t = 24; | |
2089 | record_tdep->size_off_t = 8; | |
2090 | record_tdep->size_stat64 = 104; | |
2091 | record_tdep->size_gid_t = 4; | |
2092 | record_tdep->size_uid_t = 4; | |
2093 | record_tdep->size_PAGE_SIZE = 0x10000; /* 64KB */ | |
2094 | record_tdep->size_flock64 = 32; | |
2095 | record_tdep->size_io_event = 32; | |
2096 | record_tdep->size_iocb = 64; | |
2097 | record_tdep->size_epoll_event = 16; | |
2098 | record_tdep->size_itimerspec = 32; | |
2099 | record_tdep->size_mq_attr = 64; | |
b4cdae6f WW |
2100 | record_tdep->size_termios = 44; |
2101 | record_tdep->size_pid_t = 4; | |
2102 | record_tdep->size_winsize = 8; | |
2103 | record_tdep->size_serial_struct = 72; | |
2104 | record_tdep->size_serial_icounter_struct = 80; | |
2105 | record_tdep->size_size_t = 8; | |
2106 | record_tdep->size_iovec = 16; | |
b80d067f | 2107 | record_tdep->size_time_t = 8; |
b4cdae6f WW |
2108 | } |
2109 | else if (wordsize == 4) | |
2110 | { | |
2111 | record_tdep->size_pointer = 4; | |
2112 | record_tdep->size__old_kernel_stat = 32; | |
2113 | record_tdep->size_tms = 16; | |
2114 | record_tdep->size_loff_t = 8; | |
2115 | record_tdep->size_flock = 16; | |
2116 | record_tdep->size_oldold_utsname = 45; | |
2117 | record_tdep->size_ustat = 20; | |
7571f7f2 MK |
2118 | record_tdep->size_old_sigaction = 16; |
2119 | record_tdep->size_old_sigset_t = 4; | |
b4cdae6f WW |
2120 | record_tdep->size_rlimit = 8; |
2121 | record_tdep->size_rusage = 72; | |
2122 | record_tdep->size_timeval = 8; | |
2123 | record_tdep->size_timezone = 8; | |
2124 | record_tdep->size_old_gid_t = 4; | |
2125 | record_tdep->size_old_uid_t = 4; | |
2126 | record_tdep->size_fd_set = 128; | |
72aded86 | 2127 | record_tdep->size_old_dirent = 268; |
b4cdae6f WW |
2128 | record_tdep->size_statfs = 64; |
2129 | record_tdep->size_statfs64 = 88; | |
2130 | record_tdep->size_sockaddr = 16; | |
2131 | record_tdep->size_int = 4; | |
2132 | record_tdep->size_long = 4; | |
2133 | record_tdep->size_ulong = 4; | |
2134 | record_tdep->size_msghdr = 28; | |
2135 | record_tdep->size_itimerval = 16; | |
2136 | record_tdep->size_stat = 88; | |
2137 | record_tdep->size_old_utsname = 325; | |
2138 | record_tdep->size_sysinfo = 64; | |
2139 | record_tdep->size_msqid_ds = 68; | |
2140 | record_tdep->size_shmid_ds = 60; | |
2141 | record_tdep->size_new_utsname = 390; | |
2142 | record_tdep->size_timex = 128; | |
2143 | record_tdep->size_mem_dqinfo = 24; | |
2144 | record_tdep->size_if_dqblk = 72; | |
2145 | record_tdep->size_fs_quota_stat = 80; | |
2146 | record_tdep->size_timespec = 8; | |
2147 | record_tdep->size_pollfd = 8; | |
2148 | record_tdep->size_NFS_FHSIZE = 32; | |
2149 | record_tdep->size_knfsd_fh = 132; | |
c28ebe25 | 2150 | record_tdep->size_TASK_COMM_LEN = 16; |
7571f7f2 MK |
2151 | record_tdep->size_sigaction = 20; |
2152 | record_tdep->size_sigset_t = 8; | |
b4cdae6f WW |
2153 | record_tdep->size_siginfo_t = 128; |
2154 | record_tdep->size_cap_user_data_t = 4; | |
2155 | record_tdep->size_stack_t = 12; | |
2156 | record_tdep->size_off_t = 4; | |
2157 | record_tdep->size_stat64 = 104; | |
2158 | record_tdep->size_gid_t = 4; | |
2159 | record_tdep->size_uid_t = 4; | |
2160 | record_tdep->size_PAGE_SIZE = 0x10000; /* 64KB */ | |
2161 | record_tdep->size_flock64 = 32; | |
2162 | record_tdep->size_io_event = 32; | |
2163 | record_tdep->size_iocb = 64; | |
2164 | record_tdep->size_epoll_event = 16; | |
2165 | record_tdep->size_itimerspec = 16; | |
2166 | record_tdep->size_mq_attr = 32; | |
b4cdae6f WW |
2167 | record_tdep->size_termios = 44; |
2168 | record_tdep->size_pid_t = 4; | |
2169 | record_tdep->size_winsize = 8; | |
2170 | record_tdep->size_serial_struct = 60; | |
2171 | record_tdep->size_serial_icounter_struct = 80; | |
2172 | record_tdep->size_size_t = 4; | |
2173 | record_tdep->size_iovec = 8; | |
b80d067f | 2174 | record_tdep->size_time_t = 4; |
b4cdae6f WW |
2175 | } |
2176 | else | |
2177 | internal_error (__FILE__, __LINE__, _("unexpected wordsize")); | |
2178 | ||
2179 | /* These values are the second argument of system call "sys_fcntl" | |
2180 | and "sys_fcntl64". They are obtained from Linux Kernel source. */ | |
2181 | record_tdep->fcntl_F_GETLK = 5; | |
2182 | record_tdep->fcntl_F_GETLK64 = 12; | |
2183 | record_tdep->fcntl_F_SETLK64 = 13; | |
2184 | record_tdep->fcntl_F_SETLKW64 = 14; | |
2185 | ||
2186 | record_tdep->arg1 = PPC_R0_REGNUM + 3; | |
2187 | record_tdep->arg2 = PPC_R0_REGNUM + 4; | |
2188 | record_tdep->arg3 = PPC_R0_REGNUM + 5; | |
2189 | record_tdep->arg4 = PPC_R0_REGNUM + 6; | |
2190 | record_tdep->arg5 = PPC_R0_REGNUM + 7; | |
2191 | record_tdep->arg6 = PPC_R0_REGNUM + 8; | |
2192 | ||
2193 | /* These values are the second argument of system call "sys_ioctl". | |
2194 | They are obtained from Linux Kernel source. | |
2195 | See arch/powerpc/include/uapi/asm/ioctls.h. */ | |
2196 | record_tdep->ioctl_TCGETS = 0x403c7413; | |
2197 | record_tdep->ioctl_TCSETS = 0x803c7414; | |
2198 | record_tdep->ioctl_TCSETSW = 0x803c7415; | |
2199 | record_tdep->ioctl_TCSETSF = 0x803c7416; | |
2200 | record_tdep->ioctl_TCGETA = 0x40147417; | |
2201 | record_tdep->ioctl_TCSETA = 0x80147418; | |
2202 | record_tdep->ioctl_TCSETAW = 0x80147419; | |
2203 | record_tdep->ioctl_TCSETAF = 0x8014741c; | |
2204 | record_tdep->ioctl_TCSBRK = 0x2000741d; | |
2205 | record_tdep->ioctl_TCXONC = 0x2000741e; | |
2206 | record_tdep->ioctl_TCFLSH = 0x2000741f; | |
2207 | record_tdep->ioctl_TIOCEXCL = 0x540c; | |
2208 | record_tdep->ioctl_TIOCNXCL = 0x540d; | |
2209 | record_tdep->ioctl_TIOCSCTTY = 0x540e; | |
2210 | record_tdep->ioctl_TIOCGPGRP = 0x40047477; | |
2211 | record_tdep->ioctl_TIOCSPGRP = 0x80047476; | |
2212 | record_tdep->ioctl_TIOCOUTQ = 0x40047473; | |
2213 | record_tdep->ioctl_TIOCSTI = 0x5412; | |
2214 | record_tdep->ioctl_TIOCGWINSZ = 0x40087468; | |
2215 | record_tdep->ioctl_TIOCSWINSZ = 0x80087467; | |
2216 | record_tdep->ioctl_TIOCMGET = 0x5415; | |
2217 | record_tdep->ioctl_TIOCMBIS = 0x5416; | |
2218 | record_tdep->ioctl_TIOCMBIC = 0x5417; | |
2219 | record_tdep->ioctl_TIOCMSET = 0x5418; | |
2220 | record_tdep->ioctl_TIOCGSOFTCAR = 0x5419; | |
2221 | record_tdep->ioctl_TIOCSSOFTCAR = 0x541a; | |
2222 | record_tdep->ioctl_FIONREAD = 0x4004667f; | |
2223 | record_tdep->ioctl_TIOCINQ = 0x4004667f; | |
2224 | record_tdep->ioctl_TIOCLINUX = 0x541c; | |
2225 | record_tdep->ioctl_TIOCCONS = 0x541d; | |
2226 | record_tdep->ioctl_TIOCGSERIAL = 0x541e; | |
2227 | record_tdep->ioctl_TIOCSSERIAL = 0x541f; | |
2228 | record_tdep->ioctl_TIOCPKT = 0x5420; | |
2229 | record_tdep->ioctl_FIONBIO = 0x8004667e; | |
2230 | record_tdep->ioctl_TIOCNOTTY = 0x5422; | |
2231 | record_tdep->ioctl_TIOCSETD = 0x5423; | |
2232 | record_tdep->ioctl_TIOCGETD = 0x5424; | |
2233 | record_tdep->ioctl_TCSBRKP = 0x5425; | |
2234 | record_tdep->ioctl_TIOCSBRK = 0x5427; | |
2235 | record_tdep->ioctl_TIOCCBRK = 0x5428; | |
2236 | record_tdep->ioctl_TIOCGSID = 0x5429; | |
2237 | record_tdep->ioctl_TIOCGPTN = 0x40045430; | |
2238 | record_tdep->ioctl_TIOCSPTLCK = 0x80045431; | |
2239 | record_tdep->ioctl_FIONCLEX = 0x20006602; | |
2240 | record_tdep->ioctl_FIOCLEX = 0x20006601; | |
2241 | record_tdep->ioctl_FIOASYNC = 0x8004667d; | |
2242 | record_tdep->ioctl_TIOCSERCONFIG = 0x5453; | |
2243 | record_tdep->ioctl_TIOCSERGWILD = 0x5454; | |
2244 | record_tdep->ioctl_TIOCSERSWILD = 0x5455; | |
2245 | record_tdep->ioctl_TIOCGLCKTRMIOS = 0x5456; | |
2246 | record_tdep->ioctl_TIOCSLCKTRMIOS = 0x5457; | |
2247 | record_tdep->ioctl_TIOCSERGSTRUCT = 0x5458; | |
2248 | record_tdep->ioctl_TIOCSERGETLSR = 0x5459; | |
2249 | record_tdep->ioctl_TIOCSERGETMULTI = 0x545a; | |
2250 | record_tdep->ioctl_TIOCSERSETMULTI = 0x545b; | |
2251 | record_tdep->ioctl_TIOCMIWAIT = 0x545c; | |
2252 | record_tdep->ioctl_TIOCGICOUNT = 0x545d; | |
2253 | record_tdep->ioctl_FIOQSIZE = 0x40086680; | |
2254 | } | |
cc5f0d61 | 2255 | |
00d5215e UW |
2256 | /* Return a floating-point format for a floating-point variable of |
2257 | length LEN in bits. If non-NULL, NAME is the name of its type. | |
2258 | If no suitable type is found, return NULL. */ | |
2259 | ||
2260 | const struct floatformat ** | |
2261 | ppc_floatformat_for_type (struct gdbarch *gdbarch, | |
2262 | const char *name, int len) | |
2263 | { | |
2264 | if (len == 128 && name) | |
ed0f4273 UW |
2265 | { |
2266 | if (strcmp (name, "__float128") == 0 | |
2267 | || strcmp (name, "_Float128") == 0 | |
2268 | || strcmp (name, "_Float64x") == 0 | |
2269 | || strcmp (name, "complex _Float128") == 0 | |
2270 | || strcmp (name, "complex _Float64x") == 0) | |
2271 | return floatformats_ia64_quad; | |
2272 | ||
2273 | if (strcmp (name, "__ibm128") == 0) | |
2274 | return floatformats_ibm_long_double; | |
2275 | } | |
00d5215e UW |
2276 | |
2277 | return default_floatformat_for_type (gdbarch, name, len); | |
2278 | } | |
2279 | ||
7b112f9c JT |
2280 | static void |
2281 | ppc_linux_init_abi (struct gdbarch_info info, | |
2282 | struct gdbarch *gdbarch) | |
2283 | { | |
2284 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
0dba2a6c | 2285 | struct tdesc_arch_data *tdesc_data = info.tdesc_data; |
05c0465e SDJ |
2286 | static const char *const stap_integer_prefixes[] = { "i", NULL }; |
2287 | static const char *const stap_register_indirection_prefixes[] = { "(", | |
2288 | NULL }; | |
2289 | static const char *const stap_register_indirection_suffixes[] = { ")", | |
2290 | NULL }; | |
7b112f9c | 2291 | |
a5ee0f0c PA |
2292 | linux_init_abi (info, gdbarch); |
2293 | ||
b14d30e1 | 2294 | /* PPC GNU/Linux uses either 64-bit or 128-bit long doubles; where |
ed0f4273 UW |
2295 | 128-bit, they can be either IBM long double or IEEE quad long double. |
2296 | The 64-bit long double case will be detected automatically using | |
2297 | the size specified in debug info. We use a .gnu.attribute flag | |
2298 | to distinguish between the IBM long double and IEEE quad cases. */ | |
b14d30e1 | 2299 | set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT); |
ed0f4273 UW |
2300 | if (tdep->long_double_abi == POWERPC_LONG_DOUBLE_IEEE128) |
2301 | set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad); | |
2302 | else | |
2303 | set_gdbarch_long_double_format (gdbarch, floatformats_ibm_long_double); | |
0598a43c | 2304 | |
00d5215e UW |
2305 | /* Support for floating-point data type variants. */ |
2306 | set_gdbarch_floatformat_for_type (gdbarch, ppc_floatformat_for_type); | |
2307 | ||
7284e1be UW |
2308 | /* Handle inferior calls during interrupted system calls. */ |
2309 | set_gdbarch_write_pc (gdbarch, ppc_linux_write_pc); | |
2310 | ||
a96d9b2e SDJ |
2311 | /* Get the syscall number from the arch's register. */ |
2312 | set_gdbarch_get_syscall_number (gdbarch, ppc_linux_get_syscall_number); | |
2313 | ||
55aa24fb | 2314 | /* SystemTap functions. */ |
05c0465e SDJ |
2315 | set_gdbarch_stap_integer_prefixes (gdbarch, stap_integer_prefixes); |
2316 | set_gdbarch_stap_register_indirection_prefixes (gdbarch, | |
2317 | stap_register_indirection_prefixes); | |
2318 | set_gdbarch_stap_register_indirection_suffixes (gdbarch, | |
2319 | stap_register_indirection_suffixes); | |
55aa24fb SDJ |
2320 | set_gdbarch_stap_gdb_register_prefix (gdbarch, "r"); |
2321 | set_gdbarch_stap_is_single_operand (gdbarch, ppc_stap_is_single_operand); | |
2322 | set_gdbarch_stap_parse_special_token (gdbarch, | |
2323 | ppc_stap_parse_special_token); | |
2324 | ||
7b112f9c JT |
2325 | if (tdep->wordsize == 4) |
2326 | { | |
b9ff3018 AC |
2327 | /* Until November 2001, gcc did not comply with the 32 bit SysV |
2328 | R4 ABI requirement that structures less than or equal to 8 | |
2329 | bytes should be returned in registers. Instead GCC was using | |
b021a221 | 2330 | the AIX/PowerOpen ABI - everything returned in memory |
b9ff3018 AC |
2331 | (well ignoring vectors that is). When this was corrected, it |
2332 | wasn't fixed for GNU/Linux native platform. Use the | |
2333 | PowerOpen struct convention. */ | |
05580c65 | 2334 | set_gdbarch_return_value (gdbarch, ppc_linux_return_value); |
b9ff3018 | 2335 | |
7b112f9c JT |
2336 | set_gdbarch_memory_remove_breakpoint (gdbarch, |
2337 | ppc_linux_memory_remove_breakpoint); | |
61a65099 | 2338 | |
f470a70a | 2339 | /* Shared library handling. */ |
5d853008 | 2340 | set_gdbarch_skip_trampoline_code (gdbarch, ppc_skip_trampoline_code); |
7b112f9c | 2341 | set_solib_svr4_fetch_link_map_offsets |
76a9d10f | 2342 | (gdbarch, svr4_ilp32_fetch_link_map_offsets); |
a8f60bfc | 2343 | |
a96d9b2e | 2344 | /* Setting the correct XML syscall filename. */ |
458c8db8 | 2345 | set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_PPC); |
a96d9b2e | 2346 | |
a8f60bfc | 2347 | /* Trampolines. */ |
0df8b418 MS |
2348 | tramp_frame_prepend_unwinder (gdbarch, |
2349 | &ppc32_linux_sigaction_tramp_frame); | |
2350 | tramp_frame_prepend_unwinder (gdbarch, | |
2351 | &ppc32_linux_sighandler_tramp_frame); | |
a78c2d62 UW |
2352 | |
2353 | /* BFD target for core files. */ | |
2354 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) | |
2355 | set_gdbarch_gcore_bfd_target (gdbarch, "elf32-powerpcle"); | |
2356 | else | |
2357 | set_gdbarch_gcore_bfd_target (gdbarch, "elf32-powerpc"); | |
2f2241f1 | 2358 | |
5d853008 ME |
2359 | if (powerpc_so_ops.in_dynsym_resolve_code == NULL) |
2360 | { | |
2361 | powerpc_so_ops = svr4_so_ops; | |
2362 | /* Override dynamic resolve function. */ | |
2363 | powerpc_so_ops.in_dynsym_resolve_code = | |
2364 | powerpc_linux_in_dynsym_resolve_code; | |
2365 | } | |
2366 | set_solib_ops (gdbarch, &powerpc_so_ops); | |
2367 | ||
2368 | set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); | |
7b112f9c | 2369 | } |
f470a70a JB |
2370 | |
2371 | if (tdep->wordsize == 8) | |
2372 | { | |
d4094b6a UW |
2373 | if (tdep->elf_abi == POWERPC_ELF_V1) |
2374 | { | |
2375 | /* Handle PPC GNU/Linux 64-bit function pointers (which are really | |
2376 | function descriptors). */ | |
2377 | set_gdbarch_convert_from_func_ptr_addr | |
2378 | (gdbarch, ppc64_convert_from_func_ptr_addr); | |
00d5f93a | 2379 | |
d4094b6a UW |
2380 | set_gdbarch_elf_make_msymbol_special |
2381 | (gdbarch, ppc64_elf_make_msymbol_special); | |
2382 | } | |
591a12a1 UW |
2383 | else |
2384 | { | |
2385 | set_gdbarch_elf_make_msymbol_special | |
2386 | (gdbarch, ppc_elfv2_elf_make_msymbol_special); | |
2387 | ||
2388 | set_gdbarch_skip_entrypoint (gdbarch, ppc_elfv2_skip_entrypoint); | |
2389 | } | |
24c274a1 | 2390 | |
fb318ff7 | 2391 | /* Shared library handling. */ |
2bbe3cc1 | 2392 | set_gdbarch_skip_trampoline_code (gdbarch, ppc64_skip_trampoline_code); |
fb318ff7 DJ |
2393 | set_solib_svr4_fetch_link_map_offsets |
2394 | (gdbarch, svr4_lp64_fetch_link_map_offsets); | |
2395 | ||
a96d9b2e | 2396 | /* Setting the correct XML syscall filename. */ |
458c8db8 | 2397 | set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_PPC64); |
a96d9b2e | 2398 | |
a8f60bfc | 2399 | /* Trampolines. */ |
0df8b418 MS |
2400 | tramp_frame_prepend_unwinder (gdbarch, |
2401 | &ppc64_linux_sigaction_tramp_frame); | |
2402 | tramp_frame_prepend_unwinder (gdbarch, | |
2403 | &ppc64_linux_sighandler_tramp_frame); | |
a78c2d62 UW |
2404 | |
2405 | /* BFD target for core files. */ | |
2406 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) | |
2407 | set_gdbarch_gcore_bfd_target (gdbarch, "elf64-powerpcle"); | |
2408 | else | |
2409 | set_gdbarch_gcore_bfd_target (gdbarch, "elf64-powerpc"); | |
f470a70a | 2410 | } |
b3ac9c77 | 2411 | |
7284e1be | 2412 | set_gdbarch_core_read_description (gdbarch, ppc_linux_core_read_description); |
5aa82d05 AA |
2413 | set_gdbarch_iterate_over_regset_sections (gdbarch, |
2414 | ppc_linux_iterate_over_regset_sections); | |
b2756930 KB |
2415 | |
2416 | /* Enable TLS support. */ | |
2417 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | |
2418 | svr4_fetch_objfile_link_map); | |
7284e1be UW |
2419 | |
2420 | if (tdesc_data) | |
2421 | { | |
2422 | const struct tdesc_feature *feature; | |
2423 | ||
2424 | /* If we have target-described registers, then we can safely | |
2425 | reserve a number for PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM | |
2426 | (whether they are described or not). */ | |
2427 | gdb_assert (gdbarch_num_regs (gdbarch) <= PPC_ORIG_R3_REGNUM); | |
2428 | set_gdbarch_num_regs (gdbarch, PPC_TRAP_REGNUM + 1); | |
2429 | ||
2430 | /* If they are present, then assign them to the reserved number. */ | |
2431 | feature = tdesc_find_feature (info.target_desc, | |
2432 | "org.gnu.gdb.power.linux"); | |
2433 | if (feature != NULL) | |
2434 | { | |
2435 | tdesc_numbered_register (feature, tdesc_data, | |
2436 | PPC_ORIG_R3_REGNUM, "orig_r3"); | |
2437 | tdesc_numbered_register (feature, tdesc_data, | |
2438 | PPC_TRAP_REGNUM, "trap"); | |
2439 | } | |
2440 | } | |
85e747d2 UW |
2441 | |
2442 | /* Enable Cell/B.E. if supported by the target. */ | |
2443 | if (tdesc_compatible_p (info.target_desc, | |
2444 | bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu))) | |
2445 | { | |
2446 | /* Cell/B.E. multi-architecture support. */ | |
2447 | set_spu_solib_ops (gdbarch); | |
2448 | ||
cc5f0d61 UW |
2449 | /* Cell/B.E. cross-architecture unwinder support. */ |
2450 | frame_unwind_prepend_unwinder (gdbarch, &ppu2spu_unwind); | |
396d3980 UW |
2451 | |
2452 | /* We need to support more than "addr_bit" significant address bits | |
2453 | in order to support SPUADDR_ADDR encoded values. */ | |
2454 | set_gdbarch_significant_addr_bit (gdbarch, 64); | |
85e747d2 | 2455 | } |
f782ad9b | 2456 | |
906d60cf PA |
2457 | set_gdbarch_displaced_step_location (gdbarch, |
2458 | linux_displaced_step_location); | |
2459 | ||
b4cdae6f WW |
2460 | /* Support reverse debugging. */ |
2461 | set_gdbarch_process_record (gdbarch, ppc_process_record); | |
2462 | set_gdbarch_process_record_signal (gdbarch, ppc_linux_record_signal); | |
2463 | tdep->ppc_syscall_record = ppc_linux_syscall_record; | |
2464 | ||
2465 | ppc_init_linux_record_tdep (&ppc_linux_record_tdep, 4); | |
2466 | ppc_init_linux_record_tdep (&ppc64_linux_record_tdep, 8); | |
7b112f9c JT |
2467 | } |
2468 | ||
2469 | void | |
2470 | _initialize_ppc_linux_tdep (void) | |
2471 | { | |
0a0a4ac3 AC |
2472 | /* Register for all sub-familes of the POWER/PowerPC: 32-bit and |
2473 | 64-bit PowerPC, and the older rs6k. */ | |
2474 | gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc, GDB_OSABI_LINUX, | |
2475 | ppc_linux_init_abi); | |
2476 | gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc64, GDB_OSABI_LINUX, | |
2477 | ppc_linux_init_abi); | |
2478 | gdbarch_register_osabi (bfd_arch_rs6000, bfd_mach_rs6k, GDB_OSABI_LINUX, | |
2479 | ppc_linux_init_abi); | |
7284e1be | 2480 | |
cc5f0d61 | 2481 | /* Attach to observers to track __spe_current_active_context. */ |
76727919 TT |
2482 | gdb::observers::inferior_created.attach (ppc_linux_spe_context_inferior_created); |
2483 | gdb::observers::solib_loaded.attach (ppc_linux_spe_context_solib_loaded); | |
2484 | gdb::observers::solib_unloaded.attach (ppc_linux_spe_context_solib_unloaded); | |
cc5f0d61 | 2485 | |
7284e1be UW |
2486 | /* Initialize the Linux target descriptions. */ |
2487 | initialize_tdesc_powerpc_32l (); | |
2488 | initialize_tdesc_powerpc_altivec32l (); | |
f4d9bade | 2489 | initialize_tdesc_powerpc_cell32l (); |
604c2f83 | 2490 | initialize_tdesc_powerpc_vsx32l (); |
69abc51c TJB |
2491 | initialize_tdesc_powerpc_isa205_32l (); |
2492 | initialize_tdesc_powerpc_isa205_altivec32l (); | |
2493 | initialize_tdesc_powerpc_isa205_vsx32l (); | |
7ca18ed6 | 2494 | initialize_tdesc_powerpc_isa205_ppr_dscr_vsx32l (); |
f2cf6173 | 2495 | initialize_tdesc_powerpc_isa207_vsx32l (); |
8d619c01 | 2496 | initialize_tdesc_powerpc_isa207_htm_vsx32l (); |
7284e1be UW |
2497 | initialize_tdesc_powerpc_64l (); |
2498 | initialize_tdesc_powerpc_altivec64l (); | |
f4d9bade | 2499 | initialize_tdesc_powerpc_cell64l (); |
604c2f83 | 2500 | initialize_tdesc_powerpc_vsx64l (); |
69abc51c TJB |
2501 | initialize_tdesc_powerpc_isa205_64l (); |
2502 | initialize_tdesc_powerpc_isa205_altivec64l (); | |
2503 | initialize_tdesc_powerpc_isa205_vsx64l (); | |
7ca18ed6 | 2504 | initialize_tdesc_powerpc_isa205_ppr_dscr_vsx64l (); |
f2cf6173 | 2505 | initialize_tdesc_powerpc_isa207_vsx64l (); |
8d619c01 | 2506 | initialize_tdesc_powerpc_isa207_htm_vsx64l (); |
7284e1be | 2507 | initialize_tdesc_powerpc_e500l (); |
7b112f9c | 2508 | } |