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c877c8e6 | 1 | /* Target-dependent code for GDB, the GNU debugger. |
4e052eda | 2 | |
42a4f53d | 3 | Copyright (C) 1986-2019 Free Software Foundation, Inc. |
c877c8e6 KB |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 9 | the Free Software Foundation; either version 3 of the License, or |
c877c8e6 KB |
10 | (at your option) any later version. |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 18 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
c877c8e6 KB |
19 | |
20 | #include "defs.h" | |
21 | #include "frame.h" | |
22 | #include "inferior.h" | |
23 | #include "symtab.h" | |
24 | #include "target.h" | |
25 | #include "gdbcore.h" | |
26 | #include "gdbcmd.h" | |
27 | #include "symfile.h" | |
28 | #include "objfiles.h" | |
4e052eda | 29 | #include "regcache.h" |
fd0407d6 | 30 | #include "value.h" |
4be87837 | 31 | #include "osabi.h" |
f9be684a | 32 | #include "regset.h" |
6ded7999 | 33 | #include "solib-svr4.h" |
cc5f0d61 UW |
34 | #include "solib.h" |
35 | #include "solist.h" | |
9aa1e687 | 36 | #include "ppc-tdep.h" |
d78489bf | 37 | #include "ppc64-tdep.h" |
7284e1be | 38 | #include "ppc-linux-tdep.h" |
bd64614e PFC |
39 | #include "arch/ppc-linux-common.h" |
40 | #include "arch/ppc-linux-tdesc.h" | |
5d853008 | 41 | #include "glibc-tdep.h" |
61a65099 KB |
42 | #include "trad-frame.h" |
43 | #include "frame-unwind.h" | |
a8f60bfc | 44 | #include "tramp-frame.h" |
76727919 | 45 | #include "observable.h" |
85e747d2 UW |
46 | #include "auxv.h" |
47 | #include "elf/common.h" | |
591a12a1 | 48 | #include "elf/ppc64.h" |
cc5f0d61 | 49 | #include "arch-utils.h" |
a96d9b2e | 50 | #include "xml-syscall.h" |
a5ee0f0c | 51 | #include "linux-tdep.h" |
b4cdae6f WW |
52 | #include "linux-record.h" |
53 | #include "record-full.h" | |
cf90fd9a | 54 | #include "infrun.h" |
9aa1e687 | 55 | |
55aa24fb SDJ |
56 | #include "stap-probe.h" |
57 | #include "ax.h" | |
58 | #include "ax-gdb.h" | |
59 | #include "cli/cli-utils.h" | |
60 | #include "parser-defs.h" | |
61 | #include "user-regs.h" | |
62 | #include <ctype.h> | |
a2f63b2e | 63 | #include "elf-bfd.h" |
55aa24fb | 64 | |
7284e1be UW |
65 | #include "features/rs6000/powerpc-32l.c" |
66 | #include "features/rs6000/powerpc-altivec32l.c" | |
604c2f83 | 67 | #include "features/rs6000/powerpc-vsx32l.c" |
69abc51c TJB |
68 | #include "features/rs6000/powerpc-isa205-32l.c" |
69 | #include "features/rs6000/powerpc-isa205-altivec32l.c" | |
70 | #include "features/rs6000/powerpc-isa205-vsx32l.c" | |
7ca18ed6 | 71 | #include "features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.c" |
f2cf6173 | 72 | #include "features/rs6000/powerpc-isa207-vsx32l.c" |
8d619c01 | 73 | #include "features/rs6000/powerpc-isa207-htm-vsx32l.c" |
7284e1be UW |
74 | #include "features/rs6000/powerpc-64l.c" |
75 | #include "features/rs6000/powerpc-altivec64l.c" | |
604c2f83 | 76 | #include "features/rs6000/powerpc-vsx64l.c" |
69abc51c TJB |
77 | #include "features/rs6000/powerpc-isa205-64l.c" |
78 | #include "features/rs6000/powerpc-isa205-altivec64l.c" | |
79 | #include "features/rs6000/powerpc-isa205-vsx64l.c" | |
7ca18ed6 | 80 | #include "features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.c" |
f2cf6173 | 81 | #include "features/rs6000/powerpc-isa207-vsx64l.c" |
8d619c01 | 82 | #include "features/rs6000/powerpc-isa207-htm-vsx64l.c" |
7284e1be UW |
83 | #include "features/rs6000/powerpc-e500l.c" |
84 | ||
5d853008 ME |
85 | /* Shared library operations for PowerPC-Linux. */ |
86 | static struct target_so_ops powerpc_so_ops; | |
87 | ||
a96d9b2e SDJ |
88 | /* The syscall's XML filename for PPC and PPC64. */ |
89 | #define XML_SYSCALL_FILENAME_PPC "syscalls/ppc-linux.xml" | |
90 | #define XML_SYSCALL_FILENAME_PPC64 "syscalls/ppc64-linux.xml" | |
c877c8e6 | 91 | |
122a33de KB |
92 | /* ppc_linux_memory_remove_breakpoints attempts to remove a breakpoint |
93 | in much the same fashion as memory_remove_breakpoint in mem-break.c, | |
94 | but is careful not to write back the previous contents if the code | |
95 | in question has changed in between inserting the breakpoint and | |
96 | removing it. | |
97 | ||
98 | Here is the problem that we're trying to solve... | |
99 | ||
100 | Once upon a time, before introducing this function to remove | |
101 | breakpoints from the inferior, setting a breakpoint on a shared | |
102 | library function prior to running the program would not work | |
103 | properly. In order to understand the problem, it is first | |
104 | necessary to understand a little bit about dynamic linking on | |
105 | this platform. | |
106 | ||
107 | A call to a shared library function is accomplished via a bl | |
108 | (branch-and-link) instruction whose branch target is an entry | |
109 | in the procedure linkage table (PLT). The PLT in the object | |
110 | file is uninitialized. To gdb, prior to running the program, the | |
111 | entries in the PLT are all zeros. | |
112 | ||
113 | Once the program starts running, the shared libraries are loaded | |
114 | and the procedure linkage table is initialized, but the entries in | |
115 | the table are not (necessarily) resolved. Once a function is | |
116 | actually called, the code in the PLT is hit and the function is | |
117 | resolved. In order to better illustrate this, an example is in | |
118 | order; the following example is from the gdb testsuite. | |
119 | ||
120 | We start the program shmain. | |
121 | ||
122 | [kev@arroyo testsuite]$ ../gdb gdb.base/shmain | |
123 | [...] | |
124 | ||
125 | We place two breakpoints, one on shr1 and the other on main. | |
126 | ||
127 | (gdb) b shr1 | |
128 | Breakpoint 1 at 0x100409d4 | |
129 | (gdb) b main | |
130 | Breakpoint 2 at 0x100006a0: file gdb.base/shmain.c, line 44. | |
131 | ||
132 | Examine the instruction (and the immediatly following instruction) | |
133 | upon which the breakpoint was placed. Note that the PLT entry | |
134 | for shr1 contains zeros. | |
135 | ||
136 | (gdb) x/2i 0x100409d4 | |
137 | 0x100409d4 <shr1>: .long 0x0 | |
138 | 0x100409d8 <shr1+4>: .long 0x0 | |
139 | ||
140 | Now run 'til main. | |
141 | ||
142 | (gdb) r | |
143 | Starting program: gdb.base/shmain | |
144 | Breakpoint 1 at 0xffaf790: file gdb.base/shr1.c, line 19. | |
145 | ||
146 | Breakpoint 2, main () | |
147 | at gdb.base/shmain.c:44 | |
148 | 44 g = 1; | |
149 | ||
150 | Examine the PLT again. Note that the loading of the shared | |
151 | library has initialized the PLT to code which loads a constant | |
152 | (which I think is an index into the GOT) into r11 and then | |
153 | branchs a short distance to the code which actually does the | |
154 | resolving. | |
155 | ||
156 | (gdb) x/2i 0x100409d4 | |
157 | 0x100409d4 <shr1>: li r11,4 | |
158 | 0x100409d8 <shr1+4>: b 0x10040984 <sg+4> | |
159 | (gdb) c | |
160 | Continuing. | |
161 | ||
162 | Breakpoint 1, shr1 (x=1) | |
163 | at gdb.base/shr1.c:19 | |
164 | 19 l = 1; | |
165 | ||
166 | Now we've hit the breakpoint at shr1. (The breakpoint was | |
167 | reset from the PLT entry to the actual shr1 function after the | |
168 | shared library was loaded.) Note that the PLT entry has been | |
0df8b418 | 169 | resolved to contain a branch that takes us directly to shr1. |
122a33de KB |
170 | (The real one, not the PLT entry.) |
171 | ||
172 | (gdb) x/2i 0x100409d4 | |
173 | 0x100409d4 <shr1>: b 0xffaf76c <shr1> | |
174 | 0x100409d8 <shr1+4>: b 0x10040984 <sg+4> | |
175 | ||
176 | The thing to note here is that the PLT entry for shr1 has been | |
177 | changed twice. | |
178 | ||
179 | Now the problem should be obvious. GDB places a breakpoint (a | |
0df8b418 | 180 | trap instruction) on the zero value of the PLT entry for shr1. |
122a33de KB |
181 | Later on, after the shared library had been loaded and the PLT |
182 | initialized, GDB gets a signal indicating this fact and attempts | |
183 | (as it always does when it stops) to remove all the breakpoints. | |
184 | ||
185 | The breakpoint removal was causing the former contents (a zero | |
186 | word) to be written back to the now initialized PLT entry thus | |
187 | destroying a portion of the initialization that had occurred only a | |
188 | short time ago. When execution continued, the zero word would be | |
766062f6 | 189 | executed as an instruction an illegal instruction trap was |
122a33de KB |
190 | generated instead. (0 is not a legal instruction.) |
191 | ||
192 | The fix for this problem was fairly straightforward. The function | |
193 | memory_remove_breakpoint from mem-break.c was copied to this file, | |
194 | modified slightly, and renamed to ppc_linux_memory_remove_breakpoint. | |
195 | In tm-linux.h, MEMORY_REMOVE_BREAKPOINT is defined to call this new | |
196 | function. | |
197 | ||
198 | The differences between ppc_linux_memory_remove_breakpoint () and | |
199 | memory_remove_breakpoint () are minor. All that the former does | |
200 | that the latter does not is check to make sure that the breakpoint | |
201 | location actually contains a breakpoint (trap instruction) prior | |
202 | to attempting to write back the old contents. If it does contain | |
0df8b418 | 203 | a trap instruction, we allow the old contents to be written back. |
122a33de KB |
204 | Otherwise, we silently do nothing. |
205 | ||
206 | The big question is whether memory_remove_breakpoint () should be | |
207 | changed to have the same functionality. The downside is that more | |
208 | traffic is generated for remote targets since we'll have an extra | |
209 | fetch of a memory word each time a breakpoint is removed. | |
210 | ||
211 | For the time being, we'll leave this self-modifying-code-friendly | |
212 | version in ppc-linux-tdep.c, but it ought to be migrated somewhere | |
213 | else in the event that some other platform has similar needs with | |
214 | regard to removing breakpoints in some potentially self modifying | |
215 | code. */ | |
63807e1d | 216 | static int |
ae4b2284 MD |
217 | ppc_linux_memory_remove_breakpoint (struct gdbarch *gdbarch, |
218 | struct bp_target_info *bp_tgt) | |
482ca3f5 | 219 | { |
0d5ed153 | 220 | CORE_ADDR addr = bp_tgt->reqstd_address; |
f4f9705a | 221 | const unsigned char *bp; |
482ca3f5 KB |
222 | int val; |
223 | int bplen; | |
50fd1280 | 224 | gdb_byte old_contents[BREAKPOINT_MAX]; |
482ca3f5 KB |
225 | |
226 | /* Determine appropriate breakpoint contents and size for this address. */ | |
ae4b2284 | 227 | bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen); |
482ca3f5 | 228 | |
8defab1a | 229 | /* Make sure we see the memory breakpoints. */ |
cb85b21b TT |
230 | scoped_restore restore_memory |
231 | = make_scoped_restore_show_memory_breakpoints (1); | |
482ca3f5 KB |
232 | val = target_read_memory (addr, old_contents, bplen); |
233 | ||
234 | /* If our breakpoint is no longer at the address, this means that the | |
235 | program modified the code on us, so it is wrong to put back the | |
0df8b418 | 236 | old value. */ |
482ca3f5 | 237 | if (val == 0 && memcmp (bp, old_contents, bplen) == 0) |
dd110abf | 238 | val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen); |
482ca3f5 KB |
239 | |
240 | return val; | |
241 | } | |
6ded7999 | 242 | |
b9ff3018 AC |
243 | /* For historic reasons, PPC 32 GNU/Linux follows PowerOpen rather |
244 | than the 32 bit SYSV R4 ABI structure return convention - all | |
245 | structures, no matter their size, are put in memory. Vectors, | |
246 | which were added later, do get returned in a register though. */ | |
247 | ||
05580c65 | 248 | static enum return_value_convention |
6a3a010b | 249 | ppc_linux_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 CV |
250 | struct type *valtype, struct regcache *regcache, |
251 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
b9ff3018 | 252 | { |
05580c65 AC |
253 | if ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT |
254 | || TYPE_CODE (valtype) == TYPE_CODE_UNION) | |
255 | && !((TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 8) | |
256 | && TYPE_VECTOR (valtype))) | |
257 | return RETURN_VALUE_STRUCT_CONVENTION; | |
258 | else | |
6a3a010b | 259 | return ppc_sysv_abi_return_value (gdbarch, function, valtype, regcache, |
c055b101 | 260 | readbuf, writebuf); |
b9ff3018 AC |
261 | } |
262 | ||
7433498b AM |
263 | /* PLT stub in an executable. */ |
264 | static const struct ppc_insn_pattern powerpc32_plt_stub[] = | |
5d853008 ME |
265 | { |
266 | { 0xffff0000, 0x3d600000, 0 }, /* lis r11, xxxx */ | |
267 | { 0xffff0000, 0x816b0000, 0 }, /* lwz r11, xxxx(r11) */ | |
268 | { 0xffffffff, 0x7d6903a6, 0 }, /* mtctr r11 */ | |
269 | { 0xffffffff, 0x4e800420, 0 }, /* bctr */ | |
270 | { 0, 0, 0 } | |
271 | }; | |
272 | ||
7433498b AM |
273 | /* PLT stubs in a shared library or PIE. |
274 | The first variant is used when the PLT entry is within +/-32k of | |
275 | the GOT pointer (r30). */ | |
276 | static const struct ppc_insn_pattern powerpc32_plt_stub_so_1[] = | |
5d853008 ME |
277 | { |
278 | { 0xffff0000, 0x817e0000, 0 }, /* lwz r11, xxxx(r30) */ | |
279 | { 0xffffffff, 0x7d6903a6, 0 }, /* mtctr r11 */ | |
280 | { 0xffffffff, 0x4e800420, 0 }, /* bctr */ | |
5d853008 ME |
281 | { 0, 0, 0 } |
282 | }; | |
7433498b AM |
283 | |
284 | /* The second variant is used when the PLT entry is more than +/-32k | |
285 | from the GOT pointer (r30). */ | |
286 | static const struct ppc_insn_pattern powerpc32_plt_stub_so_2[] = | |
287 | { | |
288 | { 0xffff0000, 0x3d7e0000, 0 }, /* addis r11, r30, xxxx */ | |
289 | { 0xffff0000, 0x816b0000, 0 }, /* lwz r11, xxxx(r11) */ | |
290 | { 0xffffffff, 0x7d6903a6, 0 }, /* mtctr r11 */ | |
291 | { 0xffffffff, 0x4e800420, 0 }, /* bctr */ | |
292 | { 0, 0, 0 } | |
293 | }; | |
294 | ||
295 | /* The max number of insns we check using ppc_insns_match_pattern. */ | |
296 | #define POWERPC32_PLT_CHECK_LEN (ARRAY_SIZE (powerpc32_plt_stub) - 1) | |
5d853008 ME |
297 | |
298 | /* Check if PC is in PLT stub. For non-secure PLT, stub is in .plt | |
299 | section. For secure PLT, stub is in .text and we need to check | |
300 | instruction patterns. */ | |
301 | ||
302 | static int | |
303 | powerpc_linux_in_dynsym_resolve_code (CORE_ADDR pc) | |
304 | { | |
7cbd4a93 | 305 | struct bound_minimal_symbol sym; |
5d853008 ME |
306 | |
307 | /* Check whether PC is in the dynamic linker. This also checks | |
308 | whether it is in the .plt section, used by non-PIC executables. */ | |
309 | if (svr4_in_dynsym_resolve_code (pc)) | |
310 | return 1; | |
311 | ||
312 | /* Check if we are in the resolver. */ | |
313 | sym = lookup_minimal_symbol_by_pc (pc); | |
7cbd4a93 | 314 | if (sym.minsym != NULL |
efd66ac6 TT |
315 | && (strcmp (MSYMBOL_LINKAGE_NAME (sym.minsym), "__glink") == 0 |
316 | || strcmp (MSYMBOL_LINKAGE_NAME (sym.minsym), | |
7cbd4a93 | 317 | "__glink_PLTresolve") == 0)) |
5d853008 ME |
318 | return 1; |
319 | ||
320 | return 0; | |
321 | } | |
322 | ||
ddeca1df WW |
323 | /* Follow PLT stub to actual routine. |
324 | ||
325 | When the execution direction is EXEC_REVERSE, scan backward to | |
326 | check whether we are in the middle of a PLT stub. Currently, | |
7433498b | 327 | we only look-behind at most 4 instructions (the max length of a PLT |
ddeca1df | 328 | stub sequence. */ |
5d853008 ME |
329 | |
330 | static CORE_ADDR | |
331 | ppc_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc) | |
332 | { | |
7433498b | 333 | unsigned int insnbuf[POWERPC32_PLT_CHECK_LEN]; |
5d853008 ME |
334 | struct gdbarch *gdbarch = get_frame_arch (frame); |
335 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
336 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
337 | CORE_ADDR target = 0; | |
cf90fd9a | 338 | int scan_limit, i; |
5d853008 | 339 | |
cf90fd9a WW |
340 | scan_limit = 1; |
341 | /* When reverse-debugging, scan backward to check whether we are | |
342 | in the middle of trampoline code. */ | |
343 | if (execution_direction == EXEC_REVERSE) | |
7433498b | 344 | scan_limit = 4; /* At most 4 instructions. */ |
5d853008 | 345 | |
cf90fd9a | 346 | for (i = 0; i < scan_limit; i++) |
5d853008 | 347 | { |
cf90fd9a WW |
348 | if (ppc_insns_match_pattern (frame, pc, powerpc32_plt_stub, insnbuf)) |
349 | { | |
7433498b | 350 | /* Calculate PLT entry address from |
cf90fd9a | 351 | lis r11, xxxx |
7433498b AM |
352 | lwz r11, xxxx(r11). */ |
353 | target = ((ppc_insn_d_field (insnbuf[0]) << 16) | |
354 | + ppc_insn_d_field (insnbuf[1])); | |
355 | } | |
356 | else if (i < ARRAY_SIZE (powerpc32_plt_stub_so_1) - 1 | |
357 | && ppc_insns_match_pattern (frame, pc, powerpc32_plt_stub_so_1, | |
358 | insnbuf)) | |
359 | { | |
360 | /* Calculate PLT entry address from | |
361 | lwz r11, xxxx(r30). */ | |
362 | target = (ppc_insn_d_field (insnbuf[0]) | |
363 | + get_frame_register_unsigned (frame, | |
364 | tdep->ppc_gp0_regnum + 30)); | |
cf90fd9a | 365 | } |
7433498b | 366 | else if (ppc_insns_match_pattern (frame, pc, powerpc32_plt_stub_so_2, |
cf90fd9a WW |
367 | insnbuf)) |
368 | { | |
7433498b AM |
369 | /* Calculate PLT entry address from |
370 | addis r11, r30, xxxx | |
371 | lwz r11, xxxx(r11). */ | |
372 | target = ((ppc_insn_d_field (insnbuf[0]) << 16) | |
373 | + ppc_insn_d_field (insnbuf[1]) | |
374 | + get_frame_register_unsigned (frame, | |
375 | tdep->ppc_gp0_regnum + 30)); | |
cf90fd9a WW |
376 | } |
377 | else | |
378 | { | |
7433498b | 379 | /* Scan backward one more instruction if it doesn't match. */ |
cf90fd9a WW |
380 | pc -= 4; |
381 | continue; | |
382 | } | |
383 | ||
7433498b | 384 | target = read_memory_unsigned_integer (target, 4, byte_order); |
cf90fd9a | 385 | return target; |
5d853008 ME |
386 | } |
387 | ||
cf90fd9a | 388 | return 0; |
5d853008 | 389 | } |
f470a70a | 390 | |
7284e1be UW |
391 | /* Wrappers to handle Linux-only registers. */ |
392 | ||
393 | static void | |
394 | ppc_linux_supply_gregset (const struct regset *regset, | |
395 | struct regcache *regcache, | |
396 | int regnum, const void *gregs, size_t len) | |
397 | { | |
19ba03f4 SM |
398 | const struct ppc_reg_offsets *offsets |
399 | = (const struct ppc_reg_offsets *) regset->regmap; | |
7284e1be UW |
400 | |
401 | ppc_supply_gregset (regset, regcache, regnum, gregs, len); | |
402 | ||
ac7936df | 403 | if (ppc_linux_trap_reg_p (regcache->arch ())) |
7284e1be UW |
404 | { |
405 | /* "orig_r3" is stored 2 slots after "pc". */ | |
406 | if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM) | |
19ba03f4 | 407 | ppc_supply_reg (regcache, PPC_ORIG_R3_REGNUM, (const gdb_byte *) gregs, |
7284e1be UW |
408 | offsets->pc_offset + 2 * offsets->gpr_size, |
409 | offsets->gpr_size); | |
410 | ||
411 | /* "trap" is stored 8 slots after "pc". */ | |
412 | if (regnum == -1 || regnum == PPC_TRAP_REGNUM) | |
19ba03f4 | 413 | ppc_supply_reg (regcache, PPC_TRAP_REGNUM, (const gdb_byte *) gregs, |
7284e1be UW |
414 | offsets->pc_offset + 8 * offsets->gpr_size, |
415 | offsets->gpr_size); | |
416 | } | |
417 | } | |
f2db237a | 418 | |
f9be684a | 419 | static void |
f2db237a AM |
420 | ppc_linux_collect_gregset (const struct regset *regset, |
421 | const struct regcache *regcache, | |
422 | int regnum, void *gregs, size_t len) | |
f9be684a | 423 | { |
19ba03f4 SM |
424 | const struct ppc_reg_offsets *offsets |
425 | = (const struct ppc_reg_offsets *) regset->regmap; | |
7284e1be UW |
426 | |
427 | /* Clear areas in the linux gregset not written elsewhere. */ | |
f2db237a AM |
428 | if (regnum == -1) |
429 | memset (gregs, 0, len); | |
7284e1be | 430 | |
f2db237a | 431 | ppc_collect_gregset (regset, regcache, regnum, gregs, len); |
7284e1be | 432 | |
ac7936df | 433 | if (ppc_linux_trap_reg_p (regcache->arch ())) |
7284e1be UW |
434 | { |
435 | /* "orig_r3" is stored 2 slots after "pc". */ | |
436 | if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM) | |
19ba03f4 | 437 | ppc_collect_reg (regcache, PPC_ORIG_R3_REGNUM, (gdb_byte *) gregs, |
7284e1be UW |
438 | offsets->pc_offset + 2 * offsets->gpr_size, |
439 | offsets->gpr_size); | |
440 | ||
441 | /* "trap" is stored 8 slots after "pc". */ | |
442 | if (regnum == -1 || regnum == PPC_TRAP_REGNUM) | |
19ba03f4 | 443 | ppc_collect_reg (regcache, PPC_TRAP_REGNUM, (gdb_byte *) gregs, |
7284e1be UW |
444 | offsets->pc_offset + 8 * offsets->gpr_size, |
445 | offsets->gpr_size); | |
446 | } | |
f9be684a AC |
447 | } |
448 | ||
f2db237a AM |
449 | /* Regset descriptions. */ |
450 | static const struct ppc_reg_offsets ppc32_linux_reg_offsets = | |
451 | { | |
452 | /* General-purpose registers. */ | |
453 | /* .r0_offset = */ 0, | |
454 | /* .gpr_size = */ 4, | |
455 | /* .xr_size = */ 4, | |
456 | /* .pc_offset = */ 128, | |
457 | /* .ps_offset = */ 132, | |
458 | /* .cr_offset = */ 152, | |
459 | /* .lr_offset = */ 144, | |
460 | /* .ctr_offset = */ 140, | |
461 | /* .xer_offset = */ 148, | |
462 | /* .mq_offset = */ 156, | |
463 | ||
464 | /* Floating-point registers. */ | |
465 | /* .f0_offset = */ 0, | |
466 | /* .fpscr_offset = */ 256, | |
1d75a658 | 467 | /* .fpscr_size = */ 8 |
f2db237a | 468 | }; |
f9be684a | 469 | |
f2db237a AM |
470 | static const struct ppc_reg_offsets ppc64_linux_reg_offsets = |
471 | { | |
472 | /* General-purpose registers. */ | |
473 | /* .r0_offset = */ 0, | |
474 | /* .gpr_size = */ 8, | |
475 | /* .xr_size = */ 8, | |
476 | /* .pc_offset = */ 256, | |
477 | /* .ps_offset = */ 264, | |
478 | /* .cr_offset = */ 304, | |
479 | /* .lr_offset = */ 288, | |
480 | /* .ctr_offset = */ 280, | |
481 | /* .xer_offset = */ 296, | |
482 | /* .mq_offset = */ 312, | |
483 | ||
484 | /* Floating-point registers. */ | |
485 | /* .f0_offset = */ 0, | |
486 | /* .fpscr_offset = */ 256, | |
1d75a658 | 487 | /* .fpscr_size = */ 8 |
f2db237a | 488 | }; |
2fda4977 | 489 | |
f2db237a AM |
490 | static const struct regset ppc32_linux_gregset = { |
491 | &ppc32_linux_reg_offsets, | |
7284e1be | 492 | ppc_linux_supply_gregset, |
09424cff | 493 | ppc_linux_collect_gregset |
f9be684a AC |
494 | }; |
495 | ||
f2db237a AM |
496 | static const struct regset ppc64_linux_gregset = { |
497 | &ppc64_linux_reg_offsets, | |
7284e1be | 498 | ppc_linux_supply_gregset, |
09424cff | 499 | ppc_linux_collect_gregset |
f2db237a | 500 | }; |
f9be684a | 501 | |
f2db237a AM |
502 | static const struct regset ppc32_linux_fpregset = { |
503 | &ppc32_linux_reg_offsets, | |
504 | ppc_supply_fpregset, | |
09424cff | 505 | ppc_collect_fpregset |
f9be684a AC |
506 | }; |
507 | ||
1d75a658 PFC |
508 | static const struct regcache_map_entry ppc32_le_linux_vrregmap[] = |
509 | { | |
510 | { 32, PPC_VR0_REGNUM, 16 }, | |
511 | { 1, PPC_VSCR_REGNUM, 4 }, | |
512 | { 1, REGCACHE_MAP_SKIP, 12 }, | |
513 | { 1, PPC_VRSAVE_REGNUM, 4 }, | |
514 | { 1, REGCACHE_MAP_SKIP, 12 }, | |
515 | { 0 } | |
516 | }; | |
517 | ||
518 | static const struct regcache_map_entry ppc32_be_linux_vrregmap[] = | |
519 | { | |
520 | { 32, PPC_VR0_REGNUM, 16 }, | |
521 | { 1, REGCACHE_MAP_SKIP, 12}, | |
522 | { 1, PPC_VSCR_REGNUM, 4 }, | |
523 | { 1, PPC_VRSAVE_REGNUM, 4 }, | |
524 | { 1, REGCACHE_MAP_SKIP, 12 }, | |
525 | { 0 } | |
526 | }; | |
527 | ||
528 | static const struct regset ppc32_le_linux_vrregset = { | |
529 | ppc32_le_linux_vrregmap, | |
530 | regcache_supply_regset, | |
5c849b22 | 531 | regcache_collect_regset |
1d75a658 PFC |
532 | }; |
533 | ||
534 | static const struct regset ppc32_be_linux_vrregset = { | |
535 | ppc32_be_linux_vrregmap, | |
536 | regcache_supply_regset, | |
5c849b22 | 537 | regcache_collect_regset |
06caf7d2 CES |
538 | }; |
539 | ||
2c3305f6 PFC |
540 | static const struct regcache_map_entry ppc32_linux_vsxregmap[] = |
541 | { | |
542 | { 32, PPC_VSR0_UPPER_REGNUM, 8 }, | |
543 | { 0 } | |
544 | }; | |
545 | ||
604c2f83 | 546 | static const struct regset ppc32_linux_vsxregset = { |
2c3305f6 PFC |
547 | ppc32_linux_vsxregmap, |
548 | regcache_supply_regset, | |
549 | regcache_collect_regset | |
604c2f83 LM |
550 | }; |
551 | ||
7ca18ed6 EBM |
552 | /* Program Priorty Register regmap. */ |
553 | ||
554 | static const struct regcache_map_entry ppc32_regmap_ppr[] = | |
555 | { | |
556 | { 1, PPC_PPR_REGNUM, 8 }, | |
557 | { 0 } | |
558 | }; | |
559 | ||
560 | /* Program Priorty Register regset. */ | |
561 | ||
562 | const struct regset ppc32_linux_pprregset = { | |
563 | ppc32_regmap_ppr, | |
564 | regcache_supply_regset, | |
565 | regcache_collect_regset | |
566 | }; | |
567 | ||
568 | /* Data Stream Control Register regmap. */ | |
569 | ||
570 | static const struct regcache_map_entry ppc32_regmap_dscr[] = | |
571 | { | |
572 | { 1, PPC_DSCR_REGNUM, 8 }, | |
573 | { 0 } | |
574 | }; | |
575 | ||
576 | /* Data Stream Control Register regset. */ | |
577 | ||
578 | const struct regset ppc32_linux_dscrregset = { | |
579 | ppc32_regmap_dscr, | |
580 | regcache_supply_regset, | |
581 | regcache_collect_regset | |
582 | }; | |
583 | ||
f2cf6173 EBM |
584 | /* Target Address Register regmap. */ |
585 | ||
586 | static const struct regcache_map_entry ppc32_regmap_tar[] = | |
587 | { | |
588 | { 1, PPC_TAR_REGNUM, 8 }, | |
589 | { 0 } | |
590 | }; | |
591 | ||
592 | /* Target Address Register regset. */ | |
593 | ||
594 | const struct regset ppc32_linux_tarregset = { | |
595 | ppc32_regmap_tar, | |
596 | regcache_supply_regset, | |
597 | regcache_collect_regset | |
598 | }; | |
599 | ||
232bfb86 EBM |
600 | /* Event-Based Branching regmap. */ |
601 | ||
602 | static const struct regcache_map_entry ppc32_regmap_ebb[] = | |
603 | { | |
604 | { 1, PPC_EBBRR_REGNUM, 8 }, | |
605 | { 1, PPC_EBBHR_REGNUM, 8 }, | |
606 | { 1, PPC_BESCR_REGNUM, 8 }, | |
607 | { 0 } | |
608 | }; | |
609 | ||
610 | /* Event-Based Branching regset. */ | |
611 | ||
612 | const struct regset ppc32_linux_ebbregset = { | |
613 | ppc32_regmap_ebb, | |
614 | regcache_supply_regset, | |
615 | regcache_collect_regset | |
616 | }; | |
617 | ||
618 | /* Performance Monitoring Unit regmap. */ | |
619 | ||
620 | static const struct regcache_map_entry ppc32_regmap_pmu[] = | |
621 | { | |
622 | { 1, PPC_SIAR_REGNUM, 8 }, | |
623 | { 1, PPC_SDAR_REGNUM, 8 }, | |
624 | { 1, PPC_SIER_REGNUM, 8 }, | |
625 | { 1, PPC_MMCR2_REGNUM, 8 }, | |
626 | { 1, PPC_MMCR0_REGNUM, 8 }, | |
627 | { 0 } | |
628 | }; | |
629 | ||
630 | /* Performance Monitoring Unit regset. */ | |
631 | ||
632 | const struct regset ppc32_linux_pmuregset = { | |
633 | ppc32_regmap_pmu, | |
634 | regcache_supply_regset, | |
635 | regcache_collect_regset | |
636 | }; | |
637 | ||
8d619c01 EBM |
638 | /* Hardware Transactional Memory special-purpose register regmap. */ |
639 | ||
640 | static const struct regcache_map_entry ppc32_regmap_tm_spr[] = | |
641 | { | |
642 | { 1, PPC_TFHAR_REGNUM, 8 }, | |
643 | { 1, PPC_TEXASR_REGNUM, 8 }, | |
644 | { 1, PPC_TFIAR_REGNUM, 8 }, | |
645 | { 0 } | |
646 | }; | |
647 | ||
648 | /* Hardware Transactional Memory special-purpose register regset. */ | |
649 | ||
650 | const struct regset ppc32_linux_tm_sprregset = { | |
651 | ppc32_regmap_tm_spr, | |
652 | regcache_supply_regset, | |
653 | regcache_collect_regset | |
654 | }; | |
655 | ||
656 | /* Regmaps for the Hardware Transactional Memory checkpointed | |
657 | general-purpose regsets for 32-bit, 64-bit big-endian, and 64-bit | |
658 | little endian targets. The ptrace and core file buffers for 64-bit | |
659 | targets use 8-byte fields for the 4-byte registers, and the | |
660 | position of the register in the fields depends on the endianess. | |
661 | The 32-bit regmap is the same for both endian types because the | |
662 | fields are all 4-byte long. | |
663 | ||
664 | The layout of checkpointed GPR regset is the same as a regular | |
665 | struct pt_regs, but we skip all registers that are not actually | |
666 | checkpointed by the processor (e.g. msr, nip), except when | |
667 | generating a core file. The 64-bit regset is 48 * 8 bytes long. | |
668 | In some 64-bit kernels, the regset for a 32-bit inferior has the | |
669 | same length, but all the registers are squeezed in the first half | |
670 | (48 * 4 bytes). The pt_regs struct calls the regular cr ccr, but | |
671 | we use ccr for "checkpointed condition register". Note that CR | |
672 | (condition register) field 0 is not checkpointed, but the kernel | |
673 | returns all 4 bytes. The skipped registers should not be touched | |
674 | when writing the regset to the inferior (with | |
675 | PTRACE_SETREGSET). */ | |
676 | ||
677 | static const struct regcache_map_entry ppc32_regmap_cgpr[] = | |
678 | { | |
679 | { 32, PPC_CR0_REGNUM, 4 }, | |
680 | { 3, REGCACHE_MAP_SKIP, 4 }, /* nip, msr, orig_gpr3. */ | |
681 | { 1, PPC_CCTR_REGNUM, 4 }, | |
682 | { 1, PPC_CLR_REGNUM, 4 }, | |
683 | { 1, PPC_CXER_REGNUM, 4 }, | |
684 | { 1, PPC_CCR_REGNUM, 4 }, | |
685 | { 9, REGCACHE_MAP_SKIP, 4 }, /* All the rest. */ | |
686 | { 0 } | |
687 | }; | |
688 | ||
689 | static const struct regcache_map_entry ppc64_le_regmap_cgpr[] = | |
690 | { | |
691 | { 32, PPC_CR0_REGNUM, 8 }, | |
692 | { 3, REGCACHE_MAP_SKIP, 8 }, | |
693 | { 1, PPC_CCTR_REGNUM, 8 }, | |
694 | { 1, PPC_CLR_REGNUM, 8 }, | |
695 | { 1, PPC_CXER_REGNUM, 4 }, | |
696 | { 1, REGCACHE_MAP_SKIP, 4 }, /* CXER padding. */ | |
697 | { 1, PPC_CCR_REGNUM, 4 }, | |
698 | { 1, REGCACHE_MAP_SKIP, 4}, /* CCR padding. */ | |
699 | { 9, REGCACHE_MAP_SKIP, 8}, | |
700 | { 0 } | |
701 | }; | |
702 | ||
703 | static const struct regcache_map_entry ppc64_be_regmap_cgpr[] = | |
704 | { | |
705 | { 32, PPC_CR0_REGNUM, 8 }, | |
706 | { 3, REGCACHE_MAP_SKIP, 8 }, | |
707 | { 1, PPC_CCTR_REGNUM, 8 }, | |
708 | { 1, PPC_CLR_REGNUM, 8 }, | |
709 | { 1, REGCACHE_MAP_SKIP, 4}, /* CXER padding. */ | |
710 | { 1, PPC_CXER_REGNUM, 4 }, | |
711 | { 1, REGCACHE_MAP_SKIP, 4}, /* CCR padding. */ | |
712 | { 1, PPC_CCR_REGNUM, 4 }, | |
713 | { 9, REGCACHE_MAP_SKIP, 8}, | |
714 | { 0 } | |
715 | }; | |
716 | ||
717 | /* Regsets for the Hardware Transactional Memory checkpointed | |
718 | general-purpose registers for 32-bit, 64-bit big-endian, and 64-bit | |
719 | little endian targets. | |
720 | ||
721 | Some 64-bit kernels generate a checkpointed gpr note section with | |
722 | 48*8 bytes for a 32-bit thread, of which only 48*4 are actually | |
723 | used, so we set the variable size flag in the corresponding regset | |
724 | to accept this case. */ | |
725 | ||
726 | static const struct regset ppc32_linux_cgprregset = { | |
727 | ppc32_regmap_cgpr, | |
728 | regcache_supply_regset, | |
729 | regcache_collect_regset, | |
730 | REGSET_VARIABLE_SIZE | |
731 | }; | |
732 | ||
733 | static const struct regset ppc64_be_linux_cgprregset = { | |
734 | ppc64_be_regmap_cgpr, | |
735 | regcache_supply_regset, | |
736 | regcache_collect_regset | |
737 | }; | |
738 | ||
739 | static const struct regset ppc64_le_linux_cgprregset = { | |
740 | ppc64_le_regmap_cgpr, | |
741 | regcache_supply_regset, | |
742 | regcache_collect_regset | |
743 | }; | |
744 | ||
745 | /* Hardware Transactional Memory checkpointed floating-point regmap. */ | |
746 | ||
747 | static const struct regcache_map_entry ppc32_regmap_cfpr[] = | |
748 | { | |
749 | { 32, PPC_CF0_REGNUM, 8 }, | |
750 | { 1, PPC_CFPSCR_REGNUM, 8 }, | |
751 | { 0 } | |
752 | }; | |
753 | ||
754 | /* Hardware Transactional Memory checkpointed floating-point regset. */ | |
755 | ||
756 | const struct regset ppc32_linux_cfprregset = { | |
757 | ppc32_regmap_cfpr, | |
758 | regcache_supply_regset, | |
759 | regcache_collect_regset | |
760 | }; | |
761 | ||
762 | /* Regmaps for the Hardware Transactional Memory checkpointed vector | |
763 | regsets, for big and little endian targets. The position of the | |
764 | 4-byte VSCR in its 16-byte field depends on the endianess. */ | |
765 | ||
766 | static const struct regcache_map_entry ppc32_le_regmap_cvmx[] = | |
767 | { | |
768 | { 32, PPC_CVR0_REGNUM, 16 }, | |
769 | { 1, PPC_CVSCR_REGNUM, 4 }, | |
770 | { 1, REGCACHE_MAP_SKIP, 12 }, | |
771 | { 1, PPC_CVRSAVE_REGNUM, 4 }, | |
772 | { 1, REGCACHE_MAP_SKIP, 12 }, | |
773 | { 0 } | |
774 | }; | |
775 | ||
776 | static const struct regcache_map_entry ppc32_be_regmap_cvmx[] = | |
777 | { | |
778 | { 32, PPC_CVR0_REGNUM, 16 }, | |
779 | { 1, REGCACHE_MAP_SKIP, 12 }, | |
780 | { 1, PPC_CVSCR_REGNUM, 4 }, | |
781 | { 1, PPC_CVRSAVE_REGNUM, 4 }, | |
782 | { 1, REGCACHE_MAP_SKIP, 12}, | |
783 | { 0 } | |
784 | }; | |
785 | ||
786 | /* Hardware Transactional Memory checkpointed vector regsets, for little | |
787 | and big endian targets. */ | |
788 | ||
789 | static const struct regset ppc32_le_linux_cvmxregset = { | |
790 | ppc32_le_regmap_cvmx, | |
791 | regcache_supply_regset, | |
792 | regcache_collect_regset | |
793 | }; | |
794 | ||
795 | static const struct regset ppc32_be_linux_cvmxregset = { | |
796 | ppc32_be_regmap_cvmx, | |
797 | regcache_supply_regset, | |
798 | regcache_collect_regset | |
799 | }; | |
800 | ||
801 | /* Hardware Transactional Memory checkpointed vector-scalar regmap. */ | |
802 | ||
803 | static const struct regcache_map_entry ppc32_regmap_cvsx[] = | |
804 | { | |
805 | { 32, PPC_CVSR0_UPPER_REGNUM, 8 }, | |
806 | { 0 } | |
807 | }; | |
808 | ||
809 | /* Hardware Transactional Memory checkpointed vector-scalar regset. */ | |
810 | ||
811 | const struct regset ppc32_linux_cvsxregset = { | |
812 | ppc32_regmap_cvsx, | |
813 | regcache_supply_regset, | |
814 | regcache_collect_regset | |
815 | }; | |
816 | ||
817 | /* Hardware Transactional Memory checkpointed Program Priority Register | |
818 | regmap. */ | |
819 | ||
820 | static const struct regcache_map_entry ppc32_regmap_cppr[] = | |
821 | { | |
822 | { 1, PPC_CPPR_REGNUM, 8 }, | |
823 | { 0 } | |
824 | }; | |
825 | ||
826 | /* Hardware Transactional Memory checkpointed Program Priority Register | |
827 | regset. */ | |
828 | ||
829 | const struct regset ppc32_linux_cpprregset = { | |
830 | ppc32_regmap_cppr, | |
831 | regcache_supply_regset, | |
832 | regcache_collect_regset | |
833 | }; | |
834 | ||
835 | /* Hardware Transactional Memory checkpointed Data Stream Control | |
836 | Register regmap. */ | |
837 | ||
838 | static const struct regcache_map_entry ppc32_regmap_cdscr[] = | |
839 | { | |
840 | { 1, PPC_CDSCR_REGNUM, 8 }, | |
841 | { 0 } | |
842 | }; | |
843 | ||
844 | /* Hardware Transactional Memory checkpointed Data Stream Control | |
845 | Register regset. */ | |
846 | ||
847 | const struct regset ppc32_linux_cdscrregset = { | |
848 | ppc32_regmap_cdscr, | |
849 | regcache_supply_regset, | |
850 | regcache_collect_regset | |
851 | }; | |
852 | ||
853 | /* Hardware Transactional Memory checkpointed Target Address Register | |
854 | regmap. */ | |
855 | ||
856 | static const struct regcache_map_entry ppc32_regmap_ctar[] = | |
857 | { | |
858 | { 1, PPC_CTAR_REGNUM, 8 }, | |
859 | { 0 } | |
860 | }; | |
861 | ||
862 | /* Hardware Transactional Memory checkpointed Target Address Register | |
863 | regset. */ | |
864 | ||
865 | const struct regset ppc32_linux_ctarregset = { | |
866 | ppc32_regmap_ctar, | |
867 | regcache_supply_regset, | |
868 | regcache_collect_regset | |
869 | }; | |
870 | ||
f2db237a AM |
871 | const struct regset * |
872 | ppc_linux_gregset (int wordsize) | |
2fda4977 | 873 | { |
f2db237a | 874 | return wordsize == 8 ? &ppc64_linux_gregset : &ppc32_linux_gregset; |
2fda4977 DJ |
875 | } |
876 | ||
f2db237a AM |
877 | const struct regset * |
878 | ppc_linux_fpregset (void) | |
879 | { | |
880 | return &ppc32_linux_fpregset; | |
881 | } | |
2fda4977 | 882 | |
1d75a658 PFC |
883 | const struct regset * |
884 | ppc_linux_vrregset (struct gdbarch *gdbarch) | |
885 | { | |
886 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
887 | return &ppc32_be_linux_vrregset; | |
888 | else | |
889 | return &ppc32_le_linux_vrregset; | |
890 | } | |
891 | ||
2c3305f6 PFC |
892 | const struct regset * |
893 | ppc_linux_vsxregset (void) | |
894 | { | |
895 | return &ppc32_linux_vsxregset; | |
896 | } | |
897 | ||
8d619c01 EBM |
898 | const struct regset * |
899 | ppc_linux_cgprregset (struct gdbarch *gdbarch) | |
900 | { | |
901 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
902 | ||
903 | if (tdep->wordsize == 4) | |
904 | { | |
905 | return &ppc32_linux_cgprregset; | |
906 | } | |
907 | else | |
908 | { | |
909 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
910 | return &ppc64_be_linux_cgprregset; | |
911 | else | |
912 | return &ppc64_le_linux_cgprregset; | |
913 | } | |
914 | } | |
915 | ||
916 | const struct regset * | |
917 | ppc_linux_cvmxregset (struct gdbarch *gdbarch) | |
918 | { | |
919 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG) | |
920 | return &ppc32_be_linux_cvmxregset; | |
921 | else | |
922 | return &ppc32_le_linux_cvmxregset; | |
923 | } | |
924 | ||
925 | /* Collect function used to generate the core note for the | |
926 | checkpointed GPR regset. Here, we don't want to skip the | |
927 | "checkpointed" NIP and MSR, so that the note section we generate is | |
928 | similar to the one generated by the kernel. To avoid having to | |
929 | define additional registers in GDB which are not actually | |
930 | checkpointed in the architecture, we copy TFHAR to the checkpointed | |
931 | NIP slot, which is what the kernel does, and copy the regular MSR | |
932 | to the checkpointed MSR slot, which will have a similar value in | |
933 | most cases. */ | |
934 | ||
935 | static void | |
936 | ppc_linux_collect_core_cpgrregset (const struct regset *regset, | |
937 | const struct regcache *regcache, | |
938 | int regnum, void *buf, size_t len) | |
939 | { | |
940 | struct gdbarch *gdbarch = regcache->arch (); | |
941 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
942 | ||
943 | const struct regset *cgprregset = ppc_linux_cgprregset (gdbarch); | |
944 | ||
945 | /* We collect the checkpointed GPRs already defined in the regular | |
946 | regmap, then overlay TFHAR/MSR on the checkpointed NIP/MSR | |
947 | slots. */ | |
948 | cgprregset->collect_regset (cgprregset, regcache, regnum, buf, len); | |
949 | ||
950 | /* Check that we are collecting all the registers, which should be | |
951 | the case when generating a core file. */ | |
952 | if (regnum != -1) | |
953 | return; | |
954 | ||
955 | /* PT_NIP and PT_MSR are 32 and 33 for powerpc. Don't redefine | |
956 | these symbols since this file can run on clients in other | |
957 | architectures where they can already be defined to other | |
958 | values. */ | |
959 | int pt_offset = 32; | |
960 | ||
961 | /* Check that our buffer is long enough to hold two slots at | |
962 | pt_offset * wordsize, one for NIP and one for MSR. */ | |
963 | gdb_assert ((pt_offset + 2) * tdep->wordsize <= len); | |
964 | ||
965 | /* TFHAR is 8 bytes wide, but the NIP slot for a 32-bit thread is | |
966 | 4-bytes long. We use raw_collect_integer which handles | |
967 | differences in the sizes for the source and destination buffers | |
968 | for both endian modes. */ | |
969 | (regcache->raw_collect_integer | |
970 | (PPC_TFHAR_REGNUM, ((gdb_byte *) buf) + pt_offset * tdep->wordsize, | |
971 | tdep->wordsize, false)); | |
972 | ||
973 | pt_offset = 33; | |
974 | ||
975 | (regcache->raw_collect_integer | |
976 | (PPC_MSR_REGNUM, ((gdb_byte *) buf) + pt_offset * tdep->wordsize, | |
977 | tdep->wordsize, false)); | |
978 | } | |
979 | ||
5aa82d05 AA |
980 | /* Iterate over supported core file register note sections. */ |
981 | ||
982 | static void | |
983 | ppc_linux_iterate_over_regset_sections (struct gdbarch *gdbarch, | |
984 | iterate_over_regset_sections_cb *cb, | |
985 | void *cb_data, | |
986 | const struct regcache *regcache) | |
987 | { | |
988 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
989 | int have_altivec = tdep->ppc_vr0_regnum != -1; | |
990 | int have_vsx = tdep->ppc_vsr0_upper_regnum != -1; | |
7ca18ed6 EBM |
991 | int have_ppr = tdep->ppc_ppr_regnum != -1; |
992 | int have_dscr = tdep->ppc_dscr_regnum != -1; | |
f2cf6173 | 993 | int have_tar = tdep->ppc_tar_regnum != -1; |
5aa82d05 | 994 | |
8f0435f7 | 995 | if (tdep->wordsize == 4) |
a616bb94 | 996 | cb (".reg", 48 * 4, 48 * 4, &ppc32_linux_gregset, NULL, cb_data); |
8f0435f7 | 997 | else |
a616bb94 | 998 | cb (".reg", 48 * 8, 48 * 8, &ppc64_linux_gregset, NULL, cb_data); |
8f0435f7 | 999 | |
a616bb94 | 1000 | cb (".reg2", 264, 264, &ppc32_linux_fpregset, NULL, cb_data); |
5aa82d05 AA |
1001 | |
1002 | if (have_altivec) | |
1d75a658 PFC |
1003 | { |
1004 | const struct regset *vrregset = ppc_linux_vrregset (gdbarch); | |
a616bb94 AH |
1005 | cb (".reg-ppc-vmx", PPC_LINUX_SIZEOF_VRREGSET, PPC_LINUX_SIZEOF_VRREGSET, |
1006 | vrregset, "ppc Altivec", cb_data); | |
1d75a658 | 1007 | } |
5aa82d05 AA |
1008 | |
1009 | if (have_vsx) | |
a616bb94 | 1010 | cb (".reg-ppc-vsx", PPC_LINUX_SIZEOF_VSXREGSET, PPC_LINUX_SIZEOF_VSXREGSET, |
d078308a | 1011 | &ppc32_linux_vsxregset, "POWER7 VSX", cb_data); |
7ca18ed6 EBM |
1012 | |
1013 | if (have_ppr) | |
1014 | cb (".reg-ppc-ppr", PPC_LINUX_SIZEOF_PPRREGSET, | |
1015 | PPC_LINUX_SIZEOF_PPRREGSET, | |
1016 | &ppc32_linux_pprregset, "Priority Program Register", cb_data); | |
1017 | ||
1018 | if (have_dscr) | |
1019 | cb (".reg-ppc-dscr", PPC_LINUX_SIZEOF_DSCRREGSET, | |
1020 | PPC_LINUX_SIZEOF_DSCRREGSET, | |
1021 | &ppc32_linux_dscrregset, "Data Stream Control Register", | |
1022 | cb_data); | |
f2cf6173 EBM |
1023 | |
1024 | if (have_tar) | |
1025 | cb (".reg-ppc-tar", PPC_LINUX_SIZEOF_TARREGSET, | |
1026 | PPC_LINUX_SIZEOF_TARREGSET, | |
1027 | &ppc32_linux_tarregset, "Target Address Register", cb_data); | |
232bfb86 EBM |
1028 | |
1029 | /* EBB registers are unavailable when ptrace returns ENODATA. Check | |
1030 | availability when generating a core file (regcache != NULL). */ | |
1031 | if (tdep->have_ebb) | |
1032 | if (regcache == NULL | |
1033 | || REG_VALID == regcache->get_register_status (PPC_BESCR_REGNUM)) | |
1034 | cb (".reg-ppc-ebb", PPC_LINUX_SIZEOF_EBBREGSET, | |
1035 | PPC_LINUX_SIZEOF_EBBREGSET, | |
1036 | &ppc32_linux_ebbregset, "Event-based Branching Registers", | |
1037 | cb_data); | |
1038 | ||
1039 | if (tdep->ppc_mmcr0_regnum != -1) | |
1040 | cb (".reg-ppc-pmu", PPC_LINUX_SIZEOF_PMUREGSET, | |
1041 | PPC_LINUX_SIZEOF_PMUREGSET, | |
1042 | &ppc32_linux_pmuregset, "Performance Monitor Registers", | |
1043 | cb_data); | |
8d619c01 EBM |
1044 | |
1045 | if (tdep->have_htm_spr) | |
1046 | cb (".reg-ppc-tm-spr", PPC_LINUX_SIZEOF_TM_SPRREGSET, | |
1047 | PPC_LINUX_SIZEOF_TM_SPRREGSET, | |
1048 | &ppc32_linux_tm_sprregset, | |
1049 | "Hardware Transactional Memory Special Purpose Registers", | |
1050 | cb_data); | |
1051 | ||
1052 | /* Checkpointed registers can be unavailable, don't call back if | |
1053 | we are generating a core file. */ | |
1054 | ||
1055 | if (tdep->have_htm_core) | |
1056 | { | |
1057 | /* Only generate the checkpointed GPR core note if we also have | |
1058 | access to the HTM SPRs, because we need TFHAR to fill the | |
1059 | "checkpointed" NIP slot. We can read a core file without it | |
1060 | since GDB is not aware of this NIP as a visible register. */ | |
1061 | if (regcache == NULL || | |
1062 | (REG_VALID == regcache->get_register_status (PPC_CR0_REGNUM) | |
1063 | && tdep->have_htm_spr)) | |
1064 | { | |
1065 | int cgpr_size = (tdep->wordsize == 4? | |
1066 | PPC32_LINUX_SIZEOF_CGPRREGSET | |
1067 | : PPC64_LINUX_SIZEOF_CGPRREGSET); | |
1068 | ||
1069 | const struct regset *cgprregset = | |
1070 | ppc_linux_cgprregset (gdbarch); | |
1071 | ||
1072 | if (regcache != NULL) | |
1073 | { | |
1074 | struct regset core_cgprregset = *cgprregset; | |
1075 | ||
1076 | core_cgprregset.collect_regset | |
1077 | = ppc_linux_collect_core_cpgrregset; | |
1078 | ||
1079 | cb (".reg-ppc-tm-cgpr", | |
1080 | cgpr_size, cgpr_size, | |
1081 | &core_cgprregset, | |
1082 | "Checkpointed General Purpose Registers", cb_data); | |
1083 | } | |
1084 | else | |
1085 | { | |
1086 | cb (".reg-ppc-tm-cgpr", | |
1087 | cgpr_size, cgpr_size, | |
1088 | cgprregset, | |
1089 | "Checkpointed General Purpose Registers", cb_data); | |
1090 | } | |
1091 | } | |
1092 | } | |
1093 | ||
1094 | if (tdep->have_htm_fpu) | |
1095 | { | |
1096 | if (regcache == NULL || | |
1097 | REG_VALID == regcache->get_register_status (PPC_CF0_REGNUM)) | |
1098 | cb (".reg-ppc-tm-cfpr", PPC_LINUX_SIZEOF_CFPRREGSET, | |
1099 | PPC_LINUX_SIZEOF_CFPRREGSET, | |
1100 | &ppc32_linux_cfprregset, | |
1101 | "Checkpointed Floating Point Registers", cb_data); | |
1102 | } | |
1103 | ||
1104 | if (tdep->have_htm_altivec) | |
1105 | { | |
1106 | if (regcache == NULL || | |
1107 | REG_VALID == regcache->get_register_status (PPC_CVR0_REGNUM)) | |
1108 | { | |
1109 | const struct regset *cvmxregset = | |
1110 | ppc_linux_cvmxregset (gdbarch); | |
1111 | ||
1112 | cb (".reg-ppc-tm-cvmx", PPC_LINUX_SIZEOF_CVMXREGSET, | |
1113 | PPC_LINUX_SIZEOF_CVMXREGSET, | |
1114 | cvmxregset, | |
1115 | "Checkpointed Altivec (VMX) Registers", cb_data); | |
1116 | } | |
1117 | } | |
1118 | ||
1119 | if (tdep->have_htm_vsx) | |
1120 | { | |
1121 | if (regcache == NULL || | |
1122 | (REG_VALID | |
1123 | == regcache->get_register_status (PPC_CVSR0_UPPER_REGNUM))) | |
1124 | cb (".reg-ppc-tm-cvsx", PPC_LINUX_SIZEOF_CVSXREGSET, | |
1125 | PPC_LINUX_SIZEOF_CVSXREGSET, | |
1126 | &ppc32_linux_cvsxregset, | |
1127 | "Checkpointed VSX Registers", cb_data); | |
1128 | } | |
1129 | ||
1130 | if (tdep->ppc_cppr_regnum != -1) | |
1131 | { | |
1132 | if (regcache == NULL || | |
1133 | REG_VALID == regcache->get_register_status (PPC_CPPR_REGNUM)) | |
1134 | cb (".reg-ppc-tm-cppr", PPC_LINUX_SIZEOF_CPPRREGSET, | |
1135 | PPC_LINUX_SIZEOF_CPPRREGSET, | |
1136 | &ppc32_linux_cpprregset, | |
1137 | "Checkpointed Priority Program Register", cb_data); | |
1138 | } | |
1139 | ||
1140 | if (tdep->ppc_cdscr_regnum != -1) | |
1141 | { | |
1142 | if (regcache == NULL || | |
1143 | REG_VALID == regcache->get_register_status (PPC_CDSCR_REGNUM)) | |
1144 | cb (".reg-ppc-tm-cdscr", PPC_LINUX_SIZEOF_CDSCRREGSET, | |
1145 | PPC_LINUX_SIZEOF_CDSCRREGSET, | |
1146 | &ppc32_linux_cdscrregset, | |
1147 | "Checkpointed Data Stream Control Register", cb_data); | |
1148 | } | |
1149 | ||
1150 | if (tdep->ppc_ctar_regnum) | |
1151 | { | |
1152 | if ( regcache == NULL || | |
1153 | REG_VALID == regcache->get_register_status (PPC_CTAR_REGNUM)) | |
1154 | cb (".reg-ppc-tm-ctar", PPC_LINUX_SIZEOF_CTARREGSET, | |
1155 | PPC_LINUX_SIZEOF_CTARREGSET, | |
1156 | &ppc32_linux_ctarregset, | |
1157 | "Checkpointed Target Address Register", cb_data); | |
1158 | } | |
5aa82d05 AA |
1159 | } |
1160 | ||
a8f60bfc | 1161 | static void |
5366653e | 1162 | ppc_linux_sigtramp_cache (struct frame_info *this_frame, |
a8f60bfc AC |
1163 | struct trad_frame_cache *this_cache, |
1164 | CORE_ADDR func, LONGEST offset, | |
1165 | int bias) | |
1166 | { | |
1167 | CORE_ADDR base; | |
1168 | CORE_ADDR regs; | |
1169 | CORE_ADDR gpregs; | |
1170 | CORE_ADDR fpregs; | |
1171 | int i; | |
5366653e | 1172 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8f60bfc | 1173 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
e17a4113 | 1174 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
a8f60bfc | 1175 | |
5366653e DJ |
1176 | base = get_frame_register_unsigned (this_frame, |
1177 | gdbarch_sp_regnum (gdbarch)); | |
1178 | if (bias > 0 && get_frame_pc (this_frame) != func) | |
a8f60bfc AC |
1179 | /* See below, some signal trampolines increment the stack as their |
1180 | first instruction, need to compensate for that. */ | |
1181 | base -= bias; | |
1182 | ||
1183 | /* Find the address of the register buffer pointer. */ | |
1184 | regs = base + offset; | |
1185 | /* Use that to find the address of the corresponding register | |
1186 | buffers. */ | |
e17a4113 | 1187 | gpregs = read_memory_unsigned_integer (regs, tdep->wordsize, byte_order); |
a8f60bfc AC |
1188 | fpregs = gpregs + 48 * tdep->wordsize; |
1189 | ||
1190 | /* General purpose. */ | |
1191 | for (i = 0; i < 32; i++) | |
1192 | { | |
1193 | int regnum = i + tdep->ppc_gp0_regnum; | |
0df8b418 MS |
1194 | trad_frame_set_reg_addr (this_cache, |
1195 | regnum, gpregs + i * tdep->wordsize); | |
a8f60bfc | 1196 | } |
3e8c568d | 1197 | trad_frame_set_reg_addr (this_cache, |
40a6adc1 | 1198 | gdbarch_pc_regnum (gdbarch), |
3e8c568d | 1199 | gpregs + 32 * tdep->wordsize); |
a8f60bfc AC |
1200 | trad_frame_set_reg_addr (this_cache, tdep->ppc_ctr_regnum, |
1201 | gpregs + 35 * tdep->wordsize); | |
1202 | trad_frame_set_reg_addr (this_cache, tdep->ppc_lr_regnum, | |
1203 | gpregs + 36 * tdep->wordsize); | |
1204 | trad_frame_set_reg_addr (this_cache, tdep->ppc_xer_regnum, | |
1205 | gpregs + 37 * tdep->wordsize); | |
1206 | trad_frame_set_reg_addr (this_cache, tdep->ppc_cr_regnum, | |
1207 | gpregs + 38 * tdep->wordsize); | |
1208 | ||
7284e1be UW |
1209 | if (ppc_linux_trap_reg_p (gdbarch)) |
1210 | { | |
1211 | trad_frame_set_reg_addr (this_cache, PPC_ORIG_R3_REGNUM, | |
1212 | gpregs + 34 * tdep->wordsize); | |
1213 | trad_frame_set_reg_addr (this_cache, PPC_TRAP_REGNUM, | |
1214 | gpregs + 40 * tdep->wordsize); | |
1215 | } | |
1216 | ||
60f140f9 PG |
1217 | if (ppc_floating_point_unit_p (gdbarch)) |
1218 | { | |
1219 | /* Floating point registers. */ | |
1220 | for (i = 0; i < 32; i++) | |
1221 | { | |
40a6adc1 | 1222 | int regnum = i + gdbarch_fp0_regnum (gdbarch); |
60f140f9 PG |
1223 | trad_frame_set_reg_addr (this_cache, regnum, |
1224 | fpregs + i * tdep->wordsize); | |
1225 | } | |
1226 | trad_frame_set_reg_addr (this_cache, tdep->ppc_fpscr_regnum, | |
4019046a | 1227 | fpregs + 32 * tdep->wordsize); |
60f140f9 | 1228 | } |
a8f60bfc AC |
1229 | trad_frame_set_id (this_cache, frame_id_build (base, func)); |
1230 | } | |
1231 | ||
1232 | static void | |
1233 | ppc32_linux_sigaction_cache_init (const struct tramp_frame *self, | |
5366653e | 1234 | struct frame_info *this_frame, |
a8f60bfc AC |
1235 | struct trad_frame_cache *this_cache, |
1236 | CORE_ADDR func) | |
1237 | { | |
5366653e | 1238 | ppc_linux_sigtramp_cache (this_frame, this_cache, func, |
a8f60bfc AC |
1239 | 0xd0 /* Offset to ucontext_t. */ |
1240 | + 0x30 /* Offset to .reg. */, | |
1241 | 0); | |
1242 | } | |
1243 | ||
1244 | static void | |
1245 | ppc64_linux_sigaction_cache_init (const struct tramp_frame *self, | |
5366653e | 1246 | struct frame_info *this_frame, |
a8f60bfc AC |
1247 | struct trad_frame_cache *this_cache, |
1248 | CORE_ADDR func) | |
1249 | { | |
5366653e | 1250 | ppc_linux_sigtramp_cache (this_frame, this_cache, func, |
a8f60bfc AC |
1251 | 0x80 /* Offset to ucontext_t. */ |
1252 | + 0xe0 /* Offset to .reg. */, | |
1253 | 128); | |
1254 | } | |
1255 | ||
1256 | static void | |
1257 | ppc32_linux_sighandler_cache_init (const struct tramp_frame *self, | |
5366653e | 1258 | struct frame_info *this_frame, |
a8f60bfc AC |
1259 | struct trad_frame_cache *this_cache, |
1260 | CORE_ADDR func) | |
1261 | { | |
5366653e | 1262 | ppc_linux_sigtramp_cache (this_frame, this_cache, func, |
a8f60bfc AC |
1263 | 0x40 /* Offset to ucontext_t. */ |
1264 | + 0x1c /* Offset to .reg. */, | |
1265 | 0); | |
1266 | } | |
1267 | ||
1268 | static void | |
1269 | ppc64_linux_sighandler_cache_init (const struct tramp_frame *self, | |
5366653e | 1270 | struct frame_info *this_frame, |
a8f60bfc AC |
1271 | struct trad_frame_cache *this_cache, |
1272 | CORE_ADDR func) | |
1273 | { | |
5366653e | 1274 | ppc_linux_sigtramp_cache (this_frame, this_cache, func, |
a8f60bfc AC |
1275 | 0x80 /* Offset to struct sigcontext. */ |
1276 | + 0x38 /* Offset to .reg. */, | |
1277 | 128); | |
1278 | } | |
1279 | ||
1280 | static struct tramp_frame ppc32_linux_sigaction_tramp_frame = { | |
1281 | SIGTRAMP_FRAME, | |
1282 | 4, | |
1283 | { | |
7bc02706 TT |
1284 | { 0x380000ac, ULONGEST_MAX }, /* li r0, 172 */ |
1285 | { 0x44000002, ULONGEST_MAX }, /* sc */ | |
a8f60bfc AC |
1286 | { TRAMP_SENTINEL_INSN }, |
1287 | }, | |
1288 | ppc32_linux_sigaction_cache_init | |
1289 | }; | |
1290 | static struct tramp_frame ppc64_linux_sigaction_tramp_frame = { | |
1291 | SIGTRAMP_FRAME, | |
1292 | 4, | |
1293 | { | |
7bc02706 TT |
1294 | { 0x38210080, ULONGEST_MAX }, /* addi r1,r1,128 */ |
1295 | { 0x380000ac, ULONGEST_MAX }, /* li r0, 172 */ | |
1296 | { 0x44000002, ULONGEST_MAX }, /* sc */ | |
a8f60bfc AC |
1297 | { TRAMP_SENTINEL_INSN }, |
1298 | }, | |
1299 | ppc64_linux_sigaction_cache_init | |
1300 | }; | |
1301 | static struct tramp_frame ppc32_linux_sighandler_tramp_frame = { | |
1302 | SIGTRAMP_FRAME, | |
1303 | 4, | |
1304 | { | |
7bc02706 TT |
1305 | { 0x38000077, ULONGEST_MAX }, /* li r0,119 */ |
1306 | { 0x44000002, ULONGEST_MAX }, /* sc */ | |
a8f60bfc AC |
1307 | { TRAMP_SENTINEL_INSN }, |
1308 | }, | |
1309 | ppc32_linux_sighandler_cache_init | |
1310 | }; | |
1311 | static struct tramp_frame ppc64_linux_sighandler_tramp_frame = { | |
1312 | SIGTRAMP_FRAME, | |
1313 | 4, | |
1314 | { | |
7bc02706 TT |
1315 | { 0x38210080, ULONGEST_MAX }, /* addi r1,r1,128 */ |
1316 | { 0x38000077, ULONGEST_MAX }, /* li r0,119 */ | |
1317 | { 0x44000002, ULONGEST_MAX }, /* sc */ | |
a8f60bfc AC |
1318 | { TRAMP_SENTINEL_INSN }, |
1319 | }, | |
1320 | ppc64_linux_sighandler_cache_init | |
1321 | }; | |
1322 | ||
7284e1be UW |
1323 | /* Return 1 if PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM are usable. */ |
1324 | int | |
1325 | ppc_linux_trap_reg_p (struct gdbarch *gdbarch) | |
1326 | { | |
1327 | /* If we do not have a target description with registers, then | |
1328 | the special registers will not be included in the register set. */ | |
1329 | if (!tdesc_has_registers (gdbarch_target_desc (gdbarch))) | |
1330 | return 0; | |
1331 | ||
1332 | /* If we do, then it is safe to check the size. */ | |
1333 | return register_size (gdbarch, PPC_ORIG_R3_REGNUM) > 0 | |
1334 | && register_size (gdbarch, PPC_TRAP_REGNUM) > 0; | |
1335 | } | |
1336 | ||
a96d9b2e SDJ |
1337 | /* Return the current system call's number present in the |
1338 | r0 register. When the function fails, it returns -1. */ | |
1339 | static LONGEST | |
1340 | ppc_linux_get_syscall_number (struct gdbarch *gdbarch, | |
00431a78 | 1341 | thread_info *thread) |
a96d9b2e | 1342 | { |
00431a78 | 1343 | struct regcache *regcache = get_thread_regcache (thread); |
a96d9b2e SDJ |
1344 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
1345 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
a96d9b2e SDJ |
1346 | |
1347 | /* Make sure we're in a 32- or 64-bit machine */ | |
1348 | gdb_assert (tdep->wordsize == 4 || tdep->wordsize == 8); | |
1349 | ||
779bc38e TT |
1350 | /* The content of a register */ |
1351 | gdb::byte_vector buf (tdep->wordsize); | |
a96d9b2e SDJ |
1352 | |
1353 | /* Getting the system call number from the register. | |
1354 | When dealing with PowerPC architecture, this information | |
1355 | is stored at 0th register. */ | |
dca08e1f | 1356 | regcache->cooked_read (tdep->ppc_gp0_regnum, buf.data ()); |
a96d9b2e | 1357 | |
779bc38e | 1358 | return extract_signed_integer (buf.data (), tdep->wordsize, byte_order); |
a96d9b2e SDJ |
1359 | } |
1360 | ||
b4cdae6f WW |
1361 | /* PPC process record-replay */ |
1362 | ||
1363 | static struct linux_record_tdep ppc_linux_record_tdep; | |
1364 | static struct linux_record_tdep ppc64_linux_record_tdep; | |
1365 | ||
ddeca1df WW |
1366 | /* ppc_canonicalize_syscall maps from the native PowerPC Linux set of |
1367 | syscall ids into a canonical set of syscall ids used by process | |
1368 | record. (See arch/powerpc/include/uapi/asm/unistd.h in kernel tree.) | |
1369 | Return -1 if this system call is not supported by process record. | |
1370 | Otherwise, return the syscall number for preocess reocrd of given | |
1371 | SYSCALL. */ | |
1372 | ||
b4cdae6f WW |
1373 | static enum gdb_syscall |
1374 | ppc_canonicalize_syscall (int syscall) | |
1375 | { | |
aead7601 SM |
1376 | int result = -1; |
1377 | ||
b4cdae6f | 1378 | if (syscall <= 165) |
aead7601 | 1379 | result = syscall; |
b4cdae6f | 1380 | else if (syscall >= 167 && syscall <= 190) /* Skip query_module 166 */ |
aead7601 | 1381 | result = syscall + 1; |
b4cdae6f | 1382 | else if (syscall >= 192 && syscall <= 197) /* mmap2 */ |
aead7601 | 1383 | result = syscall; |
b4cdae6f | 1384 | else if (syscall == 208) /* tkill */ |
aead7601 | 1385 | result = gdb_sys_tkill; |
b4cdae6f | 1386 | else if (syscall >= 207 && syscall <= 220) /* gettid */ |
aead7601 | 1387 | result = syscall + 224 - 207; |
b4cdae6f | 1388 | else if (syscall >= 234 && syscall <= 239) /* exit_group */ |
aead7601 SM |
1389 | result = syscall + 252 - 234; |
1390 | else if (syscall >= 240 && syscall <= 248) /* timer_create */ | |
1391 | result = syscall += 259 - 240; | |
1392 | else if (syscall >= 250 && syscall <= 251) /* tgkill */ | |
1393 | result = syscall + 270 - 250; | |
b4cdae6f | 1394 | else if (syscall == 336) |
aead7601 | 1395 | result = gdb_sys_recv; |
b4cdae6f | 1396 | else if (syscall == 337) |
aead7601 | 1397 | result = gdb_sys_recvfrom; |
b4cdae6f | 1398 | else if (syscall == 342) |
aead7601 SM |
1399 | result = gdb_sys_recvmsg; |
1400 | ||
1401 | return (enum gdb_syscall) result; | |
b4cdae6f WW |
1402 | } |
1403 | ||
ddeca1df WW |
1404 | /* Record registers which might be clobbered during system call. |
1405 | Return 0 if successful. */ | |
1406 | ||
b4cdae6f WW |
1407 | static int |
1408 | ppc_linux_syscall_record (struct regcache *regcache) | |
1409 | { | |
ac7936df | 1410 | struct gdbarch *gdbarch = regcache->arch (); |
b4cdae6f WW |
1411 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
1412 | ULONGEST scnum; | |
1413 | enum gdb_syscall syscall_gdb; | |
1414 | int ret; | |
b4cdae6f WW |
1415 | |
1416 | regcache_raw_read_unsigned (regcache, tdep->ppc_gp0_regnum, &scnum); | |
1417 | syscall_gdb = ppc_canonicalize_syscall (scnum); | |
1418 | ||
1419 | if (syscall_gdb < 0) | |
1420 | { | |
1421 | printf_unfiltered (_("Process record and replay target doesn't " | |
1422 | "support syscall number %d\n"), (int) scnum); | |
1423 | return 0; | |
1424 | } | |
1425 | ||
1426 | if (syscall_gdb == gdb_sys_sigreturn | |
1427 | || syscall_gdb == gdb_sys_rt_sigreturn) | |
1428 | { | |
1429 | int i, j; | |
1430 | int regsets[] = { tdep->ppc_gp0_regnum, | |
1431 | tdep->ppc_fp0_regnum, | |
1432 | tdep->ppc_vr0_regnum, | |
1433 | tdep->ppc_vsr0_upper_regnum }; | |
1434 | ||
1435 | for (j = 0; j < 4; j++) | |
1436 | { | |
1437 | if (regsets[j] == -1) | |
1438 | continue; | |
1439 | for (i = 0; i < 32; i++) | |
1440 | { | |
1441 | if (record_full_arch_list_add_reg (regcache, regsets[j] + i)) | |
1442 | return -1; | |
1443 | } | |
1444 | } | |
1445 | ||
1446 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_cr_regnum)) | |
1447 | return -1; | |
1448 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_ctr_regnum)) | |
1449 | return -1; | |
1450 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_lr_regnum)) | |
1451 | return -1; | |
1452 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_xer_regnum)) | |
1453 | return -1; | |
1454 | ||
1455 | return 0; | |
1456 | } | |
1457 | ||
1458 | if (tdep->wordsize == 8) | |
1459 | ret = record_linux_system_call (syscall_gdb, regcache, | |
1460 | &ppc64_linux_record_tdep); | |
1461 | else | |
1462 | ret = record_linux_system_call (syscall_gdb, regcache, | |
1463 | &ppc_linux_record_tdep); | |
1464 | ||
1465 | if (ret != 0) | |
1466 | return ret; | |
1467 | ||
1468 | /* Record registers clobbered during syscall. */ | |
b926417a | 1469 | for (int i = 3; i <= 12; i++) |
b4cdae6f WW |
1470 | { |
1471 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_gp0_regnum + i)) | |
1472 | return -1; | |
1473 | } | |
1474 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_gp0_regnum + 0)) | |
1475 | return -1; | |
1476 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_cr_regnum)) | |
1477 | return -1; | |
1478 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_ctr_regnum)) | |
1479 | return -1; | |
1480 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_lr_regnum)) | |
1481 | return -1; | |
1482 | ||
1483 | return 0; | |
1484 | } | |
1485 | ||
ddeca1df WW |
1486 | /* Record registers which might be clobbered during signal handling. |
1487 | Return 0 if successful. */ | |
1488 | ||
b4cdae6f WW |
1489 | static int |
1490 | ppc_linux_record_signal (struct gdbarch *gdbarch, struct regcache *regcache, | |
1491 | enum gdb_signal signal) | |
1492 | { | |
1493 | /* See handle_rt_signal64 in arch/powerpc/kernel/signal_64.c | |
1494 | handle_rt_signal32 in arch/powerpc/kernel/signal_32.c | |
1495 | arch/powerpc/include/asm/ptrace.h | |
1496 | for details. */ | |
1497 | const int SIGNAL_FRAMESIZE = 128; | |
1498 | const int sizeof_rt_sigframe = 1440 * 2 + 8 * 2 + 4 * 6 + 8 + 8 + 128 + 512; | |
1499 | ULONGEST sp; | |
1500 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
1501 | int i; | |
1502 | ||
1503 | for (i = 3; i <= 12; i++) | |
1504 | { | |
1505 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_gp0_regnum + i)) | |
1506 | return -1; | |
1507 | } | |
1508 | ||
1509 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_lr_regnum)) | |
1510 | return -1; | |
1511 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_cr_regnum)) | |
1512 | return -1; | |
1513 | if (record_full_arch_list_add_reg (regcache, tdep->ppc_ctr_regnum)) | |
1514 | return -1; | |
1515 | if (record_full_arch_list_add_reg (regcache, gdbarch_pc_regnum (gdbarch))) | |
1516 | return -1; | |
1517 | if (record_full_arch_list_add_reg (regcache, gdbarch_sp_regnum (gdbarch))) | |
1518 | return -1; | |
1519 | ||
1520 | /* Record the change in the stack. | |
1521 | frame-size = sizeof (struct rt_sigframe) + SIGNAL_FRAMESIZE */ | |
1522 | regcache_raw_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch), &sp); | |
1523 | sp -= SIGNAL_FRAMESIZE; | |
1524 | sp -= sizeof_rt_sigframe; | |
1525 | ||
1526 | if (record_full_arch_list_add_mem (sp, SIGNAL_FRAMESIZE + sizeof_rt_sigframe)) | |
1527 | return -1; | |
1528 | ||
1529 | if (record_full_arch_list_add_end ()) | |
1530 | return -1; | |
1531 | ||
1532 | return 0; | |
1533 | } | |
1534 | ||
7284e1be UW |
1535 | static void |
1536 | ppc_linux_write_pc (struct regcache *regcache, CORE_ADDR pc) | |
1537 | { | |
ac7936df | 1538 | struct gdbarch *gdbarch = regcache->arch (); |
7284e1be UW |
1539 | |
1540 | regcache_cooked_write_unsigned (regcache, gdbarch_pc_regnum (gdbarch), pc); | |
1541 | ||
1542 | /* Set special TRAP register to -1 to prevent the kernel from | |
1543 | messing with the PC we just installed, if we happen to be | |
1544 | within an interrupted system call that the kernel wants to | |
1545 | restart. | |
1546 | ||
1547 | Note that after we return from the dummy call, the TRAP and | |
1548 | ORIG_R3 registers will be automatically restored, and the | |
1549 | kernel continues to restart the system call at this point. */ | |
1550 | if (ppc_linux_trap_reg_p (gdbarch)) | |
1551 | regcache_cooked_write_unsigned (regcache, PPC_TRAP_REGNUM, -1); | |
1552 | } | |
1553 | ||
1554 | static const struct target_desc * | |
1555 | ppc_linux_core_read_description (struct gdbarch *gdbarch, | |
1556 | struct target_ops *target, | |
1557 | bfd *abfd) | |
1558 | { | |
bd64614e | 1559 | struct ppc_linux_features features = ppc_linux_no_features; |
7284e1be | 1560 | asection *altivec = bfd_get_section_by_name (abfd, ".reg-ppc-vmx"); |
604c2f83 | 1561 | asection *vsx = bfd_get_section_by_name (abfd, ".reg-ppc-vsx"); |
7284e1be | 1562 | asection *section = bfd_get_section_by_name (abfd, ".reg"); |
7ca18ed6 EBM |
1563 | asection *ppr = bfd_get_section_by_name (abfd, ".reg-ppc-ppr"); |
1564 | asection *dscr = bfd_get_section_by_name (abfd, ".reg-ppc-dscr"); | |
f2cf6173 | 1565 | asection *tar = bfd_get_section_by_name (abfd, ".reg-ppc-tar"); |
232bfb86 | 1566 | asection *pmu = bfd_get_section_by_name (abfd, ".reg-ppc-pmu"); |
8d619c01 | 1567 | asection *htmspr = bfd_get_section_by_name (abfd, ".reg-ppc-tm-spr"); |
bd64614e | 1568 | |
7284e1be UW |
1569 | if (! section) |
1570 | return NULL; | |
1571 | ||
fd361982 | 1572 | switch (bfd_section_size (section)) |
7284e1be UW |
1573 | { |
1574 | case 48 * 4: | |
bd64614e PFC |
1575 | features.wordsize = 4; |
1576 | break; | |
7284e1be | 1577 | case 48 * 8: |
bd64614e PFC |
1578 | features.wordsize = 8; |
1579 | break; | |
7284e1be UW |
1580 | default: |
1581 | return NULL; | |
1582 | } | |
bd64614e | 1583 | |
bd64614e PFC |
1584 | if (altivec) |
1585 | features.altivec = true; | |
1586 | ||
1587 | if (vsx) | |
1588 | features.vsx = true; | |
1589 | ||
0f83012e | 1590 | CORE_ADDR hwcap = linux_get_hwcap (target); |
0ec848ad PFC |
1591 | |
1592 | features.isa205 = ppc_linux_has_isa205 (hwcap); | |
1593 | ||
7ca18ed6 | 1594 | if (ppr && dscr) |
f2cf6173 EBM |
1595 | { |
1596 | features.ppr_dscr = true; | |
232bfb86 EBM |
1597 | |
1598 | /* We don't require the EBB note section to be present in the | |
1599 | core file to select isa207 because these registers could have | |
1600 | been unavailable when the core file was created. They will | |
1601 | be in the tdep but will show as unavailable. */ | |
1602 | if (tar && pmu) | |
8d619c01 EBM |
1603 | { |
1604 | features.isa207 = true; | |
1605 | if (htmspr) | |
1606 | features.htm = true; | |
1607 | } | |
f2cf6173 | 1608 | } |
7ca18ed6 | 1609 | |
bd64614e | 1610 | return ppc_linux_match_description (features); |
7284e1be UW |
1611 | } |
1612 | ||
591a12a1 UW |
1613 | |
1614 | /* Implementation of `gdbarch_elf_make_msymbol_special', as defined in | |
1615 | gdbarch.h. This implementation is used for the ELFv2 ABI only. */ | |
1616 | ||
1617 | static void | |
1618 | ppc_elfv2_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym) | |
1619 | { | |
1620 | elf_symbol_type *elf_sym = (elf_symbol_type *)sym; | |
1621 | ||
1622 | /* If the symbol is marked as having a local entry point, set a target | |
1623 | flag in the msymbol. We currently only support local entry point | |
1624 | offsets of 8 bytes, which is the only entry point offset ever used | |
1625 | by current compilers. If/when other offsets are ever used, we will | |
1626 | have to use additional target flag bits to store them. */ | |
1627 | switch (PPC64_LOCAL_ENTRY_OFFSET (elf_sym->internal_elf_sym.st_other)) | |
1628 | { | |
1629 | default: | |
1630 | break; | |
1631 | case 8: | |
1632 | MSYMBOL_TARGET_FLAG_1 (msym) = 1; | |
1633 | break; | |
1634 | } | |
1635 | } | |
1636 | ||
1637 | /* Implementation of `gdbarch_skip_entrypoint', as defined in | |
1638 | gdbarch.h. This implementation is used for the ELFv2 ABI only. */ | |
1639 | ||
1640 | static CORE_ADDR | |
1641 | ppc_elfv2_skip_entrypoint (struct gdbarch *gdbarch, CORE_ADDR pc) | |
1642 | { | |
1643 | struct bound_minimal_symbol fun; | |
1644 | int local_entry_offset = 0; | |
1645 | ||
1646 | fun = lookup_minimal_symbol_by_pc (pc); | |
1647 | if (fun.minsym == NULL) | |
1648 | return pc; | |
1649 | ||
1650 | /* See ppc_elfv2_elf_make_msymbol_special for how local entry point | |
1651 | offset values are encoded. */ | |
1652 | if (MSYMBOL_TARGET_FLAG_1 (fun.minsym)) | |
1653 | local_entry_offset = 8; | |
1654 | ||
77e371c0 TT |
1655 | if (BMSYMBOL_VALUE_ADDRESS (fun) <= pc |
1656 | && pc < BMSYMBOL_VALUE_ADDRESS (fun) + local_entry_offset) | |
1657 | return BMSYMBOL_VALUE_ADDRESS (fun) + local_entry_offset; | |
591a12a1 UW |
1658 | |
1659 | return pc; | |
1660 | } | |
1661 | ||
55aa24fb SDJ |
1662 | /* Implementation of `gdbarch_stap_is_single_operand', as defined in |
1663 | gdbarch.h. */ | |
1664 | ||
1665 | static int | |
1666 | ppc_stap_is_single_operand (struct gdbarch *gdbarch, const char *s) | |
1667 | { | |
1668 | return (*s == 'i' /* Literal number. */ | |
1669 | || (isdigit (*s) && s[1] == '(' | |
1670 | && isdigit (s[2])) /* Displacement. */ | |
1671 | || (*s == '(' && isdigit (s[1])) /* Register indirection. */ | |
1672 | || isdigit (*s)); /* Register value. */ | |
1673 | } | |
1674 | ||
1675 | /* Implementation of `gdbarch_stap_parse_special_token', as defined in | |
1676 | gdbarch.h. */ | |
1677 | ||
1678 | static int | |
1679 | ppc_stap_parse_special_token (struct gdbarch *gdbarch, | |
1680 | struct stap_parse_info *p) | |
1681 | { | |
1682 | if (isdigit (*p->arg)) | |
1683 | { | |
1684 | /* This temporary pointer is needed because we have to do a lookahead. | |
1685 | We could be dealing with a register displacement, and in such case | |
1686 | we would not need to do anything. */ | |
1687 | const char *s = p->arg; | |
1688 | char *regname; | |
1689 | int len; | |
1690 | struct stoken str; | |
1691 | ||
1692 | while (isdigit (*s)) | |
1693 | ++s; | |
1694 | ||
1695 | if (*s == '(') | |
1696 | { | |
1697 | /* It is a register displacement indeed. Returning 0 means we are | |
1698 | deferring the treatment of this case to the generic parser. */ | |
1699 | return 0; | |
1700 | } | |
1701 | ||
1702 | len = s - p->arg; | |
224c3ddb | 1703 | regname = (char *) alloca (len + 2); |
55aa24fb SDJ |
1704 | regname[0] = 'r'; |
1705 | ||
1706 | strncpy (regname + 1, p->arg, len); | |
1707 | ++len; | |
1708 | regname[len] = '\0'; | |
1709 | ||
1710 | if (user_reg_map_name_to_regnum (gdbarch, regname, len) == -1) | |
1711 | error (_("Invalid register name `%s' on expression `%s'."), | |
1712 | regname, p->saved_arg); | |
1713 | ||
410a0ff2 | 1714 | write_exp_elt_opcode (&p->pstate, OP_REGISTER); |
55aa24fb SDJ |
1715 | str.ptr = regname; |
1716 | str.length = len; | |
410a0ff2 SDJ |
1717 | write_exp_string (&p->pstate, str); |
1718 | write_exp_elt_opcode (&p->pstate, OP_REGISTER); | |
55aa24fb SDJ |
1719 | |
1720 | p->arg = s; | |
1721 | } | |
1722 | else | |
1723 | { | |
1724 | /* All the other tokens should be handled correctly by the generic | |
1725 | parser. */ | |
1726 | return 0; | |
1727 | } | |
1728 | ||
1729 | return 1; | |
1730 | } | |
cc5f0d61 | 1731 | |
ddeca1df WW |
1732 | /* Initialize linux_record_tdep if not initialized yet. |
1733 | WORDSIZE is 4 or 8 for 32- or 64-bit PowerPC Linux respectively. | |
1734 | Sizes of data structures are initialized accordingly. */ | |
b4cdae6f WW |
1735 | |
1736 | static void | |
1737 | ppc_init_linux_record_tdep (struct linux_record_tdep *record_tdep, | |
1738 | int wordsize) | |
1739 | { | |
1740 | /* Simply return if it had been initialized. */ | |
1741 | if (record_tdep->size_pointer != 0) | |
1742 | return; | |
1743 | ||
1744 | /* These values are the size of the type that will be used in a system | |
1745 | call. They are obtained from Linux Kernel source. */ | |
1746 | ||
1747 | if (wordsize == 8) | |
1748 | { | |
1749 | record_tdep->size_pointer = 8; | |
1750 | record_tdep->size__old_kernel_stat = 32; | |
1751 | record_tdep->size_tms = 32; | |
1752 | record_tdep->size_loff_t = 8; | |
1753 | record_tdep->size_flock = 32; | |
1754 | record_tdep->size_oldold_utsname = 45; | |
1755 | record_tdep->size_ustat = 32; | |
7571f7f2 MK |
1756 | record_tdep->size_old_sigaction = 32; |
1757 | record_tdep->size_old_sigset_t = 8; | |
b4cdae6f WW |
1758 | record_tdep->size_rlimit = 16; |
1759 | record_tdep->size_rusage = 144; | |
1760 | record_tdep->size_timeval = 16; | |
1761 | record_tdep->size_timezone = 8; | |
1762 | record_tdep->size_old_gid_t = 4; | |
1763 | record_tdep->size_old_uid_t = 4; | |
1764 | record_tdep->size_fd_set = 128; | |
72aded86 | 1765 | record_tdep->size_old_dirent = 280; |
b4cdae6f WW |
1766 | record_tdep->size_statfs = 120; |
1767 | record_tdep->size_statfs64 = 120; | |
1768 | record_tdep->size_sockaddr = 16; | |
1769 | record_tdep->size_int = 4; | |
1770 | record_tdep->size_long = 8; | |
1771 | record_tdep->size_ulong = 8; | |
1772 | record_tdep->size_msghdr = 56; | |
1773 | record_tdep->size_itimerval = 32; | |
1774 | record_tdep->size_stat = 144; | |
1775 | record_tdep->size_old_utsname = 325; | |
1776 | record_tdep->size_sysinfo = 112; | |
1777 | record_tdep->size_msqid_ds = 120; | |
1778 | record_tdep->size_shmid_ds = 112; | |
1779 | record_tdep->size_new_utsname = 390; | |
1780 | record_tdep->size_timex = 208; | |
1781 | record_tdep->size_mem_dqinfo = 24; | |
1782 | record_tdep->size_if_dqblk = 72; | |
1783 | record_tdep->size_fs_quota_stat = 80; | |
1784 | record_tdep->size_timespec = 16; | |
1785 | record_tdep->size_pollfd = 8; | |
1786 | record_tdep->size_NFS_FHSIZE = 32; | |
1787 | record_tdep->size_knfsd_fh = 132; | |
c28ebe25 | 1788 | record_tdep->size_TASK_COMM_LEN = 16; |
7571f7f2 MK |
1789 | record_tdep->size_sigaction = 32; |
1790 | record_tdep->size_sigset_t = 8; | |
b4cdae6f WW |
1791 | record_tdep->size_siginfo_t = 128; |
1792 | record_tdep->size_cap_user_data_t = 8; | |
1793 | record_tdep->size_stack_t = 24; | |
1794 | record_tdep->size_off_t = 8; | |
1795 | record_tdep->size_stat64 = 104; | |
1796 | record_tdep->size_gid_t = 4; | |
1797 | record_tdep->size_uid_t = 4; | |
1798 | record_tdep->size_PAGE_SIZE = 0x10000; /* 64KB */ | |
1799 | record_tdep->size_flock64 = 32; | |
1800 | record_tdep->size_io_event = 32; | |
1801 | record_tdep->size_iocb = 64; | |
1802 | record_tdep->size_epoll_event = 16; | |
1803 | record_tdep->size_itimerspec = 32; | |
1804 | record_tdep->size_mq_attr = 64; | |
b4cdae6f WW |
1805 | record_tdep->size_termios = 44; |
1806 | record_tdep->size_pid_t = 4; | |
1807 | record_tdep->size_winsize = 8; | |
1808 | record_tdep->size_serial_struct = 72; | |
1809 | record_tdep->size_serial_icounter_struct = 80; | |
1810 | record_tdep->size_size_t = 8; | |
1811 | record_tdep->size_iovec = 16; | |
b80d067f | 1812 | record_tdep->size_time_t = 8; |
b4cdae6f WW |
1813 | } |
1814 | else if (wordsize == 4) | |
1815 | { | |
1816 | record_tdep->size_pointer = 4; | |
1817 | record_tdep->size__old_kernel_stat = 32; | |
1818 | record_tdep->size_tms = 16; | |
1819 | record_tdep->size_loff_t = 8; | |
1820 | record_tdep->size_flock = 16; | |
1821 | record_tdep->size_oldold_utsname = 45; | |
1822 | record_tdep->size_ustat = 20; | |
7571f7f2 MK |
1823 | record_tdep->size_old_sigaction = 16; |
1824 | record_tdep->size_old_sigset_t = 4; | |
b4cdae6f WW |
1825 | record_tdep->size_rlimit = 8; |
1826 | record_tdep->size_rusage = 72; | |
1827 | record_tdep->size_timeval = 8; | |
1828 | record_tdep->size_timezone = 8; | |
1829 | record_tdep->size_old_gid_t = 4; | |
1830 | record_tdep->size_old_uid_t = 4; | |
1831 | record_tdep->size_fd_set = 128; | |
72aded86 | 1832 | record_tdep->size_old_dirent = 268; |
b4cdae6f WW |
1833 | record_tdep->size_statfs = 64; |
1834 | record_tdep->size_statfs64 = 88; | |
1835 | record_tdep->size_sockaddr = 16; | |
1836 | record_tdep->size_int = 4; | |
1837 | record_tdep->size_long = 4; | |
1838 | record_tdep->size_ulong = 4; | |
1839 | record_tdep->size_msghdr = 28; | |
1840 | record_tdep->size_itimerval = 16; | |
1841 | record_tdep->size_stat = 88; | |
1842 | record_tdep->size_old_utsname = 325; | |
1843 | record_tdep->size_sysinfo = 64; | |
1844 | record_tdep->size_msqid_ds = 68; | |
1845 | record_tdep->size_shmid_ds = 60; | |
1846 | record_tdep->size_new_utsname = 390; | |
1847 | record_tdep->size_timex = 128; | |
1848 | record_tdep->size_mem_dqinfo = 24; | |
1849 | record_tdep->size_if_dqblk = 72; | |
1850 | record_tdep->size_fs_quota_stat = 80; | |
1851 | record_tdep->size_timespec = 8; | |
1852 | record_tdep->size_pollfd = 8; | |
1853 | record_tdep->size_NFS_FHSIZE = 32; | |
1854 | record_tdep->size_knfsd_fh = 132; | |
c28ebe25 | 1855 | record_tdep->size_TASK_COMM_LEN = 16; |
7571f7f2 MK |
1856 | record_tdep->size_sigaction = 20; |
1857 | record_tdep->size_sigset_t = 8; | |
b4cdae6f WW |
1858 | record_tdep->size_siginfo_t = 128; |
1859 | record_tdep->size_cap_user_data_t = 4; | |
1860 | record_tdep->size_stack_t = 12; | |
1861 | record_tdep->size_off_t = 4; | |
1862 | record_tdep->size_stat64 = 104; | |
1863 | record_tdep->size_gid_t = 4; | |
1864 | record_tdep->size_uid_t = 4; | |
1865 | record_tdep->size_PAGE_SIZE = 0x10000; /* 64KB */ | |
1866 | record_tdep->size_flock64 = 32; | |
1867 | record_tdep->size_io_event = 32; | |
1868 | record_tdep->size_iocb = 64; | |
1869 | record_tdep->size_epoll_event = 16; | |
1870 | record_tdep->size_itimerspec = 16; | |
1871 | record_tdep->size_mq_attr = 32; | |
b4cdae6f WW |
1872 | record_tdep->size_termios = 44; |
1873 | record_tdep->size_pid_t = 4; | |
1874 | record_tdep->size_winsize = 8; | |
1875 | record_tdep->size_serial_struct = 60; | |
1876 | record_tdep->size_serial_icounter_struct = 80; | |
1877 | record_tdep->size_size_t = 4; | |
1878 | record_tdep->size_iovec = 8; | |
b80d067f | 1879 | record_tdep->size_time_t = 4; |
b4cdae6f WW |
1880 | } |
1881 | else | |
1882 | internal_error (__FILE__, __LINE__, _("unexpected wordsize")); | |
1883 | ||
1884 | /* These values are the second argument of system call "sys_fcntl" | |
1885 | and "sys_fcntl64". They are obtained from Linux Kernel source. */ | |
1886 | record_tdep->fcntl_F_GETLK = 5; | |
1887 | record_tdep->fcntl_F_GETLK64 = 12; | |
1888 | record_tdep->fcntl_F_SETLK64 = 13; | |
1889 | record_tdep->fcntl_F_SETLKW64 = 14; | |
1890 | ||
1891 | record_tdep->arg1 = PPC_R0_REGNUM + 3; | |
1892 | record_tdep->arg2 = PPC_R0_REGNUM + 4; | |
1893 | record_tdep->arg3 = PPC_R0_REGNUM + 5; | |
1894 | record_tdep->arg4 = PPC_R0_REGNUM + 6; | |
1895 | record_tdep->arg5 = PPC_R0_REGNUM + 7; | |
1896 | record_tdep->arg6 = PPC_R0_REGNUM + 8; | |
1897 | ||
1898 | /* These values are the second argument of system call "sys_ioctl". | |
1899 | They are obtained from Linux Kernel source. | |
1900 | See arch/powerpc/include/uapi/asm/ioctls.h. */ | |
1901 | record_tdep->ioctl_TCGETS = 0x403c7413; | |
1902 | record_tdep->ioctl_TCSETS = 0x803c7414; | |
1903 | record_tdep->ioctl_TCSETSW = 0x803c7415; | |
1904 | record_tdep->ioctl_TCSETSF = 0x803c7416; | |
1905 | record_tdep->ioctl_TCGETA = 0x40147417; | |
1906 | record_tdep->ioctl_TCSETA = 0x80147418; | |
1907 | record_tdep->ioctl_TCSETAW = 0x80147419; | |
1908 | record_tdep->ioctl_TCSETAF = 0x8014741c; | |
1909 | record_tdep->ioctl_TCSBRK = 0x2000741d; | |
1910 | record_tdep->ioctl_TCXONC = 0x2000741e; | |
1911 | record_tdep->ioctl_TCFLSH = 0x2000741f; | |
1912 | record_tdep->ioctl_TIOCEXCL = 0x540c; | |
1913 | record_tdep->ioctl_TIOCNXCL = 0x540d; | |
1914 | record_tdep->ioctl_TIOCSCTTY = 0x540e; | |
1915 | record_tdep->ioctl_TIOCGPGRP = 0x40047477; | |
1916 | record_tdep->ioctl_TIOCSPGRP = 0x80047476; | |
1917 | record_tdep->ioctl_TIOCOUTQ = 0x40047473; | |
1918 | record_tdep->ioctl_TIOCSTI = 0x5412; | |
1919 | record_tdep->ioctl_TIOCGWINSZ = 0x40087468; | |
1920 | record_tdep->ioctl_TIOCSWINSZ = 0x80087467; | |
1921 | record_tdep->ioctl_TIOCMGET = 0x5415; | |
1922 | record_tdep->ioctl_TIOCMBIS = 0x5416; | |
1923 | record_tdep->ioctl_TIOCMBIC = 0x5417; | |
1924 | record_tdep->ioctl_TIOCMSET = 0x5418; | |
1925 | record_tdep->ioctl_TIOCGSOFTCAR = 0x5419; | |
1926 | record_tdep->ioctl_TIOCSSOFTCAR = 0x541a; | |
1927 | record_tdep->ioctl_FIONREAD = 0x4004667f; | |
1928 | record_tdep->ioctl_TIOCINQ = 0x4004667f; | |
1929 | record_tdep->ioctl_TIOCLINUX = 0x541c; | |
1930 | record_tdep->ioctl_TIOCCONS = 0x541d; | |
1931 | record_tdep->ioctl_TIOCGSERIAL = 0x541e; | |
1932 | record_tdep->ioctl_TIOCSSERIAL = 0x541f; | |
1933 | record_tdep->ioctl_TIOCPKT = 0x5420; | |
1934 | record_tdep->ioctl_FIONBIO = 0x8004667e; | |
1935 | record_tdep->ioctl_TIOCNOTTY = 0x5422; | |
1936 | record_tdep->ioctl_TIOCSETD = 0x5423; | |
1937 | record_tdep->ioctl_TIOCGETD = 0x5424; | |
1938 | record_tdep->ioctl_TCSBRKP = 0x5425; | |
1939 | record_tdep->ioctl_TIOCSBRK = 0x5427; | |
1940 | record_tdep->ioctl_TIOCCBRK = 0x5428; | |
1941 | record_tdep->ioctl_TIOCGSID = 0x5429; | |
1942 | record_tdep->ioctl_TIOCGPTN = 0x40045430; | |
1943 | record_tdep->ioctl_TIOCSPTLCK = 0x80045431; | |
1944 | record_tdep->ioctl_FIONCLEX = 0x20006602; | |
1945 | record_tdep->ioctl_FIOCLEX = 0x20006601; | |
1946 | record_tdep->ioctl_FIOASYNC = 0x8004667d; | |
1947 | record_tdep->ioctl_TIOCSERCONFIG = 0x5453; | |
1948 | record_tdep->ioctl_TIOCSERGWILD = 0x5454; | |
1949 | record_tdep->ioctl_TIOCSERSWILD = 0x5455; | |
1950 | record_tdep->ioctl_TIOCGLCKTRMIOS = 0x5456; | |
1951 | record_tdep->ioctl_TIOCSLCKTRMIOS = 0x5457; | |
1952 | record_tdep->ioctl_TIOCSERGSTRUCT = 0x5458; | |
1953 | record_tdep->ioctl_TIOCSERGETLSR = 0x5459; | |
1954 | record_tdep->ioctl_TIOCSERGETMULTI = 0x545a; | |
1955 | record_tdep->ioctl_TIOCSERSETMULTI = 0x545b; | |
1956 | record_tdep->ioctl_TIOCMIWAIT = 0x545c; | |
1957 | record_tdep->ioctl_TIOCGICOUNT = 0x545d; | |
1958 | record_tdep->ioctl_FIOQSIZE = 0x40086680; | |
1959 | } | |
cc5f0d61 | 1960 | |
00d5215e UW |
1961 | /* Return a floating-point format for a floating-point variable of |
1962 | length LEN in bits. If non-NULL, NAME is the name of its type. | |
1963 | If no suitable type is found, return NULL. */ | |
1964 | ||
1965 | const struct floatformat ** | |
1966 | ppc_floatformat_for_type (struct gdbarch *gdbarch, | |
1967 | const char *name, int len) | |
1968 | { | |
1969 | if (len == 128 && name) | |
ed0f4273 UW |
1970 | { |
1971 | if (strcmp (name, "__float128") == 0 | |
1972 | || strcmp (name, "_Float128") == 0 | |
1973 | || strcmp (name, "_Float64x") == 0 | |
1974 | || strcmp (name, "complex _Float128") == 0 | |
1975 | || strcmp (name, "complex _Float64x") == 0) | |
1976 | return floatformats_ia64_quad; | |
1977 | ||
1978 | if (strcmp (name, "__ibm128") == 0) | |
1979 | return floatformats_ibm_long_double; | |
1980 | } | |
00d5215e UW |
1981 | |
1982 | return default_floatformat_for_type (gdbarch, name, len); | |
1983 | } | |
1984 | ||
7b112f9c JT |
1985 | static void |
1986 | ppc_linux_init_abi (struct gdbarch_info info, | |
1987 | struct gdbarch *gdbarch) | |
1988 | { | |
1989 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
0dba2a6c | 1990 | struct tdesc_arch_data *tdesc_data = info.tdesc_data; |
05c0465e SDJ |
1991 | static const char *const stap_integer_prefixes[] = { "i", NULL }; |
1992 | static const char *const stap_register_indirection_prefixes[] = { "(", | |
1993 | NULL }; | |
1994 | static const char *const stap_register_indirection_suffixes[] = { ")", | |
1995 | NULL }; | |
7b112f9c | 1996 | |
a5ee0f0c PA |
1997 | linux_init_abi (info, gdbarch); |
1998 | ||
b14d30e1 | 1999 | /* PPC GNU/Linux uses either 64-bit or 128-bit long doubles; where |
ed0f4273 UW |
2000 | 128-bit, they can be either IBM long double or IEEE quad long double. |
2001 | The 64-bit long double case will be detected automatically using | |
2002 | the size specified in debug info. We use a .gnu.attribute flag | |
2003 | to distinguish between the IBM long double and IEEE quad cases. */ | |
b14d30e1 | 2004 | set_gdbarch_long_double_bit (gdbarch, 16 * TARGET_CHAR_BIT); |
ed0f4273 UW |
2005 | if (tdep->long_double_abi == POWERPC_LONG_DOUBLE_IEEE128) |
2006 | set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad); | |
2007 | else | |
2008 | set_gdbarch_long_double_format (gdbarch, floatformats_ibm_long_double); | |
0598a43c | 2009 | |
00d5215e UW |
2010 | /* Support for floating-point data type variants. */ |
2011 | set_gdbarch_floatformat_for_type (gdbarch, ppc_floatformat_for_type); | |
2012 | ||
7284e1be UW |
2013 | /* Handle inferior calls during interrupted system calls. */ |
2014 | set_gdbarch_write_pc (gdbarch, ppc_linux_write_pc); | |
2015 | ||
a96d9b2e SDJ |
2016 | /* Get the syscall number from the arch's register. */ |
2017 | set_gdbarch_get_syscall_number (gdbarch, ppc_linux_get_syscall_number); | |
2018 | ||
55aa24fb | 2019 | /* SystemTap functions. */ |
05c0465e SDJ |
2020 | set_gdbarch_stap_integer_prefixes (gdbarch, stap_integer_prefixes); |
2021 | set_gdbarch_stap_register_indirection_prefixes (gdbarch, | |
2022 | stap_register_indirection_prefixes); | |
2023 | set_gdbarch_stap_register_indirection_suffixes (gdbarch, | |
2024 | stap_register_indirection_suffixes); | |
55aa24fb SDJ |
2025 | set_gdbarch_stap_gdb_register_prefix (gdbarch, "r"); |
2026 | set_gdbarch_stap_is_single_operand (gdbarch, ppc_stap_is_single_operand); | |
2027 | set_gdbarch_stap_parse_special_token (gdbarch, | |
2028 | ppc_stap_parse_special_token); | |
2029 | ||
7b112f9c JT |
2030 | if (tdep->wordsize == 4) |
2031 | { | |
b9ff3018 AC |
2032 | /* Until November 2001, gcc did not comply with the 32 bit SysV |
2033 | R4 ABI requirement that structures less than or equal to 8 | |
2034 | bytes should be returned in registers. Instead GCC was using | |
b021a221 | 2035 | the AIX/PowerOpen ABI - everything returned in memory |
b9ff3018 AC |
2036 | (well ignoring vectors that is). When this was corrected, it |
2037 | wasn't fixed for GNU/Linux native platform. Use the | |
2038 | PowerOpen struct convention. */ | |
05580c65 | 2039 | set_gdbarch_return_value (gdbarch, ppc_linux_return_value); |
b9ff3018 | 2040 | |
7b112f9c JT |
2041 | set_gdbarch_memory_remove_breakpoint (gdbarch, |
2042 | ppc_linux_memory_remove_breakpoint); | |
61a65099 | 2043 | |
f470a70a | 2044 | /* Shared library handling. */ |
5d853008 | 2045 | set_gdbarch_skip_trampoline_code (gdbarch, ppc_skip_trampoline_code); |
7b112f9c | 2046 | set_solib_svr4_fetch_link_map_offsets |
76a9d10f | 2047 | (gdbarch, svr4_ilp32_fetch_link_map_offsets); |
a8f60bfc | 2048 | |
a96d9b2e | 2049 | /* Setting the correct XML syscall filename. */ |
458c8db8 | 2050 | set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_PPC); |
a96d9b2e | 2051 | |
a8f60bfc | 2052 | /* Trampolines. */ |
0df8b418 MS |
2053 | tramp_frame_prepend_unwinder (gdbarch, |
2054 | &ppc32_linux_sigaction_tramp_frame); | |
2055 | tramp_frame_prepend_unwinder (gdbarch, | |
2056 | &ppc32_linux_sighandler_tramp_frame); | |
a78c2d62 UW |
2057 | |
2058 | /* BFD target for core files. */ | |
2059 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) | |
2060 | set_gdbarch_gcore_bfd_target (gdbarch, "elf32-powerpcle"); | |
2061 | else | |
2062 | set_gdbarch_gcore_bfd_target (gdbarch, "elf32-powerpc"); | |
2f2241f1 | 2063 | |
5d853008 ME |
2064 | if (powerpc_so_ops.in_dynsym_resolve_code == NULL) |
2065 | { | |
2066 | powerpc_so_ops = svr4_so_ops; | |
2067 | /* Override dynamic resolve function. */ | |
2068 | powerpc_so_ops.in_dynsym_resolve_code = | |
2069 | powerpc_linux_in_dynsym_resolve_code; | |
2070 | } | |
2071 | set_solib_ops (gdbarch, &powerpc_so_ops); | |
2072 | ||
2073 | set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver); | |
7b112f9c | 2074 | } |
f470a70a JB |
2075 | |
2076 | if (tdep->wordsize == 8) | |
2077 | { | |
d4094b6a UW |
2078 | if (tdep->elf_abi == POWERPC_ELF_V1) |
2079 | { | |
2080 | /* Handle PPC GNU/Linux 64-bit function pointers (which are really | |
2081 | function descriptors). */ | |
2082 | set_gdbarch_convert_from_func_ptr_addr | |
2083 | (gdbarch, ppc64_convert_from_func_ptr_addr); | |
00d5f93a | 2084 | |
d4094b6a UW |
2085 | set_gdbarch_elf_make_msymbol_special |
2086 | (gdbarch, ppc64_elf_make_msymbol_special); | |
2087 | } | |
591a12a1 UW |
2088 | else |
2089 | { | |
2090 | set_gdbarch_elf_make_msymbol_special | |
2091 | (gdbarch, ppc_elfv2_elf_make_msymbol_special); | |
2092 | ||
2093 | set_gdbarch_skip_entrypoint (gdbarch, ppc_elfv2_skip_entrypoint); | |
2094 | } | |
24c274a1 | 2095 | |
fb318ff7 | 2096 | /* Shared library handling. */ |
2bbe3cc1 | 2097 | set_gdbarch_skip_trampoline_code (gdbarch, ppc64_skip_trampoline_code); |
fb318ff7 DJ |
2098 | set_solib_svr4_fetch_link_map_offsets |
2099 | (gdbarch, svr4_lp64_fetch_link_map_offsets); | |
2100 | ||
a96d9b2e | 2101 | /* Setting the correct XML syscall filename. */ |
458c8db8 | 2102 | set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_PPC64); |
a96d9b2e | 2103 | |
a8f60bfc | 2104 | /* Trampolines. */ |
0df8b418 MS |
2105 | tramp_frame_prepend_unwinder (gdbarch, |
2106 | &ppc64_linux_sigaction_tramp_frame); | |
2107 | tramp_frame_prepend_unwinder (gdbarch, | |
2108 | &ppc64_linux_sighandler_tramp_frame); | |
a78c2d62 UW |
2109 | |
2110 | /* BFD target for core files. */ | |
2111 | if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_LITTLE) | |
2112 | set_gdbarch_gcore_bfd_target (gdbarch, "elf64-powerpcle"); | |
2113 | else | |
2114 | set_gdbarch_gcore_bfd_target (gdbarch, "elf64-powerpc"); | |
f470a70a | 2115 | } |
b3ac9c77 | 2116 | |
7284e1be | 2117 | set_gdbarch_core_read_description (gdbarch, ppc_linux_core_read_description); |
5aa82d05 AA |
2118 | set_gdbarch_iterate_over_regset_sections (gdbarch, |
2119 | ppc_linux_iterate_over_regset_sections); | |
b2756930 KB |
2120 | |
2121 | /* Enable TLS support. */ | |
2122 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | |
2123 | svr4_fetch_objfile_link_map); | |
7284e1be UW |
2124 | |
2125 | if (tdesc_data) | |
2126 | { | |
2127 | const struct tdesc_feature *feature; | |
2128 | ||
2129 | /* If we have target-described registers, then we can safely | |
2130 | reserve a number for PPC_ORIG_R3_REGNUM and PPC_TRAP_REGNUM | |
2131 | (whether they are described or not). */ | |
2132 | gdb_assert (gdbarch_num_regs (gdbarch) <= PPC_ORIG_R3_REGNUM); | |
2133 | set_gdbarch_num_regs (gdbarch, PPC_TRAP_REGNUM + 1); | |
2134 | ||
2135 | /* If they are present, then assign them to the reserved number. */ | |
2136 | feature = tdesc_find_feature (info.target_desc, | |
2137 | "org.gnu.gdb.power.linux"); | |
2138 | if (feature != NULL) | |
2139 | { | |
2140 | tdesc_numbered_register (feature, tdesc_data, | |
2141 | PPC_ORIG_R3_REGNUM, "orig_r3"); | |
2142 | tdesc_numbered_register (feature, tdesc_data, | |
2143 | PPC_TRAP_REGNUM, "trap"); | |
2144 | } | |
2145 | } | |
85e747d2 | 2146 | |
906d60cf PA |
2147 | set_gdbarch_displaced_step_location (gdbarch, |
2148 | linux_displaced_step_location); | |
2149 | ||
b4cdae6f WW |
2150 | /* Support reverse debugging. */ |
2151 | set_gdbarch_process_record (gdbarch, ppc_process_record); | |
2152 | set_gdbarch_process_record_signal (gdbarch, ppc_linux_record_signal); | |
2153 | tdep->ppc_syscall_record = ppc_linux_syscall_record; | |
2154 | ||
2155 | ppc_init_linux_record_tdep (&ppc_linux_record_tdep, 4); | |
2156 | ppc_init_linux_record_tdep (&ppc64_linux_record_tdep, 8); | |
7b112f9c JT |
2157 | } |
2158 | ||
2159 | void | |
2160 | _initialize_ppc_linux_tdep (void) | |
2161 | { | |
0a0a4ac3 AC |
2162 | /* Register for all sub-familes of the POWER/PowerPC: 32-bit and |
2163 | 64-bit PowerPC, and the older rs6k. */ | |
2164 | gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc, GDB_OSABI_LINUX, | |
2165 | ppc_linux_init_abi); | |
2166 | gdbarch_register_osabi (bfd_arch_powerpc, bfd_mach_ppc64, GDB_OSABI_LINUX, | |
2167 | ppc_linux_init_abi); | |
2168 | gdbarch_register_osabi (bfd_arch_rs6000, bfd_mach_rs6k, GDB_OSABI_LINUX, | |
2169 | ppc_linux_init_abi); | |
7284e1be UW |
2170 | |
2171 | /* Initialize the Linux target descriptions. */ | |
2172 | initialize_tdesc_powerpc_32l (); | |
2173 | initialize_tdesc_powerpc_altivec32l (); | |
604c2f83 | 2174 | initialize_tdesc_powerpc_vsx32l (); |
69abc51c TJB |
2175 | initialize_tdesc_powerpc_isa205_32l (); |
2176 | initialize_tdesc_powerpc_isa205_altivec32l (); | |
2177 | initialize_tdesc_powerpc_isa205_vsx32l (); | |
7ca18ed6 | 2178 | initialize_tdesc_powerpc_isa205_ppr_dscr_vsx32l (); |
f2cf6173 | 2179 | initialize_tdesc_powerpc_isa207_vsx32l (); |
8d619c01 | 2180 | initialize_tdesc_powerpc_isa207_htm_vsx32l (); |
7284e1be UW |
2181 | initialize_tdesc_powerpc_64l (); |
2182 | initialize_tdesc_powerpc_altivec64l (); | |
604c2f83 | 2183 | initialize_tdesc_powerpc_vsx64l (); |
69abc51c TJB |
2184 | initialize_tdesc_powerpc_isa205_64l (); |
2185 | initialize_tdesc_powerpc_isa205_altivec64l (); | |
2186 | initialize_tdesc_powerpc_isa205_vsx64l (); | |
7ca18ed6 | 2187 | initialize_tdesc_powerpc_isa205_ppr_dscr_vsx64l (); |
f2cf6173 | 2188 | initialize_tdesc_powerpc_isa207_vsx64l (); |
8d619c01 | 2189 | initialize_tdesc_powerpc_isa207_htm_vsx64l (); |
7284e1be | 2190 | initialize_tdesc_powerpc_e500l (); |
7b112f9c | 2191 | } |