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7b112f9c JT |
1 | /* Target-dependent code for PowerPC systems using the SVR4 ABI |
2 | for GDB, the GNU debugger. | |
3 | ||
6066c3de | 4 | Copyright 2000, 2001, 2002, 2003 Free Software Foundation, Inc. |
7b112f9c JT |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
23 | #include "defs.h" | |
24 | #include "gdbcore.h" | |
25 | #include "inferior.h" | |
26 | #include "regcache.h" | |
27 | #include "value.h" | |
bdf64bac | 28 | #include "gdb_string.h" |
8be9034a | 29 | #include "gdb_assert.h" |
7b112f9c | 30 | #include "ppc-tdep.h" |
6066c3de | 31 | #include "target.h" |
7b112f9c | 32 | |
7b112f9c JT |
33 | /* Pass the arguments in either registers, or in the stack. Using the |
34 | ppc sysv ABI, the first eight words of the argument list (that might | |
35 | be less than eight parameters if some parameters occupy more than one | |
36 | word) are passed in r3..r10 registers. float and double parameters are | |
37 | passed in fpr's, in addition to that. Rest of the parameters if any | |
38 | are passed in user stack. | |
39 | ||
40 | If the function is returning a structure, then the return address is passed | |
41 | in r3, then the first 7 words of the parametes can be passed in registers, | |
42 | starting from r4. */ | |
43 | ||
44 | CORE_ADDR | |
77b2b6d4 AC |
45 | ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, |
46 | struct regcache *regcache, CORE_ADDR bp_addr, | |
47 | int nargs, struct value **args, CORE_ADDR sp, | |
48 | int struct_return, CORE_ADDR struct_addr) | |
7b112f9c | 49 | { |
0a613259 | 50 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); |
68856ea3 AC |
51 | const CORE_ADDR saved_sp = read_sp (); |
52 | int argspace = 0; /* 0 is an initial wrong guess. */ | |
53 | int write_pass; | |
7b112f9c | 54 | |
68856ea3 | 55 | /* Go through the argument list twice. |
7b112f9c | 56 | |
68856ea3 AC |
57 | Pass 1: Figure out how much new stack space is required for |
58 | arguments and pushed values. Unlike the PowerOpen ABI, the SysV | |
59 | ABI doesn't reserve any extra space for parameters which are put | |
60 | in registers, but does always push structures and then pass their | |
61 | address. | |
7a41266b | 62 | |
68856ea3 AC |
63 | Pass 2: Replay the same computation but this time also write the |
64 | values out to the target. */ | |
7b112f9c | 65 | |
68856ea3 AC |
66 | for (write_pass = 0; write_pass < 2; write_pass++) |
67 | { | |
68 | int argno; | |
69 | /* Next available floating point register for float and double | |
70 | arguments. */ | |
71 | int freg = 1; | |
72 | /* Next available general register for non-float, non-vector | |
73 | arguments. */ | |
74 | int greg = 3; | |
75 | /* Next available vector register for vector arguments. */ | |
76 | int vreg = 2; | |
77 | /* Arguments start above the "LR save word" and "Back chain". */ | |
78 | int argoffset = 2 * tdep->wordsize; | |
79 | /* Structures start after the arguments. */ | |
80 | int structoffset = argoffset + argspace; | |
81 | ||
82 | /* If the function is returning a `struct', then the first word | |
944fcfab AC |
83 | (which will be passed in r3) is used for struct return |
84 | address. In that case we should advance one word and start | |
85 | from r4 register to copy parameters. */ | |
68856ea3 | 86 | if (struct_return) |
7b112f9c | 87 | { |
68856ea3 AC |
88 | if (write_pass) |
89 | regcache_cooked_write_signed (regcache, | |
90 | tdep->ppc_gp0_regnum + greg, | |
91 | struct_addr); | |
92 | greg++; | |
7b112f9c | 93 | } |
68856ea3 AC |
94 | |
95 | for (argno = 0; argno < nargs; argno++) | |
7b112f9c | 96 | { |
68856ea3 AC |
97 | struct value *arg = args[argno]; |
98 | struct type *type = check_typedef (VALUE_TYPE (arg)); | |
99 | int len = TYPE_LENGTH (type); | |
100 | char *val = VALUE_CONTENTS (arg); | |
101 | ||
102 | if (TYPE_CODE (type) == TYPE_CODE_FLT | |
944fcfab | 103 | && ppc_floating_point_unit_p (current_gdbarch) && len <= 8) |
7b112f9c | 104 | { |
68856ea3 | 105 | /* Floating point value converted to "double" then |
944fcfab AC |
106 | passed in an FP register, when the registers run out, |
107 | 8 byte aligned stack is used. */ | |
68856ea3 AC |
108 | if (freg <= 8) |
109 | { | |
110 | if (write_pass) | |
111 | { | |
112 | /* Always store the floating point value using | |
944fcfab | 113 | the register's floating-point format. */ |
68856ea3 AC |
114 | char regval[MAX_REGISTER_SIZE]; |
115 | struct type *regtype | |
116 | = register_type (gdbarch, FP0_REGNUM + freg); | |
117 | convert_typed_floating (val, type, regval, regtype); | |
118 | regcache_cooked_write (regcache, FP0_REGNUM + freg, | |
119 | regval); | |
120 | } | |
121 | freg++; | |
122 | } | |
7b112f9c JT |
123 | else |
124 | { | |
68856ea3 | 125 | /* SysV ABI converts floats to doubles before |
944fcfab | 126 | writing them to an 8 byte aligned stack location. */ |
68856ea3 AC |
127 | argoffset = align_up (argoffset, 8); |
128 | if (write_pass) | |
129 | { | |
130 | char memval[8]; | |
131 | struct type *memtype; | |
132 | switch (TARGET_BYTE_ORDER) | |
133 | { | |
134 | case BFD_ENDIAN_BIG: | |
135 | memtype = builtin_type_ieee_double_big; | |
136 | break; | |
137 | case BFD_ENDIAN_LITTLE: | |
138 | memtype = builtin_type_ieee_double_little; | |
139 | break; | |
140 | default: | |
141 | internal_error (__FILE__, __LINE__, "bad switch"); | |
142 | } | |
143 | convert_typed_floating (val, type, memval, memtype); | |
144 | write_memory (sp + argoffset, val, len); | |
145 | } | |
146 | argoffset += 8; | |
7b112f9c JT |
147 | } |
148 | } | |
944fcfab AC |
149 | else if (len == 8 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */ |
150 | || (!ppc_floating_point_unit_p (current_gdbarch) && TYPE_CODE (type) == TYPE_CODE_FLT))) /* double */ | |
7b112f9c | 151 | { |
68856ea3 | 152 | /* "long long" or "double" passed in an odd/even |
944fcfab AC |
153 | register pair with the low addressed word in the odd |
154 | register and the high addressed word in the even | |
155 | register, or when the registers run out an 8 byte | |
156 | aligned stack location. */ | |
68856ea3 AC |
157 | if (greg > 9) |
158 | { | |
159 | /* Just in case GREG was 10. */ | |
160 | greg = 11; | |
161 | argoffset = align_up (argoffset, 8); | |
162 | if (write_pass) | |
163 | write_memory (sp + argoffset, val, len); | |
164 | argoffset += 8; | |
165 | } | |
166 | else if (tdep->wordsize == 8) | |
167 | { | |
168 | if (write_pass) | |
169 | regcache_cooked_write (regcache, | |
944fcfab | 170 | tdep->ppc_gp0_regnum + greg, val); |
68856ea3 AC |
171 | greg += 1; |
172 | } | |
173 | else | |
174 | { | |
175 | /* Must start on an odd register - r3/r4 etc. */ | |
176 | if ((greg & 1) == 0) | |
177 | greg++; | |
178 | if (write_pass) | |
179 | { | |
180 | regcache_cooked_write (regcache, | |
181 | tdep->ppc_gp0_regnum + greg + 0, | |
182 | val + 0); | |
183 | regcache_cooked_write (regcache, | |
184 | tdep->ppc_gp0_regnum + greg + 1, | |
185 | val + 4); | |
186 | } | |
187 | greg += 2; | |
188 | } | |
7b112f9c | 189 | } |
68856ea3 AC |
190 | else if (len == 16 |
191 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
944fcfab | 192 | && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0) |
7b112f9c | 193 | { |
68856ea3 | 194 | /* Vector parameter passed in an Altivec register, or |
944fcfab | 195 | when that runs out, 16 byte aligned stack location. */ |
7b112f9c JT |
196 | if (vreg <= 13) |
197 | { | |
68856ea3 AC |
198 | if (write_pass) |
199 | regcache_cooked_write (current_regcache, | |
944fcfab | 200 | tdep->ppc_vr0_regnum + vreg, val); |
7b112f9c JT |
201 | vreg++; |
202 | } | |
203 | else | |
204 | { | |
68856ea3 AC |
205 | argoffset = align_up (argoffset, 16); |
206 | if (write_pass) | |
207 | write_memory (sp + argoffset, val, 16); | |
7b112f9c JT |
208 | argoffset += 16; |
209 | } | |
210 | } | |
944fcfab | 211 | else if (len == 8 |
0a613259 | 212 | && TYPE_CODE (type) == TYPE_CODE_ARRAY |
944fcfab AC |
213 | && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0) |
214 | { | |
68856ea3 | 215 | /* Vector parameter passed in an e500 register, or when |
944fcfab AC |
216 | that runs out, 8 byte aligned stack location. Note |
217 | that since e500 vector and general purpose registers | |
218 | both map onto the same underlying register set, a | |
219 | "greg" and not a "vreg" is consumed here. A cooked | |
220 | write stores the value in the correct locations | |
221 | within the raw register cache. */ | |
222 | if (greg <= 10) | |
223 | { | |
68856ea3 AC |
224 | if (write_pass) |
225 | regcache_cooked_write (current_regcache, | |
944fcfab AC |
226 | tdep->ppc_ev0_regnum + greg, val); |
227 | greg++; | |
228 | } | |
229 | else | |
230 | { | |
68856ea3 AC |
231 | argoffset = align_up (argoffset, 8); |
232 | if (write_pass) | |
233 | write_memory (sp + argoffset, val, 8); | |
944fcfab AC |
234 | argoffset += 8; |
235 | } | |
236 | } | |
68856ea3 AC |
237 | else |
238 | { | |
239 | /* Reduce the parameter down to something that fits in a | |
944fcfab | 240 | "word". */ |
68856ea3 AC |
241 | char word[MAX_REGISTER_SIZE]; |
242 | memset (word, 0, MAX_REGISTER_SIZE); | |
243 | if (len > tdep->wordsize | |
244 | || TYPE_CODE (type) == TYPE_CODE_STRUCT | |
245 | || TYPE_CODE (type) == TYPE_CODE_UNION) | |
246 | { | |
247 | /* Structs and large values are put on an 8 byte | |
944fcfab | 248 | aligned stack ... */ |
68856ea3 AC |
249 | structoffset = align_up (structoffset, 8); |
250 | if (write_pass) | |
251 | write_memory (sp + structoffset, val, len); | |
252 | /* ... and then a "word" pointing to that address is | |
944fcfab | 253 | passed as the parameter. */ |
68856ea3 AC |
254 | store_unsigned_integer (word, tdep->wordsize, |
255 | sp + structoffset); | |
256 | structoffset += len; | |
257 | } | |
258 | else if (TYPE_CODE (type) == TYPE_CODE_INT) | |
259 | /* Sign or zero extend the "int" into a "word". */ | |
260 | store_unsigned_integer (word, tdep->wordsize, | |
261 | unpack_long (type, val)); | |
262 | else | |
263 | /* Always goes in the low address. */ | |
264 | memcpy (word, val, len); | |
265 | /* Store that "word" in a register, or on the stack. | |
944fcfab | 266 | The words have "4" byte alignment. */ |
68856ea3 AC |
267 | if (greg <= 10) |
268 | { | |
269 | if (write_pass) | |
270 | regcache_cooked_write (regcache, | |
944fcfab | 271 | tdep->ppc_gp0_regnum + greg, word); |
68856ea3 AC |
272 | greg++; |
273 | } | |
274 | else | |
275 | { | |
276 | argoffset = align_up (argoffset, tdep->wordsize); | |
277 | if (write_pass) | |
278 | write_memory (sp + argoffset, word, tdep->wordsize); | |
279 | argoffset += tdep->wordsize; | |
280 | } | |
281 | } | |
282 | } | |
283 | ||
284 | /* Compute the actual stack space requirements. */ | |
285 | if (!write_pass) | |
286 | { | |
287 | /* Remember the amount of space needed by the arguments. */ | |
288 | argspace = argoffset; | |
289 | /* Allocate space for both the arguments and the structures. */ | |
290 | sp -= (argoffset + structoffset); | |
291 | /* Ensure that the stack is still 16 byte aligned. */ | |
292 | sp = align_down (sp, 16); | |
293 | } | |
7b112f9c JT |
294 | } |
295 | ||
68856ea3 AC |
296 | /* Update %sp. */ |
297 | regcache_cooked_write_signed (regcache, SP_REGNUM, sp); | |
298 | ||
299 | /* Write the backchain (it occupies WORDSIZED bytes). */ | |
300 | write_memory_signed_integer (sp, tdep->wordsize, saved_sp); | |
301 | ||
e56a0ecc AC |
302 | /* Point the inferior function call's return address at the dummy's |
303 | breakpoint. */ | |
68856ea3 | 304 | regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); |
e56a0ecc | 305 | |
7b112f9c JT |
306 | return sp; |
307 | } | |
308 | ||
e754ae69 AC |
309 | /* Handle the return-value conventions specified by the SysV 32-bit |
310 | PowerPC ABI (including all the supplements): | |
311 | ||
312 | no floating-point: floating-point values returned using 32-bit | |
313 | general-purpose registers. | |
314 | ||
315 | Altivec: 128-bit vectors returned using vector registers. | |
316 | ||
317 | e500: 64-bit vectors returned using the full full 64 bit EV | |
318 | register, floating-point values returned using 32-bit | |
319 | general-purpose registers. | |
320 | ||
321 | GCC (broken): Small struct values right (instead of left) aligned | |
322 | when returned in general-purpose registers. */ | |
323 | ||
324 | static enum return_value_convention | |
325 | do_ppc_sysv_return_value (struct type *type, struct regcache *regcache, | |
326 | const void *inval, void *outval, int broken_gcc) | |
327 | { | |
328 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
329 | gdb_assert (tdep->wordsize == 4); | |
330 | if (TYPE_CODE (type) == TYPE_CODE_FLT | |
331 | && TYPE_LENGTH (type) <= 8 | |
332 | && ppc_floating_point_unit_p (current_gdbarch)) | |
333 | { | |
334 | if (outval) | |
335 | { | |
336 | /* Floats and doubles stored in "f1". Convert the value to | |
337 | the required type. */ | |
338 | char regval[MAX_REGISTER_SIZE]; | |
339 | struct type *regtype = register_type (current_gdbarch, | |
340 | FP0_REGNUM + 1); | |
341 | regcache_cooked_read (regcache, FP0_REGNUM + 1, regval); | |
342 | convert_typed_floating (regval, regtype, outval, type); | |
343 | } | |
344 | if (inval) | |
345 | { | |
346 | /* Floats and doubles stored in "f1". Convert the value to | |
347 | the register's "double" type. */ | |
348 | char regval[MAX_REGISTER_SIZE]; | |
349 | struct type *regtype = register_type (current_gdbarch, FP0_REGNUM); | |
350 | convert_typed_floating (inval, type, regval, regtype); | |
351 | regcache_cooked_write (regcache, FP0_REGNUM + 1, regval); | |
352 | } | |
353 | return RETURN_VALUE_REGISTER_CONVENTION; | |
354 | } | |
355 | if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8) | |
356 | || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)) | |
357 | { | |
358 | if (outval) | |
359 | { | |
360 | /* A long long, or a double stored in the 32 bit r3/r4. */ | |
361 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, | |
362 | (bfd_byte *) outval + 0); | |
363 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, | |
364 | (bfd_byte *) outval + 4); | |
365 | } | |
366 | if (inval) | |
367 | { | |
368 | /* A long long, or a double stored in the 32 bit r3/r4. */ | |
369 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, | |
370 | (bfd_byte *) inval + 0); | |
371 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, | |
372 | (bfd_byte *) inval + 4); | |
373 | } | |
374 | return RETURN_VALUE_REGISTER_CONVENTION; | |
375 | } | |
376 | if (TYPE_CODE (type) == TYPE_CODE_INT | |
377 | && TYPE_LENGTH (type) <= tdep->wordsize) | |
378 | { | |
379 | if (outval) | |
380 | { | |
381 | /* Some sort of integer stored in r3. Since TYPE isn't | |
382 | bigger than the register, sign extension isn't a problem | |
383 | - just do everything unsigned. */ | |
384 | ULONGEST regval; | |
385 | regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
386 | ®val); | |
387 | store_unsigned_integer (outval, TYPE_LENGTH (type), regval); | |
388 | } | |
389 | if (inval) | |
390 | { | |
391 | /* Some sort of integer stored in r3. Use unpack_long since | |
392 | that should handle any required sign extension. */ | |
393 | regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
394 | unpack_long (type, inval)); | |
395 | } | |
396 | return RETURN_VALUE_REGISTER_CONVENTION; | |
397 | } | |
398 | if (TYPE_LENGTH (type) == 16 | |
399 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
400 | && TYPE_VECTOR (type) && tdep->ppc_vr0_regnum >= 0) | |
401 | { | |
402 | if (outval) | |
403 | { | |
404 | /* Altivec places the return value in "v2". */ | |
405 | regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, outval); | |
406 | } | |
407 | if (inval) | |
408 | { | |
409 | /* Altivec places the return value in "v2". */ | |
410 | regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, inval); | |
411 | } | |
412 | return RETURN_VALUE_REGISTER_CONVENTION; | |
413 | } | |
414 | if (TYPE_LENGTH (type) == 8 | |
415 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
416 | && TYPE_VECTOR (type) && tdep->ppc_ev0_regnum >= 0) | |
417 | { | |
418 | /* The e500 ABI places return values for the 64-bit DSP types | |
419 | (__ev64_opaque__) in r3. However, in GDB-speak, ev3 | |
420 | corresponds to the entire r3 value for e500, whereas GDB's r3 | |
421 | only corresponds to the least significant 32-bits. So place | |
422 | the 64-bit DSP type's value in ev3. */ | |
423 | if (outval) | |
424 | regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, outval); | |
425 | if (inval) | |
426 | regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, inval); | |
427 | return RETURN_VALUE_REGISTER_CONVENTION; | |
428 | } | |
429 | if (broken_gcc && TYPE_LENGTH (type) <= 8) | |
430 | { | |
431 | if (outval) | |
432 | { | |
433 | /* GCC screwed up. The last register isn't "left" aligned. | |
434 | Need to extract the least significant part of each | |
435 | register and then store that. */ | |
436 | /* Transfer any full words. */ | |
437 | int word = 0; | |
438 | while (1) | |
439 | { | |
440 | ULONGEST reg; | |
441 | int len = TYPE_LENGTH (type) - word * tdep->wordsize; | |
442 | if (len <= 0) | |
443 | break; | |
444 | if (len > tdep->wordsize) | |
445 | len = tdep->wordsize; | |
446 | regcache_cooked_read_unsigned (regcache, | |
447 | tdep->ppc_gp0_regnum + 3 + word, | |
448 | ®); | |
449 | store_unsigned_integer (((bfd_byte *) outval | |
450 | + word * tdep->wordsize), len, reg); | |
451 | word++; | |
452 | } | |
453 | } | |
454 | if (inval) | |
455 | { | |
456 | /* GCC screwed up. The last register isn't "left" aligned. | |
457 | Need to extract the least significant part of each | |
458 | register and then store that. */ | |
459 | /* Transfer any full words. */ | |
460 | int word = 0; | |
461 | while (1) | |
462 | { | |
463 | ULONGEST reg; | |
464 | int len = TYPE_LENGTH (type) - word * tdep->wordsize; | |
465 | if (len <= 0) | |
466 | break; | |
467 | if (len > tdep->wordsize) | |
468 | len = tdep->wordsize; | |
469 | reg = extract_unsigned_integer (((bfd_byte *) inval | |
470 | + word * tdep->wordsize), len); | |
471 | regcache_cooked_write_unsigned (regcache, | |
472 | tdep->ppc_gp0_regnum + 3 + word, | |
473 | reg); | |
474 | word++; | |
475 | } | |
476 | } | |
477 | return RETURN_VALUE_REGISTER_CONVENTION; | |
478 | } | |
479 | if (TYPE_LENGTH (type) <= 8) | |
480 | { | |
481 | if (outval) | |
482 | { | |
483 | /* This matches SVr4 PPC, it does not match GCC. */ | |
484 | /* The value is right-padded to 8 bytes and then loaded, as | |
485 | two "words", into r3/r4. */ | |
486 | char regvals[MAX_REGISTER_SIZE * 2]; | |
487 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, | |
488 | regvals + 0 * tdep->wordsize); | |
489 | if (TYPE_LENGTH (type) > tdep->wordsize) | |
490 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, | |
491 | regvals + 1 * tdep->wordsize); | |
492 | memcpy (outval, regvals, TYPE_LENGTH (type)); | |
493 | } | |
494 | if (inval) | |
495 | { | |
496 | /* This matches SVr4 PPC, it does not match GCC. */ | |
497 | /* The value is padded out to 8 bytes and then loaded, as | |
498 | two "words" into r3/r4. */ | |
499 | char regvals[MAX_REGISTER_SIZE * 2]; | |
500 | memset (regvals, 0, sizeof regvals); | |
501 | memcpy (regvals, inval, TYPE_LENGTH (type)); | |
502 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, | |
503 | regvals + 0 * tdep->wordsize); | |
504 | if (TYPE_LENGTH (type) > tdep->wordsize) | |
505 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, | |
506 | regvals + 1 * tdep->wordsize); | |
507 | } | |
508 | return RETURN_VALUE_REGISTER_CONVENTION; | |
509 | } | |
510 | return RETURN_VALUE_STRUCT_CONVENTION; | |
511 | } | |
512 | ||
513 | void | |
514 | ppc_sysv_abi_extract_return_value (struct type *type, | |
515 | struct regcache *regcache, void *valbuf) | |
516 | { | |
517 | do_ppc_sysv_return_value (type, regcache, NULL, valbuf, 0); | |
518 | } | |
519 | ||
520 | void | |
521 | ppc_sysv_abi_broken_extract_return_value (struct type *type, | |
522 | struct regcache *regcache, | |
523 | void *valbuf) | |
524 | { | |
525 | do_ppc_sysv_return_value (type, regcache, NULL, valbuf, 1); | |
526 | } | |
527 | ||
528 | void | |
529 | ppc_sysv_abi_store_return_value (struct type *type, struct regcache *regcache, | |
530 | const void *valbuf) | |
531 | { | |
532 | do_ppc_sysv_return_value (type, regcache, valbuf, NULL, 0); | |
533 | } | |
534 | ||
535 | void | |
536 | ppc_sysv_abi_broken_store_return_value (struct type *type, | |
537 | struct regcache *regcache, | |
538 | const void *valbuf) | |
539 | { | |
540 | do_ppc_sysv_return_value (type, regcache, valbuf, NULL, 1); | |
541 | } | |
542 | ||
7b112f9c JT |
543 | /* Structures 8 bytes or less long are returned in the r3 & r4 |
544 | registers, according to the SYSV ABI. */ | |
545 | int | |
546 | ppc_sysv_abi_use_struct_convention (int gcc_p, struct type *value_type) | |
547 | { | |
e754ae69 AC |
548 | return (do_ppc_sysv_return_value (value_type, NULL, NULL, NULL, 0) |
549 | == RETURN_VALUE_STRUCT_CONVENTION); | |
944fcfab | 550 | } |
afd48b75 | 551 | |
8be9034a AC |
552 | /* Pass the arguments in either registers, or in the stack. Using the |
553 | ppc 64 bit SysV ABI. | |
554 | ||
555 | This implements a dumbed down version of the ABI. It always writes | |
556 | values to memory, GPR and FPR, even when not necessary. Doing this | |
557 | greatly simplifies the logic. */ | |
558 | ||
559 | CORE_ADDR | |
560 | ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, CORE_ADDR func_addr, | |
561 | struct regcache *regcache, CORE_ADDR bp_addr, | |
562 | int nargs, struct value **args, CORE_ADDR sp, | |
563 | int struct_return, CORE_ADDR struct_addr) | |
564 | { | |
565 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
566 | /* By this stage in the proceedings, SP has been decremented by "red | |
567 | zone size" + "struct return size". Fetch the stack-pointer from | |
568 | before this and use that as the BACK_CHAIN. */ | |
569 | const CORE_ADDR back_chain = read_sp (); | |
570 | /* See for-loop comment below. */ | |
571 | int write_pass; | |
572 | /* Size of the Altivec's vector parameter region, the final value is | |
573 | computed in the for-loop below. */ | |
574 | LONGEST vparam_size = 0; | |
575 | /* Size of the general parameter region, the final value is computed | |
576 | in the for-loop below. */ | |
577 | LONGEST gparam_size = 0; | |
578 | /* Kevin writes ... I don't mind seeing tdep->wordsize used in the | |
579 | calls to align_up(), align_down(), etc. because this makes it | |
580 | easier to reuse this code (in a copy/paste sense) in the future, | |
581 | but it is a 64-bit ABI and asserting that the wordsize is 8 bytes | |
582 | at some point makes it easier to verify that this function is | |
583 | correct without having to do a non-local analysis to figure out | |
584 | the possible values of tdep->wordsize. */ | |
585 | gdb_assert (tdep->wordsize == 8); | |
586 | ||
587 | /* Go through the argument list twice. | |
588 | ||
589 | Pass 1: Compute the function call's stack space and register | |
590 | requirements. | |
591 | ||
592 | Pass 2: Replay the same computation but this time also write the | |
593 | values out to the target. */ | |
594 | ||
595 | for (write_pass = 0; write_pass < 2; write_pass++) | |
596 | { | |
597 | int argno; | |
598 | /* Next available floating point register for float and double | |
599 | arguments. */ | |
600 | int freg = 1; | |
601 | /* Next available general register for non-vector (but possibly | |
602 | float) arguments. */ | |
603 | int greg = 3; | |
604 | /* Next available vector register for vector arguments. */ | |
605 | int vreg = 2; | |
606 | /* The address, at which the next general purpose parameter | |
607 | (integer, struct, float, ...) should be saved. */ | |
608 | CORE_ADDR gparam; | |
609 | /* Address, at which the next Altivec vector parameter should be | |
610 | saved. */ | |
611 | CORE_ADDR vparam; | |
612 | ||
613 | if (!write_pass) | |
614 | { | |
615 | /* During the first pass, GPARAM and VPARAM are more like | |
616 | offsets (start address zero) than addresses. That way | |
617 | the accumulate the total stack space each region | |
618 | requires. */ | |
619 | gparam = 0; | |
620 | vparam = 0; | |
621 | } | |
622 | else | |
623 | { | |
624 | /* Decrement the stack pointer making space for the Altivec | |
625 | and general on-stack parameters. Set vparam and gparam | |
626 | to their corresponding regions. */ | |
627 | vparam = align_down (sp - vparam_size, 16); | |
628 | gparam = align_down (vparam - gparam_size, 16); | |
629 | /* Add in space for the TOC, link editor double word, | |
630 | compiler double word, LR save area, CR save area. */ | |
631 | sp = align_down (gparam - 48, 16); | |
632 | } | |
633 | ||
634 | /* If the function is returning a `struct', then there is an | |
635 | extra hidden parameter (which will be passed in r3) | |
636 | containing the address of that struct.. In that case we | |
637 | should advance one word and start from r4 register to copy | |
638 | parameters. This also consumes one on-stack parameter slot. */ | |
639 | if (struct_return) | |
640 | { | |
641 | if (write_pass) | |
642 | regcache_cooked_write_signed (regcache, | |
643 | tdep->ppc_gp0_regnum + greg, | |
644 | struct_addr); | |
645 | greg++; | |
646 | gparam = align_up (gparam + tdep->wordsize, tdep->wordsize); | |
647 | } | |
648 | ||
649 | for (argno = 0; argno < nargs; argno++) | |
650 | { | |
651 | struct value *arg = args[argno]; | |
652 | struct type *type = check_typedef (VALUE_TYPE (arg)); | |
653 | char *val = VALUE_CONTENTS (arg); | |
654 | if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8) | |
655 | { | |
656 | /* Floats and Doubles go in f1 .. f13. They also | |
657 | consume a left aligned GREG,, and can end up in | |
658 | memory. */ | |
659 | if (write_pass) | |
660 | { | |
661 | if (ppc_floating_point_unit_p (current_gdbarch) | |
662 | && freg <= 13) | |
663 | { | |
664 | char regval[MAX_REGISTER_SIZE]; | |
665 | struct type *regtype = register_type (gdbarch, | |
666 | FP0_REGNUM); | |
667 | convert_typed_floating (val, type, regval, regtype); | |
668 | regcache_cooked_write (regcache, FP0_REGNUM + freg, | |
669 | regval); | |
670 | } | |
671 | if (greg <= 10) | |
672 | { | |
673 | /* The ABI states "Single precision floating | |
674 | point values are mapped to the first word in | |
675 | a single doubleword" and "... floating point | |
676 | values mapped to the first eight doublewords | |
677 | of the parameter save area are also passed in | |
678 | general registers"). | |
679 | ||
680 | This code interprets that to mean: store it, | |
681 | left aligned, in the general register. */ | |
682 | char regval[MAX_REGISTER_SIZE]; | |
683 | memset (regval, 0, sizeof regval); | |
684 | memcpy (regval, val, TYPE_LENGTH (type)); | |
685 | regcache_cooked_write (regcache, | |
686 | tdep->ppc_gp0_regnum + greg, | |
687 | regval); | |
688 | } | |
689 | write_memory (gparam, val, TYPE_LENGTH (type)); | |
690 | } | |
691 | /* Always consume parameter stack space. */ | |
692 | freg++; | |
693 | greg++; | |
694 | gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); | |
695 | } | |
696 | else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type) | |
697 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
698 | && tdep->ppc_vr0_regnum >= 0) | |
699 | { | |
700 | /* In the Altivec ABI, vectors go in the vector | |
701 | registers v2 .. v13, or when that runs out, a vector | |
702 | annex which goes above all the normal parameters. | |
703 | NOTE: cagney/2003-09-21: This is a guess based on the | |
704 | PowerOpen Altivec ABI. */ | |
705 | if (vreg <= 13) | |
706 | { | |
707 | if (write_pass) | |
708 | regcache_cooked_write (regcache, | |
709 | tdep->ppc_vr0_regnum + vreg, val); | |
710 | vreg++; | |
711 | } | |
712 | else | |
713 | { | |
714 | if (write_pass) | |
715 | write_memory (vparam, val, TYPE_LENGTH (type)); | |
716 | vparam = align_up (vparam + TYPE_LENGTH (type), 16); | |
717 | } | |
718 | } | |
719 | else if ((TYPE_CODE (type) == TYPE_CODE_INT | |
720 | || TYPE_CODE (type) == TYPE_CODE_ENUM) | |
721 | && TYPE_LENGTH (type) <= 8) | |
722 | { | |
723 | /* Scalars get sign[un]extended and go in gpr3 .. gpr10. | |
724 | They can also end up in memory. */ | |
725 | if (write_pass) | |
726 | { | |
727 | /* Sign extend the value, then store it unsigned. */ | |
728 | ULONGEST word = unpack_long (type, val); | |
729 | if (greg <= 10) | |
730 | regcache_cooked_write_unsigned (regcache, | |
731 | tdep->ppc_gp0_regnum + | |
732 | greg, word); | |
733 | write_memory_unsigned_integer (gparam, tdep->wordsize, | |
734 | word); | |
735 | } | |
736 | greg++; | |
737 | gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); | |
738 | } | |
739 | else | |
740 | { | |
741 | int byte; | |
742 | for (byte = 0; byte < TYPE_LENGTH (type); | |
743 | byte += tdep->wordsize) | |
744 | { | |
745 | if (write_pass && greg <= 10) | |
746 | { | |
747 | char regval[MAX_REGISTER_SIZE]; | |
748 | int len = TYPE_LENGTH (type) - byte; | |
749 | if (len > tdep->wordsize) | |
750 | len = tdep->wordsize; | |
751 | memset (regval, 0, sizeof regval); | |
752 | /* WARNING: cagney/2003-09-21: As best I can | |
753 | tell, the ABI specifies that the value should | |
754 | be left aligned. Unfortunately, GCC doesn't | |
755 | do this - it instead right aligns even sized | |
756 | values and puts odd sized values on the | |
757 | stack. Work around that by putting both a | |
758 | left and right aligned value into the | |
759 | register (hopefully no one notices :-^). | |
760 | Arrrgh! */ | |
761 | /* Left aligned (8 byte values such as pointers | |
762 | fill the buffer). */ | |
763 | memcpy (regval, val + byte, len); | |
764 | /* Right aligned (but only if even). */ | |
765 | if (len == 1 || len == 2 || len == 4) | |
766 | memcpy (regval + tdep->wordsize - len, | |
767 | val + byte, len); | |
768 | regcache_cooked_write (regcache, greg, regval); | |
769 | } | |
770 | greg++; | |
771 | } | |
772 | if (write_pass) | |
773 | /* WARNING: cagney/2003-09-21: Strictly speaking, this | |
774 | isn't necessary, unfortunately, GCC appears to get | |
775 | "struct convention" parameter passing wrong putting | |
776 | odd sized structures in memory instead of in a | |
777 | register. Work around this by always writing the | |
778 | value to memory. Fortunately, doing this | |
779 | simplifies the code. */ | |
780 | write_memory (gparam, val, TYPE_LENGTH (type)); | |
781 | /* Always consume parameter stack space. */ | |
782 | gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); | |
783 | } | |
784 | } | |
785 | ||
786 | if (!write_pass) | |
787 | { | |
788 | /* Save the true region sizes ready for the second pass. */ | |
789 | vparam_size = vparam; | |
790 | /* Make certain that the general parameter save area is at | |
791 | least the minimum 8 registers (or doublewords) in size. */ | |
792 | if (greg < 8) | |
793 | gparam_size = 8 * tdep->wordsize; | |
794 | else | |
795 | gparam_size = gparam; | |
796 | } | |
797 | } | |
798 | ||
799 | /* Update %sp. */ | |
800 | regcache_cooked_write_signed (regcache, SP_REGNUM, sp); | |
801 | ||
802 | /* Write the backchain (it occupies WORDSIZED bytes). */ | |
803 | write_memory_signed_integer (sp, tdep->wordsize, back_chain); | |
804 | ||
805 | /* Point the inferior function call's return address at the dummy's | |
806 | breakpoint. */ | |
807 | regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); | |
808 | ||
809 | /* Find a value for the TOC register. Every symbol should have both | |
810 | ".FN" and "FN" in the minimal symbol table. "FN" points at the | |
811 | FN's descriptor, while ".FN" points at the entry point (which | |
812 | matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the | |
813 | FN's descriptor address. */ | |
814 | { | |
815 | /* Find the minimal symbol that corresponds to FUNC_ADDR (should | |
816 | have the name ".FN"). */ | |
817 | struct minimal_symbol *dot_fn = lookup_minimal_symbol_by_pc (func_addr); | |
818 | if (dot_fn != NULL && SYMBOL_LINKAGE_NAME (dot_fn)[0] == '.') | |
819 | { | |
820 | /* Now find the corresponding "FN" (dropping ".") minimal | |
821 | symbol's address. */ | |
822 | struct minimal_symbol *fn = | |
823 | lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL, | |
824 | NULL); | |
825 | if (fn != NULL) | |
826 | { | |
827 | /* Got the address of that descriptor. The TOC is the | |
828 | second double word. */ | |
829 | CORE_ADDR toc = | |
830 | read_memory_unsigned_integer (SYMBOL_VALUE_ADDRESS (fn) + | |
831 | tdep->wordsize, tdep->wordsize); | |
832 | regcache_cooked_write_unsigned (regcache, | |
833 | tdep->ppc_gp0_regnum + 2, toc); | |
834 | } | |
835 | } | |
836 | } | |
837 | ||
838 | return sp; | |
839 | } | |
840 | ||
afd48b75 AC |
841 | |
842 | /* The 64 bit ABI retun value convention. | |
843 | ||
844 | Return non-zero if the return-value is stored in a register, return | |
845 | 0 if the return-value is instead stored on the stack (a.k.a., | |
846 | struct return convention). | |
847 | ||
848 | For a return-value stored in a register: when INVAL is non-NULL, | |
849 | copy the buffer to the corresponding register return-value location | |
850 | location; when OUTVAL is non-NULL, fill the buffer from the | |
851 | corresponding register return-value location. */ | |
afd48b75 AC |
852 | static enum return_value_convention |
853 | ppc64_sysv_abi_return_value (struct type *valtype, struct regcache *regcache, | |
854 | const void *inval, void *outval) | |
855 | { | |
856 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
857 | /* Floats and doubles in F1. */ | |
944fcfab | 858 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8) |
afd48b75 AC |
859 | { |
860 | char regval[MAX_REGISTER_SIZE]; | |
861 | struct type *regtype = register_type (current_gdbarch, FP0_REGNUM); | |
862 | if (inval != NULL) | |
863 | { | |
864 | convert_typed_floating (inval, valtype, regval, regtype); | |
865 | regcache_cooked_write (regcache, FP0_REGNUM + 1, regval); | |
866 | } | |
867 | if (outval != NULL) | |
868 | { | |
869 | regcache_cooked_read (regcache, FP0_REGNUM + 1, regval); | |
870 | convert_typed_floating (regval, regtype, outval, valtype); | |
871 | } | |
872 | return RETURN_VALUE_REGISTER_CONVENTION; | |
873 | } | |
944fcfab | 874 | if (TYPE_CODE (valtype) == TYPE_CODE_INT && TYPE_LENGTH (valtype) <= 8) |
afd48b75 AC |
875 | { |
876 | /* Integers in r3. */ | |
877 | if (inval != NULL) | |
878 | { | |
879 | /* Be careful to sign extend the value. */ | |
880 | regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
881 | unpack_long (valtype, inval)); | |
882 | } | |
883 | if (outval != NULL) | |
884 | { | |
885 | /* Extract the integer from r3. Since this is truncating the | |
886 | value, there isn't a sign extension problem. */ | |
887 | ULONGEST regval; | |
888 | regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
889 | ®val); | |
890 | store_unsigned_integer (outval, TYPE_LENGTH (valtype), regval); | |
891 | } | |
892 | return RETURN_VALUE_REGISTER_CONVENTION; | |
893 | } | |
894 | /* All pointers live in r3. */ | |
895 | if (TYPE_CODE (valtype) == TYPE_CODE_PTR) | |
896 | { | |
897 | /* All pointers live in r3. */ | |
898 | if (inval != NULL) | |
899 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, inval); | |
900 | if (outval != NULL) | |
901 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, outval); | |
902 | return RETURN_VALUE_REGISTER_CONVENTION; | |
903 | } | |
904 | if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY | |
905 | && TYPE_LENGTH (valtype) <= 8 | |
906 | && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT | |
907 | && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1) | |
908 | { | |
909 | /* Small character arrays are returned, right justified, in r3. */ | |
910 | int offset = (register_size (current_gdbarch, tdep->ppc_gp0_regnum + 3) | |
911 | - TYPE_LENGTH (valtype)); | |
912 | if (inval != NULL) | |
913 | regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3, | |
914 | offset, TYPE_LENGTH (valtype), inval); | |
915 | if (outval != NULL) | |
916 | regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3, | |
917 | offset, TYPE_LENGTH (valtype), outval); | |
918 | return RETURN_VALUE_REGISTER_CONVENTION; | |
919 | } | |
920 | /* Big floating point values get stored in adjacent floating | |
921 | point registers. */ | |
922 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT | |
944fcfab | 923 | && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32)) |
afd48b75 AC |
924 | { |
925 | if (inval || outval != NULL) | |
926 | { | |
927 | int i; | |
928 | for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++) | |
929 | { | |
930 | if (inval != NULL) | |
931 | regcache_cooked_write (regcache, FP0_REGNUM + 1 + i, | |
932 | (const bfd_byte *) inval + i * 8); | |
933 | if (outval != NULL) | |
934 | regcache_cooked_read (regcache, FP0_REGNUM + 1 + i, | |
935 | (bfd_byte *) outval + i * 8); | |
936 | } | |
937 | } | |
938 | return RETURN_VALUE_REGISTER_CONVENTION; | |
939 | } | |
940 | /* Complex values get returned in f1:f2, need to convert. */ | |
941 | if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX | |
942 | && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16)) | |
943 | { | |
944 | if (regcache != NULL) | |
945 | { | |
946 | int i; | |
947 | for (i = 0; i < 2; i++) | |
948 | { | |
949 | char regval[MAX_REGISTER_SIZE]; | |
944fcfab AC |
950 | struct type *regtype = |
951 | register_type (current_gdbarch, FP0_REGNUM); | |
afd48b75 AC |
952 | if (inval != NULL) |
953 | { | |
944fcfab AC |
954 | convert_typed_floating ((const bfd_byte *) inval + |
955 | i * (TYPE_LENGTH (valtype) / 2), | |
afd48b75 | 956 | valtype, regval, regtype); |
944fcfab AC |
957 | regcache_cooked_write (regcache, FP0_REGNUM + 1 + i, |
958 | regval); | |
afd48b75 AC |
959 | } |
960 | if (outval != NULL) | |
961 | { | |
962 | regcache_cooked_read (regcache, FP0_REGNUM + 1 + i, regval); | |
963 | convert_typed_floating (regval, regtype, | |
944fcfab AC |
964 | (bfd_byte *) outval + |
965 | i * (TYPE_LENGTH (valtype) / 2), | |
afd48b75 AC |
966 | valtype); |
967 | } | |
968 | } | |
969 | } | |
970 | return RETURN_VALUE_REGISTER_CONVENTION; | |
971 | } | |
972 | /* Big complex values get stored in f1:f4. */ | |
944fcfab | 973 | if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32) |
afd48b75 AC |
974 | { |
975 | if (regcache != NULL) | |
976 | { | |
977 | int i; | |
978 | for (i = 0; i < 4; i++) | |
979 | { | |
980 | if (inval != NULL) | |
981 | regcache_cooked_write (regcache, FP0_REGNUM + 1 + i, | |
982 | (const bfd_byte *) inval + i * 8); | |
983 | if (outval != NULL) | |
984 | regcache_cooked_read (regcache, FP0_REGNUM + 1 + i, | |
985 | (bfd_byte *) outval + i * 8); | |
986 | } | |
987 | } | |
988 | return RETURN_VALUE_REGISTER_CONVENTION; | |
989 | } | |
990 | return RETURN_VALUE_STRUCT_CONVENTION; | |
991 | } | |
992 | ||
993 | int | |
994 | ppc64_sysv_abi_use_struct_convention (int gcc_p, struct type *value_type) | |
995 | { | |
996 | return (ppc64_sysv_abi_return_value (value_type, NULL, NULL, NULL) | |
997 | == RETURN_VALUE_STRUCT_CONVENTION); | |
998 | } | |
999 | ||
1000 | void | |
1001 | ppc64_sysv_abi_extract_return_value (struct type *valtype, | |
944fcfab | 1002 | struct regcache *regbuf, void *valbuf) |
afd48b75 AC |
1003 | { |
1004 | if (ppc64_sysv_abi_return_value (valtype, regbuf, NULL, valbuf) | |
1005 | != RETURN_VALUE_REGISTER_CONVENTION) | |
1006 | error ("Function return value unknown"); | |
1007 | } | |
1008 | ||
1009 | void | |
1010 | ppc64_sysv_abi_store_return_value (struct type *valtype, | |
1011 | struct regcache *regbuf, | |
1012 | const void *valbuf) | |
1013 | { | |
1014 | if (!ppc64_sysv_abi_return_value (valtype, regbuf, valbuf, NULL)) | |
1015 | error ("Function return value location unknown"); | |
1016 | } | |
6066c3de AC |
1017 | |
1018 | CORE_ADDR | |
1019 | ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch, | |
1020 | CORE_ADDR bpaddr) | |
1021 | { | |
1022 | /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at | |
1023 | a function-descriptor while the corresponding minimal-symbol | |
1024 | ".FN" should point at the entry point. Consequently, a command | |
1025 | like "break FN" applied to an object file with only minimal | |
1026 | symbols, will insert the breakpoint into the descriptor at "FN" | |
1027 | and not the function at ".FN". Avoid this confusion by adjusting | |
1028 | any attempt to set a descriptor breakpoint into a corresponding | |
1029 | function breakpoint. Note that GDB warns the user when this | |
1030 | adjustment is applied - that's ok as otherwise the user will have | |
1031 | no way of knowing why their breakpoint at "FN" resulted in the | |
1032 | program stopping at ".FN". */ | |
1033 | return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, ¤t_target); | |
1034 | } |