Commit | Line | Data |
---|---|---|
7b112f9c JT |
1 | /* Target-dependent code for PowerPC systems using the SVR4 ABI |
2 | for GDB, the GNU debugger. | |
3 | ||
9b254dd1 | 4 | Copyright (C) 2000, 2001, 2002, 2003, 2005, 2007, 2008 |
65ada037 | 5 | Free Software Foundation, Inc. |
7b112f9c JT |
6 | |
7 | This file is part of GDB. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 11 | the Free Software Foundation; either version 3 of the License, or |
7b112f9c JT |
12 | (at your option) any later version. |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
7b112f9c JT |
21 | |
22 | #include "defs.h" | |
23 | #include "gdbcore.h" | |
24 | #include "inferior.h" | |
25 | #include "regcache.h" | |
26 | #include "value.h" | |
bdf64bac | 27 | #include "gdb_string.h" |
8be9034a | 28 | #include "gdb_assert.h" |
7b112f9c | 29 | #include "ppc-tdep.h" |
6066c3de | 30 | #include "target.h" |
0a90bcdd | 31 | #include "objfiles.h" |
7d9b040b | 32 | #include "infcall.h" |
7b112f9c | 33 | |
7b112f9c JT |
34 | /* Pass the arguments in either registers, or in the stack. Using the |
35 | ppc sysv ABI, the first eight words of the argument list (that might | |
36 | be less than eight parameters if some parameters occupy more than one | |
37 | word) are passed in r3..r10 registers. float and double parameters are | |
38 | passed in fpr's, in addition to that. Rest of the parameters if any | |
39 | are passed in user stack. | |
40 | ||
41 | If the function is returning a structure, then the return address is passed | |
42 | in r3, then the first 7 words of the parametes can be passed in registers, | |
43 | starting from r4. */ | |
44 | ||
45 | CORE_ADDR | |
7d9b040b | 46 | ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
77b2b6d4 AC |
47 | struct regcache *regcache, CORE_ADDR bp_addr, |
48 | int nargs, struct value **args, CORE_ADDR sp, | |
49 | int struct_return, CORE_ADDR struct_addr) | |
7b112f9c | 50 | { |
40a6adc1 | 51 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
fb4443d8 | 52 | ULONGEST saved_sp; |
68856ea3 AC |
53 | int argspace = 0; /* 0 is an initial wrong guess. */ |
54 | int write_pass; | |
7b112f9c | 55 | |
b14d30e1 JM |
56 | gdb_assert (tdep->wordsize == 4); |
57 | ||
40a6adc1 | 58 | regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch), |
3e8c568d | 59 | &saved_sp); |
fb4443d8 | 60 | |
68856ea3 | 61 | /* Go through the argument list twice. |
7b112f9c | 62 | |
68856ea3 AC |
63 | Pass 1: Figure out how much new stack space is required for |
64 | arguments and pushed values. Unlike the PowerOpen ABI, the SysV | |
65 | ABI doesn't reserve any extra space for parameters which are put | |
66 | in registers, but does always push structures and then pass their | |
67 | address. | |
7a41266b | 68 | |
68856ea3 AC |
69 | Pass 2: Replay the same computation but this time also write the |
70 | values out to the target. */ | |
7b112f9c | 71 | |
68856ea3 AC |
72 | for (write_pass = 0; write_pass < 2; write_pass++) |
73 | { | |
74 | int argno; | |
75 | /* Next available floating point register for float and double | |
76 | arguments. */ | |
77 | int freg = 1; | |
78 | /* Next available general register for non-float, non-vector | |
79 | arguments. */ | |
80 | int greg = 3; | |
81 | /* Next available vector register for vector arguments. */ | |
82 | int vreg = 2; | |
83 | /* Arguments start above the "LR save word" and "Back chain". */ | |
84 | int argoffset = 2 * tdep->wordsize; | |
85 | /* Structures start after the arguments. */ | |
86 | int structoffset = argoffset + argspace; | |
87 | ||
88 | /* If the function is returning a `struct', then the first word | |
944fcfab AC |
89 | (which will be passed in r3) is used for struct return |
90 | address. In that case we should advance one word and start | |
91 | from r4 register to copy parameters. */ | |
68856ea3 | 92 | if (struct_return) |
7b112f9c | 93 | { |
68856ea3 AC |
94 | if (write_pass) |
95 | regcache_cooked_write_signed (regcache, | |
96 | tdep->ppc_gp0_regnum + greg, | |
97 | struct_addr); | |
98 | greg++; | |
7b112f9c | 99 | } |
68856ea3 AC |
100 | |
101 | for (argno = 0; argno < nargs; argno++) | |
7b112f9c | 102 | { |
68856ea3 | 103 | struct value *arg = args[argno]; |
df407dfe | 104 | struct type *type = check_typedef (value_type (arg)); |
68856ea3 | 105 | int len = TYPE_LENGTH (type); |
0fd88904 | 106 | const bfd_byte *val = value_contents (arg); |
68856ea3 | 107 | |
55eddb0f DJ |
108 | if (TYPE_CODE (type) == TYPE_CODE_FLT && len <= 8 |
109 | && !tdep->soft_float) | |
7b112f9c | 110 | { |
68856ea3 | 111 | /* Floating point value converted to "double" then |
944fcfab AC |
112 | passed in an FP register, when the registers run out, |
113 | 8 byte aligned stack is used. */ | |
68856ea3 AC |
114 | if (freg <= 8) |
115 | { | |
116 | if (write_pass) | |
117 | { | |
118 | /* Always store the floating point value using | |
944fcfab | 119 | the register's floating-point format. */ |
50fd1280 | 120 | gdb_byte regval[MAX_REGISTER_SIZE]; |
68856ea3 | 121 | struct type *regtype |
366f009f | 122 | = register_type (gdbarch, tdep->ppc_fp0_regnum + freg); |
68856ea3 | 123 | convert_typed_floating (val, type, regval, regtype); |
366f009f JB |
124 | regcache_cooked_write (regcache, |
125 | tdep->ppc_fp0_regnum + freg, | |
68856ea3 AC |
126 | regval); |
127 | } | |
128 | freg++; | |
129 | } | |
7b112f9c JT |
130 | else |
131 | { | |
f964a756 MK |
132 | /* The SysV ABI tells us to convert floats to |
133 | doubles before writing them to an 8 byte aligned | |
134 | stack location. Unfortunately GCC does not do | |
135 | that, and stores floats into 4 byte aligned | |
136 | locations without converting them to doubles. | |
137 | Since there is no know compiler that actually | |
138 | follows the ABI here, we implement the GCC | |
139 | convention. */ | |
140 | ||
141 | /* Align to 4 bytes or 8 bytes depending on the type of | |
142 | the argument (float or double). */ | |
143 | argoffset = align_up (argoffset, len); | |
68856ea3 | 144 | if (write_pass) |
68856ea3 | 145 | write_memory (sp + argoffset, val, len); |
f964a756 | 146 | argoffset += len; |
7b112f9c JT |
147 | } |
148 | } | |
b14d30e1 JM |
149 | else if (TYPE_CODE (type) == TYPE_CODE_FLT |
150 | && len == 16 | |
151 | && !tdep->soft_float | |
40a6adc1 | 152 | && (gdbarch_long_double_format (gdbarch) |
b14d30e1 JM |
153 | == floatformats_ibm_long_double)) |
154 | { | |
155 | /* IBM long double passed in two FP registers if | |
156 | available, otherwise 8-byte aligned stack. */ | |
157 | if (freg <= 7) | |
158 | { | |
159 | if (write_pass) | |
160 | { | |
161 | regcache_cooked_write (regcache, | |
162 | tdep->ppc_fp0_regnum + freg, | |
163 | val); | |
164 | regcache_cooked_write (regcache, | |
165 | tdep->ppc_fp0_regnum + freg + 1, | |
166 | val + 8); | |
167 | } | |
168 | freg += 2; | |
169 | } | |
170 | else | |
171 | { | |
172 | argoffset = align_up (argoffset, 8); | |
173 | if (write_pass) | |
174 | write_memory (sp + argoffset, val, len); | |
175 | argoffset += 16; | |
176 | } | |
177 | } | |
55eddb0f DJ |
178 | else if (len == 8 |
179 | && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */ | |
180 | || TYPE_CODE (type) == TYPE_CODE_FLT)) /* double */ | |
7b112f9c | 181 | { |
55eddb0f | 182 | /* "long long" or soft-float "double" passed in an odd/even |
944fcfab AC |
183 | register pair with the low addressed word in the odd |
184 | register and the high addressed word in the even | |
185 | register, or when the registers run out an 8 byte | |
186 | aligned stack location. */ | |
68856ea3 AC |
187 | if (greg > 9) |
188 | { | |
189 | /* Just in case GREG was 10. */ | |
190 | greg = 11; | |
191 | argoffset = align_up (argoffset, 8); | |
192 | if (write_pass) | |
193 | write_memory (sp + argoffset, val, len); | |
194 | argoffset += 8; | |
195 | } | |
68856ea3 AC |
196 | else |
197 | { | |
198 | /* Must start on an odd register - r3/r4 etc. */ | |
199 | if ((greg & 1) == 0) | |
200 | greg++; | |
201 | if (write_pass) | |
202 | { | |
203 | regcache_cooked_write (regcache, | |
204 | tdep->ppc_gp0_regnum + greg + 0, | |
205 | val + 0); | |
206 | regcache_cooked_write (regcache, | |
207 | tdep->ppc_gp0_regnum + greg + 1, | |
208 | val + 4); | |
209 | } | |
210 | greg += 2; | |
211 | } | |
7b112f9c | 212 | } |
b14d30e1 | 213 | else if (len == 16 && TYPE_CODE (type) == TYPE_CODE_FLT |
40a6adc1 | 214 | && (gdbarch_long_double_format (gdbarch) |
b14d30e1 JM |
215 | == floatformats_ibm_long_double)) |
216 | { | |
217 | /* Soft-float IBM long double passed in four consecutive | |
218 | registers, or on the stack. The registers are not | |
219 | necessarily odd/even pairs. */ | |
220 | if (greg > 7) | |
221 | { | |
222 | greg = 11; | |
223 | argoffset = align_up (argoffset, 8); | |
224 | if (write_pass) | |
225 | write_memory (sp + argoffset, val, len); | |
226 | argoffset += 16; | |
227 | } | |
228 | else | |
229 | { | |
230 | if (write_pass) | |
231 | { | |
232 | regcache_cooked_write (regcache, | |
233 | tdep->ppc_gp0_regnum + greg + 0, | |
234 | val + 0); | |
235 | regcache_cooked_write (regcache, | |
236 | tdep->ppc_gp0_regnum + greg + 1, | |
237 | val + 4); | |
238 | regcache_cooked_write (regcache, | |
239 | tdep->ppc_gp0_regnum + greg + 2, | |
240 | val + 8); | |
241 | regcache_cooked_write (regcache, | |
242 | tdep->ppc_gp0_regnum + greg + 3, | |
243 | val + 12); | |
244 | } | |
245 | greg += 4; | |
246 | } | |
247 | } | |
1300a2f4 TJB |
248 | else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len <= 8 |
249 | && !tdep->soft_float) | |
250 | { | |
251 | /* 32-bit and 64-bit decimal floats go in f1 .. f8. They can | |
252 | end up in memory. */ | |
253 | ||
254 | if (freg <= 8) | |
255 | { | |
256 | if (write_pass) | |
257 | { | |
258 | gdb_byte regval[MAX_REGISTER_SIZE]; | |
259 | const gdb_byte *p; | |
260 | ||
261 | /* 32-bit decimal floats are right aligned in the | |
262 | doubleword. */ | |
263 | if (TYPE_LENGTH (type) == 4) | |
264 | { | |
265 | memcpy (regval + 4, val, 4); | |
266 | p = regval; | |
267 | } | |
268 | else | |
269 | p = val; | |
270 | ||
271 | regcache_cooked_write (regcache, | |
272 | tdep->ppc_fp0_regnum + freg, p); | |
273 | } | |
274 | ||
275 | freg++; | |
276 | } | |
277 | else | |
278 | { | |
279 | argoffset = align_up (argoffset, len); | |
280 | ||
281 | if (write_pass) | |
282 | /* Write value in the stack's parameter save area. */ | |
283 | write_memory (sp + argoffset, val, len); | |
284 | ||
285 | argoffset += len; | |
286 | } | |
287 | } | |
288 | else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len == 16 | |
289 | && !tdep->soft_float) | |
290 | { | |
291 | /* 128-bit decimal floats go in f2 .. f7, always in even/odd | |
292 | pairs. They can end up in memory, using two doublewords. */ | |
293 | ||
294 | if (freg <= 6) | |
295 | { | |
296 | /* Make sure freg is even. */ | |
297 | freg += freg & 1; | |
298 | ||
299 | if (write_pass) | |
300 | { | |
301 | regcache_cooked_write (regcache, | |
302 | tdep->ppc_fp0_regnum + freg, val); | |
303 | regcache_cooked_write (regcache, | |
304 | tdep->ppc_fp0_regnum + freg + 1, val + 8); | |
305 | } | |
306 | } | |
307 | else | |
308 | { | |
309 | argoffset = align_up (argoffset, 8); | |
310 | ||
311 | if (write_pass) | |
312 | write_memory (sp + argoffset, val, 16); | |
313 | ||
314 | argoffset += 16; | |
315 | } | |
316 | ||
317 | /* If a 128-bit decimal float goes to the stack because only f7 | |
318 | and f8 are free (thus there's no even/odd register pair | |
319 | available), these registers should be marked as occupied. | |
320 | Hence we increase freg even when writing to memory. */ | |
321 | freg += 2; | |
322 | } | |
68856ea3 AC |
323 | else if (len == 16 |
324 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
55eddb0f DJ |
325 | && TYPE_VECTOR (type) |
326 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC) | |
7b112f9c | 327 | { |
68856ea3 | 328 | /* Vector parameter passed in an Altivec register, or |
944fcfab | 329 | when that runs out, 16 byte aligned stack location. */ |
7b112f9c JT |
330 | if (vreg <= 13) |
331 | { | |
68856ea3 | 332 | if (write_pass) |
9c9acae0 | 333 | regcache_cooked_write (regcache, |
944fcfab | 334 | tdep->ppc_vr0_regnum + vreg, val); |
7b112f9c JT |
335 | vreg++; |
336 | } | |
337 | else | |
338 | { | |
68856ea3 AC |
339 | argoffset = align_up (argoffset, 16); |
340 | if (write_pass) | |
341 | write_memory (sp + argoffset, val, 16); | |
7b112f9c JT |
342 | argoffset += 16; |
343 | } | |
344 | } | |
944fcfab | 345 | else if (len == 8 |
0a613259 | 346 | && TYPE_CODE (type) == TYPE_CODE_ARRAY |
55eddb0f DJ |
347 | && TYPE_VECTOR (type) |
348 | && tdep->vector_abi == POWERPC_VEC_SPE) | |
944fcfab | 349 | { |
68856ea3 | 350 | /* Vector parameter passed in an e500 register, or when |
944fcfab AC |
351 | that runs out, 8 byte aligned stack location. Note |
352 | that since e500 vector and general purpose registers | |
353 | both map onto the same underlying register set, a | |
354 | "greg" and not a "vreg" is consumed here. A cooked | |
355 | write stores the value in the correct locations | |
356 | within the raw register cache. */ | |
357 | if (greg <= 10) | |
358 | { | |
68856ea3 | 359 | if (write_pass) |
9c9acae0 | 360 | regcache_cooked_write (regcache, |
944fcfab AC |
361 | tdep->ppc_ev0_regnum + greg, val); |
362 | greg++; | |
363 | } | |
364 | else | |
365 | { | |
68856ea3 AC |
366 | argoffset = align_up (argoffset, 8); |
367 | if (write_pass) | |
368 | write_memory (sp + argoffset, val, 8); | |
944fcfab AC |
369 | argoffset += 8; |
370 | } | |
371 | } | |
68856ea3 AC |
372 | else |
373 | { | |
374 | /* Reduce the parameter down to something that fits in a | |
944fcfab | 375 | "word". */ |
50fd1280 | 376 | gdb_byte word[MAX_REGISTER_SIZE]; |
68856ea3 AC |
377 | memset (word, 0, MAX_REGISTER_SIZE); |
378 | if (len > tdep->wordsize | |
379 | || TYPE_CODE (type) == TYPE_CODE_STRUCT | |
380 | || TYPE_CODE (type) == TYPE_CODE_UNION) | |
381 | { | |
55eddb0f DJ |
382 | /* Structs and large values are put in an |
383 | aligned stack slot ... */ | |
384 | if (TYPE_CODE (type) == TYPE_CODE_ARRAY | |
385 | && TYPE_VECTOR (type) | |
386 | && len >= 16) | |
387 | structoffset = align_up (structoffset, 16); | |
388 | else | |
389 | structoffset = align_up (structoffset, 8); | |
390 | ||
68856ea3 AC |
391 | if (write_pass) |
392 | write_memory (sp + structoffset, val, len); | |
393 | /* ... and then a "word" pointing to that address is | |
944fcfab | 394 | passed as the parameter. */ |
68856ea3 AC |
395 | store_unsigned_integer (word, tdep->wordsize, |
396 | sp + structoffset); | |
397 | structoffset += len; | |
398 | } | |
399 | else if (TYPE_CODE (type) == TYPE_CODE_INT) | |
400 | /* Sign or zero extend the "int" into a "word". */ | |
401 | store_unsigned_integer (word, tdep->wordsize, | |
402 | unpack_long (type, val)); | |
403 | else | |
404 | /* Always goes in the low address. */ | |
405 | memcpy (word, val, len); | |
406 | /* Store that "word" in a register, or on the stack. | |
944fcfab | 407 | The words have "4" byte alignment. */ |
68856ea3 AC |
408 | if (greg <= 10) |
409 | { | |
410 | if (write_pass) | |
411 | regcache_cooked_write (regcache, | |
944fcfab | 412 | tdep->ppc_gp0_regnum + greg, word); |
68856ea3 AC |
413 | greg++; |
414 | } | |
415 | else | |
416 | { | |
417 | argoffset = align_up (argoffset, tdep->wordsize); | |
418 | if (write_pass) | |
419 | write_memory (sp + argoffset, word, tdep->wordsize); | |
420 | argoffset += tdep->wordsize; | |
421 | } | |
422 | } | |
423 | } | |
424 | ||
425 | /* Compute the actual stack space requirements. */ | |
426 | if (!write_pass) | |
427 | { | |
428 | /* Remember the amount of space needed by the arguments. */ | |
429 | argspace = argoffset; | |
430 | /* Allocate space for both the arguments and the structures. */ | |
431 | sp -= (argoffset + structoffset); | |
432 | /* Ensure that the stack is still 16 byte aligned. */ | |
433 | sp = align_down (sp, 16); | |
434 | } | |
65ada037 MK |
435 | |
436 | /* The psABI says that "A caller of a function that takes a | |
437 | variable argument list shall set condition register bit 6 to | |
438 | 1 if it passes one or more arguments in the floating-point | |
439 | registers. It is strongly recommended that the caller set the | |
440 | bit to 0 otherwise..." Doing this for normal functions too | |
441 | shouldn't hurt. */ | |
442 | if (write_pass) | |
443 | { | |
444 | ULONGEST cr; | |
445 | ||
446 | regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr); | |
447 | if (freg > 1) | |
448 | cr |= 0x02000000; | |
449 | else | |
450 | cr &= ~0x02000000; | |
451 | regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr); | |
452 | } | |
7b112f9c JT |
453 | } |
454 | ||
68856ea3 | 455 | /* Update %sp. */ |
40a6adc1 | 456 | regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp); |
68856ea3 AC |
457 | |
458 | /* Write the backchain (it occupies WORDSIZED bytes). */ | |
459 | write_memory_signed_integer (sp, tdep->wordsize, saved_sp); | |
460 | ||
e56a0ecc AC |
461 | /* Point the inferior function call's return address at the dummy's |
462 | breakpoint. */ | |
68856ea3 | 463 | regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); |
e56a0ecc | 464 | |
7b112f9c JT |
465 | return sp; |
466 | } | |
467 | ||
1300a2f4 TJB |
468 | /* Handle the return-value conventions for Decimal Floating Point values |
469 | in both ppc32 and ppc64, which are the same. */ | |
470 | static int | |
471 | get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype, | |
472 | struct regcache *regcache, gdb_byte *readbuf, | |
473 | const gdb_byte *writebuf) | |
474 | { | |
475 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
476 | ||
477 | gdb_assert (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT); | |
478 | ||
479 | /* 32-bit and 64-bit decimal floats in f1. */ | |
480 | if (TYPE_LENGTH (valtype) <= 8) | |
481 | { | |
482 | if (writebuf != NULL) | |
483 | { | |
484 | gdb_byte regval[MAX_REGISTER_SIZE]; | |
485 | const gdb_byte *p; | |
486 | ||
487 | /* 32-bit decimal float is right aligned in the doubleword. */ | |
488 | if (TYPE_LENGTH (valtype) == 4) | |
489 | { | |
490 | memcpy (regval + 4, writebuf, 4); | |
491 | p = regval; | |
492 | } | |
493 | else | |
494 | p = writebuf; | |
495 | ||
496 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, p); | |
497 | } | |
498 | if (readbuf != NULL) | |
499 | { | |
500 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf); | |
501 | ||
502 | /* Left align 32-bit decimal float. */ | |
503 | if (TYPE_LENGTH (valtype) == 4) | |
504 | memcpy (readbuf, readbuf + 4, 4); | |
505 | } | |
506 | } | |
507 | /* 128-bit decimal floats in f2,f3. */ | |
508 | else if (TYPE_LENGTH (valtype) == 16) | |
509 | { | |
510 | if (writebuf != NULL || readbuf != NULL) | |
511 | { | |
512 | int i; | |
513 | ||
514 | for (i = 0; i < 2; i++) | |
515 | { | |
516 | if (writebuf != NULL) | |
517 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2 + i, | |
518 | writebuf + i * 8); | |
519 | if (readbuf != NULL) | |
520 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2 + i, | |
521 | readbuf + i * 8); | |
522 | } | |
523 | } | |
524 | } | |
525 | else | |
526 | /* Can't happen. */ | |
527 | internal_error (__FILE__, __LINE__, "Unknown decimal float size."); | |
528 | ||
529 | return RETURN_VALUE_REGISTER_CONVENTION; | |
530 | } | |
531 | ||
e754ae69 AC |
532 | /* Handle the return-value conventions specified by the SysV 32-bit |
533 | PowerPC ABI (including all the supplements): | |
534 | ||
535 | no floating-point: floating-point values returned using 32-bit | |
536 | general-purpose registers. | |
537 | ||
538 | Altivec: 128-bit vectors returned using vector registers. | |
539 | ||
540 | e500: 64-bit vectors returned using the full full 64 bit EV | |
541 | register, floating-point values returned using 32-bit | |
542 | general-purpose registers. | |
543 | ||
544 | GCC (broken): Small struct values right (instead of left) aligned | |
545 | when returned in general-purpose registers. */ | |
546 | ||
547 | static enum return_value_convention | |
05580c65 | 548 | do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type, |
55eddb0f DJ |
549 | struct regcache *regcache, gdb_byte *readbuf, |
550 | const gdb_byte *writebuf, int broken_gcc) | |
e754ae69 | 551 | { |
05580c65 | 552 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
e754ae69 AC |
553 | gdb_assert (tdep->wordsize == 4); |
554 | if (TYPE_CODE (type) == TYPE_CODE_FLT | |
555 | && TYPE_LENGTH (type) <= 8 | |
55eddb0f | 556 | && !tdep->soft_float) |
e754ae69 | 557 | { |
963e2bb7 | 558 | if (readbuf) |
e754ae69 AC |
559 | { |
560 | /* Floats and doubles stored in "f1". Convert the value to | |
561 | the required type. */ | |
50fd1280 | 562 | gdb_byte regval[MAX_REGISTER_SIZE]; |
366f009f JB |
563 | struct type *regtype = register_type (gdbarch, |
564 | tdep->ppc_fp0_regnum + 1); | |
565 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval); | |
963e2bb7 | 566 | convert_typed_floating (regval, regtype, readbuf, type); |
e754ae69 | 567 | } |
963e2bb7 | 568 | if (writebuf) |
e754ae69 AC |
569 | { |
570 | /* Floats and doubles stored in "f1". Convert the value to | |
571 | the register's "double" type. */ | |
50fd1280 | 572 | gdb_byte regval[MAX_REGISTER_SIZE]; |
366f009f | 573 | struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum); |
963e2bb7 | 574 | convert_typed_floating (writebuf, type, regval, regtype); |
366f009f | 575 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval); |
e754ae69 AC |
576 | } |
577 | return RETURN_VALUE_REGISTER_CONVENTION; | |
578 | } | |
b14d30e1 JM |
579 | if (TYPE_CODE (type) == TYPE_CODE_FLT |
580 | && TYPE_LENGTH (type) == 16 | |
581 | && !tdep->soft_float | |
40a6adc1 | 582 | && (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double)) |
b14d30e1 JM |
583 | { |
584 | /* IBM long double stored in f1 and f2. */ | |
585 | if (readbuf) | |
586 | { | |
587 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf); | |
588 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2, | |
589 | readbuf + 8); | |
590 | } | |
591 | if (writebuf) | |
592 | { | |
593 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, writebuf); | |
594 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2, | |
595 | writebuf + 8); | |
596 | } | |
597 | return RETURN_VALUE_REGISTER_CONVENTION; | |
598 | } | |
599 | if (TYPE_CODE (type) == TYPE_CODE_FLT | |
600 | && TYPE_LENGTH (type) == 16 | |
40a6adc1 | 601 | && (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double)) |
b14d30e1 JM |
602 | { |
603 | /* Soft-float IBM long double stored in r3, r4, r5, r6. */ | |
604 | if (readbuf) | |
605 | { | |
606 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf); | |
607 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, | |
608 | readbuf + 4); | |
609 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5, | |
610 | readbuf + 8); | |
611 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6, | |
612 | readbuf + 12); | |
613 | } | |
614 | if (writebuf) | |
615 | { | |
616 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf); | |
617 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, | |
618 | writebuf + 4); | |
619 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5, | |
620 | writebuf + 8); | |
621 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6, | |
622 | writebuf + 12); | |
623 | } | |
624 | return RETURN_VALUE_REGISTER_CONVENTION; | |
625 | } | |
e754ae69 AC |
626 | if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8) |
627 | || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)) | |
628 | { | |
963e2bb7 | 629 | if (readbuf) |
e754ae69 AC |
630 | { |
631 | /* A long long, or a double stored in the 32 bit r3/r4. */ | |
632 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, | |
55eddb0f | 633 | readbuf + 0); |
e754ae69 | 634 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, |
55eddb0f | 635 | readbuf + 4); |
e754ae69 | 636 | } |
963e2bb7 | 637 | if (writebuf) |
e754ae69 AC |
638 | { |
639 | /* A long long, or a double stored in the 32 bit r3/r4. */ | |
640 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, | |
55eddb0f | 641 | writebuf + 0); |
e754ae69 | 642 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, |
55eddb0f | 643 | writebuf + 4); |
e754ae69 AC |
644 | } |
645 | return RETURN_VALUE_REGISTER_CONVENTION; | |
646 | } | |
1300a2f4 TJB |
647 | if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && !tdep->soft_float) |
648 | return get_decimal_float_return_value (gdbarch, type, regcache, readbuf, | |
649 | writebuf); | |
f0027ce2 DJ |
650 | else if ((TYPE_CODE (type) == TYPE_CODE_INT |
651 | || TYPE_CODE (type) == TYPE_CODE_CHAR | |
652 | || TYPE_CODE (type) == TYPE_CODE_BOOL | |
653 | || TYPE_CODE (type) == TYPE_CODE_PTR | |
654 | || TYPE_CODE (type) == TYPE_CODE_REF | |
655 | || TYPE_CODE (type) == TYPE_CODE_ENUM) | |
656 | && TYPE_LENGTH (type) <= tdep->wordsize) | |
e754ae69 | 657 | { |
963e2bb7 | 658 | if (readbuf) |
e754ae69 AC |
659 | { |
660 | /* Some sort of integer stored in r3. Since TYPE isn't | |
661 | bigger than the register, sign extension isn't a problem | |
662 | - just do everything unsigned. */ | |
663 | ULONGEST regval; | |
664 | regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
665 | ®val); | |
963e2bb7 | 666 | store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval); |
e754ae69 | 667 | } |
963e2bb7 | 668 | if (writebuf) |
e754ae69 AC |
669 | { |
670 | /* Some sort of integer stored in r3. Use unpack_long since | |
671 | that should handle any required sign extension. */ | |
672 | regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
963e2bb7 | 673 | unpack_long (type, writebuf)); |
e754ae69 AC |
674 | } |
675 | return RETURN_VALUE_REGISTER_CONVENTION; | |
676 | } | |
677 | if (TYPE_LENGTH (type) == 16 | |
678 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
55eddb0f DJ |
679 | && TYPE_VECTOR (type) |
680 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC) | |
e754ae69 | 681 | { |
963e2bb7 | 682 | if (readbuf) |
e754ae69 AC |
683 | { |
684 | /* Altivec places the return value in "v2". */ | |
963e2bb7 | 685 | regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf); |
e754ae69 | 686 | } |
963e2bb7 | 687 | if (writebuf) |
e754ae69 AC |
688 | { |
689 | /* Altivec places the return value in "v2". */ | |
963e2bb7 | 690 | regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf); |
e754ae69 AC |
691 | } |
692 | return RETURN_VALUE_REGISTER_CONVENTION; | |
693 | } | |
55eddb0f DJ |
694 | if (TYPE_LENGTH (type) == 16 |
695 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
696 | && TYPE_VECTOR (type) | |
697 | && tdep->vector_abi == POWERPC_VEC_GENERIC) | |
698 | { | |
699 | /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6. | |
700 | GCC without AltiVec returns them in memory, but it warns about | |
701 | ABI risks in that case; we don't try to support it. */ | |
702 | if (readbuf) | |
703 | { | |
704 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, | |
705 | readbuf + 0); | |
706 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, | |
707 | readbuf + 4); | |
708 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5, | |
709 | readbuf + 8); | |
710 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6, | |
711 | readbuf + 12); | |
712 | } | |
713 | if (writebuf) | |
714 | { | |
715 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, | |
716 | writebuf + 0); | |
717 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, | |
718 | writebuf + 4); | |
719 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5, | |
720 | writebuf + 8); | |
721 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6, | |
722 | writebuf + 12); | |
723 | } | |
724 | return RETURN_VALUE_REGISTER_CONVENTION; | |
725 | } | |
e754ae69 AC |
726 | if (TYPE_LENGTH (type) == 8 |
727 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
55eddb0f DJ |
728 | && TYPE_VECTOR (type) |
729 | && tdep->vector_abi == POWERPC_VEC_SPE) | |
e754ae69 AC |
730 | { |
731 | /* The e500 ABI places return values for the 64-bit DSP types | |
732 | (__ev64_opaque__) in r3. However, in GDB-speak, ev3 | |
733 | corresponds to the entire r3 value for e500, whereas GDB's r3 | |
734 | only corresponds to the least significant 32-bits. So place | |
735 | the 64-bit DSP type's value in ev3. */ | |
963e2bb7 AC |
736 | if (readbuf) |
737 | regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf); | |
738 | if (writebuf) | |
739 | regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf); | |
e754ae69 AC |
740 | return RETURN_VALUE_REGISTER_CONVENTION; |
741 | } | |
742 | if (broken_gcc && TYPE_LENGTH (type) <= 8) | |
743 | { | |
61bf9ae0 MK |
744 | /* GCC screwed up for structures or unions whose size is less |
745 | than or equal to 8 bytes.. Instead of left-aligning, it | |
746 | right-aligns the data into the buffer formed by r3, r4. */ | |
747 | gdb_byte regvals[MAX_REGISTER_SIZE * 2]; | |
748 | int len = TYPE_LENGTH (type); | |
749 | int offset = (2 * tdep->wordsize - len) % tdep->wordsize; | |
750 | ||
963e2bb7 | 751 | if (readbuf) |
e754ae69 | 752 | { |
61bf9ae0 MK |
753 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, |
754 | regvals + 0 * tdep->wordsize); | |
755 | if (len > tdep->wordsize) | |
756 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, | |
757 | regvals + 1 * tdep->wordsize); | |
758 | memcpy (readbuf, regvals + offset, len); | |
e754ae69 | 759 | } |
963e2bb7 | 760 | if (writebuf) |
e754ae69 | 761 | { |
61bf9ae0 MK |
762 | memset (regvals, 0, sizeof regvals); |
763 | memcpy (regvals + offset, writebuf, len); | |
764 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, | |
765 | regvals + 0 * tdep->wordsize); | |
766 | if (len > tdep->wordsize) | |
767 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, | |
768 | regvals + 1 * tdep->wordsize); | |
e754ae69 | 769 | } |
61bf9ae0 | 770 | |
e754ae69 AC |
771 | return RETURN_VALUE_REGISTER_CONVENTION; |
772 | } | |
773 | if (TYPE_LENGTH (type) <= 8) | |
774 | { | |
963e2bb7 | 775 | if (readbuf) |
e754ae69 AC |
776 | { |
777 | /* This matches SVr4 PPC, it does not match GCC. */ | |
778 | /* The value is right-padded to 8 bytes and then loaded, as | |
779 | two "words", into r3/r4. */ | |
50fd1280 | 780 | gdb_byte regvals[MAX_REGISTER_SIZE * 2]; |
e754ae69 AC |
781 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, |
782 | regvals + 0 * tdep->wordsize); | |
783 | if (TYPE_LENGTH (type) > tdep->wordsize) | |
784 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, | |
785 | regvals + 1 * tdep->wordsize); | |
963e2bb7 | 786 | memcpy (readbuf, regvals, TYPE_LENGTH (type)); |
e754ae69 | 787 | } |
963e2bb7 | 788 | if (writebuf) |
e754ae69 AC |
789 | { |
790 | /* This matches SVr4 PPC, it does not match GCC. */ | |
791 | /* The value is padded out to 8 bytes and then loaded, as | |
792 | two "words" into r3/r4. */ | |
50fd1280 | 793 | gdb_byte regvals[MAX_REGISTER_SIZE * 2]; |
e754ae69 | 794 | memset (regvals, 0, sizeof regvals); |
963e2bb7 | 795 | memcpy (regvals, writebuf, TYPE_LENGTH (type)); |
e754ae69 AC |
796 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, |
797 | regvals + 0 * tdep->wordsize); | |
798 | if (TYPE_LENGTH (type) > tdep->wordsize) | |
799 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, | |
800 | regvals + 1 * tdep->wordsize); | |
801 | } | |
802 | return RETURN_VALUE_REGISTER_CONVENTION; | |
803 | } | |
804 | return RETURN_VALUE_STRUCT_CONVENTION; | |
805 | } | |
806 | ||
05580c65 | 807 | enum return_value_convention |
c055b101 CV |
808 | ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *func_type, |
809 | struct type *valtype, struct regcache *regcache, | |
810 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
e754ae69 | 811 | { |
963e2bb7 AC |
812 | return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf, |
813 | writebuf, 0); | |
e754ae69 AC |
814 | } |
815 | ||
05580c65 | 816 | enum return_value_convention |
963e2bb7 | 817 | ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch, |
c055b101 | 818 | struct type *func_type, |
963e2bb7 AC |
819 | struct type *valtype, |
820 | struct regcache *regcache, | |
50fd1280 | 821 | gdb_byte *readbuf, const gdb_byte *writebuf) |
e754ae69 | 822 | { |
963e2bb7 AC |
823 | return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf, |
824 | writebuf, 1); | |
944fcfab | 825 | } |
afd48b75 | 826 | |
b6e1c027 AC |
827 | /* The helper function for 64-bit SYSV push_dummy_call. Converts the |
828 | function's code address back into the function's descriptor | |
829 | address. | |
830 | ||
831 | Find a value for the TOC register. Every symbol should have both | |
832 | ".FN" and "FN" in the minimal symbol table. "FN" points at the | |
833 | FN's descriptor, while ".FN" points at the entry point (which | |
834 | matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the | |
835 | FN's descriptor address (while at the same time being careful to | |
836 | find "FN" in the same object file as ".FN"). */ | |
837 | ||
838 | static int | |
839 | convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr) | |
840 | { | |
841 | struct obj_section *dot_fn_section; | |
842 | struct minimal_symbol *dot_fn; | |
843 | struct minimal_symbol *fn; | |
844 | CORE_ADDR toc; | |
845 | /* Find the minimal symbol that corresponds to CODE_ADDR (should | |
846 | have a name of the form ".FN"). */ | |
847 | dot_fn = lookup_minimal_symbol_by_pc (code_addr); | |
848 | if (dot_fn == NULL || SYMBOL_LINKAGE_NAME (dot_fn)[0] != '.') | |
849 | return 0; | |
850 | /* Get the section that contains CODE_ADDR. Need this for the | |
851 | "objfile" that it contains. */ | |
852 | dot_fn_section = find_pc_section (code_addr); | |
853 | if (dot_fn_section == NULL || dot_fn_section->objfile == NULL) | |
854 | return 0; | |
855 | /* Now find the corresponding "FN" (dropping ".") minimal symbol's | |
856 | address. Only look for the minimal symbol in ".FN"'s object file | |
857 | - avoids problems when two object files (i.e., shared libraries) | |
858 | contain a minimal symbol with the same name. */ | |
859 | fn = lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL, | |
860 | dot_fn_section->objfile); | |
861 | if (fn == NULL) | |
862 | return 0; | |
863 | /* Found a descriptor. */ | |
864 | (*desc_addr) = SYMBOL_VALUE_ADDRESS (fn); | |
865 | return 1; | |
866 | } | |
867 | ||
8be9034a AC |
868 | /* Pass the arguments in either registers, or in the stack. Using the |
869 | ppc 64 bit SysV ABI. | |
870 | ||
871 | This implements a dumbed down version of the ABI. It always writes | |
872 | values to memory, GPR and FPR, even when not necessary. Doing this | |
873 | greatly simplifies the logic. */ | |
874 | ||
875 | CORE_ADDR | |
7d9b040b | 876 | ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
8be9034a AC |
877 | struct regcache *regcache, CORE_ADDR bp_addr, |
878 | int nargs, struct value **args, CORE_ADDR sp, | |
879 | int struct_return, CORE_ADDR struct_addr) | |
880 | { | |
7d9b040b | 881 | CORE_ADDR func_addr = find_function_addr (function, NULL); |
40a6adc1 | 882 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
fb4443d8 | 883 | ULONGEST back_chain; |
8be9034a AC |
884 | /* See for-loop comment below. */ |
885 | int write_pass; | |
886 | /* Size of the Altivec's vector parameter region, the final value is | |
887 | computed in the for-loop below. */ | |
888 | LONGEST vparam_size = 0; | |
889 | /* Size of the general parameter region, the final value is computed | |
890 | in the for-loop below. */ | |
891 | LONGEST gparam_size = 0; | |
892 | /* Kevin writes ... I don't mind seeing tdep->wordsize used in the | |
893 | calls to align_up(), align_down(), etc. because this makes it | |
894 | easier to reuse this code (in a copy/paste sense) in the future, | |
895 | but it is a 64-bit ABI and asserting that the wordsize is 8 bytes | |
896 | at some point makes it easier to verify that this function is | |
897 | correct without having to do a non-local analysis to figure out | |
898 | the possible values of tdep->wordsize. */ | |
899 | gdb_assert (tdep->wordsize == 8); | |
900 | ||
55eddb0f DJ |
901 | /* This function exists to support a calling convention that |
902 | requires floating-point registers. It shouldn't be used on | |
903 | processors that lack them. */ | |
904 | gdb_assert (ppc_floating_point_unit_p (gdbarch)); | |
905 | ||
fb4443d8 UW |
906 | /* By this stage in the proceedings, SP has been decremented by "red |
907 | zone size" + "struct return size". Fetch the stack-pointer from | |
908 | before this and use that as the BACK_CHAIN. */ | |
40a6adc1 | 909 | regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch), |
3e8c568d | 910 | &back_chain); |
fb4443d8 | 911 | |
8be9034a AC |
912 | /* Go through the argument list twice. |
913 | ||
914 | Pass 1: Compute the function call's stack space and register | |
915 | requirements. | |
916 | ||
917 | Pass 2: Replay the same computation but this time also write the | |
918 | values out to the target. */ | |
919 | ||
920 | for (write_pass = 0; write_pass < 2; write_pass++) | |
921 | { | |
922 | int argno; | |
923 | /* Next available floating point register for float and double | |
924 | arguments. */ | |
925 | int freg = 1; | |
926 | /* Next available general register for non-vector (but possibly | |
927 | float) arguments. */ | |
928 | int greg = 3; | |
929 | /* Next available vector register for vector arguments. */ | |
930 | int vreg = 2; | |
931 | /* The address, at which the next general purpose parameter | |
932 | (integer, struct, float, ...) should be saved. */ | |
933 | CORE_ADDR gparam; | |
934 | /* Address, at which the next Altivec vector parameter should be | |
935 | saved. */ | |
936 | CORE_ADDR vparam; | |
937 | ||
938 | if (!write_pass) | |
939 | { | |
940 | /* During the first pass, GPARAM and VPARAM are more like | |
941 | offsets (start address zero) than addresses. That way | |
938f5214 | 942 | they accumulate the total stack space each region |
8be9034a AC |
943 | requires. */ |
944 | gparam = 0; | |
945 | vparam = 0; | |
946 | } | |
947 | else | |
948 | { | |
949 | /* Decrement the stack pointer making space for the Altivec | |
950 | and general on-stack parameters. Set vparam and gparam | |
951 | to their corresponding regions. */ | |
952 | vparam = align_down (sp - vparam_size, 16); | |
953 | gparam = align_down (vparam - gparam_size, 16); | |
954 | /* Add in space for the TOC, link editor double word, | |
955 | compiler double word, LR save area, CR save area. */ | |
956 | sp = align_down (gparam - 48, 16); | |
957 | } | |
958 | ||
959 | /* If the function is returning a `struct', then there is an | |
960 | extra hidden parameter (which will be passed in r3) | |
961 | containing the address of that struct.. In that case we | |
962 | should advance one word and start from r4 register to copy | |
963 | parameters. This also consumes one on-stack parameter slot. */ | |
964 | if (struct_return) | |
965 | { | |
966 | if (write_pass) | |
967 | regcache_cooked_write_signed (regcache, | |
968 | tdep->ppc_gp0_regnum + greg, | |
969 | struct_addr); | |
970 | greg++; | |
971 | gparam = align_up (gparam + tdep->wordsize, tdep->wordsize); | |
972 | } | |
973 | ||
974 | for (argno = 0; argno < nargs; argno++) | |
975 | { | |
976 | struct value *arg = args[argno]; | |
df407dfe | 977 | struct type *type = check_typedef (value_type (arg)); |
0fd88904 | 978 | const bfd_byte *val = value_contents (arg); |
ce0451ad | 979 | |
8be9034a AC |
980 | if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8) |
981 | { | |
982 | /* Floats and Doubles go in f1 .. f13. They also | |
983 | consume a left aligned GREG,, and can end up in | |
984 | memory. */ | |
985 | if (write_pass) | |
986 | { | |
ce0451ad TJB |
987 | gdb_byte regval[MAX_REGISTER_SIZE]; |
988 | const gdb_byte *p; | |
989 | ||
990 | /* Version 1.7 of the 64-bit PowerPC ELF ABI says: | |
991 | ||
992 | "Single precision floating point values are mapped to | |
993 | the first word in a single doubleword." | |
994 | ||
995 | And version 1.9 says: | |
996 | ||
997 | "Single precision floating point values are mapped to | |
998 | the second word in a single doubleword." | |
999 | ||
1000 | GDB then writes single precision floating point values | |
1001 | at both words in a doubleword, to support both ABIs. */ | |
1002 | if (TYPE_LENGTH (type) == 4) | |
1003 | { | |
1004 | memcpy (regval, val, 4); | |
1005 | memcpy (regval + 4, val, 4); | |
1006 | p = regval; | |
1007 | } | |
1008 | else | |
1009 | p = val; | |
1010 | ||
1011 | /* Write value in the stack's parameter save area. */ | |
1012 | write_memory (gparam, p, 8); | |
1013 | ||
55eddb0f | 1014 | if (freg <= 13) |
8be9034a | 1015 | { |
366f009f JB |
1016 | struct type *regtype |
1017 | = register_type (gdbarch, tdep->ppc_fp0_regnum); | |
ce0451ad | 1018 | |
8be9034a | 1019 | convert_typed_floating (val, type, regval, regtype); |
366f009f JB |
1020 | regcache_cooked_write (regcache, |
1021 | tdep->ppc_fp0_regnum + freg, | |
8be9034a AC |
1022 | regval); |
1023 | } | |
1024 | if (greg <= 10) | |
ce0451ad TJB |
1025 | regcache_cooked_write (regcache, |
1026 | tdep->ppc_gp0_regnum + greg, | |
1027 | regval); | |
8be9034a | 1028 | } |
ce0451ad | 1029 | |
8be9034a AC |
1030 | freg++; |
1031 | greg++; | |
ce0451ad TJB |
1032 | /* Always consume parameter stack space. */ |
1033 | gparam = align_up (gparam + 8, tdep->wordsize); | |
8be9034a | 1034 | } |
b14d30e1 JM |
1035 | else if (TYPE_CODE (type) == TYPE_CODE_FLT |
1036 | && TYPE_LENGTH (type) == 16 | |
40a6adc1 | 1037 | && (gdbarch_long_double_format (gdbarch) |
b14d30e1 JM |
1038 | == floatformats_ibm_long_double)) |
1039 | { | |
1040 | /* IBM long double stored in two doublewords of the | |
1041 | parameter save area and corresponding registers. */ | |
1042 | if (write_pass) | |
1043 | { | |
1044 | if (!tdep->soft_float && freg <= 13) | |
1045 | { | |
1046 | regcache_cooked_write (regcache, | |
1047 | tdep->ppc_fp0_regnum + freg, | |
1048 | val); | |
1049 | if (freg <= 12) | |
1050 | regcache_cooked_write (regcache, | |
1051 | tdep->ppc_fp0_regnum + freg + 1, | |
1052 | val + 8); | |
1053 | } | |
1054 | if (greg <= 10) | |
1055 | { | |
1056 | regcache_cooked_write (regcache, | |
1057 | tdep->ppc_gp0_regnum + greg, | |
1058 | val); | |
1059 | if (greg <= 9) | |
1060 | regcache_cooked_write (regcache, | |
1061 | tdep->ppc_gp0_regnum + greg + 1, | |
1062 | val + 8); | |
1063 | } | |
1064 | write_memory (gparam, val, TYPE_LENGTH (type)); | |
1065 | } | |
1066 | freg += 2; | |
1067 | greg += 2; | |
1068 | gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); | |
1069 | } | |
1300a2f4 TJB |
1070 | else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT |
1071 | && TYPE_LENGTH (type) <= 8) | |
1072 | { | |
1073 | /* 32-bit and 64-bit decimal floats go in f1 .. f13. They can | |
1074 | end up in memory. */ | |
1075 | if (write_pass) | |
1076 | { | |
1077 | gdb_byte regval[MAX_REGISTER_SIZE]; | |
1078 | const gdb_byte *p; | |
1079 | ||
1080 | /* 32-bit decimal floats are right aligned in the | |
1081 | doubleword. */ | |
1082 | if (TYPE_LENGTH (type) == 4) | |
1083 | { | |
1084 | memcpy (regval + 4, val, 4); | |
1085 | p = regval; | |
1086 | } | |
1087 | else | |
1088 | p = val; | |
1089 | ||
1090 | /* Write value in the stack's parameter save area. */ | |
1091 | write_memory (gparam, p, 8); | |
1092 | ||
1093 | if (freg <= 13) | |
1094 | regcache_cooked_write (regcache, | |
1095 | tdep->ppc_fp0_regnum + freg, p); | |
1096 | } | |
1097 | ||
1098 | freg++; | |
1099 | greg++; | |
1100 | /* Always consume parameter stack space. */ | |
1101 | gparam = align_up (gparam + 8, tdep->wordsize); | |
1102 | } | |
1103 | else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && | |
1104 | TYPE_LENGTH (type) == 16) | |
1105 | { | |
1106 | /* 128-bit decimal floats go in f2 .. f12, always in even/odd | |
1107 | pairs. They can end up in memory, using two doublewords. */ | |
1108 | if (write_pass) | |
1109 | { | |
1110 | if (freg <= 12) | |
1111 | { | |
1112 | /* Make sure freg is even. */ | |
1113 | freg += freg & 1; | |
1114 | regcache_cooked_write (regcache, | |
1115 | tdep->ppc_fp0_regnum + freg, val); | |
1116 | regcache_cooked_write (regcache, | |
1117 | tdep->ppc_fp0_regnum + freg + 1, val + 8); | |
1118 | } | |
1119 | ||
1120 | write_memory (gparam, val, TYPE_LENGTH (type)); | |
1121 | } | |
1122 | ||
1123 | freg += 2; | |
1124 | greg += 2; | |
1125 | gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); | |
1126 | } | |
8be9034a AC |
1127 | else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type) |
1128 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
1129 | && tdep->ppc_vr0_regnum >= 0) | |
1130 | { | |
1131 | /* In the Altivec ABI, vectors go in the vector | |
1132 | registers v2 .. v13, or when that runs out, a vector | |
1133 | annex which goes above all the normal parameters. | |
1134 | NOTE: cagney/2003-09-21: This is a guess based on the | |
1135 | PowerOpen Altivec ABI. */ | |
1136 | if (vreg <= 13) | |
1137 | { | |
1138 | if (write_pass) | |
1139 | regcache_cooked_write (regcache, | |
1140 | tdep->ppc_vr0_regnum + vreg, val); | |
1141 | vreg++; | |
1142 | } | |
1143 | else | |
1144 | { | |
1145 | if (write_pass) | |
1146 | write_memory (vparam, val, TYPE_LENGTH (type)); | |
1147 | vparam = align_up (vparam + TYPE_LENGTH (type), 16); | |
1148 | } | |
1149 | } | |
1150 | else if ((TYPE_CODE (type) == TYPE_CODE_INT | |
b6e1c027 | 1151 | || TYPE_CODE (type) == TYPE_CODE_ENUM |
93d4208d UW |
1152 | || TYPE_CODE (type) == TYPE_CODE_BOOL |
1153 | || TYPE_CODE (type) == TYPE_CODE_CHAR | |
1154 | || TYPE_CODE (type) == TYPE_CODE_PTR | |
1155 | || TYPE_CODE (type) == TYPE_CODE_REF) | |
8be9034a AC |
1156 | && TYPE_LENGTH (type) <= 8) |
1157 | { | |
b6e1c027 AC |
1158 | /* Scalars and Pointers get sign[un]extended and go in |
1159 | gpr3 .. gpr10. They can also end up in memory. */ | |
8be9034a AC |
1160 | if (write_pass) |
1161 | { | |
1162 | /* Sign extend the value, then store it unsigned. */ | |
1163 | ULONGEST word = unpack_long (type, val); | |
b6e1c027 AC |
1164 | /* Convert any function code addresses into |
1165 | descriptors. */ | |
1166 | if (TYPE_CODE (type) == TYPE_CODE_PTR | |
93d4208d | 1167 | || TYPE_CODE (type) == TYPE_CODE_REF) |
b6e1c027 | 1168 | { |
93d4208d UW |
1169 | struct type *target_type; |
1170 | target_type = check_typedef (TYPE_TARGET_TYPE (type)); | |
1171 | ||
1172 | if (TYPE_CODE (target_type) == TYPE_CODE_FUNC | |
1173 | || TYPE_CODE (target_type) == TYPE_CODE_METHOD) | |
1174 | { | |
1175 | CORE_ADDR desc = word; | |
1176 | convert_code_addr_to_desc_addr (word, &desc); | |
1177 | word = desc; | |
1178 | } | |
b6e1c027 | 1179 | } |
8be9034a AC |
1180 | if (greg <= 10) |
1181 | regcache_cooked_write_unsigned (regcache, | |
1182 | tdep->ppc_gp0_regnum + | |
1183 | greg, word); | |
1184 | write_memory_unsigned_integer (gparam, tdep->wordsize, | |
1185 | word); | |
1186 | } | |
1187 | greg++; | |
1188 | gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); | |
1189 | } | |
1190 | else | |
1191 | { | |
1192 | int byte; | |
1193 | for (byte = 0; byte < TYPE_LENGTH (type); | |
1194 | byte += tdep->wordsize) | |
1195 | { | |
1196 | if (write_pass && greg <= 10) | |
1197 | { | |
50fd1280 | 1198 | gdb_byte regval[MAX_REGISTER_SIZE]; |
8be9034a AC |
1199 | int len = TYPE_LENGTH (type) - byte; |
1200 | if (len > tdep->wordsize) | |
1201 | len = tdep->wordsize; | |
1202 | memset (regval, 0, sizeof regval); | |
36815e57 JM |
1203 | /* The ABI (version 1.9) specifies that values |
1204 | smaller than one doubleword are right-aligned | |
1205 | and those larger are left-aligned. GCC | |
1206 | versions before 3.4 implemented this | |
1207 | incorrectly; see | |
1208 | <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */ | |
1209 | if (byte == 0) | |
8be9034a AC |
1210 | memcpy (regval + tdep->wordsize - len, |
1211 | val + byte, len); | |
36815e57 JM |
1212 | else |
1213 | memcpy (regval, val + byte, len); | |
8be9034a AC |
1214 | regcache_cooked_write (regcache, greg, regval); |
1215 | } | |
1216 | greg++; | |
1217 | } | |
1218 | if (write_pass) | |
93d4208d UW |
1219 | { |
1220 | /* WARNING: cagney/2003-09-21: Strictly speaking, this | |
1221 | isn't necessary, unfortunately, GCC appears to get | |
1222 | "struct convention" parameter passing wrong putting | |
1223 | odd sized structures in memory instead of in a | |
1224 | register. Work around this by always writing the | |
1225 | value to memory. Fortunately, doing this | |
1226 | simplifies the code. */ | |
1227 | int len = TYPE_LENGTH (type); | |
1228 | if (len < tdep->wordsize) | |
1229 | write_memory (gparam + tdep->wordsize - len, val, len); | |
1230 | else | |
1231 | write_memory (gparam, val, len); | |
1232 | } | |
36815e57 JM |
1233 | if (freg <= 13 |
1234 | && TYPE_CODE (type) == TYPE_CODE_STRUCT | |
1235 | && TYPE_NFIELDS (type) == 1 | |
1236 | && TYPE_LENGTH (type) <= 16) | |
1237 | { | |
1238 | /* The ABI (version 1.9) specifies that structs | |
1239 | containing a single floating-point value, at any | |
1240 | level of nesting of single-member structs, are | |
1241 | passed in floating-point registers. */ | |
1242 | while (TYPE_CODE (type) == TYPE_CODE_STRUCT | |
1243 | && TYPE_NFIELDS (type) == 1) | |
1244 | type = check_typedef (TYPE_FIELD_TYPE (type, 0)); | |
1245 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
1246 | { | |
1247 | if (TYPE_LENGTH (type) <= 8) | |
1248 | { | |
1249 | if (write_pass) | |
1250 | { | |
1251 | gdb_byte regval[MAX_REGISTER_SIZE]; | |
1252 | struct type *regtype | |
1253 | = register_type (gdbarch, | |
1254 | tdep->ppc_fp0_regnum); | |
1255 | convert_typed_floating (val, type, regval, | |
1256 | regtype); | |
1257 | regcache_cooked_write (regcache, | |
1258 | (tdep->ppc_fp0_regnum | |
1259 | + freg), | |
1260 | regval); | |
1261 | } | |
1262 | freg++; | |
1263 | } | |
1264 | else if (TYPE_LENGTH (type) == 16 | |
40a6adc1 | 1265 | && (gdbarch_long_double_format (gdbarch) |
36815e57 JM |
1266 | == floatformats_ibm_long_double)) |
1267 | { | |
1268 | if (write_pass) | |
1269 | { | |
1270 | regcache_cooked_write (regcache, | |
1271 | (tdep->ppc_fp0_regnum | |
1272 | + freg), | |
1273 | val); | |
1274 | if (freg <= 12) | |
1275 | regcache_cooked_write (regcache, | |
1276 | (tdep->ppc_fp0_regnum | |
1277 | + freg + 1), | |
1278 | val + 8); | |
1279 | } | |
1280 | freg += 2; | |
1281 | } | |
1282 | } | |
1283 | } | |
8be9034a AC |
1284 | /* Always consume parameter stack space. */ |
1285 | gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); | |
1286 | } | |
1287 | } | |
1288 | ||
1289 | if (!write_pass) | |
1290 | { | |
1291 | /* Save the true region sizes ready for the second pass. */ | |
1292 | vparam_size = vparam; | |
1293 | /* Make certain that the general parameter save area is at | |
1294 | least the minimum 8 registers (or doublewords) in size. */ | |
1295 | if (greg < 8) | |
1296 | gparam_size = 8 * tdep->wordsize; | |
1297 | else | |
1298 | gparam_size = gparam; | |
1299 | } | |
1300 | } | |
1301 | ||
1302 | /* Update %sp. */ | |
40a6adc1 | 1303 | regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp); |
8be9034a AC |
1304 | |
1305 | /* Write the backchain (it occupies WORDSIZED bytes). */ | |
1306 | write_memory_signed_integer (sp, tdep->wordsize, back_chain); | |
1307 | ||
1308 | /* Point the inferior function call's return address at the dummy's | |
1309 | breakpoint. */ | |
1310 | regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); | |
1311 | ||
b6e1c027 AC |
1312 | /* Use the func_addr to find the descriptor, and use that to find |
1313 | the TOC. */ | |
8be9034a | 1314 | { |
b6e1c027 AC |
1315 | CORE_ADDR desc_addr; |
1316 | if (convert_code_addr_to_desc_addr (func_addr, &desc_addr)) | |
8be9034a | 1317 | { |
b6e1c027 AC |
1318 | /* The TOC is the second double word in the descriptor. */ |
1319 | CORE_ADDR toc = | |
1320 | read_memory_unsigned_integer (desc_addr + tdep->wordsize, | |
1321 | tdep->wordsize); | |
1322 | regcache_cooked_write_unsigned (regcache, | |
1323 | tdep->ppc_gp0_regnum + 2, toc); | |
8be9034a AC |
1324 | } |
1325 | } | |
1326 | ||
1327 | return sp; | |
1328 | } | |
1329 | ||
afd48b75 | 1330 | |
55eddb0f | 1331 | /* The 64 bit ABI return value convention. |
afd48b75 AC |
1332 | |
1333 | Return non-zero if the return-value is stored in a register, return | |
1334 | 0 if the return-value is instead stored on the stack (a.k.a., | |
1335 | struct return convention). | |
1336 | ||
963e2bb7 | 1337 | For a return-value stored in a register: when WRITEBUF is non-NULL, |
afd48b75 | 1338 | copy the buffer to the corresponding register return-value location |
963e2bb7 | 1339 | location; when READBUF is non-NULL, fill the buffer from the |
afd48b75 | 1340 | corresponding register return-value location. */ |
05580c65 | 1341 | enum return_value_convention |
c055b101 CV |
1342 | ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *func_type, |
1343 | struct type *valtype, struct regcache *regcache, | |
1344 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
afd48b75 | 1345 | { |
05580c65 | 1346 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
16796152 JB |
1347 | |
1348 | /* This function exists to support a calling convention that | |
1349 | requires floating-point registers. It shouldn't be used on | |
1350 | processors that lack them. */ | |
1351 | gdb_assert (ppc_floating_point_unit_p (gdbarch)); | |
1352 | ||
afd48b75 | 1353 | /* Floats and doubles in F1. */ |
944fcfab | 1354 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8) |
afd48b75 | 1355 | { |
50fd1280 | 1356 | gdb_byte regval[MAX_REGISTER_SIZE]; |
366f009f | 1357 | struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum); |
963e2bb7 | 1358 | if (writebuf != NULL) |
afd48b75 | 1359 | { |
963e2bb7 | 1360 | convert_typed_floating (writebuf, valtype, regval, regtype); |
366f009f | 1361 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval); |
afd48b75 | 1362 | } |
963e2bb7 | 1363 | if (readbuf != NULL) |
afd48b75 | 1364 | { |
366f009f | 1365 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval); |
963e2bb7 | 1366 | convert_typed_floating (regval, regtype, readbuf, valtype); |
afd48b75 AC |
1367 | } |
1368 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1369 | } | |
1300a2f4 TJB |
1370 | if (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT) |
1371 | return get_decimal_float_return_value (gdbarch, valtype, regcache, readbuf, | |
1372 | writebuf); | |
3d8476bc | 1373 | /* Integers in r3. */ |
b6e1c027 | 1374 | if ((TYPE_CODE (valtype) == TYPE_CODE_INT |
93d4208d UW |
1375 | || TYPE_CODE (valtype) == TYPE_CODE_ENUM |
1376 | || TYPE_CODE (valtype) == TYPE_CODE_CHAR | |
1377 | || TYPE_CODE (valtype) == TYPE_CODE_BOOL) | |
b6e1c027 | 1378 | && TYPE_LENGTH (valtype) <= 8) |
afd48b75 | 1379 | { |
963e2bb7 | 1380 | if (writebuf != NULL) |
afd48b75 AC |
1381 | { |
1382 | /* Be careful to sign extend the value. */ | |
1383 | regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
963e2bb7 | 1384 | unpack_long (valtype, writebuf)); |
afd48b75 | 1385 | } |
963e2bb7 | 1386 | if (readbuf != NULL) |
afd48b75 AC |
1387 | { |
1388 | /* Extract the integer from r3. Since this is truncating the | |
1389 | value, there isn't a sign extension problem. */ | |
1390 | ULONGEST regval; | |
1391 | regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
1392 | ®val); | |
963e2bb7 | 1393 | store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval); |
afd48b75 AC |
1394 | } |
1395 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1396 | } | |
1397 | /* All pointers live in r3. */ | |
93d4208d UW |
1398 | if (TYPE_CODE (valtype) == TYPE_CODE_PTR |
1399 | || TYPE_CODE (valtype) == TYPE_CODE_REF) | |
afd48b75 AC |
1400 | { |
1401 | /* All pointers live in r3. */ | |
963e2bb7 AC |
1402 | if (writebuf != NULL) |
1403 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf); | |
1404 | if (readbuf != NULL) | |
1405 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf); | |
afd48b75 AC |
1406 | return RETURN_VALUE_REGISTER_CONVENTION; |
1407 | } | |
3d8476bc PG |
1408 | /* Array type has more than one use. */ |
1409 | if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY) | |
afd48b75 AC |
1410 | { |
1411 | /* Small character arrays are returned, right justified, in r3. */ | |
3d8476bc PG |
1412 | if (TYPE_LENGTH (valtype) <= 8 |
1413 | && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT | |
1414 | && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1) | |
1415 | { | |
1416 | int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3) | |
1417 | - TYPE_LENGTH (valtype)); | |
1418 | if (writebuf != NULL) | |
1419 | regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3, | |
1420 | offset, TYPE_LENGTH (valtype), writebuf); | |
1421 | if (readbuf != NULL) | |
1422 | regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3, | |
1423 | offset, TYPE_LENGTH (valtype), readbuf); | |
1424 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1425 | } | |
1426 | /* A VMX vector is returned in v2. */ | |
1427 | if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY | |
1428 | && TYPE_VECTOR (valtype) && tdep->ppc_vr0_regnum >= 0) | |
1429 | { | |
1430 | if (readbuf) | |
1431 | regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf); | |
1432 | if (writebuf) | |
1433 | regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf); | |
1434 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1435 | } | |
afd48b75 AC |
1436 | } |
1437 | /* Big floating point values get stored in adjacent floating | |
3d8476bc | 1438 | point registers, starting with F1. */ |
afd48b75 | 1439 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT |
944fcfab | 1440 | && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32)) |
afd48b75 | 1441 | { |
963e2bb7 | 1442 | if (writebuf || readbuf != NULL) |
afd48b75 AC |
1443 | { |
1444 | int i; | |
1445 | for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++) | |
1446 | { | |
963e2bb7 | 1447 | if (writebuf != NULL) |
366f009f | 1448 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i, |
963e2bb7 AC |
1449 | (const bfd_byte *) writebuf + i * 8); |
1450 | if (readbuf != NULL) | |
366f009f | 1451 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i, |
963e2bb7 | 1452 | (bfd_byte *) readbuf + i * 8); |
afd48b75 AC |
1453 | } |
1454 | } | |
1455 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1456 | } | |
1457 | /* Complex values get returned in f1:f2, need to convert. */ | |
1458 | if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX | |
1459 | && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16)) | |
1460 | { | |
1461 | if (regcache != NULL) | |
1462 | { | |
1463 | int i; | |
1464 | for (i = 0; i < 2; i++) | |
1465 | { | |
50fd1280 | 1466 | gdb_byte regval[MAX_REGISTER_SIZE]; |
944fcfab | 1467 | struct type *regtype = |
40a6adc1 | 1468 | register_type (gdbarch, tdep->ppc_fp0_regnum); |
963e2bb7 | 1469 | if (writebuf != NULL) |
afd48b75 | 1470 | { |
963e2bb7 | 1471 | convert_typed_floating ((const bfd_byte *) writebuf + |
944fcfab | 1472 | i * (TYPE_LENGTH (valtype) / 2), |
afd48b75 | 1473 | valtype, regval, regtype); |
366f009f JB |
1474 | regcache_cooked_write (regcache, |
1475 | tdep->ppc_fp0_regnum + 1 + i, | |
944fcfab | 1476 | regval); |
afd48b75 | 1477 | } |
963e2bb7 | 1478 | if (readbuf != NULL) |
afd48b75 | 1479 | { |
366f009f JB |
1480 | regcache_cooked_read (regcache, |
1481 | tdep->ppc_fp0_regnum + 1 + i, | |
1482 | regval); | |
afd48b75 | 1483 | convert_typed_floating (regval, regtype, |
963e2bb7 | 1484 | (bfd_byte *) readbuf + |
944fcfab | 1485 | i * (TYPE_LENGTH (valtype) / 2), |
afd48b75 AC |
1486 | valtype); |
1487 | } | |
1488 | } | |
1489 | } | |
1490 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1491 | } | |
1492 | /* Big complex values get stored in f1:f4. */ | |
944fcfab | 1493 | if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32) |
afd48b75 AC |
1494 | { |
1495 | if (regcache != NULL) | |
1496 | { | |
1497 | int i; | |
1498 | for (i = 0; i < 4; i++) | |
1499 | { | |
963e2bb7 | 1500 | if (writebuf != NULL) |
366f009f | 1501 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i, |
963e2bb7 AC |
1502 | (const bfd_byte *) writebuf + i * 8); |
1503 | if (readbuf != NULL) | |
366f009f | 1504 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i, |
963e2bb7 | 1505 | (bfd_byte *) readbuf + i * 8); |
afd48b75 AC |
1506 | } |
1507 | } | |
1508 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1509 | } | |
1510 | return RETURN_VALUE_STRUCT_CONVENTION; | |
1511 | } | |
1512 | ||
6066c3de AC |
1513 | CORE_ADDR |
1514 | ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch, | |
1515 | CORE_ADDR bpaddr) | |
1516 | { | |
1517 | /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at | |
1518 | a function-descriptor while the corresponding minimal-symbol | |
1519 | ".FN" should point at the entry point. Consequently, a command | |
1520 | like "break FN" applied to an object file with only minimal | |
1521 | symbols, will insert the breakpoint into the descriptor at "FN" | |
1522 | and not the function at ".FN". Avoid this confusion by adjusting | |
1523 | any attempt to set a descriptor breakpoint into a corresponding | |
1524 | function breakpoint. Note that GDB warns the user when this | |
1525 | adjustment is applied - that's ok as otherwise the user will have | |
1526 | no way of knowing why their breakpoint at "FN" resulted in the | |
1527 | program stopping at ".FN". */ | |
1528 | return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, ¤t_target); | |
1529 | } |