Use "bool" in more spots in TUI
[deliverable/binutils-gdb.git] / gdb / ppc-sysv-tdep.c
CommitLineData
7b112f9c
JT
1/* Target-dependent code for PowerPC systems using the SVR4 ABI
2 for GDB, the GNU debugger.
3
42a4f53d 4 Copyright (C) 2000-2019 Free Software Foundation, Inc.
7b112f9c
JT
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
a9762ec7 10 the Free Software Foundation; either version 3 of the License, or
7b112f9c
JT
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
a9762ec7 19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
7b112f9c
JT
20
21#include "defs.h"
22#include "gdbcore.h"
23#include "inferior.h"
24#include "regcache.h"
25#include "value.h"
7b112f9c 26#include "ppc-tdep.h"
6066c3de 27#include "target.h"
0a90bcdd 28#include "objfiles.h"
7d9b040b 29#include "infcall.h"
54fcddd0 30#include "dwarf2.h"
3b2ca824 31#include "target-float.h"
325fac50 32#include <algorithm>
7b112f9c 33
88aed45e
UW
34
35/* Check whether FTPYE is a (pointer to) function type that should use
36 the OpenCL vector ABI. */
37
38static int
39ppc_sysv_use_opencl_abi (struct type *ftype)
40{
41 ftype = check_typedef (ftype);
42
43 if (TYPE_CODE (ftype) == TYPE_CODE_PTR)
44 ftype = check_typedef (TYPE_TARGET_TYPE (ftype));
45
46 return (TYPE_CODE (ftype) == TYPE_CODE_FUNC
47 && TYPE_CALLING_CONVENTION (ftype) == DW_CC_GDB_IBM_OpenCL);
48}
49
0df8b418 50/* Pass the arguments in either registers, or in the stack. Using the
7b112f9c
JT
51 ppc sysv ABI, the first eight words of the argument list (that might
52 be less than eight parameters if some parameters occupy more than one
53 word) are passed in r3..r10 registers. float and double parameters are
0df8b418
MS
54 passed in fpr's, in addition to that. Rest of the parameters if any
55 are passed in user stack.
7b112f9c
JT
56
57 If the function is returning a structure, then the return address is passed
85102364 58 in r3, then the first 7 words of the parameters can be passed in registers,
0df8b418 59 starting from r4. */
7b112f9c
JT
60
61CORE_ADDR
7d9b040b 62ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
77b2b6d4
AC
63 struct regcache *regcache, CORE_ADDR bp_addr,
64 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
65 function_call_return_method return_method,
66 CORE_ADDR struct_addr)
7b112f9c 67{
40a6adc1 68 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 69 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
88aed45e 70 int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function));
fb4443d8 71 ULONGEST saved_sp;
68856ea3
AC
72 int argspace = 0; /* 0 is an initial wrong guess. */
73 int write_pass;
7b112f9c 74
b14d30e1
JM
75 gdb_assert (tdep->wordsize == 4);
76
40a6adc1 77 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
3e8c568d 78 &saved_sp);
fb4443d8 79
68856ea3 80 /* Go through the argument list twice.
7b112f9c 81
68856ea3
AC
82 Pass 1: Figure out how much new stack space is required for
83 arguments and pushed values. Unlike the PowerOpen ABI, the SysV
84 ABI doesn't reserve any extra space for parameters which are put
85 in registers, but does always push structures and then pass their
86 address.
7a41266b 87
68856ea3
AC
88 Pass 2: Replay the same computation but this time also write the
89 values out to the target. */
7b112f9c 90
68856ea3
AC
91 for (write_pass = 0; write_pass < 2; write_pass++)
92 {
93 int argno;
94 /* Next available floating point register for float and double
95 arguments. */
96 int freg = 1;
97 /* Next available general register for non-float, non-vector
98 arguments. */
99 int greg = 3;
100 /* Next available vector register for vector arguments. */
101 int vreg = 2;
102 /* Arguments start above the "LR save word" and "Back chain". */
103 int argoffset = 2 * tdep->wordsize;
104 /* Structures start after the arguments. */
105 int structoffset = argoffset + argspace;
106
107 /* If the function is returning a `struct', then the first word
944fcfab
AC
108 (which will be passed in r3) is used for struct return
109 address. In that case we should advance one word and start
110 from r4 register to copy parameters. */
cf84fa6b 111 if (return_method == return_method_struct)
7b112f9c 112 {
68856ea3
AC
113 if (write_pass)
114 regcache_cooked_write_signed (regcache,
115 tdep->ppc_gp0_regnum + greg,
116 struct_addr);
117 greg++;
7b112f9c 118 }
68856ea3
AC
119
120 for (argno = 0; argno < nargs; argno++)
7b112f9c 121 {
68856ea3 122 struct value *arg = args[argno];
df407dfe 123 struct type *type = check_typedef (value_type (arg));
68856ea3 124 int len = TYPE_LENGTH (type);
0fd88904 125 const bfd_byte *val = value_contents (arg);
68856ea3 126
55eddb0f
DJ
127 if (TYPE_CODE (type) == TYPE_CODE_FLT && len <= 8
128 && !tdep->soft_float)
7b112f9c 129 {
68856ea3 130 /* Floating point value converted to "double" then
944fcfab
AC
131 passed in an FP register, when the registers run out,
132 8 byte aligned stack is used. */
68856ea3
AC
133 if (freg <= 8)
134 {
135 if (write_pass)
136 {
137 /* Always store the floating point value using
944fcfab 138 the register's floating-point format. */
0f068fb5 139 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
68856ea3 140 struct type *regtype
366f009f 141 = register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
3b2ca824 142 target_float_convert (val, type, regval, regtype);
b66f5587
SM
143 regcache->cooked_write (tdep->ppc_fp0_regnum + freg,
144 regval);
68856ea3
AC
145 }
146 freg++;
147 }
7b112f9c
JT
148 else
149 {
f964a756
MK
150 /* The SysV ABI tells us to convert floats to
151 doubles before writing them to an 8 byte aligned
152 stack location. Unfortunately GCC does not do
153 that, and stores floats into 4 byte aligned
154 locations without converting them to doubles.
155 Since there is no know compiler that actually
156 follows the ABI here, we implement the GCC
157 convention. */
158
159 /* Align to 4 bytes or 8 bytes depending on the type of
160 the argument (float or double). */
161 argoffset = align_up (argoffset, len);
68856ea3 162 if (write_pass)
68856ea3 163 write_memory (sp + argoffset, val, len);
f964a756 164 argoffset += len;
7b112f9c
JT
165 }
166 }
b14d30e1
JM
167 else if (TYPE_CODE (type) == TYPE_CODE_FLT
168 && len == 16
169 && !tdep->soft_float
40a6adc1 170 && (gdbarch_long_double_format (gdbarch)
b14d30e1
JM
171 == floatformats_ibm_long_double))
172 {
173 /* IBM long double passed in two FP registers if
174 available, otherwise 8-byte aligned stack. */
175 if (freg <= 7)
176 {
177 if (write_pass)
178 {
b66f5587
SM
179 regcache->cooked_write (tdep->ppc_fp0_regnum + freg, val);
180 regcache->cooked_write (tdep->ppc_fp0_regnum + freg + 1,
181 val + 8);
b14d30e1
JM
182 }
183 freg += 2;
184 }
185 else
186 {
187 argoffset = align_up (argoffset, 8);
188 if (write_pass)
189 write_memory (sp + argoffset, val, len);
190 argoffset += 16;
191 }
192 }
55eddb0f
DJ
193 else if (len == 8
194 && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */
00fbcec4
JM
195 || TYPE_CODE (type) == TYPE_CODE_FLT /* double */
196 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
197 && tdep->soft_float)))
7b112f9c 198 {
00fbcec4
JM
199 /* "long long" or soft-float "double" or "_Decimal64"
200 passed in an odd/even register pair with the low
201 addressed word in the odd register and the high
202 addressed word in the even register, or when the
203 registers run out an 8 byte aligned stack
204 location. */
68856ea3
AC
205 if (greg > 9)
206 {
207 /* Just in case GREG was 10. */
208 greg = 11;
209 argoffset = align_up (argoffset, 8);
210 if (write_pass)
211 write_memory (sp + argoffset, val, len);
212 argoffset += 8;
213 }
68856ea3
AC
214 else
215 {
216 /* Must start on an odd register - r3/r4 etc. */
217 if ((greg & 1) == 0)
218 greg++;
219 if (write_pass)
220 {
b66f5587
SM
221 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 0,
222 val + 0);
223 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 1,
224 val + 4);
68856ea3
AC
225 }
226 greg += 2;
227 }
7b112f9c 228 }
00fbcec4
JM
229 else if (len == 16
230 && ((TYPE_CODE (type) == TYPE_CODE_FLT
231 && (gdbarch_long_double_format (gdbarch)
232 == floatformats_ibm_long_double))
233 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT
234 && tdep->soft_float)))
b14d30e1 235 {
00fbcec4
JM
236 /* Soft-float IBM long double or _Decimal128 passed in
237 four consecutive registers, or on the stack. The
238 registers are not necessarily odd/even pairs. */
b14d30e1
JM
239 if (greg > 7)
240 {
241 greg = 11;
242 argoffset = align_up (argoffset, 8);
243 if (write_pass)
244 write_memory (sp + argoffset, val, len);
245 argoffset += 16;
246 }
247 else
248 {
249 if (write_pass)
250 {
b66f5587
SM
251 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 0,
252 val + 0);
253 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 1,
254 val + 4);
255 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 2,
256 val + 8);
257 regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 3,
258 val + 12);
b14d30e1
JM
259 }
260 greg += 4;
261 }
262 }
1300a2f4
TJB
263 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len <= 8
264 && !tdep->soft_float)
265 {
266 /* 32-bit and 64-bit decimal floats go in f1 .. f8. They can
267 end up in memory. */
268
269 if (freg <= 8)
270 {
271 if (write_pass)
272 {
0f068fb5 273 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
1300a2f4
TJB
274 const gdb_byte *p;
275
276 /* 32-bit decimal floats are right aligned in the
277 doubleword. */
278 if (TYPE_LENGTH (type) == 4)
279 {
280 memcpy (regval + 4, val, 4);
281 p = regval;
282 }
283 else
284 p = val;
285
b66f5587 286 regcache->cooked_write (tdep->ppc_fp0_regnum + freg, p);
1300a2f4
TJB
287 }
288
289 freg++;
290 }
291 else
292 {
293 argoffset = align_up (argoffset, len);
294
295 if (write_pass)
296 /* Write value in the stack's parameter save area. */
297 write_memory (sp + argoffset, val, len);
298
299 argoffset += len;
300 }
301 }
302 else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len == 16
303 && !tdep->soft_float)
304 {
305 /* 128-bit decimal floats go in f2 .. f7, always in even/odd
306 pairs. They can end up in memory, using two doublewords. */
307
308 if (freg <= 6)
309 {
310 /* Make sure freg is even. */
311 freg += freg & 1;
312
313 if (write_pass)
314 {
b66f5587
SM
315 regcache->cooked_write (tdep->ppc_fp0_regnum + freg, val);
316 regcache->cooked_write (tdep->ppc_fp0_regnum + freg + 1,
317 val + 8);
1300a2f4
TJB
318 }
319 }
320 else
321 {
322 argoffset = align_up (argoffset, 8);
323
324 if (write_pass)
325 write_memory (sp + argoffset, val, 16);
326
327 argoffset += 16;
328 }
329
330 /* If a 128-bit decimal float goes to the stack because only f7
331 and f8 are free (thus there's no even/odd register pair
332 available), these registers should be marked as occupied.
333 Hence we increase freg even when writing to memory. */
334 freg += 2;
335 }
54fcddd0
UW
336 else if (len < 16
337 && TYPE_CODE (type) == TYPE_CODE_ARRAY
338 && TYPE_VECTOR (type)
339 && opencl_abi)
340 {
341 /* OpenCL vectors shorter than 16 bytes are passed as if
342 a series of independent scalars. */
343 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
344 int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
345
346 for (i = 0; i < nelt; i++)
347 {
348 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
349
350 if (TYPE_CODE (eltype) == TYPE_CODE_FLT && !tdep->soft_float)
351 {
352 if (freg <= 8)
353 {
354 if (write_pass)
355 {
356 int regnum = tdep->ppc_fp0_regnum + freg;
0f068fb5 357 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
54fcddd0
UW
358 struct type *regtype
359 = register_type (gdbarch, regnum);
3b2ca824
UW
360 target_float_convert (elval, eltype,
361 regval, regtype);
b66f5587 362 regcache->cooked_write (regnum, regval);
54fcddd0
UW
363 }
364 freg++;
365 }
366 else
367 {
368 argoffset = align_up (argoffset, len);
369 if (write_pass)
370 write_memory (sp + argoffset, val, len);
371 argoffset += len;
372 }
373 }
374 else if (TYPE_LENGTH (eltype) == 8)
375 {
376 if (greg > 9)
377 {
378 /* Just in case GREG was 10. */
379 greg = 11;
380 argoffset = align_up (argoffset, 8);
381 if (write_pass)
382 write_memory (sp + argoffset, elval,
383 TYPE_LENGTH (eltype));
384 argoffset += 8;
385 }
386 else
387 {
388 /* Must start on an odd register - r3/r4 etc. */
389 if ((greg & 1) == 0)
390 greg++;
391 if (write_pass)
392 {
393 int regnum = tdep->ppc_gp0_regnum + greg;
b66f5587
SM
394 regcache->cooked_write (regnum + 0, elval + 0);
395 regcache->cooked_write (regnum + 1, elval + 4);
54fcddd0
UW
396 }
397 greg += 2;
398 }
399 }
400 else
401 {
0f068fb5 402 gdb_byte word[PPC_MAX_REGISTER_SIZE];
54fcddd0
UW
403 store_unsigned_integer (word, tdep->wordsize, byte_order,
404 unpack_long (eltype, elval));
405
406 if (greg <= 10)
407 {
408 if (write_pass)
b66f5587
SM
409 regcache->cooked_write (tdep->ppc_gp0_regnum + greg,
410 word);
54fcddd0
UW
411 greg++;
412 }
413 else
414 {
415 argoffset = align_up (argoffset, tdep->wordsize);
416 if (write_pass)
417 write_memory (sp + argoffset, word, tdep->wordsize);
418 argoffset += tdep->wordsize;
419 }
420 }
421 }
422 }
423 else if (len >= 16
424 && TYPE_CODE (type) == TYPE_CODE_ARRAY
425 && TYPE_VECTOR (type)
426 && opencl_abi)
427 {
428 /* OpenCL vectors 16 bytes or longer are passed as if
429 a series of AltiVec vectors. */
430 int i;
431
432 for (i = 0; i < len / 16; i++)
433 {
434 const gdb_byte *elval = val + i * 16;
435
436 if (vreg <= 13)
437 {
438 if (write_pass)
b66f5587
SM
439 regcache->cooked_write (tdep->ppc_vr0_regnum + vreg,
440 elval);
54fcddd0
UW
441 vreg++;
442 }
443 else
444 {
445 argoffset = align_up (argoffset, 16);
446 if (write_pass)
447 write_memory (sp + argoffset, elval, 16);
448 argoffset += 16;
449 }
450 }
451 }
68856ea3
AC
452 else if (len == 16
453 && TYPE_CODE (type) == TYPE_CODE_ARRAY
55eddb0f
DJ
454 && TYPE_VECTOR (type)
455 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
7b112f9c 456 {
68856ea3 457 /* Vector parameter passed in an Altivec register, or
944fcfab 458 when that runs out, 16 byte aligned stack location. */
7b112f9c
JT
459 if (vreg <= 13)
460 {
68856ea3 461 if (write_pass)
b66f5587 462 regcache->cooked_write (tdep->ppc_vr0_regnum + vreg, val);
7b112f9c
JT
463 vreg++;
464 }
465 else
466 {
68856ea3
AC
467 argoffset = align_up (argoffset, 16);
468 if (write_pass)
469 write_memory (sp + argoffset, val, 16);
7b112f9c
JT
470 argoffset += 16;
471 }
472 }
944fcfab 473 else if (len == 8
0a613259 474 && TYPE_CODE (type) == TYPE_CODE_ARRAY
55eddb0f
DJ
475 && TYPE_VECTOR (type)
476 && tdep->vector_abi == POWERPC_VEC_SPE)
944fcfab 477 {
68856ea3 478 /* Vector parameter passed in an e500 register, or when
944fcfab
AC
479 that runs out, 8 byte aligned stack location. Note
480 that since e500 vector and general purpose registers
481 both map onto the same underlying register set, a
482 "greg" and not a "vreg" is consumed here. A cooked
483 write stores the value in the correct locations
484 within the raw register cache. */
485 if (greg <= 10)
486 {
68856ea3 487 if (write_pass)
b66f5587 488 regcache->cooked_write (tdep->ppc_ev0_regnum + greg, val);
944fcfab
AC
489 greg++;
490 }
491 else
492 {
68856ea3
AC
493 argoffset = align_up (argoffset, 8);
494 if (write_pass)
495 write_memory (sp + argoffset, val, 8);
944fcfab
AC
496 argoffset += 8;
497 }
498 }
68856ea3
AC
499 else
500 {
501 /* Reduce the parameter down to something that fits in a
944fcfab 502 "word". */
0f068fb5
AH
503 gdb_byte word[PPC_MAX_REGISTER_SIZE];
504 memset (word, 0, PPC_MAX_REGISTER_SIZE);
68856ea3
AC
505 if (len > tdep->wordsize
506 || TYPE_CODE (type) == TYPE_CODE_STRUCT
507 || TYPE_CODE (type) == TYPE_CODE_UNION)
508 {
55eddb0f 509 /* Structs and large values are put in an
0df8b418 510 aligned stack slot ... */
55eddb0f
DJ
511 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
512 && TYPE_VECTOR (type)
513 && len >= 16)
514 structoffset = align_up (structoffset, 16);
515 else
516 structoffset = align_up (structoffset, 8);
517
68856ea3
AC
518 if (write_pass)
519 write_memory (sp + structoffset, val, len);
520 /* ... and then a "word" pointing to that address is
944fcfab 521 passed as the parameter. */
e17a4113 522 store_unsigned_integer (word, tdep->wordsize, byte_order,
68856ea3
AC
523 sp + structoffset);
524 structoffset += len;
525 }
526 else if (TYPE_CODE (type) == TYPE_CODE_INT)
527 /* Sign or zero extend the "int" into a "word". */
e17a4113 528 store_unsigned_integer (word, tdep->wordsize, byte_order,
68856ea3
AC
529 unpack_long (type, val));
530 else
531 /* Always goes in the low address. */
532 memcpy (word, val, len);
533 /* Store that "word" in a register, or on the stack.
944fcfab 534 The words have "4" byte alignment. */
68856ea3
AC
535 if (greg <= 10)
536 {
537 if (write_pass)
b66f5587 538 regcache->cooked_write (tdep->ppc_gp0_regnum + greg, word);
68856ea3
AC
539 greg++;
540 }
541 else
542 {
543 argoffset = align_up (argoffset, tdep->wordsize);
544 if (write_pass)
545 write_memory (sp + argoffset, word, tdep->wordsize);
546 argoffset += tdep->wordsize;
547 }
548 }
549 }
550
551 /* Compute the actual stack space requirements. */
552 if (!write_pass)
553 {
554 /* Remember the amount of space needed by the arguments. */
555 argspace = argoffset;
556 /* Allocate space for both the arguments and the structures. */
557 sp -= (argoffset + structoffset);
558 /* Ensure that the stack is still 16 byte aligned. */
559 sp = align_down (sp, 16);
560 }
65ada037
MK
561
562 /* The psABI says that "A caller of a function that takes a
563 variable argument list shall set condition register bit 6 to
564 1 if it passes one or more arguments in the floating-point
0df8b418 565 registers. It is strongly recommended that the caller set the
65ada037
MK
566 bit to 0 otherwise..." Doing this for normal functions too
567 shouldn't hurt. */
568 if (write_pass)
569 {
570 ULONGEST cr;
571
572 regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
573 if (freg > 1)
574 cr |= 0x02000000;
575 else
576 cr &= ~0x02000000;
577 regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
578 }
7b112f9c
JT
579 }
580
68856ea3 581 /* Update %sp. */
40a6adc1 582 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
68856ea3
AC
583
584 /* Write the backchain (it occupies WORDSIZED bytes). */
e17a4113 585 write_memory_signed_integer (sp, tdep->wordsize, byte_order, saved_sp);
68856ea3 586
e56a0ecc
AC
587 /* Point the inferior function call's return address at the dummy's
588 breakpoint. */
68856ea3 589 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
e56a0ecc 590
7b112f9c
JT
591 return sp;
592}
593
e765b44c 594/* Handle the return-value conventions for Decimal Floating Point values. */
f486487f 595static enum return_value_convention
1300a2f4
TJB
596get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype,
597 struct regcache *regcache, gdb_byte *readbuf,
598 const gdb_byte *writebuf)
599{
600 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
601
602 gdb_assert (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT);
603
604 /* 32-bit and 64-bit decimal floats in f1. */
605 if (TYPE_LENGTH (valtype) <= 8)
606 {
607 if (writebuf != NULL)
608 {
0f068fb5 609 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
1300a2f4
TJB
610 const gdb_byte *p;
611
612 /* 32-bit decimal float is right aligned in the doubleword. */
613 if (TYPE_LENGTH (valtype) == 4)
614 {
615 memcpy (regval + 4, writebuf, 4);
616 p = regval;
617 }
618 else
619 p = writebuf;
620
b66f5587 621 regcache->cooked_write (tdep->ppc_fp0_regnum + 1, p);
1300a2f4
TJB
622 }
623 if (readbuf != NULL)
624 {
dca08e1f 625 regcache->cooked_read (tdep->ppc_fp0_regnum + 1, readbuf);
1300a2f4
TJB
626
627 /* Left align 32-bit decimal float. */
628 if (TYPE_LENGTH (valtype) == 4)
629 memcpy (readbuf, readbuf + 4, 4);
630 }
631 }
632 /* 128-bit decimal floats in f2,f3. */
633 else if (TYPE_LENGTH (valtype) == 16)
634 {
635 if (writebuf != NULL || readbuf != NULL)
636 {
637 int i;
638
639 for (i = 0; i < 2; i++)
640 {
641 if (writebuf != NULL)
b66f5587
SM
642 regcache->cooked_write (tdep->ppc_fp0_regnum + 2 + i,
643 writebuf + i * 8);
1300a2f4 644 if (readbuf != NULL)
dca08e1f
SM
645 regcache->cooked_read (tdep->ppc_fp0_regnum + 2 + i,
646 readbuf + i * 8);
1300a2f4
TJB
647 }
648 }
649 }
650 else
651 /* Can't happen. */
9b20d036 652 internal_error (__FILE__, __LINE__, _("Unknown decimal float size."));
1300a2f4
TJB
653
654 return RETURN_VALUE_REGISTER_CONVENTION;
655}
656
e754ae69
AC
657/* Handle the return-value conventions specified by the SysV 32-bit
658 PowerPC ABI (including all the supplements):
659
660 no floating-point: floating-point values returned using 32-bit
661 general-purpose registers.
662
663 Altivec: 128-bit vectors returned using vector registers.
664
665 e500: 64-bit vectors returned using the full full 64 bit EV
666 register, floating-point values returned using 32-bit
667 general-purpose registers.
668
669 GCC (broken): Small struct values right (instead of left) aligned
670 when returned in general-purpose registers. */
671
672static enum return_value_convention
54fcddd0
UW
673do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *func_type,
674 struct type *type, struct regcache *regcache,
675 gdb_byte *readbuf, const gdb_byte *writebuf,
676 int broken_gcc)
e754ae69 677{
05580c65 678 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 679 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
88aed45e 680 int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
54fcddd0 681
e754ae69 682 gdb_assert (tdep->wordsize == 4);
54fcddd0 683
e754ae69
AC
684 if (TYPE_CODE (type) == TYPE_CODE_FLT
685 && TYPE_LENGTH (type) <= 8
55eddb0f 686 && !tdep->soft_float)
e754ae69 687 {
963e2bb7 688 if (readbuf)
e754ae69
AC
689 {
690 /* Floats and doubles stored in "f1". Convert the value to
691 the required type. */
0f068fb5 692 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
366f009f
JB
693 struct type *regtype = register_type (gdbarch,
694 tdep->ppc_fp0_regnum + 1);
dca08e1f 695 regcache->cooked_read (tdep->ppc_fp0_regnum + 1, regval);
3b2ca824 696 target_float_convert (regval, regtype, readbuf, type);
e754ae69 697 }
963e2bb7 698 if (writebuf)
e754ae69
AC
699 {
700 /* Floats and doubles stored in "f1". Convert the value to
701 the register's "double" type. */
0f068fb5 702 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
366f009f 703 struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
3b2ca824 704 target_float_convert (writebuf, type, regval, regtype);
b66f5587 705 regcache->cooked_write (tdep->ppc_fp0_regnum + 1, regval);
e754ae69
AC
706 }
707 return RETURN_VALUE_REGISTER_CONVENTION;
708 }
b14d30e1
JM
709 if (TYPE_CODE (type) == TYPE_CODE_FLT
710 && TYPE_LENGTH (type) == 16
711 && !tdep->soft_float
0df8b418
MS
712 && (gdbarch_long_double_format (gdbarch)
713 == floatformats_ibm_long_double))
b14d30e1
JM
714 {
715 /* IBM long double stored in f1 and f2. */
716 if (readbuf)
717 {
dca08e1f
SM
718 regcache->cooked_read (tdep->ppc_fp0_regnum + 1, readbuf);
719 regcache->cooked_read (tdep->ppc_fp0_regnum + 2, readbuf + 8);
b14d30e1
JM
720 }
721 if (writebuf)
722 {
b66f5587
SM
723 regcache->cooked_write (tdep->ppc_fp0_regnum + 1, writebuf);
724 regcache->cooked_write (tdep->ppc_fp0_regnum + 2, writebuf + 8);
b14d30e1
JM
725 }
726 return RETURN_VALUE_REGISTER_CONVENTION;
727 }
00fbcec4
JM
728 if (TYPE_LENGTH (type) == 16
729 && ((TYPE_CODE (type) == TYPE_CODE_FLT
0df8b418
MS
730 && (gdbarch_long_double_format (gdbarch)
731 == floatformats_ibm_long_double))
00fbcec4 732 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && tdep->soft_float)))
b14d30e1 733 {
00fbcec4
JM
734 /* Soft-float IBM long double or _Decimal128 stored in r3, r4,
735 r5, r6. */
b14d30e1
JM
736 if (readbuf)
737 {
dca08e1f
SM
738 regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf);
739 regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4);
740 regcache->cooked_read (tdep->ppc_gp0_regnum + 5, readbuf + 8);
741 regcache->cooked_read (tdep->ppc_gp0_regnum + 6, readbuf + 12);
b14d30e1
JM
742 }
743 if (writebuf)
744 {
b66f5587
SM
745 regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf);
746 regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4);
747 regcache->cooked_write (tdep->ppc_gp0_regnum + 5, writebuf + 8);
748 regcache->cooked_write (tdep->ppc_gp0_regnum + 6, writebuf + 12);
b14d30e1
JM
749 }
750 return RETURN_VALUE_REGISTER_CONVENTION;
751 }
e754ae69 752 if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8)
00fbcec4
JM
753 || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)
754 || (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && TYPE_LENGTH (type) == 8
755 && tdep->soft_float))
e754ae69 756 {
963e2bb7 757 if (readbuf)
e754ae69 758 {
00fbcec4
JM
759 /* A long long, double or _Decimal64 stored in the 32 bit
760 r3/r4. */
dca08e1f
SM
761 regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf + 0);
762 regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4);
e754ae69 763 }
963e2bb7 764 if (writebuf)
e754ae69 765 {
00fbcec4
JM
766 /* A long long, double or _Decimal64 stored in the 32 bit
767 r3/r4. */
b66f5587
SM
768 regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf + 0);
769 regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4);
e754ae69
AC
770 }
771 return RETURN_VALUE_REGISTER_CONVENTION;
772 }
1300a2f4
TJB
773 if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && !tdep->soft_float)
774 return get_decimal_float_return_value (gdbarch, type, regcache, readbuf,
775 writebuf);
f0027ce2
DJ
776 else if ((TYPE_CODE (type) == TYPE_CODE_INT
777 || TYPE_CODE (type) == TYPE_CODE_CHAR
778 || TYPE_CODE (type) == TYPE_CODE_BOOL
779 || TYPE_CODE (type) == TYPE_CODE_PTR
aa006118 780 || TYPE_IS_REFERENCE (type)
f0027ce2
DJ
781 || TYPE_CODE (type) == TYPE_CODE_ENUM)
782 && TYPE_LENGTH (type) <= tdep->wordsize)
e754ae69 783 {
963e2bb7 784 if (readbuf)
e754ae69
AC
785 {
786 /* Some sort of integer stored in r3. Since TYPE isn't
787 bigger than the register, sign extension isn't a problem
788 - just do everything unsigned. */
789 ULONGEST regval;
790 regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
791 &regval);
e17a4113
UW
792 store_unsigned_integer (readbuf, TYPE_LENGTH (type), byte_order,
793 regval);
e754ae69 794 }
963e2bb7 795 if (writebuf)
e754ae69
AC
796 {
797 /* Some sort of integer stored in r3. Use unpack_long since
798 that should handle any required sign extension. */
799 regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
963e2bb7 800 unpack_long (type, writebuf));
e754ae69
AC
801 }
802 return RETURN_VALUE_REGISTER_CONVENTION;
803 }
54fcddd0
UW
804 /* OpenCL vectors < 16 bytes are returned as distinct
805 scalars in f1..f2 or r3..r10. */
806 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
807 && TYPE_VECTOR (type)
808 && TYPE_LENGTH (type) < 16
809 && opencl_abi)
810 {
811 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
812 int i, nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
813
814 for (i = 0; i < nelt; i++)
815 {
816 int offset = i * TYPE_LENGTH (eltype);
817
818 if (TYPE_CODE (eltype) == TYPE_CODE_FLT)
819 {
820 int regnum = tdep->ppc_fp0_regnum + 1 + i;
0f068fb5 821 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
54fcddd0
UW
822 struct type *regtype = register_type (gdbarch, regnum);
823
824 if (writebuf != NULL)
825 {
3b2ca824
UW
826 target_float_convert (writebuf + offset, eltype,
827 regval, regtype);
b66f5587 828 regcache->cooked_write (regnum, regval);
54fcddd0
UW
829 }
830 if (readbuf != NULL)
831 {
dca08e1f 832 regcache->cooked_read (regnum, regval);
3b2ca824
UW
833 target_float_convert (regval, regtype,
834 readbuf + offset, eltype);
54fcddd0
UW
835 }
836 }
837 else
838 {
839 int regnum = tdep->ppc_gp0_regnum + 3 + i;
840 ULONGEST regval;
841
842 if (writebuf != NULL)
843 {
844 regval = unpack_long (eltype, writebuf + offset);
845 regcache_cooked_write_unsigned (regcache, regnum, regval);
846 }
847 if (readbuf != NULL)
848 {
849 regcache_cooked_read_unsigned (regcache, regnum, &regval);
850 store_unsigned_integer (readbuf + offset,
851 TYPE_LENGTH (eltype), byte_order,
852 regval);
853 }
854 }
855 }
856
857 return RETURN_VALUE_REGISTER_CONVENTION;
858 }
859 /* OpenCL vectors >= 16 bytes are returned in v2..v9. */
860 if (TYPE_CODE (type) == TYPE_CODE_ARRAY
861 && TYPE_VECTOR (type)
862 && TYPE_LENGTH (type) >= 16
863 && opencl_abi)
864 {
865 int n_regs = TYPE_LENGTH (type) / 16;
866 int i;
867
868 for (i = 0; i < n_regs; i++)
869 {
870 int offset = i * 16;
871 int regnum = tdep->ppc_vr0_regnum + 2 + i;
872
873 if (writebuf != NULL)
b66f5587 874 regcache->cooked_write (regnum, writebuf + offset);
54fcddd0 875 if (readbuf != NULL)
dca08e1f 876 regcache->cooked_read (regnum, readbuf + offset);
54fcddd0
UW
877 }
878
879 return RETURN_VALUE_REGISTER_CONVENTION;
880 }
e754ae69
AC
881 if (TYPE_LENGTH (type) == 16
882 && TYPE_CODE (type) == TYPE_CODE_ARRAY
55eddb0f
DJ
883 && TYPE_VECTOR (type)
884 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
e754ae69 885 {
963e2bb7 886 if (readbuf)
e754ae69
AC
887 {
888 /* Altivec places the return value in "v2". */
dca08e1f 889 regcache->cooked_read (tdep->ppc_vr0_regnum + 2, readbuf);
e754ae69 890 }
963e2bb7 891 if (writebuf)
e754ae69
AC
892 {
893 /* Altivec places the return value in "v2". */
b66f5587 894 regcache->cooked_write (tdep->ppc_vr0_regnum + 2, writebuf);
e754ae69
AC
895 }
896 return RETURN_VALUE_REGISTER_CONVENTION;
897 }
55eddb0f
DJ
898 if (TYPE_LENGTH (type) == 16
899 && TYPE_CODE (type) == TYPE_CODE_ARRAY
900 && TYPE_VECTOR (type)
901 && tdep->vector_abi == POWERPC_VEC_GENERIC)
902 {
903 /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6.
904 GCC without AltiVec returns them in memory, but it warns about
905 ABI risks in that case; we don't try to support it. */
906 if (readbuf)
907 {
dca08e1f
SM
908 regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf + 0);
909 regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4);
910 regcache->cooked_read (tdep->ppc_gp0_regnum + 5, readbuf + 8);
911 regcache->cooked_read (tdep->ppc_gp0_regnum + 6, readbuf + 12);
55eddb0f
DJ
912 }
913 if (writebuf)
914 {
b66f5587
SM
915 regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf + 0);
916 regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4);
917 regcache->cooked_write (tdep->ppc_gp0_regnum + 5, writebuf + 8);
918 regcache->cooked_write (tdep->ppc_gp0_regnum + 6, writebuf + 12);
55eddb0f
DJ
919 }
920 return RETURN_VALUE_REGISTER_CONVENTION;
921 }
e754ae69
AC
922 if (TYPE_LENGTH (type) == 8
923 && TYPE_CODE (type) == TYPE_CODE_ARRAY
55eddb0f
DJ
924 && TYPE_VECTOR (type)
925 && tdep->vector_abi == POWERPC_VEC_SPE)
e754ae69
AC
926 {
927 /* The e500 ABI places return values for the 64-bit DSP types
928 (__ev64_opaque__) in r3. However, in GDB-speak, ev3
929 corresponds to the entire r3 value for e500, whereas GDB's r3
930 only corresponds to the least significant 32-bits. So place
931 the 64-bit DSP type's value in ev3. */
963e2bb7 932 if (readbuf)
dca08e1f 933 regcache->cooked_read (tdep->ppc_ev0_regnum + 3, readbuf);
963e2bb7 934 if (writebuf)
b66f5587 935 regcache->cooked_write (tdep->ppc_ev0_regnum + 3, writebuf);
e754ae69
AC
936 return RETURN_VALUE_REGISTER_CONVENTION;
937 }
938 if (broken_gcc && TYPE_LENGTH (type) <= 8)
939 {
61bf9ae0
MK
940 /* GCC screwed up for structures or unions whose size is less
941 than or equal to 8 bytes.. Instead of left-aligning, it
942 right-aligns the data into the buffer formed by r3, r4. */
0f068fb5 943 gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
61bf9ae0
MK
944 int len = TYPE_LENGTH (type);
945 int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
946
963e2bb7 947 if (readbuf)
e754ae69 948 {
dca08e1f
SM
949 regcache->cooked_read (tdep->ppc_gp0_regnum + 3,
950 regvals + 0 * tdep->wordsize);
61bf9ae0 951 if (len > tdep->wordsize)
dca08e1f
SM
952 regcache->cooked_read (tdep->ppc_gp0_regnum + 4,
953 regvals + 1 * tdep->wordsize);
61bf9ae0 954 memcpy (readbuf, regvals + offset, len);
e754ae69 955 }
963e2bb7 956 if (writebuf)
e754ae69 957 {
61bf9ae0
MK
958 memset (regvals, 0, sizeof regvals);
959 memcpy (regvals + offset, writebuf, len);
b66f5587
SM
960 regcache->cooked_write (tdep->ppc_gp0_regnum + 3,
961 regvals + 0 * tdep->wordsize);
61bf9ae0 962 if (len > tdep->wordsize)
b66f5587
SM
963 regcache->cooked_write (tdep->ppc_gp0_regnum + 4,
964 regvals + 1 * tdep->wordsize);
e754ae69 965 }
61bf9ae0 966
e754ae69
AC
967 return RETURN_VALUE_REGISTER_CONVENTION;
968 }
969 if (TYPE_LENGTH (type) <= 8)
970 {
963e2bb7 971 if (readbuf)
e754ae69
AC
972 {
973 /* This matches SVr4 PPC, it does not match GCC. */
974 /* The value is right-padded to 8 bytes and then loaded, as
975 two "words", into r3/r4. */
0f068fb5 976 gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
dca08e1f
SM
977 regcache->cooked_read (tdep->ppc_gp0_regnum + 3,
978 regvals + 0 * tdep->wordsize);
e754ae69 979 if (TYPE_LENGTH (type) > tdep->wordsize)
dca08e1f
SM
980 regcache->cooked_read (tdep->ppc_gp0_regnum + 4,
981 regvals + 1 * tdep->wordsize);
963e2bb7 982 memcpy (readbuf, regvals, TYPE_LENGTH (type));
e754ae69 983 }
963e2bb7 984 if (writebuf)
e754ae69
AC
985 {
986 /* This matches SVr4 PPC, it does not match GCC. */
987 /* The value is padded out to 8 bytes and then loaded, as
988 two "words" into r3/r4. */
0f068fb5 989 gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
e754ae69 990 memset (regvals, 0, sizeof regvals);
963e2bb7 991 memcpy (regvals, writebuf, TYPE_LENGTH (type));
b66f5587
SM
992 regcache->cooked_write (tdep->ppc_gp0_regnum + 3,
993 regvals + 0 * tdep->wordsize);
e754ae69 994 if (TYPE_LENGTH (type) > tdep->wordsize)
b66f5587
SM
995 regcache->cooked_write (tdep->ppc_gp0_regnum + 4,
996 regvals + 1 * tdep->wordsize);
e754ae69
AC
997 }
998 return RETURN_VALUE_REGISTER_CONVENTION;
999 }
1000 return RETURN_VALUE_STRUCT_CONVENTION;
1001}
1002
05580c65 1003enum return_value_convention
6a3a010b 1004ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
1005 struct type *valtype, struct regcache *regcache,
1006 gdb_byte *readbuf, const gdb_byte *writebuf)
e754ae69 1007{
6a3a010b
MR
1008 return do_ppc_sysv_return_value (gdbarch,
1009 function ? value_type (function) : NULL,
1010 valtype, regcache, readbuf, writebuf, 0);
e754ae69
AC
1011}
1012
05580c65 1013enum return_value_convention
963e2bb7 1014ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch,
6a3a010b 1015 struct value *function,
963e2bb7
AC
1016 struct type *valtype,
1017 struct regcache *regcache,
50fd1280 1018 gdb_byte *readbuf, const gdb_byte *writebuf)
e754ae69 1019{
6a3a010b
MR
1020 return do_ppc_sysv_return_value (gdbarch,
1021 function ? value_type (function) : NULL,
1022 valtype, regcache, readbuf, writebuf, 1);
944fcfab 1023}
afd48b75 1024
b6e1c027
AC
1025/* The helper function for 64-bit SYSV push_dummy_call. Converts the
1026 function's code address back into the function's descriptor
1027 address.
1028
1029 Find a value for the TOC register. Every symbol should have both
1030 ".FN" and "FN" in the minimal symbol table. "FN" points at the
1031 FN's descriptor, while ".FN" points at the entry point (which
1032 matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the
1033 FN's descriptor address (while at the same time being careful to
1034 find "FN" in the same object file as ".FN"). */
1035
1036static int
1037convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr)
1038{
1039 struct obj_section *dot_fn_section;
7cbd4a93 1040 struct bound_minimal_symbol dot_fn;
3b7344d5 1041 struct bound_minimal_symbol fn;
7cbd4a93 1042
b6e1c027
AC
1043 /* Find the minimal symbol that corresponds to CODE_ADDR (should
1044 have a name of the form ".FN"). */
1045 dot_fn = lookup_minimal_symbol_by_pc (code_addr);
c9d95fa3 1046 if (dot_fn.minsym == NULL || dot_fn.minsym->linkage_name ()[0] != '.')
b6e1c027
AC
1047 return 0;
1048 /* Get the section that contains CODE_ADDR. Need this for the
1049 "objfile" that it contains. */
1050 dot_fn_section = find_pc_section (code_addr);
1051 if (dot_fn_section == NULL || dot_fn_section->objfile == NULL)
1052 return 0;
1053 /* Now find the corresponding "FN" (dropping ".") minimal symbol's
1054 address. Only look for the minimal symbol in ".FN"'s object file
1055 - avoids problems when two object files (i.e., shared libraries)
1056 contain a minimal symbol with the same name. */
c9d95fa3 1057 fn = lookup_minimal_symbol (dot_fn.minsym->linkage_name () + 1, NULL,
b6e1c027 1058 dot_fn_section->objfile);
3b7344d5 1059 if (fn.minsym == NULL)
b6e1c027
AC
1060 return 0;
1061 /* Found a descriptor. */
77e371c0 1062 (*desc_addr) = BMSYMBOL_VALUE_ADDRESS (fn);
b6e1c027
AC
1063 return 1;
1064}
1065
cc0e89c5
UW
1066/* Walk down the type tree of TYPE counting consecutive base elements.
1067 If *FIELD_TYPE is NULL, then set it to the first valid floating point
1068 or vector type. If a non-floating point or vector type is found, or
1069 if a floating point or vector type that doesn't match a non-NULL
1070 *FIELD_TYPE is found, then return -1, otherwise return the count in the
1071 sub-tree. */
1072
1073static LONGEST
1074ppc64_aggregate_candidate (struct type *type,
1075 struct type **field_type)
1076{
1077 type = check_typedef (type);
1078
1079 switch (TYPE_CODE (type))
1080 {
1081 case TYPE_CODE_FLT:
1082 case TYPE_CODE_DECFLOAT:
1083 if (!*field_type)
1084 *field_type = type;
1085 if (TYPE_CODE (*field_type) == TYPE_CODE (type)
1086 && TYPE_LENGTH (*field_type) == TYPE_LENGTH (type))
1087 return 1;
1088 break;
1089
1090 case TYPE_CODE_COMPLEX:
1091 type = TYPE_TARGET_TYPE (type);
1092 if (TYPE_CODE (type) == TYPE_CODE_FLT
1093 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1094 {
1095 if (!*field_type)
1096 *field_type = type;
1097 if (TYPE_CODE (*field_type) == TYPE_CODE (type)
1098 && TYPE_LENGTH (*field_type) == TYPE_LENGTH (type))
1099 return 2;
1100 }
1101 break;
1102
1103 case TYPE_CODE_ARRAY:
1104 if (TYPE_VECTOR (type))
1105 {
1106 if (!*field_type)
1107 *field_type = type;
1108 if (TYPE_CODE (*field_type) == TYPE_CODE (type)
1109 && TYPE_LENGTH (*field_type) == TYPE_LENGTH (type))
1110 return 1;
1111 }
1112 else
1113 {
1114 LONGEST count, low_bound, high_bound;
1115
1116 count = ppc64_aggregate_candidate
1117 (TYPE_TARGET_TYPE (type), field_type);
1118 if (count == -1)
1119 return -1;
1120
1121 if (!get_array_bounds (type, &low_bound, &high_bound))
1122 return -1;
1123 count *= high_bound - low_bound;
1124
1125 /* There must be no padding. */
1126 if (count == 0)
1127 return TYPE_LENGTH (type) == 0 ? 0 : -1;
1128 else if (TYPE_LENGTH (type) != count * TYPE_LENGTH (*field_type))
1129 return -1;
1130
1131 return count;
1132 }
1133 break;
1134
1135 case TYPE_CODE_STRUCT:
1136 case TYPE_CODE_UNION:
1137 {
1138 LONGEST count = 0;
1139 int i;
1140
1141 for (i = 0; i < TYPE_NFIELDS (type); i++)
1142 {
1143 LONGEST sub_count;
1144
1145 if (field_is_static (&TYPE_FIELD (type, i)))
1146 continue;
1147
1148 sub_count = ppc64_aggregate_candidate
1149 (TYPE_FIELD_TYPE (type, i), field_type);
1150 if (sub_count == -1)
1151 return -1;
1152
1153 if (TYPE_CODE (type) == TYPE_CODE_STRUCT)
1154 count += sub_count;
1155 else
325fac50 1156 count = std::max (count, sub_count);
cc0e89c5
UW
1157 }
1158
1159 /* There must be no padding. */
1160 if (count == 0)
1161 return TYPE_LENGTH (type) == 0 ? 0 : -1;
1162 else if (TYPE_LENGTH (type) != count * TYPE_LENGTH (*field_type))
1163 return -1;
1164
1165 return count;
1166 }
1167 break;
1168
1169 default:
1170 break;
1171 }
1172
1173 return -1;
1174}
1175
1176/* If an argument of type TYPE is a homogeneous float or vector aggregate
1177 that shall be passed in FP/vector registers according to the ELFv2 ABI,
1178 return the homogeneous element type in *ELT_TYPE and the number of
1179 elements in *N_ELTS, and return non-zero. Otherwise, return zero. */
1180
1181static int
1182ppc64_elfv2_abi_homogeneous_aggregate (struct type *type,
1183 struct type **elt_type, int *n_elts)
1184{
1185 /* Complex types at the top level are treated separately. However,
1186 complex types can be elements of homogeneous aggregates. */
1187 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
1188 || TYPE_CODE (type) == TYPE_CODE_UNION
1189 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && !TYPE_VECTOR (type)))
1190 {
1191 struct type *field_type = NULL;
1192 LONGEST field_count = ppc64_aggregate_candidate (type, &field_type);
1193
1194 if (field_count > 0)
1195 {
1196 int n_regs = ((TYPE_CODE (field_type) == TYPE_CODE_FLT
1197 || TYPE_CODE (field_type) == TYPE_CODE_DECFLOAT)?
1198 (TYPE_LENGTH (field_type) + 7) >> 3 : 1);
1199
1200 /* The ELFv2 ABI allows homogeneous aggregates to occupy
1201 up to 8 registers. */
1202 if (field_count * n_regs <= 8)
1203 {
1204 if (elt_type)
1205 *elt_type = field_type;
1206 if (n_elts)
1207 *n_elts = (int) field_count;
1208 /* Note that field_count is LONGEST since it may hold the size
1209 of an array, while *n_elts is int since its value is bounded
1210 by the number of registers used for argument passing. The
1211 cast cannot overflow due to the bounds checking above. */
1212 return 1;
1213 }
1214 }
1215 }
1216
1217 return 0;
1218}
1219
e765b44c
UW
1220/* Structure holding the next argument position. */
1221struct ppc64_sysv_argpos
1222 {
1223 /* Register cache holding argument registers. If this is NULL,
1224 we only simulate argument processing without actually updating
1225 any registers or memory. */
1226 struct regcache *regcache;
1227 /* Next available general-purpose argument register. */
1228 int greg;
1229 /* Next available floating-point argument register. */
1230 int freg;
1231 /* Next available vector argument register. */
1232 int vreg;
1233 /* The address, at which the next general purpose parameter
1234 (integer, struct, float, vector, ...) should be saved. */
1235 CORE_ADDR gparam;
1236 /* The address, at which the next by-reference parameter
1237 (non-Altivec vector, variably-sized type) should be saved. */
1238 CORE_ADDR refparam;
1239 };
1240
1241/* VAL is a value of length LEN. Store it into the argument area on the
1242 stack and load it into the corresponding general-purpose registers
1243 required by the ABI, and update ARGPOS.
1244
1245 If ALIGN is nonzero, it specifies the minimum alignment required
1246 for the on-stack copy of the argument. */
d81e75c0 1247
e765b44c
UW
1248static void
1249ppc64_sysv_abi_push_val (struct gdbarch *gdbarch,
1250 const bfd_byte *val, int len, int align,
1251 struct ppc64_sysv_argpos *argpos)
1252{
1253 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1254 int offset = 0;
1255
1256 /* Enforce alignment of stack location, if requested. */
1257 if (align > tdep->wordsize)
1258 {
1259 CORE_ADDR aligned_gparam = align_up (argpos->gparam, align);
1260
1261 argpos->greg += (aligned_gparam - argpos->gparam) / tdep->wordsize;
1262 argpos->gparam = aligned_gparam;
1263 }
1264
1265 /* The ABI (version 1.9) specifies that values smaller than one
1266 doubleword are right-aligned and those larger are left-aligned.
1267 GCC versions before 3.4 implemented this incorrectly; see
1268 <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */
d63167af
UW
1269 if (len < tdep->wordsize
1270 && gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
e765b44c
UW
1271 offset = tdep->wordsize - len;
1272
1273 if (argpos->regcache)
1274 write_memory (argpos->gparam + offset, val, len);
1275 argpos->gparam = align_up (argpos->gparam + len, tdep->wordsize);
1276
1277 while (len >= tdep->wordsize)
1278 {
1279 if (argpos->regcache && argpos->greg <= 10)
b66f5587
SM
1280 argpos->regcache->cooked_write (tdep->ppc_gp0_regnum + argpos->greg,
1281 val);
e765b44c
UW
1282 argpos->greg++;
1283 len -= tdep->wordsize;
1284 val += tdep->wordsize;
1285 }
1286
1287 if (len > 0)
1288 {
1289 if (argpos->regcache && argpos->greg <= 10)
e4c4a59b
SM
1290 argpos->regcache->cooked_write_part
1291 (tdep->ppc_gp0_regnum + argpos->greg, offset, len, val);
e765b44c
UW
1292 argpos->greg++;
1293 }
1294}
1295
1296/* The same as ppc64_sysv_abi_push_val, but using a single-word integer
1297 value VAL as argument. */
d81e75c0
TD
1298
1299static void
e765b44c
UW
1300ppc64_sysv_abi_push_integer (struct gdbarch *gdbarch, ULONGEST val,
1301 struct ppc64_sysv_argpos *argpos)
d81e75c0 1302{
e765b44c
UW
1303 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1304 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
0f068fb5 1305 gdb_byte buf[PPC_MAX_REGISTER_SIZE];
d81e75c0 1306
e765b44c
UW
1307 if (argpos->regcache)
1308 store_unsigned_integer (buf, tdep->wordsize, byte_order, val);
1309 ppc64_sysv_abi_push_val (gdbarch, buf, tdep->wordsize, 0, argpos);
1310}
1311
1312/* VAL is a value of TYPE, a (binary or decimal) floating-point type.
1313 Load it into a floating-point register if required by the ABI,
1314 and update ARGPOS. */
1315
1316static void
1317ppc64_sysv_abi_push_freg (struct gdbarch *gdbarch,
1318 struct type *type, const bfd_byte *val,
1319 struct ppc64_sysv_argpos *argpos)
1320{
1321 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1322 if (tdep->soft_float)
1323 return;
1324
1325 if (TYPE_LENGTH (type) <= 8
1326 && TYPE_CODE (type) == TYPE_CODE_FLT)
d81e75c0 1327 {
e765b44c
UW
1328 /* Floats and doubles go in f1 .. f13. 32-bit floats are converted
1329 to double first. */
1330 if (argpos->regcache && argpos->freg <= 13)
1331 {
1332 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
1333 struct type *regtype = register_type (gdbarch, regnum);
0f068fb5 1334 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
d81e75c0 1335
3b2ca824 1336 target_float_convert (val, type, regval, regtype);
b66f5587 1337 argpos->regcache->cooked_write (regnum, regval);
e765b44c 1338 }
d81e75c0 1339
e765b44c
UW
1340 argpos->freg++;
1341 }
1342 else if (TYPE_LENGTH (type) <= 8
1343 && TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1344 {
1345 /* Floats and doubles go in f1 .. f13. 32-bit decimal floats are
1346 placed in the least significant word. */
1347 if (argpos->regcache && argpos->freg <= 13)
1348 {
1349 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
5b757e5d
UW
1350 int offset = 0;
1351
1352 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1353 offset = 8 - TYPE_LENGTH (type);
d81e75c0 1354
e4c4a59b
SM
1355 argpos->regcache->cooked_write_part (regnum, offset,
1356 TYPE_LENGTH (type), val);
e765b44c 1357 }
d81e75c0 1358
e765b44c
UW
1359 argpos->freg++;
1360 }
1361 else if (TYPE_LENGTH (type) == 16
1362 && TYPE_CODE (type) == TYPE_CODE_FLT
1363 && (gdbarch_long_double_format (gdbarch)
1364 == floatformats_ibm_long_double))
1365 {
1366 /* IBM long double stored in two consecutive FPRs. */
1367 if (argpos->regcache && argpos->freg <= 13)
d81e75c0 1368 {
e765b44c
UW
1369 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
1370
b66f5587 1371 argpos->regcache->cooked_write (regnum, val);
e765b44c 1372 if (argpos->freg <= 12)
b66f5587 1373 argpos->regcache->cooked_write (regnum + 1, val + 8);
d81e75c0 1374 }
d81e75c0 1375
e765b44c
UW
1376 argpos->freg += 2;
1377 }
1378 else if (TYPE_LENGTH (type) == 16
1379 && TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1380 {
1381 /* 128-bit decimal floating-point values are stored in and even/odd
1382 pair of FPRs, with the even FPR holding the most significant half. */
1383 argpos->freg += argpos->freg & 1;
d81e75c0 1384
e765b44c 1385 if (argpos->regcache && argpos->freg <= 12)
d81e75c0 1386 {
e765b44c 1387 int regnum = tdep->ppc_fp0_regnum + argpos->freg;
0ff3e01f
UW
1388 int lopart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 8 : 0;
1389 int hipart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 0 : 8;
d81e75c0 1390
b66f5587
SM
1391 argpos->regcache->cooked_write (regnum, val + hipart);
1392 argpos->regcache->cooked_write (regnum + 1, val + lopart);
d81e75c0 1393 }
e765b44c
UW
1394
1395 argpos->freg += 2;
d81e75c0 1396 }
e765b44c
UW
1397}
1398
1399/* VAL is a value of AltiVec vector type. Load it into a vector register
1400 if required by the ABI, and update ARGPOS. */
1401
1402static void
1403ppc64_sysv_abi_push_vreg (struct gdbarch *gdbarch, const bfd_byte *val,
1404 struct ppc64_sysv_argpos *argpos)
1405{
1406 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1407
1408 if (argpos->regcache && argpos->vreg <= 13)
b66f5587 1409 argpos->regcache->cooked_write (tdep->ppc_vr0_regnum + argpos->vreg, val);
e765b44c
UW
1410
1411 argpos->vreg++;
1412}
1413
1414/* VAL is a value of TYPE. Load it into memory and/or registers
1415 as required by the ABI, and update ARGPOS. */
1416
1417static void
1418ppc64_sysv_abi_push_param (struct gdbarch *gdbarch,
1419 struct type *type, const bfd_byte *val,
1420 struct ppc64_sysv_argpos *argpos)
1421{
1422 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1423
1424 if (TYPE_CODE (type) == TYPE_CODE_FLT
1425 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
1426 {
1427 /* Floating-point scalars are passed in floating-point registers. */
1428 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 0, argpos);
1429 ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos);
1430 }
1431 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)
1432 && tdep->vector_abi == POWERPC_VEC_ALTIVEC
1433 && TYPE_LENGTH (type) == 16)
1434 {
1435 /* AltiVec vectors are passed aligned, and in vector registers. */
1436 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 16, argpos);
1437 ppc64_sysv_abi_push_vreg (gdbarch, val, argpos);
1438 }
1439 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)
1440 && TYPE_LENGTH (type) >= 16)
d81e75c0 1441 {
e765b44c
UW
1442 /* Non-Altivec vectors are passed by reference. */
1443
1444 /* Copy value onto the stack ... */
1445 CORE_ADDR addr = align_up (argpos->refparam, 16);
1446 if (argpos->regcache)
1447 write_memory (addr, val, TYPE_LENGTH (type));
1448 argpos->refparam = align_up (addr + TYPE_LENGTH (type), tdep->wordsize);
1449
1450 /* ... and pass a pointer to the copy as parameter. */
1451 ppc64_sysv_abi_push_integer (gdbarch, addr, argpos);
1452 }
1453 else if ((TYPE_CODE (type) == TYPE_CODE_INT
1454 || TYPE_CODE (type) == TYPE_CODE_ENUM
1455 || TYPE_CODE (type) == TYPE_CODE_BOOL
1456 || TYPE_CODE (type) == TYPE_CODE_CHAR
1457 || TYPE_CODE (type) == TYPE_CODE_PTR
aa006118 1458 || TYPE_IS_REFERENCE (type))
e765b44c
UW
1459 && TYPE_LENGTH (type) <= tdep->wordsize)
1460 {
1461 ULONGEST word = 0;
1462
1463 if (argpos->regcache)
d81e75c0 1464 {
e765b44c
UW
1465 /* Sign extend the value, then store it unsigned. */
1466 word = unpack_long (type, val);
1467
1468 /* Convert any function code addresses into descriptors. */
d4094b6a
UW
1469 if (tdep->elf_abi == POWERPC_ELF_V1
1470 && (TYPE_CODE (type) == TYPE_CODE_PTR
1471 || TYPE_CODE (type) == TYPE_CODE_REF))
e765b44c
UW
1472 {
1473 struct type *target_type
1474 = check_typedef (TYPE_TARGET_TYPE (type));
1475
1476 if (TYPE_CODE (target_type) == TYPE_CODE_FUNC
1477 || TYPE_CODE (target_type) == TYPE_CODE_METHOD)
1478 {
1479 CORE_ADDR desc = word;
1480
1481 convert_code_addr_to_desc_addr (word, &desc);
1482 word = desc;
1483 }
1484 }
d81e75c0 1485 }
e765b44c
UW
1486
1487 ppc64_sysv_abi_push_integer (gdbarch, word, argpos);
1488 }
1489 else
1490 {
1491 ppc64_sysv_abi_push_val (gdbarch, val, TYPE_LENGTH (type), 0, argpos);
1492
1493 /* The ABI (version 1.9) specifies that structs containing a
1494 single floating-point value, at any level of nesting of
1495 single-member structs, are passed in floating-point registers. */
1496 if (TYPE_CODE (type) == TYPE_CODE_STRUCT
1497 && TYPE_NFIELDS (type) == 1)
d81e75c0 1498 {
e765b44c
UW
1499 while (TYPE_CODE (type) == TYPE_CODE_STRUCT
1500 && TYPE_NFIELDS (type) == 1)
1501 type = check_typedef (TYPE_FIELD_TYPE (type, 0));
1502
1503 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1504 ppc64_sysv_abi_push_freg (gdbarch, type, val, argpos);
d81e75c0 1505 }
cc0e89c5
UW
1506
1507 /* In the ELFv2 ABI, homogeneous floating-point or vector
1508 aggregates are passed in a series of registers. */
1509 if (tdep->elf_abi == POWERPC_ELF_V2)
1510 {
1511 struct type *eltype;
1512 int i, nelt;
1513
1514 if (ppc64_elfv2_abi_homogeneous_aggregate (type, &eltype, &nelt))
1515 for (i = 0; i < nelt; i++)
1516 {
1517 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
1518
1519 if (TYPE_CODE (eltype) == TYPE_CODE_FLT
1520 || TYPE_CODE (eltype) == TYPE_CODE_DECFLOAT)
1521 ppc64_sysv_abi_push_freg (gdbarch, eltype, elval, argpos);
1522 else if (TYPE_CODE (eltype) == TYPE_CODE_ARRAY
1523 && TYPE_VECTOR (eltype)
1524 && tdep->vector_abi == POWERPC_VEC_ALTIVEC
1525 && TYPE_LENGTH (eltype) == 16)
1526 ppc64_sysv_abi_push_vreg (gdbarch, elval, argpos);
1527 }
1528 }
d81e75c0
TD
1529 }
1530}
1531
0df8b418 1532/* Pass the arguments in either registers, or in the stack. Using the
8be9034a
AC
1533 ppc 64 bit SysV ABI.
1534
1535 This implements a dumbed down version of the ABI. It always writes
1536 values to memory, GPR and FPR, even when not necessary. Doing this
0df8b418 1537 greatly simplifies the logic. */
8be9034a
AC
1538
1539CORE_ADDR
0df8b418
MS
1540ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch,
1541 struct value *function,
8be9034a
AC
1542 struct regcache *regcache, CORE_ADDR bp_addr,
1543 int nargs, struct value **args, CORE_ADDR sp,
cf84fa6b
AH
1544 function_call_return_method return_method,
1545 CORE_ADDR struct_addr)
8be9034a 1546{
7d9b040b 1547 CORE_ADDR func_addr = find_function_addr (function, NULL);
40a6adc1 1548 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 1549 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
88aed45e 1550 int opencl_abi = ppc_sysv_use_opencl_abi (value_type (function));
fb4443d8 1551 ULONGEST back_chain;
8be9034a
AC
1552 /* See for-loop comment below. */
1553 int write_pass;
24e9cda0
UW
1554 /* Size of the by-reference parameter copy region, the final value is
1555 computed in the for-loop below. */
1556 LONGEST refparam_size = 0;
8be9034a
AC
1557 /* Size of the general parameter region, the final value is computed
1558 in the for-loop below. */
1559 LONGEST gparam_size = 0;
1560 /* Kevin writes ... I don't mind seeing tdep->wordsize used in the
0df8b418 1561 calls to align_up(), align_down(), etc. because this makes it
8be9034a
AC
1562 easier to reuse this code (in a copy/paste sense) in the future,
1563 but it is a 64-bit ABI and asserting that the wordsize is 8 bytes
1564 at some point makes it easier to verify that this function is
1565 correct without having to do a non-local analysis to figure out
1566 the possible values of tdep->wordsize. */
1567 gdb_assert (tdep->wordsize == 8);
1568
55eddb0f
DJ
1569 /* This function exists to support a calling convention that
1570 requires floating-point registers. It shouldn't be used on
1571 processors that lack them. */
1572 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1573
fb4443d8
UW
1574 /* By this stage in the proceedings, SP has been decremented by "red
1575 zone size" + "struct return size". Fetch the stack-pointer from
1576 before this and use that as the BACK_CHAIN. */
40a6adc1 1577 regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
3e8c568d 1578 &back_chain);
fb4443d8 1579
8be9034a
AC
1580 /* Go through the argument list twice.
1581
1582 Pass 1: Compute the function call's stack space and register
1583 requirements.
1584
1585 Pass 2: Replay the same computation but this time also write the
1586 values out to the target. */
1587
1588 for (write_pass = 0; write_pass < 2; write_pass++)
1589 {
1590 int argno;
e765b44c
UW
1591
1592 struct ppc64_sysv_argpos argpos;
1593 argpos.greg = 3;
1594 argpos.freg = 1;
1595 argpos.vreg = 2;
8be9034a
AC
1596
1597 if (!write_pass)
1598 {
24e9cda0
UW
1599 /* During the first pass, GPARAM and REFPARAM are more like
1600 offsets (start address zero) than addresses. That way
1601 they accumulate the total stack space each region
1602 requires. */
e765b44c
UW
1603 argpos.regcache = NULL;
1604 argpos.gparam = 0;
1605 argpos.refparam = 0;
8be9034a
AC
1606 }
1607 else
1608 {
24e9cda0
UW
1609 /* Decrement the stack pointer making space for the Altivec
1610 and general on-stack parameters. Set refparam and gparam
1611 to their corresponding regions. */
e765b44c
UW
1612 argpos.regcache = regcache;
1613 argpos.refparam = align_down (sp - refparam_size, 16);
1614 argpos.gparam = align_down (argpos.refparam - gparam_size, 16);
52f548e4
UW
1615 /* Add in space for the TOC, link editor double word (v1 only),
1616 compiler double word (v1 only), LR save area, CR save area,
1617 and backchain. */
1618 if (tdep->elf_abi == POWERPC_ELF_V1)
1619 sp = align_down (argpos.gparam - 48, 16);
1620 else
1621 sp = align_down (argpos.gparam - 32, 16);
8be9034a
AC
1622 }
1623
1624 /* If the function is returning a `struct', then there is an
1625 extra hidden parameter (which will be passed in r3)
1626 containing the address of that struct.. In that case we
1627 should advance one word and start from r4 register to copy
1628 parameters. This also consumes one on-stack parameter slot. */
cf84fa6b 1629 if (return_method == return_method_struct)
e765b44c 1630 ppc64_sysv_abi_push_integer (gdbarch, struct_addr, &argpos);
8be9034a
AC
1631
1632 for (argno = 0; argno < nargs; argno++)
1633 {
1634 struct value *arg = args[argno];
df407dfe 1635 struct type *type = check_typedef (value_type (arg));
0fd88904 1636 const bfd_byte *val = value_contents (arg);
ce0451ad 1637
e765b44c 1638 if (TYPE_CODE (type) == TYPE_CODE_COMPLEX)
8be9034a 1639 {
e765b44c
UW
1640 /* Complex types are passed as if two independent scalars. */
1641 struct type *eltype = check_typedef (TYPE_TARGET_TYPE (type));
1300a2f4 1642
e765b44c
UW
1643 ppc64_sysv_abi_push_param (gdbarch, eltype, val, &argpos);
1644 ppc64_sysv_abi_push_param (gdbarch, eltype,
1645 val + TYPE_LENGTH (eltype), &argpos);
1300a2f4 1646 }
e765b44c 1647 else if (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)
54fcddd0
UW
1648 && opencl_abi)
1649 {
1650 /* OpenCL vectors shorter than 16 bytes are passed as if
e765b44c
UW
1651 a series of independent scalars; OpenCL vectors 16 bytes
1652 or longer are passed as if a series of AltiVec vectors. */
1653 struct type *eltype;
1654 int i, nelt;
54fcddd0 1655
e765b44c
UW
1656 if (TYPE_LENGTH (type) < 16)
1657 eltype = check_typedef (TYPE_TARGET_TYPE (type));
1658 else
1659 eltype = register_type (gdbarch, tdep->ppc_vr0_regnum);
1660
1661 nelt = TYPE_LENGTH (type) / TYPE_LENGTH (eltype);
54fcddd0
UW
1662 for (i = 0; i < nelt; i++)
1663 {
1664 const gdb_byte *elval = val + i * TYPE_LENGTH (eltype);
1665
e765b44c 1666 ppc64_sysv_abi_push_param (gdbarch, eltype, elval, &argpos);
8be9034a 1667 }
8be9034a
AC
1668 }
1669 else
1670 {
e765b44c
UW
1671 /* All other types are passed as single arguments. */
1672 ppc64_sysv_abi_push_param (gdbarch, type, val, &argpos);
8be9034a
AC
1673 }
1674 }
1675
1676 if (!write_pass)
1677 {
24e9cda0 1678 /* Save the true region sizes ready for the second pass. */
e765b44c 1679 refparam_size = argpos.refparam;
24e9cda0 1680 /* Make certain that the general parameter save area is at
8be9034a 1681 least the minimum 8 registers (or doublewords) in size. */
e765b44c 1682 if (argpos.greg < 8)
8be9034a
AC
1683 gparam_size = 8 * tdep->wordsize;
1684 else
e765b44c 1685 gparam_size = argpos.gparam;
8be9034a
AC
1686 }
1687 }
1688
1689 /* Update %sp. */
40a6adc1 1690 regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
8be9034a
AC
1691
1692 /* Write the backchain (it occupies WORDSIZED bytes). */
e17a4113 1693 write_memory_signed_integer (sp, tdep->wordsize, byte_order, back_chain);
8be9034a
AC
1694
1695 /* Point the inferior function call's return address at the dummy's
1696 breakpoint. */
1697 regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
1698
d4094b6a
UW
1699 /* In the ELFv1 ABI, use the func_addr to find the descriptor, and use
1700 that to find the TOC. If we're calling via a function pointer,
1701 the pointer itself identifies the descriptor. */
1702 if (tdep->elf_abi == POWERPC_ELF_V1)
1703 {
1704 struct type *ftype = check_typedef (value_type (function));
1705 CORE_ADDR desc_addr = value_as_address (function);
1706
1707 if (TYPE_CODE (ftype) == TYPE_CODE_PTR
1708 || convert_code_addr_to_desc_addr (func_addr, &desc_addr))
1709 {
1710 /* The TOC is the second double word in the descriptor. */
1711 CORE_ADDR toc =
1712 read_memory_unsigned_integer (desc_addr + tdep->wordsize,
1713 tdep->wordsize, byte_order);
1714
1715 regcache_cooked_write_unsigned (regcache,
1716 tdep->ppc_gp0_regnum + 2, toc);
1717 }
1718 }
1719
1720 /* In the ELFv2 ABI, we need to pass the target address in r12 since
1721 we may be calling a global entry point. */
1722 if (tdep->elf_abi == POWERPC_ELF_V2)
1723 regcache_cooked_write_unsigned (regcache,
1724 tdep->ppc_gp0_regnum + 12, func_addr);
8be9034a
AC
1725
1726 return sp;
1727}
1728
e765b44c
UW
1729/* Subroutine of ppc64_sysv_abi_return_value that handles "base" types:
1730 integer, floating-point, and AltiVec vector types.
afd48b75 1731
e765b44c
UW
1732 This routine also handles components of aggregate return types;
1733 INDEX describes which part of the aggregate is to be handled.
afd48b75 1734
e765b44c
UW
1735 Returns true if VALTYPE is some such base type that could be handled,
1736 false otherwise. */
1737static int
1738ppc64_sysv_abi_return_value_base (struct gdbarch *gdbarch, struct type *valtype,
1739 struct regcache *regcache, gdb_byte *readbuf,
1740 const gdb_byte *writebuf, int index)
afd48b75 1741{
05580c65 1742 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
16796152 1743
e765b44c 1744 /* Integers live in GPRs starting at r3. */
b6e1c027 1745 if ((TYPE_CODE (valtype) == TYPE_CODE_INT
93d4208d
UW
1746 || TYPE_CODE (valtype) == TYPE_CODE_ENUM
1747 || TYPE_CODE (valtype) == TYPE_CODE_CHAR
1748 || TYPE_CODE (valtype) == TYPE_CODE_BOOL)
b6e1c027 1749 && TYPE_LENGTH (valtype) <= 8)
afd48b75 1750 {
e765b44c
UW
1751 int regnum = tdep->ppc_gp0_regnum + 3 + index;
1752
963e2bb7 1753 if (writebuf != NULL)
afd48b75
AC
1754 {
1755 /* Be careful to sign extend the value. */
e765b44c 1756 regcache_cooked_write_unsigned (regcache, regnum,
963e2bb7 1757 unpack_long (valtype, writebuf));
afd48b75 1758 }
963e2bb7 1759 if (readbuf != NULL)
afd48b75 1760 {
e765b44c 1761 /* Extract the integer from GPR. Since this is truncating the
afd48b75
AC
1762 value, there isn't a sign extension problem. */
1763 ULONGEST regval;
e765b44c
UW
1764
1765 regcache_cooked_read_unsigned (regcache, regnum, &regval);
1766 store_unsigned_integer (readbuf, TYPE_LENGTH (valtype),
1767 gdbarch_byte_order (gdbarch), regval);
afd48b75 1768 }
e765b44c 1769 return 1;
afd48b75 1770 }
e765b44c
UW
1771
1772 /* Floats and doubles go in f1 .. f13. 32-bit floats are converted
1773 to double first. */
1774 if (TYPE_LENGTH (valtype) <= 8
1775 && TYPE_CODE (valtype) == TYPE_CODE_FLT)
afd48b75 1776 {
e765b44c
UW
1777 int regnum = tdep->ppc_fp0_regnum + 1 + index;
1778 struct type *regtype = register_type (gdbarch, regnum);
0f068fb5 1779 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
e765b44c 1780
963e2bb7 1781 if (writebuf != NULL)
e765b44c 1782 {
3b2ca824 1783 target_float_convert (writebuf, valtype, regval, regtype);
b66f5587 1784 regcache->cooked_write (regnum, regval);
e765b44c 1785 }
963e2bb7 1786 if (readbuf != NULL)
e765b44c 1787 {
dca08e1f 1788 regcache->cooked_read (regnum, regval);
3b2ca824 1789 target_float_convert (regval, regtype, readbuf, valtype);
e765b44c
UW
1790 }
1791 return 1;
afd48b75 1792 }
54fcddd0 1793
e765b44c
UW
1794 /* Floats and doubles go in f1 .. f13. 32-bit decimal floats are
1795 placed in the least significant word. */
1796 if (TYPE_LENGTH (valtype) <= 8
1797 && TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
1798 {
1799 int regnum = tdep->ppc_fp0_regnum + 1 + index;
5b757e5d
UW
1800 int offset = 0;
1801
1802 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1803 offset = 8 - TYPE_LENGTH (valtype);
54fcddd0 1804
e765b44c 1805 if (writebuf != NULL)
e4c4a59b
SM
1806 regcache->cooked_write_part (regnum, offset, TYPE_LENGTH (valtype),
1807 writebuf);
e765b44c 1808 if (readbuf != NULL)
73bb0000
SM
1809 regcache->cooked_read_part (regnum, offset, TYPE_LENGTH (valtype),
1810 readbuf);
e765b44c
UW
1811 return 1;
1812 }
54fcddd0 1813
e765b44c
UW
1814 /* IBM long double stored in two consecutive FPRs. */
1815 if (TYPE_LENGTH (valtype) == 16
1816 && TYPE_CODE (valtype) == TYPE_CODE_FLT
1817 && (gdbarch_long_double_format (gdbarch)
1818 == floatformats_ibm_long_double))
1819 {
1820 int regnum = tdep->ppc_fp0_regnum + 1 + 2 * index;
54fcddd0 1821
e765b44c
UW
1822 if (writebuf != NULL)
1823 {
b66f5587
SM
1824 regcache->cooked_write (regnum, writebuf);
1825 regcache->cooked_write (regnum + 1, writebuf + 8);
54fcddd0 1826 }
e765b44c
UW
1827 if (readbuf != NULL)
1828 {
dca08e1f
SM
1829 regcache->cooked_read (regnum, readbuf);
1830 regcache->cooked_read (regnum + 1, readbuf + 8);
e765b44c
UW
1831 }
1832 return 1;
54fcddd0 1833 }
e765b44c
UW
1834
1835 /* 128-bit decimal floating-point values are stored in an even/odd
1836 pair of FPRs, with the even FPR holding the most significant half. */
1837 if (TYPE_LENGTH (valtype) == 16
1838 && TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT)
54fcddd0 1839 {
e765b44c 1840 int regnum = tdep->ppc_fp0_regnum + 2 + 2 * index;
0ff3e01f
UW
1841 int lopart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 8 : 0;
1842 int hipart = gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG ? 0 : 8;
54fcddd0 1843
e765b44c 1844 if (writebuf != NULL)
54fcddd0 1845 {
b66f5587
SM
1846 regcache->cooked_write (regnum, writebuf + hipart);
1847 regcache->cooked_write (regnum + 1, writebuf + lopart);
54fcddd0 1848 }
e765b44c
UW
1849 if (readbuf != NULL)
1850 {
dca08e1f
SM
1851 regcache->cooked_read (regnum, readbuf + hipart);
1852 regcache->cooked_read (regnum + 1, readbuf + lopart);
e765b44c
UW
1853 }
1854 return 1;
54fcddd0 1855 }
e765b44c
UW
1856
1857 /* AltiVec vectors are returned in VRs starting at v2. */
a1da2672
UW
1858 if (TYPE_LENGTH (valtype) == 16
1859 && TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype)
e765b44c 1860 && tdep->vector_abi == POWERPC_VEC_ALTIVEC)
afd48b75 1861 {
e765b44c
UW
1862 int regnum = tdep->ppc_vr0_regnum + 2 + index;
1863
1864 if (writebuf != NULL)
b66f5587 1865 regcache->cooked_write (regnum, writebuf);
e765b44c 1866 if (readbuf != NULL)
dca08e1f 1867 regcache->cooked_read (regnum, readbuf);
e765b44c 1868 return 1;
afd48b75 1869 }
e765b44c 1870
a1da2672
UW
1871 /* Short vectors are returned in GPRs starting at r3. */
1872 if (TYPE_LENGTH (valtype) <= 8
1873 && TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype))
1874 {
1875 int regnum = tdep->ppc_gp0_regnum + 3 + index;
1876 int offset = 0;
1877
1878 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
1879 offset = 8 - TYPE_LENGTH (valtype);
1880
1881 if (writebuf != NULL)
e4c4a59b
SM
1882 regcache->cooked_write_part (regnum, offset, TYPE_LENGTH (valtype),
1883 writebuf);
a1da2672 1884 if (readbuf != NULL)
73bb0000
SM
1885 regcache->cooked_read_part (regnum, offset, TYPE_LENGTH (valtype),
1886 readbuf);
a1da2672
UW
1887 return 1;
1888 }
1889
e765b44c
UW
1890 return 0;
1891}
1892
1893/* The 64 bit ABI return value convention.
1894
1895 Return non-zero if the return-value is stored in a register, return
1896 0 if the return-value is instead stored on the stack (a.k.a.,
1897 struct return convention).
1898
1899 For a return-value stored in a register: when WRITEBUF is non-NULL,
1900 copy the buffer to the corresponding register return-value location
1901 location; when READBUF is non-NULL, fill the buffer from the
1902 corresponding register return-value location. */
1903enum return_value_convention
1904ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct value *function,
1905 struct type *valtype, struct regcache *regcache,
1906 gdb_byte *readbuf, const gdb_byte *writebuf)
1907{
1908 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1909 struct type *func_type = function ? value_type (function) : NULL;
1910 int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
1911 struct type *eltype;
b926417a 1912 int nelt, ok;
e765b44c
UW
1913
1914 /* This function exists to support a calling convention that
1915 requires floating-point registers. It shouldn't be used on
1916 processors that lack them. */
1917 gdb_assert (ppc_floating_point_unit_p (gdbarch));
1918
1919 /* Complex types are returned as if two independent scalars. */
1920 if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX)
afd48b75 1921 {
e765b44c
UW
1922 eltype = check_typedef (TYPE_TARGET_TYPE (valtype));
1923
b926417a 1924 for (int i = 0; i < 2; i++)
afd48b75 1925 {
e765b44c
UW
1926 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
1927 readbuf, writebuf, i);
1928 gdb_assert (ok);
1929
1930 if (readbuf)
1931 readbuf += TYPE_LENGTH (eltype);
1932 if (writebuf)
1933 writebuf += TYPE_LENGTH (eltype);
afd48b75
AC
1934 }
1935 return RETURN_VALUE_REGISTER_CONVENTION;
1936 }
e765b44c
UW
1937
1938 /* OpenCL vectors shorter than 16 bytes are returned as if
1939 a series of independent scalars; OpenCL vectors 16 bytes
1940 or longer are returned as if a series of AltiVec vectors. */
1941 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY && TYPE_VECTOR (valtype)
1942 && opencl_abi)
afd48b75 1943 {
e765b44c
UW
1944 if (TYPE_LENGTH (valtype) < 16)
1945 eltype = check_typedef (TYPE_TARGET_TYPE (valtype));
1946 else
1947 eltype = register_type (gdbarch, tdep->ppc_vr0_regnum);
1948
1949 nelt = TYPE_LENGTH (valtype) / TYPE_LENGTH (eltype);
b926417a 1950 for (int i = 0; i < nelt; i++)
afd48b75 1951 {
e765b44c
UW
1952 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
1953 readbuf, writebuf, i);
1954 gdb_assert (ok);
1955
1956 if (readbuf)
1957 readbuf += TYPE_LENGTH (eltype);
1958 if (writebuf)
1959 writebuf += TYPE_LENGTH (eltype);
afd48b75
AC
1960 }
1961 return RETURN_VALUE_REGISTER_CONVENTION;
1962 }
e765b44c
UW
1963
1964 /* All pointers live in r3. */
aa006118 1965 if (TYPE_CODE (valtype) == TYPE_CODE_PTR || TYPE_IS_REFERENCE (valtype))
afd48b75 1966 {
e765b44c
UW
1967 int regnum = tdep->ppc_gp0_regnum + 3;
1968
1969 if (writebuf != NULL)
b66f5587 1970 regcache->cooked_write (regnum, writebuf);
e765b44c 1971 if (readbuf != NULL)
dca08e1f 1972 regcache->cooked_read (regnum, readbuf);
afd48b75
AC
1973 return RETURN_VALUE_REGISTER_CONVENTION;
1974 }
e765b44c
UW
1975
1976 /* Small character arrays are returned, right justified, in r3. */
1977 if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
a1da2672 1978 && !TYPE_VECTOR (valtype)
e765b44c
UW
1979 && TYPE_LENGTH (valtype) <= 8
1980 && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT
1981 && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1)
1982 {
1983 int regnum = tdep->ppc_gp0_regnum + 3;
1984 int offset = (register_size (gdbarch, regnum) - TYPE_LENGTH (valtype));
1985
1986 if (writebuf != NULL)
e4c4a59b
SM
1987 regcache->cooked_write_part (regnum, offset, TYPE_LENGTH (valtype),
1988 writebuf);
e765b44c 1989 if (readbuf != NULL)
73bb0000
SM
1990 regcache->cooked_read_part (regnum, offset, TYPE_LENGTH (valtype),
1991 readbuf);
e765b44c
UW
1992 return RETURN_VALUE_REGISTER_CONVENTION;
1993 }
1994
cc0e89c5
UW
1995 /* In the ELFv2 ABI, homogeneous floating-point or vector
1996 aggregates are returned in registers. */
1997 if (tdep->elf_abi == POWERPC_ELF_V2
a1da2672
UW
1998 && ppc64_elfv2_abi_homogeneous_aggregate (valtype, &eltype, &nelt)
1999 && (TYPE_CODE (eltype) == TYPE_CODE_FLT
2000 || TYPE_CODE (eltype) == TYPE_CODE_DECFLOAT
2001 || (TYPE_CODE (eltype) == TYPE_CODE_ARRAY
2002 && TYPE_VECTOR (eltype)
2003 && tdep->vector_abi == POWERPC_VEC_ALTIVEC
2004 && TYPE_LENGTH (eltype) == 16)))
cc0e89c5 2005 {
b926417a 2006 for (int i = 0; i < nelt; i++)
cc0e89c5
UW
2007 {
2008 ok = ppc64_sysv_abi_return_value_base (gdbarch, eltype, regcache,
2009 readbuf, writebuf, i);
2010 gdb_assert (ok);
2011
2012 if (readbuf)
2013 readbuf += TYPE_LENGTH (eltype);
2014 if (writebuf)
2015 writebuf += TYPE_LENGTH (eltype);
2016 }
2017
2018 return RETURN_VALUE_REGISTER_CONVENTION;
2019 }
2020
2021 /* In the ELFv2 ABI, aggregate types of up to 16 bytes are
2022 returned in registers r3:r4. */
2023 if (tdep->elf_abi == POWERPC_ELF_V2
2024 && TYPE_LENGTH (valtype) <= 16
2025 && (TYPE_CODE (valtype) == TYPE_CODE_STRUCT
2026 || TYPE_CODE (valtype) == TYPE_CODE_UNION
2027 || (TYPE_CODE (valtype) == TYPE_CODE_ARRAY
2028 && !TYPE_VECTOR (valtype))))
2029 {
2030 int n_regs = ((TYPE_LENGTH (valtype) + tdep->wordsize - 1)
2031 / tdep->wordsize);
cc0e89c5 2032
b926417a 2033 for (int i = 0; i < n_regs; i++)
cc0e89c5 2034 {
0f068fb5 2035 gdb_byte regval[PPC_MAX_REGISTER_SIZE];
cc0e89c5
UW
2036 int regnum = tdep->ppc_gp0_regnum + 3 + i;
2037 int offset = i * tdep->wordsize;
2038 int len = TYPE_LENGTH (valtype) - offset;
2039
2040 if (len > tdep->wordsize)
2041 len = tdep->wordsize;
2042
2043 if (writebuf != NULL)
2044 {
2045 memset (regval, 0, sizeof regval);
2046 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
2047 && offset == 0)
2048 memcpy (regval + tdep->wordsize - len, writebuf, len);
2049 else
2050 memcpy (regval, writebuf + offset, len);
b66f5587 2051 regcache->cooked_write (regnum, regval);
cc0e89c5
UW
2052 }
2053 if (readbuf != NULL)
2054 {
dca08e1f 2055 regcache->cooked_read (regnum, regval);
cc0e89c5
UW
2056 if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG
2057 && offset == 0)
2058 memcpy (readbuf, regval + tdep->wordsize - len, len);
2059 else
2060 memcpy (readbuf + offset, regval, len);
2061 }
2062 }
2063 return RETURN_VALUE_REGISTER_CONVENTION;
2064 }
2065
e765b44c
UW
2066 /* Handle plain base types. */
2067 if (ppc64_sysv_abi_return_value_base (gdbarch, valtype, regcache,
2068 readbuf, writebuf, 0))
2069 return RETURN_VALUE_REGISTER_CONVENTION;
2070
afd48b75
AC
2071 return RETURN_VALUE_STRUCT_CONVENTION;
2072}
2073
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