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7b112f9c JT |
1 | /* Target-dependent code for PowerPC systems using the SVR4 ABI |
2 | for GDB, the GNU debugger. | |
3 | ||
9b254dd1 | 4 | Copyright (C) 2000, 2001, 2002, 2003, 2005, 2007, 2008 |
65ada037 | 5 | Free Software Foundation, Inc. |
7b112f9c JT |
6 | |
7 | This file is part of GDB. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 11 | the Free Software Foundation; either version 3 of the License, or |
7b112f9c JT |
12 | (at your option) any later version. |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
7b112f9c JT |
21 | |
22 | #include "defs.h" | |
23 | #include "gdbcore.h" | |
24 | #include "inferior.h" | |
25 | #include "regcache.h" | |
26 | #include "value.h" | |
bdf64bac | 27 | #include "gdb_string.h" |
8be9034a | 28 | #include "gdb_assert.h" |
7b112f9c | 29 | #include "ppc-tdep.h" |
6066c3de | 30 | #include "target.h" |
0a90bcdd | 31 | #include "objfiles.h" |
7d9b040b | 32 | #include "infcall.h" |
7b112f9c | 33 | |
7b112f9c JT |
34 | /* Pass the arguments in either registers, or in the stack. Using the |
35 | ppc sysv ABI, the first eight words of the argument list (that might | |
36 | be less than eight parameters if some parameters occupy more than one | |
37 | word) are passed in r3..r10 registers. float and double parameters are | |
38 | passed in fpr's, in addition to that. Rest of the parameters if any | |
39 | are passed in user stack. | |
40 | ||
41 | If the function is returning a structure, then the return address is passed | |
42 | in r3, then the first 7 words of the parametes can be passed in registers, | |
43 | starting from r4. */ | |
44 | ||
45 | CORE_ADDR | |
7d9b040b | 46 | ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
77b2b6d4 AC |
47 | struct regcache *regcache, CORE_ADDR bp_addr, |
48 | int nargs, struct value **args, CORE_ADDR sp, | |
49 | int struct_return, CORE_ADDR struct_addr) | |
7b112f9c | 50 | { |
40a6adc1 | 51 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
fb4443d8 | 52 | ULONGEST saved_sp; |
68856ea3 AC |
53 | int argspace = 0; /* 0 is an initial wrong guess. */ |
54 | int write_pass; | |
7b112f9c | 55 | |
b14d30e1 JM |
56 | gdb_assert (tdep->wordsize == 4); |
57 | ||
40a6adc1 | 58 | regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch), |
3e8c568d | 59 | &saved_sp); |
fb4443d8 | 60 | |
68856ea3 | 61 | /* Go through the argument list twice. |
7b112f9c | 62 | |
68856ea3 AC |
63 | Pass 1: Figure out how much new stack space is required for |
64 | arguments and pushed values. Unlike the PowerOpen ABI, the SysV | |
65 | ABI doesn't reserve any extra space for parameters which are put | |
66 | in registers, but does always push structures and then pass their | |
67 | address. | |
7a41266b | 68 | |
68856ea3 AC |
69 | Pass 2: Replay the same computation but this time also write the |
70 | values out to the target. */ | |
7b112f9c | 71 | |
68856ea3 AC |
72 | for (write_pass = 0; write_pass < 2; write_pass++) |
73 | { | |
74 | int argno; | |
75 | /* Next available floating point register for float and double | |
76 | arguments. */ | |
77 | int freg = 1; | |
78 | /* Next available general register for non-float, non-vector | |
79 | arguments. */ | |
80 | int greg = 3; | |
81 | /* Next available vector register for vector arguments. */ | |
82 | int vreg = 2; | |
83 | /* Arguments start above the "LR save word" and "Back chain". */ | |
84 | int argoffset = 2 * tdep->wordsize; | |
85 | /* Structures start after the arguments. */ | |
86 | int structoffset = argoffset + argspace; | |
87 | ||
88 | /* If the function is returning a `struct', then the first word | |
944fcfab AC |
89 | (which will be passed in r3) is used for struct return |
90 | address. In that case we should advance one word and start | |
91 | from r4 register to copy parameters. */ | |
68856ea3 | 92 | if (struct_return) |
7b112f9c | 93 | { |
68856ea3 AC |
94 | if (write_pass) |
95 | regcache_cooked_write_signed (regcache, | |
96 | tdep->ppc_gp0_regnum + greg, | |
97 | struct_addr); | |
98 | greg++; | |
7b112f9c | 99 | } |
68856ea3 AC |
100 | |
101 | for (argno = 0; argno < nargs; argno++) | |
7b112f9c | 102 | { |
68856ea3 | 103 | struct value *arg = args[argno]; |
df407dfe | 104 | struct type *type = check_typedef (value_type (arg)); |
68856ea3 | 105 | int len = TYPE_LENGTH (type); |
0fd88904 | 106 | const bfd_byte *val = value_contents (arg); |
68856ea3 | 107 | |
55eddb0f DJ |
108 | if (TYPE_CODE (type) == TYPE_CODE_FLT && len <= 8 |
109 | && !tdep->soft_float) | |
7b112f9c | 110 | { |
68856ea3 | 111 | /* Floating point value converted to "double" then |
944fcfab AC |
112 | passed in an FP register, when the registers run out, |
113 | 8 byte aligned stack is used. */ | |
68856ea3 AC |
114 | if (freg <= 8) |
115 | { | |
116 | if (write_pass) | |
117 | { | |
118 | /* Always store the floating point value using | |
944fcfab | 119 | the register's floating-point format. */ |
50fd1280 | 120 | gdb_byte regval[MAX_REGISTER_SIZE]; |
68856ea3 | 121 | struct type *regtype |
366f009f | 122 | = register_type (gdbarch, tdep->ppc_fp0_regnum + freg); |
68856ea3 | 123 | convert_typed_floating (val, type, regval, regtype); |
366f009f JB |
124 | regcache_cooked_write (regcache, |
125 | tdep->ppc_fp0_regnum + freg, | |
68856ea3 AC |
126 | regval); |
127 | } | |
128 | freg++; | |
129 | } | |
7b112f9c JT |
130 | else |
131 | { | |
68856ea3 | 132 | /* SysV ABI converts floats to doubles before |
944fcfab | 133 | writing them to an 8 byte aligned stack location. */ |
68856ea3 AC |
134 | argoffset = align_up (argoffset, 8); |
135 | if (write_pass) | |
136 | { | |
137 | char memval[8]; | |
8da61cc4 DJ |
138 | convert_typed_floating (val, type, memval, |
139 | builtin_type_ieee_double); | |
68856ea3 AC |
140 | write_memory (sp + argoffset, val, len); |
141 | } | |
142 | argoffset += 8; | |
7b112f9c JT |
143 | } |
144 | } | |
b14d30e1 JM |
145 | else if (TYPE_CODE (type) == TYPE_CODE_FLT |
146 | && len == 16 | |
147 | && !tdep->soft_float | |
40a6adc1 | 148 | && (gdbarch_long_double_format (gdbarch) |
b14d30e1 JM |
149 | == floatformats_ibm_long_double)) |
150 | { | |
151 | /* IBM long double passed in two FP registers if | |
152 | available, otherwise 8-byte aligned stack. */ | |
153 | if (freg <= 7) | |
154 | { | |
155 | if (write_pass) | |
156 | { | |
157 | regcache_cooked_write (regcache, | |
158 | tdep->ppc_fp0_regnum + freg, | |
159 | val); | |
160 | regcache_cooked_write (regcache, | |
161 | tdep->ppc_fp0_regnum + freg + 1, | |
162 | val + 8); | |
163 | } | |
164 | freg += 2; | |
165 | } | |
166 | else | |
167 | { | |
168 | argoffset = align_up (argoffset, 8); | |
169 | if (write_pass) | |
170 | write_memory (sp + argoffset, val, len); | |
171 | argoffset += 16; | |
172 | } | |
173 | } | |
55eddb0f DJ |
174 | else if (len == 8 |
175 | && (TYPE_CODE (type) == TYPE_CODE_INT /* long long */ | |
176 | || TYPE_CODE (type) == TYPE_CODE_FLT)) /* double */ | |
7b112f9c | 177 | { |
55eddb0f | 178 | /* "long long" or soft-float "double" passed in an odd/even |
944fcfab AC |
179 | register pair with the low addressed word in the odd |
180 | register and the high addressed word in the even | |
181 | register, or when the registers run out an 8 byte | |
182 | aligned stack location. */ | |
68856ea3 AC |
183 | if (greg > 9) |
184 | { | |
185 | /* Just in case GREG was 10. */ | |
186 | greg = 11; | |
187 | argoffset = align_up (argoffset, 8); | |
188 | if (write_pass) | |
189 | write_memory (sp + argoffset, val, len); | |
190 | argoffset += 8; | |
191 | } | |
68856ea3 AC |
192 | else |
193 | { | |
194 | /* Must start on an odd register - r3/r4 etc. */ | |
195 | if ((greg & 1) == 0) | |
196 | greg++; | |
197 | if (write_pass) | |
198 | { | |
199 | regcache_cooked_write (regcache, | |
200 | tdep->ppc_gp0_regnum + greg + 0, | |
201 | val + 0); | |
202 | regcache_cooked_write (regcache, | |
203 | tdep->ppc_gp0_regnum + greg + 1, | |
204 | val + 4); | |
205 | } | |
206 | greg += 2; | |
207 | } | |
7b112f9c | 208 | } |
b14d30e1 | 209 | else if (len == 16 && TYPE_CODE (type) == TYPE_CODE_FLT |
40a6adc1 | 210 | && (gdbarch_long_double_format (gdbarch) |
b14d30e1 JM |
211 | == floatformats_ibm_long_double)) |
212 | { | |
213 | /* Soft-float IBM long double passed in four consecutive | |
214 | registers, or on the stack. The registers are not | |
215 | necessarily odd/even pairs. */ | |
216 | if (greg > 7) | |
217 | { | |
218 | greg = 11; | |
219 | argoffset = align_up (argoffset, 8); | |
220 | if (write_pass) | |
221 | write_memory (sp + argoffset, val, len); | |
222 | argoffset += 16; | |
223 | } | |
224 | else | |
225 | { | |
226 | if (write_pass) | |
227 | { | |
228 | regcache_cooked_write (regcache, | |
229 | tdep->ppc_gp0_regnum + greg + 0, | |
230 | val + 0); | |
231 | regcache_cooked_write (regcache, | |
232 | tdep->ppc_gp0_regnum + greg + 1, | |
233 | val + 4); | |
234 | regcache_cooked_write (regcache, | |
235 | tdep->ppc_gp0_regnum + greg + 2, | |
236 | val + 8); | |
237 | regcache_cooked_write (regcache, | |
238 | tdep->ppc_gp0_regnum + greg + 3, | |
239 | val + 12); | |
240 | } | |
241 | greg += 4; | |
242 | } | |
243 | } | |
1300a2f4 TJB |
244 | else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len <= 8 |
245 | && !tdep->soft_float) | |
246 | { | |
247 | /* 32-bit and 64-bit decimal floats go in f1 .. f8. They can | |
248 | end up in memory. */ | |
249 | ||
250 | if (freg <= 8) | |
251 | { | |
252 | if (write_pass) | |
253 | { | |
254 | gdb_byte regval[MAX_REGISTER_SIZE]; | |
255 | const gdb_byte *p; | |
256 | ||
257 | /* 32-bit decimal floats are right aligned in the | |
258 | doubleword. */ | |
259 | if (TYPE_LENGTH (type) == 4) | |
260 | { | |
261 | memcpy (regval + 4, val, 4); | |
262 | p = regval; | |
263 | } | |
264 | else | |
265 | p = val; | |
266 | ||
267 | regcache_cooked_write (regcache, | |
268 | tdep->ppc_fp0_regnum + freg, p); | |
269 | } | |
270 | ||
271 | freg++; | |
272 | } | |
273 | else | |
274 | { | |
275 | argoffset = align_up (argoffset, len); | |
276 | ||
277 | if (write_pass) | |
278 | /* Write value in the stack's parameter save area. */ | |
279 | write_memory (sp + argoffset, val, len); | |
280 | ||
281 | argoffset += len; | |
282 | } | |
283 | } | |
284 | else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && len == 16 | |
285 | && !tdep->soft_float) | |
286 | { | |
287 | /* 128-bit decimal floats go in f2 .. f7, always in even/odd | |
288 | pairs. They can end up in memory, using two doublewords. */ | |
289 | ||
290 | if (freg <= 6) | |
291 | { | |
292 | /* Make sure freg is even. */ | |
293 | freg += freg & 1; | |
294 | ||
295 | if (write_pass) | |
296 | { | |
297 | regcache_cooked_write (regcache, | |
298 | tdep->ppc_fp0_regnum + freg, val); | |
299 | regcache_cooked_write (regcache, | |
300 | tdep->ppc_fp0_regnum + freg + 1, val + 8); | |
301 | } | |
302 | } | |
303 | else | |
304 | { | |
305 | argoffset = align_up (argoffset, 8); | |
306 | ||
307 | if (write_pass) | |
308 | write_memory (sp + argoffset, val, 16); | |
309 | ||
310 | argoffset += 16; | |
311 | } | |
312 | ||
313 | /* If a 128-bit decimal float goes to the stack because only f7 | |
314 | and f8 are free (thus there's no even/odd register pair | |
315 | available), these registers should be marked as occupied. | |
316 | Hence we increase freg even when writing to memory. */ | |
317 | freg += 2; | |
318 | } | |
68856ea3 AC |
319 | else if (len == 16 |
320 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
55eddb0f DJ |
321 | && TYPE_VECTOR (type) |
322 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC) | |
7b112f9c | 323 | { |
68856ea3 | 324 | /* Vector parameter passed in an Altivec register, or |
944fcfab | 325 | when that runs out, 16 byte aligned stack location. */ |
7b112f9c JT |
326 | if (vreg <= 13) |
327 | { | |
68856ea3 | 328 | if (write_pass) |
9c9acae0 | 329 | regcache_cooked_write (regcache, |
944fcfab | 330 | tdep->ppc_vr0_regnum + vreg, val); |
7b112f9c JT |
331 | vreg++; |
332 | } | |
333 | else | |
334 | { | |
68856ea3 AC |
335 | argoffset = align_up (argoffset, 16); |
336 | if (write_pass) | |
337 | write_memory (sp + argoffset, val, 16); | |
7b112f9c JT |
338 | argoffset += 16; |
339 | } | |
340 | } | |
944fcfab | 341 | else if (len == 8 |
0a613259 | 342 | && TYPE_CODE (type) == TYPE_CODE_ARRAY |
55eddb0f DJ |
343 | && TYPE_VECTOR (type) |
344 | && tdep->vector_abi == POWERPC_VEC_SPE) | |
944fcfab | 345 | { |
68856ea3 | 346 | /* Vector parameter passed in an e500 register, or when |
944fcfab AC |
347 | that runs out, 8 byte aligned stack location. Note |
348 | that since e500 vector and general purpose registers | |
349 | both map onto the same underlying register set, a | |
350 | "greg" and not a "vreg" is consumed here. A cooked | |
351 | write stores the value in the correct locations | |
352 | within the raw register cache. */ | |
353 | if (greg <= 10) | |
354 | { | |
68856ea3 | 355 | if (write_pass) |
9c9acae0 | 356 | regcache_cooked_write (regcache, |
944fcfab AC |
357 | tdep->ppc_ev0_regnum + greg, val); |
358 | greg++; | |
359 | } | |
360 | else | |
361 | { | |
68856ea3 AC |
362 | argoffset = align_up (argoffset, 8); |
363 | if (write_pass) | |
364 | write_memory (sp + argoffset, val, 8); | |
944fcfab AC |
365 | argoffset += 8; |
366 | } | |
367 | } | |
68856ea3 AC |
368 | else |
369 | { | |
370 | /* Reduce the parameter down to something that fits in a | |
944fcfab | 371 | "word". */ |
50fd1280 | 372 | gdb_byte word[MAX_REGISTER_SIZE]; |
68856ea3 AC |
373 | memset (word, 0, MAX_REGISTER_SIZE); |
374 | if (len > tdep->wordsize | |
375 | || TYPE_CODE (type) == TYPE_CODE_STRUCT | |
376 | || TYPE_CODE (type) == TYPE_CODE_UNION) | |
377 | { | |
55eddb0f DJ |
378 | /* Structs and large values are put in an |
379 | aligned stack slot ... */ | |
380 | if (TYPE_CODE (type) == TYPE_CODE_ARRAY | |
381 | && TYPE_VECTOR (type) | |
382 | && len >= 16) | |
383 | structoffset = align_up (structoffset, 16); | |
384 | else | |
385 | structoffset = align_up (structoffset, 8); | |
386 | ||
68856ea3 AC |
387 | if (write_pass) |
388 | write_memory (sp + structoffset, val, len); | |
389 | /* ... and then a "word" pointing to that address is | |
944fcfab | 390 | passed as the parameter. */ |
68856ea3 AC |
391 | store_unsigned_integer (word, tdep->wordsize, |
392 | sp + structoffset); | |
393 | structoffset += len; | |
394 | } | |
395 | else if (TYPE_CODE (type) == TYPE_CODE_INT) | |
396 | /* Sign or zero extend the "int" into a "word". */ | |
397 | store_unsigned_integer (word, tdep->wordsize, | |
398 | unpack_long (type, val)); | |
399 | else | |
400 | /* Always goes in the low address. */ | |
401 | memcpy (word, val, len); | |
402 | /* Store that "word" in a register, or on the stack. | |
944fcfab | 403 | The words have "4" byte alignment. */ |
68856ea3 AC |
404 | if (greg <= 10) |
405 | { | |
406 | if (write_pass) | |
407 | regcache_cooked_write (regcache, | |
944fcfab | 408 | tdep->ppc_gp0_regnum + greg, word); |
68856ea3 AC |
409 | greg++; |
410 | } | |
411 | else | |
412 | { | |
413 | argoffset = align_up (argoffset, tdep->wordsize); | |
414 | if (write_pass) | |
415 | write_memory (sp + argoffset, word, tdep->wordsize); | |
416 | argoffset += tdep->wordsize; | |
417 | } | |
418 | } | |
419 | } | |
420 | ||
421 | /* Compute the actual stack space requirements. */ | |
422 | if (!write_pass) | |
423 | { | |
424 | /* Remember the amount of space needed by the arguments. */ | |
425 | argspace = argoffset; | |
426 | /* Allocate space for both the arguments and the structures. */ | |
427 | sp -= (argoffset + structoffset); | |
428 | /* Ensure that the stack is still 16 byte aligned. */ | |
429 | sp = align_down (sp, 16); | |
430 | } | |
65ada037 MK |
431 | |
432 | /* The psABI says that "A caller of a function that takes a | |
433 | variable argument list shall set condition register bit 6 to | |
434 | 1 if it passes one or more arguments in the floating-point | |
435 | registers. It is strongly recommended that the caller set the | |
436 | bit to 0 otherwise..." Doing this for normal functions too | |
437 | shouldn't hurt. */ | |
438 | if (write_pass) | |
439 | { | |
440 | ULONGEST cr; | |
441 | ||
442 | regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr); | |
443 | if (freg > 1) | |
444 | cr |= 0x02000000; | |
445 | else | |
446 | cr &= ~0x02000000; | |
447 | regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr); | |
448 | } | |
7b112f9c JT |
449 | } |
450 | ||
68856ea3 | 451 | /* Update %sp. */ |
40a6adc1 | 452 | regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp); |
68856ea3 AC |
453 | |
454 | /* Write the backchain (it occupies WORDSIZED bytes). */ | |
455 | write_memory_signed_integer (sp, tdep->wordsize, saved_sp); | |
456 | ||
e56a0ecc AC |
457 | /* Point the inferior function call's return address at the dummy's |
458 | breakpoint. */ | |
68856ea3 | 459 | regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); |
e56a0ecc | 460 | |
7b112f9c JT |
461 | return sp; |
462 | } | |
463 | ||
1300a2f4 TJB |
464 | /* Handle the return-value conventions for Decimal Floating Point values |
465 | in both ppc32 and ppc64, which are the same. */ | |
466 | static int | |
467 | get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype, | |
468 | struct regcache *regcache, gdb_byte *readbuf, | |
469 | const gdb_byte *writebuf) | |
470 | { | |
471 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
472 | ||
473 | gdb_assert (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT); | |
474 | ||
475 | /* 32-bit and 64-bit decimal floats in f1. */ | |
476 | if (TYPE_LENGTH (valtype) <= 8) | |
477 | { | |
478 | if (writebuf != NULL) | |
479 | { | |
480 | gdb_byte regval[MAX_REGISTER_SIZE]; | |
481 | const gdb_byte *p; | |
482 | ||
483 | /* 32-bit decimal float is right aligned in the doubleword. */ | |
484 | if (TYPE_LENGTH (valtype) == 4) | |
485 | { | |
486 | memcpy (regval + 4, writebuf, 4); | |
487 | p = regval; | |
488 | } | |
489 | else | |
490 | p = writebuf; | |
491 | ||
492 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, p); | |
493 | } | |
494 | if (readbuf != NULL) | |
495 | { | |
496 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf); | |
497 | ||
498 | /* Left align 32-bit decimal float. */ | |
499 | if (TYPE_LENGTH (valtype) == 4) | |
500 | memcpy (readbuf, readbuf + 4, 4); | |
501 | } | |
502 | } | |
503 | /* 128-bit decimal floats in f2,f3. */ | |
504 | else if (TYPE_LENGTH (valtype) == 16) | |
505 | { | |
506 | if (writebuf != NULL || readbuf != NULL) | |
507 | { | |
508 | int i; | |
509 | ||
510 | for (i = 0; i < 2; i++) | |
511 | { | |
512 | if (writebuf != NULL) | |
513 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2 + i, | |
514 | writebuf + i * 8); | |
515 | if (readbuf != NULL) | |
516 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2 + i, | |
517 | readbuf + i * 8); | |
518 | } | |
519 | } | |
520 | } | |
521 | else | |
522 | /* Can't happen. */ | |
523 | internal_error (__FILE__, __LINE__, "Unknown decimal float size."); | |
524 | ||
525 | return RETURN_VALUE_REGISTER_CONVENTION; | |
526 | } | |
527 | ||
e754ae69 AC |
528 | /* Handle the return-value conventions specified by the SysV 32-bit |
529 | PowerPC ABI (including all the supplements): | |
530 | ||
531 | no floating-point: floating-point values returned using 32-bit | |
532 | general-purpose registers. | |
533 | ||
534 | Altivec: 128-bit vectors returned using vector registers. | |
535 | ||
536 | e500: 64-bit vectors returned using the full full 64 bit EV | |
537 | register, floating-point values returned using 32-bit | |
538 | general-purpose registers. | |
539 | ||
540 | GCC (broken): Small struct values right (instead of left) aligned | |
541 | when returned in general-purpose registers. */ | |
542 | ||
543 | static enum return_value_convention | |
05580c65 | 544 | do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *type, |
55eddb0f DJ |
545 | struct regcache *regcache, gdb_byte *readbuf, |
546 | const gdb_byte *writebuf, int broken_gcc) | |
e754ae69 | 547 | { |
05580c65 | 548 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
e754ae69 AC |
549 | gdb_assert (tdep->wordsize == 4); |
550 | if (TYPE_CODE (type) == TYPE_CODE_FLT | |
551 | && TYPE_LENGTH (type) <= 8 | |
55eddb0f | 552 | && !tdep->soft_float) |
e754ae69 | 553 | { |
963e2bb7 | 554 | if (readbuf) |
e754ae69 AC |
555 | { |
556 | /* Floats and doubles stored in "f1". Convert the value to | |
557 | the required type. */ | |
50fd1280 | 558 | gdb_byte regval[MAX_REGISTER_SIZE]; |
366f009f JB |
559 | struct type *regtype = register_type (gdbarch, |
560 | tdep->ppc_fp0_regnum + 1); | |
561 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval); | |
963e2bb7 | 562 | convert_typed_floating (regval, regtype, readbuf, type); |
e754ae69 | 563 | } |
963e2bb7 | 564 | if (writebuf) |
e754ae69 AC |
565 | { |
566 | /* Floats and doubles stored in "f1". Convert the value to | |
567 | the register's "double" type. */ | |
50fd1280 | 568 | gdb_byte regval[MAX_REGISTER_SIZE]; |
366f009f | 569 | struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum); |
963e2bb7 | 570 | convert_typed_floating (writebuf, type, regval, regtype); |
366f009f | 571 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval); |
e754ae69 AC |
572 | } |
573 | return RETURN_VALUE_REGISTER_CONVENTION; | |
574 | } | |
b14d30e1 JM |
575 | if (TYPE_CODE (type) == TYPE_CODE_FLT |
576 | && TYPE_LENGTH (type) == 16 | |
577 | && !tdep->soft_float | |
40a6adc1 | 578 | && (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double)) |
b14d30e1 JM |
579 | { |
580 | /* IBM long double stored in f1 and f2. */ | |
581 | if (readbuf) | |
582 | { | |
583 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, readbuf); | |
584 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 2, | |
585 | readbuf + 8); | |
586 | } | |
587 | if (writebuf) | |
588 | { | |
589 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, writebuf); | |
590 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 2, | |
591 | writebuf + 8); | |
592 | } | |
593 | return RETURN_VALUE_REGISTER_CONVENTION; | |
594 | } | |
595 | if (TYPE_CODE (type) == TYPE_CODE_FLT | |
596 | && TYPE_LENGTH (type) == 16 | |
40a6adc1 | 597 | && (gdbarch_long_double_format (gdbarch) == floatformats_ibm_long_double)) |
b14d30e1 JM |
598 | { |
599 | /* Soft-float IBM long double stored in r3, r4, r5, r6. */ | |
600 | if (readbuf) | |
601 | { | |
602 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf); | |
603 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, | |
604 | readbuf + 4); | |
605 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5, | |
606 | readbuf + 8); | |
607 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6, | |
608 | readbuf + 12); | |
609 | } | |
610 | if (writebuf) | |
611 | { | |
612 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf); | |
613 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, | |
614 | writebuf + 4); | |
615 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5, | |
616 | writebuf + 8); | |
617 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6, | |
618 | writebuf + 12); | |
619 | } | |
620 | return RETURN_VALUE_REGISTER_CONVENTION; | |
621 | } | |
e754ae69 AC |
622 | if ((TYPE_CODE (type) == TYPE_CODE_INT && TYPE_LENGTH (type) == 8) |
623 | || (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) == 8)) | |
624 | { | |
963e2bb7 | 625 | if (readbuf) |
e754ae69 AC |
626 | { |
627 | /* A long long, or a double stored in the 32 bit r3/r4. */ | |
628 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, | |
55eddb0f | 629 | readbuf + 0); |
e754ae69 | 630 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, |
55eddb0f | 631 | readbuf + 4); |
e754ae69 | 632 | } |
963e2bb7 | 633 | if (writebuf) |
e754ae69 AC |
634 | { |
635 | /* A long long, or a double stored in the 32 bit r3/r4. */ | |
636 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, | |
55eddb0f | 637 | writebuf + 0); |
e754ae69 | 638 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, |
55eddb0f | 639 | writebuf + 4); |
e754ae69 AC |
640 | } |
641 | return RETURN_VALUE_REGISTER_CONVENTION; | |
642 | } | |
1300a2f4 TJB |
643 | if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && !tdep->soft_float) |
644 | return get_decimal_float_return_value (gdbarch, type, regcache, readbuf, | |
645 | writebuf); | |
f0027ce2 DJ |
646 | else if ((TYPE_CODE (type) == TYPE_CODE_INT |
647 | || TYPE_CODE (type) == TYPE_CODE_CHAR | |
648 | || TYPE_CODE (type) == TYPE_CODE_BOOL | |
649 | || TYPE_CODE (type) == TYPE_CODE_PTR | |
650 | || TYPE_CODE (type) == TYPE_CODE_REF | |
651 | || TYPE_CODE (type) == TYPE_CODE_ENUM) | |
652 | && TYPE_LENGTH (type) <= tdep->wordsize) | |
e754ae69 | 653 | { |
963e2bb7 | 654 | if (readbuf) |
e754ae69 AC |
655 | { |
656 | /* Some sort of integer stored in r3. Since TYPE isn't | |
657 | bigger than the register, sign extension isn't a problem | |
658 | - just do everything unsigned. */ | |
659 | ULONGEST regval; | |
660 | regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
661 | ®val); | |
963e2bb7 | 662 | store_unsigned_integer (readbuf, TYPE_LENGTH (type), regval); |
e754ae69 | 663 | } |
963e2bb7 | 664 | if (writebuf) |
e754ae69 AC |
665 | { |
666 | /* Some sort of integer stored in r3. Use unpack_long since | |
667 | that should handle any required sign extension. */ | |
668 | regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
963e2bb7 | 669 | unpack_long (type, writebuf)); |
e754ae69 AC |
670 | } |
671 | return RETURN_VALUE_REGISTER_CONVENTION; | |
672 | } | |
673 | if (TYPE_LENGTH (type) == 16 | |
674 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
55eddb0f DJ |
675 | && TYPE_VECTOR (type) |
676 | && tdep->vector_abi == POWERPC_VEC_ALTIVEC) | |
e754ae69 | 677 | { |
963e2bb7 | 678 | if (readbuf) |
e754ae69 AC |
679 | { |
680 | /* Altivec places the return value in "v2". */ | |
963e2bb7 | 681 | regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf); |
e754ae69 | 682 | } |
963e2bb7 | 683 | if (writebuf) |
e754ae69 AC |
684 | { |
685 | /* Altivec places the return value in "v2". */ | |
963e2bb7 | 686 | regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf); |
e754ae69 AC |
687 | } |
688 | return RETURN_VALUE_REGISTER_CONVENTION; | |
689 | } | |
55eddb0f DJ |
690 | if (TYPE_LENGTH (type) == 16 |
691 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
692 | && TYPE_VECTOR (type) | |
693 | && tdep->vector_abi == POWERPC_VEC_GENERIC) | |
694 | { | |
695 | /* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6. | |
696 | GCC without AltiVec returns them in memory, but it warns about | |
697 | ABI risks in that case; we don't try to support it. */ | |
698 | if (readbuf) | |
699 | { | |
700 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, | |
701 | readbuf + 0); | |
702 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, | |
703 | readbuf + 4); | |
704 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 5, | |
705 | readbuf + 8); | |
706 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 6, | |
707 | readbuf + 12); | |
708 | } | |
709 | if (writebuf) | |
710 | { | |
711 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, | |
712 | writebuf + 0); | |
713 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, | |
714 | writebuf + 4); | |
715 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 5, | |
716 | writebuf + 8); | |
717 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 6, | |
718 | writebuf + 12); | |
719 | } | |
720 | return RETURN_VALUE_REGISTER_CONVENTION; | |
721 | } | |
e754ae69 AC |
722 | if (TYPE_LENGTH (type) == 8 |
723 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
55eddb0f DJ |
724 | && TYPE_VECTOR (type) |
725 | && tdep->vector_abi == POWERPC_VEC_SPE) | |
e754ae69 AC |
726 | { |
727 | /* The e500 ABI places return values for the 64-bit DSP types | |
728 | (__ev64_opaque__) in r3. However, in GDB-speak, ev3 | |
729 | corresponds to the entire r3 value for e500, whereas GDB's r3 | |
730 | only corresponds to the least significant 32-bits. So place | |
731 | the 64-bit DSP type's value in ev3. */ | |
963e2bb7 AC |
732 | if (readbuf) |
733 | regcache_cooked_read (regcache, tdep->ppc_ev0_regnum + 3, readbuf); | |
734 | if (writebuf) | |
735 | regcache_cooked_write (regcache, tdep->ppc_ev0_regnum + 3, writebuf); | |
e754ae69 AC |
736 | return RETURN_VALUE_REGISTER_CONVENTION; |
737 | } | |
738 | if (broken_gcc && TYPE_LENGTH (type) <= 8) | |
739 | { | |
61bf9ae0 MK |
740 | /* GCC screwed up for structures or unions whose size is less |
741 | than or equal to 8 bytes.. Instead of left-aligning, it | |
742 | right-aligns the data into the buffer formed by r3, r4. */ | |
743 | gdb_byte regvals[MAX_REGISTER_SIZE * 2]; | |
744 | int len = TYPE_LENGTH (type); | |
745 | int offset = (2 * tdep->wordsize - len) % tdep->wordsize; | |
746 | ||
963e2bb7 | 747 | if (readbuf) |
e754ae69 | 748 | { |
61bf9ae0 MK |
749 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, |
750 | regvals + 0 * tdep->wordsize); | |
751 | if (len > tdep->wordsize) | |
752 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, | |
753 | regvals + 1 * tdep->wordsize); | |
754 | memcpy (readbuf, regvals + offset, len); | |
e754ae69 | 755 | } |
963e2bb7 | 756 | if (writebuf) |
e754ae69 | 757 | { |
61bf9ae0 MK |
758 | memset (regvals, 0, sizeof regvals); |
759 | memcpy (regvals + offset, writebuf, len); | |
760 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, | |
761 | regvals + 0 * tdep->wordsize); | |
762 | if (len > tdep->wordsize) | |
763 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, | |
764 | regvals + 1 * tdep->wordsize); | |
e754ae69 | 765 | } |
61bf9ae0 | 766 | |
e754ae69 AC |
767 | return RETURN_VALUE_REGISTER_CONVENTION; |
768 | } | |
769 | if (TYPE_LENGTH (type) <= 8) | |
770 | { | |
963e2bb7 | 771 | if (readbuf) |
e754ae69 AC |
772 | { |
773 | /* This matches SVr4 PPC, it does not match GCC. */ | |
774 | /* The value is right-padded to 8 bytes and then loaded, as | |
775 | two "words", into r3/r4. */ | |
50fd1280 | 776 | gdb_byte regvals[MAX_REGISTER_SIZE * 2]; |
e754ae69 AC |
777 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, |
778 | regvals + 0 * tdep->wordsize); | |
779 | if (TYPE_LENGTH (type) > tdep->wordsize) | |
780 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 4, | |
781 | regvals + 1 * tdep->wordsize); | |
963e2bb7 | 782 | memcpy (readbuf, regvals, TYPE_LENGTH (type)); |
e754ae69 | 783 | } |
963e2bb7 | 784 | if (writebuf) |
e754ae69 AC |
785 | { |
786 | /* This matches SVr4 PPC, it does not match GCC. */ | |
787 | /* The value is padded out to 8 bytes and then loaded, as | |
788 | two "words" into r3/r4. */ | |
50fd1280 | 789 | gdb_byte regvals[MAX_REGISTER_SIZE * 2]; |
e754ae69 | 790 | memset (regvals, 0, sizeof regvals); |
963e2bb7 | 791 | memcpy (regvals, writebuf, TYPE_LENGTH (type)); |
e754ae69 AC |
792 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, |
793 | regvals + 0 * tdep->wordsize); | |
794 | if (TYPE_LENGTH (type) > tdep->wordsize) | |
795 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 4, | |
796 | regvals + 1 * tdep->wordsize); | |
797 | } | |
798 | return RETURN_VALUE_REGISTER_CONVENTION; | |
799 | } | |
800 | return RETURN_VALUE_STRUCT_CONVENTION; | |
801 | } | |
802 | ||
05580c65 AC |
803 | enum return_value_convention |
804 | ppc_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype, | |
50fd1280 AC |
805 | struct regcache *regcache, gdb_byte *readbuf, |
806 | const gdb_byte *writebuf) | |
e754ae69 | 807 | { |
963e2bb7 AC |
808 | return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf, |
809 | writebuf, 0); | |
e754ae69 AC |
810 | } |
811 | ||
05580c65 | 812 | enum return_value_convention |
963e2bb7 AC |
813 | ppc_sysv_abi_broken_return_value (struct gdbarch *gdbarch, |
814 | struct type *valtype, | |
815 | struct regcache *regcache, | |
50fd1280 | 816 | gdb_byte *readbuf, const gdb_byte *writebuf) |
e754ae69 | 817 | { |
963e2bb7 AC |
818 | return do_ppc_sysv_return_value (gdbarch, valtype, regcache, readbuf, |
819 | writebuf, 1); | |
944fcfab | 820 | } |
afd48b75 | 821 | |
b6e1c027 AC |
822 | /* The helper function for 64-bit SYSV push_dummy_call. Converts the |
823 | function's code address back into the function's descriptor | |
824 | address. | |
825 | ||
826 | Find a value for the TOC register. Every symbol should have both | |
827 | ".FN" and "FN" in the minimal symbol table. "FN" points at the | |
828 | FN's descriptor, while ".FN" points at the entry point (which | |
829 | matches FUNC_ADDR). Need to reverse from FUNC_ADDR back to the | |
830 | FN's descriptor address (while at the same time being careful to | |
831 | find "FN" in the same object file as ".FN"). */ | |
832 | ||
833 | static int | |
834 | convert_code_addr_to_desc_addr (CORE_ADDR code_addr, CORE_ADDR *desc_addr) | |
835 | { | |
836 | struct obj_section *dot_fn_section; | |
837 | struct minimal_symbol *dot_fn; | |
838 | struct minimal_symbol *fn; | |
839 | CORE_ADDR toc; | |
840 | /* Find the minimal symbol that corresponds to CODE_ADDR (should | |
841 | have a name of the form ".FN"). */ | |
842 | dot_fn = lookup_minimal_symbol_by_pc (code_addr); | |
843 | if (dot_fn == NULL || SYMBOL_LINKAGE_NAME (dot_fn)[0] != '.') | |
844 | return 0; | |
845 | /* Get the section that contains CODE_ADDR. Need this for the | |
846 | "objfile" that it contains. */ | |
847 | dot_fn_section = find_pc_section (code_addr); | |
848 | if (dot_fn_section == NULL || dot_fn_section->objfile == NULL) | |
849 | return 0; | |
850 | /* Now find the corresponding "FN" (dropping ".") minimal symbol's | |
851 | address. Only look for the minimal symbol in ".FN"'s object file | |
852 | - avoids problems when two object files (i.e., shared libraries) | |
853 | contain a minimal symbol with the same name. */ | |
854 | fn = lookup_minimal_symbol (SYMBOL_LINKAGE_NAME (dot_fn) + 1, NULL, | |
855 | dot_fn_section->objfile); | |
856 | if (fn == NULL) | |
857 | return 0; | |
858 | /* Found a descriptor. */ | |
859 | (*desc_addr) = SYMBOL_VALUE_ADDRESS (fn); | |
860 | return 1; | |
861 | } | |
862 | ||
8be9034a AC |
863 | /* Pass the arguments in either registers, or in the stack. Using the |
864 | ppc 64 bit SysV ABI. | |
865 | ||
866 | This implements a dumbed down version of the ABI. It always writes | |
867 | values to memory, GPR and FPR, even when not necessary. Doing this | |
868 | greatly simplifies the logic. */ | |
869 | ||
870 | CORE_ADDR | |
7d9b040b | 871 | ppc64_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
8be9034a AC |
872 | struct regcache *regcache, CORE_ADDR bp_addr, |
873 | int nargs, struct value **args, CORE_ADDR sp, | |
874 | int struct_return, CORE_ADDR struct_addr) | |
875 | { | |
7d9b040b | 876 | CORE_ADDR func_addr = find_function_addr (function, NULL); |
40a6adc1 | 877 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
fb4443d8 | 878 | ULONGEST back_chain; |
8be9034a AC |
879 | /* See for-loop comment below. */ |
880 | int write_pass; | |
881 | /* Size of the Altivec's vector parameter region, the final value is | |
882 | computed in the for-loop below. */ | |
883 | LONGEST vparam_size = 0; | |
884 | /* Size of the general parameter region, the final value is computed | |
885 | in the for-loop below. */ | |
886 | LONGEST gparam_size = 0; | |
887 | /* Kevin writes ... I don't mind seeing tdep->wordsize used in the | |
888 | calls to align_up(), align_down(), etc. because this makes it | |
889 | easier to reuse this code (in a copy/paste sense) in the future, | |
890 | but it is a 64-bit ABI and asserting that the wordsize is 8 bytes | |
891 | at some point makes it easier to verify that this function is | |
892 | correct without having to do a non-local analysis to figure out | |
893 | the possible values of tdep->wordsize. */ | |
894 | gdb_assert (tdep->wordsize == 8); | |
895 | ||
55eddb0f DJ |
896 | /* This function exists to support a calling convention that |
897 | requires floating-point registers. It shouldn't be used on | |
898 | processors that lack them. */ | |
899 | gdb_assert (ppc_floating_point_unit_p (gdbarch)); | |
900 | ||
fb4443d8 UW |
901 | /* By this stage in the proceedings, SP has been decremented by "red |
902 | zone size" + "struct return size". Fetch the stack-pointer from | |
903 | before this and use that as the BACK_CHAIN. */ | |
40a6adc1 | 904 | regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch), |
3e8c568d | 905 | &back_chain); |
fb4443d8 | 906 | |
8be9034a AC |
907 | /* Go through the argument list twice. |
908 | ||
909 | Pass 1: Compute the function call's stack space and register | |
910 | requirements. | |
911 | ||
912 | Pass 2: Replay the same computation but this time also write the | |
913 | values out to the target. */ | |
914 | ||
915 | for (write_pass = 0; write_pass < 2; write_pass++) | |
916 | { | |
917 | int argno; | |
918 | /* Next available floating point register for float and double | |
919 | arguments. */ | |
920 | int freg = 1; | |
921 | /* Next available general register for non-vector (but possibly | |
922 | float) arguments. */ | |
923 | int greg = 3; | |
924 | /* Next available vector register for vector arguments. */ | |
925 | int vreg = 2; | |
926 | /* The address, at which the next general purpose parameter | |
927 | (integer, struct, float, ...) should be saved. */ | |
928 | CORE_ADDR gparam; | |
929 | /* Address, at which the next Altivec vector parameter should be | |
930 | saved. */ | |
931 | CORE_ADDR vparam; | |
932 | ||
933 | if (!write_pass) | |
934 | { | |
935 | /* During the first pass, GPARAM and VPARAM are more like | |
936 | offsets (start address zero) than addresses. That way | |
937 | the accumulate the total stack space each region | |
938 | requires. */ | |
939 | gparam = 0; | |
940 | vparam = 0; | |
941 | } | |
942 | else | |
943 | { | |
944 | /* Decrement the stack pointer making space for the Altivec | |
945 | and general on-stack parameters. Set vparam and gparam | |
946 | to their corresponding regions. */ | |
947 | vparam = align_down (sp - vparam_size, 16); | |
948 | gparam = align_down (vparam - gparam_size, 16); | |
949 | /* Add in space for the TOC, link editor double word, | |
950 | compiler double word, LR save area, CR save area. */ | |
951 | sp = align_down (gparam - 48, 16); | |
952 | } | |
953 | ||
954 | /* If the function is returning a `struct', then there is an | |
955 | extra hidden parameter (which will be passed in r3) | |
956 | containing the address of that struct.. In that case we | |
957 | should advance one word and start from r4 register to copy | |
958 | parameters. This also consumes one on-stack parameter slot. */ | |
959 | if (struct_return) | |
960 | { | |
961 | if (write_pass) | |
962 | regcache_cooked_write_signed (regcache, | |
963 | tdep->ppc_gp0_regnum + greg, | |
964 | struct_addr); | |
965 | greg++; | |
966 | gparam = align_up (gparam + tdep->wordsize, tdep->wordsize); | |
967 | } | |
968 | ||
969 | for (argno = 0; argno < nargs; argno++) | |
970 | { | |
971 | struct value *arg = args[argno]; | |
df407dfe | 972 | struct type *type = check_typedef (value_type (arg)); |
0fd88904 | 973 | const bfd_byte *val = value_contents (arg); |
ce0451ad | 974 | |
8be9034a AC |
975 | if (TYPE_CODE (type) == TYPE_CODE_FLT && TYPE_LENGTH (type) <= 8) |
976 | { | |
977 | /* Floats and Doubles go in f1 .. f13. They also | |
978 | consume a left aligned GREG,, and can end up in | |
979 | memory. */ | |
980 | if (write_pass) | |
981 | { | |
ce0451ad TJB |
982 | gdb_byte regval[MAX_REGISTER_SIZE]; |
983 | const gdb_byte *p; | |
984 | ||
985 | /* Version 1.7 of the 64-bit PowerPC ELF ABI says: | |
986 | ||
987 | "Single precision floating point values are mapped to | |
988 | the first word in a single doubleword." | |
989 | ||
990 | And version 1.9 says: | |
991 | ||
992 | "Single precision floating point values are mapped to | |
993 | the second word in a single doubleword." | |
994 | ||
995 | GDB then writes single precision floating point values | |
996 | at both words in a doubleword, to support both ABIs. */ | |
997 | if (TYPE_LENGTH (type) == 4) | |
998 | { | |
999 | memcpy (regval, val, 4); | |
1000 | memcpy (regval + 4, val, 4); | |
1001 | p = regval; | |
1002 | } | |
1003 | else | |
1004 | p = val; | |
1005 | ||
1006 | /* Write value in the stack's parameter save area. */ | |
1007 | write_memory (gparam, p, 8); | |
1008 | ||
55eddb0f | 1009 | if (freg <= 13) |
8be9034a | 1010 | { |
366f009f JB |
1011 | struct type *regtype |
1012 | = register_type (gdbarch, tdep->ppc_fp0_regnum); | |
ce0451ad | 1013 | |
8be9034a | 1014 | convert_typed_floating (val, type, regval, regtype); |
366f009f JB |
1015 | regcache_cooked_write (regcache, |
1016 | tdep->ppc_fp0_regnum + freg, | |
8be9034a AC |
1017 | regval); |
1018 | } | |
1019 | if (greg <= 10) | |
ce0451ad TJB |
1020 | regcache_cooked_write (regcache, |
1021 | tdep->ppc_gp0_regnum + greg, | |
1022 | regval); | |
8be9034a | 1023 | } |
ce0451ad | 1024 | |
8be9034a AC |
1025 | freg++; |
1026 | greg++; | |
ce0451ad TJB |
1027 | /* Always consume parameter stack space. */ |
1028 | gparam = align_up (gparam + 8, tdep->wordsize); | |
8be9034a | 1029 | } |
b14d30e1 JM |
1030 | else if (TYPE_CODE (type) == TYPE_CODE_FLT |
1031 | && TYPE_LENGTH (type) == 16 | |
40a6adc1 | 1032 | && (gdbarch_long_double_format (gdbarch) |
b14d30e1 JM |
1033 | == floatformats_ibm_long_double)) |
1034 | { | |
1035 | /* IBM long double stored in two doublewords of the | |
1036 | parameter save area and corresponding registers. */ | |
1037 | if (write_pass) | |
1038 | { | |
1039 | if (!tdep->soft_float && freg <= 13) | |
1040 | { | |
1041 | regcache_cooked_write (regcache, | |
1042 | tdep->ppc_fp0_regnum + freg, | |
1043 | val); | |
1044 | if (freg <= 12) | |
1045 | regcache_cooked_write (regcache, | |
1046 | tdep->ppc_fp0_regnum + freg + 1, | |
1047 | val + 8); | |
1048 | } | |
1049 | if (greg <= 10) | |
1050 | { | |
1051 | regcache_cooked_write (regcache, | |
1052 | tdep->ppc_gp0_regnum + greg, | |
1053 | val); | |
1054 | if (greg <= 9) | |
1055 | regcache_cooked_write (regcache, | |
1056 | tdep->ppc_gp0_regnum + greg + 1, | |
1057 | val + 8); | |
1058 | } | |
1059 | write_memory (gparam, val, TYPE_LENGTH (type)); | |
1060 | } | |
1061 | freg += 2; | |
1062 | greg += 2; | |
1063 | gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); | |
1064 | } | |
1300a2f4 TJB |
1065 | else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT |
1066 | && TYPE_LENGTH (type) <= 8) | |
1067 | { | |
1068 | /* 32-bit and 64-bit decimal floats go in f1 .. f13. They can | |
1069 | end up in memory. */ | |
1070 | if (write_pass) | |
1071 | { | |
1072 | gdb_byte regval[MAX_REGISTER_SIZE]; | |
1073 | const gdb_byte *p; | |
1074 | ||
1075 | /* 32-bit decimal floats are right aligned in the | |
1076 | doubleword. */ | |
1077 | if (TYPE_LENGTH (type) == 4) | |
1078 | { | |
1079 | memcpy (regval + 4, val, 4); | |
1080 | p = regval; | |
1081 | } | |
1082 | else | |
1083 | p = val; | |
1084 | ||
1085 | /* Write value in the stack's parameter save area. */ | |
1086 | write_memory (gparam, p, 8); | |
1087 | ||
1088 | if (freg <= 13) | |
1089 | regcache_cooked_write (regcache, | |
1090 | tdep->ppc_fp0_regnum + freg, p); | |
1091 | } | |
1092 | ||
1093 | freg++; | |
1094 | greg++; | |
1095 | /* Always consume parameter stack space. */ | |
1096 | gparam = align_up (gparam + 8, tdep->wordsize); | |
1097 | } | |
1098 | else if (TYPE_CODE (type) == TYPE_CODE_DECFLOAT && | |
1099 | TYPE_LENGTH (type) == 16) | |
1100 | { | |
1101 | /* 128-bit decimal floats go in f2 .. f12, always in even/odd | |
1102 | pairs. They can end up in memory, using two doublewords. */ | |
1103 | if (write_pass) | |
1104 | { | |
1105 | if (freg <= 12) | |
1106 | { | |
1107 | /* Make sure freg is even. */ | |
1108 | freg += freg & 1; | |
1109 | regcache_cooked_write (regcache, | |
1110 | tdep->ppc_fp0_regnum + freg, val); | |
1111 | regcache_cooked_write (regcache, | |
1112 | tdep->ppc_fp0_regnum + freg + 1, val + 8); | |
1113 | } | |
1114 | ||
1115 | write_memory (gparam, val, TYPE_LENGTH (type)); | |
1116 | } | |
1117 | ||
1118 | freg += 2; | |
1119 | greg += 2; | |
1120 | gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); | |
1121 | } | |
8be9034a AC |
1122 | else if (TYPE_LENGTH (type) == 16 && TYPE_VECTOR (type) |
1123 | && TYPE_CODE (type) == TYPE_CODE_ARRAY | |
1124 | && tdep->ppc_vr0_regnum >= 0) | |
1125 | { | |
1126 | /* In the Altivec ABI, vectors go in the vector | |
1127 | registers v2 .. v13, or when that runs out, a vector | |
1128 | annex which goes above all the normal parameters. | |
1129 | NOTE: cagney/2003-09-21: This is a guess based on the | |
1130 | PowerOpen Altivec ABI. */ | |
1131 | if (vreg <= 13) | |
1132 | { | |
1133 | if (write_pass) | |
1134 | regcache_cooked_write (regcache, | |
1135 | tdep->ppc_vr0_regnum + vreg, val); | |
1136 | vreg++; | |
1137 | } | |
1138 | else | |
1139 | { | |
1140 | if (write_pass) | |
1141 | write_memory (vparam, val, TYPE_LENGTH (type)); | |
1142 | vparam = align_up (vparam + TYPE_LENGTH (type), 16); | |
1143 | } | |
1144 | } | |
1145 | else if ((TYPE_CODE (type) == TYPE_CODE_INT | |
b6e1c027 AC |
1146 | || TYPE_CODE (type) == TYPE_CODE_ENUM |
1147 | || TYPE_CODE (type) == TYPE_CODE_PTR) | |
8be9034a AC |
1148 | && TYPE_LENGTH (type) <= 8) |
1149 | { | |
b6e1c027 AC |
1150 | /* Scalars and Pointers get sign[un]extended and go in |
1151 | gpr3 .. gpr10. They can also end up in memory. */ | |
8be9034a AC |
1152 | if (write_pass) |
1153 | { | |
1154 | /* Sign extend the value, then store it unsigned. */ | |
1155 | ULONGEST word = unpack_long (type, val); | |
b6e1c027 AC |
1156 | /* Convert any function code addresses into |
1157 | descriptors. */ | |
1158 | if (TYPE_CODE (type) == TYPE_CODE_PTR | |
1159 | && TYPE_CODE (TYPE_TARGET_TYPE (type)) == TYPE_CODE_FUNC) | |
1160 | { | |
1161 | CORE_ADDR desc = word; | |
1162 | convert_code_addr_to_desc_addr (word, &desc); | |
1163 | word = desc; | |
1164 | } | |
8be9034a AC |
1165 | if (greg <= 10) |
1166 | regcache_cooked_write_unsigned (regcache, | |
1167 | tdep->ppc_gp0_regnum + | |
1168 | greg, word); | |
1169 | write_memory_unsigned_integer (gparam, tdep->wordsize, | |
1170 | word); | |
1171 | } | |
1172 | greg++; | |
1173 | gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); | |
1174 | } | |
1175 | else | |
1176 | { | |
1177 | int byte; | |
1178 | for (byte = 0; byte < TYPE_LENGTH (type); | |
1179 | byte += tdep->wordsize) | |
1180 | { | |
1181 | if (write_pass && greg <= 10) | |
1182 | { | |
50fd1280 | 1183 | gdb_byte regval[MAX_REGISTER_SIZE]; |
8be9034a AC |
1184 | int len = TYPE_LENGTH (type) - byte; |
1185 | if (len > tdep->wordsize) | |
1186 | len = tdep->wordsize; | |
1187 | memset (regval, 0, sizeof regval); | |
36815e57 JM |
1188 | /* The ABI (version 1.9) specifies that values |
1189 | smaller than one doubleword are right-aligned | |
1190 | and those larger are left-aligned. GCC | |
1191 | versions before 3.4 implemented this | |
1192 | incorrectly; see | |
1193 | <http://gcc.gnu.org/gcc-3.4/powerpc-abi.html>. */ | |
1194 | if (byte == 0) | |
8be9034a AC |
1195 | memcpy (regval + tdep->wordsize - len, |
1196 | val + byte, len); | |
36815e57 JM |
1197 | else |
1198 | memcpy (regval, val + byte, len); | |
8be9034a AC |
1199 | regcache_cooked_write (regcache, greg, regval); |
1200 | } | |
1201 | greg++; | |
1202 | } | |
1203 | if (write_pass) | |
1204 | /* WARNING: cagney/2003-09-21: Strictly speaking, this | |
1205 | isn't necessary, unfortunately, GCC appears to get | |
1206 | "struct convention" parameter passing wrong putting | |
1207 | odd sized structures in memory instead of in a | |
1208 | register. Work around this by always writing the | |
1209 | value to memory. Fortunately, doing this | |
1210 | simplifies the code. */ | |
1211 | write_memory (gparam, val, TYPE_LENGTH (type)); | |
36815e57 JM |
1212 | if (freg <= 13 |
1213 | && TYPE_CODE (type) == TYPE_CODE_STRUCT | |
1214 | && TYPE_NFIELDS (type) == 1 | |
1215 | && TYPE_LENGTH (type) <= 16) | |
1216 | { | |
1217 | /* The ABI (version 1.9) specifies that structs | |
1218 | containing a single floating-point value, at any | |
1219 | level of nesting of single-member structs, are | |
1220 | passed in floating-point registers. */ | |
1221 | while (TYPE_CODE (type) == TYPE_CODE_STRUCT | |
1222 | && TYPE_NFIELDS (type) == 1) | |
1223 | type = check_typedef (TYPE_FIELD_TYPE (type, 0)); | |
1224 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
1225 | { | |
1226 | if (TYPE_LENGTH (type) <= 8) | |
1227 | { | |
1228 | if (write_pass) | |
1229 | { | |
1230 | gdb_byte regval[MAX_REGISTER_SIZE]; | |
1231 | struct type *regtype | |
1232 | = register_type (gdbarch, | |
1233 | tdep->ppc_fp0_regnum); | |
1234 | convert_typed_floating (val, type, regval, | |
1235 | regtype); | |
1236 | regcache_cooked_write (regcache, | |
1237 | (tdep->ppc_fp0_regnum | |
1238 | + freg), | |
1239 | regval); | |
1240 | } | |
1241 | freg++; | |
1242 | } | |
1243 | else if (TYPE_LENGTH (type) == 16 | |
40a6adc1 | 1244 | && (gdbarch_long_double_format (gdbarch) |
36815e57 JM |
1245 | == floatformats_ibm_long_double)) |
1246 | { | |
1247 | if (write_pass) | |
1248 | { | |
1249 | regcache_cooked_write (regcache, | |
1250 | (tdep->ppc_fp0_regnum | |
1251 | + freg), | |
1252 | val); | |
1253 | if (freg <= 12) | |
1254 | regcache_cooked_write (regcache, | |
1255 | (tdep->ppc_fp0_regnum | |
1256 | + freg + 1), | |
1257 | val + 8); | |
1258 | } | |
1259 | freg += 2; | |
1260 | } | |
1261 | } | |
1262 | } | |
8be9034a AC |
1263 | /* Always consume parameter stack space. */ |
1264 | gparam = align_up (gparam + TYPE_LENGTH (type), tdep->wordsize); | |
1265 | } | |
1266 | } | |
1267 | ||
1268 | if (!write_pass) | |
1269 | { | |
1270 | /* Save the true region sizes ready for the second pass. */ | |
1271 | vparam_size = vparam; | |
1272 | /* Make certain that the general parameter save area is at | |
1273 | least the minimum 8 registers (or doublewords) in size. */ | |
1274 | if (greg < 8) | |
1275 | gparam_size = 8 * tdep->wordsize; | |
1276 | else | |
1277 | gparam_size = gparam; | |
1278 | } | |
1279 | } | |
1280 | ||
1281 | /* Update %sp. */ | |
40a6adc1 | 1282 | regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp); |
8be9034a AC |
1283 | |
1284 | /* Write the backchain (it occupies WORDSIZED bytes). */ | |
1285 | write_memory_signed_integer (sp, tdep->wordsize, back_chain); | |
1286 | ||
1287 | /* Point the inferior function call's return address at the dummy's | |
1288 | breakpoint. */ | |
1289 | regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr); | |
1290 | ||
b6e1c027 AC |
1291 | /* Use the func_addr to find the descriptor, and use that to find |
1292 | the TOC. */ | |
8be9034a | 1293 | { |
b6e1c027 AC |
1294 | CORE_ADDR desc_addr; |
1295 | if (convert_code_addr_to_desc_addr (func_addr, &desc_addr)) | |
8be9034a | 1296 | { |
b6e1c027 AC |
1297 | /* The TOC is the second double word in the descriptor. */ |
1298 | CORE_ADDR toc = | |
1299 | read_memory_unsigned_integer (desc_addr + tdep->wordsize, | |
1300 | tdep->wordsize); | |
1301 | regcache_cooked_write_unsigned (regcache, | |
1302 | tdep->ppc_gp0_regnum + 2, toc); | |
8be9034a AC |
1303 | } |
1304 | } | |
1305 | ||
1306 | return sp; | |
1307 | } | |
1308 | ||
afd48b75 | 1309 | |
55eddb0f | 1310 | /* The 64 bit ABI return value convention. |
afd48b75 AC |
1311 | |
1312 | Return non-zero if the return-value is stored in a register, return | |
1313 | 0 if the return-value is instead stored on the stack (a.k.a., | |
1314 | struct return convention). | |
1315 | ||
963e2bb7 | 1316 | For a return-value stored in a register: when WRITEBUF is non-NULL, |
afd48b75 | 1317 | copy the buffer to the corresponding register return-value location |
963e2bb7 | 1318 | location; when READBUF is non-NULL, fill the buffer from the |
afd48b75 | 1319 | corresponding register return-value location. */ |
05580c65 AC |
1320 | enum return_value_convention |
1321 | ppc64_sysv_abi_return_value (struct gdbarch *gdbarch, struct type *valtype, | |
50fd1280 AC |
1322 | struct regcache *regcache, gdb_byte *readbuf, |
1323 | const gdb_byte *writebuf) | |
afd48b75 | 1324 | { |
05580c65 | 1325 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
16796152 JB |
1326 | |
1327 | /* This function exists to support a calling convention that | |
1328 | requires floating-point registers. It shouldn't be used on | |
1329 | processors that lack them. */ | |
1330 | gdb_assert (ppc_floating_point_unit_p (gdbarch)); | |
1331 | ||
afd48b75 | 1332 | /* Floats and doubles in F1. */ |
944fcfab | 1333 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT && TYPE_LENGTH (valtype) <= 8) |
afd48b75 | 1334 | { |
50fd1280 | 1335 | gdb_byte regval[MAX_REGISTER_SIZE]; |
366f009f | 1336 | struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum); |
963e2bb7 | 1337 | if (writebuf != NULL) |
afd48b75 | 1338 | { |
963e2bb7 | 1339 | convert_typed_floating (writebuf, valtype, regval, regtype); |
366f009f | 1340 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1, regval); |
afd48b75 | 1341 | } |
963e2bb7 | 1342 | if (readbuf != NULL) |
afd48b75 | 1343 | { |
366f009f | 1344 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1, regval); |
963e2bb7 | 1345 | convert_typed_floating (regval, regtype, readbuf, valtype); |
afd48b75 AC |
1346 | } |
1347 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1348 | } | |
1300a2f4 TJB |
1349 | if (TYPE_CODE (valtype) == TYPE_CODE_DECFLOAT) |
1350 | return get_decimal_float_return_value (gdbarch, valtype, regcache, readbuf, | |
1351 | writebuf); | |
3d8476bc | 1352 | /* Integers in r3. */ |
b6e1c027 AC |
1353 | if ((TYPE_CODE (valtype) == TYPE_CODE_INT |
1354 | || TYPE_CODE (valtype) == TYPE_CODE_ENUM) | |
1355 | && TYPE_LENGTH (valtype) <= 8) | |
afd48b75 | 1356 | { |
963e2bb7 | 1357 | if (writebuf != NULL) |
afd48b75 AC |
1358 | { |
1359 | /* Be careful to sign extend the value. */ | |
1360 | regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
963e2bb7 | 1361 | unpack_long (valtype, writebuf)); |
afd48b75 | 1362 | } |
963e2bb7 | 1363 | if (readbuf != NULL) |
afd48b75 AC |
1364 | { |
1365 | /* Extract the integer from r3. Since this is truncating the | |
1366 | value, there isn't a sign extension problem. */ | |
1367 | ULONGEST regval; | |
1368 | regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3, | |
1369 | ®val); | |
963e2bb7 | 1370 | store_unsigned_integer (readbuf, TYPE_LENGTH (valtype), regval); |
afd48b75 AC |
1371 | } |
1372 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1373 | } | |
1374 | /* All pointers live in r3. */ | |
1375 | if (TYPE_CODE (valtype) == TYPE_CODE_PTR) | |
1376 | { | |
1377 | /* All pointers live in r3. */ | |
963e2bb7 AC |
1378 | if (writebuf != NULL) |
1379 | regcache_cooked_write (regcache, tdep->ppc_gp0_regnum + 3, writebuf); | |
1380 | if (readbuf != NULL) | |
1381 | regcache_cooked_read (regcache, tdep->ppc_gp0_regnum + 3, readbuf); | |
afd48b75 AC |
1382 | return RETURN_VALUE_REGISTER_CONVENTION; |
1383 | } | |
3d8476bc PG |
1384 | /* Array type has more than one use. */ |
1385 | if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY) | |
afd48b75 AC |
1386 | { |
1387 | /* Small character arrays are returned, right justified, in r3. */ | |
3d8476bc PG |
1388 | if (TYPE_LENGTH (valtype) <= 8 |
1389 | && TYPE_CODE (TYPE_TARGET_TYPE (valtype)) == TYPE_CODE_INT | |
1390 | && TYPE_LENGTH (TYPE_TARGET_TYPE (valtype)) == 1) | |
1391 | { | |
1392 | int offset = (register_size (gdbarch, tdep->ppc_gp0_regnum + 3) | |
1393 | - TYPE_LENGTH (valtype)); | |
1394 | if (writebuf != NULL) | |
1395 | regcache_cooked_write_part (regcache, tdep->ppc_gp0_regnum + 3, | |
1396 | offset, TYPE_LENGTH (valtype), writebuf); | |
1397 | if (readbuf != NULL) | |
1398 | regcache_cooked_read_part (regcache, tdep->ppc_gp0_regnum + 3, | |
1399 | offset, TYPE_LENGTH (valtype), readbuf); | |
1400 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1401 | } | |
1402 | /* A VMX vector is returned in v2. */ | |
1403 | if (TYPE_CODE (valtype) == TYPE_CODE_ARRAY | |
1404 | && TYPE_VECTOR (valtype) && tdep->ppc_vr0_regnum >= 0) | |
1405 | { | |
1406 | if (readbuf) | |
1407 | regcache_cooked_read (regcache, tdep->ppc_vr0_regnum + 2, readbuf); | |
1408 | if (writebuf) | |
1409 | regcache_cooked_write (regcache, tdep->ppc_vr0_regnum + 2, writebuf); | |
1410 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1411 | } | |
afd48b75 AC |
1412 | } |
1413 | /* Big floating point values get stored in adjacent floating | |
3d8476bc | 1414 | point registers, starting with F1. */ |
afd48b75 | 1415 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT |
944fcfab | 1416 | && (TYPE_LENGTH (valtype) == 16 || TYPE_LENGTH (valtype) == 32)) |
afd48b75 | 1417 | { |
963e2bb7 | 1418 | if (writebuf || readbuf != NULL) |
afd48b75 AC |
1419 | { |
1420 | int i; | |
1421 | for (i = 0; i < TYPE_LENGTH (valtype) / 8; i++) | |
1422 | { | |
963e2bb7 | 1423 | if (writebuf != NULL) |
366f009f | 1424 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i, |
963e2bb7 AC |
1425 | (const bfd_byte *) writebuf + i * 8); |
1426 | if (readbuf != NULL) | |
366f009f | 1427 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i, |
963e2bb7 | 1428 | (bfd_byte *) readbuf + i * 8); |
afd48b75 AC |
1429 | } |
1430 | } | |
1431 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1432 | } | |
1433 | /* Complex values get returned in f1:f2, need to convert. */ | |
1434 | if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX | |
1435 | && (TYPE_LENGTH (valtype) == 8 || TYPE_LENGTH (valtype) == 16)) | |
1436 | { | |
1437 | if (regcache != NULL) | |
1438 | { | |
1439 | int i; | |
1440 | for (i = 0; i < 2; i++) | |
1441 | { | |
50fd1280 | 1442 | gdb_byte regval[MAX_REGISTER_SIZE]; |
944fcfab | 1443 | struct type *regtype = |
40a6adc1 | 1444 | register_type (gdbarch, tdep->ppc_fp0_regnum); |
963e2bb7 | 1445 | if (writebuf != NULL) |
afd48b75 | 1446 | { |
963e2bb7 | 1447 | convert_typed_floating ((const bfd_byte *) writebuf + |
944fcfab | 1448 | i * (TYPE_LENGTH (valtype) / 2), |
afd48b75 | 1449 | valtype, regval, regtype); |
366f009f JB |
1450 | regcache_cooked_write (regcache, |
1451 | tdep->ppc_fp0_regnum + 1 + i, | |
944fcfab | 1452 | regval); |
afd48b75 | 1453 | } |
963e2bb7 | 1454 | if (readbuf != NULL) |
afd48b75 | 1455 | { |
366f009f JB |
1456 | regcache_cooked_read (regcache, |
1457 | tdep->ppc_fp0_regnum + 1 + i, | |
1458 | regval); | |
afd48b75 | 1459 | convert_typed_floating (regval, regtype, |
963e2bb7 | 1460 | (bfd_byte *) readbuf + |
944fcfab | 1461 | i * (TYPE_LENGTH (valtype) / 2), |
afd48b75 AC |
1462 | valtype); |
1463 | } | |
1464 | } | |
1465 | } | |
1466 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1467 | } | |
1468 | /* Big complex values get stored in f1:f4. */ | |
944fcfab | 1469 | if (TYPE_CODE (valtype) == TYPE_CODE_COMPLEX && TYPE_LENGTH (valtype) == 32) |
afd48b75 AC |
1470 | { |
1471 | if (regcache != NULL) | |
1472 | { | |
1473 | int i; | |
1474 | for (i = 0; i < 4; i++) | |
1475 | { | |
963e2bb7 | 1476 | if (writebuf != NULL) |
366f009f | 1477 | regcache_cooked_write (regcache, tdep->ppc_fp0_regnum + 1 + i, |
963e2bb7 AC |
1478 | (const bfd_byte *) writebuf + i * 8); |
1479 | if (readbuf != NULL) | |
366f009f | 1480 | regcache_cooked_read (regcache, tdep->ppc_fp0_regnum + 1 + i, |
963e2bb7 | 1481 | (bfd_byte *) readbuf + i * 8); |
afd48b75 AC |
1482 | } |
1483 | } | |
1484 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1485 | } | |
1486 | return RETURN_VALUE_STRUCT_CONVENTION; | |
1487 | } | |
1488 | ||
6066c3de AC |
1489 | CORE_ADDR |
1490 | ppc64_sysv_abi_adjust_breakpoint_address (struct gdbarch *gdbarch, | |
1491 | CORE_ADDR bpaddr) | |
1492 | { | |
1493 | /* PPC64 SYSV specifies that the minimal-symbol "FN" should point at | |
1494 | a function-descriptor while the corresponding minimal-symbol | |
1495 | ".FN" should point at the entry point. Consequently, a command | |
1496 | like "break FN" applied to an object file with only minimal | |
1497 | symbols, will insert the breakpoint into the descriptor at "FN" | |
1498 | and not the function at ".FN". Avoid this confusion by adjusting | |
1499 | any attempt to set a descriptor breakpoint into a corresponding | |
1500 | function breakpoint. Note that GDB warns the user when this | |
1501 | adjustment is applied - that's ok as otherwise the user will have | |
1502 | no way of knowing why their breakpoint at "FN" resulted in the | |
1503 | program stopping at ".FN". */ | |
1504 | return gdbarch_convert_from_func_ptr_addr (gdbarch, bpaddr, ¤t_target); | |
1505 | } |