Remove some cleanups from search_minsyms_for_name
[deliverable/binutils-gdb.git] / gdb / ppc64-tdep.c
CommitLineData
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1/* Common target-dependent code for ppc64 GDB, the GNU debugger.
2
e2882c85 3 Copyright (C) 1986-2018 Free Software Foundation, Inc.
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4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20#include "defs.h"
21#include "frame.h"
22#include "gdbcore.h"
cf90fd9a 23#include "infrun.h"
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24#include "ppc-tdep.h"
25#include "ppc64-tdep.h"
24c274a1 26#include "elf-bfd.h"
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27
28/* Macros for matching instructions. Note that, since all the
29 operands are masked off before they're or-ed into the instruction,
30 you can use -1 to make masks. */
31
32#define insn_d(opcd, rts, ra, d) \
33 ((((opcd) & 0x3f) << 26) \
34 | (((rts) & 0x1f) << 21) \
35 | (((ra) & 0x1f) << 16) \
36 | ((d) & 0xffff))
37
38#define insn_ds(opcd, rts, ra, d, xo) \
39 ((((opcd) & 0x3f) << 26) \
40 | (((rts) & 0x1f) << 21) \
41 | (((ra) & 0x1f) << 16) \
42 | ((d) & 0xfffc) \
43 | ((xo) & 0x3))
44
45#define insn_xfx(opcd, rts, spr, xo) \
46 ((((opcd) & 0x3f) << 26) \
47 | (((rts) & 0x1f) << 21) \
48 | (((spr) & 0x1f) << 16) \
49 | (((spr) & 0x3e0) << 6) \
50 | (((xo) & 0x3ff) << 1))
51
db9077b7
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52/* PLT_OFF is the TOC-relative offset of a 64-bit PowerPC PLT entry.
53 Return the function's entry point. */
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54
55static CORE_ADDR
db9077b7 56ppc64_plt_entry_point (struct frame_info *frame, CORE_ADDR plt_off)
45fe57e7 57{
db9077b7 58 struct gdbarch *gdbarch = get_frame_arch (frame);
45fe57e7 59 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
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60 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
61 CORE_ADDR tocp;
62
63 if (execution_direction == EXEC_REVERSE)
64 {
65 /* If executing in reverse, r2 will have been stored to the stack. */
66 CORE_ADDR sp = get_frame_register_unsigned (frame,
67 tdep->ppc_gp0_regnum + 1);
68 unsigned int sp_off = tdep->elf_abi == POWERPC_ELF_V1 ? 40 : 24;
69 tocp = read_memory_unsigned_integer (sp + sp_off, 8, byte_order);
70 }
71 else
72 tocp = get_frame_register_unsigned (frame, tdep->ppc_gp0_regnum + 2);
73
ef1bc9e7 74 /* The first word of the PLT entry is the function entry point. */
db9077b7 75 return read_memory_unsigned_integer (tocp + plt_off, 8, byte_order);
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76}
77
845d4708
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78/* Patterns for the standard linkage functions. These are built by
79 build_plt_stub in bfd/elf64-ppc.c. */
80
ef1bc9e7 81/* Old ELFv1 PLT call stub. */
45fe57e7 82
7433498b 83static const struct ppc_insn_pattern ppc64_standard_linkage1[] =
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84 {
85 /* addis r12, r2, <any> */
86 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
87
88 /* std r2, 40(r1) */
89 { -1, insn_ds (62, 2, 1, 40, 0), 0 },
90
91 /* ld r11, <any>(r12) */
92 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
93
94 /* addis r12, r12, 1 <optional> */
95 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
96
97 /* ld r2, <any>(r12) */
98 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
99
100 /* addis r12, r12, 1 <optional> */
101 { insn_d (-1, -1, -1, -1), insn_d (15, 12, 12, 1), 1 },
102
103 /* mtctr r11 */
104 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
105
106 /* ld r11, <any>(r12) <optional> */
107 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 1 },
108
109 /* bctr */
110 { -1, 0x4e800420, 0 },
111
112 { 0, 0, 0 }
113 };
114
ef1bc9e7 115/* ELFv1 PLT call stub to access PLT entries more than +/- 32k from r2.
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116 Also supports older stub with different placement of std 2,40(1),
117 a stub that omits the std 2,40(1), and both versions of power7
118 thread safety read barriers. Note that there are actually two more
119 instructions following "cmpldi r2, 0", "bnectr+" and "b <glink_i>",
120 but there isn't any need to match them. */
45fe57e7 121
7433498b 122static const struct ppc_insn_pattern ppc64_standard_linkage2[] =
45fe57e7 123 {
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124 /* std r2, 40(r1) <optional> */
125 { -1, insn_ds (62, 2, 1, 40, 0), 1 },
126
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127 /* addis r12, r2, <any> */
128 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
129
845d4708
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130 /* std r2, 40(r1) <optional> */
131 { -1, insn_ds (62, 2, 1, 40, 0), 1 },
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132
133 /* ld r11, <any>(r12) */
134 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 0 },
135
136 /* addi r12, r12, <any> <optional> */
137 { insn_d (-1, -1, -1, 0), insn_d (14, 12, 12, 0), 1 },
138
139 /* mtctr r11 */
140 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
141
845d4708
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142 /* xor r11, r11, r11 <optional> */
143 { -1, 0x7d6b5a78, 1 },
144
145 /* add r12, r12, r11 <optional> */
146 { -1, 0x7d8c5a14, 1 },
147
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148 /* ld r2, <any>(r12) */
149 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 12, 0, 0), 0 },
150
151 /* ld r11, <any>(r12) <optional> */
152 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 12, 0, 0), 1 },
153
845d4708
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154 /* bctr <optional> */
155 { -1, 0x4e800420, 1 },
156
157 /* cmpldi r2, 0 <optional> */
158 { -1, 0x28220000, 1 },
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159
160 { 0, 0, 0 }
161 };
162
ef1bc9e7 163/* ELFv1 PLT call stub to access PLT entries within +/- 32k of r2. */
45fe57e7 164
7433498b 165static const struct ppc_insn_pattern ppc64_standard_linkage3[] =
45fe57e7 166 {
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167 /* std r2, 40(r1) <optional> */
168 { -1, insn_ds (62, 2, 1, 40, 0), 1 },
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169
170 /* ld r11, <any>(r2) */
171 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 0 },
172
173 /* addi r2, r2, <any> <optional> */
174 { insn_d (-1, -1, -1, 0), insn_d (14, 2, 2, 0), 1 },
175
176 /* mtctr r11 */
177 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 11, 9, 467), 0 },
178
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179 /* xor r11, r11, r11 <optional> */
180 { -1, 0x7d6b5a78, 1 },
181
182 /* add r2, r2, r11 <optional> */
183 { -1, 0x7c425a14, 1 },
184
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185 /* ld r11, <any>(r2) <optional> */
186 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 1 },
187
188 /* ld r2, <any>(r2) */
189 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 2, 0, 0), 0 },
190
845d4708
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191 /* bctr <optional> */
192 { -1, 0x4e800420, 1 },
193
194 /* cmpldi r2, 0 <optional> */
195 { -1, 0x28220000, 1 },
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196
197 { 0, 0, 0 }
198 };
199
ef1bc9e7
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200/* ELFv1 PLT call stub to access PLT entries more than +/- 32k from r2.
201 A more modern variant of ppc64_standard_linkage2 differing in
202 register usage. */
203
7433498b 204static const struct ppc_insn_pattern ppc64_standard_linkage4[] =
ef1bc9e7
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205 {
206 /* std r2, 40(r1) <optional> */
207 { -1, insn_ds (62, 2, 1, 40, 0), 1 },
208
209 /* addis r11, r2, <any> */
210 { insn_d (-1, -1, -1, 0), insn_d (15, 11, 2, 0), 0 },
211
212 /* ld r12, <any>(r11) */
213 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 12, 11, 0, 0), 0 },
214
215 /* addi r11, r11, <any> <optional> */
216 { insn_d (-1, -1, -1, 0), insn_d (14, 11, 11, 0), 1 },
217
218 /* mtctr r12 */
219 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
220
221 /* xor r2, r12, r12 <optional> */
222 { -1, 0x7d826278, 1 },
223
224 /* add r11, r11, r2 <optional> */
225 { -1, 0x7d6b1214, 1 },
226
227 /* ld r2, <any>(r11) */
228 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 11, 0, 0), 0 },
229
230 /* ld r11, <any>(r11) <optional> */
231 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 11, 0, 0), 1 },
232
233 /* bctr <optional> */
234 { -1, 0x4e800420, 1 },
235
236 /* cmpldi r2, 0 <optional> */
237 { -1, 0x28220000, 1 },
238
239 { 0, 0, 0 }
240 };
241
242/* ELFv1 PLT call stub to access PLT entries within +/- 32k of r2.
243 A more modern variant of ppc64_standard_linkage3 differing in
244 register usage. */
245
7433498b 246static const struct ppc_insn_pattern ppc64_standard_linkage5[] =
ef1bc9e7
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247 {
248 /* std r2, 40(r1) <optional> */
249 { -1, insn_ds (62, 2, 1, 40, 0), 1 },
250
251 /* ld r12, <any>(r2) */
252 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 12, 2, 0, 0), 0 },
253
254 /* addi r2, r2, <any> <optional> */
255 { insn_d (-1, -1, -1, 0), insn_d (14, 2, 2, 0), 1 },
256
257 /* mtctr r12 */
258 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
259
260 /* xor r11, r12, r12 <optional> */
261 { -1, 0x7d8b6278, 1 },
262
263 /* add r2, r2, r11 <optional> */
264 { -1, 0x7c425a14, 1 },
265
266 /* ld r11, <any>(r2) <optional> */
267 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 11, 2, 0, 0), 1 },
268
269 /* ld r2, <any>(r2) */
270 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 2, 2, 0, 0), 0 },
271
272 /* bctr <optional> */
273 { -1, 0x4e800420, 1 },
274
275 /* cmpldi r2, 0 <optional> */
276 { -1, 0x28220000, 1 },
277
278 { 0, 0, 0 }
279 };
280
281/* ELFv2 PLT call stub to access PLT entries more than +/- 32k from r2. */
282
7433498b 283static const struct ppc_insn_pattern ppc64_standard_linkage6[] =
ef1bc9e7
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284 {
285 /* std r2, 24(r1) <optional> */
286 { -1, insn_ds (62, 2, 1, 24, 0), 1 },
287
288 /* addis r11, r2, <any> */
289 { insn_d (-1, -1, -1, 0), insn_d (15, 11, 2, 0), 0 },
290
291 /* ld r12, <any>(r11) */
292 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 12, 11, 0, 0), 0 },
293
294 /* mtctr r12 */
295 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
296
297 /* bctr */
298 { -1, 0x4e800420, 0 },
299
300 { 0, 0, 0 }
301 };
302
303/* ELFv2 PLT call stub to access PLT entries within +/- 32k of r2. */
304
7433498b 305static const struct ppc_insn_pattern ppc64_standard_linkage7[] =
ef1bc9e7
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306 {
307 /* std r2, 24(r1) <optional> */
fa0079ea 308 { -1, insn_ds (62, 2, 1, 24, 0), 1 },
ef1bc9e7
AM
309
310 /* ld r12, <any>(r2) */
311 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 12, 2, 0, 0), 0 },
312
313 /* mtctr r12 */
314 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
315
316 /* bctr */
317 { -1, 0x4e800420, 0 },
318
319 { 0, 0, 0 }
320 };
321
397998fc
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322/* ELFv2 PLT call stub to access PLT entries more than +/- 32k from r2,
323 supporting fusion. */
324
7433498b 325static const struct ppc_insn_pattern ppc64_standard_linkage8[] =
397998fc
AM
326 {
327 /* std r2, 24(r1) <optional> */
328 { -1, insn_ds (62, 2, 1, 24, 0), 1 },
329
330 /* addis r12, r2, <any> */
331 { insn_d (-1, -1, -1, 0), insn_d (15, 12, 2, 0), 0 },
332
333 /* ld r12, <any>(r12) */
334 { insn_ds (-1, -1, -1, 0, -1), insn_ds (58, 12, 12, 0, 0), 0 },
335
336 /* mtctr r12 */
337 { insn_xfx (-1, -1, -1, -1), insn_xfx (31, 12, 9, 467), 0 },
338
339 /* bctr */
340 { -1, 0x4e800420, 0 },
341
342 { 0, 0, 0 }
343 };
344
45fe57e7
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345/* When the dynamic linker is doing lazy symbol resolution, the first
346 call to a function in another object will go like this:
347
348 - The user's function calls the linkage function:
349
845d4708
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350 100003d4: 4b ff ff ad bl 10000380 <nnnn.plt_call.printf>
351 100003d8: e8 41 00 28 ld r2,40(r1)
45fe57e7 352
845d4708
AM
353 - The linkage function loads the entry point and toc pointer from
354 the function descriptor in the PLT, and jumps to it:
45fe57e7 355
845d4708
AM
356 <nnnn.plt_call.printf>:
357 10000380: f8 41 00 28 std r2,40(r1)
358 10000384: e9 62 80 78 ld r11,-32648(r2)
359 10000388: 7d 69 03 a6 mtctr r11
360 1000038c: e8 42 80 80 ld r2,-32640(r2)
361 10000390: 28 22 00 00 cmpldi r2,0
362 10000394: 4c e2 04 20 bnectr+
363 10000398: 48 00 03 a0 b 10000738 <printf@plt>
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364
365 - But since this is the first time that PLT entry has been used, it
845d4708
AM
366 sends control to its glink entry. That loads the number of the
367 PLT entry and jumps to the common glink0 code:
45fe57e7 368
845d4708
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369 <printf@plt>:
370 10000738: 38 00 00 01 li r0,1
371 1000073c: 4b ff ff bc b 100006f8 <__glink_PLTresolve>
45fe57e7
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372
373 - The common glink0 code then transfers control to the dynamic
845d4708
AM
374 linker's fixup code:
375
376 100006f0: 0000000000010440 .quad plt0 - (. + 16)
377 <__glink_PLTresolve>:
378 100006f8: 7d 88 02 a6 mflr r12
379 100006fc: 42 9f 00 05 bcl 20,4*cr7+so,10000700
380 10000700: 7d 68 02 a6 mflr r11
381 10000704: e8 4b ff f0 ld r2,-16(r11)
382 10000708: 7d 88 03 a6 mtlr r12
383 1000070c: 7d 82 5a 14 add r12,r2,r11
384 10000710: e9 6c 00 00 ld r11,0(r12)
385 10000714: e8 4c 00 08 ld r2,8(r12)
386 10000718: 7d 69 03 a6 mtctr r11
387 1000071c: e9 6c 00 10 ld r11,16(r12)
388 10000720: 4e 80 04 20 bctr
45fe57e7
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389
390 Eventually, this code will figure out how to skip all of this,
391 including the dynamic linker. At the moment, we just get through
392 the linkage function. */
393
394/* If the current thread is about to execute a series of instructions
db9077b7 395 matching the ppc64_standard_linkage pattern, and INSN is the result
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396 from that pattern match, return the code address to which the
397 standard linkage function will send them. (This doesn't deal with
398 dynamic linker lazy symbol resolution stubs.) */
399
400static CORE_ADDR
db9077b7 401ppc64_standard_linkage1_target (struct frame_info *frame, unsigned int *insn)
45fe57e7 402{
db9077b7
AM
403 CORE_ADDR plt_off = ((ppc_insn_d_field (insn[0]) << 16)
404 + ppc_insn_ds_field (insn[2]));
45fe57e7 405
db9077b7 406 return ppc64_plt_entry_point (frame, plt_off);
45fe57e7
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407}
408
409static CORE_ADDR
db9077b7 410ppc64_standard_linkage2_target (struct frame_info *frame, unsigned int *insn)
45fe57e7 411{
db9077b7
AM
412 CORE_ADDR plt_off = ((ppc_insn_d_field (insn[1]) << 16)
413 + ppc_insn_ds_field (insn[3]));
45fe57e7 414
db9077b7 415 return ppc64_plt_entry_point (frame, plt_off);
45fe57e7
AT
416}
417
418static CORE_ADDR
db9077b7 419ppc64_standard_linkage3_target (struct frame_info *frame, unsigned int *insn)
45fe57e7 420{
db9077b7 421 CORE_ADDR plt_off = ppc_insn_ds_field (insn[1]);
45fe57e7 422
db9077b7 423 return ppc64_plt_entry_point (frame, plt_off);
ef1bc9e7
AM
424}
425
426static CORE_ADDR
db9077b7 427ppc64_standard_linkage4_target (struct frame_info *frame, unsigned int *insn)
ef1bc9e7 428{
db9077b7
AM
429 CORE_ADDR plt_off = ((ppc_insn_d_field (insn[1]) << 16)
430 + ppc_insn_ds_field (insn[2]));
ef1bc9e7 431
db9077b7 432 return ppc64_plt_entry_point (frame, plt_off);
45fe57e7
AT
433}
434
435
436/* Given that we've begun executing a call trampoline at PC, return
ddeca1df
WW
437 the entry point of the function the trampoline will go to.
438
439 When the execution direction is EXEC_REVERSE, scan backward to
440 check whether we are in the middle of a PLT stub. */
45fe57e7 441
141c5cc4
JK
442static CORE_ADDR
443ppc64_skip_trampoline_code_1 (struct frame_info *frame, CORE_ADDR pc)
45fe57e7 444{
845d4708 445#define MAX(a,b) ((a) > (b) ? (a) : (b))
ef1bc9e7
AM
446 unsigned int insns[MAX (MAX (MAX (ARRAY_SIZE (ppc64_standard_linkage1),
447 ARRAY_SIZE (ppc64_standard_linkage2)),
448 MAX (ARRAY_SIZE (ppc64_standard_linkage3),
449 ARRAY_SIZE (ppc64_standard_linkage4))),
450 MAX (MAX (ARRAY_SIZE (ppc64_standard_linkage5),
451 ARRAY_SIZE (ppc64_standard_linkage6)),
397998fc
AM
452 MAX (ARRAY_SIZE (ppc64_standard_linkage7),
453 ARRAY_SIZE (ppc64_standard_linkage8))))
454 - 1];
45fe57e7 455 CORE_ADDR target;
cf90fd9a
WW
456 int scan_limit, i;
457
458 scan_limit = 1;
459 /* When reverse-debugging, scan backward to check whether we are
460 in the middle of trampoline code. */
461 if (execution_direction == EXEC_REVERSE)
462 scan_limit = ARRAY_SIZE (insns) - 1;
463
464 for (i = 0; i < scan_limit; i++)
465 {
466 if (i < ARRAY_SIZE (ppc64_standard_linkage8) - 1
467 && ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage8, insns))
db9077b7 468 pc = ppc64_standard_linkage4_target (frame, insns);
cf90fd9a
WW
469 else if (i < ARRAY_SIZE (ppc64_standard_linkage7) - 1
470 && ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage7,
471 insns))
db9077b7 472 pc = ppc64_standard_linkage3_target (frame, insns);
cf90fd9a
WW
473 else if (i < ARRAY_SIZE (ppc64_standard_linkage6) - 1
474 && ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage6,
475 insns))
db9077b7 476 pc = ppc64_standard_linkage4_target (frame, insns);
cf90fd9a
WW
477 else if (i < ARRAY_SIZE (ppc64_standard_linkage5) - 1
478 && ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage5,
479 insns)
480 && (insns[8] != 0 || insns[9] != 0))
db9077b7 481 pc = ppc64_standard_linkage3_target (frame, insns);
cf90fd9a
WW
482 else if (i < ARRAY_SIZE (ppc64_standard_linkage4) - 1
483 && ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage4,
484 insns)
485 && (insns[9] != 0 || insns[10] != 0))
db9077b7 486 pc = ppc64_standard_linkage4_target (frame, insns);
cf90fd9a
WW
487 else if (i < ARRAY_SIZE (ppc64_standard_linkage3) - 1
488 && ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage3,
489 insns)
490 && (insns[8] != 0 || insns[9] != 0))
db9077b7 491 pc = ppc64_standard_linkage3_target (frame, insns);
cf90fd9a
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492 else if (i < ARRAY_SIZE (ppc64_standard_linkage2) - 1
493 && ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage2,
494 insns)
495 && (insns[10] != 0 || insns[11] != 0))
db9077b7 496 pc = ppc64_standard_linkage2_target (frame, insns);
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497 else if (i < ARRAY_SIZE (ppc64_standard_linkage1) - 1
498 && ppc_insns_match_pattern (frame, pc, ppc64_standard_linkage1,
499 insns))
db9077b7 500 pc = ppc64_standard_linkage1_target (frame, insns);
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501 else
502 {
503 /* Scan backward one more instructions if doesn't match. */
504 pc -= 4;
505 continue;
506 }
507
508 /* The PLT descriptor will either point to the already resolved target
509 address, or else to a glink stub. As the latter carry synthetic @plt
510 symbols, find_solib_trampoline_target should be able to resolve them. */
511 target = find_solib_trampoline_target (frame, pc);
512 return target ? target : pc;
513 }
514
515 return 0;
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516}
517
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518/* Wrapper of ppc64_skip_trampoline_code_1 checking also
519 ppc_elfv2_skip_entrypoint. */
520
521CORE_ADDR
522ppc64_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
523{
524 struct gdbarch *gdbarch = get_frame_arch (frame);
525
526 pc = ppc64_skip_trampoline_code_1 (frame, pc);
527 if (pc != 0 && gdbarch_skip_entrypoint_p (gdbarch))
528 pc = gdbarch_skip_entrypoint (gdbarch, pc);
529 return pc;
530}
531
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532/* Support for convert_from_func_ptr_addr (ARCH, ADDR, TARG) on PPC64
533 GNU/Linux.
534
535 Usually a function pointer's representation is simply the address
536 of the function. On GNU/Linux on the PowerPC however, a function
537 pointer may be a pointer to a function descriptor.
538
539 For PPC64, a function descriptor is a TOC entry, in a data section,
540 which contains three words: the first word is the address of the
541 function, the second word is the TOC pointer (r2), and the third word
542 is the static chain value.
543
544 Throughout GDB it is currently assumed that a function pointer contains
545 the address of the function, which is not easy to fix. In addition, the
546 conversion of a function address to a function pointer would
547 require allocation of a TOC entry in the inferior's memory space,
548 with all its drawbacks. To be able to call C++ virtual methods in
549 the inferior (which are called via function pointers),
550 find_function_addr uses this function to get the function address
551 from a function pointer.
552
553 If ADDR points at what is clearly a function descriptor, transform
554 it into the address of the corresponding function, if needed. Be
555 conservative, otherwise GDB will do the transformation on any
556 random addresses such as occur when there is no symbol table. */
557
558CORE_ADDR
559ppc64_convert_from_func_ptr_addr (struct gdbarch *gdbarch,
560 CORE_ADDR addr,
561 struct target_ops *targ)
562{
563 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
564 struct target_section *s = target_section_by_addr (targ, addr);
565
566 /* Check if ADDR points to a function descriptor. */
567 if (s && strcmp (s->the_bfd_section->name, ".opd") == 0)
568 {
569 /* There may be relocations that need to be applied to the .opd
570 section. Unfortunately, this function may be called at a time
571 where these relocations have not yet been performed -- this can
572 happen for example shortly after a library has been loaded with
573 dlopen, but ld.so has not yet applied the relocations.
574
575 To cope with both the case where the relocation has been applied,
576 and the case where it has not yet been applied, we do *not* read
577 the (maybe) relocated value from target memory, but we instead
578 read the non-relocated value from the BFD, and apply the relocation
579 offset manually.
580
581 This makes the assumption that all .opd entries are always relocated
582 by the same offset the section itself was relocated. This should
583 always be the case for GNU/Linux executables and shared libraries.
584 Note that other kind of object files (e.g. those added via
585 add-symbol-files) will currently never end up here anyway, as this
586 function accesses *target* sections only; only the main exec and
587 shared libraries are ever added to the target. */
588
589 gdb_byte buf[8];
590 int res;
591
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592 res = bfd_get_section_contents (s->the_bfd_section->owner,
593 s->the_bfd_section,
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594 &buf, addr - s->addr, 8);
595 if (res != 0)
596 return extract_unsigned_integer (buf, 8, byte_order)
597 - bfd_section_vma (s->bfd, s->the_bfd_section) + s->addr;
598 }
599
600 return addr;
601}
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602
603/* A synthetic 'dot' symbols on ppc64 has the udata.p entry pointing
604 back to the original ELF symbol it was derived from. Get the size
605 from that symbol. */
606
607void
608ppc64_elf_make_msymbol_special (asymbol *sym, struct minimal_symbol *msym)
609{
610 if ((sym->flags & BSF_SYNTHETIC) != 0 && sym->udata.p != NULL)
611 {
612 elf_symbol_type *elf_sym = (elf_symbol_type *) sym->udata.p;
613 SET_MSYMBOL_SIZE (msym, elf_sym->internal_elf_sym.st_size);
614 }
615}
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