Put mi and tui comments for free -> xfree change in proper ChangeLogs.
[deliverable/binutils-gdb.git] / gdb / regcache.c
CommitLineData
32178cab
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1/* Cache and manage the values of registers for GDB, the GNU debugger.
2 Copyright 1986, 87, 89, 91, 94, 95, 96, 1998, 2000
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "frame.h"
24#include "inferior.h"
25#include "target.h"
26#include "gdbarch.h"
705152c5 27#include "gdbcmd.h"
32178cab
MS
28
29/*
30 * DATA STRUCTURE
31 *
32 * Here is the actual register cache.
33 */
34
35/* NOTE: this is a write-back cache. There is no "dirty" bit for
36 recording if the register values have been changed (eg. by the
37 user). Therefore all registers must be written back to the
38 target when appropriate. */
39
40/* REGISTERS contains the cached register values (in target byte order). */
41
42char *registers;
43
44/* REGISTER_VALID is 0 if the register needs to be fetched,
45 1 if it has been fetched, and
46 -1 if the register value was not available.
47 "Not available" means don't try to fetch it again. */
48
49signed char *register_valid;
50
51/* The thread/process associated with the current set of registers.
52 For now, -1 is special, and means `no current process'. */
53
54static int registers_pid = -1;
55
56/*
57 * FUNCTIONS:
58 */
59
60/* REGISTER_CACHED()
61
62 Returns 0 if the value is not in the cache (needs fetch).
63 >0 if the value is in the cache.
64 <0 if the value is permanently unavailable (don't ask again). */
65
66int
67register_cached (int regnum)
68{
69 return register_valid[regnum];
70}
71
2dc4e391
DT
72/* REGISTER_CHANGED
73
74 invalidate a single register REGNUM in the cache */
75void
76register_changed (int regnum)
77{
78 register_valid[regnum] = 0;
79}
80
32178cab
MS
81/* FIND_SAVED_REGISTER ()
82
83 Return the address in which frame FRAME's value of register REGNUM
84 has been saved in memory. Or return zero if it has not been saved.
85 If REGNUM specifies the SP, the value we return is actually
86 the SP value, not an address where it was saved. */
87
88CORE_ADDR
89find_saved_register (struct frame_info *frame, int regnum)
90{
91 register struct frame_info *frame1 = NULL;
92 register CORE_ADDR addr = 0;
93
94 if (frame == NULL) /* No regs saved if want current frame */
95 return 0;
96
97#ifdef HAVE_REGISTER_WINDOWS
98 /* We assume that a register in a register window will only be saved
99 in one place (since the name changes and/or disappears as you go
100 towards inner frames), so we only call get_frame_saved_regs on
101 the current frame. This is directly in contradiction to the
102 usage below, which assumes that registers used in a frame must be
103 saved in a lower (more interior) frame. This change is a result
104 of working on a register window machine; get_frame_saved_regs
105 always returns the registers saved within a frame, within the
106 context (register namespace) of that frame. */
107
108 /* However, note that we don't want this to return anything if
109 nothing is saved (if there's a frame inside of this one). Also,
110 callers to this routine asking for the stack pointer want the
111 stack pointer saved for *this* frame; this is returned from the
112 next frame. */
113
114 if (REGISTER_IN_WINDOW_P (regnum))
115 {
116 frame1 = get_next_frame (frame);
117 if (!frame1)
118 return 0; /* Registers of this frame are active. */
119
120 /* Get the SP from the next frame in; it will be this
121 current frame. */
122 if (regnum != SP_REGNUM)
123 frame1 = frame;
124
125 FRAME_INIT_SAVED_REGS (frame1);
126 return frame1->saved_regs[regnum]; /* ... which might be zero */
127 }
128#endif /* HAVE_REGISTER_WINDOWS */
129
130 /* Note that this next routine assumes that registers used in
131 frame x will be saved only in the frame that x calls and
132 frames interior to it. This is not true on the sparc, but the
133 above macro takes care of it, so we should be all right. */
134 while (1)
135 {
136 QUIT;
137 frame1 = get_prev_frame (frame1);
138 if (frame1 == 0 || frame1 == frame)
139 break;
140 FRAME_INIT_SAVED_REGS (frame1);
141 if (frame1->saved_regs[regnum])
142 addr = frame1->saved_regs[regnum];
143 }
144
145 return addr;
146}
147
148/* DEFAULT_GET_SAVED_REGISTER ()
149
150 Find register number REGNUM relative to FRAME and put its (raw,
151 target format) contents in *RAW_BUFFER. Set *OPTIMIZED if the
152 variable was optimized out (and thus can't be fetched). Set *LVAL
153 to lval_memory, lval_register, or not_lval, depending on whether
154 the value was fetched from memory, from a register, or in a strange
155 and non-modifiable way (e.g. a frame pointer which was calculated
156 rather than fetched). Set *ADDRP to the address, either in memory
157 on as a REGISTER_BYTE offset into the registers array.
158
159 Note that this implementation never sets *LVAL to not_lval. But
160 it can be replaced by defining GET_SAVED_REGISTER and supplying
161 your own.
162
163 The argument RAW_BUFFER must point to aligned memory. */
164
165static void
166default_get_saved_register (char *raw_buffer,
167 int *optimized,
168 CORE_ADDR *addrp,
169 struct frame_info *frame,
170 int regnum,
171 enum lval_type *lval)
172{
173 CORE_ADDR addr;
174
175 if (!target_has_registers)
176 error ("No registers.");
177
178 /* Normal systems don't optimize out things with register numbers. */
179 if (optimized != NULL)
180 *optimized = 0;
181 addr = find_saved_register (frame, regnum);
182 if (addr != 0)
183 {
184 if (lval != NULL)
185 *lval = lval_memory;
186 if (regnum == SP_REGNUM)
187 {
188 if (raw_buffer != NULL)
189 {
190 /* Put it back in target format. */
191 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
192 (LONGEST) addr);
193 }
194 if (addrp != NULL)
195 *addrp = 0;
196 return;
197 }
198 if (raw_buffer != NULL)
199 target_read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
200 }
201 else
202 {
203 if (lval != NULL)
204 *lval = lval_register;
205 addr = REGISTER_BYTE (regnum);
206 if (raw_buffer != NULL)
207 read_register_gen (regnum, raw_buffer);
208 }
209 if (addrp != NULL)
210 *addrp = addr;
211}
212
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AC
213#if !defined (GET_SAVED_REGISTER)
214#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
215 default_get_saved_register(raw_buffer, optimized, addrp, frame, regnum, lval)
216#endif
217
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218void
219get_saved_register (char *raw_buffer,
220 int *optimized,
221 CORE_ADDR *addrp,
222 struct frame_info *frame,
223 int regnum,
224 enum lval_type *lval)
225{
226 GET_SAVED_REGISTER (raw_buffer, optimized, addrp, frame, regnum, lval);
227}
228
229/* READ_RELATIVE_REGISTER_RAW_BYTES_FOR_FRAME
230
231 Copy the bytes of register REGNUM, relative to the input stack frame,
232 into our memory at MYADDR, in target byte order.
233 The number of bytes copied is REGISTER_RAW_SIZE (REGNUM).
234
235 Returns 1 if could not be read, 0 if could. */
236
237/* FIXME: This function increases the confusion between FP_REGNUM
238 and the virtual/pseudo-frame pointer. */
239
240static int
241read_relative_register_raw_bytes_for_frame (int regnum,
242 char *myaddr,
243 struct frame_info *frame)
244{
245 int optim;
246 if (regnum == FP_REGNUM && frame)
247 {
248 /* Put it back in target format. */
249 store_address (myaddr, REGISTER_RAW_SIZE (FP_REGNUM),
250 (LONGEST) FRAME_FP (frame));
251
252 return 0;
253 }
254
255 get_saved_register (myaddr, &optim, (CORE_ADDR *) NULL, frame,
256 regnum, (enum lval_type *) NULL);
257
258 if (register_valid[regnum] < 0)
259 return 1; /* register value not available */
260
261 return optim;
262}
263
264/* READ_RELATIVE_REGISTER_RAW_BYTES
265
266 Copy the bytes of register REGNUM, relative to the current stack
267 frame, into our memory at MYADDR, in target byte order.
268 The number of bytes copied is REGISTER_RAW_SIZE (REGNUM).
269
270 Returns 1 if could not be read, 0 if could. */
271
272int
273read_relative_register_raw_bytes (int regnum, char *myaddr)
274{
275 return read_relative_register_raw_bytes_for_frame (regnum, myaddr,
276 selected_frame);
277}
278
279
280/* Low level examining and depositing of registers.
281
282 The caller is responsible for making sure that the inferior is
283 stopped before calling the fetching routines, or it will get
284 garbage. (a change from GDB version 3, in which the caller got the
285 value from the last stop). */
286
287/* REGISTERS_CHANGED ()
288
289 Indicate that registers may have changed, so invalidate the cache. */
290
291void
292registers_changed (void)
293{
294 int i;
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295
296 registers_pid = -1;
297
298 /* Force cleanup of any alloca areas if using C alloca instead of
299 a builtin alloca. This particular call is used to clean up
300 areas allocated by low level target code which may build up
301 during lengthy interactions between gdb and the target before
302 gdb gives control to the user (ie watchpoints). */
303 alloca (0);
304
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305 for (i = 0; i < ARCH_NUM_REGS; i++)
306 register_valid[i] = 0;
307
308 /* Assume that if all the hardware regs have changed,
309 then so have the pseudo-registers. */
310 for (i = NUM_REGS; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
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311 register_valid[i] = 0;
312
313 if (registers_changed_hook)
314 registers_changed_hook ();
315}
316
317/* REGISTERS_FETCHED ()
318
319 Indicate that all registers have been fetched, so mark them all valid. */
320
321
322void
323registers_fetched (void)
324{
325 int i;
32178cab 326
fcdc5976 327 for (i = 0; i < ARCH_NUM_REGS; i++)
32178cab 328 register_valid[i] = 1;
fcdc5976
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329 /* Do not assume that the pseudo-regs have also been fetched.
330 Fetching all real regs might not account for all pseudo-regs. */
32178cab
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331}
332
333/* read_register_bytes and write_register_bytes are generally a *BAD*
334 idea. They are inefficient because they need to check for partial
335 updates, which can only be done by scanning through all of the
336 registers and seeing if the bytes that are being read/written fall
337 inside of an invalid register. [The main reason this is necessary
338 is that register sizes can vary, so a simple index won't suffice.]
339 It is far better to call read_register_gen and write_register_gen
340 if you want to get at the raw register contents, as it only takes a
341 regno as an argument, and therefore can't do a partial register
342 update.
343
344 Prior to the recent fixes to check for partial updates, both read
345 and write_register_bytes always checked to see if any registers
346 were stale, and then called target_fetch_registers (-1) to update
347 the whole set. This caused really slowed things down for remote
348 targets. */
349
350/* Copy INLEN bytes of consecutive data from registers
351 starting with the INREGBYTE'th byte of register data
352 into memory at MYADDR. */
353
354void
355read_register_bytes (int inregbyte, char *myaddr, int inlen)
356{
357 int inregend = inregbyte + inlen;
358 int regno;
359
360 if (registers_pid != inferior_pid)
361 {
362 registers_changed ();
363 registers_pid = inferior_pid;
364 }
365
366 /* See if we are trying to read bytes from out-of-date registers. If so,
367 update just those registers. */
368
fcdc5976 369 for (regno = 0; regno < NUM_REGS + NUM_PSEUDO_REGS; regno++)
32178cab
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370 {
371 int regstart, regend;
372
373 if (register_valid[regno])
374 continue;
375
376 if (REGISTER_NAME (regno) == NULL || *REGISTER_NAME (regno) == '\0')
377 continue;
378
379 regstart = REGISTER_BYTE (regno);
380 regend = regstart + REGISTER_RAW_SIZE (regno);
381
382 if (regend <= inregbyte || inregend <= regstart)
383 /* The range the user wants to read doesn't overlap with regno. */
384 continue;
385
fcdc5976 386 /* We've found an uncached register where at least one byte will be read.
32178cab 387 Update it from the target. */
fcdc5976
MS
388 if (regno < NUM_REGS)
389 target_fetch_registers (regno);
f4160335 390 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 391 FETCH_PSEUDO_REGISTER (regno);
32178cab
MS
392
393 if (!register_valid[regno])
165cd47f
MS
394 {
395 /* Sometimes pseudoregs are never marked valid, so that they
396 will be fetched every time (it can be complicated to know
397 if a pseudoreg is valid, while "fetching" them can be cheap).
398 */
399 if (regno < NUM_REGS)
400 error ("read_register_bytes: Couldn't update register %d.", regno);
401 }
32178cab
MS
402 }
403
404 if (myaddr != NULL)
405 memcpy (myaddr, &registers[inregbyte], inlen);
406}
407
408/* Read register REGNO into memory at MYADDR, which must be large
409 enough for REGISTER_RAW_BYTES (REGNO). Target byte-order. If the
410 register is known to be the size of a CORE_ADDR or smaller,
411 read_register can be used instead. */
412
413void
414read_register_gen (int regno, char *myaddr)
415{
416 if (registers_pid != inferior_pid)
417 {
418 registers_changed ();
419 registers_pid = inferior_pid;
420 }
421
422 if (!register_valid[regno])
fcdc5976
MS
423 {
424 if (regno < NUM_REGS)
425 target_fetch_registers (regno);
426 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 427 FETCH_PSEUDO_REGISTER (regno);
fcdc5976 428 }
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429 memcpy (myaddr, &registers[REGISTER_BYTE (regno)],
430 REGISTER_RAW_SIZE (regno));
431}
432
433/* Write register REGNO at MYADDR to the target. MYADDR points at
434 REGISTER_RAW_BYTES(REGNO), which must be in target byte-order. */
435
436/* Registers we shouldn't try to store. */
437#if !defined (CANNOT_STORE_REGISTER)
438#define CANNOT_STORE_REGISTER(regno) 0
439#endif
440
441void
442write_register_gen (int regno, char *myaddr)
443{
444 int size;
445
446 /* On the sparc, writing %g0 is a no-op, so we don't even want to
447 change the registers array if something writes to this register. */
448 if (CANNOT_STORE_REGISTER (regno))
449 return;
450
451 if (registers_pid != inferior_pid)
452 {
453 registers_changed ();
454 registers_pid = inferior_pid;
455 }
456
457 size = REGISTER_RAW_SIZE (regno);
458
459 /* If we have a valid copy of the register, and new value == old value,
460 then don't bother doing the actual store. */
461
462 if (register_valid[regno]
463 && memcmp (&registers[REGISTER_BYTE (regno)], myaddr, size) == 0)
464 return;
465
fcdc5976
MS
466 if (regno < NUM_REGS)
467 target_prepare_to_store ();
32178cab
MS
468
469 memcpy (&registers[REGISTER_BYTE (regno)], myaddr, size);
470
471 register_valid[regno] = 1;
472
fcdc5976
MS
473 if (regno < NUM_REGS)
474 target_store_registers (regno);
475 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 476 STORE_PSEUDO_REGISTER (regno);
32178cab
MS
477}
478
479/* Copy INLEN bytes of consecutive data from memory at MYADDR
480 into registers starting with the MYREGSTART'th byte of register data. */
481
482void
483write_register_bytes (int myregstart, char *myaddr, int inlen)
484{
485 int myregend = myregstart + inlen;
486 int regno;
487
488 target_prepare_to_store ();
489
490 /* Scan through the registers updating any that are covered by the
491 range myregstart<=>myregend using write_register_gen, which does
492 nice things like handling threads, and avoiding updates when the
493 new and old contents are the same. */
494
fcdc5976 495 for (regno = 0; regno < NUM_REGS + NUM_PSEUDO_REGS; regno++)
32178cab
MS
496 {
497 int regstart, regend;
498
499 regstart = REGISTER_BYTE (regno);
500 regend = regstart + REGISTER_RAW_SIZE (regno);
501
502 /* Is this register completely outside the range the user is writing? */
503 if (myregend <= regstart || regend <= myregstart)
504 /* do nothing */ ;
505
506 /* Is this register completely within the range the user is writing? */
507 else if (myregstart <= regstart && regend <= myregend)
508 write_register_gen (regno, myaddr + (regstart - myregstart));
509
510 /* The register partially overlaps the range being written. */
511 else
512 {
513 char regbuf[MAX_REGISTER_RAW_SIZE];
514 /* What's the overlap between this register's bytes and
515 those the caller wants to write? */
516 int overlapstart = max (regstart, myregstart);
517 int overlapend = min (regend, myregend);
518
519 /* We may be doing a partial update of an invalid register.
520 Update it from the target before scribbling on it. */
521 read_register_gen (regno, regbuf);
522
523 memcpy (registers + overlapstart,
524 myaddr + (overlapstart - myregstart),
525 overlapend - overlapstart);
526
fcdc5976
MS
527 if (regno < NUM_REGS)
528 target_store_registers (regno);
529 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 530 STORE_PSEUDO_REGISTER (regno);
32178cab
MS
531 }
532 }
533}
534
535
536/* Return the raw contents of register REGNO, regarding it as an
173155e8 537 UNSIGNED integer. */
32178cab 538
173155e8 539ULONGEST
32178cab
MS
540read_register (int regno)
541{
542 if (registers_pid != inferior_pid)
543 {
544 registers_changed ();
545 registers_pid = inferior_pid;
546 }
547
548 if (!register_valid[regno])
fcdc5976
MS
549 {
550 if (regno < NUM_REGS)
551 target_fetch_registers (regno);
f4160335 552 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 553 FETCH_PSEUDO_REGISTER (regno);
fcdc5976 554 }
32178cab 555
173155e8 556 return (extract_unsigned_integer (&registers[REGISTER_BYTE (regno)],
32178cab
MS
557 REGISTER_RAW_SIZE (regno)));
558}
559
173155e8 560ULONGEST
32178cab
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561read_register_pid (int regno, int pid)
562{
563 int save_pid;
564 CORE_ADDR retval;
565
566 if (pid == inferior_pid)
567 return read_register (regno);
568
569 save_pid = inferior_pid;
570
571 inferior_pid = pid;
572
573 retval = read_register (regno);
574
575 inferior_pid = save_pid;
576
577 return retval;
578}
579
173155e8
AC
580/* Return the raw contents of register REGNO, regarding it a SIGNED
581 integer. */
582
583LONGEST
584read_signed_register (int regno)
585{
586 if (registers_pid != inferior_pid)
587 {
588 registers_changed ();
589 registers_pid = inferior_pid;
590 }
591
592 if (!register_valid[regno])
593 target_fetch_registers (regno);
594
595 return (extract_signed_integer (&registers[REGISTER_BYTE (regno)],
596 REGISTER_RAW_SIZE (regno)));
597}
598
599LONGEST
600read_signed_register_pid (int regno, int pid)
601{
602 int save_pid;
603 LONGEST retval;
604
605 if (pid == inferior_pid)
606 return read_signed_register (regno);
607
608 save_pid = inferior_pid;
609
610 inferior_pid = pid;
611
612 retval = read_signed_register (regno);
613
614 inferior_pid = save_pid;
615
616 return retval;
617}
618
32178cab
MS
619/* Store VALUE, into the raw contents of register number REGNO. */
620
621void
622write_register (int regno, LONGEST val)
623{
624 PTR buf;
625 int size;
626
627 /* On the sparc, writing %g0 is a no-op, so we don't even want to
628 change the registers array if something writes to this register. */
629 if (CANNOT_STORE_REGISTER (regno))
630 return;
631
632 if (registers_pid != inferior_pid)
633 {
634 registers_changed ();
635 registers_pid = inferior_pid;
636 }
637
638 size = REGISTER_RAW_SIZE (regno);
639 buf = alloca (size);
640 store_signed_integer (buf, size, (LONGEST) val);
641
642 /* If we have a valid copy of the register, and new value == old value,
643 then don't bother doing the actual store. */
644
645 if (register_valid[regno]
646 && memcmp (&registers[REGISTER_BYTE (regno)], buf, size) == 0)
647 return;
648
fcdc5976
MS
649 if (regno < NUM_REGS)
650 target_prepare_to_store ();
32178cab
MS
651
652 memcpy (&registers[REGISTER_BYTE (regno)], buf, size);
653
654 register_valid[regno] = 1;
655
fcdc5976
MS
656 if (regno < NUM_REGS)
657 target_store_registers (regno);
658 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 659 STORE_PSEUDO_REGISTER (regno);
32178cab
MS
660}
661
662void
663write_register_pid (int regno, CORE_ADDR val, int pid)
664{
665 int save_pid;
666
667 if (pid == inferior_pid)
668 {
669 write_register (regno, val);
670 return;
671 }
672
673 save_pid = inferior_pid;
674
675 inferior_pid = pid;
676
677 write_register (regno, val);
678
679 inferior_pid = save_pid;
680}
681
682/* SUPPLY_REGISTER()
683
684 Record that register REGNO contains VAL. This is used when the
685 value is obtained from the inferior or core dump, so there is no
686 need to store the value there.
687
688 If VAL is a NULL pointer, then it's probably an unsupported register.
689 We just set it's value to all zeros. We might want to record this
690 fact, and report it to the users of read_register and friends. */
691
692void
693supply_register (int regno, char *val)
694{
695#if 1
696 if (registers_pid != inferior_pid)
697 {
698 registers_changed ();
699 registers_pid = inferior_pid;
700 }
701#endif
702
703 register_valid[regno] = 1;
704 if (val)
705 memcpy (&registers[REGISTER_BYTE (regno)], val,
706 REGISTER_RAW_SIZE (regno));
707 else
708 memset (&registers[REGISTER_BYTE (regno)], '\000',
709 REGISTER_RAW_SIZE (regno));
710
711 /* On some architectures, e.g. HPPA, there are a few stray bits in
712 some registers, that the rest of the code would like to ignore. */
713
714#ifdef CLEAN_UP_REGISTER_VALUE
715 CLEAN_UP_REGISTER_VALUE (regno, &registers[REGISTER_BYTE (regno)]);
716#endif
717}
718
719/* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc.
720 Special handling for registers PC, SP, and FP. */
721
722/* This routine is getting awfully cluttered with #if's. It's probably
723 time to turn this into READ_PC and define it in the tm.h file.
724 Ditto for write_pc.
725
726 1999-06-08: The following were re-written so that it assumes the
8e1a459b 727 existence of a TARGET_READ_PC et.al. macro. A default generic
32178cab
MS
728 version of that macro is made available where needed.
729
730 Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
731 by the multi-arch framework, it will eventually be possible to
732 eliminate the intermediate read_pc_pid(). The client would call
733 TARGET_READ_PC directly. (cagney). */
734
32178cab
MS
735CORE_ADDR
736generic_target_read_pc (int pid)
737{
738#ifdef PC_REGNUM
739 if (PC_REGNUM >= 0)
740 {
741 CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, pid));
742 return pc_val;
743 }
744#endif
745 internal_error ("generic_target_read_pc");
746 return 0;
747}
748
749CORE_ADDR
750read_pc_pid (int pid)
751{
752 int saved_inferior_pid;
753 CORE_ADDR pc_val;
754
755 /* In case pid != inferior_pid. */
756 saved_inferior_pid = inferior_pid;
757 inferior_pid = pid;
758
759 pc_val = TARGET_READ_PC (pid);
760
761 inferior_pid = saved_inferior_pid;
762 return pc_val;
763}
764
765CORE_ADDR
766read_pc (void)
767{
768 return read_pc_pid (inferior_pid);
769}
770
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771void
772generic_target_write_pc (CORE_ADDR pc, int pid)
773{
774#ifdef PC_REGNUM
775 if (PC_REGNUM >= 0)
776 write_register_pid (PC_REGNUM, pc, pid);
777 if (NPC_REGNUM >= 0)
778 write_register_pid (NPC_REGNUM, pc + 4, pid);
779 if (NNPC_REGNUM >= 0)
780 write_register_pid (NNPC_REGNUM, pc + 8, pid);
781#else
782 internal_error ("generic_target_write_pc");
783#endif
784}
785
786void
787write_pc_pid (CORE_ADDR pc, int pid)
788{
789 int saved_inferior_pid;
790
791 /* In case pid != inferior_pid. */
792 saved_inferior_pid = inferior_pid;
793 inferior_pid = pid;
794
795 TARGET_WRITE_PC (pc, pid);
796
797 inferior_pid = saved_inferior_pid;
798}
799
800void
801write_pc (CORE_ADDR pc)
802{
803 write_pc_pid (pc, inferior_pid);
804}
805
806/* Cope with strage ways of getting to the stack and frame pointers */
807
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808CORE_ADDR
809generic_target_read_sp (void)
810{
811#ifdef SP_REGNUM
812 if (SP_REGNUM >= 0)
813 return read_register (SP_REGNUM);
814#endif
815 internal_error ("generic_target_read_sp");
816}
817
818CORE_ADDR
819read_sp (void)
820{
821 return TARGET_READ_SP ();
822}
823
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824void
825generic_target_write_sp (CORE_ADDR val)
826{
827#ifdef SP_REGNUM
828 if (SP_REGNUM >= 0)
829 {
830 write_register (SP_REGNUM, val);
831 return;
832 }
833#endif
834 internal_error ("generic_target_write_sp");
835}
836
837void
838write_sp (CORE_ADDR val)
839{
840 TARGET_WRITE_SP (val);
841}
842
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843CORE_ADDR
844generic_target_read_fp (void)
845{
846#ifdef FP_REGNUM
847 if (FP_REGNUM >= 0)
848 return read_register (FP_REGNUM);
849#endif
850 internal_error ("generic_target_read_fp");
851}
852
853CORE_ADDR
854read_fp (void)
855{
856 return TARGET_READ_FP ();
857}
858
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859void
860generic_target_write_fp (CORE_ADDR val)
861{
862#ifdef FP_REGNUM
863 if (FP_REGNUM >= 0)
864 {
865 write_register (FP_REGNUM, val);
866 return;
867 }
868#endif
869 internal_error ("generic_target_write_fp");
870}
871
872void
873write_fp (CORE_ADDR val)
874{
875 TARGET_WRITE_FP (val);
876}
877
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878/* ARGSUSED */
879static void
880reg_flush_command (char *command, int from_tty)
881{
882 /* Force-flush the register cache. */
883 registers_changed ();
884 if (from_tty)
885 printf_filtered ("Register cache flushed.\n");
886}
887
888
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889static void
890build_regcache (void)
891{
892 /* We allocate some extra slop since we do a lot of memcpy's around
893 `registers', and failing-soft is better than failing hard. */
894 int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256;
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895 int sizeof_register_valid =
896 (NUM_REGS + NUM_PSEUDO_REGS) * sizeof (*register_valid);
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897 registers = xmalloc (sizeof_registers);
898 memset (registers, 0, sizeof_registers);
899 register_valid = xmalloc (sizeof_register_valid);
900 memset (register_valid, 0, sizeof_register_valid);
901}
902
903void
904_initialize_regcache (void)
905{
906 build_regcache ();
907
908 register_gdbarch_swap (&registers, sizeof (registers), NULL);
909 register_gdbarch_swap (&register_valid, sizeof (register_valid), NULL);
910 register_gdbarch_swap (NULL, 0, build_regcache);
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911
912 add_com ("flushregs", class_maintenance, reg_flush_command,
913 "Force gdb to flush its register cache (maintainer command)");
32178cab 914}
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