Allow for the possibility that the local labels won't be in the objdump output.
[deliverable/binutils-gdb.git] / gdb / regcache.c
CommitLineData
32178cab 1/* Cache and manage the values of registers for GDB, the GNU debugger.
b6ba6518 2 Copyright 1986, 1987, 1989, 1991, 1994, 1995, 1996, 1998, 2000, 2001
32178cab
MS
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "frame.h"
24#include "inferior.h"
25#include "target.h"
26#include "gdbarch.h"
705152c5 27#include "gdbcmd.h"
4e052eda 28#include "regcache.h"
61a0eb5b 29#include "gdb_assert.h"
32178cab
MS
30
31/*
32 * DATA STRUCTURE
33 *
34 * Here is the actual register cache.
35 */
36
5ebd2499 37/* NOTE: this is a write-through cache. There is no "dirty" bit for
32178cab
MS
38 recording if the register values have been changed (eg. by the
39 user). Therefore all registers must be written back to the
40 target when appropriate. */
41
42/* REGISTERS contains the cached register values (in target byte order). */
43
44char *registers;
45
46/* REGISTER_VALID is 0 if the register needs to be fetched,
47 1 if it has been fetched, and
48 -1 if the register value was not available.
49 "Not available" means don't try to fetch it again. */
50
51signed char *register_valid;
52
53/* The thread/process associated with the current set of registers.
54 For now, -1 is special, and means `no current process'. */
55
56static int registers_pid = -1;
57
58/*
59 * FUNCTIONS:
60 */
61
62/* REGISTER_CACHED()
63
64 Returns 0 if the value is not in the cache (needs fetch).
65 >0 if the value is in the cache.
66 <0 if the value is permanently unavailable (don't ask again). */
67
68int
69register_cached (int regnum)
70{
71 return register_valid[regnum];
72}
73
7302a204
ND
74/* Record that REGNUM's value is cached if STATE is >0, uncached but
75 fetchable if STATE is 0, and uncached and unfetchable if STATE is <0. */
76
77void
78set_register_cached (int regnum, int state)
79{
80 register_valid[regnum] = state;
81}
82
2dc4e391
DT
83/* REGISTER_CHANGED
84
85 invalidate a single register REGNUM in the cache */
86void
87register_changed (int regnum)
88{
7302a204
ND
89 set_register_cached (regnum, 0);
90}
91
92/* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area,
93 else return a pointer to the start of the cache buffer. */
94
95char *
96register_buffer (int regnum)
97{
98 if (regnum < 0)
99 return registers;
100 else
101 return &registers[REGISTER_BYTE (regnum)];
102}
103
104/* Return whether register REGNUM is a real register. */
105
106static int
107real_register (int regnum)
108{
109 return regnum >= 0 && regnum < NUM_REGS;
110}
111
112/* Return whether register REGNUM is a pseudo register. */
113
114static int
115pseudo_register (int regnum)
116{
117 return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS;
118}
119
120/* Fetch register REGNUM into the cache. */
121
122static void
123fetch_register (int regnum)
124{
125 if (real_register (regnum))
126 target_fetch_registers (regnum);
127 else if (pseudo_register (regnum))
128 FETCH_PSEUDO_REGISTER (regnum);
129}
130
131/* Write register REGNUM cached value to the target. */
132
133static void
134store_register (int regnum)
135{
136 if (real_register (regnum))
137 target_store_registers (regnum);
138 else if (pseudo_register (regnum))
139 STORE_PSEUDO_REGISTER (regnum);
2dc4e391
DT
140}
141
32178cab
MS
142/* Low level examining and depositing of registers.
143
144 The caller is responsible for making sure that the inferior is
145 stopped before calling the fetching routines, or it will get
146 garbage. (a change from GDB version 3, in which the caller got the
147 value from the last stop). */
148
149/* REGISTERS_CHANGED ()
150
151 Indicate that registers may have changed, so invalidate the cache. */
152
153void
154registers_changed (void)
155{
156 int i;
32178cab
MS
157
158 registers_pid = -1;
159
160 /* Force cleanup of any alloca areas if using C alloca instead of
161 a builtin alloca. This particular call is used to clean up
162 areas allocated by low level target code which may build up
163 during lengthy interactions between gdb and the target before
164 gdb gives control to the user (ie watchpoints). */
165 alloca (0);
166
a728f042 167 for (i = 0; i < NUM_REGS; i++)
7302a204 168 set_register_cached (i, 0);
fcdc5976
MS
169
170 /* Assume that if all the hardware regs have changed,
171 then so have the pseudo-registers. */
172 for (i = NUM_REGS; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
7302a204 173 set_register_cached (i, 0);
32178cab
MS
174
175 if (registers_changed_hook)
176 registers_changed_hook ();
177}
178
179/* REGISTERS_FETCHED ()
180
181 Indicate that all registers have been fetched, so mark them all valid. */
182
183
184void
185registers_fetched (void)
186{
187 int i;
32178cab 188
a728f042 189 for (i = 0; i < NUM_REGS; i++)
7302a204 190 set_register_cached (i, 1);
fcdc5976
MS
191 /* Do not assume that the pseudo-regs have also been fetched.
192 Fetching all real regs might not account for all pseudo-regs. */
32178cab
MS
193}
194
195/* read_register_bytes and write_register_bytes are generally a *BAD*
196 idea. They are inefficient because they need to check for partial
197 updates, which can only be done by scanning through all of the
198 registers and seeing if the bytes that are being read/written fall
199 inside of an invalid register. [The main reason this is necessary
200 is that register sizes can vary, so a simple index won't suffice.]
201 It is far better to call read_register_gen and write_register_gen
202 if you want to get at the raw register contents, as it only takes a
5ebd2499 203 regnum as an argument, and therefore can't do a partial register
32178cab
MS
204 update.
205
206 Prior to the recent fixes to check for partial updates, both read
207 and write_register_bytes always checked to see if any registers
208 were stale, and then called target_fetch_registers (-1) to update
209 the whole set. This caused really slowed things down for remote
210 targets. */
211
212/* Copy INLEN bytes of consecutive data from registers
213 starting with the INREGBYTE'th byte of register data
214 into memory at MYADDR. */
215
216void
61a0eb5b 217read_register_bytes (int in_start, char *in_buf, int in_len)
32178cab 218{
61a0eb5b 219 int in_end = in_start + in_len;
5ebd2499 220 int regnum;
61a0eb5b 221 char *reg_buf = alloca (MAX_REGISTER_RAW_SIZE);
32178cab
MS
222
223 /* See if we are trying to read bytes from out-of-date registers. If so,
224 update just those registers. */
225
5ebd2499 226 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
32178cab 227 {
61a0eb5b
AC
228 int reg_start;
229 int reg_end;
230 int reg_len;
231 int start;
232 int end;
233 int byte;
32178cab 234
5ebd2499 235 if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0')
32178cab
MS
236 continue;
237
61a0eb5b
AC
238 reg_start = REGISTER_BYTE (regnum);
239 reg_len = REGISTER_RAW_SIZE (regnum);
240 reg_end = reg_start + reg_len;
32178cab 241
61a0eb5b 242 if (reg_end <= in_start || in_end <= reg_start)
5ebd2499 243 /* The range the user wants to read doesn't overlap with regnum. */
32178cab
MS
244 continue;
245
61a0eb5b
AC
246 /* Force the cache to fetch the entire register. */
247 read_register_gen (regnum, reg_buf);
32178cab 248
61a0eb5b
AC
249 /* Legacy note: This function, for some reason, allows a NULL
250 input buffer. If the buffer is NULL, the registers are still
251 fetched, just the final transfer is skipped. */
252 if (in_buf == NULL)
253 continue;
254
255 /* start = max (reg_start, in_start) */
256 if (reg_start > in_start)
257 start = reg_start;
258 else
259 start = in_start;
260
261 /* end = min (reg_end, in_end) */
262 if (reg_end < in_end)
263 end = reg_end;
264 else
265 end = in_end;
266
267 /* Transfer just the bytes common to both IN_BUF and REG_BUF */
268 for (byte = start; byte < end; byte++)
165cd47f 269 {
61a0eb5b 270 in_buf[byte - in_start] = reg_buf[byte - reg_start];
165cd47f 271 }
32178cab 272 }
32178cab
MS
273}
274
5ebd2499
ND
275/* Read register REGNUM into memory at MYADDR, which must be large
276 enough for REGISTER_RAW_BYTES (REGNUM). Target byte-order. If the
32178cab
MS
277 register is known to be the size of a CORE_ADDR or smaller,
278 read_register can be used instead. */
279
61a0eb5b
AC
280static void
281legacy_read_register_gen (int regnum, char *myaddr)
32178cab 282{
61a0eb5b 283 gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
32178cab
MS
284 if (registers_pid != inferior_pid)
285 {
286 registers_changed ();
287 registers_pid = inferior_pid;
288 }
289
7302a204
ND
290 if (!register_cached (regnum))
291 fetch_register (regnum);
292
293 memcpy (myaddr, register_buffer (regnum),
5ebd2499 294 REGISTER_RAW_SIZE (regnum));
32178cab
MS
295}
296
61a0eb5b
AC
297void
298regcache_read (int rawnum, char *buf)
299{
300 gdb_assert (rawnum >= 0 && rawnum < NUM_REGS);
301 /* For moment, just use underlying legacy code. Ulgh!!! */
302 legacy_read_register_gen (rawnum, buf);
303}
304
305void
306read_register_gen (int regnum, char *buf)
307{
308 if (! gdbarch_register_read_p (current_gdbarch))
309 {
310 legacy_read_register_gen (regnum, buf);
311 return;
312 }
313 gdbarch_register_read (current_gdbarch, regnum, buf);
314}
315
316
5ebd2499
ND
317/* Write register REGNUM at MYADDR to the target. MYADDR points at
318 REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order. */
32178cab
MS
319
320/* Registers we shouldn't try to store. */
321#if !defined (CANNOT_STORE_REGISTER)
5ebd2499 322#define CANNOT_STORE_REGISTER(regnum) 0
32178cab
MS
323#endif
324
61a0eb5b
AC
325static void
326legacy_write_register_gen (int regnum, char *myaddr)
32178cab
MS
327{
328 int size;
61a0eb5b 329 gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
32178cab
MS
330
331 /* On the sparc, writing %g0 is a no-op, so we don't even want to
332 change the registers array if something writes to this register. */
5ebd2499 333 if (CANNOT_STORE_REGISTER (regnum))
32178cab
MS
334 return;
335
336 if (registers_pid != inferior_pid)
337 {
338 registers_changed ();
339 registers_pid = inferior_pid;
340 }
341
5ebd2499 342 size = REGISTER_RAW_SIZE (regnum);
32178cab
MS
343
344 /* If we have a valid copy of the register, and new value == old value,
345 then don't bother doing the actual store. */
346
7302a204
ND
347 if (register_cached (regnum)
348 && memcmp (register_buffer (regnum), myaddr, size) == 0)
32178cab
MS
349 return;
350
7302a204 351 if (real_register (regnum))
fcdc5976 352 target_prepare_to_store ();
32178cab 353
7302a204 354 memcpy (register_buffer (regnum), myaddr, size);
32178cab 355
7302a204
ND
356 set_register_cached (regnum, 1);
357 store_register (regnum);
32178cab
MS
358}
359
61a0eb5b
AC
360void
361regcache_write (int rawnum, char *buf)
362{
363 gdb_assert (rawnum >= 0 && rawnum < NUM_REGS);
364 /* For moment, just use underlying legacy code. Ulgh!!! */
365 legacy_write_register_gen (rawnum, buf);
366}
367
368void
369write_register_gen (int regnum, char *buf)
370{
371 if (! gdbarch_register_write_p (current_gdbarch))
372 {
373 legacy_write_register_gen (regnum, buf);
374 return;
375 }
376 gdbarch_register_write (current_gdbarch, regnum, buf);
377}
378
32178cab
MS
379/* Copy INLEN bytes of consecutive data from memory at MYADDR
380 into registers starting with the MYREGSTART'th byte of register data. */
381
382void
383write_register_bytes (int myregstart, char *myaddr, int inlen)
384{
385 int myregend = myregstart + inlen;
5ebd2499 386 int regnum;
32178cab
MS
387
388 target_prepare_to_store ();
389
390 /* Scan through the registers updating any that are covered by the
391 range myregstart<=>myregend using write_register_gen, which does
392 nice things like handling threads, and avoiding updates when the
393 new and old contents are the same. */
394
5ebd2499 395 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
32178cab
MS
396 {
397 int regstart, regend;
398
5ebd2499
ND
399 regstart = REGISTER_BYTE (regnum);
400 regend = regstart + REGISTER_RAW_SIZE (regnum);
32178cab
MS
401
402 /* Is this register completely outside the range the user is writing? */
403 if (myregend <= regstart || regend <= myregstart)
404 /* do nothing */ ;
405
406 /* Is this register completely within the range the user is writing? */
407 else if (myregstart <= regstart && regend <= myregend)
5ebd2499 408 write_register_gen (regnum, myaddr + (regstart - myregstart));
32178cab
MS
409
410 /* The register partially overlaps the range being written. */
411 else
412 {
e6cbd02a 413 char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE);
32178cab
MS
414 /* What's the overlap between this register's bytes and
415 those the caller wants to write? */
416 int overlapstart = max (regstart, myregstart);
417 int overlapend = min (regend, myregend);
418
419 /* We may be doing a partial update of an invalid register.
420 Update it from the target before scribbling on it. */
5ebd2499 421 read_register_gen (regnum, regbuf);
32178cab
MS
422
423 memcpy (registers + overlapstart,
424 myaddr + (overlapstart - myregstart),
425 overlapend - overlapstart);
426
7302a204 427 store_register (regnum);
32178cab
MS
428 }
429 }
430}
431
432
5ebd2499 433/* Return the contents of register REGNUM as an unsigned integer. */
32178cab 434
173155e8 435ULONGEST
5ebd2499 436read_register (int regnum)
32178cab 437{
61a0eb5b
AC
438 char *buf = alloca (REGISTER_RAW_SIZE (regnum));
439 read_register_gen (regnum, buf);
440 return (extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum)));
32178cab
MS
441}
442
173155e8 443ULONGEST
5ebd2499 444read_register_pid (int regnum, int pid)
32178cab
MS
445{
446 int save_pid;
447 CORE_ADDR retval;
448
449 if (pid == inferior_pid)
5ebd2499 450 return read_register (regnum);
32178cab
MS
451
452 save_pid = inferior_pid;
453
454 inferior_pid = pid;
455
5ebd2499 456 retval = read_register (regnum);
32178cab
MS
457
458 inferior_pid = save_pid;
459
460 return retval;
461}
462
5ebd2499 463/* Return the contents of register REGNUM as a signed integer. */
173155e8
AC
464
465LONGEST
5ebd2499 466read_signed_register (int regnum)
173155e8 467{
61a0eb5b
AC
468 void *buf = alloca (REGISTER_RAW_SIZE (regnum));
469 read_register_gen (regnum, buf);
470 return (extract_signed_integer (buf, REGISTER_RAW_SIZE (regnum)));
173155e8
AC
471}
472
473LONGEST
5ebd2499 474read_signed_register_pid (int regnum, int pid)
173155e8
AC
475{
476 int save_pid;
477 LONGEST retval;
478
479 if (pid == inferior_pid)
5ebd2499 480 return read_signed_register (regnum);
173155e8
AC
481
482 save_pid = inferior_pid;
483
484 inferior_pid = pid;
485
5ebd2499 486 retval = read_signed_register (regnum);
173155e8
AC
487
488 inferior_pid = save_pid;
489
490 return retval;
491}
492
5ebd2499 493/* Store VALUE into the raw contents of register number REGNUM. */
32178cab
MS
494
495void
5ebd2499 496write_register (int regnum, LONGEST val)
32178cab 497{
61a0eb5b 498 void *buf;
32178cab 499 int size;
5ebd2499 500 size = REGISTER_RAW_SIZE (regnum);
32178cab
MS
501 buf = alloca (size);
502 store_signed_integer (buf, size, (LONGEST) val);
61a0eb5b 503 write_register_gen (regnum, buf);
32178cab
MS
504}
505
506void
5ebd2499 507write_register_pid (int regnum, CORE_ADDR val, int pid)
32178cab
MS
508{
509 int save_pid;
510
511 if (pid == inferior_pid)
512 {
5ebd2499 513 write_register (regnum, val);
32178cab
MS
514 return;
515 }
516
517 save_pid = inferior_pid;
518
519 inferior_pid = pid;
520
5ebd2499 521 write_register (regnum, val);
32178cab
MS
522
523 inferior_pid = save_pid;
524}
525
526/* SUPPLY_REGISTER()
527
5ebd2499 528 Record that register REGNUM contains VAL. This is used when the
32178cab
MS
529 value is obtained from the inferior or core dump, so there is no
530 need to store the value there.
531
532 If VAL is a NULL pointer, then it's probably an unsupported register.
5ebd2499 533 We just set its value to all zeros. We might want to record this
32178cab
MS
534 fact, and report it to the users of read_register and friends. */
535
536void
5ebd2499 537supply_register (int regnum, char *val)
32178cab
MS
538{
539#if 1
540 if (registers_pid != inferior_pid)
541 {
542 registers_changed ();
543 registers_pid = inferior_pid;
544 }
545#endif
546
7302a204 547 set_register_cached (regnum, 1);
32178cab 548 if (val)
7302a204 549 memcpy (register_buffer (regnum), val,
5ebd2499 550 REGISTER_RAW_SIZE (regnum));
32178cab 551 else
7302a204 552 memset (register_buffer (regnum), '\000',
5ebd2499 553 REGISTER_RAW_SIZE (regnum));
32178cab
MS
554
555 /* On some architectures, e.g. HPPA, there are a few stray bits in
556 some registers, that the rest of the code would like to ignore. */
557
61a0eb5b
AC
558 /* NOTE: cagney/2001-03-16: The macro CLEAN_UP_REGISTER_VALUE is
559 going to be deprecated. Instead architectures will leave the raw
560 register value as is and instead clean things up as they pass
561 through the method gdbarch_register_read() clean up the
562 values. */
563
32178cab 564#ifdef CLEAN_UP_REGISTER_VALUE
7302a204 565 CLEAN_UP_REGISTER_VALUE (regnum, register_buffer (regnum));
32178cab
MS
566#endif
567}
568
569/* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc.
570 Special handling for registers PC, SP, and FP. */
571
4e052eda
AC
572/* NOTE: cagney/2001-02-18: The functions generic_target_read_pc(),
573 read_pc_pid(), read_pc(), generic_target_write_pc(),
574 write_pc_pid(), write_pc(), generic_target_read_sp(), read_sp(),
575 generic_target_write_sp(), write_sp(), generic_target_read_fp(),
576 read_fp(), generic_target_write_fp(), write_fp will eventually be
577 moved out of the reg-cache into either frame.[hc] or to the
578 multi-arch framework. The are not part of the raw register cache. */
579
32178cab
MS
580/* This routine is getting awfully cluttered with #if's. It's probably
581 time to turn this into READ_PC and define it in the tm.h file.
582 Ditto for write_pc.
583
584 1999-06-08: The following were re-written so that it assumes the
8e1a459b 585 existence of a TARGET_READ_PC et.al. macro. A default generic
32178cab
MS
586 version of that macro is made available where needed.
587
588 Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
589 by the multi-arch framework, it will eventually be possible to
590 eliminate the intermediate read_pc_pid(). The client would call
591 TARGET_READ_PC directly. (cagney). */
592
32178cab
MS
593CORE_ADDR
594generic_target_read_pc (int pid)
595{
596#ifdef PC_REGNUM
597 if (PC_REGNUM >= 0)
598 {
599 CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, pid));
600 return pc_val;
601 }
602#endif
8e65ff28
AC
603 internal_error (__FILE__, __LINE__,
604 "generic_target_read_pc");
32178cab
MS
605 return 0;
606}
607
608CORE_ADDR
609read_pc_pid (int pid)
610{
611 int saved_inferior_pid;
612 CORE_ADDR pc_val;
613
614 /* In case pid != inferior_pid. */
615 saved_inferior_pid = inferior_pid;
616 inferior_pid = pid;
617
618 pc_val = TARGET_READ_PC (pid);
619
620 inferior_pid = saved_inferior_pid;
621 return pc_val;
622}
623
624CORE_ADDR
625read_pc (void)
626{
627 return read_pc_pid (inferior_pid);
628}
629
32178cab
MS
630void
631generic_target_write_pc (CORE_ADDR pc, int pid)
632{
633#ifdef PC_REGNUM
634 if (PC_REGNUM >= 0)
635 write_register_pid (PC_REGNUM, pc, pid);
636 if (NPC_REGNUM >= 0)
637 write_register_pid (NPC_REGNUM, pc + 4, pid);
638 if (NNPC_REGNUM >= 0)
639 write_register_pid (NNPC_REGNUM, pc + 8, pid);
640#else
8e65ff28
AC
641 internal_error (__FILE__, __LINE__,
642 "generic_target_write_pc");
32178cab
MS
643#endif
644}
645
646void
647write_pc_pid (CORE_ADDR pc, int pid)
648{
649 int saved_inferior_pid;
650
651 /* In case pid != inferior_pid. */
652 saved_inferior_pid = inferior_pid;
653 inferior_pid = pid;
654
655 TARGET_WRITE_PC (pc, pid);
656
657 inferior_pid = saved_inferior_pid;
658}
659
660void
661write_pc (CORE_ADDR pc)
662{
663 write_pc_pid (pc, inferior_pid);
664}
665
666/* Cope with strage ways of getting to the stack and frame pointers */
667
32178cab
MS
668CORE_ADDR
669generic_target_read_sp (void)
670{
671#ifdef SP_REGNUM
672 if (SP_REGNUM >= 0)
673 return read_register (SP_REGNUM);
674#endif
8e65ff28
AC
675 internal_error (__FILE__, __LINE__,
676 "generic_target_read_sp");
32178cab
MS
677}
678
679CORE_ADDR
680read_sp (void)
681{
682 return TARGET_READ_SP ();
683}
684
32178cab
MS
685void
686generic_target_write_sp (CORE_ADDR val)
687{
688#ifdef SP_REGNUM
689 if (SP_REGNUM >= 0)
690 {
691 write_register (SP_REGNUM, val);
692 return;
693 }
694#endif
8e65ff28
AC
695 internal_error (__FILE__, __LINE__,
696 "generic_target_write_sp");
32178cab
MS
697}
698
699void
700write_sp (CORE_ADDR val)
701{
702 TARGET_WRITE_SP (val);
703}
704
32178cab
MS
705CORE_ADDR
706generic_target_read_fp (void)
707{
708#ifdef FP_REGNUM
709 if (FP_REGNUM >= 0)
710 return read_register (FP_REGNUM);
711#endif
8e65ff28
AC
712 internal_error (__FILE__, __LINE__,
713 "generic_target_read_fp");
32178cab
MS
714}
715
716CORE_ADDR
717read_fp (void)
718{
719 return TARGET_READ_FP ();
720}
721
32178cab
MS
722void
723generic_target_write_fp (CORE_ADDR val)
724{
725#ifdef FP_REGNUM
726 if (FP_REGNUM >= 0)
727 {
728 write_register (FP_REGNUM, val);
729 return;
730 }
731#endif
8e65ff28
AC
732 internal_error (__FILE__, __LINE__,
733 "generic_target_write_fp");
32178cab
MS
734}
735
736void
737write_fp (CORE_ADDR val)
738{
739 TARGET_WRITE_FP (val);
740}
741
705152c5
MS
742/* ARGSUSED */
743static void
744reg_flush_command (char *command, int from_tty)
745{
746 /* Force-flush the register cache. */
747 registers_changed ();
748 if (from_tty)
749 printf_filtered ("Register cache flushed.\n");
750}
751
752
32178cab
MS
753static void
754build_regcache (void)
755{
756 /* We allocate some extra slop since we do a lot of memcpy's around
757 `registers', and failing-soft is better than failing hard. */
758 int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256;
fcdc5976
MS
759 int sizeof_register_valid =
760 (NUM_REGS + NUM_PSEUDO_REGS) * sizeof (*register_valid);
32178cab
MS
761 registers = xmalloc (sizeof_registers);
762 memset (registers, 0, sizeof_registers);
763 register_valid = xmalloc (sizeof_register_valid);
764 memset (register_valid, 0, sizeof_register_valid);
765}
766
767void
768_initialize_regcache (void)
769{
770 build_regcache ();
771
772 register_gdbarch_swap (&registers, sizeof (registers), NULL);
773 register_gdbarch_swap (&register_valid, sizeof (register_valid), NULL);
774 register_gdbarch_swap (NULL, 0, build_regcache);
705152c5
MS
775
776 add_com ("flushregs", class_maintenance, reg_flush_command,
777 "Force gdb to flush its register cache (maintainer command)");
32178cab 778}
This page took 0.091515 seconds and 4 git commands to generate.