Commit | Line | Data |
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32178cab | 1 | /* Cache and manage the values of registers for GDB, the GNU debugger. |
b6ba6518 | 2 | Copyright 1986, 1987, 1989, 1991, 1994, 1995, 1996, 1998, 2000, 2001 |
32178cab MS |
3 | Free Software Foundation, Inc. |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include "defs.h" | |
23 | #include "frame.h" | |
24 | #include "inferior.h" | |
25 | #include "target.h" | |
26 | #include "gdbarch.h" | |
705152c5 | 27 | #include "gdbcmd.h" |
4e052eda | 28 | #include "regcache.h" |
32178cab MS |
29 | |
30 | /* | |
31 | * DATA STRUCTURE | |
32 | * | |
33 | * Here is the actual register cache. | |
34 | */ | |
35 | ||
5ebd2499 | 36 | /* NOTE: this is a write-through cache. There is no "dirty" bit for |
32178cab MS |
37 | recording if the register values have been changed (eg. by the |
38 | user). Therefore all registers must be written back to the | |
39 | target when appropriate. */ | |
40 | ||
41 | /* REGISTERS contains the cached register values (in target byte order). */ | |
42 | ||
43 | char *registers; | |
44 | ||
45 | /* REGISTER_VALID is 0 if the register needs to be fetched, | |
46 | 1 if it has been fetched, and | |
47 | -1 if the register value was not available. | |
48 | "Not available" means don't try to fetch it again. */ | |
49 | ||
50 | signed char *register_valid; | |
51 | ||
52 | /* The thread/process associated with the current set of registers. | |
53 | For now, -1 is special, and means `no current process'. */ | |
54 | ||
55 | static int registers_pid = -1; | |
56 | ||
57 | /* | |
58 | * FUNCTIONS: | |
59 | */ | |
60 | ||
61 | /* REGISTER_CACHED() | |
62 | ||
63 | Returns 0 if the value is not in the cache (needs fetch). | |
64 | >0 if the value is in the cache. | |
65 | <0 if the value is permanently unavailable (don't ask again). */ | |
66 | ||
67 | int | |
68 | register_cached (int regnum) | |
69 | { | |
70 | return register_valid[regnum]; | |
71 | } | |
72 | ||
7302a204 ND |
73 | /* Record that REGNUM's value is cached if STATE is >0, uncached but |
74 | fetchable if STATE is 0, and uncached and unfetchable if STATE is <0. */ | |
75 | ||
76 | void | |
77 | set_register_cached (int regnum, int state) | |
78 | { | |
79 | register_valid[regnum] = state; | |
80 | } | |
81 | ||
2dc4e391 DT |
82 | /* REGISTER_CHANGED |
83 | ||
84 | invalidate a single register REGNUM in the cache */ | |
85 | void | |
86 | register_changed (int regnum) | |
87 | { | |
7302a204 ND |
88 | set_register_cached (regnum, 0); |
89 | } | |
90 | ||
91 | /* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area, | |
92 | else return a pointer to the start of the cache buffer. */ | |
93 | ||
94 | char * | |
95 | register_buffer (int regnum) | |
96 | { | |
97 | if (regnum < 0) | |
98 | return registers; | |
99 | else | |
100 | return ®isters[REGISTER_BYTE (regnum)]; | |
101 | } | |
102 | ||
103 | /* Return whether register REGNUM is a real register. */ | |
104 | ||
105 | static int | |
106 | real_register (int regnum) | |
107 | { | |
108 | return regnum >= 0 && regnum < NUM_REGS; | |
109 | } | |
110 | ||
111 | /* Return whether register REGNUM is a pseudo register. */ | |
112 | ||
113 | static int | |
114 | pseudo_register (int regnum) | |
115 | { | |
116 | return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS; | |
117 | } | |
118 | ||
119 | /* Fetch register REGNUM into the cache. */ | |
120 | ||
121 | static void | |
122 | fetch_register (int regnum) | |
123 | { | |
124 | if (real_register (regnum)) | |
125 | target_fetch_registers (regnum); | |
126 | else if (pseudo_register (regnum)) | |
127 | FETCH_PSEUDO_REGISTER (regnum); | |
128 | } | |
129 | ||
130 | /* Write register REGNUM cached value to the target. */ | |
131 | ||
132 | static void | |
133 | store_register (int regnum) | |
134 | { | |
135 | if (real_register (regnum)) | |
136 | target_store_registers (regnum); | |
137 | else if (pseudo_register (regnum)) | |
138 | STORE_PSEUDO_REGISTER (regnum); | |
2dc4e391 DT |
139 | } |
140 | ||
32178cab MS |
141 | /* Low level examining and depositing of registers. |
142 | ||
143 | The caller is responsible for making sure that the inferior is | |
144 | stopped before calling the fetching routines, or it will get | |
145 | garbage. (a change from GDB version 3, in which the caller got the | |
146 | value from the last stop). */ | |
147 | ||
148 | /* REGISTERS_CHANGED () | |
149 | ||
150 | Indicate that registers may have changed, so invalidate the cache. */ | |
151 | ||
152 | void | |
153 | registers_changed (void) | |
154 | { | |
155 | int i; | |
32178cab MS |
156 | |
157 | registers_pid = -1; | |
158 | ||
159 | /* Force cleanup of any alloca areas if using C alloca instead of | |
160 | a builtin alloca. This particular call is used to clean up | |
161 | areas allocated by low level target code which may build up | |
162 | during lengthy interactions between gdb and the target before | |
163 | gdb gives control to the user (ie watchpoints). */ | |
164 | alloca (0); | |
165 | ||
a728f042 | 166 | for (i = 0; i < NUM_REGS; i++) |
7302a204 | 167 | set_register_cached (i, 0); |
fcdc5976 MS |
168 | |
169 | /* Assume that if all the hardware regs have changed, | |
170 | then so have the pseudo-registers. */ | |
171 | for (i = NUM_REGS; i < NUM_REGS + NUM_PSEUDO_REGS; i++) | |
7302a204 | 172 | set_register_cached (i, 0); |
32178cab MS |
173 | |
174 | if (registers_changed_hook) | |
175 | registers_changed_hook (); | |
176 | } | |
177 | ||
178 | /* REGISTERS_FETCHED () | |
179 | ||
180 | Indicate that all registers have been fetched, so mark them all valid. */ | |
181 | ||
182 | ||
183 | void | |
184 | registers_fetched (void) | |
185 | { | |
186 | int i; | |
32178cab | 187 | |
a728f042 | 188 | for (i = 0; i < NUM_REGS; i++) |
7302a204 | 189 | set_register_cached (i, 1); |
fcdc5976 MS |
190 | /* Do not assume that the pseudo-regs have also been fetched. |
191 | Fetching all real regs might not account for all pseudo-regs. */ | |
32178cab MS |
192 | } |
193 | ||
194 | /* read_register_bytes and write_register_bytes are generally a *BAD* | |
195 | idea. They are inefficient because they need to check for partial | |
196 | updates, which can only be done by scanning through all of the | |
197 | registers and seeing if the bytes that are being read/written fall | |
198 | inside of an invalid register. [The main reason this is necessary | |
199 | is that register sizes can vary, so a simple index won't suffice.] | |
200 | It is far better to call read_register_gen and write_register_gen | |
201 | if you want to get at the raw register contents, as it only takes a | |
5ebd2499 | 202 | regnum as an argument, and therefore can't do a partial register |
32178cab MS |
203 | update. |
204 | ||
205 | Prior to the recent fixes to check for partial updates, both read | |
206 | and write_register_bytes always checked to see if any registers | |
207 | were stale, and then called target_fetch_registers (-1) to update | |
208 | the whole set. This caused really slowed things down for remote | |
209 | targets. */ | |
210 | ||
211 | /* Copy INLEN bytes of consecutive data from registers | |
212 | starting with the INREGBYTE'th byte of register data | |
213 | into memory at MYADDR. */ | |
214 | ||
215 | void | |
216 | read_register_bytes (int inregbyte, char *myaddr, int inlen) | |
217 | { | |
218 | int inregend = inregbyte + inlen; | |
5ebd2499 | 219 | int regnum; |
32178cab MS |
220 | |
221 | if (registers_pid != inferior_pid) | |
222 | { | |
223 | registers_changed (); | |
224 | registers_pid = inferior_pid; | |
225 | } | |
226 | ||
227 | /* See if we are trying to read bytes from out-of-date registers. If so, | |
228 | update just those registers. */ | |
229 | ||
5ebd2499 | 230 | for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++) |
32178cab MS |
231 | { |
232 | int regstart, regend; | |
233 | ||
7302a204 | 234 | if (register_cached (regnum)) |
32178cab MS |
235 | continue; |
236 | ||
5ebd2499 | 237 | if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0') |
32178cab MS |
238 | continue; |
239 | ||
5ebd2499 ND |
240 | regstart = REGISTER_BYTE (regnum); |
241 | regend = regstart + REGISTER_RAW_SIZE (regnum); | |
32178cab MS |
242 | |
243 | if (regend <= inregbyte || inregend <= regstart) | |
5ebd2499 | 244 | /* The range the user wants to read doesn't overlap with regnum. */ |
32178cab MS |
245 | continue; |
246 | ||
fcdc5976 | 247 | /* We've found an uncached register where at least one byte will be read. |
32178cab | 248 | Update it from the target. */ |
7302a204 | 249 | fetch_register (regnum); |
32178cab | 250 | |
7302a204 | 251 | if (!register_cached (regnum)) |
165cd47f MS |
252 | { |
253 | /* Sometimes pseudoregs are never marked valid, so that they | |
254 | will be fetched every time (it can be complicated to know | |
255 | if a pseudoreg is valid, while "fetching" them can be cheap). | |
256 | */ | |
5ebd2499 | 257 | if (regnum < NUM_REGS) |
7302a204 | 258 | error ("read_register_bytes: Couldn't update register %d.", regnum); |
165cd47f | 259 | } |
32178cab MS |
260 | } |
261 | ||
262 | if (myaddr != NULL) | |
7302a204 | 263 | memcpy (myaddr, register_buffer (-1) + inregbyte, inlen); |
32178cab MS |
264 | } |
265 | ||
5ebd2499 ND |
266 | /* Read register REGNUM into memory at MYADDR, which must be large |
267 | enough for REGISTER_RAW_BYTES (REGNUM). Target byte-order. If the | |
32178cab MS |
268 | register is known to be the size of a CORE_ADDR or smaller, |
269 | read_register can be used instead. */ | |
270 | ||
271 | void | |
5ebd2499 | 272 | read_register_gen (int regnum, char *myaddr) |
32178cab MS |
273 | { |
274 | if (registers_pid != inferior_pid) | |
275 | { | |
276 | registers_changed (); | |
277 | registers_pid = inferior_pid; | |
278 | } | |
279 | ||
7302a204 ND |
280 | if (!register_cached (regnum)) |
281 | fetch_register (regnum); | |
282 | ||
283 | memcpy (myaddr, register_buffer (regnum), | |
5ebd2499 | 284 | REGISTER_RAW_SIZE (regnum)); |
32178cab MS |
285 | } |
286 | ||
5ebd2499 ND |
287 | /* Write register REGNUM at MYADDR to the target. MYADDR points at |
288 | REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order. */ | |
32178cab MS |
289 | |
290 | /* Registers we shouldn't try to store. */ | |
291 | #if !defined (CANNOT_STORE_REGISTER) | |
5ebd2499 | 292 | #define CANNOT_STORE_REGISTER(regnum) 0 |
32178cab MS |
293 | #endif |
294 | ||
295 | void | |
5ebd2499 | 296 | write_register_gen (int regnum, char *myaddr) |
32178cab MS |
297 | { |
298 | int size; | |
299 | ||
300 | /* On the sparc, writing %g0 is a no-op, so we don't even want to | |
301 | change the registers array if something writes to this register. */ | |
5ebd2499 | 302 | if (CANNOT_STORE_REGISTER (regnum)) |
32178cab MS |
303 | return; |
304 | ||
305 | if (registers_pid != inferior_pid) | |
306 | { | |
307 | registers_changed (); | |
308 | registers_pid = inferior_pid; | |
309 | } | |
310 | ||
5ebd2499 | 311 | size = REGISTER_RAW_SIZE (regnum); |
32178cab MS |
312 | |
313 | /* If we have a valid copy of the register, and new value == old value, | |
314 | then don't bother doing the actual store. */ | |
315 | ||
7302a204 ND |
316 | if (register_cached (regnum) |
317 | && memcmp (register_buffer (regnum), myaddr, size) == 0) | |
32178cab MS |
318 | return; |
319 | ||
7302a204 | 320 | if (real_register (regnum)) |
fcdc5976 | 321 | target_prepare_to_store (); |
32178cab | 322 | |
7302a204 | 323 | memcpy (register_buffer (regnum), myaddr, size); |
32178cab | 324 | |
7302a204 ND |
325 | set_register_cached (regnum, 1); |
326 | store_register (regnum); | |
32178cab MS |
327 | } |
328 | ||
329 | /* Copy INLEN bytes of consecutive data from memory at MYADDR | |
330 | into registers starting with the MYREGSTART'th byte of register data. */ | |
331 | ||
332 | void | |
333 | write_register_bytes (int myregstart, char *myaddr, int inlen) | |
334 | { | |
335 | int myregend = myregstart + inlen; | |
5ebd2499 | 336 | int regnum; |
32178cab MS |
337 | |
338 | target_prepare_to_store (); | |
339 | ||
340 | /* Scan through the registers updating any that are covered by the | |
341 | range myregstart<=>myregend using write_register_gen, which does | |
342 | nice things like handling threads, and avoiding updates when the | |
343 | new and old contents are the same. */ | |
344 | ||
5ebd2499 | 345 | for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++) |
32178cab MS |
346 | { |
347 | int regstart, regend; | |
348 | ||
5ebd2499 ND |
349 | regstart = REGISTER_BYTE (regnum); |
350 | regend = regstart + REGISTER_RAW_SIZE (regnum); | |
32178cab MS |
351 | |
352 | /* Is this register completely outside the range the user is writing? */ | |
353 | if (myregend <= regstart || regend <= myregstart) | |
354 | /* do nothing */ ; | |
355 | ||
356 | /* Is this register completely within the range the user is writing? */ | |
357 | else if (myregstart <= regstart && regend <= myregend) | |
5ebd2499 | 358 | write_register_gen (regnum, myaddr + (regstart - myregstart)); |
32178cab MS |
359 | |
360 | /* The register partially overlaps the range being written. */ | |
361 | else | |
362 | { | |
e6cbd02a | 363 | char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE); |
32178cab MS |
364 | /* What's the overlap between this register's bytes and |
365 | those the caller wants to write? */ | |
366 | int overlapstart = max (regstart, myregstart); | |
367 | int overlapend = min (regend, myregend); | |
368 | ||
369 | /* We may be doing a partial update of an invalid register. | |
370 | Update it from the target before scribbling on it. */ | |
5ebd2499 | 371 | read_register_gen (regnum, regbuf); |
32178cab MS |
372 | |
373 | memcpy (registers + overlapstart, | |
374 | myaddr + (overlapstart - myregstart), | |
375 | overlapend - overlapstart); | |
376 | ||
7302a204 | 377 | store_register (regnum); |
32178cab MS |
378 | } |
379 | } | |
380 | } | |
381 | ||
382 | ||
5ebd2499 | 383 | /* Return the contents of register REGNUM as an unsigned integer. */ |
32178cab | 384 | |
173155e8 | 385 | ULONGEST |
5ebd2499 | 386 | read_register (int regnum) |
32178cab MS |
387 | { |
388 | if (registers_pid != inferior_pid) | |
389 | { | |
390 | registers_changed (); | |
391 | registers_pid = inferior_pid; | |
392 | } | |
393 | ||
7302a204 ND |
394 | if (!register_cached (regnum)) |
395 | fetch_register (regnum); | |
32178cab | 396 | |
7302a204 | 397 | return (extract_unsigned_integer (register_buffer (regnum), |
5ebd2499 | 398 | REGISTER_RAW_SIZE (regnum))); |
32178cab MS |
399 | } |
400 | ||
173155e8 | 401 | ULONGEST |
5ebd2499 | 402 | read_register_pid (int regnum, int pid) |
32178cab MS |
403 | { |
404 | int save_pid; | |
405 | CORE_ADDR retval; | |
406 | ||
407 | if (pid == inferior_pid) | |
5ebd2499 | 408 | return read_register (regnum); |
32178cab MS |
409 | |
410 | save_pid = inferior_pid; | |
411 | ||
412 | inferior_pid = pid; | |
413 | ||
5ebd2499 | 414 | retval = read_register (regnum); |
32178cab MS |
415 | |
416 | inferior_pid = save_pid; | |
417 | ||
418 | return retval; | |
419 | } | |
420 | ||
5ebd2499 | 421 | /* Return the contents of register REGNUM as a signed integer. */ |
173155e8 AC |
422 | |
423 | LONGEST | |
5ebd2499 | 424 | read_signed_register (int regnum) |
173155e8 AC |
425 | { |
426 | if (registers_pid != inferior_pid) | |
427 | { | |
428 | registers_changed (); | |
429 | registers_pid = inferior_pid; | |
430 | } | |
431 | ||
7302a204 ND |
432 | if (!register_cached (regnum)) |
433 | fetch_register (regnum); | |
173155e8 | 434 | |
7302a204 | 435 | return (extract_signed_integer (register_buffer (regnum), |
5ebd2499 | 436 | REGISTER_RAW_SIZE (regnum))); |
173155e8 AC |
437 | } |
438 | ||
439 | LONGEST | |
5ebd2499 | 440 | read_signed_register_pid (int regnum, int pid) |
173155e8 AC |
441 | { |
442 | int save_pid; | |
443 | LONGEST retval; | |
444 | ||
445 | if (pid == inferior_pid) | |
5ebd2499 | 446 | return read_signed_register (regnum); |
173155e8 AC |
447 | |
448 | save_pid = inferior_pid; | |
449 | ||
450 | inferior_pid = pid; | |
451 | ||
5ebd2499 | 452 | retval = read_signed_register (regnum); |
173155e8 AC |
453 | |
454 | inferior_pid = save_pid; | |
455 | ||
456 | return retval; | |
457 | } | |
458 | ||
5ebd2499 | 459 | /* Store VALUE into the raw contents of register number REGNUM. */ |
32178cab MS |
460 | |
461 | void | |
5ebd2499 | 462 | write_register (int regnum, LONGEST val) |
32178cab MS |
463 | { |
464 | PTR buf; | |
465 | int size; | |
466 | ||
467 | /* On the sparc, writing %g0 is a no-op, so we don't even want to | |
468 | change the registers array if something writes to this register. */ | |
5ebd2499 | 469 | if (CANNOT_STORE_REGISTER (regnum)) |
32178cab MS |
470 | return; |
471 | ||
472 | if (registers_pid != inferior_pid) | |
473 | { | |
474 | registers_changed (); | |
475 | registers_pid = inferior_pid; | |
476 | } | |
477 | ||
5ebd2499 | 478 | size = REGISTER_RAW_SIZE (regnum); |
32178cab MS |
479 | buf = alloca (size); |
480 | store_signed_integer (buf, size, (LONGEST) val); | |
481 | ||
482 | /* If we have a valid copy of the register, and new value == old value, | |
483 | then don't bother doing the actual store. */ | |
484 | ||
7302a204 ND |
485 | if (register_cached (regnum) |
486 | && memcmp (register_buffer (regnum), buf, size) == 0) | |
32178cab MS |
487 | return; |
488 | ||
7302a204 | 489 | if (real_register (regnum)) |
fcdc5976 | 490 | target_prepare_to_store (); |
32178cab | 491 | |
7302a204 | 492 | memcpy (register_buffer (regnum), buf, size); |
32178cab | 493 | |
7302a204 ND |
494 | set_register_cached (regnum, 1); |
495 | store_register (regnum); | |
32178cab MS |
496 | } |
497 | ||
498 | void | |
5ebd2499 | 499 | write_register_pid (int regnum, CORE_ADDR val, int pid) |
32178cab MS |
500 | { |
501 | int save_pid; | |
502 | ||
503 | if (pid == inferior_pid) | |
504 | { | |
5ebd2499 | 505 | write_register (regnum, val); |
32178cab MS |
506 | return; |
507 | } | |
508 | ||
509 | save_pid = inferior_pid; | |
510 | ||
511 | inferior_pid = pid; | |
512 | ||
5ebd2499 | 513 | write_register (regnum, val); |
32178cab MS |
514 | |
515 | inferior_pid = save_pid; | |
516 | } | |
517 | ||
518 | /* SUPPLY_REGISTER() | |
519 | ||
5ebd2499 | 520 | Record that register REGNUM contains VAL. This is used when the |
32178cab MS |
521 | value is obtained from the inferior or core dump, so there is no |
522 | need to store the value there. | |
523 | ||
524 | If VAL is a NULL pointer, then it's probably an unsupported register. | |
5ebd2499 | 525 | We just set its value to all zeros. We might want to record this |
32178cab MS |
526 | fact, and report it to the users of read_register and friends. */ |
527 | ||
528 | void | |
5ebd2499 | 529 | supply_register (int regnum, char *val) |
32178cab MS |
530 | { |
531 | #if 1 | |
532 | if (registers_pid != inferior_pid) | |
533 | { | |
534 | registers_changed (); | |
535 | registers_pid = inferior_pid; | |
536 | } | |
537 | #endif | |
538 | ||
7302a204 | 539 | set_register_cached (regnum, 1); |
32178cab | 540 | if (val) |
7302a204 | 541 | memcpy (register_buffer (regnum), val, |
5ebd2499 | 542 | REGISTER_RAW_SIZE (regnum)); |
32178cab | 543 | else |
7302a204 | 544 | memset (register_buffer (regnum), '\000', |
5ebd2499 | 545 | REGISTER_RAW_SIZE (regnum)); |
32178cab MS |
546 | |
547 | /* On some architectures, e.g. HPPA, there are a few stray bits in | |
548 | some registers, that the rest of the code would like to ignore. */ | |
549 | ||
550 | #ifdef CLEAN_UP_REGISTER_VALUE | |
7302a204 | 551 | CLEAN_UP_REGISTER_VALUE (regnum, register_buffer (regnum)); |
32178cab MS |
552 | #endif |
553 | } | |
554 | ||
555 | /* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc. | |
556 | Special handling for registers PC, SP, and FP. */ | |
557 | ||
4e052eda AC |
558 | /* NOTE: cagney/2001-02-18: The functions generic_target_read_pc(), |
559 | read_pc_pid(), read_pc(), generic_target_write_pc(), | |
560 | write_pc_pid(), write_pc(), generic_target_read_sp(), read_sp(), | |
561 | generic_target_write_sp(), write_sp(), generic_target_read_fp(), | |
562 | read_fp(), generic_target_write_fp(), write_fp will eventually be | |
563 | moved out of the reg-cache into either frame.[hc] or to the | |
564 | multi-arch framework. The are not part of the raw register cache. */ | |
565 | ||
32178cab MS |
566 | /* This routine is getting awfully cluttered with #if's. It's probably |
567 | time to turn this into READ_PC and define it in the tm.h file. | |
568 | Ditto for write_pc. | |
569 | ||
570 | 1999-06-08: The following were re-written so that it assumes the | |
8e1a459b | 571 | existence of a TARGET_READ_PC et.al. macro. A default generic |
32178cab MS |
572 | version of that macro is made available where needed. |
573 | ||
574 | Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled | |
575 | by the multi-arch framework, it will eventually be possible to | |
576 | eliminate the intermediate read_pc_pid(). The client would call | |
577 | TARGET_READ_PC directly. (cagney). */ | |
578 | ||
32178cab MS |
579 | CORE_ADDR |
580 | generic_target_read_pc (int pid) | |
581 | { | |
582 | #ifdef PC_REGNUM | |
583 | if (PC_REGNUM >= 0) | |
584 | { | |
585 | CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, pid)); | |
586 | return pc_val; | |
587 | } | |
588 | #endif | |
8e65ff28 AC |
589 | internal_error (__FILE__, __LINE__, |
590 | "generic_target_read_pc"); | |
32178cab MS |
591 | return 0; |
592 | } | |
593 | ||
594 | CORE_ADDR | |
595 | read_pc_pid (int pid) | |
596 | { | |
597 | int saved_inferior_pid; | |
598 | CORE_ADDR pc_val; | |
599 | ||
600 | /* In case pid != inferior_pid. */ | |
601 | saved_inferior_pid = inferior_pid; | |
602 | inferior_pid = pid; | |
603 | ||
604 | pc_val = TARGET_READ_PC (pid); | |
605 | ||
606 | inferior_pid = saved_inferior_pid; | |
607 | return pc_val; | |
608 | } | |
609 | ||
610 | CORE_ADDR | |
611 | read_pc (void) | |
612 | { | |
613 | return read_pc_pid (inferior_pid); | |
614 | } | |
615 | ||
32178cab MS |
616 | void |
617 | generic_target_write_pc (CORE_ADDR pc, int pid) | |
618 | { | |
619 | #ifdef PC_REGNUM | |
620 | if (PC_REGNUM >= 0) | |
621 | write_register_pid (PC_REGNUM, pc, pid); | |
622 | if (NPC_REGNUM >= 0) | |
623 | write_register_pid (NPC_REGNUM, pc + 4, pid); | |
624 | if (NNPC_REGNUM >= 0) | |
625 | write_register_pid (NNPC_REGNUM, pc + 8, pid); | |
626 | #else | |
8e65ff28 AC |
627 | internal_error (__FILE__, __LINE__, |
628 | "generic_target_write_pc"); | |
32178cab MS |
629 | #endif |
630 | } | |
631 | ||
632 | void | |
633 | write_pc_pid (CORE_ADDR pc, int pid) | |
634 | { | |
635 | int saved_inferior_pid; | |
636 | ||
637 | /* In case pid != inferior_pid. */ | |
638 | saved_inferior_pid = inferior_pid; | |
639 | inferior_pid = pid; | |
640 | ||
641 | TARGET_WRITE_PC (pc, pid); | |
642 | ||
643 | inferior_pid = saved_inferior_pid; | |
644 | } | |
645 | ||
646 | void | |
647 | write_pc (CORE_ADDR pc) | |
648 | { | |
649 | write_pc_pid (pc, inferior_pid); | |
650 | } | |
651 | ||
652 | /* Cope with strage ways of getting to the stack and frame pointers */ | |
653 | ||
32178cab MS |
654 | CORE_ADDR |
655 | generic_target_read_sp (void) | |
656 | { | |
657 | #ifdef SP_REGNUM | |
658 | if (SP_REGNUM >= 0) | |
659 | return read_register (SP_REGNUM); | |
660 | #endif | |
8e65ff28 AC |
661 | internal_error (__FILE__, __LINE__, |
662 | "generic_target_read_sp"); | |
32178cab MS |
663 | } |
664 | ||
665 | CORE_ADDR | |
666 | read_sp (void) | |
667 | { | |
668 | return TARGET_READ_SP (); | |
669 | } | |
670 | ||
32178cab MS |
671 | void |
672 | generic_target_write_sp (CORE_ADDR val) | |
673 | { | |
674 | #ifdef SP_REGNUM | |
675 | if (SP_REGNUM >= 0) | |
676 | { | |
677 | write_register (SP_REGNUM, val); | |
678 | return; | |
679 | } | |
680 | #endif | |
8e65ff28 AC |
681 | internal_error (__FILE__, __LINE__, |
682 | "generic_target_write_sp"); | |
32178cab MS |
683 | } |
684 | ||
685 | void | |
686 | write_sp (CORE_ADDR val) | |
687 | { | |
688 | TARGET_WRITE_SP (val); | |
689 | } | |
690 | ||
32178cab MS |
691 | CORE_ADDR |
692 | generic_target_read_fp (void) | |
693 | { | |
694 | #ifdef FP_REGNUM | |
695 | if (FP_REGNUM >= 0) | |
696 | return read_register (FP_REGNUM); | |
697 | #endif | |
8e65ff28 AC |
698 | internal_error (__FILE__, __LINE__, |
699 | "generic_target_read_fp"); | |
32178cab MS |
700 | } |
701 | ||
702 | CORE_ADDR | |
703 | read_fp (void) | |
704 | { | |
705 | return TARGET_READ_FP (); | |
706 | } | |
707 | ||
32178cab MS |
708 | void |
709 | generic_target_write_fp (CORE_ADDR val) | |
710 | { | |
711 | #ifdef FP_REGNUM | |
712 | if (FP_REGNUM >= 0) | |
713 | { | |
714 | write_register (FP_REGNUM, val); | |
715 | return; | |
716 | } | |
717 | #endif | |
8e65ff28 AC |
718 | internal_error (__FILE__, __LINE__, |
719 | "generic_target_write_fp"); | |
32178cab MS |
720 | } |
721 | ||
722 | void | |
723 | write_fp (CORE_ADDR val) | |
724 | { | |
725 | TARGET_WRITE_FP (val); | |
726 | } | |
727 | ||
705152c5 MS |
728 | /* ARGSUSED */ |
729 | static void | |
730 | reg_flush_command (char *command, int from_tty) | |
731 | { | |
732 | /* Force-flush the register cache. */ | |
733 | registers_changed (); | |
734 | if (from_tty) | |
735 | printf_filtered ("Register cache flushed.\n"); | |
736 | } | |
737 | ||
738 | ||
32178cab MS |
739 | static void |
740 | build_regcache (void) | |
741 | { | |
742 | /* We allocate some extra slop since we do a lot of memcpy's around | |
743 | `registers', and failing-soft is better than failing hard. */ | |
744 | int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256; | |
fcdc5976 MS |
745 | int sizeof_register_valid = |
746 | (NUM_REGS + NUM_PSEUDO_REGS) * sizeof (*register_valid); | |
32178cab MS |
747 | registers = xmalloc (sizeof_registers); |
748 | memset (registers, 0, sizeof_registers); | |
749 | register_valid = xmalloc (sizeof_register_valid); | |
750 | memset (register_valid, 0, sizeof_register_valid); | |
751 | } | |
752 | ||
753 | void | |
754 | _initialize_regcache (void) | |
755 | { | |
756 | build_regcache (); | |
757 | ||
758 | register_gdbarch_swap (®isters, sizeof (registers), NULL); | |
759 | register_gdbarch_swap (®ister_valid, sizeof (register_valid), NULL); | |
760 | register_gdbarch_swap (NULL, 0, build_regcache); | |
705152c5 MS |
761 | |
762 | add_com ("flushregs", class_maintenance, reg_flush_command, | |
763 | "Force gdb to flush its register cache (maintainer command)"); | |
32178cab | 764 | } |