2002-04-09 Daniel Jacobowitz <drow@mvista.com>
[deliverable/binutils-gdb.git] / gdb / regcache.c
CommitLineData
32178cab 1/* Cache and manage the values of registers for GDB, the GNU debugger.
b6ba6518 2 Copyright 1986, 1987, 1989, 1991, 1994, 1995, 1996, 1998, 2000, 2001
32178cab
MS
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
32178cab
MS
23#include "inferior.h"
24#include "target.h"
25#include "gdbarch.h"
705152c5 26#include "gdbcmd.h"
4e052eda 27#include "regcache.h"
61a0eb5b 28#include "gdb_assert.h"
32178cab
MS
29
30/*
31 * DATA STRUCTURE
32 *
33 * Here is the actual register cache.
34 */
35
5ebd2499 36/* NOTE: this is a write-through cache. There is no "dirty" bit for
32178cab
MS
37 recording if the register values have been changed (eg. by the
38 user). Therefore all registers must be written back to the
39 target when appropriate. */
40
41/* REGISTERS contains the cached register values (in target byte order). */
42
43char *registers;
44
45/* REGISTER_VALID is 0 if the register needs to be fetched,
46 1 if it has been fetched, and
47 -1 if the register value was not available.
48 "Not available" means don't try to fetch it again. */
49
50signed char *register_valid;
51
39f77062 52/* The thread/process associated with the current set of registers. */
32178cab 53
39f77062 54static ptid_t registers_ptid;
32178cab
MS
55
56/*
57 * FUNCTIONS:
58 */
59
60/* REGISTER_CACHED()
61
62 Returns 0 if the value is not in the cache (needs fetch).
63 >0 if the value is in the cache.
64 <0 if the value is permanently unavailable (don't ask again). */
65
66int
67register_cached (int regnum)
68{
69 return register_valid[regnum];
70}
71
7302a204
ND
72/* Record that REGNUM's value is cached if STATE is >0, uncached but
73 fetchable if STATE is 0, and uncached and unfetchable if STATE is <0. */
74
75void
76set_register_cached (int regnum, int state)
77{
78 register_valid[regnum] = state;
79}
80
2dc4e391
DT
81/* REGISTER_CHANGED
82
83 invalidate a single register REGNUM in the cache */
84void
85register_changed (int regnum)
86{
7302a204
ND
87 set_register_cached (regnum, 0);
88}
89
90/* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area,
91 else return a pointer to the start of the cache buffer. */
92
193cb69f 93static char *
7302a204
ND
94register_buffer (int regnum)
95{
31e9866e
AC
96 gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
97 return &registers[REGISTER_BYTE (regnum)];
7302a204
ND
98}
99
100/* Return whether register REGNUM is a real register. */
101
102static int
103real_register (int regnum)
104{
105 return regnum >= 0 && regnum < NUM_REGS;
106}
107
108/* Return whether register REGNUM is a pseudo register. */
109
110static int
111pseudo_register (int regnum)
112{
113 return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS;
114}
115
116/* Fetch register REGNUM into the cache. */
117
118static void
119fetch_register (int regnum)
120{
31e9866e
AC
121 /* NOTE: cagney/2001-12-04: Legacy targets were using fetch/store
122 pseudo-register as a way of handling registers that needed to be
123 constructed from one or more raw registers. New targets instead
124 use gdbarch register read/write. */
125 if (FETCH_PSEUDO_REGISTER_P ()
126 && pseudo_register (regnum))
7302a204 127 FETCH_PSEUDO_REGISTER (regnum);
6af4589c
MS
128 else
129 target_fetch_registers (regnum);
7302a204
ND
130}
131
132/* Write register REGNUM cached value to the target. */
133
134static void
135store_register (int regnum)
136{
31e9866e
AC
137 /* NOTE: cagney/2001-12-04: Legacy targets were using fetch/store
138 pseudo-register as a way of handling registers that needed to be
139 constructed from one or more raw registers. New targets instead
140 use gdbarch register read/write. */
141 if (STORE_PSEUDO_REGISTER_P ()
142 && pseudo_register (regnum))
7302a204 143 STORE_PSEUDO_REGISTER (regnum);
6af4589c
MS
144 else
145 target_store_registers (regnum);
2dc4e391
DT
146}
147
32178cab
MS
148/* Low level examining and depositing of registers.
149
150 The caller is responsible for making sure that the inferior is
151 stopped before calling the fetching routines, or it will get
152 garbage. (a change from GDB version 3, in which the caller got the
153 value from the last stop). */
154
155/* REGISTERS_CHANGED ()
156
157 Indicate that registers may have changed, so invalidate the cache. */
158
159void
160registers_changed (void)
161{
162 int i;
32178cab 163
39f77062 164 registers_ptid = pid_to_ptid (-1);
32178cab
MS
165
166 /* Force cleanup of any alloca areas if using C alloca instead of
167 a builtin alloca. This particular call is used to clean up
168 areas allocated by low level target code which may build up
169 during lengthy interactions between gdb and the target before
170 gdb gives control to the user (ie watchpoints). */
171 alloca (0);
172
31e9866e 173 for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
7302a204 174 set_register_cached (i, 0);
32178cab
MS
175
176 if (registers_changed_hook)
177 registers_changed_hook ();
178}
179
180/* REGISTERS_FETCHED ()
181
182 Indicate that all registers have been fetched, so mark them all valid. */
183
31e9866e
AC
184/* NOTE: cagney/2001-12-04: This function does not set valid on the
185 pseudo-register range since pseudo registers are always supplied
186 using supply_register(). */
187/* FIXME: cagney/2001-12-04: This function is DEPRECATED. The target
188 code was blatting the registers[] array and then calling this.
189 Since targets should only be using supply_register() the need for
190 this function/hack is eliminated. */
32178cab
MS
191
192void
193registers_fetched (void)
194{
195 int i;
32178cab 196
a728f042 197 for (i = 0; i < NUM_REGS; i++)
7302a204 198 set_register_cached (i, 1);
fcdc5976 199 /* Do not assume that the pseudo-regs have also been fetched.
31e9866e 200 Fetching all real regs NEVER accounts for pseudo-regs. */
32178cab
MS
201}
202
203/* read_register_bytes and write_register_bytes are generally a *BAD*
204 idea. They are inefficient because they need to check for partial
205 updates, which can only be done by scanning through all of the
206 registers and seeing if the bytes that are being read/written fall
207 inside of an invalid register. [The main reason this is necessary
208 is that register sizes can vary, so a simple index won't suffice.]
209 It is far better to call read_register_gen and write_register_gen
210 if you want to get at the raw register contents, as it only takes a
5ebd2499 211 regnum as an argument, and therefore can't do a partial register
32178cab
MS
212 update.
213
214 Prior to the recent fixes to check for partial updates, both read
215 and write_register_bytes always checked to see if any registers
216 were stale, and then called target_fetch_registers (-1) to update
217 the whole set. This caused really slowed things down for remote
218 targets. */
219
220/* Copy INLEN bytes of consecutive data from registers
221 starting with the INREGBYTE'th byte of register data
222 into memory at MYADDR. */
223
224void
61a0eb5b 225read_register_bytes (int in_start, char *in_buf, int in_len)
32178cab 226{
61a0eb5b 227 int in_end = in_start + in_len;
5ebd2499 228 int regnum;
61a0eb5b 229 char *reg_buf = alloca (MAX_REGISTER_RAW_SIZE);
32178cab
MS
230
231 /* See if we are trying to read bytes from out-of-date registers. If so,
232 update just those registers. */
233
5ebd2499 234 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
32178cab 235 {
61a0eb5b
AC
236 int reg_start;
237 int reg_end;
238 int reg_len;
239 int start;
240 int end;
241 int byte;
32178cab 242
61a0eb5b
AC
243 reg_start = REGISTER_BYTE (regnum);
244 reg_len = REGISTER_RAW_SIZE (regnum);
245 reg_end = reg_start + reg_len;
32178cab 246
61a0eb5b 247 if (reg_end <= in_start || in_end <= reg_start)
5ebd2499 248 /* The range the user wants to read doesn't overlap with regnum. */
32178cab
MS
249 continue;
250
275f450c
AC
251 if (REGISTER_NAME (regnum) != NULL && *REGISTER_NAME (regnum) != '\0')
252 /* Force the cache to fetch the entire register. */
253 read_register_gen (regnum, reg_buf);
254 else
255 /* Legacy note: even though this register is ``invalid'' we
256 still need to return something. It would appear that some
257 code relies on apparent gaps in the register array also
258 being returned. */
259 /* FIXME: cagney/2001-08-18: This is just silly. It defeats
260 the entire register read/write flow of control. Must
261 resist temptation to return 0xdeadbeef. */
262 memcpy (reg_buf, registers + reg_start, reg_len);
32178cab 263
61a0eb5b
AC
264 /* Legacy note: This function, for some reason, allows a NULL
265 input buffer. If the buffer is NULL, the registers are still
266 fetched, just the final transfer is skipped. */
267 if (in_buf == NULL)
268 continue;
269
270 /* start = max (reg_start, in_start) */
271 if (reg_start > in_start)
272 start = reg_start;
273 else
274 start = in_start;
275
276 /* end = min (reg_end, in_end) */
277 if (reg_end < in_end)
278 end = reg_end;
279 else
280 end = in_end;
281
282 /* Transfer just the bytes common to both IN_BUF and REG_BUF */
283 for (byte = start; byte < end; byte++)
165cd47f 284 {
61a0eb5b 285 in_buf[byte - in_start] = reg_buf[byte - reg_start];
165cd47f 286 }
32178cab 287 }
32178cab
MS
288}
289
5ebd2499
ND
290/* Read register REGNUM into memory at MYADDR, which must be large
291 enough for REGISTER_RAW_BYTES (REGNUM). Target byte-order. If the
32178cab
MS
292 register is known to be the size of a CORE_ADDR or smaller,
293 read_register can be used instead. */
294
61a0eb5b
AC
295static void
296legacy_read_register_gen (int regnum, char *myaddr)
32178cab 297{
61a0eb5b 298 gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
39f77062 299 if (! ptid_equal (registers_ptid, inferior_ptid))
32178cab
MS
300 {
301 registers_changed ();
39f77062 302 registers_ptid = inferior_ptid;
32178cab
MS
303 }
304
7302a204
ND
305 if (!register_cached (regnum))
306 fetch_register (regnum);
307
308 memcpy (myaddr, register_buffer (regnum),
5ebd2499 309 REGISTER_RAW_SIZE (regnum));
32178cab
MS
310}
311
61a0eb5b
AC
312void
313regcache_read (int rawnum, char *buf)
314{
2076c72b 315 gdb_assert (rawnum >= 0 && rawnum < (NUM_REGS + NUM_PSEUDO_REGS));
61a0eb5b
AC
316 /* For moment, just use underlying legacy code. Ulgh!!! */
317 legacy_read_register_gen (rawnum, buf);
318}
319
320void
321read_register_gen (int regnum, char *buf)
322{
323 if (! gdbarch_register_read_p (current_gdbarch))
324 {
325 legacy_read_register_gen (regnum, buf);
326 return;
327 }
328 gdbarch_register_read (current_gdbarch, regnum, buf);
329}
330
331
5ebd2499
ND
332/* Write register REGNUM at MYADDR to the target. MYADDR points at
333 REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order. */
32178cab 334
61a0eb5b
AC
335static void
336legacy_write_register_gen (int regnum, char *myaddr)
32178cab
MS
337{
338 int size;
61a0eb5b 339 gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS));
32178cab
MS
340
341 /* On the sparc, writing %g0 is a no-op, so we don't even want to
342 change the registers array if something writes to this register. */
5ebd2499 343 if (CANNOT_STORE_REGISTER (regnum))
32178cab
MS
344 return;
345
39f77062 346 if (! ptid_equal (registers_ptid, inferior_ptid))
32178cab
MS
347 {
348 registers_changed ();
39f77062 349 registers_ptid = inferior_ptid;
32178cab
MS
350 }
351
5ebd2499 352 size = REGISTER_RAW_SIZE (regnum);
32178cab 353
7302a204 354 if (real_register (regnum))
1297a2f0
MS
355 {
356 /* If we have a valid copy of the register, and new value == old
357 value, then don't bother doing the actual store. */
358 if (register_cached (regnum)
359 && memcmp (register_buffer (regnum), myaddr, size) == 0)
360 return;
361 else
362 target_prepare_to_store ();
363 }
32178cab 364
7302a204 365 memcpy (register_buffer (regnum), myaddr, size);
32178cab 366
7302a204
ND
367 set_register_cached (regnum, 1);
368 store_register (regnum);
32178cab
MS
369}
370
61a0eb5b
AC
371void
372regcache_write (int rawnum, char *buf)
373{
2076c72b 374 gdb_assert (rawnum >= 0 && rawnum < (NUM_REGS + NUM_PSEUDO_REGS));
61a0eb5b
AC
375 /* For moment, just use underlying legacy code. Ulgh!!! */
376 legacy_write_register_gen (rawnum, buf);
377}
378
379void
380write_register_gen (int regnum, char *buf)
381{
382 if (! gdbarch_register_write_p (current_gdbarch))
383 {
384 legacy_write_register_gen (regnum, buf);
385 return;
386 }
387 gdbarch_register_write (current_gdbarch, regnum, buf);
388}
389
32178cab
MS
390/* Copy INLEN bytes of consecutive data from memory at MYADDR
391 into registers starting with the MYREGSTART'th byte of register data. */
392
393void
394write_register_bytes (int myregstart, char *myaddr, int inlen)
395{
396 int myregend = myregstart + inlen;
5ebd2499 397 int regnum;
32178cab
MS
398
399 target_prepare_to_store ();
400
401 /* Scan through the registers updating any that are covered by the
402 range myregstart<=>myregend using write_register_gen, which does
403 nice things like handling threads, and avoiding updates when the
404 new and old contents are the same. */
405
5ebd2499 406 for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++)
32178cab
MS
407 {
408 int regstart, regend;
409
5ebd2499
ND
410 regstart = REGISTER_BYTE (regnum);
411 regend = regstart + REGISTER_RAW_SIZE (regnum);
32178cab
MS
412
413 /* Is this register completely outside the range the user is writing? */
414 if (myregend <= regstart || regend <= myregstart)
415 /* do nothing */ ;
416
417 /* Is this register completely within the range the user is writing? */
418 else if (myregstart <= regstart && regend <= myregend)
5ebd2499 419 write_register_gen (regnum, myaddr + (regstart - myregstart));
32178cab
MS
420
421 /* The register partially overlaps the range being written. */
422 else
423 {
e6cbd02a 424 char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE);
32178cab
MS
425 /* What's the overlap between this register's bytes and
426 those the caller wants to write? */
427 int overlapstart = max (regstart, myregstart);
428 int overlapend = min (regend, myregend);
429
430 /* We may be doing a partial update of an invalid register.
431 Update it from the target before scribbling on it. */
5ebd2499 432 read_register_gen (regnum, regbuf);
32178cab
MS
433
434 memcpy (registers + overlapstart,
435 myaddr + (overlapstart - myregstart),
436 overlapend - overlapstart);
437
7302a204 438 store_register (regnum);
32178cab
MS
439 }
440 }
441}
442
443
5ebd2499 444/* Return the contents of register REGNUM as an unsigned integer. */
32178cab 445
173155e8 446ULONGEST
5ebd2499 447read_register (int regnum)
32178cab 448{
61a0eb5b
AC
449 char *buf = alloca (REGISTER_RAW_SIZE (regnum));
450 read_register_gen (regnum, buf);
451 return (extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum)));
32178cab
MS
452}
453
173155e8 454ULONGEST
39f77062 455read_register_pid (int regnum, ptid_t ptid)
32178cab 456{
39f77062 457 ptid_t save_ptid;
32178cab
MS
458 int save_pid;
459 CORE_ADDR retval;
460
39f77062 461 if (ptid_equal (ptid, inferior_ptid))
5ebd2499 462 return read_register (regnum);
32178cab 463
39f77062 464 save_ptid = inferior_ptid;
32178cab 465
39f77062 466 inferior_ptid = ptid;
32178cab 467
5ebd2499 468 retval = read_register (regnum);
32178cab 469
39f77062 470 inferior_ptid = save_ptid;
32178cab
MS
471
472 return retval;
473}
474
5ebd2499 475/* Return the contents of register REGNUM as a signed integer. */
173155e8
AC
476
477LONGEST
5ebd2499 478read_signed_register (int regnum)
173155e8 479{
61a0eb5b
AC
480 void *buf = alloca (REGISTER_RAW_SIZE (regnum));
481 read_register_gen (regnum, buf);
482 return (extract_signed_integer (buf, REGISTER_RAW_SIZE (regnum)));
173155e8
AC
483}
484
485LONGEST
39f77062 486read_signed_register_pid (int regnum, ptid_t ptid)
173155e8 487{
39f77062 488 ptid_t save_ptid;
173155e8
AC
489 LONGEST retval;
490
39f77062 491 if (ptid_equal (ptid, inferior_ptid))
5ebd2499 492 return read_signed_register (regnum);
173155e8 493
39f77062 494 save_ptid = inferior_ptid;
173155e8 495
39f77062 496 inferior_ptid = ptid;
173155e8 497
5ebd2499 498 retval = read_signed_register (regnum);
173155e8 499
39f77062 500 inferior_ptid = save_ptid;
173155e8
AC
501
502 return retval;
503}
504
5ebd2499 505/* Store VALUE into the raw contents of register number REGNUM. */
32178cab
MS
506
507void
5ebd2499 508write_register (int regnum, LONGEST val)
32178cab 509{
61a0eb5b 510 void *buf;
32178cab 511 int size;
5ebd2499 512 size = REGISTER_RAW_SIZE (regnum);
32178cab
MS
513 buf = alloca (size);
514 store_signed_integer (buf, size, (LONGEST) val);
61a0eb5b 515 write_register_gen (regnum, buf);
32178cab
MS
516}
517
518void
39f77062 519write_register_pid (int regnum, CORE_ADDR val, ptid_t ptid)
32178cab 520{
39f77062 521 ptid_t save_ptid;
32178cab 522
39f77062 523 if (ptid_equal (ptid, inferior_ptid))
32178cab 524 {
5ebd2499 525 write_register (regnum, val);
32178cab
MS
526 return;
527 }
528
39f77062 529 save_ptid = inferior_ptid;
32178cab 530
39f77062 531 inferior_ptid = ptid;
32178cab 532
5ebd2499 533 write_register (regnum, val);
32178cab 534
39f77062 535 inferior_ptid = save_ptid;
32178cab
MS
536}
537
538/* SUPPLY_REGISTER()
539
5ebd2499 540 Record that register REGNUM contains VAL. This is used when the
32178cab
MS
541 value is obtained from the inferior or core dump, so there is no
542 need to store the value there.
543
544 If VAL is a NULL pointer, then it's probably an unsupported register.
5ebd2499 545 We just set its value to all zeros. We might want to record this
32178cab
MS
546 fact, and report it to the users of read_register and friends. */
547
548void
5ebd2499 549supply_register (int regnum, char *val)
32178cab
MS
550{
551#if 1
39f77062 552 if (! ptid_equal (registers_ptid, inferior_ptid))
32178cab
MS
553 {
554 registers_changed ();
39f77062 555 registers_ptid = inferior_ptid;
32178cab
MS
556 }
557#endif
558
7302a204 559 set_register_cached (regnum, 1);
32178cab 560 if (val)
7302a204 561 memcpy (register_buffer (regnum), val,
5ebd2499 562 REGISTER_RAW_SIZE (regnum));
32178cab 563 else
7302a204 564 memset (register_buffer (regnum), '\000',
5ebd2499 565 REGISTER_RAW_SIZE (regnum));
32178cab
MS
566
567 /* On some architectures, e.g. HPPA, there are a few stray bits in
568 some registers, that the rest of the code would like to ignore. */
569
61a0eb5b
AC
570 /* NOTE: cagney/2001-03-16: The macro CLEAN_UP_REGISTER_VALUE is
571 going to be deprecated. Instead architectures will leave the raw
572 register value as is and instead clean things up as they pass
573 through the method gdbarch_register_read() clean up the
574 values. */
575
4ee3352d
AC
576#ifdef DEPRECATED_CLEAN_UP_REGISTER_VALUE
577 DEPRECATED_CLEAN_UP_REGISTER_VALUE (regnum, register_buffer (regnum));
32178cab
MS
578#endif
579}
580
193cb69f
AC
581void
582regcache_collect (int regnum, void *buf)
583{
584 memcpy (buf, register_buffer (regnum), REGISTER_RAW_SIZE (regnum));
585}
586
587
8227c0ff
AC
588/* read_pc, write_pc, read_sp, write_sp, read_fp, etc. Special
589 handling for registers PC, SP, and FP. */
32178cab 590
4e052eda
AC
591/* NOTE: cagney/2001-02-18: The functions generic_target_read_pc(),
592 read_pc_pid(), read_pc(), generic_target_write_pc(),
593 write_pc_pid(), write_pc(), generic_target_read_sp(), read_sp(),
8227c0ff
AC
594 generic_target_write_sp(), write_sp(), generic_target_read_fp() and
595 read_fp(), will eventually be moved out of the reg-cache into
596 either frame.[hc] or to the multi-arch framework. The are not part
597 of the raw register cache. */
4e052eda 598
32178cab
MS
599/* This routine is getting awfully cluttered with #if's. It's probably
600 time to turn this into READ_PC and define it in the tm.h file.
601 Ditto for write_pc.
602
603 1999-06-08: The following were re-written so that it assumes the
8e1a459b 604 existence of a TARGET_READ_PC et.al. macro. A default generic
32178cab
MS
605 version of that macro is made available where needed.
606
607 Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
608 by the multi-arch framework, it will eventually be possible to
609 eliminate the intermediate read_pc_pid(). The client would call
610 TARGET_READ_PC directly. (cagney). */
611
32178cab 612CORE_ADDR
39f77062 613generic_target_read_pc (ptid_t ptid)
32178cab
MS
614{
615#ifdef PC_REGNUM
616 if (PC_REGNUM >= 0)
617 {
39f77062 618 CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, ptid));
32178cab
MS
619 return pc_val;
620 }
621#endif
8e65ff28
AC
622 internal_error (__FILE__, __LINE__,
623 "generic_target_read_pc");
32178cab
MS
624 return 0;
625}
626
627CORE_ADDR
39f77062 628read_pc_pid (ptid_t ptid)
32178cab 629{
39f77062 630 ptid_t saved_inferior_ptid;
32178cab
MS
631 CORE_ADDR pc_val;
632
39f77062
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633 /* In case ptid != inferior_ptid. */
634 saved_inferior_ptid = inferior_ptid;
635 inferior_ptid = ptid;
32178cab 636
39f77062 637 pc_val = TARGET_READ_PC (ptid);
32178cab 638
39f77062 639 inferior_ptid = saved_inferior_ptid;
32178cab
MS
640 return pc_val;
641}
642
643CORE_ADDR
644read_pc (void)
645{
39f77062 646 return read_pc_pid (inferior_ptid);
32178cab
MS
647}
648
32178cab 649void
39f77062 650generic_target_write_pc (CORE_ADDR pc, ptid_t ptid)
32178cab
MS
651{
652#ifdef PC_REGNUM
653 if (PC_REGNUM >= 0)
39f77062 654 write_register_pid (PC_REGNUM, pc, ptid);
32178cab 655 if (NPC_REGNUM >= 0)
39f77062 656 write_register_pid (NPC_REGNUM, pc + 4, ptid);
32178cab 657 if (NNPC_REGNUM >= 0)
39f77062 658 write_register_pid (NNPC_REGNUM, pc + 8, ptid);
32178cab 659#else
8e65ff28
AC
660 internal_error (__FILE__, __LINE__,
661 "generic_target_write_pc");
32178cab
MS
662#endif
663}
664
665void
39f77062 666write_pc_pid (CORE_ADDR pc, ptid_t ptid)
32178cab 667{
39f77062 668 ptid_t saved_inferior_ptid;
32178cab 669
39f77062
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670 /* In case ptid != inferior_ptid. */
671 saved_inferior_ptid = inferior_ptid;
672 inferior_ptid = ptid;
32178cab 673
39f77062 674 TARGET_WRITE_PC (pc, ptid);
32178cab 675
39f77062 676 inferior_ptid = saved_inferior_ptid;
32178cab
MS
677}
678
679void
680write_pc (CORE_ADDR pc)
681{
39f77062 682 write_pc_pid (pc, inferior_ptid);
32178cab
MS
683}
684
685/* Cope with strage ways of getting to the stack and frame pointers */
686
32178cab
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687CORE_ADDR
688generic_target_read_sp (void)
689{
690#ifdef SP_REGNUM
691 if (SP_REGNUM >= 0)
692 return read_register (SP_REGNUM);
693#endif
8e65ff28
AC
694 internal_error (__FILE__, __LINE__,
695 "generic_target_read_sp");
32178cab
MS
696}
697
698CORE_ADDR
699read_sp (void)
700{
701 return TARGET_READ_SP ();
702}
703
32178cab
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704void
705generic_target_write_sp (CORE_ADDR val)
706{
707#ifdef SP_REGNUM
708 if (SP_REGNUM >= 0)
709 {
710 write_register (SP_REGNUM, val);
711 return;
712 }
713#endif
8e65ff28
AC
714 internal_error (__FILE__, __LINE__,
715 "generic_target_write_sp");
32178cab
MS
716}
717
718void
719write_sp (CORE_ADDR val)
720{
721 TARGET_WRITE_SP (val);
722}
723
32178cab
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724CORE_ADDR
725generic_target_read_fp (void)
726{
727#ifdef FP_REGNUM
728 if (FP_REGNUM >= 0)
729 return read_register (FP_REGNUM);
730#endif
8e65ff28
AC
731 internal_error (__FILE__, __LINE__,
732 "generic_target_read_fp");
32178cab
MS
733}
734
735CORE_ADDR
736read_fp (void)
737{
738 return TARGET_READ_FP ();
739}
740
705152c5
MS
741/* ARGSUSED */
742static void
743reg_flush_command (char *command, int from_tty)
744{
745 /* Force-flush the register cache. */
746 registers_changed ();
747 if (from_tty)
748 printf_filtered ("Register cache flushed.\n");
749}
750
32178cab
MS
751static void
752build_regcache (void)
753{
31e9866e
AC
754 int i;
755 int sizeof_register_valid;
756 /* Come up with the real size of the registers buffer. */
757 int sizeof_registers = REGISTER_BYTES; /* OK use. */
758 for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
759 {
760 long regend;
761 /* Keep extending the buffer so that there is always enough
762 space for all registers. The comparison is necessary since
763 legacy code is free to put registers in random places in the
764 buffer separated by holes. Once REGISTER_BYTE() is killed
765 this can be greatly simplified. */
766 /* FIXME: cagney/2001-12-04: This code shouldn't need to use
767 REGISTER_BYTE(). Unfortunatly, legacy code likes to lay the
768 buffer out so that certain registers just happen to overlap.
769 Ulgh! New targets use gdbarch's register read/write and
770 entirely avoid this uglyness. */
771 regend = REGISTER_BYTE (i) + REGISTER_RAW_SIZE (i);
772 if (sizeof_registers < regend)
773 sizeof_registers = regend;
774 }
32178cab 775 registers = xmalloc (sizeof_registers);
31e9866e
AC
776 sizeof_register_valid = ((NUM_REGS + NUM_PSEUDO_REGS)
777 * sizeof (*register_valid));
32178cab
MS
778 register_valid = xmalloc (sizeof_register_valid);
779 memset (register_valid, 0, sizeof_register_valid);
780}
781
782void
783_initialize_regcache (void)
784{
32178cab
MS
785 register_gdbarch_swap (&registers, sizeof (registers), NULL);
786 register_gdbarch_swap (&register_valid, sizeof (register_valid), NULL);
787 register_gdbarch_swap (NULL, 0, build_regcache);
705152c5
MS
788
789 add_com ("flushregs", class_maintenance, reg_flush_command,
790 "Force gdb to flush its register cache (maintainer command)");
39f77062
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791
792 /* Initialize the thread/process associated with the current set of
793 registers. For now, -1 is special, and means `no current process'. */
794 registers_ptid = pid_to_ptid (-1);
32178cab 795}
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