Just realized the list is in alphabetical order, so
[deliverable/binutils-gdb.git] / gdb / regcache.c
CommitLineData
32178cab
MS
1/* Cache and manage the values of registers for GDB, the GNU debugger.
2 Copyright 1986, 87, 89, 91, 94, 95, 96, 1998, 2000
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "frame.h"
24#include "inferior.h"
25#include "target.h"
26#include "gdbarch.h"
27
28/*
29 * DATA STRUCTURE
30 *
31 * Here is the actual register cache.
32 */
33
34/* NOTE: this is a write-back cache. There is no "dirty" bit for
35 recording if the register values have been changed (eg. by the
36 user). Therefore all registers must be written back to the
37 target when appropriate. */
38
39/* REGISTERS contains the cached register values (in target byte order). */
40
41char *registers;
42
43/* REGISTER_VALID is 0 if the register needs to be fetched,
44 1 if it has been fetched, and
45 -1 if the register value was not available.
46 "Not available" means don't try to fetch it again. */
47
48signed char *register_valid;
49
50/* The thread/process associated with the current set of registers.
51 For now, -1 is special, and means `no current process'. */
52
53static int registers_pid = -1;
54
55/*
56 * FUNCTIONS:
57 */
58
59/* REGISTER_CACHED()
60
61 Returns 0 if the value is not in the cache (needs fetch).
62 >0 if the value is in the cache.
63 <0 if the value is permanently unavailable (don't ask again). */
64
65int
66register_cached (int regnum)
67{
68 return register_valid[regnum];
69}
70
2dc4e391
DT
71/* REGISTER_CHANGED
72
73 invalidate a single register REGNUM in the cache */
74void
75register_changed (int regnum)
76{
77 register_valid[regnum] = 0;
78}
79
32178cab
MS
80/* FIND_SAVED_REGISTER ()
81
82 Return the address in which frame FRAME's value of register REGNUM
83 has been saved in memory. Or return zero if it has not been saved.
84 If REGNUM specifies the SP, the value we return is actually
85 the SP value, not an address where it was saved. */
86
87CORE_ADDR
88find_saved_register (struct frame_info *frame, int regnum)
89{
90 register struct frame_info *frame1 = NULL;
91 register CORE_ADDR addr = 0;
92
93 if (frame == NULL) /* No regs saved if want current frame */
94 return 0;
95
96#ifdef HAVE_REGISTER_WINDOWS
97 /* We assume that a register in a register window will only be saved
98 in one place (since the name changes and/or disappears as you go
99 towards inner frames), so we only call get_frame_saved_regs on
100 the current frame. This is directly in contradiction to the
101 usage below, which assumes that registers used in a frame must be
102 saved in a lower (more interior) frame. This change is a result
103 of working on a register window machine; get_frame_saved_regs
104 always returns the registers saved within a frame, within the
105 context (register namespace) of that frame. */
106
107 /* However, note that we don't want this to return anything if
108 nothing is saved (if there's a frame inside of this one). Also,
109 callers to this routine asking for the stack pointer want the
110 stack pointer saved for *this* frame; this is returned from the
111 next frame. */
112
113 if (REGISTER_IN_WINDOW_P (regnum))
114 {
115 frame1 = get_next_frame (frame);
116 if (!frame1)
117 return 0; /* Registers of this frame are active. */
118
119 /* Get the SP from the next frame in; it will be this
120 current frame. */
121 if (regnum != SP_REGNUM)
122 frame1 = frame;
123
124 FRAME_INIT_SAVED_REGS (frame1);
125 return frame1->saved_regs[regnum]; /* ... which might be zero */
126 }
127#endif /* HAVE_REGISTER_WINDOWS */
128
129 /* Note that this next routine assumes that registers used in
130 frame x will be saved only in the frame that x calls and
131 frames interior to it. This is not true on the sparc, but the
132 above macro takes care of it, so we should be all right. */
133 while (1)
134 {
135 QUIT;
136 frame1 = get_prev_frame (frame1);
137 if (frame1 == 0 || frame1 == frame)
138 break;
139 FRAME_INIT_SAVED_REGS (frame1);
140 if (frame1->saved_regs[regnum])
141 addr = frame1->saved_regs[regnum];
142 }
143
144 return addr;
145}
146
147/* DEFAULT_GET_SAVED_REGISTER ()
148
149 Find register number REGNUM relative to FRAME and put its (raw,
150 target format) contents in *RAW_BUFFER. Set *OPTIMIZED if the
151 variable was optimized out (and thus can't be fetched). Set *LVAL
152 to lval_memory, lval_register, or not_lval, depending on whether
153 the value was fetched from memory, from a register, or in a strange
154 and non-modifiable way (e.g. a frame pointer which was calculated
155 rather than fetched). Set *ADDRP to the address, either in memory
156 on as a REGISTER_BYTE offset into the registers array.
157
158 Note that this implementation never sets *LVAL to not_lval. But
159 it can be replaced by defining GET_SAVED_REGISTER and supplying
160 your own.
161
162 The argument RAW_BUFFER must point to aligned memory. */
163
164static void
165default_get_saved_register (char *raw_buffer,
166 int *optimized,
167 CORE_ADDR *addrp,
168 struct frame_info *frame,
169 int regnum,
170 enum lval_type *lval)
171{
172 CORE_ADDR addr;
173
174 if (!target_has_registers)
175 error ("No registers.");
176
177 /* Normal systems don't optimize out things with register numbers. */
178 if (optimized != NULL)
179 *optimized = 0;
180 addr = find_saved_register (frame, regnum);
181 if (addr != 0)
182 {
183 if (lval != NULL)
184 *lval = lval_memory;
185 if (regnum == SP_REGNUM)
186 {
187 if (raw_buffer != NULL)
188 {
189 /* Put it back in target format. */
190 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
191 (LONGEST) addr);
192 }
193 if (addrp != NULL)
194 *addrp = 0;
195 return;
196 }
197 if (raw_buffer != NULL)
198 target_read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
199 }
200 else
201 {
202 if (lval != NULL)
203 *lval = lval_register;
204 addr = REGISTER_BYTE (regnum);
205 if (raw_buffer != NULL)
206 read_register_gen (regnum, raw_buffer);
207 }
208 if (addrp != NULL)
209 *addrp = addr;
210}
211
f3d21924
AC
212#if !defined (GET_SAVED_REGISTER)
213#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
214 default_get_saved_register(raw_buffer, optimized, addrp, frame, regnum, lval)
215#endif
216
32178cab
MS
217void
218get_saved_register (char *raw_buffer,
219 int *optimized,
220 CORE_ADDR *addrp,
221 struct frame_info *frame,
222 int regnum,
223 enum lval_type *lval)
224{
225 GET_SAVED_REGISTER (raw_buffer, optimized, addrp, frame, regnum, lval);
226}
227
228/* READ_RELATIVE_REGISTER_RAW_BYTES_FOR_FRAME
229
230 Copy the bytes of register REGNUM, relative to the input stack frame,
231 into our memory at MYADDR, in target byte order.
232 The number of bytes copied is REGISTER_RAW_SIZE (REGNUM).
233
234 Returns 1 if could not be read, 0 if could. */
235
236/* FIXME: This function increases the confusion between FP_REGNUM
237 and the virtual/pseudo-frame pointer. */
238
239static int
240read_relative_register_raw_bytes_for_frame (int regnum,
241 char *myaddr,
242 struct frame_info *frame)
243{
244 int optim;
245 if (regnum == FP_REGNUM && frame)
246 {
247 /* Put it back in target format. */
248 store_address (myaddr, REGISTER_RAW_SIZE (FP_REGNUM),
249 (LONGEST) FRAME_FP (frame));
250
251 return 0;
252 }
253
254 get_saved_register (myaddr, &optim, (CORE_ADDR *) NULL, frame,
255 regnum, (enum lval_type *) NULL);
256
257 if (register_valid[regnum] < 0)
258 return 1; /* register value not available */
259
260 return optim;
261}
262
263/* READ_RELATIVE_REGISTER_RAW_BYTES
264
265 Copy the bytes of register REGNUM, relative to the current stack
266 frame, into our memory at MYADDR, in target byte order.
267 The number of bytes copied is REGISTER_RAW_SIZE (REGNUM).
268
269 Returns 1 if could not be read, 0 if could. */
270
271int
272read_relative_register_raw_bytes (int regnum, char *myaddr)
273{
274 return read_relative_register_raw_bytes_for_frame (regnum, myaddr,
275 selected_frame);
276}
277
278
279/* Low level examining and depositing of registers.
280
281 The caller is responsible for making sure that the inferior is
282 stopped before calling the fetching routines, or it will get
283 garbage. (a change from GDB version 3, in which the caller got the
284 value from the last stop). */
285
286/* REGISTERS_CHANGED ()
287
288 Indicate that registers may have changed, so invalidate the cache. */
289
290void
291registers_changed (void)
292{
293 int i;
32178cab
MS
294
295 registers_pid = -1;
296
297 /* Force cleanup of any alloca areas if using C alloca instead of
298 a builtin alloca. This particular call is used to clean up
299 areas allocated by low level target code which may build up
300 during lengthy interactions between gdb and the target before
301 gdb gives control to the user (ie watchpoints). */
302 alloca (0);
303
fcdc5976
MS
304 for (i = 0; i < ARCH_NUM_REGS; i++)
305 register_valid[i] = 0;
306
307 /* Assume that if all the hardware regs have changed,
308 then so have the pseudo-registers. */
309 for (i = NUM_REGS; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
32178cab
MS
310 register_valid[i] = 0;
311
312 if (registers_changed_hook)
313 registers_changed_hook ();
314}
315
316/* REGISTERS_FETCHED ()
317
318 Indicate that all registers have been fetched, so mark them all valid. */
319
320
321void
322registers_fetched (void)
323{
324 int i;
32178cab 325
fcdc5976 326 for (i = 0; i < ARCH_NUM_REGS; i++)
32178cab 327 register_valid[i] = 1;
fcdc5976
MS
328 /* Do not assume that the pseudo-regs have also been fetched.
329 Fetching all real regs might not account for all pseudo-regs. */
32178cab
MS
330}
331
332/* read_register_bytes and write_register_bytes are generally a *BAD*
333 idea. They are inefficient because they need to check for partial
334 updates, which can only be done by scanning through all of the
335 registers and seeing if the bytes that are being read/written fall
336 inside of an invalid register. [The main reason this is necessary
337 is that register sizes can vary, so a simple index won't suffice.]
338 It is far better to call read_register_gen and write_register_gen
339 if you want to get at the raw register contents, as it only takes a
340 regno as an argument, and therefore can't do a partial register
341 update.
342
343 Prior to the recent fixes to check for partial updates, both read
344 and write_register_bytes always checked to see if any registers
345 were stale, and then called target_fetch_registers (-1) to update
346 the whole set. This caused really slowed things down for remote
347 targets. */
348
349/* Copy INLEN bytes of consecutive data from registers
350 starting with the INREGBYTE'th byte of register data
351 into memory at MYADDR. */
352
353void
354read_register_bytes (int inregbyte, char *myaddr, int inlen)
355{
356 int inregend = inregbyte + inlen;
357 int regno;
358
359 if (registers_pid != inferior_pid)
360 {
361 registers_changed ();
362 registers_pid = inferior_pid;
363 }
364
365 /* See if we are trying to read bytes from out-of-date registers. If so,
366 update just those registers. */
367
fcdc5976 368 for (regno = 0; regno < NUM_REGS + NUM_PSEUDO_REGS; regno++)
32178cab
MS
369 {
370 int regstart, regend;
371
372 if (register_valid[regno])
373 continue;
374
375 if (REGISTER_NAME (regno) == NULL || *REGISTER_NAME (regno) == '\0')
376 continue;
377
378 regstart = REGISTER_BYTE (regno);
379 regend = regstart + REGISTER_RAW_SIZE (regno);
380
381 if (regend <= inregbyte || inregend <= regstart)
382 /* The range the user wants to read doesn't overlap with regno. */
383 continue;
384
fcdc5976 385 /* We've found an uncached register where at least one byte will be read.
32178cab 386 Update it from the target. */
fcdc5976
MS
387 if (regno < NUM_REGS)
388 target_fetch_registers (regno);
f4160335 389 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 390 FETCH_PSEUDO_REGISTER (regno);
32178cab
MS
391
392 if (!register_valid[regno])
393 error ("read_register_bytes: Couldn't update register %d.", regno);
394 }
395
396 if (myaddr != NULL)
397 memcpy (myaddr, &registers[inregbyte], inlen);
398}
399
400/* Read register REGNO into memory at MYADDR, which must be large
401 enough for REGISTER_RAW_BYTES (REGNO). Target byte-order. If the
402 register is known to be the size of a CORE_ADDR or smaller,
403 read_register can be used instead. */
404
405void
406read_register_gen (int regno, char *myaddr)
407{
408 if (registers_pid != inferior_pid)
409 {
410 registers_changed ();
411 registers_pid = inferior_pid;
412 }
413
414 if (!register_valid[regno])
fcdc5976
MS
415 {
416 if (regno < NUM_REGS)
417 target_fetch_registers (regno);
418 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 419 FETCH_PSEUDO_REGISTER (regno);
fcdc5976 420 }
32178cab
MS
421 memcpy (myaddr, &registers[REGISTER_BYTE (regno)],
422 REGISTER_RAW_SIZE (regno));
423}
424
425/* Write register REGNO at MYADDR to the target. MYADDR points at
426 REGISTER_RAW_BYTES(REGNO), which must be in target byte-order. */
427
428/* Registers we shouldn't try to store. */
429#if !defined (CANNOT_STORE_REGISTER)
430#define CANNOT_STORE_REGISTER(regno) 0
431#endif
432
433void
434write_register_gen (int regno, char *myaddr)
435{
436 int size;
437
438 /* On the sparc, writing %g0 is a no-op, so we don't even want to
439 change the registers array if something writes to this register. */
440 if (CANNOT_STORE_REGISTER (regno))
441 return;
442
443 if (registers_pid != inferior_pid)
444 {
445 registers_changed ();
446 registers_pid = inferior_pid;
447 }
448
449 size = REGISTER_RAW_SIZE (regno);
450
451 /* If we have a valid copy of the register, and new value == old value,
452 then don't bother doing the actual store. */
453
454 if (register_valid[regno]
455 && memcmp (&registers[REGISTER_BYTE (regno)], myaddr, size) == 0)
456 return;
457
fcdc5976
MS
458 if (regno < NUM_REGS)
459 target_prepare_to_store ();
32178cab
MS
460
461 memcpy (&registers[REGISTER_BYTE (regno)], myaddr, size);
462
463 register_valid[regno] = 1;
464
fcdc5976
MS
465 if (regno < NUM_REGS)
466 target_store_registers (regno);
467 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 468 STORE_PSEUDO_REGISTER (regno);
32178cab
MS
469}
470
471/* Copy INLEN bytes of consecutive data from memory at MYADDR
472 into registers starting with the MYREGSTART'th byte of register data. */
473
474void
475write_register_bytes (int myregstart, char *myaddr, int inlen)
476{
477 int myregend = myregstart + inlen;
478 int regno;
479
480 target_prepare_to_store ();
481
482 /* Scan through the registers updating any that are covered by the
483 range myregstart<=>myregend using write_register_gen, which does
484 nice things like handling threads, and avoiding updates when the
485 new and old contents are the same. */
486
fcdc5976 487 for (regno = 0; regno < NUM_REGS + NUM_PSEUDO_REGS; regno++)
32178cab
MS
488 {
489 int regstart, regend;
490
491 regstart = REGISTER_BYTE (regno);
492 regend = regstart + REGISTER_RAW_SIZE (regno);
493
494 /* Is this register completely outside the range the user is writing? */
495 if (myregend <= regstart || regend <= myregstart)
496 /* do nothing */ ;
497
498 /* Is this register completely within the range the user is writing? */
499 else if (myregstart <= regstart && regend <= myregend)
500 write_register_gen (regno, myaddr + (regstart - myregstart));
501
502 /* The register partially overlaps the range being written. */
503 else
504 {
505 char regbuf[MAX_REGISTER_RAW_SIZE];
506 /* What's the overlap between this register's bytes and
507 those the caller wants to write? */
508 int overlapstart = max (regstart, myregstart);
509 int overlapend = min (regend, myregend);
510
511 /* We may be doing a partial update of an invalid register.
512 Update it from the target before scribbling on it. */
513 read_register_gen (regno, regbuf);
514
515 memcpy (registers + overlapstart,
516 myaddr + (overlapstart - myregstart),
517 overlapend - overlapstart);
518
fcdc5976
MS
519 if (regno < NUM_REGS)
520 target_store_registers (regno);
521 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 522 STORE_PSEUDO_REGISTER (regno);
32178cab
MS
523 }
524 }
525}
526
527
528/* Return the raw contents of register REGNO, regarding it as an
173155e8 529 UNSIGNED integer. */
32178cab 530
173155e8 531ULONGEST
32178cab
MS
532read_register (int regno)
533{
534 if (registers_pid != inferior_pid)
535 {
536 registers_changed ();
537 registers_pid = inferior_pid;
538 }
539
540 if (!register_valid[regno])
fcdc5976
MS
541 {
542 if (regno < NUM_REGS)
543 target_fetch_registers (regno);
f4160335 544 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 545 FETCH_PSEUDO_REGISTER (regno);
fcdc5976 546 }
32178cab 547
173155e8 548 return (extract_unsigned_integer (&registers[REGISTER_BYTE (regno)],
32178cab
MS
549 REGISTER_RAW_SIZE (regno)));
550}
551
173155e8 552ULONGEST
32178cab
MS
553read_register_pid (int regno, int pid)
554{
555 int save_pid;
556 CORE_ADDR retval;
557
558 if (pid == inferior_pid)
559 return read_register (regno);
560
561 save_pid = inferior_pid;
562
563 inferior_pid = pid;
564
565 retval = read_register (regno);
566
567 inferior_pid = save_pid;
568
569 return retval;
570}
571
173155e8
AC
572/* Return the raw contents of register REGNO, regarding it a SIGNED
573 integer. */
574
575LONGEST
576read_signed_register (int regno)
577{
578 if (registers_pid != inferior_pid)
579 {
580 registers_changed ();
581 registers_pid = inferior_pid;
582 }
583
584 if (!register_valid[regno])
585 target_fetch_registers (regno);
586
587 return (extract_signed_integer (&registers[REGISTER_BYTE (regno)],
588 REGISTER_RAW_SIZE (regno)));
589}
590
591LONGEST
592read_signed_register_pid (int regno, int pid)
593{
594 int save_pid;
595 LONGEST retval;
596
597 if (pid == inferior_pid)
598 return read_signed_register (regno);
599
600 save_pid = inferior_pid;
601
602 inferior_pid = pid;
603
604 retval = read_signed_register (regno);
605
606 inferior_pid = save_pid;
607
608 return retval;
609}
610
32178cab
MS
611/* Store VALUE, into the raw contents of register number REGNO. */
612
613void
614write_register (int regno, LONGEST val)
615{
616 PTR buf;
617 int size;
618
619 /* On the sparc, writing %g0 is a no-op, so we don't even want to
620 change the registers array if something writes to this register. */
621 if (CANNOT_STORE_REGISTER (regno))
622 return;
623
624 if (registers_pid != inferior_pid)
625 {
626 registers_changed ();
627 registers_pid = inferior_pid;
628 }
629
630 size = REGISTER_RAW_SIZE (regno);
631 buf = alloca (size);
632 store_signed_integer (buf, size, (LONGEST) val);
633
634 /* If we have a valid copy of the register, and new value == old value,
635 then don't bother doing the actual store. */
636
637 if (register_valid[regno]
638 && memcmp (&registers[REGISTER_BYTE (regno)], buf, size) == 0)
639 return;
640
fcdc5976
MS
641 if (regno < NUM_REGS)
642 target_prepare_to_store ();
32178cab
MS
643
644 memcpy (&registers[REGISTER_BYTE (regno)], buf, size);
645
646 register_valid[regno] = 1;
647
fcdc5976
MS
648 if (regno < NUM_REGS)
649 target_store_registers (regno);
650 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 651 STORE_PSEUDO_REGISTER (regno);
32178cab
MS
652}
653
654void
655write_register_pid (int regno, CORE_ADDR val, int pid)
656{
657 int save_pid;
658
659 if (pid == inferior_pid)
660 {
661 write_register (regno, val);
662 return;
663 }
664
665 save_pid = inferior_pid;
666
667 inferior_pid = pid;
668
669 write_register (regno, val);
670
671 inferior_pid = save_pid;
672}
673
674/* SUPPLY_REGISTER()
675
676 Record that register REGNO contains VAL. This is used when the
677 value is obtained from the inferior or core dump, so there is no
678 need to store the value there.
679
680 If VAL is a NULL pointer, then it's probably an unsupported register.
681 We just set it's value to all zeros. We might want to record this
682 fact, and report it to the users of read_register and friends. */
683
684void
685supply_register (int regno, char *val)
686{
687#if 1
688 if (registers_pid != inferior_pid)
689 {
690 registers_changed ();
691 registers_pid = inferior_pid;
692 }
693#endif
694
695 register_valid[regno] = 1;
696 if (val)
697 memcpy (&registers[REGISTER_BYTE (regno)], val,
698 REGISTER_RAW_SIZE (regno));
699 else
700 memset (&registers[REGISTER_BYTE (regno)], '\000',
701 REGISTER_RAW_SIZE (regno));
702
703 /* On some architectures, e.g. HPPA, there are a few stray bits in
704 some registers, that the rest of the code would like to ignore. */
705
706#ifdef CLEAN_UP_REGISTER_VALUE
707 CLEAN_UP_REGISTER_VALUE (regno, &registers[REGISTER_BYTE (regno)]);
708#endif
709}
710
711/* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc.
712 Special handling for registers PC, SP, and FP. */
713
714/* This routine is getting awfully cluttered with #if's. It's probably
715 time to turn this into READ_PC and define it in the tm.h file.
716 Ditto for write_pc.
717
718 1999-06-08: The following were re-written so that it assumes the
719 existance of a TARGET_READ_PC et.al. macro. A default generic
720 version of that macro is made available where needed.
721
722 Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
723 by the multi-arch framework, it will eventually be possible to
724 eliminate the intermediate read_pc_pid(). The client would call
725 TARGET_READ_PC directly. (cagney). */
726
32178cab
MS
727CORE_ADDR
728generic_target_read_pc (int pid)
729{
730#ifdef PC_REGNUM
731 if (PC_REGNUM >= 0)
732 {
733 CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, pid));
734 return pc_val;
735 }
736#endif
737 internal_error ("generic_target_read_pc");
738 return 0;
739}
740
741CORE_ADDR
742read_pc_pid (int pid)
743{
744 int saved_inferior_pid;
745 CORE_ADDR pc_val;
746
747 /* In case pid != inferior_pid. */
748 saved_inferior_pid = inferior_pid;
749 inferior_pid = pid;
750
751 pc_val = TARGET_READ_PC (pid);
752
753 inferior_pid = saved_inferior_pid;
754 return pc_val;
755}
756
757CORE_ADDR
758read_pc (void)
759{
760 return read_pc_pid (inferior_pid);
761}
762
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763void
764generic_target_write_pc (CORE_ADDR pc, int pid)
765{
766#ifdef PC_REGNUM
767 if (PC_REGNUM >= 0)
768 write_register_pid (PC_REGNUM, pc, pid);
769 if (NPC_REGNUM >= 0)
770 write_register_pid (NPC_REGNUM, pc + 4, pid);
771 if (NNPC_REGNUM >= 0)
772 write_register_pid (NNPC_REGNUM, pc + 8, pid);
773#else
774 internal_error ("generic_target_write_pc");
775#endif
776}
777
778void
779write_pc_pid (CORE_ADDR pc, int pid)
780{
781 int saved_inferior_pid;
782
783 /* In case pid != inferior_pid. */
784 saved_inferior_pid = inferior_pid;
785 inferior_pid = pid;
786
787 TARGET_WRITE_PC (pc, pid);
788
789 inferior_pid = saved_inferior_pid;
790}
791
792void
793write_pc (CORE_ADDR pc)
794{
795 write_pc_pid (pc, inferior_pid);
796}
797
798/* Cope with strage ways of getting to the stack and frame pointers */
799
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800CORE_ADDR
801generic_target_read_sp (void)
802{
803#ifdef SP_REGNUM
804 if (SP_REGNUM >= 0)
805 return read_register (SP_REGNUM);
806#endif
807 internal_error ("generic_target_read_sp");
808}
809
810CORE_ADDR
811read_sp (void)
812{
813 return TARGET_READ_SP ();
814}
815
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816void
817generic_target_write_sp (CORE_ADDR val)
818{
819#ifdef SP_REGNUM
820 if (SP_REGNUM >= 0)
821 {
822 write_register (SP_REGNUM, val);
823 return;
824 }
825#endif
826 internal_error ("generic_target_write_sp");
827}
828
829void
830write_sp (CORE_ADDR val)
831{
832 TARGET_WRITE_SP (val);
833}
834
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835CORE_ADDR
836generic_target_read_fp (void)
837{
838#ifdef FP_REGNUM
839 if (FP_REGNUM >= 0)
840 return read_register (FP_REGNUM);
841#endif
842 internal_error ("generic_target_read_fp");
843}
844
845CORE_ADDR
846read_fp (void)
847{
848 return TARGET_READ_FP ();
849}
850
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851void
852generic_target_write_fp (CORE_ADDR val)
853{
854#ifdef FP_REGNUM
855 if (FP_REGNUM >= 0)
856 {
857 write_register (FP_REGNUM, val);
858 return;
859 }
860#endif
861 internal_error ("generic_target_write_fp");
862}
863
864void
865write_fp (CORE_ADDR val)
866{
867 TARGET_WRITE_FP (val);
868}
869
870static void
871build_regcache (void)
872{
873 /* We allocate some extra slop since we do a lot of memcpy's around
874 `registers', and failing-soft is better than failing hard. */
875 int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256;
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876 int sizeof_register_valid =
877 (NUM_REGS + NUM_PSEUDO_REGS) * sizeof (*register_valid);
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878 registers = xmalloc (sizeof_registers);
879 memset (registers, 0, sizeof_registers);
880 register_valid = xmalloc (sizeof_register_valid);
881 memset (register_valid, 0, sizeof_register_valid);
882}
883
884void
885_initialize_regcache (void)
886{
887 build_regcache ();
888
889 register_gdbarch_swap (&registers, sizeof (registers), NULL);
890 register_gdbarch_swap (&register_valid, sizeof (register_valid), NULL);
891 register_gdbarch_swap (NULL, 0, build_regcache);
892}
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