Commit | Line | Data |
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32178cab | 1 | /* Cache and manage the values of registers for GDB, the GNU debugger. |
b6ba6518 | 2 | Copyright 1986, 1987, 1989, 1991, 1994, 1995, 1996, 1998, 2000, 2001 |
32178cab MS |
3 | Free Software Foundation, Inc. |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include "defs.h" | |
32178cab MS |
23 | #include "inferior.h" |
24 | #include "target.h" | |
25 | #include "gdbarch.h" | |
705152c5 | 26 | #include "gdbcmd.h" |
4e052eda | 27 | #include "regcache.h" |
61a0eb5b | 28 | #include "gdb_assert.h" |
32178cab MS |
29 | |
30 | /* | |
31 | * DATA STRUCTURE | |
32 | * | |
33 | * Here is the actual register cache. | |
34 | */ | |
35 | ||
5ebd2499 | 36 | /* NOTE: this is a write-through cache. There is no "dirty" bit for |
32178cab MS |
37 | recording if the register values have been changed (eg. by the |
38 | user). Therefore all registers must be written back to the | |
39 | target when appropriate. */ | |
40 | ||
41 | /* REGISTERS contains the cached register values (in target byte order). */ | |
42 | ||
43 | char *registers; | |
44 | ||
45 | /* REGISTER_VALID is 0 if the register needs to be fetched, | |
46 | 1 if it has been fetched, and | |
47 | -1 if the register value was not available. | |
48 | "Not available" means don't try to fetch it again. */ | |
49 | ||
50 | signed char *register_valid; | |
51 | ||
39f77062 | 52 | /* The thread/process associated with the current set of registers. */ |
32178cab | 53 | |
39f77062 | 54 | static ptid_t registers_ptid; |
32178cab MS |
55 | |
56 | /* | |
57 | * FUNCTIONS: | |
58 | */ | |
59 | ||
60 | /* REGISTER_CACHED() | |
61 | ||
62 | Returns 0 if the value is not in the cache (needs fetch). | |
63 | >0 if the value is in the cache. | |
64 | <0 if the value is permanently unavailable (don't ask again). */ | |
65 | ||
66 | int | |
67 | register_cached (int regnum) | |
68 | { | |
69 | return register_valid[regnum]; | |
70 | } | |
71 | ||
7302a204 ND |
72 | /* Record that REGNUM's value is cached if STATE is >0, uncached but |
73 | fetchable if STATE is 0, and uncached and unfetchable if STATE is <0. */ | |
74 | ||
75 | void | |
76 | set_register_cached (int regnum, int state) | |
77 | { | |
78 | register_valid[regnum] = state; | |
79 | } | |
80 | ||
2dc4e391 DT |
81 | /* REGISTER_CHANGED |
82 | ||
83 | invalidate a single register REGNUM in the cache */ | |
84 | void | |
85 | register_changed (int regnum) | |
86 | { | |
7302a204 ND |
87 | set_register_cached (regnum, 0); |
88 | } | |
89 | ||
90 | /* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area, | |
91 | else return a pointer to the start of the cache buffer. */ | |
92 | ||
93 | char * | |
94 | register_buffer (int regnum) | |
95 | { | |
96 | if (regnum < 0) | |
97 | return registers; | |
98 | else | |
99 | return ®isters[REGISTER_BYTE (regnum)]; | |
100 | } | |
101 | ||
102 | /* Return whether register REGNUM is a real register. */ | |
103 | ||
104 | static int | |
105 | real_register (int regnum) | |
106 | { | |
107 | return regnum >= 0 && regnum < NUM_REGS; | |
108 | } | |
109 | ||
110 | /* Return whether register REGNUM is a pseudo register. */ | |
111 | ||
112 | static int | |
113 | pseudo_register (int regnum) | |
114 | { | |
115 | return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS; | |
116 | } | |
117 | ||
118 | /* Fetch register REGNUM into the cache. */ | |
119 | ||
120 | static void | |
121 | fetch_register (int regnum) | |
122 | { | |
123 | if (real_register (regnum)) | |
124 | target_fetch_registers (regnum); | |
125 | else if (pseudo_register (regnum)) | |
126 | FETCH_PSEUDO_REGISTER (regnum); | |
127 | } | |
128 | ||
129 | /* Write register REGNUM cached value to the target. */ | |
130 | ||
131 | static void | |
132 | store_register (int regnum) | |
133 | { | |
134 | if (real_register (regnum)) | |
135 | target_store_registers (regnum); | |
136 | else if (pseudo_register (regnum)) | |
137 | STORE_PSEUDO_REGISTER (regnum); | |
2dc4e391 DT |
138 | } |
139 | ||
32178cab MS |
140 | /* Low level examining and depositing of registers. |
141 | ||
142 | The caller is responsible for making sure that the inferior is | |
143 | stopped before calling the fetching routines, or it will get | |
144 | garbage. (a change from GDB version 3, in which the caller got the | |
145 | value from the last stop). */ | |
146 | ||
147 | /* REGISTERS_CHANGED () | |
148 | ||
149 | Indicate that registers may have changed, so invalidate the cache. */ | |
150 | ||
151 | void | |
152 | registers_changed (void) | |
153 | { | |
154 | int i; | |
32178cab | 155 | |
39f77062 | 156 | registers_ptid = pid_to_ptid (-1); |
32178cab MS |
157 | |
158 | /* Force cleanup of any alloca areas if using C alloca instead of | |
159 | a builtin alloca. This particular call is used to clean up | |
160 | areas allocated by low level target code which may build up | |
161 | during lengthy interactions between gdb and the target before | |
162 | gdb gives control to the user (ie watchpoints). */ | |
163 | alloca (0); | |
164 | ||
a728f042 | 165 | for (i = 0; i < NUM_REGS; i++) |
7302a204 | 166 | set_register_cached (i, 0); |
fcdc5976 MS |
167 | |
168 | /* Assume that if all the hardware regs have changed, | |
169 | then so have the pseudo-registers. */ | |
170 | for (i = NUM_REGS; i < NUM_REGS + NUM_PSEUDO_REGS; i++) | |
7302a204 | 171 | set_register_cached (i, 0); |
32178cab MS |
172 | |
173 | if (registers_changed_hook) | |
174 | registers_changed_hook (); | |
175 | } | |
176 | ||
177 | /* REGISTERS_FETCHED () | |
178 | ||
179 | Indicate that all registers have been fetched, so mark them all valid. */ | |
180 | ||
181 | ||
182 | void | |
183 | registers_fetched (void) | |
184 | { | |
185 | int i; | |
32178cab | 186 | |
a728f042 | 187 | for (i = 0; i < NUM_REGS; i++) |
7302a204 | 188 | set_register_cached (i, 1); |
fcdc5976 MS |
189 | /* Do not assume that the pseudo-regs have also been fetched. |
190 | Fetching all real regs might not account for all pseudo-regs. */ | |
32178cab MS |
191 | } |
192 | ||
193 | /* read_register_bytes and write_register_bytes are generally a *BAD* | |
194 | idea. They are inefficient because they need to check for partial | |
195 | updates, which can only be done by scanning through all of the | |
196 | registers and seeing if the bytes that are being read/written fall | |
197 | inside of an invalid register. [The main reason this is necessary | |
198 | is that register sizes can vary, so a simple index won't suffice.] | |
199 | It is far better to call read_register_gen and write_register_gen | |
200 | if you want to get at the raw register contents, as it only takes a | |
5ebd2499 | 201 | regnum as an argument, and therefore can't do a partial register |
32178cab MS |
202 | update. |
203 | ||
204 | Prior to the recent fixes to check for partial updates, both read | |
205 | and write_register_bytes always checked to see if any registers | |
206 | were stale, and then called target_fetch_registers (-1) to update | |
207 | the whole set. This caused really slowed things down for remote | |
208 | targets. */ | |
209 | ||
210 | /* Copy INLEN bytes of consecutive data from registers | |
211 | starting with the INREGBYTE'th byte of register data | |
212 | into memory at MYADDR. */ | |
213 | ||
214 | void | |
61a0eb5b | 215 | read_register_bytes (int in_start, char *in_buf, int in_len) |
32178cab | 216 | { |
61a0eb5b | 217 | int in_end = in_start + in_len; |
5ebd2499 | 218 | int regnum; |
61a0eb5b | 219 | char *reg_buf = alloca (MAX_REGISTER_RAW_SIZE); |
32178cab MS |
220 | |
221 | /* See if we are trying to read bytes from out-of-date registers. If so, | |
222 | update just those registers. */ | |
223 | ||
5ebd2499 | 224 | for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++) |
32178cab | 225 | { |
61a0eb5b AC |
226 | int reg_start; |
227 | int reg_end; | |
228 | int reg_len; | |
229 | int start; | |
230 | int end; | |
231 | int byte; | |
32178cab | 232 | |
5ebd2499 | 233 | if (REGISTER_NAME (regnum) == NULL || *REGISTER_NAME (regnum) == '\0') |
32178cab MS |
234 | continue; |
235 | ||
61a0eb5b AC |
236 | reg_start = REGISTER_BYTE (regnum); |
237 | reg_len = REGISTER_RAW_SIZE (regnum); | |
238 | reg_end = reg_start + reg_len; | |
32178cab | 239 | |
61a0eb5b | 240 | if (reg_end <= in_start || in_end <= reg_start) |
5ebd2499 | 241 | /* The range the user wants to read doesn't overlap with regnum. */ |
32178cab MS |
242 | continue; |
243 | ||
61a0eb5b AC |
244 | /* Force the cache to fetch the entire register. */ |
245 | read_register_gen (regnum, reg_buf); | |
32178cab | 246 | |
61a0eb5b AC |
247 | /* Legacy note: This function, for some reason, allows a NULL |
248 | input buffer. If the buffer is NULL, the registers are still | |
249 | fetched, just the final transfer is skipped. */ | |
250 | if (in_buf == NULL) | |
251 | continue; | |
252 | ||
253 | /* start = max (reg_start, in_start) */ | |
254 | if (reg_start > in_start) | |
255 | start = reg_start; | |
256 | else | |
257 | start = in_start; | |
258 | ||
259 | /* end = min (reg_end, in_end) */ | |
260 | if (reg_end < in_end) | |
261 | end = reg_end; | |
262 | else | |
263 | end = in_end; | |
264 | ||
265 | /* Transfer just the bytes common to both IN_BUF and REG_BUF */ | |
266 | for (byte = start; byte < end; byte++) | |
165cd47f | 267 | { |
61a0eb5b | 268 | in_buf[byte - in_start] = reg_buf[byte - reg_start]; |
165cd47f | 269 | } |
32178cab | 270 | } |
32178cab MS |
271 | } |
272 | ||
5ebd2499 ND |
273 | /* Read register REGNUM into memory at MYADDR, which must be large |
274 | enough for REGISTER_RAW_BYTES (REGNUM). Target byte-order. If the | |
32178cab MS |
275 | register is known to be the size of a CORE_ADDR or smaller, |
276 | read_register can be used instead. */ | |
277 | ||
61a0eb5b AC |
278 | static void |
279 | legacy_read_register_gen (int regnum, char *myaddr) | |
32178cab | 280 | { |
61a0eb5b | 281 | gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS)); |
39f77062 | 282 | if (! ptid_equal (registers_ptid, inferior_ptid)) |
32178cab MS |
283 | { |
284 | registers_changed (); | |
39f77062 | 285 | registers_ptid = inferior_ptid; |
32178cab MS |
286 | } |
287 | ||
7302a204 ND |
288 | if (!register_cached (regnum)) |
289 | fetch_register (regnum); | |
290 | ||
291 | memcpy (myaddr, register_buffer (regnum), | |
5ebd2499 | 292 | REGISTER_RAW_SIZE (regnum)); |
32178cab MS |
293 | } |
294 | ||
61a0eb5b AC |
295 | void |
296 | regcache_read (int rawnum, char *buf) | |
297 | { | |
298 | gdb_assert (rawnum >= 0 && rawnum < NUM_REGS); | |
299 | /* For moment, just use underlying legacy code. Ulgh!!! */ | |
300 | legacy_read_register_gen (rawnum, buf); | |
301 | } | |
302 | ||
303 | void | |
304 | read_register_gen (int regnum, char *buf) | |
305 | { | |
306 | if (! gdbarch_register_read_p (current_gdbarch)) | |
307 | { | |
308 | legacy_read_register_gen (regnum, buf); | |
309 | return; | |
310 | } | |
311 | gdbarch_register_read (current_gdbarch, regnum, buf); | |
312 | } | |
313 | ||
314 | ||
5ebd2499 ND |
315 | /* Write register REGNUM at MYADDR to the target. MYADDR points at |
316 | REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order. */ | |
32178cab | 317 | |
61a0eb5b AC |
318 | static void |
319 | legacy_write_register_gen (int regnum, char *myaddr) | |
32178cab MS |
320 | { |
321 | int size; | |
61a0eb5b | 322 | gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS)); |
32178cab MS |
323 | |
324 | /* On the sparc, writing %g0 is a no-op, so we don't even want to | |
325 | change the registers array if something writes to this register. */ | |
5ebd2499 | 326 | if (CANNOT_STORE_REGISTER (regnum)) |
32178cab MS |
327 | return; |
328 | ||
39f77062 | 329 | if (! ptid_equal (registers_ptid, inferior_ptid)) |
32178cab MS |
330 | { |
331 | registers_changed (); | |
39f77062 | 332 | registers_ptid = inferior_ptid; |
32178cab MS |
333 | } |
334 | ||
5ebd2499 | 335 | size = REGISTER_RAW_SIZE (regnum); |
32178cab | 336 | |
7302a204 | 337 | if (real_register (regnum)) |
1297a2f0 MS |
338 | { |
339 | /* If we have a valid copy of the register, and new value == old | |
340 | value, then don't bother doing the actual store. */ | |
341 | if (register_cached (regnum) | |
342 | && memcmp (register_buffer (regnum), myaddr, size) == 0) | |
343 | return; | |
344 | else | |
345 | target_prepare_to_store (); | |
346 | } | |
32178cab | 347 | |
7302a204 | 348 | memcpy (register_buffer (regnum), myaddr, size); |
32178cab | 349 | |
7302a204 ND |
350 | set_register_cached (regnum, 1); |
351 | store_register (regnum); | |
32178cab MS |
352 | } |
353 | ||
61a0eb5b AC |
354 | void |
355 | regcache_write (int rawnum, char *buf) | |
356 | { | |
357 | gdb_assert (rawnum >= 0 && rawnum < NUM_REGS); | |
358 | /* For moment, just use underlying legacy code. Ulgh!!! */ | |
359 | legacy_write_register_gen (rawnum, buf); | |
360 | } | |
361 | ||
362 | void | |
363 | write_register_gen (int regnum, char *buf) | |
364 | { | |
365 | if (! gdbarch_register_write_p (current_gdbarch)) | |
366 | { | |
367 | legacy_write_register_gen (regnum, buf); | |
368 | return; | |
369 | } | |
370 | gdbarch_register_write (current_gdbarch, regnum, buf); | |
371 | } | |
372 | ||
32178cab MS |
373 | /* Copy INLEN bytes of consecutive data from memory at MYADDR |
374 | into registers starting with the MYREGSTART'th byte of register data. */ | |
375 | ||
376 | void | |
377 | write_register_bytes (int myregstart, char *myaddr, int inlen) | |
378 | { | |
379 | int myregend = myregstart + inlen; | |
5ebd2499 | 380 | int regnum; |
32178cab MS |
381 | |
382 | target_prepare_to_store (); | |
383 | ||
384 | /* Scan through the registers updating any that are covered by the | |
385 | range myregstart<=>myregend using write_register_gen, which does | |
386 | nice things like handling threads, and avoiding updates when the | |
387 | new and old contents are the same. */ | |
388 | ||
5ebd2499 | 389 | for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++) |
32178cab MS |
390 | { |
391 | int regstart, regend; | |
392 | ||
5ebd2499 ND |
393 | regstart = REGISTER_BYTE (regnum); |
394 | regend = regstart + REGISTER_RAW_SIZE (regnum); | |
32178cab MS |
395 | |
396 | /* Is this register completely outside the range the user is writing? */ | |
397 | if (myregend <= regstart || regend <= myregstart) | |
398 | /* do nothing */ ; | |
399 | ||
400 | /* Is this register completely within the range the user is writing? */ | |
401 | else if (myregstart <= regstart && regend <= myregend) | |
5ebd2499 | 402 | write_register_gen (regnum, myaddr + (regstart - myregstart)); |
32178cab MS |
403 | |
404 | /* The register partially overlaps the range being written. */ | |
405 | else | |
406 | { | |
e6cbd02a | 407 | char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE); |
32178cab MS |
408 | /* What's the overlap between this register's bytes and |
409 | those the caller wants to write? */ | |
410 | int overlapstart = max (regstart, myregstart); | |
411 | int overlapend = min (regend, myregend); | |
412 | ||
413 | /* We may be doing a partial update of an invalid register. | |
414 | Update it from the target before scribbling on it. */ | |
5ebd2499 | 415 | read_register_gen (regnum, regbuf); |
32178cab MS |
416 | |
417 | memcpy (registers + overlapstart, | |
418 | myaddr + (overlapstart - myregstart), | |
419 | overlapend - overlapstart); | |
420 | ||
7302a204 | 421 | store_register (regnum); |
32178cab MS |
422 | } |
423 | } | |
424 | } | |
425 | ||
426 | ||
5ebd2499 | 427 | /* Return the contents of register REGNUM as an unsigned integer. */ |
32178cab | 428 | |
173155e8 | 429 | ULONGEST |
5ebd2499 | 430 | read_register (int regnum) |
32178cab | 431 | { |
61a0eb5b AC |
432 | char *buf = alloca (REGISTER_RAW_SIZE (regnum)); |
433 | read_register_gen (regnum, buf); | |
434 | return (extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum))); | |
32178cab MS |
435 | } |
436 | ||
173155e8 | 437 | ULONGEST |
39f77062 | 438 | read_register_pid (int regnum, ptid_t ptid) |
32178cab | 439 | { |
39f77062 | 440 | ptid_t save_ptid; |
32178cab MS |
441 | int save_pid; |
442 | CORE_ADDR retval; | |
443 | ||
39f77062 | 444 | if (ptid_equal (ptid, inferior_ptid)) |
5ebd2499 | 445 | return read_register (regnum); |
32178cab | 446 | |
39f77062 | 447 | save_ptid = inferior_ptid; |
32178cab | 448 | |
39f77062 | 449 | inferior_ptid = ptid; |
32178cab | 450 | |
5ebd2499 | 451 | retval = read_register (regnum); |
32178cab | 452 | |
39f77062 | 453 | inferior_ptid = save_ptid; |
32178cab MS |
454 | |
455 | return retval; | |
456 | } | |
457 | ||
5ebd2499 | 458 | /* Return the contents of register REGNUM as a signed integer. */ |
173155e8 AC |
459 | |
460 | LONGEST | |
5ebd2499 | 461 | read_signed_register (int regnum) |
173155e8 | 462 | { |
61a0eb5b AC |
463 | void *buf = alloca (REGISTER_RAW_SIZE (regnum)); |
464 | read_register_gen (regnum, buf); | |
465 | return (extract_signed_integer (buf, REGISTER_RAW_SIZE (regnum))); | |
173155e8 AC |
466 | } |
467 | ||
468 | LONGEST | |
39f77062 | 469 | read_signed_register_pid (int regnum, ptid_t ptid) |
173155e8 | 470 | { |
39f77062 | 471 | ptid_t save_ptid; |
173155e8 AC |
472 | LONGEST retval; |
473 | ||
39f77062 | 474 | if (ptid_equal (ptid, inferior_ptid)) |
5ebd2499 | 475 | return read_signed_register (regnum); |
173155e8 | 476 | |
39f77062 | 477 | save_ptid = inferior_ptid; |
173155e8 | 478 | |
39f77062 | 479 | inferior_ptid = ptid; |
173155e8 | 480 | |
5ebd2499 | 481 | retval = read_signed_register (regnum); |
173155e8 | 482 | |
39f77062 | 483 | inferior_ptid = save_ptid; |
173155e8 AC |
484 | |
485 | return retval; | |
486 | } | |
487 | ||
5ebd2499 | 488 | /* Store VALUE into the raw contents of register number REGNUM. */ |
32178cab MS |
489 | |
490 | void | |
5ebd2499 | 491 | write_register (int regnum, LONGEST val) |
32178cab | 492 | { |
61a0eb5b | 493 | void *buf; |
32178cab | 494 | int size; |
5ebd2499 | 495 | size = REGISTER_RAW_SIZE (regnum); |
32178cab MS |
496 | buf = alloca (size); |
497 | store_signed_integer (buf, size, (LONGEST) val); | |
61a0eb5b | 498 | write_register_gen (regnum, buf); |
32178cab MS |
499 | } |
500 | ||
501 | void | |
39f77062 | 502 | write_register_pid (int regnum, CORE_ADDR val, ptid_t ptid) |
32178cab | 503 | { |
39f77062 | 504 | ptid_t save_ptid; |
32178cab | 505 | |
39f77062 | 506 | if (ptid_equal (ptid, inferior_ptid)) |
32178cab | 507 | { |
5ebd2499 | 508 | write_register (regnum, val); |
32178cab MS |
509 | return; |
510 | } | |
511 | ||
39f77062 | 512 | save_ptid = inferior_ptid; |
32178cab | 513 | |
39f77062 | 514 | inferior_ptid = ptid; |
32178cab | 515 | |
5ebd2499 | 516 | write_register (regnum, val); |
32178cab | 517 | |
39f77062 | 518 | inferior_ptid = save_ptid; |
32178cab MS |
519 | } |
520 | ||
521 | /* SUPPLY_REGISTER() | |
522 | ||
5ebd2499 | 523 | Record that register REGNUM contains VAL. This is used when the |
32178cab MS |
524 | value is obtained from the inferior or core dump, so there is no |
525 | need to store the value there. | |
526 | ||
527 | If VAL is a NULL pointer, then it's probably an unsupported register. | |
5ebd2499 | 528 | We just set its value to all zeros. We might want to record this |
32178cab MS |
529 | fact, and report it to the users of read_register and friends. */ |
530 | ||
531 | void | |
5ebd2499 | 532 | supply_register (int regnum, char *val) |
32178cab MS |
533 | { |
534 | #if 1 | |
39f77062 | 535 | if (! ptid_equal (registers_ptid, inferior_ptid)) |
32178cab MS |
536 | { |
537 | registers_changed (); | |
39f77062 | 538 | registers_ptid = inferior_ptid; |
32178cab MS |
539 | } |
540 | #endif | |
541 | ||
7302a204 | 542 | set_register_cached (regnum, 1); |
32178cab | 543 | if (val) |
7302a204 | 544 | memcpy (register_buffer (regnum), val, |
5ebd2499 | 545 | REGISTER_RAW_SIZE (regnum)); |
32178cab | 546 | else |
7302a204 | 547 | memset (register_buffer (regnum), '\000', |
5ebd2499 | 548 | REGISTER_RAW_SIZE (regnum)); |
32178cab MS |
549 | |
550 | /* On some architectures, e.g. HPPA, there are a few stray bits in | |
551 | some registers, that the rest of the code would like to ignore. */ | |
552 | ||
61a0eb5b AC |
553 | /* NOTE: cagney/2001-03-16: The macro CLEAN_UP_REGISTER_VALUE is |
554 | going to be deprecated. Instead architectures will leave the raw | |
555 | register value as is and instead clean things up as they pass | |
556 | through the method gdbarch_register_read() clean up the | |
557 | values. */ | |
558 | ||
32178cab | 559 | #ifdef CLEAN_UP_REGISTER_VALUE |
7302a204 | 560 | CLEAN_UP_REGISTER_VALUE (regnum, register_buffer (regnum)); |
32178cab MS |
561 | #endif |
562 | } | |
563 | ||
564 | /* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc. | |
565 | Special handling for registers PC, SP, and FP. */ | |
566 | ||
4e052eda AC |
567 | /* NOTE: cagney/2001-02-18: The functions generic_target_read_pc(), |
568 | read_pc_pid(), read_pc(), generic_target_write_pc(), | |
569 | write_pc_pid(), write_pc(), generic_target_read_sp(), read_sp(), | |
570 | generic_target_write_sp(), write_sp(), generic_target_read_fp(), | |
571 | read_fp(), generic_target_write_fp(), write_fp will eventually be | |
572 | moved out of the reg-cache into either frame.[hc] or to the | |
573 | multi-arch framework. The are not part of the raw register cache. */ | |
574 | ||
32178cab MS |
575 | /* This routine is getting awfully cluttered with #if's. It's probably |
576 | time to turn this into READ_PC and define it in the tm.h file. | |
577 | Ditto for write_pc. | |
578 | ||
579 | 1999-06-08: The following were re-written so that it assumes the | |
8e1a459b | 580 | existence of a TARGET_READ_PC et.al. macro. A default generic |
32178cab MS |
581 | version of that macro is made available where needed. |
582 | ||
583 | Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled | |
584 | by the multi-arch framework, it will eventually be possible to | |
585 | eliminate the intermediate read_pc_pid(). The client would call | |
586 | TARGET_READ_PC directly. (cagney). */ | |
587 | ||
32178cab | 588 | CORE_ADDR |
39f77062 | 589 | generic_target_read_pc (ptid_t ptid) |
32178cab MS |
590 | { |
591 | #ifdef PC_REGNUM | |
592 | if (PC_REGNUM >= 0) | |
593 | { | |
39f77062 | 594 | CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, ptid)); |
32178cab MS |
595 | return pc_val; |
596 | } | |
597 | #endif | |
8e65ff28 AC |
598 | internal_error (__FILE__, __LINE__, |
599 | "generic_target_read_pc"); | |
32178cab MS |
600 | return 0; |
601 | } | |
602 | ||
603 | CORE_ADDR | |
39f77062 | 604 | read_pc_pid (ptid_t ptid) |
32178cab | 605 | { |
39f77062 | 606 | ptid_t saved_inferior_ptid; |
32178cab MS |
607 | CORE_ADDR pc_val; |
608 | ||
39f77062 KB |
609 | /* In case ptid != inferior_ptid. */ |
610 | saved_inferior_ptid = inferior_ptid; | |
611 | inferior_ptid = ptid; | |
32178cab | 612 | |
39f77062 | 613 | pc_val = TARGET_READ_PC (ptid); |
32178cab | 614 | |
39f77062 | 615 | inferior_ptid = saved_inferior_ptid; |
32178cab MS |
616 | return pc_val; |
617 | } | |
618 | ||
619 | CORE_ADDR | |
620 | read_pc (void) | |
621 | { | |
39f77062 | 622 | return read_pc_pid (inferior_ptid); |
32178cab MS |
623 | } |
624 | ||
32178cab | 625 | void |
39f77062 | 626 | generic_target_write_pc (CORE_ADDR pc, ptid_t ptid) |
32178cab MS |
627 | { |
628 | #ifdef PC_REGNUM | |
629 | if (PC_REGNUM >= 0) | |
39f77062 | 630 | write_register_pid (PC_REGNUM, pc, ptid); |
32178cab | 631 | if (NPC_REGNUM >= 0) |
39f77062 | 632 | write_register_pid (NPC_REGNUM, pc + 4, ptid); |
32178cab | 633 | if (NNPC_REGNUM >= 0) |
39f77062 | 634 | write_register_pid (NNPC_REGNUM, pc + 8, ptid); |
32178cab | 635 | #else |
8e65ff28 AC |
636 | internal_error (__FILE__, __LINE__, |
637 | "generic_target_write_pc"); | |
32178cab MS |
638 | #endif |
639 | } | |
640 | ||
641 | void | |
39f77062 | 642 | write_pc_pid (CORE_ADDR pc, ptid_t ptid) |
32178cab | 643 | { |
39f77062 | 644 | ptid_t saved_inferior_ptid; |
32178cab | 645 | |
39f77062 KB |
646 | /* In case ptid != inferior_ptid. */ |
647 | saved_inferior_ptid = inferior_ptid; | |
648 | inferior_ptid = ptid; | |
32178cab | 649 | |
39f77062 | 650 | TARGET_WRITE_PC (pc, ptid); |
32178cab | 651 | |
39f77062 | 652 | inferior_ptid = saved_inferior_ptid; |
32178cab MS |
653 | } |
654 | ||
655 | void | |
656 | write_pc (CORE_ADDR pc) | |
657 | { | |
39f77062 | 658 | write_pc_pid (pc, inferior_ptid); |
32178cab MS |
659 | } |
660 | ||
661 | /* Cope with strage ways of getting to the stack and frame pointers */ | |
662 | ||
32178cab MS |
663 | CORE_ADDR |
664 | generic_target_read_sp (void) | |
665 | { | |
666 | #ifdef SP_REGNUM | |
667 | if (SP_REGNUM >= 0) | |
668 | return read_register (SP_REGNUM); | |
669 | #endif | |
8e65ff28 AC |
670 | internal_error (__FILE__, __LINE__, |
671 | "generic_target_read_sp"); | |
32178cab MS |
672 | } |
673 | ||
674 | CORE_ADDR | |
675 | read_sp (void) | |
676 | { | |
677 | return TARGET_READ_SP (); | |
678 | } | |
679 | ||
32178cab MS |
680 | void |
681 | generic_target_write_sp (CORE_ADDR val) | |
682 | { | |
683 | #ifdef SP_REGNUM | |
684 | if (SP_REGNUM >= 0) | |
685 | { | |
686 | write_register (SP_REGNUM, val); | |
687 | return; | |
688 | } | |
689 | #endif | |
8e65ff28 AC |
690 | internal_error (__FILE__, __LINE__, |
691 | "generic_target_write_sp"); | |
32178cab MS |
692 | } |
693 | ||
694 | void | |
695 | write_sp (CORE_ADDR val) | |
696 | { | |
697 | TARGET_WRITE_SP (val); | |
698 | } | |
699 | ||
32178cab MS |
700 | CORE_ADDR |
701 | generic_target_read_fp (void) | |
702 | { | |
703 | #ifdef FP_REGNUM | |
704 | if (FP_REGNUM >= 0) | |
705 | return read_register (FP_REGNUM); | |
706 | #endif | |
8e65ff28 AC |
707 | internal_error (__FILE__, __LINE__, |
708 | "generic_target_read_fp"); | |
32178cab MS |
709 | } |
710 | ||
711 | CORE_ADDR | |
712 | read_fp (void) | |
713 | { | |
714 | return TARGET_READ_FP (); | |
715 | } | |
716 | ||
32178cab MS |
717 | void |
718 | generic_target_write_fp (CORE_ADDR val) | |
719 | { | |
720 | #ifdef FP_REGNUM | |
721 | if (FP_REGNUM >= 0) | |
722 | { | |
723 | write_register (FP_REGNUM, val); | |
724 | return; | |
725 | } | |
726 | #endif | |
8e65ff28 AC |
727 | internal_error (__FILE__, __LINE__, |
728 | "generic_target_write_fp"); | |
32178cab MS |
729 | } |
730 | ||
731 | void | |
732 | write_fp (CORE_ADDR val) | |
733 | { | |
734 | TARGET_WRITE_FP (val); | |
735 | } | |
736 | ||
705152c5 MS |
737 | /* ARGSUSED */ |
738 | static void | |
739 | reg_flush_command (char *command, int from_tty) | |
740 | { | |
741 | /* Force-flush the register cache. */ | |
742 | registers_changed (); | |
743 | if (from_tty) | |
744 | printf_filtered ("Register cache flushed.\n"); | |
745 | } | |
746 | ||
747 | ||
32178cab MS |
748 | static void |
749 | build_regcache (void) | |
750 | { | |
751 | /* We allocate some extra slop since we do a lot of memcpy's around | |
752 | `registers', and failing-soft is better than failing hard. */ | |
753 | int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256; | |
fcdc5976 MS |
754 | int sizeof_register_valid = |
755 | (NUM_REGS + NUM_PSEUDO_REGS) * sizeof (*register_valid); | |
32178cab MS |
756 | registers = xmalloc (sizeof_registers); |
757 | memset (registers, 0, sizeof_registers); | |
758 | register_valid = xmalloc (sizeof_register_valid); | |
759 | memset (register_valid, 0, sizeof_register_valid); | |
760 | } | |
761 | ||
762 | void | |
763 | _initialize_regcache (void) | |
764 | { | |
765 | build_regcache (); | |
766 | ||
767 | register_gdbarch_swap (®isters, sizeof (registers), NULL); | |
768 | register_gdbarch_swap (®ister_valid, sizeof (register_valid), NULL); | |
769 | register_gdbarch_swap (NULL, 0, build_regcache); | |
705152c5 MS |
770 | |
771 | add_com ("flushregs", class_maintenance, reg_flush_command, | |
772 | "Force gdb to flush its register cache (maintainer command)"); | |
39f77062 KB |
773 | |
774 | /* Initialize the thread/process associated with the current set of | |
775 | registers. For now, -1 is special, and means `no current process'. */ | |
776 | registers_ptid = pid_to_ptid (-1); | |
32178cab | 777 | } |