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32178cab MS |
1 | /* Cache and manage the values of registers for GDB, the GNU debugger. |
2 | Copyright 1986, 87, 89, 91, 94, 95, 96, 1998, 2000 | |
3 | Free Software Foundation, Inc. | |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include "defs.h" | |
23 | #include "frame.h" | |
24 | #include "inferior.h" | |
25 | #include "target.h" | |
26 | #include "gdbarch.h" | |
27 | ||
28 | /* | |
29 | * DATA STRUCTURE | |
30 | * | |
31 | * Here is the actual register cache. | |
32 | */ | |
33 | ||
34 | /* NOTE: this is a write-back cache. There is no "dirty" bit for | |
35 | recording if the register values have been changed (eg. by the | |
36 | user). Therefore all registers must be written back to the | |
37 | target when appropriate. */ | |
38 | ||
39 | /* REGISTERS contains the cached register values (in target byte order). */ | |
40 | ||
41 | char *registers; | |
42 | ||
43 | /* REGISTER_VALID is 0 if the register needs to be fetched, | |
44 | 1 if it has been fetched, and | |
45 | -1 if the register value was not available. | |
46 | "Not available" means don't try to fetch it again. */ | |
47 | ||
48 | signed char *register_valid; | |
49 | ||
50 | /* The thread/process associated with the current set of registers. | |
51 | For now, -1 is special, and means `no current process'. */ | |
52 | ||
53 | static int registers_pid = -1; | |
54 | ||
55 | /* | |
56 | * FUNCTIONS: | |
57 | */ | |
58 | ||
59 | /* REGISTER_CACHED() | |
60 | ||
61 | Returns 0 if the value is not in the cache (needs fetch). | |
62 | >0 if the value is in the cache. | |
63 | <0 if the value is permanently unavailable (don't ask again). */ | |
64 | ||
65 | int | |
66 | register_cached (int regnum) | |
67 | { | |
68 | return register_valid[regnum]; | |
69 | } | |
70 | ||
71 | /* FIND_SAVED_REGISTER () | |
72 | ||
73 | Return the address in which frame FRAME's value of register REGNUM | |
74 | has been saved in memory. Or return zero if it has not been saved. | |
75 | If REGNUM specifies the SP, the value we return is actually | |
76 | the SP value, not an address where it was saved. */ | |
77 | ||
78 | CORE_ADDR | |
79 | find_saved_register (struct frame_info *frame, int regnum) | |
80 | { | |
81 | register struct frame_info *frame1 = NULL; | |
82 | register CORE_ADDR addr = 0; | |
83 | ||
84 | if (frame == NULL) /* No regs saved if want current frame */ | |
85 | return 0; | |
86 | ||
87 | #ifdef HAVE_REGISTER_WINDOWS | |
88 | /* We assume that a register in a register window will only be saved | |
89 | in one place (since the name changes and/or disappears as you go | |
90 | towards inner frames), so we only call get_frame_saved_regs on | |
91 | the current frame. This is directly in contradiction to the | |
92 | usage below, which assumes that registers used in a frame must be | |
93 | saved in a lower (more interior) frame. This change is a result | |
94 | of working on a register window machine; get_frame_saved_regs | |
95 | always returns the registers saved within a frame, within the | |
96 | context (register namespace) of that frame. */ | |
97 | ||
98 | /* However, note that we don't want this to return anything if | |
99 | nothing is saved (if there's a frame inside of this one). Also, | |
100 | callers to this routine asking for the stack pointer want the | |
101 | stack pointer saved for *this* frame; this is returned from the | |
102 | next frame. */ | |
103 | ||
104 | if (REGISTER_IN_WINDOW_P (regnum)) | |
105 | { | |
106 | frame1 = get_next_frame (frame); | |
107 | if (!frame1) | |
108 | return 0; /* Registers of this frame are active. */ | |
109 | ||
110 | /* Get the SP from the next frame in; it will be this | |
111 | current frame. */ | |
112 | if (regnum != SP_REGNUM) | |
113 | frame1 = frame; | |
114 | ||
115 | FRAME_INIT_SAVED_REGS (frame1); | |
116 | return frame1->saved_regs[regnum]; /* ... which might be zero */ | |
117 | } | |
118 | #endif /* HAVE_REGISTER_WINDOWS */ | |
119 | ||
120 | /* Note that this next routine assumes that registers used in | |
121 | frame x will be saved only in the frame that x calls and | |
122 | frames interior to it. This is not true on the sparc, but the | |
123 | above macro takes care of it, so we should be all right. */ | |
124 | while (1) | |
125 | { | |
126 | QUIT; | |
127 | frame1 = get_prev_frame (frame1); | |
128 | if (frame1 == 0 || frame1 == frame) | |
129 | break; | |
130 | FRAME_INIT_SAVED_REGS (frame1); | |
131 | if (frame1->saved_regs[regnum]) | |
132 | addr = frame1->saved_regs[regnum]; | |
133 | } | |
134 | ||
135 | return addr; | |
136 | } | |
137 | ||
138 | /* DEFAULT_GET_SAVED_REGISTER () | |
139 | ||
140 | Find register number REGNUM relative to FRAME and put its (raw, | |
141 | target format) contents in *RAW_BUFFER. Set *OPTIMIZED if the | |
142 | variable was optimized out (and thus can't be fetched). Set *LVAL | |
143 | to lval_memory, lval_register, or not_lval, depending on whether | |
144 | the value was fetched from memory, from a register, or in a strange | |
145 | and non-modifiable way (e.g. a frame pointer which was calculated | |
146 | rather than fetched). Set *ADDRP to the address, either in memory | |
147 | on as a REGISTER_BYTE offset into the registers array. | |
148 | ||
149 | Note that this implementation never sets *LVAL to not_lval. But | |
150 | it can be replaced by defining GET_SAVED_REGISTER and supplying | |
151 | your own. | |
152 | ||
153 | The argument RAW_BUFFER must point to aligned memory. */ | |
154 | ||
155 | static void | |
156 | default_get_saved_register (char *raw_buffer, | |
157 | int *optimized, | |
158 | CORE_ADDR *addrp, | |
159 | struct frame_info *frame, | |
160 | int regnum, | |
161 | enum lval_type *lval) | |
162 | { | |
163 | CORE_ADDR addr; | |
164 | ||
165 | if (!target_has_registers) | |
166 | error ("No registers."); | |
167 | ||
168 | /* Normal systems don't optimize out things with register numbers. */ | |
169 | if (optimized != NULL) | |
170 | *optimized = 0; | |
171 | addr = find_saved_register (frame, regnum); | |
172 | if (addr != 0) | |
173 | { | |
174 | if (lval != NULL) | |
175 | *lval = lval_memory; | |
176 | if (regnum == SP_REGNUM) | |
177 | { | |
178 | if (raw_buffer != NULL) | |
179 | { | |
180 | /* Put it back in target format. */ | |
181 | store_address (raw_buffer, REGISTER_RAW_SIZE (regnum), | |
182 | (LONGEST) addr); | |
183 | } | |
184 | if (addrp != NULL) | |
185 | *addrp = 0; | |
186 | return; | |
187 | } | |
188 | if (raw_buffer != NULL) | |
189 | target_read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum)); | |
190 | } | |
191 | else | |
192 | { | |
193 | if (lval != NULL) | |
194 | *lval = lval_register; | |
195 | addr = REGISTER_BYTE (regnum); | |
196 | if (raw_buffer != NULL) | |
197 | read_register_gen (regnum, raw_buffer); | |
198 | } | |
199 | if (addrp != NULL) | |
200 | *addrp = addr; | |
201 | } | |
202 | ||
203 | #if !defined (GET_SAVED_REGISTER) | |
204 | #define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \ | |
205 | default_get_saved_register(raw_buffer, optimized, addrp, frame, regnum, lval) | |
206 | #endif | |
207 | ||
208 | void | |
209 | get_saved_register (char *raw_buffer, | |
210 | int *optimized, | |
211 | CORE_ADDR *addrp, | |
212 | struct frame_info *frame, | |
213 | int regnum, | |
214 | enum lval_type *lval) | |
215 | { | |
216 | GET_SAVED_REGISTER (raw_buffer, optimized, addrp, frame, regnum, lval); | |
217 | } | |
218 | ||
219 | /* READ_RELATIVE_REGISTER_RAW_BYTES_FOR_FRAME | |
220 | ||
221 | Copy the bytes of register REGNUM, relative to the input stack frame, | |
222 | into our memory at MYADDR, in target byte order. | |
223 | The number of bytes copied is REGISTER_RAW_SIZE (REGNUM). | |
224 | ||
225 | Returns 1 if could not be read, 0 if could. */ | |
226 | ||
227 | /* FIXME: This function increases the confusion between FP_REGNUM | |
228 | and the virtual/pseudo-frame pointer. */ | |
229 | ||
230 | static int | |
231 | read_relative_register_raw_bytes_for_frame (int regnum, | |
232 | char *myaddr, | |
233 | struct frame_info *frame) | |
234 | { | |
235 | int optim; | |
236 | if (regnum == FP_REGNUM && frame) | |
237 | { | |
238 | /* Put it back in target format. */ | |
239 | store_address (myaddr, REGISTER_RAW_SIZE (FP_REGNUM), | |
240 | (LONGEST) FRAME_FP (frame)); | |
241 | ||
242 | return 0; | |
243 | } | |
244 | ||
245 | get_saved_register (myaddr, &optim, (CORE_ADDR *) NULL, frame, | |
246 | regnum, (enum lval_type *) NULL); | |
247 | ||
248 | if (register_valid[regnum] < 0) | |
249 | return 1; /* register value not available */ | |
250 | ||
251 | return optim; | |
252 | } | |
253 | ||
254 | /* READ_RELATIVE_REGISTER_RAW_BYTES | |
255 | ||
256 | Copy the bytes of register REGNUM, relative to the current stack | |
257 | frame, into our memory at MYADDR, in target byte order. | |
258 | The number of bytes copied is REGISTER_RAW_SIZE (REGNUM). | |
259 | ||
260 | Returns 1 if could not be read, 0 if could. */ | |
261 | ||
262 | int | |
263 | read_relative_register_raw_bytes (int regnum, char *myaddr) | |
264 | { | |
265 | return read_relative_register_raw_bytes_for_frame (regnum, myaddr, | |
266 | selected_frame); | |
267 | } | |
268 | ||
269 | ||
270 | /* Low level examining and depositing of registers. | |
271 | ||
272 | The caller is responsible for making sure that the inferior is | |
273 | stopped before calling the fetching routines, or it will get | |
274 | garbage. (a change from GDB version 3, in which the caller got the | |
275 | value from the last stop). */ | |
276 | ||
277 | /* REGISTERS_CHANGED () | |
278 | ||
279 | Indicate that registers may have changed, so invalidate the cache. */ | |
280 | ||
281 | void | |
282 | registers_changed (void) | |
283 | { | |
284 | int i; | |
285 | int numregs = ARCH_NUM_REGS; | |
286 | ||
287 | registers_pid = -1; | |
288 | ||
289 | /* Force cleanup of any alloca areas if using C alloca instead of | |
290 | a builtin alloca. This particular call is used to clean up | |
291 | areas allocated by low level target code which may build up | |
292 | during lengthy interactions between gdb and the target before | |
293 | gdb gives control to the user (ie watchpoints). */ | |
294 | alloca (0); | |
295 | ||
296 | for (i = 0; i < numregs; i++) | |
297 | register_valid[i] = 0; | |
298 | ||
299 | if (registers_changed_hook) | |
300 | registers_changed_hook (); | |
301 | } | |
302 | ||
303 | /* REGISTERS_FETCHED () | |
304 | ||
305 | Indicate that all registers have been fetched, so mark them all valid. */ | |
306 | ||
307 | ||
308 | void | |
309 | registers_fetched (void) | |
310 | { | |
311 | int i; | |
312 | int numregs = ARCH_NUM_REGS; | |
313 | ||
314 | for (i = 0; i < numregs; i++) | |
315 | register_valid[i] = 1; | |
316 | } | |
317 | ||
318 | /* read_register_bytes and write_register_bytes are generally a *BAD* | |
319 | idea. They are inefficient because they need to check for partial | |
320 | updates, which can only be done by scanning through all of the | |
321 | registers and seeing if the bytes that are being read/written fall | |
322 | inside of an invalid register. [The main reason this is necessary | |
323 | is that register sizes can vary, so a simple index won't suffice.] | |
324 | It is far better to call read_register_gen and write_register_gen | |
325 | if you want to get at the raw register contents, as it only takes a | |
326 | regno as an argument, and therefore can't do a partial register | |
327 | update. | |
328 | ||
329 | Prior to the recent fixes to check for partial updates, both read | |
330 | and write_register_bytes always checked to see if any registers | |
331 | were stale, and then called target_fetch_registers (-1) to update | |
332 | the whole set. This caused really slowed things down for remote | |
333 | targets. */ | |
334 | ||
335 | /* Copy INLEN bytes of consecutive data from registers | |
336 | starting with the INREGBYTE'th byte of register data | |
337 | into memory at MYADDR. */ | |
338 | ||
339 | void | |
340 | read_register_bytes (int inregbyte, char *myaddr, int inlen) | |
341 | { | |
342 | int inregend = inregbyte + inlen; | |
343 | int regno; | |
344 | ||
345 | if (registers_pid != inferior_pid) | |
346 | { | |
347 | registers_changed (); | |
348 | registers_pid = inferior_pid; | |
349 | } | |
350 | ||
351 | /* See if we are trying to read bytes from out-of-date registers. If so, | |
352 | update just those registers. */ | |
353 | ||
354 | for (regno = 0; regno < NUM_REGS; regno++) | |
355 | { | |
356 | int regstart, regend; | |
357 | ||
358 | if (register_valid[regno]) | |
359 | continue; | |
360 | ||
361 | if (REGISTER_NAME (regno) == NULL || *REGISTER_NAME (regno) == '\0') | |
362 | continue; | |
363 | ||
364 | regstart = REGISTER_BYTE (regno); | |
365 | regend = regstart + REGISTER_RAW_SIZE (regno); | |
366 | ||
367 | if (regend <= inregbyte || inregend <= regstart) | |
368 | /* The range the user wants to read doesn't overlap with regno. */ | |
369 | continue; | |
370 | ||
371 | /* We've found an invalid register where at least one byte will be read. | |
372 | Update it from the target. */ | |
373 | target_fetch_registers (regno); | |
374 | ||
375 | if (!register_valid[regno]) | |
376 | error ("read_register_bytes: Couldn't update register %d.", regno); | |
377 | } | |
378 | ||
379 | if (myaddr != NULL) | |
380 | memcpy (myaddr, ®isters[inregbyte], inlen); | |
381 | } | |
382 | ||
383 | /* Read register REGNO into memory at MYADDR, which must be large | |
384 | enough for REGISTER_RAW_BYTES (REGNO). Target byte-order. If the | |
385 | register is known to be the size of a CORE_ADDR or smaller, | |
386 | read_register can be used instead. */ | |
387 | ||
388 | void | |
389 | read_register_gen (int regno, char *myaddr) | |
390 | { | |
391 | if (registers_pid != inferior_pid) | |
392 | { | |
393 | registers_changed (); | |
394 | registers_pid = inferior_pid; | |
395 | } | |
396 | ||
397 | if (!register_valid[regno]) | |
398 | target_fetch_registers (regno); | |
399 | memcpy (myaddr, ®isters[REGISTER_BYTE (regno)], | |
400 | REGISTER_RAW_SIZE (regno)); | |
401 | } | |
402 | ||
403 | /* Write register REGNO at MYADDR to the target. MYADDR points at | |
404 | REGISTER_RAW_BYTES(REGNO), which must be in target byte-order. */ | |
405 | ||
406 | /* Registers we shouldn't try to store. */ | |
407 | #if !defined (CANNOT_STORE_REGISTER) | |
408 | #define CANNOT_STORE_REGISTER(regno) 0 | |
409 | #endif | |
410 | ||
411 | void | |
412 | write_register_gen (int regno, char *myaddr) | |
413 | { | |
414 | int size; | |
415 | ||
416 | /* On the sparc, writing %g0 is a no-op, so we don't even want to | |
417 | change the registers array if something writes to this register. */ | |
418 | if (CANNOT_STORE_REGISTER (regno)) | |
419 | return; | |
420 | ||
421 | if (registers_pid != inferior_pid) | |
422 | { | |
423 | registers_changed (); | |
424 | registers_pid = inferior_pid; | |
425 | } | |
426 | ||
427 | size = REGISTER_RAW_SIZE (regno); | |
428 | ||
429 | /* If we have a valid copy of the register, and new value == old value, | |
430 | then don't bother doing the actual store. */ | |
431 | ||
432 | if (register_valid[regno] | |
433 | && memcmp (®isters[REGISTER_BYTE (regno)], myaddr, size) == 0) | |
434 | return; | |
435 | ||
436 | target_prepare_to_store (); | |
437 | ||
438 | memcpy (®isters[REGISTER_BYTE (regno)], myaddr, size); | |
439 | ||
440 | register_valid[regno] = 1; | |
441 | ||
442 | target_store_registers (regno); | |
443 | } | |
444 | ||
445 | /* Copy INLEN bytes of consecutive data from memory at MYADDR | |
446 | into registers starting with the MYREGSTART'th byte of register data. */ | |
447 | ||
448 | void | |
449 | write_register_bytes (int myregstart, char *myaddr, int inlen) | |
450 | { | |
451 | int myregend = myregstart + inlen; | |
452 | int regno; | |
453 | ||
454 | target_prepare_to_store (); | |
455 | ||
456 | /* Scan through the registers updating any that are covered by the | |
457 | range myregstart<=>myregend using write_register_gen, which does | |
458 | nice things like handling threads, and avoiding updates when the | |
459 | new and old contents are the same. */ | |
460 | ||
461 | for (regno = 0; regno < NUM_REGS; regno++) | |
462 | { | |
463 | int regstart, regend; | |
464 | ||
465 | regstart = REGISTER_BYTE (regno); | |
466 | regend = regstart + REGISTER_RAW_SIZE (regno); | |
467 | ||
468 | /* Is this register completely outside the range the user is writing? */ | |
469 | if (myregend <= regstart || regend <= myregstart) | |
470 | /* do nothing */ ; | |
471 | ||
472 | /* Is this register completely within the range the user is writing? */ | |
473 | else if (myregstart <= regstart && regend <= myregend) | |
474 | write_register_gen (regno, myaddr + (regstart - myregstart)); | |
475 | ||
476 | /* The register partially overlaps the range being written. */ | |
477 | else | |
478 | { | |
479 | char regbuf[MAX_REGISTER_RAW_SIZE]; | |
480 | /* What's the overlap between this register's bytes and | |
481 | those the caller wants to write? */ | |
482 | int overlapstart = max (regstart, myregstart); | |
483 | int overlapend = min (regend, myregend); | |
484 | ||
485 | /* We may be doing a partial update of an invalid register. | |
486 | Update it from the target before scribbling on it. */ | |
487 | read_register_gen (regno, regbuf); | |
488 | ||
489 | memcpy (registers + overlapstart, | |
490 | myaddr + (overlapstart - myregstart), | |
491 | overlapend - overlapstart); | |
492 | ||
493 | target_store_registers (regno); | |
494 | } | |
495 | } | |
496 | } | |
497 | ||
498 | ||
499 | /* Return the raw contents of register REGNO, regarding it as an | |
173155e8 | 500 | UNSIGNED integer. */ |
32178cab | 501 | |
173155e8 | 502 | ULONGEST |
32178cab MS |
503 | read_register (int regno) |
504 | { | |
505 | if (registers_pid != inferior_pid) | |
506 | { | |
507 | registers_changed (); | |
508 | registers_pid = inferior_pid; | |
509 | } | |
510 | ||
511 | if (!register_valid[regno]) | |
512 | target_fetch_registers (regno); | |
513 | ||
173155e8 | 514 | return (extract_unsigned_integer (®isters[REGISTER_BYTE (regno)], |
32178cab MS |
515 | REGISTER_RAW_SIZE (regno))); |
516 | } | |
517 | ||
173155e8 | 518 | ULONGEST |
32178cab MS |
519 | read_register_pid (int regno, int pid) |
520 | { | |
521 | int save_pid; | |
522 | CORE_ADDR retval; | |
523 | ||
524 | if (pid == inferior_pid) | |
525 | return read_register (regno); | |
526 | ||
527 | save_pid = inferior_pid; | |
528 | ||
529 | inferior_pid = pid; | |
530 | ||
531 | retval = read_register (regno); | |
532 | ||
533 | inferior_pid = save_pid; | |
534 | ||
535 | return retval; | |
536 | } | |
537 | ||
173155e8 AC |
538 | /* Return the raw contents of register REGNO, regarding it a SIGNED |
539 | integer. */ | |
540 | ||
541 | LONGEST | |
542 | read_signed_register (int regno) | |
543 | { | |
544 | if (registers_pid != inferior_pid) | |
545 | { | |
546 | registers_changed (); | |
547 | registers_pid = inferior_pid; | |
548 | } | |
549 | ||
550 | if (!register_valid[regno]) | |
551 | target_fetch_registers (regno); | |
552 | ||
553 | return (extract_signed_integer (®isters[REGISTER_BYTE (regno)], | |
554 | REGISTER_RAW_SIZE (regno))); | |
555 | } | |
556 | ||
557 | LONGEST | |
558 | read_signed_register_pid (int regno, int pid) | |
559 | { | |
560 | int save_pid; | |
561 | LONGEST retval; | |
562 | ||
563 | if (pid == inferior_pid) | |
564 | return read_signed_register (regno); | |
565 | ||
566 | save_pid = inferior_pid; | |
567 | ||
568 | inferior_pid = pid; | |
569 | ||
570 | retval = read_signed_register (regno); | |
571 | ||
572 | inferior_pid = save_pid; | |
573 | ||
574 | return retval; | |
575 | } | |
576 | ||
32178cab MS |
577 | /* Store VALUE, into the raw contents of register number REGNO. */ |
578 | ||
579 | void | |
580 | write_register (int regno, LONGEST val) | |
581 | { | |
582 | PTR buf; | |
583 | int size; | |
584 | ||
585 | /* On the sparc, writing %g0 is a no-op, so we don't even want to | |
586 | change the registers array if something writes to this register. */ | |
587 | if (CANNOT_STORE_REGISTER (regno)) | |
588 | return; | |
589 | ||
590 | if (registers_pid != inferior_pid) | |
591 | { | |
592 | registers_changed (); | |
593 | registers_pid = inferior_pid; | |
594 | } | |
595 | ||
596 | size = REGISTER_RAW_SIZE (regno); | |
597 | buf = alloca (size); | |
598 | store_signed_integer (buf, size, (LONGEST) val); | |
599 | ||
600 | /* If we have a valid copy of the register, and new value == old value, | |
601 | then don't bother doing the actual store. */ | |
602 | ||
603 | if (register_valid[regno] | |
604 | && memcmp (®isters[REGISTER_BYTE (regno)], buf, size) == 0) | |
605 | return; | |
606 | ||
607 | target_prepare_to_store (); | |
608 | ||
609 | memcpy (®isters[REGISTER_BYTE (regno)], buf, size); | |
610 | ||
611 | register_valid[regno] = 1; | |
612 | ||
613 | target_store_registers (regno); | |
614 | } | |
615 | ||
616 | void | |
617 | write_register_pid (int regno, CORE_ADDR val, int pid) | |
618 | { | |
619 | int save_pid; | |
620 | ||
621 | if (pid == inferior_pid) | |
622 | { | |
623 | write_register (regno, val); | |
624 | return; | |
625 | } | |
626 | ||
627 | save_pid = inferior_pid; | |
628 | ||
629 | inferior_pid = pid; | |
630 | ||
631 | write_register (regno, val); | |
632 | ||
633 | inferior_pid = save_pid; | |
634 | } | |
635 | ||
636 | /* SUPPLY_REGISTER() | |
637 | ||
638 | Record that register REGNO contains VAL. This is used when the | |
639 | value is obtained from the inferior or core dump, so there is no | |
640 | need to store the value there. | |
641 | ||
642 | If VAL is a NULL pointer, then it's probably an unsupported register. | |
643 | We just set it's value to all zeros. We might want to record this | |
644 | fact, and report it to the users of read_register and friends. */ | |
645 | ||
646 | void | |
647 | supply_register (int regno, char *val) | |
648 | { | |
649 | #if 1 | |
650 | if (registers_pid != inferior_pid) | |
651 | { | |
652 | registers_changed (); | |
653 | registers_pid = inferior_pid; | |
654 | } | |
655 | #endif | |
656 | ||
657 | register_valid[regno] = 1; | |
658 | if (val) | |
659 | memcpy (®isters[REGISTER_BYTE (regno)], val, | |
660 | REGISTER_RAW_SIZE (regno)); | |
661 | else | |
662 | memset (®isters[REGISTER_BYTE (regno)], '\000', | |
663 | REGISTER_RAW_SIZE (regno)); | |
664 | ||
665 | /* On some architectures, e.g. HPPA, there are a few stray bits in | |
666 | some registers, that the rest of the code would like to ignore. */ | |
667 | ||
668 | #ifdef CLEAN_UP_REGISTER_VALUE | |
669 | CLEAN_UP_REGISTER_VALUE (regno, ®isters[REGISTER_BYTE (regno)]); | |
670 | #endif | |
671 | } | |
672 | ||
673 | /* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc. | |
674 | Special handling for registers PC, SP, and FP. */ | |
675 | ||
676 | /* This routine is getting awfully cluttered with #if's. It's probably | |
677 | time to turn this into READ_PC and define it in the tm.h file. | |
678 | Ditto for write_pc. | |
679 | ||
680 | 1999-06-08: The following were re-written so that it assumes the | |
681 | existance of a TARGET_READ_PC et.al. macro. A default generic | |
682 | version of that macro is made available where needed. | |
683 | ||
684 | Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled | |
685 | by the multi-arch framework, it will eventually be possible to | |
686 | eliminate the intermediate read_pc_pid(). The client would call | |
687 | TARGET_READ_PC directly. (cagney). */ | |
688 | ||
689 | #ifndef TARGET_READ_PC | |
690 | #define TARGET_READ_PC generic_target_read_pc | |
691 | #endif | |
692 | ||
693 | CORE_ADDR | |
694 | generic_target_read_pc (int pid) | |
695 | { | |
696 | #ifdef PC_REGNUM | |
697 | if (PC_REGNUM >= 0) | |
698 | { | |
699 | CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, pid)); | |
700 | return pc_val; | |
701 | } | |
702 | #endif | |
703 | internal_error ("generic_target_read_pc"); | |
704 | return 0; | |
705 | } | |
706 | ||
707 | CORE_ADDR | |
708 | read_pc_pid (int pid) | |
709 | { | |
710 | int saved_inferior_pid; | |
711 | CORE_ADDR pc_val; | |
712 | ||
713 | /* In case pid != inferior_pid. */ | |
714 | saved_inferior_pid = inferior_pid; | |
715 | inferior_pid = pid; | |
716 | ||
717 | pc_val = TARGET_READ_PC (pid); | |
718 | ||
719 | inferior_pid = saved_inferior_pid; | |
720 | return pc_val; | |
721 | } | |
722 | ||
723 | CORE_ADDR | |
724 | read_pc (void) | |
725 | { | |
726 | return read_pc_pid (inferior_pid); | |
727 | } | |
728 | ||
729 | #ifndef TARGET_WRITE_PC | |
730 | #define TARGET_WRITE_PC generic_target_write_pc | |
731 | #endif | |
732 | ||
733 | void | |
734 | generic_target_write_pc (CORE_ADDR pc, int pid) | |
735 | { | |
736 | #ifdef PC_REGNUM | |
737 | if (PC_REGNUM >= 0) | |
738 | write_register_pid (PC_REGNUM, pc, pid); | |
739 | if (NPC_REGNUM >= 0) | |
740 | write_register_pid (NPC_REGNUM, pc + 4, pid); | |
741 | if (NNPC_REGNUM >= 0) | |
742 | write_register_pid (NNPC_REGNUM, pc + 8, pid); | |
743 | #else | |
744 | internal_error ("generic_target_write_pc"); | |
745 | #endif | |
746 | } | |
747 | ||
748 | void | |
749 | write_pc_pid (CORE_ADDR pc, int pid) | |
750 | { | |
751 | int saved_inferior_pid; | |
752 | ||
753 | /* In case pid != inferior_pid. */ | |
754 | saved_inferior_pid = inferior_pid; | |
755 | inferior_pid = pid; | |
756 | ||
757 | TARGET_WRITE_PC (pc, pid); | |
758 | ||
759 | inferior_pid = saved_inferior_pid; | |
760 | } | |
761 | ||
762 | void | |
763 | write_pc (CORE_ADDR pc) | |
764 | { | |
765 | write_pc_pid (pc, inferior_pid); | |
766 | } | |
767 | ||
768 | /* Cope with strage ways of getting to the stack and frame pointers */ | |
769 | ||
770 | #ifndef TARGET_READ_SP | |
771 | #define TARGET_READ_SP generic_target_read_sp | |
772 | #endif | |
773 | ||
774 | CORE_ADDR | |
775 | generic_target_read_sp (void) | |
776 | { | |
777 | #ifdef SP_REGNUM | |
778 | if (SP_REGNUM >= 0) | |
779 | return read_register (SP_REGNUM); | |
780 | #endif | |
781 | internal_error ("generic_target_read_sp"); | |
782 | } | |
783 | ||
784 | CORE_ADDR | |
785 | read_sp (void) | |
786 | { | |
787 | return TARGET_READ_SP (); | |
788 | } | |
789 | ||
790 | #ifndef TARGET_WRITE_SP | |
791 | #define TARGET_WRITE_SP generic_target_write_sp | |
792 | #endif | |
793 | ||
794 | void | |
795 | generic_target_write_sp (CORE_ADDR val) | |
796 | { | |
797 | #ifdef SP_REGNUM | |
798 | if (SP_REGNUM >= 0) | |
799 | { | |
800 | write_register (SP_REGNUM, val); | |
801 | return; | |
802 | } | |
803 | #endif | |
804 | internal_error ("generic_target_write_sp"); | |
805 | } | |
806 | ||
807 | void | |
808 | write_sp (CORE_ADDR val) | |
809 | { | |
810 | TARGET_WRITE_SP (val); | |
811 | } | |
812 | ||
813 | #ifndef TARGET_READ_FP | |
814 | #define TARGET_READ_FP generic_target_read_fp | |
815 | #endif | |
816 | ||
817 | CORE_ADDR | |
818 | generic_target_read_fp (void) | |
819 | { | |
820 | #ifdef FP_REGNUM | |
821 | if (FP_REGNUM >= 0) | |
822 | return read_register (FP_REGNUM); | |
823 | #endif | |
824 | internal_error ("generic_target_read_fp"); | |
825 | } | |
826 | ||
827 | CORE_ADDR | |
828 | read_fp (void) | |
829 | { | |
830 | return TARGET_READ_FP (); | |
831 | } | |
832 | ||
833 | #ifndef TARGET_WRITE_FP | |
834 | #define TARGET_WRITE_FP generic_target_write_fp | |
835 | #endif | |
836 | ||
837 | void | |
838 | generic_target_write_fp (CORE_ADDR val) | |
839 | { | |
840 | #ifdef FP_REGNUM | |
841 | if (FP_REGNUM >= 0) | |
842 | { | |
843 | write_register (FP_REGNUM, val); | |
844 | return; | |
845 | } | |
846 | #endif | |
847 | internal_error ("generic_target_write_fp"); | |
848 | } | |
849 | ||
850 | void | |
851 | write_fp (CORE_ADDR val) | |
852 | { | |
853 | TARGET_WRITE_FP (val); | |
854 | } | |
855 | ||
856 | static void | |
857 | build_regcache (void) | |
858 | { | |
859 | /* We allocate some extra slop since we do a lot of memcpy's around | |
860 | `registers', and failing-soft is better than failing hard. */ | |
861 | int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256; | |
862 | int sizeof_register_valid = NUM_REGS * sizeof (*register_valid); | |
863 | registers = xmalloc (sizeof_registers); | |
864 | memset (registers, 0, sizeof_registers); | |
865 | register_valid = xmalloc (sizeof_register_valid); | |
866 | memset (register_valid, 0, sizeof_register_valid); | |
867 | } | |
868 | ||
869 | void | |
870 | _initialize_regcache (void) | |
871 | { | |
872 | build_regcache (); | |
873 | ||
874 | register_gdbarch_swap (®isters, sizeof (registers), NULL); | |
875 | register_gdbarch_swap (®ister_valid, sizeof (register_valid), NULL); | |
876 | register_gdbarch_swap (NULL, 0, build_regcache); | |
877 | } |