Commit | Line | Data |
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32178cab | 1 | /* Cache and manage the values of registers for GDB, the GNU debugger. |
3fadccb3 AC |
2 | |
3 | Copyright 1986, 1987, 1989, 1991, 1994, 1995, 1996, 1998, 2000, | |
4 | 2001, 2002 Free Software Foundation, Inc. | |
32178cab MS |
5 | |
6 | This file is part of GDB. | |
7 | ||
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
22 | ||
23 | #include "defs.h" | |
32178cab MS |
24 | #include "inferior.h" |
25 | #include "target.h" | |
26 | #include "gdbarch.h" | |
705152c5 | 27 | #include "gdbcmd.h" |
4e052eda | 28 | #include "regcache.h" |
61a0eb5b | 29 | #include "gdb_assert.h" |
32178cab MS |
30 | |
31 | /* | |
32 | * DATA STRUCTURE | |
33 | * | |
34 | * Here is the actual register cache. | |
35 | */ | |
36 | ||
3fadccb3 AC |
37 | /* Per-architecture object describing the layout of a register cache. |
38 | Computed once when the architecture is created */ | |
39 | ||
40 | struct gdbarch_data *regcache_descr_handle; | |
41 | ||
42 | struct regcache_descr | |
43 | { | |
44 | /* The architecture this descriptor belongs to. */ | |
45 | struct gdbarch *gdbarch; | |
46 | ||
47 | /* Is this a ``legacy'' register cache? Such caches reserve space | |
48 | for raw and pseudo registers and allow access to both. */ | |
49 | int legacy_p; | |
50 | ||
51 | /* The raw register cache. This should contain just [0 | |
52 | .. NUM_RAW_REGISTERS). However, for older targets, it contains | |
53 | space for the full [0 .. NUM_RAW_REGISTERS + | |
54 | NUM_PSEUDO_REGISTERS). */ | |
55 | int nr_raw_registers; | |
56 | long sizeof_raw_registers; | |
57 | long sizeof_raw_register_valid_p; | |
58 | ||
d138e37a AC |
59 | /* The cooked register space. Each cooked register in the range |
60 | [0..NR_RAW_REGISTERS) is direct-mapped onto the corresponding raw | |
61 | register. The remaining [NR_RAW_REGISTERS | |
62 | .. NR_COOKED_REGISTERS) (a.k.a. pseudo regiters) are mapped onto | |
63 | both raw registers and memory by the architecture methods | |
64 | gdbarch_register_read and gdbarch_register_write. */ | |
65 | int nr_cooked_registers; | |
66 | ||
67 | /* Offset and size (in 8 bit bytes), of reach register in the | |
68 | register cache. All registers (including those in the range | |
69 | [NR_RAW_REGISTERS .. NR_COOKED_REGISTERS) are given an offset. | |
70 | Assigning all registers an offset makes it possible to keep | |
71 | legacy code, such as that found in read_register_bytes() and | |
72 | write_register_bytes() working. */ | |
3fadccb3 | 73 | long *register_offset; |
3fadccb3 | 74 | long *sizeof_register; |
3fadccb3 | 75 | |
d138e37a AC |
76 | /* Useful constant. Largest of all the registers. */ |
77 | long max_register_size; | |
3fadccb3 AC |
78 | }; |
79 | ||
80 | static void * | |
81 | init_legacy_regcache_descr (struct gdbarch *gdbarch) | |
82 | { | |
83 | int i; | |
84 | struct regcache_descr *descr; | |
85 | /* FIXME: cagney/2002-05-11: gdbarch_data() should take that | |
86 | ``gdbarch'' as a parameter. */ | |
87 | gdb_assert (gdbarch != NULL); | |
88 | ||
89 | descr = XMALLOC (struct regcache_descr); | |
90 | descr->gdbarch = gdbarch; | |
91 | descr->legacy_p = 1; | |
92 | ||
93 | /* FIXME: cagney/2002-05-11: Shouldn't be including pseudo-registers | |
94 | in the register buffer. Unfortunatly some architectures do. */ | |
d138e37a AC |
95 | descr->nr_cooked_registers = NUM_REGS + NUM_PSEUDO_REGS; |
96 | descr->nr_raw_registers = descr->nr_cooked_registers; | |
97 | descr->sizeof_raw_register_valid_p = descr->nr_cooked_registers; | |
3fadccb3 AC |
98 | |
99 | /* FIXME: cagney/2002-05-11: Instead of using REGISTER_BYTE() this | |
100 | code should compute the offets et.al. at runtime. This currently | |
101 | isn't possible because some targets overlap register locations - | |
102 | see the mess in read_register_bytes() and write_register_bytes() | |
103 | registers. */ | |
d138e37a AC |
104 | descr->sizeof_register = XCALLOC (descr->nr_cooked_registers, long); |
105 | descr->register_offset = XCALLOC (descr->nr_cooked_registers, long); | |
3fadccb3 | 106 | descr->max_register_size = 0; |
d138e37a | 107 | for (i = 0; i < descr->nr_cooked_registers; i++) |
3fadccb3 AC |
108 | { |
109 | descr->register_offset[i] = REGISTER_BYTE (i); | |
110 | descr->sizeof_register[i] = REGISTER_RAW_SIZE (i); | |
111 | if (descr->max_register_size < REGISTER_RAW_SIZE (i)) | |
112 | descr->max_register_size = REGISTER_RAW_SIZE (i); | |
113 | } | |
114 | ||
115 | /* Come up with the real size of the registers buffer. */ | |
116 | descr->sizeof_raw_registers = REGISTER_BYTES; /* OK use. */ | |
d138e37a | 117 | for (i = 0; i < descr->nr_cooked_registers; i++) |
3fadccb3 AC |
118 | { |
119 | long regend; | |
120 | /* Keep extending the buffer so that there is always enough | |
121 | space for all registers. The comparison is necessary since | |
122 | legacy code is free to put registers in random places in the | |
123 | buffer separated by holes. Once REGISTER_BYTE() is killed | |
124 | this can be greatly simplified. */ | |
125 | /* FIXME: cagney/2001-12-04: This code shouldn't need to use | |
126 | REGISTER_BYTE(). Unfortunatly, legacy code likes to lay the | |
127 | buffer out so that certain registers just happen to overlap. | |
128 | Ulgh! New targets use gdbarch's register read/write and | |
129 | entirely avoid this uglyness. */ | |
130 | regend = descr->register_offset[i] + descr->sizeof_register[i]; | |
131 | if (descr->sizeof_raw_registers < regend) | |
132 | descr->sizeof_raw_registers = regend; | |
133 | } | |
134 | return descr; | |
135 | } | |
136 | ||
137 | static void * | |
138 | init_regcache_descr (struct gdbarch *gdbarch) | |
139 | { | |
140 | int i; | |
141 | struct regcache_descr *descr; | |
142 | gdb_assert (gdbarch != NULL); | |
143 | ||
144 | /* If an old style architecture, construct the register cache | |
145 | description using all the register macros. */ | |
d8124050 AC |
146 | if (!gdbarch_pseudo_register_read_p (gdbarch) |
147 | && !gdbarch_pseudo_register_write_p (gdbarch)) | |
3fadccb3 AC |
148 | return init_legacy_regcache_descr (gdbarch); |
149 | ||
150 | descr = XMALLOC (struct regcache_descr); | |
151 | descr->gdbarch = gdbarch; | |
152 | descr->legacy_p = 0; | |
153 | ||
d138e37a AC |
154 | /* Total size of the register space. The raw registers are mapped |
155 | directly onto the raw register cache while the pseudo's are | |
3fadccb3 | 156 | either mapped onto raw-registers or memory. */ |
d138e37a | 157 | descr->nr_cooked_registers = NUM_REGS + NUM_PSEUDO_REGS; |
3fadccb3 AC |
158 | |
159 | /* Construct a strictly RAW register cache. Don't allow pseudo's | |
160 | into the register cache. */ | |
161 | descr->nr_raw_registers = NUM_REGS; | |
162 | descr->sizeof_raw_register_valid_p = NUM_REGS; | |
163 | ||
164 | /* Lay out the register cache. The pseud-registers are included in | |
165 | the layout even though their value isn't stored in the register | |
166 | cache. Some code, via read_register_bytes() access a register | |
167 | using an offset/length rather than a register number. | |
168 | ||
169 | NOTE: cagney/2002-05-22: Only REGISTER_VIRTUAL_TYPE() needs to be | |
170 | used when constructing the register cache. It is assumed that | |
171 | register raw size, virtual size and type length of the type are | |
172 | all the same. */ | |
173 | ||
174 | { | |
175 | long offset = 0; | |
d138e37a AC |
176 | descr->sizeof_register = XCALLOC (descr->nr_cooked_registers, long); |
177 | descr->register_offset = XCALLOC (descr->nr_cooked_registers, long); | |
3fadccb3 | 178 | descr->max_register_size = 0; |
d138e37a | 179 | for (i = 0; i < descr->nr_cooked_registers; i++) |
3fadccb3 AC |
180 | { |
181 | descr->sizeof_register[i] = TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (i)); | |
182 | descr->register_offset[i] = offset; | |
183 | offset += descr->sizeof_register[i]; | |
184 | if (descr->max_register_size < descr->sizeof_register[i]) | |
185 | descr->max_register_size = descr->sizeof_register[i]; | |
186 | } | |
187 | /* Set the real size of the register cache buffer. */ | |
188 | /* FIXME: cagney/2002-05-22: Should only need to allocate space | |
189 | for the raw registers. Unfortunatly some code still accesses | |
190 | the register array directly using the global registers[]. | |
191 | Until that code has been purged, play safe and over allocating | |
192 | the register buffer. Ulgh! */ | |
193 | descr->sizeof_raw_registers = offset; | |
194 | /* = descr->register_offset[descr->nr_raw_registers]; */ | |
195 | } | |
196 | ||
197 | #if 0 | |
198 | /* Sanity check. Confirm that the assumptions about gdbarch are | |
199 | true. The REGCACHE_DESCR_HANDLE is set before doing the checks | |
200 | so that targets using the generic methods supplied by regcache | |
201 | don't go into infinite recursion trying to, again, create the | |
202 | regcache. */ | |
203 | set_gdbarch_data (gdbarch, regcache_descr_handle, descr); | |
d138e37a | 204 | for (i = 0; i < descr->nr_cooked_registers; i++) |
3fadccb3 AC |
205 | { |
206 | gdb_assert (descr->sizeof_register[i] == REGISTER_RAW_SIZE (i)); | |
207 | gdb_assert (descr->sizeof_register[i] == REGISTER_VIRTUAL_SIZE (i)); | |
208 | gdb_assert (descr->register_offset[i] == REGISTER_BYTE (i)); | |
209 | } | |
210 | /* gdb_assert (descr->sizeof_raw_registers == REGISTER_BYTES (i)); */ | |
211 | #endif | |
212 | ||
213 | return descr; | |
214 | } | |
215 | ||
216 | static struct regcache_descr * | |
217 | regcache_descr (struct gdbarch *gdbarch) | |
218 | { | |
219 | return gdbarch_data (gdbarch, regcache_descr_handle); | |
220 | } | |
221 | ||
222 | static void | |
223 | xfree_regcache_descr (struct gdbarch *gdbarch, void *ptr) | |
224 | { | |
225 | struct regcache_descr *descr = ptr; | |
226 | if (descr == NULL) | |
227 | return; | |
228 | xfree (descr->register_offset); | |
229 | xfree (descr->sizeof_register); | |
230 | descr->register_offset = NULL; | |
231 | descr->sizeof_register = NULL; | |
232 | xfree (descr); | |
233 | } | |
234 | ||
235 | /* The register cache for storing raw register values. */ | |
236 | ||
237 | struct regcache | |
238 | { | |
239 | struct regcache_descr *descr; | |
240 | char *raw_registers; | |
241 | char *raw_register_valid_p; | |
242 | /* If a value isn't in the cache should the corresponding target be | |
243 | queried for a value. */ | |
244 | int passthrough_p; | |
245 | }; | |
246 | ||
247 | struct regcache * | |
248 | regcache_xmalloc (struct gdbarch *gdbarch) | |
249 | { | |
250 | struct regcache_descr *descr; | |
251 | struct regcache *regcache; | |
252 | gdb_assert (gdbarch != NULL); | |
253 | descr = regcache_descr (gdbarch); | |
254 | regcache = XMALLOC (struct regcache); | |
255 | regcache->descr = descr; | |
256 | regcache->raw_registers | |
257 | = XCALLOC (descr->sizeof_raw_registers, char); | |
258 | regcache->raw_register_valid_p | |
259 | = XCALLOC (descr->sizeof_raw_register_valid_p, char); | |
260 | regcache->passthrough_p = 0; | |
261 | return regcache; | |
262 | } | |
263 | ||
264 | void | |
265 | regcache_xfree (struct regcache *regcache) | |
266 | { | |
267 | if (regcache == NULL) | |
268 | return; | |
269 | xfree (regcache->raw_registers); | |
270 | xfree (regcache->raw_register_valid_p); | |
271 | xfree (regcache); | |
272 | } | |
273 | ||
36160dc4 AC |
274 | void |
275 | do_regcache_xfree (void *data) | |
276 | { | |
277 | regcache_xfree (data); | |
278 | } | |
279 | ||
280 | struct cleanup * | |
281 | make_cleanup_regcache_xfree (struct regcache *regcache) | |
282 | { | |
283 | return make_cleanup (do_regcache_xfree, regcache); | |
284 | } | |
285 | ||
3fadccb3 AC |
286 | void |
287 | regcache_cpy (struct regcache *dst, struct regcache *src) | |
288 | { | |
289 | int i; | |
290 | char *buf; | |
291 | gdb_assert (src != NULL && dst != NULL); | |
292 | gdb_assert (src->descr->gdbarch == dst->descr->gdbarch); | |
293 | gdb_assert (src != dst); | |
294 | /* FIXME: cagney/2002-05-17: To say this bit is bad is being polite. | |
295 | It keeps the existing code working where things rely on going | |
296 | through to the register cache. */ | |
297 | if (src == current_regcache && src->descr->legacy_p) | |
298 | { | |
299 | /* ULGH!!!! Old way. Use REGISTER bytes and let code below | |
300 | untangle fetch. */ | |
301 | read_register_bytes (0, dst->raw_registers, REGISTER_BYTES); | |
302 | return; | |
303 | } | |
304 | /* FIXME: cagney/2002-05-17: To say this bit is bad is being polite. | |
305 | It keeps the existing code working where things rely on going | |
306 | through to the register cache. */ | |
307 | if (dst == current_regcache && dst->descr->legacy_p) | |
308 | { | |
309 | /* ULGH!!!! Old way. Use REGISTER bytes and let code below | |
310 | untangle fetch. */ | |
311 | write_register_bytes (0, src->raw_registers, REGISTER_BYTES); | |
312 | return; | |
313 | } | |
314 | buf = alloca (src->descr->max_register_size); | |
315 | for (i = 0; i < src->descr->nr_raw_registers; i++) | |
316 | { | |
317 | /* Should we worry about the valid bit here? */ | |
0818c12a AC |
318 | regcache_raw_read (src, i, buf); |
319 | regcache_raw_write (dst, i, buf); | |
3fadccb3 AC |
320 | } |
321 | } | |
322 | ||
323 | void | |
324 | regcache_cpy_no_passthrough (struct regcache *dst, struct regcache *src) | |
325 | { | |
326 | int i; | |
327 | gdb_assert (src != NULL && dst != NULL); | |
328 | gdb_assert (src->descr->gdbarch == dst->descr->gdbarch); | |
329 | /* NOTE: cagney/2002-05-17: Don't let the caller do a no-passthrough | |
330 | move of data into the current_regcache(). Doing this would be | |
331 | silly - it would mean that valid_p would be completly invalid. */ | |
332 | gdb_assert (dst != current_regcache); | |
333 | memcpy (dst->raw_registers, src->raw_registers, | |
334 | dst->descr->sizeof_raw_registers); | |
335 | memcpy (dst->raw_register_valid_p, src->raw_register_valid_p, | |
336 | dst->descr->sizeof_raw_register_valid_p); | |
337 | } | |
338 | ||
339 | struct regcache * | |
340 | regcache_dup (struct regcache *src) | |
341 | { | |
342 | struct regcache *newbuf; | |
343 | gdb_assert (current_regcache != NULL); | |
344 | newbuf = regcache_xmalloc (src->descr->gdbarch); | |
345 | regcache_cpy (newbuf, src); | |
346 | return newbuf; | |
347 | } | |
348 | ||
349 | struct regcache * | |
350 | regcache_dup_no_passthrough (struct regcache *src) | |
351 | { | |
352 | struct regcache *newbuf; | |
353 | gdb_assert (current_regcache != NULL); | |
354 | newbuf = regcache_xmalloc (src->descr->gdbarch); | |
355 | regcache_cpy_no_passthrough (newbuf, src); | |
356 | return newbuf; | |
357 | } | |
358 | ||
359 | int | |
360 | regcache_valid_p (struct regcache *regcache, int regnum) | |
361 | { | |
362 | gdb_assert (regcache != NULL); | |
363 | gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers); | |
364 | return regcache->raw_register_valid_p[regnum]; | |
365 | } | |
366 | ||
367 | CORE_ADDR | |
0818c12a | 368 | regcache_raw_read_as_address (struct regcache *regcache, int regnum) |
3fadccb3 AC |
369 | { |
370 | char *buf; | |
371 | gdb_assert (regcache != NULL); | |
372 | gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers); | |
373 | buf = alloca (regcache->descr->sizeof_register[regnum]); | |
0818c12a | 374 | regcache_raw_read (regcache, regnum, buf); |
3fadccb3 AC |
375 | return extract_address (buf, regcache->descr->sizeof_register[regnum]); |
376 | } | |
377 | ||
378 | char * | |
379 | deprecated_grub_regcache_for_registers (struct regcache *regcache) | |
380 | { | |
381 | return regcache->raw_registers; | |
382 | } | |
383 | ||
384 | char * | |
385 | deprecated_grub_regcache_for_register_valid (struct regcache *regcache) | |
386 | { | |
387 | return regcache->raw_register_valid_p; | |
388 | } | |
389 | ||
390 | /* Global structure containing the current regcache. */ | |
391 | /* FIXME: cagney/2002-05-11: The two global arrays registers[] and | |
392 | register_valid[] currently point into this structure. */ | |
393 | struct regcache *current_regcache; | |
394 | ||
5ebd2499 | 395 | /* NOTE: this is a write-through cache. There is no "dirty" bit for |
32178cab MS |
396 | recording if the register values have been changed (eg. by the |
397 | user). Therefore all registers must be written back to the | |
398 | target when appropriate. */ | |
399 | ||
400 | /* REGISTERS contains the cached register values (in target byte order). */ | |
401 | ||
402 | char *registers; | |
403 | ||
404 | /* REGISTER_VALID is 0 if the register needs to be fetched, | |
405 | 1 if it has been fetched, and | |
406 | -1 if the register value was not available. | |
c97dcfc7 AC |
407 | |
408 | "Not available" indicates that the target is not not able to supply | |
409 | the register at this state. The register may become available at a | |
410 | later time (after the next resume). This often occures when GDB is | |
411 | manipulating a target that contains only a snapshot of the entire | |
412 | system being debugged - some of the registers in such a system may | |
413 | not have been saved. */ | |
32178cab MS |
414 | |
415 | signed char *register_valid; | |
416 | ||
39f77062 | 417 | /* The thread/process associated with the current set of registers. */ |
32178cab | 418 | |
39f77062 | 419 | static ptid_t registers_ptid; |
32178cab MS |
420 | |
421 | /* | |
422 | * FUNCTIONS: | |
423 | */ | |
424 | ||
425 | /* REGISTER_CACHED() | |
426 | ||
427 | Returns 0 if the value is not in the cache (needs fetch). | |
428 | >0 if the value is in the cache. | |
429 | <0 if the value is permanently unavailable (don't ask again). */ | |
430 | ||
431 | int | |
432 | register_cached (int regnum) | |
433 | { | |
434 | return register_valid[regnum]; | |
435 | } | |
436 | ||
7302a204 ND |
437 | /* Record that REGNUM's value is cached if STATE is >0, uncached but |
438 | fetchable if STATE is 0, and uncached and unfetchable if STATE is <0. */ | |
439 | ||
440 | void | |
441 | set_register_cached (int regnum, int state) | |
442 | { | |
443 | register_valid[regnum] = state; | |
444 | } | |
445 | ||
2dc4e391 DT |
446 | /* REGISTER_CHANGED |
447 | ||
448 | invalidate a single register REGNUM in the cache */ | |
449 | void | |
450 | register_changed (int regnum) | |
451 | { | |
7302a204 ND |
452 | set_register_cached (regnum, 0); |
453 | } | |
454 | ||
455 | /* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area, | |
456 | else return a pointer to the start of the cache buffer. */ | |
457 | ||
193cb69f | 458 | static char * |
3fadccb3 | 459 | register_buffer (struct regcache *regcache, int regnum) |
7302a204 | 460 | { |
3fadccb3 | 461 | return regcache->raw_registers + regcache->descr->register_offset[regnum]; |
7302a204 ND |
462 | } |
463 | ||
464 | /* Return whether register REGNUM is a real register. */ | |
465 | ||
466 | static int | |
467 | real_register (int regnum) | |
468 | { | |
469 | return regnum >= 0 && regnum < NUM_REGS; | |
470 | } | |
471 | ||
472 | /* Return whether register REGNUM is a pseudo register. */ | |
473 | ||
474 | static int | |
475 | pseudo_register (int regnum) | |
476 | { | |
477 | return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS; | |
478 | } | |
479 | ||
480 | /* Fetch register REGNUM into the cache. */ | |
481 | ||
482 | static void | |
483 | fetch_register (int regnum) | |
484 | { | |
31e9866e AC |
485 | /* NOTE: cagney/2001-12-04: Legacy targets were using fetch/store |
486 | pseudo-register as a way of handling registers that needed to be | |
487 | constructed from one or more raw registers. New targets instead | |
488 | use gdbarch register read/write. */ | |
489 | if (FETCH_PSEUDO_REGISTER_P () | |
490 | && pseudo_register (regnum)) | |
7302a204 | 491 | FETCH_PSEUDO_REGISTER (regnum); |
6af4589c MS |
492 | else |
493 | target_fetch_registers (regnum); | |
7302a204 ND |
494 | } |
495 | ||
496 | /* Write register REGNUM cached value to the target. */ | |
497 | ||
498 | static void | |
499 | store_register (int regnum) | |
500 | { | |
31e9866e AC |
501 | /* NOTE: cagney/2001-12-04: Legacy targets were using fetch/store |
502 | pseudo-register as a way of handling registers that needed to be | |
503 | constructed from one or more raw registers. New targets instead | |
504 | use gdbarch register read/write. */ | |
505 | if (STORE_PSEUDO_REGISTER_P () | |
506 | && pseudo_register (regnum)) | |
7302a204 | 507 | STORE_PSEUDO_REGISTER (regnum); |
6af4589c MS |
508 | else |
509 | target_store_registers (regnum); | |
2dc4e391 DT |
510 | } |
511 | ||
32178cab MS |
512 | /* Low level examining and depositing of registers. |
513 | ||
514 | The caller is responsible for making sure that the inferior is | |
515 | stopped before calling the fetching routines, or it will get | |
516 | garbage. (a change from GDB version 3, in which the caller got the | |
517 | value from the last stop). */ | |
518 | ||
519 | /* REGISTERS_CHANGED () | |
520 | ||
521 | Indicate that registers may have changed, so invalidate the cache. */ | |
522 | ||
523 | void | |
524 | registers_changed (void) | |
525 | { | |
526 | int i; | |
32178cab | 527 | |
39f77062 | 528 | registers_ptid = pid_to_ptid (-1); |
32178cab MS |
529 | |
530 | /* Force cleanup of any alloca areas if using C alloca instead of | |
531 | a builtin alloca. This particular call is used to clean up | |
532 | areas allocated by low level target code which may build up | |
533 | during lengthy interactions between gdb and the target before | |
534 | gdb gives control to the user (ie watchpoints). */ | |
535 | alloca (0); | |
536 | ||
31e9866e | 537 | for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS; i++) |
7302a204 | 538 | set_register_cached (i, 0); |
32178cab MS |
539 | |
540 | if (registers_changed_hook) | |
541 | registers_changed_hook (); | |
542 | } | |
543 | ||
544 | /* REGISTERS_FETCHED () | |
545 | ||
546 | Indicate that all registers have been fetched, so mark them all valid. */ | |
547 | ||
31e9866e AC |
548 | /* NOTE: cagney/2001-12-04: This function does not set valid on the |
549 | pseudo-register range since pseudo registers are always supplied | |
550 | using supply_register(). */ | |
551 | /* FIXME: cagney/2001-12-04: This function is DEPRECATED. The target | |
552 | code was blatting the registers[] array and then calling this. | |
553 | Since targets should only be using supply_register() the need for | |
554 | this function/hack is eliminated. */ | |
32178cab MS |
555 | |
556 | void | |
557 | registers_fetched (void) | |
558 | { | |
559 | int i; | |
32178cab | 560 | |
a728f042 | 561 | for (i = 0; i < NUM_REGS; i++) |
7302a204 | 562 | set_register_cached (i, 1); |
fcdc5976 | 563 | /* Do not assume that the pseudo-regs have also been fetched. |
31e9866e | 564 | Fetching all real regs NEVER accounts for pseudo-regs. */ |
32178cab MS |
565 | } |
566 | ||
567 | /* read_register_bytes and write_register_bytes are generally a *BAD* | |
568 | idea. They are inefficient because they need to check for partial | |
569 | updates, which can only be done by scanning through all of the | |
570 | registers and seeing if the bytes that are being read/written fall | |
571 | inside of an invalid register. [The main reason this is necessary | |
572 | is that register sizes can vary, so a simple index won't suffice.] | |
573 | It is far better to call read_register_gen and write_register_gen | |
574 | if you want to get at the raw register contents, as it only takes a | |
5ebd2499 | 575 | regnum as an argument, and therefore can't do a partial register |
32178cab MS |
576 | update. |
577 | ||
578 | Prior to the recent fixes to check for partial updates, both read | |
579 | and write_register_bytes always checked to see if any registers | |
580 | were stale, and then called target_fetch_registers (-1) to update | |
581 | the whole set. This caused really slowed things down for remote | |
582 | targets. */ | |
583 | ||
584 | /* Copy INLEN bytes of consecutive data from registers | |
585 | starting with the INREGBYTE'th byte of register data | |
586 | into memory at MYADDR. */ | |
587 | ||
588 | void | |
61a0eb5b | 589 | read_register_bytes (int in_start, char *in_buf, int in_len) |
32178cab | 590 | { |
61a0eb5b | 591 | int in_end = in_start + in_len; |
5ebd2499 | 592 | int regnum; |
61a0eb5b | 593 | char *reg_buf = alloca (MAX_REGISTER_RAW_SIZE); |
32178cab MS |
594 | |
595 | /* See if we are trying to read bytes from out-of-date registers. If so, | |
596 | update just those registers. */ | |
597 | ||
5ebd2499 | 598 | for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++) |
32178cab | 599 | { |
61a0eb5b AC |
600 | int reg_start; |
601 | int reg_end; | |
602 | int reg_len; | |
603 | int start; | |
604 | int end; | |
605 | int byte; | |
32178cab | 606 | |
61a0eb5b AC |
607 | reg_start = REGISTER_BYTE (regnum); |
608 | reg_len = REGISTER_RAW_SIZE (regnum); | |
609 | reg_end = reg_start + reg_len; | |
32178cab | 610 | |
61a0eb5b | 611 | if (reg_end <= in_start || in_end <= reg_start) |
5ebd2499 | 612 | /* The range the user wants to read doesn't overlap with regnum. */ |
32178cab MS |
613 | continue; |
614 | ||
275f450c AC |
615 | if (REGISTER_NAME (regnum) != NULL && *REGISTER_NAME (regnum) != '\0') |
616 | /* Force the cache to fetch the entire register. */ | |
617 | read_register_gen (regnum, reg_buf); | |
618 | else | |
619 | /* Legacy note: even though this register is ``invalid'' we | |
620 | still need to return something. It would appear that some | |
621 | code relies on apparent gaps in the register array also | |
622 | being returned. */ | |
623 | /* FIXME: cagney/2001-08-18: This is just silly. It defeats | |
624 | the entire register read/write flow of control. Must | |
625 | resist temptation to return 0xdeadbeef. */ | |
626 | memcpy (reg_buf, registers + reg_start, reg_len); | |
32178cab | 627 | |
61a0eb5b AC |
628 | /* Legacy note: This function, for some reason, allows a NULL |
629 | input buffer. If the buffer is NULL, the registers are still | |
630 | fetched, just the final transfer is skipped. */ | |
631 | if (in_buf == NULL) | |
632 | continue; | |
633 | ||
634 | /* start = max (reg_start, in_start) */ | |
635 | if (reg_start > in_start) | |
636 | start = reg_start; | |
637 | else | |
638 | start = in_start; | |
639 | ||
640 | /* end = min (reg_end, in_end) */ | |
641 | if (reg_end < in_end) | |
642 | end = reg_end; | |
643 | else | |
644 | end = in_end; | |
645 | ||
646 | /* Transfer just the bytes common to both IN_BUF and REG_BUF */ | |
647 | for (byte = start; byte < end; byte++) | |
165cd47f | 648 | { |
61a0eb5b | 649 | in_buf[byte - in_start] = reg_buf[byte - reg_start]; |
165cd47f | 650 | } |
32178cab | 651 | } |
32178cab MS |
652 | } |
653 | ||
5ebd2499 ND |
654 | /* Read register REGNUM into memory at MYADDR, which must be large |
655 | enough for REGISTER_RAW_BYTES (REGNUM). Target byte-order. If the | |
32178cab MS |
656 | register is known to be the size of a CORE_ADDR or smaller, |
657 | read_register can be used instead. */ | |
658 | ||
61a0eb5b AC |
659 | static void |
660 | legacy_read_register_gen (int regnum, char *myaddr) | |
32178cab | 661 | { |
61a0eb5b | 662 | gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS)); |
39f77062 | 663 | if (! ptid_equal (registers_ptid, inferior_ptid)) |
32178cab MS |
664 | { |
665 | registers_changed (); | |
39f77062 | 666 | registers_ptid = inferior_ptid; |
32178cab MS |
667 | } |
668 | ||
7302a204 ND |
669 | if (!register_cached (regnum)) |
670 | fetch_register (regnum); | |
671 | ||
3fadccb3 | 672 | memcpy (myaddr, register_buffer (current_regcache, regnum), |
5ebd2499 | 673 | REGISTER_RAW_SIZE (regnum)); |
32178cab MS |
674 | } |
675 | ||
61a0eb5b | 676 | void |
1aaa5f99 | 677 | regcache_raw_read (struct regcache *regcache, int regnum, void *buf) |
61a0eb5b | 678 | { |
3fadccb3 AC |
679 | gdb_assert (regcache != NULL && buf != NULL); |
680 | gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers); | |
681 | if (regcache->descr->legacy_p | |
682 | && regcache->passthrough_p) | |
683 | { | |
684 | gdb_assert (regcache == current_regcache); | |
685 | /* For moment, just use underlying legacy code. Ulgh!!! This | |
686 | silently and very indirectly updates the regcache's regcache | |
687 | via the global register_valid[]. */ | |
688 | legacy_read_register_gen (regnum, buf); | |
689 | return; | |
690 | } | |
691 | /* Make certain that the register cache is up-to-date with respect | |
692 | to the current thread. This switching shouldn't be necessary | |
693 | only there is still only one target side register cache. Sigh! | |
694 | On the bright side, at least there is a regcache object. */ | |
695 | if (regcache->passthrough_p) | |
696 | { | |
697 | gdb_assert (regcache == current_regcache); | |
698 | if (! ptid_equal (registers_ptid, inferior_ptid)) | |
699 | { | |
700 | registers_changed (); | |
701 | registers_ptid = inferior_ptid; | |
702 | } | |
703 | if (!register_cached (regnum)) | |
704 | fetch_register (regnum); | |
705 | } | |
706 | /* Copy the value directly into the register cache. */ | |
707 | memcpy (buf, (regcache->raw_registers | |
708 | + regcache->descr->register_offset[regnum]), | |
709 | regcache->descr->sizeof_register[regnum]); | |
61a0eb5b AC |
710 | } |
711 | ||
712 | void | |
713 | read_register_gen (int regnum, char *buf) | |
714 | { | |
3fadccb3 AC |
715 | gdb_assert (current_regcache != NULL); |
716 | gdb_assert (current_regcache->descr->gdbarch == current_gdbarch); | |
717 | if (current_regcache->descr->legacy_p) | |
61a0eb5b AC |
718 | { |
719 | legacy_read_register_gen (regnum, buf); | |
720 | return; | |
721 | } | |
d138e37a AC |
722 | gdb_assert (regnum >= 0); |
723 | gdb_assert (regnum < current_regcache->descr->nr_cooked_registers); | |
724 | if (regnum < current_regcache->descr->nr_raw_registers) | |
725 | regcache_raw_read (current_regcache, regnum, buf); | |
726 | else | |
d8124050 AC |
727 | gdbarch_pseudo_register_read (current_gdbarch, current_regcache, |
728 | regnum, buf); | |
61a0eb5b AC |
729 | } |
730 | ||
731 | ||
5ebd2499 ND |
732 | /* Write register REGNUM at MYADDR to the target. MYADDR points at |
733 | REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order. */ | |
32178cab | 734 | |
61a0eb5b | 735 | static void |
1aaa5f99 | 736 | legacy_write_register_gen (int regnum, const void *myaddr) |
32178cab MS |
737 | { |
738 | int size; | |
61a0eb5b | 739 | gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS)); |
32178cab MS |
740 | |
741 | /* On the sparc, writing %g0 is a no-op, so we don't even want to | |
742 | change the registers array if something writes to this register. */ | |
5ebd2499 | 743 | if (CANNOT_STORE_REGISTER (regnum)) |
32178cab MS |
744 | return; |
745 | ||
39f77062 | 746 | if (! ptid_equal (registers_ptid, inferior_ptid)) |
32178cab MS |
747 | { |
748 | registers_changed (); | |
39f77062 | 749 | registers_ptid = inferior_ptid; |
32178cab MS |
750 | } |
751 | ||
5ebd2499 | 752 | size = REGISTER_RAW_SIZE (regnum); |
32178cab | 753 | |
7302a204 | 754 | if (real_register (regnum)) |
1297a2f0 MS |
755 | { |
756 | /* If we have a valid copy of the register, and new value == old | |
757 | value, then don't bother doing the actual store. */ | |
758 | if (register_cached (regnum) | |
3fadccb3 AC |
759 | && (memcmp (register_buffer (current_regcache, regnum), myaddr, size) |
760 | == 0)) | |
1297a2f0 MS |
761 | return; |
762 | else | |
763 | target_prepare_to_store (); | |
764 | } | |
32178cab | 765 | |
3fadccb3 | 766 | memcpy (register_buffer (current_regcache, regnum), myaddr, size); |
32178cab | 767 | |
7302a204 ND |
768 | set_register_cached (regnum, 1); |
769 | store_register (regnum); | |
32178cab MS |
770 | } |
771 | ||
61a0eb5b | 772 | void |
1aaa5f99 | 773 | regcache_raw_write (struct regcache *regcache, int regnum, const void *buf) |
61a0eb5b | 774 | { |
3fadccb3 AC |
775 | gdb_assert (regcache != NULL && buf != NULL); |
776 | gdb_assert (regnum >= 0 && regnum < regcache->descr->nr_raw_registers); | |
777 | ||
778 | if (regcache->passthrough_p | |
779 | && regcache->descr->legacy_p) | |
780 | { | |
781 | /* For moment, just use underlying legacy code. Ulgh!!! This | |
782 | silently and very indirectly updates the regcache's buffers | |
783 | via the globals register_valid[] and registers[]. */ | |
784 | gdb_assert (regcache == current_regcache); | |
785 | legacy_write_register_gen (regnum, buf); | |
786 | return; | |
787 | } | |
788 | ||
789 | /* On the sparc, writing %g0 is a no-op, so we don't even want to | |
790 | change the registers array if something writes to this register. */ | |
791 | if (CANNOT_STORE_REGISTER (regnum)) | |
792 | return; | |
793 | ||
794 | /* Handle the simple case first -> not write through so just store | |
795 | value in cache. */ | |
796 | if (!regcache->passthrough_p) | |
797 | { | |
798 | memcpy ((regcache->raw_registers | |
799 | + regcache->descr->register_offset[regnum]), buf, | |
800 | regcache->descr->sizeof_register[regnum]); | |
801 | regcache->raw_register_valid_p[regnum] = 1; | |
802 | return; | |
803 | } | |
804 | ||
805 | /* Make certain that the correct cache is selected. */ | |
806 | gdb_assert (regcache == current_regcache); | |
807 | if (! ptid_equal (registers_ptid, inferior_ptid)) | |
808 | { | |
809 | registers_changed (); | |
810 | registers_ptid = inferior_ptid; | |
811 | } | |
812 | ||
813 | /* If we have a valid copy of the register, and new value == old | |
814 | value, then don't bother doing the actual store. */ | |
815 | if (regcache_valid_p (regcache, regnum) | |
816 | && (memcmp (register_buffer (regcache, regnum), buf, | |
817 | regcache->descr->sizeof_register[regnum]) == 0)) | |
818 | return; | |
819 | ||
820 | target_prepare_to_store (); | |
821 | memcpy (register_buffer (regcache, regnum), buf, | |
822 | regcache->descr->sizeof_register[regnum]); | |
823 | regcache->raw_register_valid_p[regnum] = 1; | |
824 | store_register (regnum); | |
61a0eb5b AC |
825 | } |
826 | ||
827 | void | |
828 | write_register_gen (int regnum, char *buf) | |
829 | { | |
3fadccb3 AC |
830 | gdb_assert (current_regcache != NULL); |
831 | gdb_assert (current_regcache->descr->gdbarch == current_gdbarch); | |
832 | if (current_regcache->descr->legacy_p) | |
61a0eb5b AC |
833 | { |
834 | legacy_write_register_gen (regnum, buf); | |
835 | return; | |
836 | } | |
d138e37a AC |
837 | gdb_assert (regnum >= 0); |
838 | gdb_assert (regnum < current_regcache->descr->nr_cooked_registers); | |
839 | if (regnum < current_regcache->descr->nr_raw_registers) | |
840 | regcache_raw_write (current_regcache, regnum, buf); | |
841 | else | |
d8124050 AC |
842 | gdbarch_pseudo_register_write (current_gdbarch, current_regcache, |
843 | regnum, buf); | |
61a0eb5b AC |
844 | } |
845 | ||
32178cab MS |
846 | /* Copy INLEN bytes of consecutive data from memory at MYADDR |
847 | into registers starting with the MYREGSTART'th byte of register data. */ | |
848 | ||
849 | void | |
850 | write_register_bytes (int myregstart, char *myaddr, int inlen) | |
851 | { | |
852 | int myregend = myregstart + inlen; | |
5ebd2499 | 853 | int regnum; |
32178cab MS |
854 | |
855 | target_prepare_to_store (); | |
856 | ||
857 | /* Scan through the registers updating any that are covered by the | |
858 | range myregstart<=>myregend using write_register_gen, which does | |
859 | nice things like handling threads, and avoiding updates when the | |
860 | new and old contents are the same. */ | |
861 | ||
5ebd2499 | 862 | for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++) |
32178cab MS |
863 | { |
864 | int regstart, regend; | |
865 | ||
5ebd2499 ND |
866 | regstart = REGISTER_BYTE (regnum); |
867 | regend = regstart + REGISTER_RAW_SIZE (regnum); | |
32178cab MS |
868 | |
869 | /* Is this register completely outside the range the user is writing? */ | |
870 | if (myregend <= regstart || regend <= myregstart) | |
871 | /* do nothing */ ; | |
872 | ||
873 | /* Is this register completely within the range the user is writing? */ | |
874 | else if (myregstart <= regstart && regend <= myregend) | |
5ebd2499 | 875 | write_register_gen (regnum, myaddr + (regstart - myregstart)); |
32178cab MS |
876 | |
877 | /* The register partially overlaps the range being written. */ | |
878 | else | |
879 | { | |
e6cbd02a | 880 | char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE); |
32178cab MS |
881 | /* What's the overlap between this register's bytes and |
882 | those the caller wants to write? */ | |
883 | int overlapstart = max (regstart, myregstart); | |
884 | int overlapend = min (regend, myregend); | |
885 | ||
886 | /* We may be doing a partial update of an invalid register. | |
887 | Update it from the target before scribbling on it. */ | |
5ebd2499 | 888 | read_register_gen (regnum, regbuf); |
32178cab MS |
889 | |
890 | memcpy (registers + overlapstart, | |
891 | myaddr + (overlapstart - myregstart), | |
892 | overlapend - overlapstart); | |
893 | ||
7302a204 | 894 | store_register (regnum); |
32178cab MS |
895 | } |
896 | } | |
897 | } | |
898 | ||
899 | ||
5ebd2499 | 900 | /* Return the contents of register REGNUM as an unsigned integer. */ |
32178cab | 901 | |
173155e8 | 902 | ULONGEST |
5ebd2499 | 903 | read_register (int regnum) |
32178cab | 904 | { |
61a0eb5b AC |
905 | char *buf = alloca (REGISTER_RAW_SIZE (regnum)); |
906 | read_register_gen (regnum, buf); | |
907 | return (extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum))); | |
32178cab MS |
908 | } |
909 | ||
173155e8 | 910 | ULONGEST |
39f77062 | 911 | read_register_pid (int regnum, ptid_t ptid) |
32178cab | 912 | { |
39f77062 | 913 | ptid_t save_ptid; |
32178cab MS |
914 | int save_pid; |
915 | CORE_ADDR retval; | |
916 | ||
39f77062 | 917 | if (ptid_equal (ptid, inferior_ptid)) |
5ebd2499 | 918 | return read_register (regnum); |
32178cab | 919 | |
39f77062 | 920 | save_ptid = inferior_ptid; |
32178cab | 921 | |
39f77062 | 922 | inferior_ptid = ptid; |
32178cab | 923 | |
5ebd2499 | 924 | retval = read_register (regnum); |
32178cab | 925 | |
39f77062 | 926 | inferior_ptid = save_ptid; |
32178cab MS |
927 | |
928 | return retval; | |
929 | } | |
930 | ||
5ebd2499 | 931 | /* Return the contents of register REGNUM as a signed integer. */ |
173155e8 AC |
932 | |
933 | LONGEST | |
5ebd2499 | 934 | read_signed_register (int regnum) |
173155e8 | 935 | { |
61a0eb5b AC |
936 | void *buf = alloca (REGISTER_RAW_SIZE (regnum)); |
937 | read_register_gen (regnum, buf); | |
938 | return (extract_signed_integer (buf, REGISTER_RAW_SIZE (regnum))); | |
173155e8 AC |
939 | } |
940 | ||
941 | LONGEST | |
39f77062 | 942 | read_signed_register_pid (int regnum, ptid_t ptid) |
173155e8 | 943 | { |
39f77062 | 944 | ptid_t save_ptid; |
173155e8 AC |
945 | LONGEST retval; |
946 | ||
39f77062 | 947 | if (ptid_equal (ptid, inferior_ptid)) |
5ebd2499 | 948 | return read_signed_register (regnum); |
173155e8 | 949 | |
39f77062 | 950 | save_ptid = inferior_ptid; |
173155e8 | 951 | |
39f77062 | 952 | inferior_ptid = ptid; |
173155e8 | 953 | |
5ebd2499 | 954 | retval = read_signed_register (regnum); |
173155e8 | 955 | |
39f77062 | 956 | inferior_ptid = save_ptid; |
173155e8 AC |
957 | |
958 | return retval; | |
959 | } | |
960 | ||
5ebd2499 | 961 | /* Store VALUE into the raw contents of register number REGNUM. */ |
32178cab MS |
962 | |
963 | void | |
5ebd2499 | 964 | write_register (int regnum, LONGEST val) |
32178cab | 965 | { |
61a0eb5b | 966 | void *buf; |
32178cab | 967 | int size; |
5ebd2499 | 968 | size = REGISTER_RAW_SIZE (regnum); |
32178cab MS |
969 | buf = alloca (size); |
970 | store_signed_integer (buf, size, (LONGEST) val); | |
61a0eb5b | 971 | write_register_gen (regnum, buf); |
32178cab MS |
972 | } |
973 | ||
974 | void | |
39f77062 | 975 | write_register_pid (int regnum, CORE_ADDR val, ptid_t ptid) |
32178cab | 976 | { |
39f77062 | 977 | ptid_t save_ptid; |
32178cab | 978 | |
39f77062 | 979 | if (ptid_equal (ptid, inferior_ptid)) |
32178cab | 980 | { |
5ebd2499 | 981 | write_register (regnum, val); |
32178cab MS |
982 | return; |
983 | } | |
984 | ||
39f77062 | 985 | save_ptid = inferior_ptid; |
32178cab | 986 | |
39f77062 | 987 | inferior_ptid = ptid; |
32178cab | 988 | |
5ebd2499 | 989 | write_register (regnum, val); |
32178cab | 990 | |
39f77062 | 991 | inferior_ptid = save_ptid; |
32178cab MS |
992 | } |
993 | ||
994 | /* SUPPLY_REGISTER() | |
995 | ||
5ebd2499 | 996 | Record that register REGNUM contains VAL. This is used when the |
32178cab MS |
997 | value is obtained from the inferior or core dump, so there is no |
998 | need to store the value there. | |
999 | ||
1000 | If VAL is a NULL pointer, then it's probably an unsupported register. | |
5ebd2499 | 1001 | We just set its value to all zeros. We might want to record this |
32178cab MS |
1002 | fact, and report it to the users of read_register and friends. */ |
1003 | ||
1004 | void | |
1aaa5f99 | 1005 | supply_register (int regnum, const void *val) |
32178cab MS |
1006 | { |
1007 | #if 1 | |
39f77062 | 1008 | if (! ptid_equal (registers_ptid, inferior_ptid)) |
32178cab MS |
1009 | { |
1010 | registers_changed (); | |
39f77062 | 1011 | registers_ptid = inferior_ptid; |
32178cab MS |
1012 | } |
1013 | #endif | |
1014 | ||
7302a204 | 1015 | set_register_cached (regnum, 1); |
32178cab | 1016 | if (val) |
3fadccb3 | 1017 | memcpy (register_buffer (current_regcache, regnum), val, |
5ebd2499 | 1018 | REGISTER_RAW_SIZE (regnum)); |
32178cab | 1019 | else |
3fadccb3 | 1020 | memset (register_buffer (current_regcache, regnum), '\000', |
5ebd2499 | 1021 | REGISTER_RAW_SIZE (regnum)); |
32178cab MS |
1022 | |
1023 | /* On some architectures, e.g. HPPA, there are a few stray bits in | |
1024 | some registers, that the rest of the code would like to ignore. */ | |
1025 | ||
61a0eb5b AC |
1026 | /* NOTE: cagney/2001-03-16: The macro CLEAN_UP_REGISTER_VALUE is |
1027 | going to be deprecated. Instead architectures will leave the raw | |
1028 | register value as is and instead clean things up as they pass | |
d8124050 | 1029 | through the method gdbarch_pseudo_register_read() clean up the |
61a0eb5b AC |
1030 | values. */ |
1031 | ||
4ee3352d | 1032 | #ifdef DEPRECATED_CLEAN_UP_REGISTER_VALUE |
0b434a00 AC |
1033 | DEPRECATED_CLEAN_UP_REGISTER_VALUE \ |
1034 | (regnum, register_buffer (current_regcache, regnum)); | |
32178cab MS |
1035 | #endif |
1036 | } | |
1037 | ||
193cb69f AC |
1038 | void |
1039 | regcache_collect (int regnum, void *buf) | |
1040 | { | |
3fadccb3 AC |
1041 | memcpy (buf, register_buffer (current_regcache, regnum), |
1042 | REGISTER_RAW_SIZE (regnum)); | |
193cb69f AC |
1043 | } |
1044 | ||
1045 | ||
8227c0ff AC |
1046 | /* read_pc, write_pc, read_sp, write_sp, read_fp, etc. Special |
1047 | handling for registers PC, SP, and FP. */ | |
32178cab | 1048 | |
4e052eda AC |
1049 | /* NOTE: cagney/2001-02-18: The functions generic_target_read_pc(), |
1050 | read_pc_pid(), read_pc(), generic_target_write_pc(), | |
1051 | write_pc_pid(), write_pc(), generic_target_read_sp(), read_sp(), | |
8227c0ff AC |
1052 | generic_target_write_sp(), write_sp(), generic_target_read_fp() and |
1053 | read_fp(), will eventually be moved out of the reg-cache into | |
1054 | either frame.[hc] or to the multi-arch framework. The are not part | |
1055 | of the raw register cache. */ | |
4e052eda | 1056 | |
32178cab MS |
1057 | /* This routine is getting awfully cluttered with #if's. It's probably |
1058 | time to turn this into READ_PC and define it in the tm.h file. | |
1059 | Ditto for write_pc. | |
1060 | ||
1061 | 1999-06-08: The following were re-written so that it assumes the | |
8e1a459b | 1062 | existence of a TARGET_READ_PC et.al. macro. A default generic |
32178cab MS |
1063 | version of that macro is made available where needed. |
1064 | ||
1065 | Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled | |
1066 | by the multi-arch framework, it will eventually be possible to | |
1067 | eliminate the intermediate read_pc_pid(). The client would call | |
1068 | TARGET_READ_PC directly. (cagney). */ | |
1069 | ||
32178cab | 1070 | CORE_ADDR |
39f77062 | 1071 | generic_target_read_pc (ptid_t ptid) |
32178cab MS |
1072 | { |
1073 | #ifdef PC_REGNUM | |
1074 | if (PC_REGNUM >= 0) | |
1075 | { | |
39f77062 | 1076 | CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, ptid)); |
32178cab MS |
1077 | return pc_val; |
1078 | } | |
1079 | #endif | |
8e65ff28 AC |
1080 | internal_error (__FILE__, __LINE__, |
1081 | "generic_target_read_pc"); | |
32178cab MS |
1082 | return 0; |
1083 | } | |
1084 | ||
1085 | CORE_ADDR | |
39f77062 | 1086 | read_pc_pid (ptid_t ptid) |
32178cab | 1087 | { |
39f77062 | 1088 | ptid_t saved_inferior_ptid; |
32178cab MS |
1089 | CORE_ADDR pc_val; |
1090 | ||
39f77062 KB |
1091 | /* In case ptid != inferior_ptid. */ |
1092 | saved_inferior_ptid = inferior_ptid; | |
1093 | inferior_ptid = ptid; | |
32178cab | 1094 | |
39f77062 | 1095 | pc_val = TARGET_READ_PC (ptid); |
32178cab | 1096 | |
39f77062 | 1097 | inferior_ptid = saved_inferior_ptid; |
32178cab MS |
1098 | return pc_val; |
1099 | } | |
1100 | ||
1101 | CORE_ADDR | |
1102 | read_pc (void) | |
1103 | { | |
39f77062 | 1104 | return read_pc_pid (inferior_ptid); |
32178cab MS |
1105 | } |
1106 | ||
32178cab | 1107 | void |
39f77062 | 1108 | generic_target_write_pc (CORE_ADDR pc, ptid_t ptid) |
32178cab MS |
1109 | { |
1110 | #ifdef PC_REGNUM | |
1111 | if (PC_REGNUM >= 0) | |
39f77062 | 1112 | write_register_pid (PC_REGNUM, pc, ptid); |
32178cab | 1113 | if (NPC_REGNUM >= 0) |
39f77062 | 1114 | write_register_pid (NPC_REGNUM, pc + 4, ptid); |
32178cab | 1115 | #else |
8e65ff28 AC |
1116 | internal_error (__FILE__, __LINE__, |
1117 | "generic_target_write_pc"); | |
32178cab MS |
1118 | #endif |
1119 | } | |
1120 | ||
1121 | void | |
39f77062 | 1122 | write_pc_pid (CORE_ADDR pc, ptid_t ptid) |
32178cab | 1123 | { |
39f77062 | 1124 | ptid_t saved_inferior_ptid; |
32178cab | 1125 | |
39f77062 KB |
1126 | /* In case ptid != inferior_ptid. */ |
1127 | saved_inferior_ptid = inferior_ptid; | |
1128 | inferior_ptid = ptid; | |
32178cab | 1129 | |
39f77062 | 1130 | TARGET_WRITE_PC (pc, ptid); |
32178cab | 1131 | |
39f77062 | 1132 | inferior_ptid = saved_inferior_ptid; |
32178cab MS |
1133 | } |
1134 | ||
1135 | void | |
1136 | write_pc (CORE_ADDR pc) | |
1137 | { | |
39f77062 | 1138 | write_pc_pid (pc, inferior_ptid); |
32178cab MS |
1139 | } |
1140 | ||
1141 | /* Cope with strage ways of getting to the stack and frame pointers */ | |
1142 | ||
32178cab MS |
1143 | CORE_ADDR |
1144 | generic_target_read_sp (void) | |
1145 | { | |
1146 | #ifdef SP_REGNUM | |
1147 | if (SP_REGNUM >= 0) | |
1148 | return read_register (SP_REGNUM); | |
1149 | #endif | |
8e65ff28 AC |
1150 | internal_error (__FILE__, __LINE__, |
1151 | "generic_target_read_sp"); | |
32178cab MS |
1152 | } |
1153 | ||
1154 | CORE_ADDR | |
1155 | read_sp (void) | |
1156 | { | |
1157 | return TARGET_READ_SP (); | |
1158 | } | |
1159 | ||
32178cab MS |
1160 | void |
1161 | generic_target_write_sp (CORE_ADDR val) | |
1162 | { | |
1163 | #ifdef SP_REGNUM | |
1164 | if (SP_REGNUM >= 0) | |
1165 | { | |
1166 | write_register (SP_REGNUM, val); | |
1167 | return; | |
1168 | } | |
1169 | #endif | |
8e65ff28 AC |
1170 | internal_error (__FILE__, __LINE__, |
1171 | "generic_target_write_sp"); | |
32178cab MS |
1172 | } |
1173 | ||
1174 | void | |
1175 | write_sp (CORE_ADDR val) | |
1176 | { | |
1177 | TARGET_WRITE_SP (val); | |
1178 | } | |
1179 | ||
32178cab MS |
1180 | CORE_ADDR |
1181 | generic_target_read_fp (void) | |
1182 | { | |
1183 | #ifdef FP_REGNUM | |
1184 | if (FP_REGNUM >= 0) | |
1185 | return read_register (FP_REGNUM); | |
1186 | #endif | |
8e65ff28 AC |
1187 | internal_error (__FILE__, __LINE__, |
1188 | "generic_target_read_fp"); | |
32178cab MS |
1189 | } |
1190 | ||
1191 | CORE_ADDR | |
1192 | read_fp (void) | |
1193 | { | |
1194 | return TARGET_READ_FP (); | |
1195 | } | |
1196 | ||
705152c5 MS |
1197 | /* ARGSUSED */ |
1198 | static void | |
1199 | reg_flush_command (char *command, int from_tty) | |
1200 | { | |
1201 | /* Force-flush the register cache. */ | |
1202 | registers_changed (); | |
1203 | if (from_tty) | |
1204 | printf_filtered ("Register cache flushed.\n"); | |
1205 | } | |
1206 | ||
32178cab MS |
1207 | static void |
1208 | build_regcache (void) | |
3fadccb3 AC |
1209 | { |
1210 | current_regcache = regcache_xmalloc (current_gdbarch); | |
1211 | current_regcache->passthrough_p = 1; | |
1212 | registers = deprecated_grub_regcache_for_registers (current_regcache); | |
1213 | register_valid = deprecated_grub_regcache_for_register_valid (current_regcache); | |
1214 | } | |
1215 | ||
32178cab MS |
1216 | void |
1217 | _initialize_regcache (void) | |
1218 | { | |
3fadccb3 AC |
1219 | regcache_descr_handle = register_gdbarch_data (init_regcache_descr, |
1220 | xfree_regcache_descr); | |
1221 | REGISTER_GDBARCH_SWAP (current_regcache); | |
32178cab MS |
1222 | register_gdbarch_swap (®isters, sizeof (registers), NULL); |
1223 | register_gdbarch_swap (®ister_valid, sizeof (register_valid), NULL); | |
1224 | register_gdbarch_swap (NULL, 0, build_regcache); | |
705152c5 MS |
1225 | |
1226 | add_com ("flushregs", class_maintenance, reg_flush_command, | |
1227 | "Force gdb to flush its register cache (maintainer command)"); | |
39f77062 KB |
1228 | |
1229 | /* Initialize the thread/process associated with the current set of | |
1230 | registers. For now, -1 is special, and means `no current process'. */ | |
1231 | registers_ptid = pid_to_ptid (-1); | |
32178cab | 1232 | } |