Commit | Line | Data |
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32178cab | 1 | /* Cache and manage the values of registers for GDB, the GNU debugger. |
b6ba6518 | 2 | Copyright 1986, 1987, 1989, 1991, 1994, 1995, 1996, 1998, 2000, 2001 |
32178cab MS |
3 | Free Software Foundation, Inc. |
4 | ||
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
21 | ||
22 | #include "defs.h" | |
32178cab MS |
23 | #include "inferior.h" |
24 | #include "target.h" | |
25 | #include "gdbarch.h" | |
705152c5 | 26 | #include "gdbcmd.h" |
4e052eda | 27 | #include "regcache.h" |
61a0eb5b | 28 | #include "gdb_assert.h" |
32178cab MS |
29 | |
30 | /* | |
31 | * DATA STRUCTURE | |
32 | * | |
33 | * Here is the actual register cache. | |
34 | */ | |
35 | ||
5ebd2499 | 36 | /* NOTE: this is a write-through cache. There is no "dirty" bit for |
32178cab MS |
37 | recording if the register values have been changed (eg. by the |
38 | user). Therefore all registers must be written back to the | |
39 | target when appropriate. */ | |
40 | ||
41 | /* REGISTERS contains the cached register values (in target byte order). */ | |
42 | ||
43 | char *registers; | |
44 | ||
45 | /* REGISTER_VALID is 0 if the register needs to be fetched, | |
46 | 1 if it has been fetched, and | |
47 | -1 if the register value was not available. | |
c97dcfc7 AC |
48 | |
49 | "Not available" indicates that the target is not not able to supply | |
50 | the register at this state. The register may become available at a | |
51 | later time (after the next resume). This often occures when GDB is | |
52 | manipulating a target that contains only a snapshot of the entire | |
53 | system being debugged - some of the registers in such a system may | |
54 | not have been saved. */ | |
32178cab MS |
55 | |
56 | signed char *register_valid; | |
57 | ||
39f77062 | 58 | /* The thread/process associated with the current set of registers. */ |
32178cab | 59 | |
39f77062 | 60 | static ptid_t registers_ptid; |
32178cab MS |
61 | |
62 | /* | |
63 | * FUNCTIONS: | |
64 | */ | |
65 | ||
66 | /* REGISTER_CACHED() | |
67 | ||
68 | Returns 0 if the value is not in the cache (needs fetch). | |
69 | >0 if the value is in the cache. | |
70 | <0 if the value is permanently unavailable (don't ask again). */ | |
71 | ||
72 | int | |
73 | register_cached (int regnum) | |
74 | { | |
75 | return register_valid[regnum]; | |
76 | } | |
77 | ||
7302a204 ND |
78 | /* Record that REGNUM's value is cached if STATE is >0, uncached but |
79 | fetchable if STATE is 0, and uncached and unfetchable if STATE is <0. */ | |
80 | ||
81 | void | |
82 | set_register_cached (int regnum, int state) | |
83 | { | |
84 | register_valid[regnum] = state; | |
85 | } | |
86 | ||
2dc4e391 DT |
87 | /* REGISTER_CHANGED |
88 | ||
89 | invalidate a single register REGNUM in the cache */ | |
90 | void | |
91 | register_changed (int regnum) | |
92 | { | |
7302a204 ND |
93 | set_register_cached (regnum, 0); |
94 | } | |
95 | ||
96 | /* If REGNUM >= 0, return a pointer to register REGNUM's cache buffer area, | |
97 | else return a pointer to the start of the cache buffer. */ | |
98 | ||
193cb69f | 99 | static char * |
7302a204 ND |
100 | register_buffer (int regnum) |
101 | { | |
31e9866e AC |
102 | gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS)); |
103 | return ®isters[REGISTER_BYTE (regnum)]; | |
7302a204 ND |
104 | } |
105 | ||
106 | /* Return whether register REGNUM is a real register. */ | |
107 | ||
108 | static int | |
109 | real_register (int regnum) | |
110 | { | |
111 | return regnum >= 0 && regnum < NUM_REGS; | |
112 | } | |
113 | ||
114 | /* Return whether register REGNUM is a pseudo register. */ | |
115 | ||
116 | static int | |
117 | pseudo_register (int regnum) | |
118 | { | |
119 | return regnum >= NUM_REGS && regnum < NUM_REGS + NUM_PSEUDO_REGS; | |
120 | } | |
121 | ||
122 | /* Fetch register REGNUM into the cache. */ | |
123 | ||
124 | static void | |
125 | fetch_register (int regnum) | |
126 | { | |
31e9866e AC |
127 | /* NOTE: cagney/2001-12-04: Legacy targets were using fetch/store |
128 | pseudo-register as a way of handling registers that needed to be | |
129 | constructed from one or more raw registers. New targets instead | |
130 | use gdbarch register read/write. */ | |
131 | if (FETCH_PSEUDO_REGISTER_P () | |
132 | && pseudo_register (regnum)) | |
7302a204 | 133 | FETCH_PSEUDO_REGISTER (regnum); |
6af4589c MS |
134 | else |
135 | target_fetch_registers (regnum); | |
7302a204 ND |
136 | } |
137 | ||
138 | /* Write register REGNUM cached value to the target. */ | |
139 | ||
140 | static void | |
141 | store_register (int regnum) | |
142 | { | |
31e9866e AC |
143 | /* NOTE: cagney/2001-12-04: Legacy targets were using fetch/store |
144 | pseudo-register as a way of handling registers that needed to be | |
145 | constructed from one or more raw registers. New targets instead | |
146 | use gdbarch register read/write. */ | |
147 | if (STORE_PSEUDO_REGISTER_P () | |
148 | && pseudo_register (regnum)) | |
7302a204 | 149 | STORE_PSEUDO_REGISTER (regnum); |
6af4589c MS |
150 | else |
151 | target_store_registers (regnum); | |
2dc4e391 DT |
152 | } |
153 | ||
32178cab MS |
154 | /* Low level examining and depositing of registers. |
155 | ||
156 | The caller is responsible for making sure that the inferior is | |
157 | stopped before calling the fetching routines, or it will get | |
158 | garbage. (a change from GDB version 3, in which the caller got the | |
159 | value from the last stop). */ | |
160 | ||
161 | /* REGISTERS_CHANGED () | |
162 | ||
163 | Indicate that registers may have changed, so invalidate the cache. */ | |
164 | ||
165 | void | |
166 | registers_changed (void) | |
167 | { | |
168 | int i; | |
32178cab | 169 | |
39f77062 | 170 | registers_ptid = pid_to_ptid (-1); |
32178cab MS |
171 | |
172 | /* Force cleanup of any alloca areas if using C alloca instead of | |
173 | a builtin alloca. This particular call is used to clean up | |
174 | areas allocated by low level target code which may build up | |
175 | during lengthy interactions between gdb and the target before | |
176 | gdb gives control to the user (ie watchpoints). */ | |
177 | alloca (0); | |
178 | ||
31e9866e | 179 | for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS; i++) |
7302a204 | 180 | set_register_cached (i, 0); |
32178cab MS |
181 | |
182 | if (registers_changed_hook) | |
183 | registers_changed_hook (); | |
184 | } | |
185 | ||
186 | /* REGISTERS_FETCHED () | |
187 | ||
188 | Indicate that all registers have been fetched, so mark them all valid. */ | |
189 | ||
31e9866e AC |
190 | /* NOTE: cagney/2001-12-04: This function does not set valid on the |
191 | pseudo-register range since pseudo registers are always supplied | |
192 | using supply_register(). */ | |
193 | /* FIXME: cagney/2001-12-04: This function is DEPRECATED. The target | |
194 | code was blatting the registers[] array and then calling this. | |
195 | Since targets should only be using supply_register() the need for | |
196 | this function/hack is eliminated. */ | |
32178cab MS |
197 | |
198 | void | |
199 | registers_fetched (void) | |
200 | { | |
201 | int i; | |
32178cab | 202 | |
a728f042 | 203 | for (i = 0; i < NUM_REGS; i++) |
7302a204 | 204 | set_register_cached (i, 1); |
fcdc5976 | 205 | /* Do not assume that the pseudo-regs have also been fetched. |
31e9866e | 206 | Fetching all real regs NEVER accounts for pseudo-regs. */ |
32178cab MS |
207 | } |
208 | ||
209 | /* read_register_bytes and write_register_bytes are generally a *BAD* | |
210 | idea. They are inefficient because they need to check for partial | |
211 | updates, which can only be done by scanning through all of the | |
212 | registers and seeing if the bytes that are being read/written fall | |
213 | inside of an invalid register. [The main reason this is necessary | |
214 | is that register sizes can vary, so a simple index won't suffice.] | |
215 | It is far better to call read_register_gen and write_register_gen | |
216 | if you want to get at the raw register contents, as it only takes a | |
5ebd2499 | 217 | regnum as an argument, and therefore can't do a partial register |
32178cab MS |
218 | update. |
219 | ||
220 | Prior to the recent fixes to check for partial updates, both read | |
221 | and write_register_bytes always checked to see if any registers | |
222 | were stale, and then called target_fetch_registers (-1) to update | |
223 | the whole set. This caused really slowed things down for remote | |
224 | targets. */ | |
225 | ||
226 | /* Copy INLEN bytes of consecutive data from registers | |
227 | starting with the INREGBYTE'th byte of register data | |
228 | into memory at MYADDR. */ | |
229 | ||
230 | void | |
61a0eb5b | 231 | read_register_bytes (int in_start, char *in_buf, int in_len) |
32178cab | 232 | { |
61a0eb5b | 233 | int in_end = in_start + in_len; |
5ebd2499 | 234 | int regnum; |
61a0eb5b | 235 | char *reg_buf = alloca (MAX_REGISTER_RAW_SIZE); |
32178cab MS |
236 | |
237 | /* See if we are trying to read bytes from out-of-date registers. If so, | |
238 | update just those registers. */ | |
239 | ||
5ebd2499 | 240 | for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++) |
32178cab | 241 | { |
61a0eb5b AC |
242 | int reg_start; |
243 | int reg_end; | |
244 | int reg_len; | |
245 | int start; | |
246 | int end; | |
247 | int byte; | |
32178cab | 248 | |
61a0eb5b AC |
249 | reg_start = REGISTER_BYTE (regnum); |
250 | reg_len = REGISTER_RAW_SIZE (regnum); | |
251 | reg_end = reg_start + reg_len; | |
32178cab | 252 | |
61a0eb5b | 253 | if (reg_end <= in_start || in_end <= reg_start) |
5ebd2499 | 254 | /* The range the user wants to read doesn't overlap with regnum. */ |
32178cab MS |
255 | continue; |
256 | ||
275f450c AC |
257 | if (REGISTER_NAME (regnum) != NULL && *REGISTER_NAME (regnum) != '\0') |
258 | /* Force the cache to fetch the entire register. */ | |
259 | read_register_gen (regnum, reg_buf); | |
260 | else | |
261 | /* Legacy note: even though this register is ``invalid'' we | |
262 | still need to return something. It would appear that some | |
263 | code relies on apparent gaps in the register array also | |
264 | being returned. */ | |
265 | /* FIXME: cagney/2001-08-18: This is just silly. It defeats | |
266 | the entire register read/write flow of control. Must | |
267 | resist temptation to return 0xdeadbeef. */ | |
268 | memcpy (reg_buf, registers + reg_start, reg_len); | |
32178cab | 269 | |
61a0eb5b AC |
270 | /* Legacy note: This function, for some reason, allows a NULL |
271 | input buffer. If the buffer is NULL, the registers are still | |
272 | fetched, just the final transfer is skipped. */ | |
273 | if (in_buf == NULL) | |
274 | continue; | |
275 | ||
276 | /* start = max (reg_start, in_start) */ | |
277 | if (reg_start > in_start) | |
278 | start = reg_start; | |
279 | else | |
280 | start = in_start; | |
281 | ||
282 | /* end = min (reg_end, in_end) */ | |
283 | if (reg_end < in_end) | |
284 | end = reg_end; | |
285 | else | |
286 | end = in_end; | |
287 | ||
288 | /* Transfer just the bytes common to both IN_BUF and REG_BUF */ | |
289 | for (byte = start; byte < end; byte++) | |
165cd47f | 290 | { |
61a0eb5b | 291 | in_buf[byte - in_start] = reg_buf[byte - reg_start]; |
165cd47f | 292 | } |
32178cab | 293 | } |
32178cab MS |
294 | } |
295 | ||
5ebd2499 ND |
296 | /* Read register REGNUM into memory at MYADDR, which must be large |
297 | enough for REGISTER_RAW_BYTES (REGNUM). Target byte-order. If the | |
32178cab MS |
298 | register is known to be the size of a CORE_ADDR or smaller, |
299 | read_register can be used instead. */ | |
300 | ||
61a0eb5b AC |
301 | static void |
302 | legacy_read_register_gen (int regnum, char *myaddr) | |
32178cab | 303 | { |
61a0eb5b | 304 | gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS)); |
39f77062 | 305 | if (! ptid_equal (registers_ptid, inferior_ptid)) |
32178cab MS |
306 | { |
307 | registers_changed (); | |
39f77062 | 308 | registers_ptid = inferior_ptid; |
32178cab MS |
309 | } |
310 | ||
7302a204 ND |
311 | if (!register_cached (regnum)) |
312 | fetch_register (regnum); | |
313 | ||
314 | memcpy (myaddr, register_buffer (regnum), | |
5ebd2499 | 315 | REGISTER_RAW_SIZE (regnum)); |
32178cab MS |
316 | } |
317 | ||
61a0eb5b AC |
318 | void |
319 | regcache_read (int rawnum, char *buf) | |
320 | { | |
2076c72b | 321 | gdb_assert (rawnum >= 0 && rawnum < (NUM_REGS + NUM_PSEUDO_REGS)); |
61a0eb5b AC |
322 | /* For moment, just use underlying legacy code. Ulgh!!! */ |
323 | legacy_read_register_gen (rawnum, buf); | |
324 | } | |
325 | ||
326 | void | |
327 | read_register_gen (int regnum, char *buf) | |
328 | { | |
329 | if (! gdbarch_register_read_p (current_gdbarch)) | |
330 | { | |
331 | legacy_read_register_gen (regnum, buf); | |
332 | return; | |
333 | } | |
334 | gdbarch_register_read (current_gdbarch, regnum, buf); | |
335 | } | |
336 | ||
337 | ||
5ebd2499 ND |
338 | /* Write register REGNUM at MYADDR to the target. MYADDR points at |
339 | REGISTER_RAW_BYTES(REGNUM), which must be in target byte-order. */ | |
32178cab | 340 | |
61a0eb5b AC |
341 | static void |
342 | legacy_write_register_gen (int regnum, char *myaddr) | |
32178cab MS |
343 | { |
344 | int size; | |
61a0eb5b | 345 | gdb_assert (regnum >= 0 && regnum < (NUM_REGS + NUM_PSEUDO_REGS)); |
32178cab MS |
346 | |
347 | /* On the sparc, writing %g0 is a no-op, so we don't even want to | |
348 | change the registers array if something writes to this register. */ | |
5ebd2499 | 349 | if (CANNOT_STORE_REGISTER (regnum)) |
32178cab MS |
350 | return; |
351 | ||
39f77062 | 352 | if (! ptid_equal (registers_ptid, inferior_ptid)) |
32178cab MS |
353 | { |
354 | registers_changed (); | |
39f77062 | 355 | registers_ptid = inferior_ptid; |
32178cab MS |
356 | } |
357 | ||
5ebd2499 | 358 | size = REGISTER_RAW_SIZE (regnum); |
32178cab | 359 | |
7302a204 | 360 | if (real_register (regnum)) |
1297a2f0 MS |
361 | { |
362 | /* If we have a valid copy of the register, and new value == old | |
363 | value, then don't bother doing the actual store. */ | |
364 | if (register_cached (regnum) | |
365 | && memcmp (register_buffer (regnum), myaddr, size) == 0) | |
366 | return; | |
367 | else | |
368 | target_prepare_to_store (); | |
369 | } | |
32178cab | 370 | |
7302a204 | 371 | memcpy (register_buffer (regnum), myaddr, size); |
32178cab | 372 | |
7302a204 ND |
373 | set_register_cached (regnum, 1); |
374 | store_register (regnum); | |
32178cab MS |
375 | } |
376 | ||
61a0eb5b AC |
377 | void |
378 | regcache_write (int rawnum, char *buf) | |
379 | { | |
2076c72b | 380 | gdb_assert (rawnum >= 0 && rawnum < (NUM_REGS + NUM_PSEUDO_REGS)); |
61a0eb5b AC |
381 | /* For moment, just use underlying legacy code. Ulgh!!! */ |
382 | legacy_write_register_gen (rawnum, buf); | |
383 | } | |
384 | ||
385 | void | |
386 | write_register_gen (int regnum, char *buf) | |
387 | { | |
388 | if (! gdbarch_register_write_p (current_gdbarch)) | |
389 | { | |
390 | legacy_write_register_gen (regnum, buf); | |
391 | return; | |
392 | } | |
393 | gdbarch_register_write (current_gdbarch, regnum, buf); | |
394 | } | |
395 | ||
32178cab MS |
396 | /* Copy INLEN bytes of consecutive data from memory at MYADDR |
397 | into registers starting with the MYREGSTART'th byte of register data. */ | |
398 | ||
399 | void | |
400 | write_register_bytes (int myregstart, char *myaddr, int inlen) | |
401 | { | |
402 | int myregend = myregstart + inlen; | |
5ebd2499 | 403 | int regnum; |
32178cab MS |
404 | |
405 | target_prepare_to_store (); | |
406 | ||
407 | /* Scan through the registers updating any that are covered by the | |
408 | range myregstart<=>myregend using write_register_gen, which does | |
409 | nice things like handling threads, and avoiding updates when the | |
410 | new and old contents are the same. */ | |
411 | ||
5ebd2499 | 412 | for (regnum = 0; regnum < NUM_REGS + NUM_PSEUDO_REGS; regnum++) |
32178cab MS |
413 | { |
414 | int regstart, regend; | |
415 | ||
5ebd2499 ND |
416 | regstart = REGISTER_BYTE (regnum); |
417 | regend = regstart + REGISTER_RAW_SIZE (regnum); | |
32178cab MS |
418 | |
419 | /* Is this register completely outside the range the user is writing? */ | |
420 | if (myregend <= regstart || regend <= myregstart) | |
421 | /* do nothing */ ; | |
422 | ||
423 | /* Is this register completely within the range the user is writing? */ | |
424 | else if (myregstart <= regstart && regend <= myregend) | |
5ebd2499 | 425 | write_register_gen (regnum, myaddr + (regstart - myregstart)); |
32178cab MS |
426 | |
427 | /* The register partially overlaps the range being written. */ | |
428 | else | |
429 | { | |
e6cbd02a | 430 | char *regbuf = (char*) alloca (MAX_REGISTER_RAW_SIZE); |
32178cab MS |
431 | /* What's the overlap between this register's bytes and |
432 | those the caller wants to write? */ | |
433 | int overlapstart = max (regstart, myregstart); | |
434 | int overlapend = min (regend, myregend); | |
435 | ||
436 | /* We may be doing a partial update of an invalid register. | |
437 | Update it from the target before scribbling on it. */ | |
5ebd2499 | 438 | read_register_gen (regnum, regbuf); |
32178cab MS |
439 | |
440 | memcpy (registers + overlapstart, | |
441 | myaddr + (overlapstart - myregstart), | |
442 | overlapend - overlapstart); | |
443 | ||
7302a204 | 444 | store_register (regnum); |
32178cab MS |
445 | } |
446 | } | |
447 | } | |
448 | ||
449 | ||
5ebd2499 | 450 | /* Return the contents of register REGNUM as an unsigned integer. */ |
32178cab | 451 | |
173155e8 | 452 | ULONGEST |
5ebd2499 | 453 | read_register (int regnum) |
32178cab | 454 | { |
61a0eb5b AC |
455 | char *buf = alloca (REGISTER_RAW_SIZE (regnum)); |
456 | read_register_gen (regnum, buf); | |
457 | return (extract_unsigned_integer (buf, REGISTER_RAW_SIZE (regnum))); | |
32178cab MS |
458 | } |
459 | ||
173155e8 | 460 | ULONGEST |
39f77062 | 461 | read_register_pid (int regnum, ptid_t ptid) |
32178cab | 462 | { |
39f77062 | 463 | ptid_t save_ptid; |
32178cab MS |
464 | int save_pid; |
465 | CORE_ADDR retval; | |
466 | ||
39f77062 | 467 | if (ptid_equal (ptid, inferior_ptid)) |
5ebd2499 | 468 | return read_register (regnum); |
32178cab | 469 | |
39f77062 | 470 | save_ptid = inferior_ptid; |
32178cab | 471 | |
39f77062 | 472 | inferior_ptid = ptid; |
32178cab | 473 | |
5ebd2499 | 474 | retval = read_register (regnum); |
32178cab | 475 | |
39f77062 | 476 | inferior_ptid = save_ptid; |
32178cab MS |
477 | |
478 | return retval; | |
479 | } | |
480 | ||
5ebd2499 | 481 | /* Return the contents of register REGNUM as a signed integer. */ |
173155e8 AC |
482 | |
483 | LONGEST | |
5ebd2499 | 484 | read_signed_register (int regnum) |
173155e8 | 485 | { |
61a0eb5b AC |
486 | void *buf = alloca (REGISTER_RAW_SIZE (regnum)); |
487 | read_register_gen (regnum, buf); | |
488 | return (extract_signed_integer (buf, REGISTER_RAW_SIZE (regnum))); | |
173155e8 AC |
489 | } |
490 | ||
491 | LONGEST | |
39f77062 | 492 | read_signed_register_pid (int regnum, ptid_t ptid) |
173155e8 | 493 | { |
39f77062 | 494 | ptid_t save_ptid; |
173155e8 AC |
495 | LONGEST retval; |
496 | ||
39f77062 | 497 | if (ptid_equal (ptid, inferior_ptid)) |
5ebd2499 | 498 | return read_signed_register (regnum); |
173155e8 | 499 | |
39f77062 | 500 | save_ptid = inferior_ptid; |
173155e8 | 501 | |
39f77062 | 502 | inferior_ptid = ptid; |
173155e8 | 503 | |
5ebd2499 | 504 | retval = read_signed_register (regnum); |
173155e8 | 505 | |
39f77062 | 506 | inferior_ptid = save_ptid; |
173155e8 AC |
507 | |
508 | return retval; | |
509 | } | |
510 | ||
5ebd2499 | 511 | /* Store VALUE into the raw contents of register number REGNUM. */ |
32178cab MS |
512 | |
513 | void | |
5ebd2499 | 514 | write_register (int regnum, LONGEST val) |
32178cab | 515 | { |
61a0eb5b | 516 | void *buf; |
32178cab | 517 | int size; |
5ebd2499 | 518 | size = REGISTER_RAW_SIZE (regnum); |
32178cab MS |
519 | buf = alloca (size); |
520 | store_signed_integer (buf, size, (LONGEST) val); | |
61a0eb5b | 521 | write_register_gen (regnum, buf); |
32178cab MS |
522 | } |
523 | ||
524 | void | |
39f77062 | 525 | write_register_pid (int regnum, CORE_ADDR val, ptid_t ptid) |
32178cab | 526 | { |
39f77062 | 527 | ptid_t save_ptid; |
32178cab | 528 | |
39f77062 | 529 | if (ptid_equal (ptid, inferior_ptid)) |
32178cab | 530 | { |
5ebd2499 | 531 | write_register (regnum, val); |
32178cab MS |
532 | return; |
533 | } | |
534 | ||
39f77062 | 535 | save_ptid = inferior_ptid; |
32178cab | 536 | |
39f77062 | 537 | inferior_ptid = ptid; |
32178cab | 538 | |
5ebd2499 | 539 | write_register (regnum, val); |
32178cab | 540 | |
39f77062 | 541 | inferior_ptid = save_ptid; |
32178cab MS |
542 | } |
543 | ||
544 | /* SUPPLY_REGISTER() | |
545 | ||
5ebd2499 | 546 | Record that register REGNUM contains VAL. This is used when the |
32178cab MS |
547 | value is obtained from the inferior or core dump, so there is no |
548 | need to store the value there. | |
549 | ||
550 | If VAL is a NULL pointer, then it's probably an unsupported register. | |
5ebd2499 | 551 | We just set its value to all zeros. We might want to record this |
32178cab MS |
552 | fact, and report it to the users of read_register and friends. */ |
553 | ||
554 | void | |
5ebd2499 | 555 | supply_register (int regnum, char *val) |
32178cab MS |
556 | { |
557 | #if 1 | |
39f77062 | 558 | if (! ptid_equal (registers_ptid, inferior_ptid)) |
32178cab MS |
559 | { |
560 | registers_changed (); | |
39f77062 | 561 | registers_ptid = inferior_ptid; |
32178cab MS |
562 | } |
563 | #endif | |
564 | ||
7302a204 | 565 | set_register_cached (regnum, 1); |
32178cab | 566 | if (val) |
7302a204 | 567 | memcpy (register_buffer (regnum), val, |
5ebd2499 | 568 | REGISTER_RAW_SIZE (regnum)); |
32178cab | 569 | else |
7302a204 | 570 | memset (register_buffer (regnum), '\000', |
5ebd2499 | 571 | REGISTER_RAW_SIZE (regnum)); |
32178cab MS |
572 | |
573 | /* On some architectures, e.g. HPPA, there are a few stray bits in | |
574 | some registers, that the rest of the code would like to ignore. */ | |
575 | ||
61a0eb5b AC |
576 | /* NOTE: cagney/2001-03-16: The macro CLEAN_UP_REGISTER_VALUE is |
577 | going to be deprecated. Instead architectures will leave the raw | |
578 | register value as is and instead clean things up as they pass | |
579 | through the method gdbarch_register_read() clean up the | |
580 | values. */ | |
581 | ||
4ee3352d AC |
582 | #ifdef DEPRECATED_CLEAN_UP_REGISTER_VALUE |
583 | DEPRECATED_CLEAN_UP_REGISTER_VALUE (regnum, register_buffer (regnum)); | |
32178cab MS |
584 | #endif |
585 | } | |
586 | ||
193cb69f AC |
587 | void |
588 | regcache_collect (int regnum, void *buf) | |
589 | { | |
590 | memcpy (buf, register_buffer (regnum), REGISTER_RAW_SIZE (regnum)); | |
591 | } | |
592 | ||
593 | ||
8227c0ff AC |
594 | /* read_pc, write_pc, read_sp, write_sp, read_fp, etc. Special |
595 | handling for registers PC, SP, and FP. */ | |
32178cab | 596 | |
4e052eda AC |
597 | /* NOTE: cagney/2001-02-18: The functions generic_target_read_pc(), |
598 | read_pc_pid(), read_pc(), generic_target_write_pc(), | |
599 | write_pc_pid(), write_pc(), generic_target_read_sp(), read_sp(), | |
8227c0ff AC |
600 | generic_target_write_sp(), write_sp(), generic_target_read_fp() and |
601 | read_fp(), will eventually be moved out of the reg-cache into | |
602 | either frame.[hc] or to the multi-arch framework. The are not part | |
603 | of the raw register cache. */ | |
4e052eda | 604 | |
32178cab MS |
605 | /* This routine is getting awfully cluttered with #if's. It's probably |
606 | time to turn this into READ_PC and define it in the tm.h file. | |
607 | Ditto for write_pc. | |
608 | ||
609 | 1999-06-08: The following were re-written so that it assumes the | |
8e1a459b | 610 | existence of a TARGET_READ_PC et.al. macro. A default generic |
32178cab MS |
611 | version of that macro is made available where needed. |
612 | ||
613 | Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled | |
614 | by the multi-arch framework, it will eventually be possible to | |
615 | eliminate the intermediate read_pc_pid(). The client would call | |
616 | TARGET_READ_PC directly. (cagney). */ | |
617 | ||
32178cab | 618 | CORE_ADDR |
39f77062 | 619 | generic_target_read_pc (ptid_t ptid) |
32178cab MS |
620 | { |
621 | #ifdef PC_REGNUM | |
622 | if (PC_REGNUM >= 0) | |
623 | { | |
39f77062 | 624 | CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, ptid)); |
32178cab MS |
625 | return pc_val; |
626 | } | |
627 | #endif | |
8e65ff28 AC |
628 | internal_error (__FILE__, __LINE__, |
629 | "generic_target_read_pc"); | |
32178cab MS |
630 | return 0; |
631 | } | |
632 | ||
633 | CORE_ADDR | |
39f77062 | 634 | read_pc_pid (ptid_t ptid) |
32178cab | 635 | { |
39f77062 | 636 | ptid_t saved_inferior_ptid; |
32178cab MS |
637 | CORE_ADDR pc_val; |
638 | ||
39f77062 KB |
639 | /* In case ptid != inferior_ptid. */ |
640 | saved_inferior_ptid = inferior_ptid; | |
641 | inferior_ptid = ptid; | |
32178cab | 642 | |
39f77062 | 643 | pc_val = TARGET_READ_PC (ptid); |
32178cab | 644 | |
39f77062 | 645 | inferior_ptid = saved_inferior_ptid; |
32178cab MS |
646 | return pc_val; |
647 | } | |
648 | ||
649 | CORE_ADDR | |
650 | read_pc (void) | |
651 | { | |
39f77062 | 652 | return read_pc_pid (inferior_ptid); |
32178cab MS |
653 | } |
654 | ||
32178cab | 655 | void |
39f77062 | 656 | generic_target_write_pc (CORE_ADDR pc, ptid_t ptid) |
32178cab MS |
657 | { |
658 | #ifdef PC_REGNUM | |
659 | if (PC_REGNUM >= 0) | |
39f77062 | 660 | write_register_pid (PC_REGNUM, pc, ptid); |
32178cab | 661 | if (NPC_REGNUM >= 0) |
39f77062 | 662 | write_register_pid (NPC_REGNUM, pc + 4, ptid); |
32178cab | 663 | #else |
8e65ff28 AC |
664 | internal_error (__FILE__, __LINE__, |
665 | "generic_target_write_pc"); | |
32178cab MS |
666 | #endif |
667 | } | |
668 | ||
669 | void | |
39f77062 | 670 | write_pc_pid (CORE_ADDR pc, ptid_t ptid) |
32178cab | 671 | { |
39f77062 | 672 | ptid_t saved_inferior_ptid; |
32178cab | 673 | |
39f77062 KB |
674 | /* In case ptid != inferior_ptid. */ |
675 | saved_inferior_ptid = inferior_ptid; | |
676 | inferior_ptid = ptid; | |
32178cab | 677 | |
39f77062 | 678 | TARGET_WRITE_PC (pc, ptid); |
32178cab | 679 | |
39f77062 | 680 | inferior_ptid = saved_inferior_ptid; |
32178cab MS |
681 | } |
682 | ||
683 | void | |
684 | write_pc (CORE_ADDR pc) | |
685 | { | |
39f77062 | 686 | write_pc_pid (pc, inferior_ptid); |
32178cab MS |
687 | } |
688 | ||
689 | /* Cope with strage ways of getting to the stack and frame pointers */ | |
690 | ||
32178cab MS |
691 | CORE_ADDR |
692 | generic_target_read_sp (void) | |
693 | { | |
694 | #ifdef SP_REGNUM | |
695 | if (SP_REGNUM >= 0) | |
696 | return read_register (SP_REGNUM); | |
697 | #endif | |
8e65ff28 AC |
698 | internal_error (__FILE__, __LINE__, |
699 | "generic_target_read_sp"); | |
32178cab MS |
700 | } |
701 | ||
702 | CORE_ADDR | |
703 | read_sp (void) | |
704 | { | |
705 | return TARGET_READ_SP (); | |
706 | } | |
707 | ||
32178cab MS |
708 | void |
709 | generic_target_write_sp (CORE_ADDR val) | |
710 | { | |
711 | #ifdef SP_REGNUM | |
712 | if (SP_REGNUM >= 0) | |
713 | { | |
714 | write_register (SP_REGNUM, val); | |
715 | return; | |
716 | } | |
717 | #endif | |
8e65ff28 AC |
718 | internal_error (__FILE__, __LINE__, |
719 | "generic_target_write_sp"); | |
32178cab MS |
720 | } |
721 | ||
722 | void | |
723 | write_sp (CORE_ADDR val) | |
724 | { | |
725 | TARGET_WRITE_SP (val); | |
726 | } | |
727 | ||
32178cab MS |
728 | CORE_ADDR |
729 | generic_target_read_fp (void) | |
730 | { | |
731 | #ifdef FP_REGNUM | |
732 | if (FP_REGNUM >= 0) | |
733 | return read_register (FP_REGNUM); | |
734 | #endif | |
8e65ff28 AC |
735 | internal_error (__FILE__, __LINE__, |
736 | "generic_target_read_fp"); | |
32178cab MS |
737 | } |
738 | ||
739 | CORE_ADDR | |
740 | read_fp (void) | |
741 | { | |
742 | return TARGET_READ_FP (); | |
743 | } | |
744 | ||
705152c5 MS |
745 | /* ARGSUSED */ |
746 | static void | |
747 | reg_flush_command (char *command, int from_tty) | |
748 | { | |
749 | /* Force-flush the register cache. */ | |
750 | registers_changed (); | |
751 | if (from_tty) | |
752 | printf_filtered ("Register cache flushed.\n"); | |
753 | } | |
754 | ||
32178cab MS |
755 | static void |
756 | build_regcache (void) | |
757 | { | |
31e9866e AC |
758 | int i; |
759 | int sizeof_register_valid; | |
760 | /* Come up with the real size of the registers buffer. */ | |
761 | int sizeof_registers = REGISTER_BYTES; /* OK use. */ | |
762 | for (i = 0; i < NUM_REGS + NUM_PSEUDO_REGS; i++) | |
763 | { | |
764 | long regend; | |
765 | /* Keep extending the buffer so that there is always enough | |
766 | space for all registers. The comparison is necessary since | |
767 | legacy code is free to put registers in random places in the | |
768 | buffer separated by holes. Once REGISTER_BYTE() is killed | |
769 | this can be greatly simplified. */ | |
770 | /* FIXME: cagney/2001-12-04: This code shouldn't need to use | |
771 | REGISTER_BYTE(). Unfortunatly, legacy code likes to lay the | |
772 | buffer out so that certain registers just happen to overlap. | |
773 | Ulgh! New targets use gdbarch's register read/write and | |
774 | entirely avoid this uglyness. */ | |
775 | regend = REGISTER_BYTE (i) + REGISTER_RAW_SIZE (i); | |
776 | if (sizeof_registers < regend) | |
777 | sizeof_registers = regend; | |
778 | } | |
32178cab | 779 | registers = xmalloc (sizeof_registers); |
31e9866e AC |
780 | sizeof_register_valid = ((NUM_REGS + NUM_PSEUDO_REGS) |
781 | * sizeof (*register_valid)); | |
32178cab MS |
782 | register_valid = xmalloc (sizeof_register_valid); |
783 | memset (register_valid, 0, sizeof_register_valid); | |
784 | } | |
785 | ||
786 | void | |
787 | _initialize_regcache (void) | |
788 | { | |
32178cab MS |
789 | register_gdbarch_swap (®isters, sizeof (registers), NULL); |
790 | register_gdbarch_swap (®ister_valid, sizeof (register_valid), NULL); | |
791 | register_gdbarch_swap (NULL, 0, build_regcache); | |
705152c5 MS |
792 | |
793 | add_com ("flushregs", class_maintenance, reg_flush_command, | |
794 | "Force gdb to flush its register cache (maintainer command)"); | |
39f77062 KB |
795 | |
796 | /* Initialize the thread/process associated with the current set of | |
797 | registers. For now, -1 is special, and means `no current process'. */ | |
798 | registers_ptid = pid_to_ptid (-1); | |
32178cab | 799 | } |