2000-10-19 Josef Ezra <jezra@emc.com>
[deliverable/binutils-gdb.git] / gdb / regcache.c
CommitLineData
32178cab
MS
1/* Cache and manage the values of registers for GDB, the GNU debugger.
2 Copyright 1986, 87, 89, 91, 94, 95, 96, 1998, 2000
3 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
21
22#include "defs.h"
23#include "frame.h"
24#include "inferior.h"
25#include "target.h"
26#include "gdbarch.h"
705152c5 27#include "gdbcmd.h"
32178cab
MS
28
29/*
30 * DATA STRUCTURE
31 *
32 * Here is the actual register cache.
33 */
34
35/* NOTE: this is a write-back cache. There is no "dirty" bit for
36 recording if the register values have been changed (eg. by the
37 user). Therefore all registers must be written back to the
38 target when appropriate. */
39
40/* REGISTERS contains the cached register values (in target byte order). */
41
42char *registers;
43
44/* REGISTER_VALID is 0 if the register needs to be fetched,
45 1 if it has been fetched, and
46 -1 if the register value was not available.
47 "Not available" means don't try to fetch it again. */
48
49signed char *register_valid;
50
51/* The thread/process associated with the current set of registers.
52 For now, -1 is special, and means `no current process'. */
53
54static int registers_pid = -1;
55
56/*
57 * FUNCTIONS:
58 */
59
60/* REGISTER_CACHED()
61
62 Returns 0 if the value is not in the cache (needs fetch).
63 >0 if the value is in the cache.
64 <0 if the value is permanently unavailable (don't ask again). */
65
66int
67register_cached (int regnum)
68{
69 return register_valid[regnum];
70}
71
2dc4e391
DT
72/* REGISTER_CHANGED
73
74 invalidate a single register REGNUM in the cache */
75void
76register_changed (int regnum)
77{
78 register_valid[regnum] = 0;
79}
80
32178cab
MS
81/* FIND_SAVED_REGISTER ()
82
83 Return the address in which frame FRAME's value of register REGNUM
84 has been saved in memory. Or return zero if it has not been saved.
85 If REGNUM specifies the SP, the value we return is actually
86 the SP value, not an address where it was saved. */
87
88CORE_ADDR
89find_saved_register (struct frame_info *frame, int regnum)
90{
91 register struct frame_info *frame1 = NULL;
92 register CORE_ADDR addr = 0;
93
94 if (frame == NULL) /* No regs saved if want current frame */
95 return 0;
96
97#ifdef HAVE_REGISTER_WINDOWS
98 /* We assume that a register in a register window will only be saved
99 in one place (since the name changes and/or disappears as you go
100 towards inner frames), so we only call get_frame_saved_regs on
101 the current frame. This is directly in contradiction to the
102 usage below, which assumes that registers used in a frame must be
103 saved in a lower (more interior) frame. This change is a result
104 of working on a register window machine; get_frame_saved_regs
105 always returns the registers saved within a frame, within the
106 context (register namespace) of that frame. */
107
108 /* However, note that we don't want this to return anything if
109 nothing is saved (if there's a frame inside of this one). Also,
110 callers to this routine asking for the stack pointer want the
111 stack pointer saved for *this* frame; this is returned from the
112 next frame. */
113
114 if (REGISTER_IN_WINDOW_P (regnum))
115 {
116 frame1 = get_next_frame (frame);
117 if (!frame1)
118 return 0; /* Registers of this frame are active. */
119
120 /* Get the SP from the next frame in; it will be this
121 current frame. */
122 if (regnum != SP_REGNUM)
123 frame1 = frame;
124
125 FRAME_INIT_SAVED_REGS (frame1);
126 return frame1->saved_regs[regnum]; /* ... which might be zero */
127 }
128#endif /* HAVE_REGISTER_WINDOWS */
129
130 /* Note that this next routine assumes that registers used in
131 frame x will be saved only in the frame that x calls and
132 frames interior to it. This is not true on the sparc, but the
133 above macro takes care of it, so we should be all right. */
134 while (1)
135 {
136 QUIT;
137 frame1 = get_prev_frame (frame1);
138 if (frame1 == 0 || frame1 == frame)
139 break;
140 FRAME_INIT_SAVED_REGS (frame1);
141 if (frame1->saved_regs[regnum])
142 addr = frame1->saved_regs[regnum];
143 }
144
145 return addr;
146}
147
148/* DEFAULT_GET_SAVED_REGISTER ()
149
150 Find register number REGNUM relative to FRAME and put its (raw,
151 target format) contents in *RAW_BUFFER. Set *OPTIMIZED if the
152 variable was optimized out (and thus can't be fetched). Set *LVAL
153 to lval_memory, lval_register, or not_lval, depending on whether
154 the value was fetched from memory, from a register, or in a strange
155 and non-modifiable way (e.g. a frame pointer which was calculated
156 rather than fetched). Set *ADDRP to the address, either in memory
157 on as a REGISTER_BYTE offset into the registers array.
158
159 Note that this implementation never sets *LVAL to not_lval. But
160 it can be replaced by defining GET_SAVED_REGISTER and supplying
161 your own.
162
163 The argument RAW_BUFFER must point to aligned memory. */
164
165static void
166default_get_saved_register (char *raw_buffer,
167 int *optimized,
168 CORE_ADDR *addrp,
169 struct frame_info *frame,
170 int regnum,
171 enum lval_type *lval)
172{
173 CORE_ADDR addr;
174
175 if (!target_has_registers)
176 error ("No registers.");
177
178 /* Normal systems don't optimize out things with register numbers. */
179 if (optimized != NULL)
180 *optimized = 0;
181 addr = find_saved_register (frame, regnum);
182 if (addr != 0)
183 {
184 if (lval != NULL)
185 *lval = lval_memory;
186 if (regnum == SP_REGNUM)
187 {
188 if (raw_buffer != NULL)
189 {
190 /* Put it back in target format. */
191 store_address (raw_buffer, REGISTER_RAW_SIZE (regnum),
192 (LONGEST) addr);
193 }
194 if (addrp != NULL)
195 *addrp = 0;
196 return;
197 }
198 if (raw_buffer != NULL)
199 target_read_memory (addr, raw_buffer, REGISTER_RAW_SIZE (regnum));
200 }
201 else
202 {
203 if (lval != NULL)
204 *lval = lval_register;
205 addr = REGISTER_BYTE (regnum);
206 if (raw_buffer != NULL)
207 read_register_gen (regnum, raw_buffer);
208 }
209 if (addrp != NULL)
210 *addrp = addr;
211}
212
f3d21924
AC
213#if !defined (GET_SAVED_REGISTER)
214#define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
215 default_get_saved_register(raw_buffer, optimized, addrp, frame, regnum, lval)
216#endif
217
32178cab
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218void
219get_saved_register (char *raw_buffer,
220 int *optimized,
221 CORE_ADDR *addrp,
222 struct frame_info *frame,
223 int regnum,
224 enum lval_type *lval)
225{
226 GET_SAVED_REGISTER (raw_buffer, optimized, addrp, frame, regnum, lval);
227}
228
229/* READ_RELATIVE_REGISTER_RAW_BYTES_FOR_FRAME
230
231 Copy the bytes of register REGNUM, relative to the input stack frame,
232 into our memory at MYADDR, in target byte order.
233 The number of bytes copied is REGISTER_RAW_SIZE (REGNUM).
234
235 Returns 1 if could not be read, 0 if could. */
236
237/* FIXME: This function increases the confusion between FP_REGNUM
238 and the virtual/pseudo-frame pointer. */
239
240static int
241read_relative_register_raw_bytes_for_frame (int regnum,
242 char *myaddr,
243 struct frame_info *frame)
244{
245 int optim;
246 if (regnum == FP_REGNUM && frame)
247 {
248 /* Put it back in target format. */
249 store_address (myaddr, REGISTER_RAW_SIZE (FP_REGNUM),
250 (LONGEST) FRAME_FP (frame));
251
252 return 0;
253 }
254
255 get_saved_register (myaddr, &optim, (CORE_ADDR *) NULL, frame,
256 regnum, (enum lval_type *) NULL);
257
258 if (register_valid[regnum] < 0)
259 return 1; /* register value not available */
260
261 return optim;
262}
263
264/* READ_RELATIVE_REGISTER_RAW_BYTES
265
266 Copy the bytes of register REGNUM, relative to the current stack
267 frame, into our memory at MYADDR, in target byte order.
268 The number of bytes copied is REGISTER_RAW_SIZE (REGNUM).
269
270 Returns 1 if could not be read, 0 if could. */
271
272int
273read_relative_register_raw_bytes (int regnum, char *myaddr)
274{
275 return read_relative_register_raw_bytes_for_frame (regnum, myaddr,
276 selected_frame);
277}
278
279
280/* Low level examining and depositing of registers.
281
282 The caller is responsible for making sure that the inferior is
283 stopped before calling the fetching routines, or it will get
284 garbage. (a change from GDB version 3, in which the caller got the
285 value from the last stop). */
286
287/* REGISTERS_CHANGED ()
288
289 Indicate that registers may have changed, so invalidate the cache. */
290
291void
292registers_changed (void)
293{
294 int i;
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295
296 registers_pid = -1;
297
298 /* Force cleanup of any alloca areas if using C alloca instead of
299 a builtin alloca. This particular call is used to clean up
300 areas allocated by low level target code which may build up
301 during lengthy interactions between gdb and the target before
302 gdb gives control to the user (ie watchpoints). */
303 alloca (0);
304
fcdc5976
MS
305 for (i = 0; i < ARCH_NUM_REGS; i++)
306 register_valid[i] = 0;
307
308 /* Assume that if all the hardware regs have changed,
309 then so have the pseudo-registers. */
310 for (i = NUM_REGS; i < NUM_REGS + NUM_PSEUDO_REGS; i++)
32178cab
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311 register_valid[i] = 0;
312
313 if (registers_changed_hook)
314 registers_changed_hook ();
315}
316
317/* REGISTERS_FETCHED ()
318
319 Indicate that all registers have been fetched, so mark them all valid. */
320
321
322void
323registers_fetched (void)
324{
325 int i;
32178cab 326
fcdc5976 327 for (i = 0; i < ARCH_NUM_REGS; i++)
32178cab 328 register_valid[i] = 1;
fcdc5976
MS
329 /* Do not assume that the pseudo-regs have also been fetched.
330 Fetching all real regs might not account for all pseudo-regs. */
32178cab
MS
331}
332
333/* read_register_bytes and write_register_bytes are generally a *BAD*
334 idea. They are inefficient because they need to check for partial
335 updates, which can only be done by scanning through all of the
336 registers and seeing if the bytes that are being read/written fall
337 inside of an invalid register. [The main reason this is necessary
338 is that register sizes can vary, so a simple index won't suffice.]
339 It is far better to call read_register_gen and write_register_gen
340 if you want to get at the raw register contents, as it only takes a
341 regno as an argument, and therefore can't do a partial register
342 update.
343
344 Prior to the recent fixes to check for partial updates, both read
345 and write_register_bytes always checked to see if any registers
346 were stale, and then called target_fetch_registers (-1) to update
347 the whole set. This caused really slowed things down for remote
348 targets. */
349
350/* Copy INLEN bytes of consecutive data from registers
351 starting with the INREGBYTE'th byte of register data
352 into memory at MYADDR. */
353
354void
355read_register_bytes (int inregbyte, char *myaddr, int inlen)
356{
357 int inregend = inregbyte + inlen;
358 int regno;
359
360 if (registers_pid != inferior_pid)
361 {
362 registers_changed ();
363 registers_pid = inferior_pid;
364 }
365
366 /* See if we are trying to read bytes from out-of-date registers. If so,
367 update just those registers. */
368
fcdc5976 369 for (regno = 0; regno < NUM_REGS + NUM_PSEUDO_REGS; regno++)
32178cab
MS
370 {
371 int regstart, regend;
372
373 if (register_valid[regno])
374 continue;
375
376 if (REGISTER_NAME (regno) == NULL || *REGISTER_NAME (regno) == '\0')
377 continue;
378
379 regstart = REGISTER_BYTE (regno);
380 regend = regstart + REGISTER_RAW_SIZE (regno);
381
382 if (regend <= inregbyte || inregend <= regstart)
383 /* The range the user wants to read doesn't overlap with regno. */
384 continue;
385
fcdc5976 386 /* We've found an uncached register where at least one byte will be read.
32178cab 387 Update it from the target. */
fcdc5976
MS
388 if (regno < NUM_REGS)
389 target_fetch_registers (regno);
f4160335 390 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 391 FETCH_PSEUDO_REGISTER (regno);
32178cab
MS
392
393 if (!register_valid[regno])
394 error ("read_register_bytes: Couldn't update register %d.", regno);
395 }
396
397 if (myaddr != NULL)
398 memcpy (myaddr, &registers[inregbyte], inlen);
399}
400
401/* Read register REGNO into memory at MYADDR, which must be large
402 enough for REGISTER_RAW_BYTES (REGNO). Target byte-order. If the
403 register is known to be the size of a CORE_ADDR or smaller,
404 read_register can be used instead. */
405
406void
407read_register_gen (int regno, char *myaddr)
408{
409 if (registers_pid != inferior_pid)
410 {
411 registers_changed ();
412 registers_pid = inferior_pid;
413 }
414
415 if (!register_valid[regno])
fcdc5976
MS
416 {
417 if (regno < NUM_REGS)
418 target_fetch_registers (regno);
419 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 420 FETCH_PSEUDO_REGISTER (regno);
fcdc5976 421 }
32178cab
MS
422 memcpy (myaddr, &registers[REGISTER_BYTE (regno)],
423 REGISTER_RAW_SIZE (regno));
424}
425
426/* Write register REGNO at MYADDR to the target. MYADDR points at
427 REGISTER_RAW_BYTES(REGNO), which must be in target byte-order. */
428
429/* Registers we shouldn't try to store. */
430#if !defined (CANNOT_STORE_REGISTER)
431#define CANNOT_STORE_REGISTER(regno) 0
432#endif
433
434void
435write_register_gen (int regno, char *myaddr)
436{
437 int size;
438
439 /* On the sparc, writing %g0 is a no-op, so we don't even want to
440 change the registers array if something writes to this register. */
441 if (CANNOT_STORE_REGISTER (regno))
442 return;
443
444 if (registers_pid != inferior_pid)
445 {
446 registers_changed ();
447 registers_pid = inferior_pid;
448 }
449
450 size = REGISTER_RAW_SIZE (regno);
451
452 /* If we have a valid copy of the register, and new value == old value,
453 then don't bother doing the actual store. */
454
455 if (register_valid[regno]
456 && memcmp (&registers[REGISTER_BYTE (regno)], myaddr, size) == 0)
457 return;
458
fcdc5976
MS
459 if (regno < NUM_REGS)
460 target_prepare_to_store ();
32178cab
MS
461
462 memcpy (&registers[REGISTER_BYTE (regno)], myaddr, size);
463
464 register_valid[regno] = 1;
465
fcdc5976
MS
466 if (regno < NUM_REGS)
467 target_store_registers (regno);
468 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 469 STORE_PSEUDO_REGISTER (regno);
32178cab
MS
470}
471
472/* Copy INLEN bytes of consecutive data from memory at MYADDR
473 into registers starting with the MYREGSTART'th byte of register data. */
474
475void
476write_register_bytes (int myregstart, char *myaddr, int inlen)
477{
478 int myregend = myregstart + inlen;
479 int regno;
480
481 target_prepare_to_store ();
482
483 /* Scan through the registers updating any that are covered by the
484 range myregstart<=>myregend using write_register_gen, which does
485 nice things like handling threads, and avoiding updates when the
486 new and old contents are the same. */
487
fcdc5976 488 for (regno = 0; regno < NUM_REGS + NUM_PSEUDO_REGS; regno++)
32178cab
MS
489 {
490 int regstart, regend;
491
492 regstart = REGISTER_BYTE (regno);
493 regend = regstart + REGISTER_RAW_SIZE (regno);
494
495 /* Is this register completely outside the range the user is writing? */
496 if (myregend <= regstart || regend <= myregstart)
497 /* do nothing */ ;
498
499 /* Is this register completely within the range the user is writing? */
500 else if (myregstart <= regstart && regend <= myregend)
501 write_register_gen (regno, myaddr + (regstart - myregstart));
502
503 /* The register partially overlaps the range being written. */
504 else
505 {
506 char regbuf[MAX_REGISTER_RAW_SIZE];
507 /* What's the overlap between this register's bytes and
508 those the caller wants to write? */
509 int overlapstart = max (regstart, myregstart);
510 int overlapend = min (regend, myregend);
511
512 /* We may be doing a partial update of an invalid register.
513 Update it from the target before scribbling on it. */
514 read_register_gen (regno, regbuf);
515
516 memcpy (registers + overlapstart,
517 myaddr + (overlapstart - myregstart),
518 overlapend - overlapstart);
519
fcdc5976
MS
520 if (regno < NUM_REGS)
521 target_store_registers (regno);
522 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 523 STORE_PSEUDO_REGISTER (regno);
32178cab
MS
524 }
525 }
526}
527
528
529/* Return the raw contents of register REGNO, regarding it as an
173155e8 530 UNSIGNED integer. */
32178cab 531
173155e8 532ULONGEST
32178cab
MS
533read_register (int regno)
534{
535 if (registers_pid != inferior_pid)
536 {
537 registers_changed ();
538 registers_pid = inferior_pid;
539 }
540
541 if (!register_valid[regno])
fcdc5976
MS
542 {
543 if (regno < NUM_REGS)
544 target_fetch_registers (regno);
f4160335 545 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 546 FETCH_PSEUDO_REGISTER (regno);
fcdc5976 547 }
32178cab 548
173155e8 549 return (extract_unsigned_integer (&registers[REGISTER_BYTE (regno)],
32178cab
MS
550 REGISTER_RAW_SIZE (regno)));
551}
552
173155e8 553ULONGEST
32178cab
MS
554read_register_pid (int regno, int pid)
555{
556 int save_pid;
557 CORE_ADDR retval;
558
559 if (pid == inferior_pid)
560 return read_register (regno);
561
562 save_pid = inferior_pid;
563
564 inferior_pid = pid;
565
566 retval = read_register (regno);
567
568 inferior_pid = save_pid;
569
570 return retval;
571}
572
173155e8
AC
573/* Return the raw contents of register REGNO, regarding it a SIGNED
574 integer. */
575
576LONGEST
577read_signed_register (int regno)
578{
579 if (registers_pid != inferior_pid)
580 {
581 registers_changed ();
582 registers_pid = inferior_pid;
583 }
584
585 if (!register_valid[regno])
586 target_fetch_registers (regno);
587
588 return (extract_signed_integer (&registers[REGISTER_BYTE (regno)],
589 REGISTER_RAW_SIZE (regno)));
590}
591
592LONGEST
593read_signed_register_pid (int regno, int pid)
594{
595 int save_pid;
596 LONGEST retval;
597
598 if (pid == inferior_pid)
599 return read_signed_register (regno);
600
601 save_pid = inferior_pid;
602
603 inferior_pid = pid;
604
605 retval = read_signed_register (regno);
606
607 inferior_pid = save_pid;
608
609 return retval;
610}
611
32178cab
MS
612/* Store VALUE, into the raw contents of register number REGNO. */
613
614void
615write_register (int regno, LONGEST val)
616{
617 PTR buf;
618 int size;
619
620 /* On the sparc, writing %g0 is a no-op, so we don't even want to
621 change the registers array if something writes to this register. */
622 if (CANNOT_STORE_REGISTER (regno))
623 return;
624
625 if (registers_pid != inferior_pid)
626 {
627 registers_changed ();
628 registers_pid = inferior_pid;
629 }
630
631 size = REGISTER_RAW_SIZE (regno);
632 buf = alloca (size);
633 store_signed_integer (buf, size, (LONGEST) val);
634
635 /* If we have a valid copy of the register, and new value == old value,
636 then don't bother doing the actual store. */
637
638 if (register_valid[regno]
639 && memcmp (&registers[REGISTER_BYTE (regno)], buf, size) == 0)
640 return;
641
fcdc5976
MS
642 if (regno < NUM_REGS)
643 target_prepare_to_store ();
32178cab
MS
644
645 memcpy (&registers[REGISTER_BYTE (regno)], buf, size);
646
647 register_valid[regno] = 1;
648
fcdc5976
MS
649 if (regno < NUM_REGS)
650 target_store_registers (regno);
651 else if (regno < NUM_REGS + NUM_PSEUDO_REGS)
7ec7e389 652 STORE_PSEUDO_REGISTER (regno);
32178cab
MS
653}
654
655void
656write_register_pid (int regno, CORE_ADDR val, int pid)
657{
658 int save_pid;
659
660 if (pid == inferior_pid)
661 {
662 write_register (regno, val);
663 return;
664 }
665
666 save_pid = inferior_pid;
667
668 inferior_pid = pid;
669
670 write_register (regno, val);
671
672 inferior_pid = save_pid;
673}
674
675/* SUPPLY_REGISTER()
676
677 Record that register REGNO contains VAL. This is used when the
678 value is obtained from the inferior or core dump, so there is no
679 need to store the value there.
680
681 If VAL is a NULL pointer, then it's probably an unsupported register.
682 We just set it's value to all zeros. We might want to record this
683 fact, and report it to the users of read_register and friends. */
684
685void
686supply_register (int regno, char *val)
687{
688#if 1
689 if (registers_pid != inferior_pid)
690 {
691 registers_changed ();
692 registers_pid = inferior_pid;
693 }
694#endif
695
696 register_valid[regno] = 1;
697 if (val)
698 memcpy (&registers[REGISTER_BYTE (regno)], val,
699 REGISTER_RAW_SIZE (regno));
700 else
701 memset (&registers[REGISTER_BYTE (regno)], '\000',
702 REGISTER_RAW_SIZE (regno));
703
704 /* On some architectures, e.g. HPPA, there are a few stray bits in
705 some registers, that the rest of the code would like to ignore. */
706
707#ifdef CLEAN_UP_REGISTER_VALUE
708 CLEAN_UP_REGISTER_VALUE (regno, &registers[REGISTER_BYTE (regno)]);
709#endif
710}
711
712/* read_pc, write_pc, read_sp, write_sp, read_fp, write_fp, etc.
713 Special handling for registers PC, SP, and FP. */
714
715/* This routine is getting awfully cluttered with #if's. It's probably
716 time to turn this into READ_PC and define it in the tm.h file.
717 Ditto for write_pc.
718
719 1999-06-08: The following were re-written so that it assumes the
720 existance of a TARGET_READ_PC et.al. macro. A default generic
721 version of that macro is made available where needed.
722
723 Since the ``TARGET_READ_PC'' et.al. macro is going to be controlled
724 by the multi-arch framework, it will eventually be possible to
725 eliminate the intermediate read_pc_pid(). The client would call
726 TARGET_READ_PC directly. (cagney). */
727
32178cab
MS
728CORE_ADDR
729generic_target_read_pc (int pid)
730{
731#ifdef PC_REGNUM
732 if (PC_REGNUM >= 0)
733 {
734 CORE_ADDR pc_val = ADDR_BITS_REMOVE ((CORE_ADDR) read_register_pid (PC_REGNUM, pid));
735 return pc_val;
736 }
737#endif
738 internal_error ("generic_target_read_pc");
739 return 0;
740}
741
742CORE_ADDR
743read_pc_pid (int pid)
744{
745 int saved_inferior_pid;
746 CORE_ADDR pc_val;
747
748 /* In case pid != inferior_pid. */
749 saved_inferior_pid = inferior_pid;
750 inferior_pid = pid;
751
752 pc_val = TARGET_READ_PC (pid);
753
754 inferior_pid = saved_inferior_pid;
755 return pc_val;
756}
757
758CORE_ADDR
759read_pc (void)
760{
761 return read_pc_pid (inferior_pid);
762}
763
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764void
765generic_target_write_pc (CORE_ADDR pc, int pid)
766{
767#ifdef PC_REGNUM
768 if (PC_REGNUM >= 0)
769 write_register_pid (PC_REGNUM, pc, pid);
770 if (NPC_REGNUM >= 0)
771 write_register_pid (NPC_REGNUM, pc + 4, pid);
772 if (NNPC_REGNUM >= 0)
773 write_register_pid (NNPC_REGNUM, pc + 8, pid);
774#else
775 internal_error ("generic_target_write_pc");
776#endif
777}
778
779void
780write_pc_pid (CORE_ADDR pc, int pid)
781{
782 int saved_inferior_pid;
783
784 /* In case pid != inferior_pid. */
785 saved_inferior_pid = inferior_pid;
786 inferior_pid = pid;
787
788 TARGET_WRITE_PC (pc, pid);
789
790 inferior_pid = saved_inferior_pid;
791}
792
793void
794write_pc (CORE_ADDR pc)
795{
796 write_pc_pid (pc, inferior_pid);
797}
798
799/* Cope with strage ways of getting to the stack and frame pointers */
800
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801CORE_ADDR
802generic_target_read_sp (void)
803{
804#ifdef SP_REGNUM
805 if (SP_REGNUM >= 0)
806 return read_register (SP_REGNUM);
807#endif
808 internal_error ("generic_target_read_sp");
809}
810
811CORE_ADDR
812read_sp (void)
813{
814 return TARGET_READ_SP ();
815}
816
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817void
818generic_target_write_sp (CORE_ADDR val)
819{
820#ifdef SP_REGNUM
821 if (SP_REGNUM >= 0)
822 {
823 write_register (SP_REGNUM, val);
824 return;
825 }
826#endif
827 internal_error ("generic_target_write_sp");
828}
829
830void
831write_sp (CORE_ADDR val)
832{
833 TARGET_WRITE_SP (val);
834}
835
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836CORE_ADDR
837generic_target_read_fp (void)
838{
839#ifdef FP_REGNUM
840 if (FP_REGNUM >= 0)
841 return read_register (FP_REGNUM);
842#endif
843 internal_error ("generic_target_read_fp");
844}
845
846CORE_ADDR
847read_fp (void)
848{
849 return TARGET_READ_FP ();
850}
851
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852void
853generic_target_write_fp (CORE_ADDR val)
854{
855#ifdef FP_REGNUM
856 if (FP_REGNUM >= 0)
857 {
858 write_register (FP_REGNUM, val);
859 return;
860 }
861#endif
862 internal_error ("generic_target_write_fp");
863}
864
865void
866write_fp (CORE_ADDR val)
867{
868 TARGET_WRITE_FP (val);
869}
870
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871/* ARGSUSED */
872static void
873reg_flush_command (char *command, int from_tty)
874{
875 /* Force-flush the register cache. */
876 registers_changed ();
877 if (from_tty)
878 printf_filtered ("Register cache flushed.\n");
879}
880
881
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882static void
883build_regcache (void)
884{
885 /* We allocate some extra slop since we do a lot of memcpy's around
886 `registers', and failing-soft is better than failing hard. */
887 int sizeof_registers = REGISTER_BYTES + /* SLOP */ 256;
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888 int sizeof_register_valid =
889 (NUM_REGS + NUM_PSEUDO_REGS) * sizeof (*register_valid);
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890 registers = xmalloc (sizeof_registers);
891 memset (registers, 0, sizeof_registers);
892 register_valid = xmalloc (sizeof_register_valid);
893 memset (register_valid, 0, sizeof_register_valid);
894}
895
896void
897_initialize_regcache (void)
898{
899 build_regcache ();
900
901 register_gdbarch_swap (&registers, sizeof (registers), NULL);
902 register_gdbarch_swap (&register_valid, sizeof (register_valid), NULL);
903 register_gdbarch_swap (NULL, 0, build_regcache);
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904
905 add_com ("flushregs", class_maintenance, reg_flush_command,
906 "Force gdb to flush its register cache (maintainer command)");
32178cab 907}
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