Commit | Line | Data |
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c906108c SS |
1 | /* sparc-dependent portions of the RPC protocol |
2 | used with a VxWorks target | |
3 | ||
c5aa993b | 4 | Contributed by Wind River Systems. |
c906108c | 5 | |
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | #include <stdio.h> | |
24 | #include "defs.h" | |
25 | ||
c5aa993b | 26 | #include "vx-share/regPacket.h" |
c906108c SS |
27 | #include "frame.h" |
28 | #include "inferior.h" | |
03f2053f | 29 | #include "gdb_wait.h" |
c906108c SS |
30 | #include "target.h" |
31 | #include "gdbcore.h" | |
32 | #include "command.h" | |
33 | #include "symtab.h" | |
34 | #include "symfile.h" /* for struct complaint */ | |
35 | ||
36 | #include "gdb_string.h" | |
37 | #include <errno.h> | |
38 | #include <signal.h> | |
39 | #include <fcntl.h> | |
40 | #include <sys/types.h> | |
41 | #include <sys/time.h> | |
42 | #include <sys/socket.h> | |
43 | ||
c5aa993b | 44 | #ifdef _AIX /* IBM claims "void *malloc()" not char * */ |
c906108c SS |
45 | #define malloc bogon_malloc |
46 | #endif | |
47 | ||
48 | #include <rpc/rpc.h> | |
49 | #include <sys/time.h> /* UTek's <rpc/rpc.h> doesn't #incl this */ | |
50 | #include <netdb.h> | |
51 | #include "vx-share/ptrace.h" | |
52 | #include "vx-share/xdr_ptrace.h" | |
53 | #include "vx-share/xdr_ld.h" | |
54 | #include "vx-share/xdr_rdb.h" | |
55 | #include "vx-share/dbgRpcLib.h" | |
56 | ||
57 | /* get rid of value.h if possible */ | |
58 | #include <value.h> | |
59 | #include <symtab.h> | |
60 | ||
61 | /* Flag set if target has fpu */ | |
62 | ||
63 | extern int target_has_fp; | |
64 | ||
65 | /* sparc floating point format descriptor, from "sparc-tdep.c." */ | |
66 | ||
67 | extern struct ext_format ext_format_sparc; | |
68 | ||
69 | /* Generic register read/write routines in remote-vx.c. */ | |
70 | ||
71 | extern void net_read_registers (); | |
72 | extern void net_write_registers (); | |
73 | ||
74 | /* Read a register or registers from the VxWorks target. | |
75 | REGNO is the register to read, or -1 for all; currently, | |
76 | it is ignored. FIXME look at regno to improve efficiency. */ | |
77 | ||
78 | void | |
fba45db2 | 79 | vx_read_register (int regno) |
c906108c SS |
80 | { |
81 | char sparc_greg_packet[SPARC_GREG_PLEN]; | |
82 | char sparc_fpreg_packet[SPARC_FPREG_PLEN]; | |
83 | CORE_ADDR sp; | |
84 | ||
85 | /* Get general-purpose registers. When copying values into | |
86 | registers [], don't assume that a location in registers [] | |
87 | is properly aligned for the target data type. */ | |
88 | ||
89 | net_read_registers (sparc_greg_packet, SPARC_GREG_PLEN, PTRACE_GETREGS); | |
90 | ||
91 | /* Now copy the register values into registers[]. | |
92 | Note that this code depends on the ordering of the REGNUMs | |
93 | as defined in "tm-sparc.h". */ | |
94 | ||
95 | bcopy (&sparc_greg_packet[SPARC_R_G0], | |
96 | ®isters[REGISTER_BYTE (G0_REGNUM)], 32 * SPARC_GREG_SIZE); | |
97 | bcopy (&sparc_greg_packet[SPARC_R_Y], | |
98 | ®isters[REGISTER_BYTE (Y_REGNUM)], 6 * SPARC_GREG_SIZE); | |
99 | ||
100 | /* Now write the local and in registers to the register window | |
101 | spill area in the frame. VxWorks does not do this for the | |
102 | active frame automatically; it greatly simplifies debugging | |
103 | (FRAME_FIND_SAVED_REGS, in particular, depends on this). */ | |
104 | ||
c5aa993b JM |
105 | sp = extract_address (®isters[REGISTER_BYTE (SP_REGNUM)], |
106 | REGISTER_RAW_SIZE (CORE_ADDR)); | |
c906108c SS |
107 | write_memory (sp, ®isters[REGISTER_BYTE (L0_REGNUM)], |
108 | 16 * REGISTER_RAW_SIZE (L0_REGNUM)); | |
109 | ||
110 | /* If the target has floating point registers, fetch them. | |
111 | Otherwise, zero the floating point register values in | |
112 | registers[] for good measure, even though we might not | |
113 | need to. */ | |
114 | ||
115 | if (target_has_fp) | |
116 | { | |
117 | net_read_registers (sparc_fpreg_packet, SPARC_FPREG_PLEN, | |
c5aa993b JM |
118 | PTRACE_GETFPREGS); |
119 | bcopy (&sparc_fpreg_packet[SPARC_R_FP0], | |
120 | ®isters[REGISTER_BYTE (FP0_REGNUM)], 32 * SPARC_FPREG_SIZE); | |
c906108c SS |
121 | bcopy (&sparc_fpreg_packet[SPARC_R_FSR], |
122 | ®isters[REGISTER_BYTE (FPS_REGNUM)], 1 * SPARC_FPREG_SIZE); | |
123 | } | |
124 | else | |
c5aa993b | 125 | { |
c906108c SS |
126 | bzero (®isters[REGISTER_BYTE (FP0_REGNUM)], 32 * SPARC_FPREG_SIZE); |
127 | bzero (®isters[REGISTER_BYTE (FPS_REGNUM)], 1 * SPARC_FPREG_SIZE); | |
128 | } | |
129 | ||
130 | /* Mark the register cache valid. */ | |
131 | ||
132 | registers_fetched (); | |
133 | } | |
134 | ||
135 | /* Store a register or registers into the VxWorks target. | |
136 | REGNO is the register to store, or -1 for all; currently, | |
137 | it is ignored. FIXME look at regno to improve efficiency. */ | |
138 | ||
139 | void | |
fba45db2 | 140 | vx_write_register (int regno) |
c906108c SS |
141 | { |
142 | char sparc_greg_packet[SPARC_GREG_PLEN]; | |
143 | char sparc_fpreg_packet[SPARC_FPREG_PLEN]; | |
144 | int in_gp_regs; | |
145 | int in_fp_regs; | |
146 | CORE_ADDR sp; | |
147 | ||
148 | /* Store general purpose registers. When copying values from | |
149 | registers [], don't assume that a location in registers [] | |
150 | is properly aligned for the target data type. */ | |
151 | ||
152 | in_gp_regs = 1; | |
153 | in_fp_regs = 1; | |
154 | if (regno >= 0) | |
155 | { | |
156 | if ((G0_REGNUM <= regno && regno <= I7_REGNUM) | |
c5aa993b | 157 | || (Y_REGNUM <= regno && regno <= NPC_REGNUM)) |
c906108c SS |
158 | in_fp_regs = 0; |
159 | else | |
160 | in_gp_regs = 0; | |
161 | } | |
162 | if (in_gp_regs) | |
163 | { | |
164 | bcopy (®isters[REGISTER_BYTE (G0_REGNUM)], | |
165 | &sparc_greg_packet[SPARC_R_G0], 32 * SPARC_GREG_SIZE); | |
166 | bcopy (®isters[REGISTER_BYTE (Y_REGNUM)], | |
167 | &sparc_greg_packet[SPARC_R_Y], 6 * SPARC_GREG_SIZE); | |
168 | ||
169 | net_write_registers (sparc_greg_packet, SPARC_GREG_PLEN, PTRACE_SETREGS); | |
170 | ||
171 | /* If this is a local or in register, or we're storing all | |
172 | registers, update the register window spill area. */ | |
173 | ||
174 | if (regno < 0 || (L0_REGNUM <= regno && regno <= I7_REGNUM)) | |
c5aa993b JM |
175 | { |
176 | sp = extract_address (®isters[REGISTER_BYTE (SP_REGNUM)], | |
177 | REGISTER_RAW_SIZE (CORE_ADDR)); | |
c906108c SS |
178 | write_memory (sp, ®isters[REGISTER_BYTE (L0_REGNUM)], |
179 | 16 * REGISTER_RAW_SIZE (L0_REGNUM)); | |
180 | } | |
181 | } | |
182 | ||
183 | /* Store floating point registers if the target has them. */ | |
184 | ||
185 | if (in_fp_regs && target_has_fp) | |
186 | { | |
c5aa993b | 187 | bcopy (®isters[REGISTER_BYTE (FP0_REGNUM)], |
c906108c | 188 | &sparc_fpreg_packet[SPARC_R_FP0], 32 * SPARC_FPREG_SIZE); |
c5aa993b | 189 | bcopy (®isters[REGISTER_BYTE (FPS_REGNUM)], |
c906108c SS |
190 | &sparc_fpreg_packet[SPARC_R_FSR], 1 * SPARC_FPREG_SIZE); |
191 | ||
192 | net_write_registers (sparc_fpreg_packet, SPARC_FPREG_PLEN, | |
c5aa993b | 193 | PTRACE_SETFPREGS); |
c906108c SS |
194 | } |
195 | } |