Commit | Line | Data |
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41abdfbd | 1 | /* Target-dependent code for GDB, the GNU debugger. |
07aa9fdc PS |
2 | Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994 |
3 | Free Software Foundation, Inc. | |
41abdfbd JG |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
20 | ||
41abdfbd | 21 | #include "defs.h" |
41abdfbd JG |
22 | #include "frame.h" |
23 | #include "inferior.h" | |
24 | #include "symtab.h" | |
25 | #include "target.h" | |
030fb5cb | 26 | #include "gdbcore.h" |
41abdfbd | 27 | |
2aefe6e4 JK |
28 | #include "xcoffsolib.h" |
29 | ||
41abdfbd | 30 | #include <a.out.h> |
d6434f39 JG |
31 | |
32 | extern struct obstack frame_cache_obstack; | |
33 | ||
41abdfbd | 34 | extern int errno; |
41abdfbd JG |
35 | |
36 | /* Nonzero if we just simulated a single step break. */ | |
37 | int one_stepped; | |
38 | ||
41abdfbd JG |
39 | /* Breakpoint shadows for the single step instructions will be kept here. */ |
40 | ||
41 | static struct sstep_breaks { | |
030fb5cb JK |
42 | /* Address, or 0 if this is not in use. */ |
43 | CORE_ADDR address; | |
44 | /* Shadow contents. */ | |
45 | char data[4]; | |
41abdfbd JG |
46 | } stepBreaks[2]; |
47 | ||
ecf4059f JG |
48 | /* Static function prototypes */ |
49 | ||
ecf4059f JG |
50 | static CORE_ADDR |
51 | find_toc_address PARAMS ((CORE_ADDR pc)); | |
52 | ||
53 | static CORE_ADDR | |
54 | branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety)); | |
55 | ||
56 | static void | |
57 | frame_get_cache_fsr PARAMS ((struct frame_info *fi, | |
58 | struct aix_framedata *fdatap)); | |
41abdfbd JG |
59 | |
60 | /* | |
61 | * Calculate the destination of a branch/jump. Return -1 if not a branch. | |
62 | */ | |
ecf4059f | 63 | static CORE_ADDR |
41abdfbd | 64 | branch_dest (opcode, instr, pc, safety) |
ecf4059f JG |
65 | int opcode; |
66 | int instr; | |
67 | CORE_ADDR pc; | |
68 | CORE_ADDR safety; | |
41abdfbd JG |
69 | { |
70 | register long offset; | |
ecf4059f | 71 | CORE_ADDR dest; |
41abdfbd JG |
72 | int immediate; |
73 | int absolute; | |
74 | int ext_op; | |
75 | ||
76 | absolute = (int) ((instr >> 1) & 1); | |
77 | ||
78 | switch (opcode) { | |
79 | case 18 : | |
ecf4059f | 80 | immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */ |
41abdfbd JG |
81 | |
82 | case 16 : | |
83 | if (opcode != 18) /* br conditional */ | |
84 | immediate = ((instr & ~3) << 16) >> 16; | |
85 | if (absolute) | |
86 | dest = immediate; | |
87 | else | |
88 | dest = pc + immediate; | |
89 | break; | |
90 | ||
91 | case 19 : | |
92 | ext_op = (instr>>1) & 0x3ff; | |
93 | ||
94 | if (ext_op == 16) /* br conditional register */ | |
95 | dest = read_register (LR_REGNUM) & ~3; | |
96 | ||
97 | else if (ext_op == 528) /* br cond to count reg */ | |
9aa31e91 JK |
98 | { |
99 | dest = read_register (CTR_REGNUM) & ~3; | |
100 | ||
101 | /* If we are about to execute a system call, dest is something | |
102 | like 0x22fc or 0x3b00. Upon completion the system call | |
103 | will return to the address in the link register. */ | |
104 | if (dest < TEXT_SEGMENT_BASE) | |
105 | dest = read_register (LR_REGNUM) & ~3; | |
106 | } | |
41abdfbd JG |
107 | else return -1; |
108 | break; | |
109 | ||
110 | default: return -1; | |
111 | } | |
818de002 | 112 | return (dest < TEXT_SEGMENT_BASE) ? safety : dest; |
41abdfbd JG |
113 | } |
114 | ||
115 | ||
116 | ||
117 | /* AIX does not support PT_STEP. Simulate it. */ | |
118 | ||
997cc2c0 | 119 | void |
41abdfbd | 120 | single_step (signal) |
997cc2c0 | 121 | int signal; |
41abdfbd JG |
122 | { |
123 | #define INSNLEN(OPCODE) 4 | |
124 | ||
125 | static char breakp[] = BREAKPOINT; | |
030fb5cb JK |
126 | int ii, insn; |
127 | CORE_ADDR loc; | |
128 | CORE_ADDR breaks[2]; | |
129 | int opcode; | |
41abdfbd JG |
130 | |
131 | if (!one_stepped) { | |
41abdfbd JG |
132 | loc = read_pc (); |
133 | ||
359a097f | 134 | read_memory (loc, (char *) &insn, 4); |
41abdfbd JG |
135 | |
136 | breaks[0] = loc + INSNLEN(insn); | |
137 | opcode = insn >> 26; | |
138 | breaks[1] = branch_dest (opcode, insn, loc, breaks[0]); | |
139 | ||
818de002 PB |
140 | /* Don't put two breakpoints on the same address. */ |
141 | if (breaks[1] == breaks[0]) | |
142 | breaks[1] = -1; | |
143 | ||
030fb5cb | 144 | stepBreaks[1].address = 0; |
41abdfbd JG |
145 | |
146 | for (ii=0; ii < 2; ++ii) { | |
147 | ||
148 | /* ignore invalid breakpoint. */ | |
149 | if ( breaks[ii] == -1) | |
150 | continue; | |
151 | ||
030fb5cb | 152 | read_memory (breaks[ii], stepBreaks[ii].data, 4); |
41abdfbd | 153 | |
030fb5cb | 154 | write_memory (breaks[ii], breakp, 4); |
41abdfbd JG |
155 | stepBreaks[ii].address = breaks[ii]; |
156 | } | |
157 | ||
158 | one_stepped = 1; | |
997cc2c0 | 159 | } else { |
41abdfbd JG |
160 | |
161 | /* remove step breakpoints. */ | |
162 | for (ii=0; ii < 2; ++ii) | |
030fb5cb | 163 | if (stepBreaks[ii].address != 0) |
41abdfbd | 164 | write_memory |
030fb5cb | 165 | (stepBreaks[ii].address, stepBreaks[ii].data, 4); |
41abdfbd JG |
166 | |
167 | one_stepped = 0; | |
168 | } | |
997cc2c0 | 169 | errno = 0; /* FIXME, don't ignore errors! */ |
030fb5cb | 170 | /* What errors? {read,write}_memory call error(). */ |
41abdfbd | 171 | } |
41abdfbd JG |
172 | |
173 | ||
174 | /* return pc value after skipping a function prologue. */ | |
175 | ||
176 | skip_prologue (pc) | |
ecf4059f | 177 | CORE_ADDR pc; |
41abdfbd | 178 | { |
34df79fc | 179 | char buf[4]; |
41abdfbd | 180 | unsigned int tmp; |
34df79fc | 181 | unsigned long op; |
41abdfbd | 182 | |
34df79fc | 183 | if (target_read_memory (pc, buf, 4)) |
41abdfbd | 184 | return pc; /* Can't access it -- assume no prologue. */ |
34df79fc | 185 | op = extract_unsigned_integer (buf, 4); |
41abdfbd JG |
186 | |
187 | /* Assume that subsequent fetches can fail with low probability. */ | |
188 | ||
189 | if (op == 0x7c0802a6) { /* mflr r0 */ | |
190 | pc += 4; | |
191 | op = read_memory_integer (pc, 4); | |
192 | } | |
41abdfbd JG |
193 | |
194 | if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */ | |
195 | pc += 4; | |
196 | op = read_memory_integer (pc, 4); | |
197 | } | |
198 | ||
199 | if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */ | |
200 | pc += 4; | |
201 | op = read_memory_integer (pc, 4); | |
1eeba686 PB |
202 | |
203 | /* At this point, make sure this is not a trampoline function | |
204 | (a function that simply calls another functions, and nothing else). | |
205 | If the next is not a nop, this branch was part of the function | |
206 | prologue. */ | |
207 | ||
208 | if (op == 0x4def7b82 || /* crorc 15, 15, 15 */ | |
209 | op == 0x0) | |
210 | return pc - 4; /* don't skip over this branch */ | |
41abdfbd JG |
211 | } |
212 | ||
cdb1cc92 ILT |
213 | if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */ |
214 | pc += 4; /* store floating register double */ | |
215 | op = read_memory_integer (pc, 4); | |
216 | } | |
217 | ||
41abdfbd JG |
218 | if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */ |
219 | pc += 4; | |
220 | op = read_memory_integer (pc, 4); | |
221 | } | |
222 | ||
223 | while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */ | |
224 | (tmp == 0x9421) || /* stu r1, NUM(r1) */ | |
cdb1cc92 | 225 | (tmp == 0x93e1)) /* st r31,NUM(r1) */ |
41abdfbd JG |
226 | { |
227 | pc += 4; | |
228 | op = read_memory_integer (pc, 4); | |
229 | } | |
230 | ||
231 | while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */ | |
232 | pc += 4; /* l r30, ... */ | |
233 | op = read_memory_integer (pc, 4); | |
234 | } | |
235 | ||
507e4004 | 236 | /* store parameters into stack */ |
818de002 PB |
237 | while( |
238 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ | |
239 | (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */ | |
240 | (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */ | |
241 | (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */ | |
242 | { | |
243 | pc += 4; /* store fpr double */ | |
244 | op = read_memory_integer (pc, 4); | |
245 | } | |
41abdfbd | 246 | |
d2985684 PS |
247 | if (op == 0x603f0000 /* oril r31, r1, 0x0 */ |
248 | || op == 0x7c3f0b78) { /* mr r31, r1 */ | |
41abdfbd JG |
249 | pc += 4; /* this happens if r31 is used as */ |
250 | op = read_memory_integer (pc, 4); /* frame ptr. (gcc does that) */ | |
251 | ||
818de002 PB |
252 | tmp = 0; |
253 | while ((op >> 16) == (0x907f + tmp)) { /* st r3, NUM(r31) */ | |
254 | pc += 4; /* st r4, NUM(r31), ... */ | |
41abdfbd | 255 | op = read_memory_integer (pc, 4); |
818de002 | 256 | tmp += 0x20; |
41abdfbd JG |
257 | } |
258 | } | |
507e4004 PB |
259 | #if 0 |
260 | /* I have problems with skipping over __main() that I need to address | |
261 | * sometime. Previously, I used to use misc_function_vector which | |
262 | * didn't work as well as I wanted to be. -MGO */ | |
263 | ||
264 | /* If the first thing after skipping a prolog is a branch to a function, | |
265 | this might be a call to an initializer in main(), introduced by gcc2. | |
266 | We'd like to skip over it as well. Fortunately, xlc does some extra | |
267 | work before calling a function right after a prologue, thus we can | |
268 | single out such gcc2 behaviour. */ | |
269 | ||
270 | ||
271 | if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */ | |
272 | op = read_memory_integer (pc+4, 4); | |
273 | ||
274 | if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */ | |
275 | ||
276 | /* check and see if we are in main. If so, skip over this initializer | |
277 | function as well. */ | |
278 | ||
279 | tmp = find_pc_misc_function (pc); | |
2e4964ad | 280 | if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main")) |
507e4004 PB |
281 | return pc + 8; |
282 | } | |
283 | } | |
284 | #endif /* 0 */ | |
285 | ||
41abdfbd JG |
286 | return pc; |
287 | } | |
288 | ||
818de002 | 289 | |
41abdfbd JG |
290 | /************************************************************************* |
291 | Support for creating pushind a dummy frame into the stack, and popping | |
292 | frames, etc. | |
293 | *************************************************************************/ | |
294 | ||
818de002 PB |
295 | /* The total size of dummy frame is 436, which is; |
296 | ||
297 | 32 gpr's - 128 bytes | |
298 | 32 fpr's - 256 " | |
299 | 7 the rest - 28 " | |
300 | and 24 extra bytes for the callee's link area. The last 24 bytes | |
301 | for the link area might not be necessary, since it will be taken | |
302 | care of by push_arguments(). */ | |
303 | ||
304 | #define DUMMY_FRAME_SIZE 436 | |
305 | ||
41abdfbd JG |
306 | #define DUMMY_FRAME_ADDR_SIZE 10 |
307 | ||
308 | /* Make sure you initialize these in somewhere, in case gdb gives up what it | |
818de002 | 309 | was debugging and starts debugging something else. FIXMEibm */ |
41abdfbd JG |
310 | |
311 | static int dummy_frame_count = 0; | |
312 | static int dummy_frame_size = 0; | |
313 | static CORE_ADDR *dummy_frame_addr = 0; | |
314 | ||
315 | extern int stop_stack_dummy; | |
316 | ||
317 | /* push a dummy frame into stack, save all register. Currently we are saving | |
318 | only gpr's and fpr's, which is not good enough! FIXMEmgo */ | |
319 | ||
ecf4059f | 320 | void |
41abdfbd JG |
321 | push_dummy_frame () |
322 | { | |
359a097f JK |
323 | /* stack pointer. */ |
324 | CORE_ADDR sp; | |
325 | ||
326 | /* link register. */ | |
327 | CORE_ADDR pc; | |
328 | /* Same thing, target byte order. */ | |
329 | char pc_targ[4]; | |
330 | ||
41abdfbd JG |
331 | int ii; |
332 | ||
5f1c39ef | 333 | target_fetch_registers (-1); |
6c6afbb9 | 334 | |
41abdfbd JG |
335 | if (dummy_frame_count >= dummy_frame_size) { |
336 | dummy_frame_size += DUMMY_FRAME_ADDR_SIZE; | |
337 | if (dummy_frame_addr) | |
338 | dummy_frame_addr = (CORE_ADDR*) xrealloc | |
339 | (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size)); | |
340 | else | |
341 | dummy_frame_addr = (CORE_ADDR*) | |
342 | xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size)); | |
343 | } | |
344 | ||
345 | sp = read_register(SP_REGNUM); | |
359a097f JK |
346 | pc = read_register(PC_REGNUM); |
347 | memcpy (pc_targ, (char *) &pc, 4); | |
41abdfbd JG |
348 | |
349 | dummy_frame_addr [dummy_frame_count++] = sp; | |
350 | ||
351 | /* Be careful! If the stack pointer is not decremented first, then kernel | |
6c6afbb9 | 352 | thinks he is free to use the space underneath it. And kernel actually |
41abdfbd JG |
353 | uses that area for IPC purposes when executing ptrace(2) calls. So |
354 | before writing register values into the new frame, decrement and update | |
355 | %sp first in order to secure your frame. */ | |
356 | ||
818de002 | 357 | write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE); |
41abdfbd | 358 | |
41abdfbd JG |
359 | /* gdb relies on the state of current_frame. We'd better update it, |
360 | otherwise things like do_registers_info() wouldn't work properly! */ | |
361 | ||
362 | flush_cached_frames (); | |
41abdfbd JG |
363 | |
364 | /* save program counter in link register's space. */ | |
359a097f | 365 | write_memory (sp+8, pc_targ, 4); |
41abdfbd | 366 | |
6c6afbb9 | 367 | /* save all floating point and general purpose registers here. */ |
41abdfbd JG |
368 | |
369 | /* fpr's, f0..f31 */ | |
370 | for (ii = 0; ii < 32; ++ii) | |
371 | write_memory (sp-8-(ii*8), ®isters[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8); | |
372 | ||
373 | /* gpr's r0..r31 */ | |
374 | for (ii=1; ii <=32; ++ii) | |
375 | write_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); | |
376 | ||
818de002 PB |
377 | /* so far, 32*2 + 32 words = 384 bytes have been written. |
378 | 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */ | |
379 | ||
380 | for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) { | |
381 | write_memory (sp-384-(ii*4), | |
382 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); | |
383 | } | |
384 | ||
385 | /* Save sp or so called back chain right here. */ | |
386 | write_memory (sp-DUMMY_FRAME_SIZE, &sp, 4); | |
387 | sp -= DUMMY_FRAME_SIZE; | |
41abdfbd JG |
388 | |
389 | /* And finally, this is the back chain. */ | |
359a097f | 390 | write_memory (sp+8, pc_targ, 4); |
41abdfbd JG |
391 | } |
392 | ||
393 | ||
394 | /* Pop a dummy frame. | |
395 | ||
396 | In rs6000 when we push a dummy frame, we save all of the registers. This | |
397 | is usually done before user calls a function explicitly. | |
398 | ||
818de002 PB |
399 | After a dummy frame is pushed, some instructions are copied into stack, |
400 | and stack pointer is decremented even more. Since we don't have a frame | |
401 | pointer to get back to the parent frame of the dummy, we start having | |
402 | trouble poping it. Therefore, we keep a dummy frame stack, keeping | |
403 | addresses of dummy frames as such. When poping happens and when we | |
404 | detect that was a dummy frame, we pop it back to its parent by using | |
405 | dummy frame stack (`dummy_frame_addr' array). | |
ecf4059f JG |
406 | |
407 | FIXME: This whole concept is broken. You should be able to detect | |
408 | a dummy stack frame *on the user's stack itself*. When you do, | |
409 | then you know the format of that stack frame -- including its | |
410 | saved SP register! There should *not* be a separate stack in the | |
d6434f39 | 411 | GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92 |
41abdfbd JG |
412 | */ |
413 | ||
414 | pop_dummy_frame () | |
415 | { | |
416 | CORE_ADDR sp, pc; | |
417 | int ii; | |
418 | sp = dummy_frame_addr [--dummy_frame_count]; | |
419 | ||
420 | /* restore all fpr's. */ | |
421 | for (ii = 1; ii <= 32; ++ii) | |
422 | read_memory (sp-(ii*8), ®isters[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8); | |
423 | ||
424 | /* restore all gpr's */ | |
425 | for (ii=1; ii <= 32; ++ii) { | |
426 | read_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); | |
427 | } | |
428 | ||
818de002 PB |
429 | /* restore the rest of the registers. */ |
430 | for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) | |
431 | read_memory (sp-384-(ii*4), | |
432 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); | |
433 | ||
434 | read_memory (sp-(DUMMY_FRAME_SIZE-8), | |
435 | ®isters [REGISTER_BYTE(PC_REGNUM)], 4); | |
41abdfbd JG |
436 | |
437 | /* when a dummy frame was being pushed, we had to decrement %sp first, in | |
438 | order to secure astack space. Thus, saved %sp (or %r1) value, is not the | |
439 | one we should restore. Change it with the one we need. */ | |
440 | ||
441 | *(int*)®isters [REGISTER_BYTE(FP_REGNUM)] = sp; | |
442 | ||
443 | /* Now we can restore all registers. */ | |
444 | ||
5f1c39ef | 445 | target_store_registers (-1); |
41abdfbd JG |
446 | pc = read_pc (); |
447 | flush_cached_frames (); | |
41abdfbd JG |
448 | } |
449 | ||
450 | ||
451 | /* pop the innermost frame, go back to the caller. */ | |
452 | ||
ecf4059f | 453 | void |
41abdfbd JG |
454 | pop_frame () |
455 | { | |
359a097f | 456 | CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */ |
6c6afbb9 | 457 | struct aix_framedata fdata; |
669caa9c | 458 | struct frame_info *frame = get_current_frame (); |
41abdfbd | 459 | int addr, ii; |
41abdfbd JG |
460 | |
461 | pc = read_pc (); | |
669caa9c | 462 | sp = FRAME_FP (frame); |
41abdfbd JG |
463 | |
464 | if (stop_stack_dummy && dummy_frame_count) { | |
465 | pop_dummy_frame (); | |
466 | return; | |
467 | } | |
468 | ||
07aa9fdc PS |
469 | /* Make sure that all registers are valid. */ |
470 | read_register_bytes (0, NULL, REGISTER_BYTES); | |
471 | ||
41abdfbd JG |
472 | /* figure out previous %pc value. If the function is frameless, it is |
473 | still in the link register, otherwise walk the frames and retrieve the | |
474 | saved %pc value in the previous frame. */ | |
475 | ||
34a1a3bf | 476 | addr = get_pc_function_start (frame->pc) + FUNCTION_START_OFFSET; |
6c6afbb9 | 477 | function_frame_info (addr, &fdata); |
41abdfbd | 478 | |
6c6afbb9 | 479 | if (fdata.frameless) |
07aa9fdc PS |
480 | prev_sp = sp; |
481 | else | |
482 | prev_sp = read_memory_integer (sp, 4); | |
483 | if (fdata.nosavedpc) | |
41abdfbd JG |
484 | lr = read_register (LR_REGNUM); |
485 | else | |
359a097f | 486 | lr = read_memory_integer (prev_sp+8, 4); |
41abdfbd JG |
487 | |
488 | /* reset %pc value. */ | |
489 | write_register (PC_REGNUM, lr); | |
490 | ||
491 | /* reset register values if any was saved earlier. */ | |
6c6afbb9 | 492 | addr = prev_sp - fdata.offset; |
41abdfbd | 493 | |
6c6afbb9 | 494 | if (fdata.saved_gpr != -1) |
669caa9c | 495 | for (ii = fdata.saved_gpr; ii <= 31; ++ii) { |
41abdfbd | 496 | read_memory (addr, ®isters [REGISTER_BYTE (ii)], 4); |
cdb1cc92 | 497 | addr += 4; |
41abdfbd JG |
498 | } |
499 | ||
6c6afbb9 | 500 | if (fdata.saved_fpr != -1) |
669caa9c | 501 | for (ii = fdata.saved_fpr; ii <= 31; ++ii) { |
41abdfbd JG |
502 | read_memory (addr, ®isters [REGISTER_BYTE (ii+FP0_REGNUM)], 8); |
503 | addr += 8; | |
504 | } | |
505 | ||
506 | write_register (SP_REGNUM, prev_sp); | |
5f1c39ef | 507 | target_store_registers (-1); |
41abdfbd | 508 | flush_cached_frames (); |
41abdfbd JG |
509 | } |
510 | ||
41abdfbd JG |
511 | /* fixup the call sequence of a dummy function, with the real function address. |
512 | its argumets will be passed by gdb. */ | |
513 | ||
ecf4059f | 514 | void |
41abdfbd JG |
515 | fix_call_dummy(dummyname, pc, fun, nargs, type) |
516 | char *dummyname; | |
ecf4059f JG |
517 | CORE_ADDR pc; |
518 | CORE_ADDR fun; | |
41abdfbd JG |
519 | int nargs; /* not used */ |
520 | int type; /* not used */ | |
41abdfbd JG |
521 | { |
522 | #define TOC_ADDR_OFFSET 20 | |
523 | #define TARGET_ADDR_OFFSET 28 | |
524 | ||
525 | int ii; | |
ecf4059f JG |
526 | CORE_ADDR target_addr; |
527 | CORE_ADDR tocvalue; | |
41abdfbd JG |
528 | |
529 | target_addr = fun; | |
530 | tocvalue = find_toc_address (target_addr); | |
531 | ||
532 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET); | |
533 | ii = (ii & 0xffff0000) | (tocvalue >> 16); | |
534 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii; | |
535 | ||
536 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4); | |
537 | ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff); | |
538 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii; | |
539 | ||
540 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET); | |
541 | ii = (ii & 0xffff0000) | (target_addr >> 16); | |
542 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii; | |
543 | ||
544 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4); | |
545 | ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff); | |
546 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii; | |
547 | } | |
548 | ||
549 | ||
41abdfbd | 550 | /* return information about a function frame. |
6c6afbb9 | 551 | in struct aix_frameinfo fdata: |
cdb1cc92 ILT |
552 | - frameless is TRUE, if function does not have a frame. |
553 | - nosavedpc is TRUE, if function does not save %pc value in its frame. | |
41abdfbd JG |
554 | - offset is the number of bytes used in the frame to save registers. |
555 | - saved_gpr is the number of the first saved gpr. | |
556 | - saved_fpr is the number of the first saved fpr. | |
6c6afbb9 PB |
557 | - alloca_reg is the number of the register used for alloca() handling. |
558 | Otherwise -1. | |
41abdfbd | 559 | */ |
ecf4059f | 560 | void |
6c6afbb9 | 561 | function_frame_info (pc, fdata) |
d6434f39 | 562 | CORE_ADDR pc; |
6c6afbb9 | 563 | struct aix_framedata *fdata; |
41abdfbd JG |
564 | { |
565 | unsigned int tmp; | |
566 | register unsigned int op; | |
9ed8604f | 567 | char buf[4]; |
41abdfbd | 568 | |
6c6afbb9 PB |
569 | fdata->offset = 0; |
570 | fdata->saved_gpr = fdata->saved_fpr = fdata->alloca_reg = -1; | |
cdb1cc92 | 571 | fdata->frameless = 1; |
41abdfbd | 572 | |
9ed8604f PS |
573 | /* Do not error out if we can't access the instructions. */ |
574 | if (target_read_memory (pc, buf, 4)) | |
575 | return; | |
576 | op = extract_unsigned_integer (buf, 4); | |
41abdfbd JG |
577 | if (op == 0x7c0802a6) { /* mflr r0 */ |
578 | pc += 4; | |
579 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 580 | fdata->nosavedpc = 0; |
6c6afbb9 | 581 | fdata->frameless = 0; |
41abdfbd | 582 | } |
cdb1cc92 ILT |
583 | else /* else, pc is not saved */ |
584 | fdata->nosavedpc = 1; | |
41abdfbd JG |
585 | |
586 | if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */ | |
587 | pc += 4; | |
588 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 589 | fdata->frameless = 0; |
41abdfbd JG |
590 | } |
591 | ||
592 | if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */ | |
593 | pc += 4; | |
594 | op = read_memory_integer (pc, 4); | |
1eeba686 PB |
595 | /* At this point, make sure this is not a trampoline function |
596 | (a function that simply calls another functions, and nothing else). | |
597 | If the next is not a nop, this branch was part of the function | |
598 | prologue. */ | |
599 | ||
600 | if (op == 0x4def7b82 || /* crorc 15, 15, 15 */ | |
601 | op == 0x0) | |
602 | return; /* prologue is over */ | |
cdb1cc92 | 603 | fdata->frameless = 0; |
41abdfbd JG |
604 | } |
605 | ||
606 | if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */ | |
607 | pc += 4; /* store floating register double */ | |
608 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 609 | fdata->frameless = 0; |
41abdfbd JG |
610 | } |
611 | ||
612 | if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */ | |
613 | int tmp2; | |
6c6afbb9 | 614 | fdata->saved_gpr = (op >> 21) & 0x1f; |
41abdfbd JG |
615 | tmp2 = op & 0xffff; |
616 | if (tmp2 > 0x7fff) | |
cdb1cc92 | 617 | tmp2 = (~0 &~ 0xffff) | tmp2; |
41abdfbd JG |
618 | |
619 | if (tmp2 < 0) { | |
620 | tmp2 = tmp2 * -1; | |
6c6afbb9 PB |
621 | fdata->saved_fpr = (tmp2 - ((32 - fdata->saved_gpr) * 4)) / 8; |
622 | if ( fdata->saved_fpr > 0) | |
623 | fdata->saved_fpr = 32 - fdata->saved_fpr; | |
41abdfbd | 624 | else |
6c6afbb9 | 625 | fdata->saved_fpr = -1; |
41abdfbd | 626 | } |
6c6afbb9 PB |
627 | fdata->offset = tmp2; |
628 | pc += 4; | |
629 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 630 | fdata->frameless = 0; |
41abdfbd | 631 | } |
6c6afbb9 PB |
632 | |
633 | while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */ | |
634 | (tmp == 0x9421) || /* stu r1, NUM(r1) */ | |
cdb1cc92 | 635 | (tmp == 0x93e1)) /* st r31, NUM(r1) */ |
6c6afbb9 | 636 | { |
cdb1cc92 ILT |
637 | int tmp2; |
638 | ||
6c6afbb9 PB |
639 | /* gcc takes a short cut and uses this instruction to save r31 only. */ |
640 | ||
cdb1cc92 | 641 | if (tmp == 0x93e1) { |
6c6afbb9 PB |
642 | if (fdata->offset) |
643 | /* fatal ("Unrecognized prolog."); */ | |
199b2450 | 644 | printf_unfiltered ("Unrecognized prolog!\n"); |
6c6afbb9 PB |
645 | |
646 | fdata->saved_gpr = 31; | |
cdb1cc92 ILT |
647 | tmp2 = op & 0xffff; |
648 | if (tmp2 > 0x7fff) { | |
649 | tmp2 = - ((~0 &~ 0xffff) | tmp2); | |
650 | fdata->saved_fpr = (tmp2 - ((32 - 31) * 4)) / 8; | |
651 | if ( fdata->saved_fpr > 0) | |
652 | fdata->saved_fpr = 32 - fdata->saved_fpr; | |
653 | else | |
654 | fdata->saved_fpr = -1; | |
655 | } | |
656 | fdata->offset = tmp2; | |
6c6afbb9 PB |
657 | } |
658 | pc += 4; | |
659 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 660 | fdata->frameless = 0; |
6c6afbb9 PB |
661 | } |
662 | ||
663 | while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */ | |
664 | pc += 4; /* l r30, ... */ | |
665 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 666 | fdata->frameless = 0; |
6c6afbb9 PB |
667 | } |
668 | ||
669 | /* store parameters into stack */ | |
670 | while( | |
671 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ | |
672 | (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */ | |
673 | (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */ | |
674 | (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */ | |
675 | { | |
676 | pc += 4; /* store fpr double */ | |
677 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 678 | fdata->frameless = 0; |
6c6afbb9 PB |
679 | } |
680 | ||
07aa9fdc PS |
681 | if (op == 0x603f0000 /* oril r31, r1, 0x0 */ |
682 | || op == 0x7c3f0b78) /* mr r31, r1 */ | |
683 | { | |
684 | fdata->alloca_reg = 31; | |
685 | fdata->frameless = 0; | |
686 | } | |
41abdfbd JG |
687 | } |
688 | ||
689 | ||
690 | /* Pass the arguments in either registers, or in the stack. In RS6000, the first | |
691 | eight words of the argument list (that might be less than eight parameters if | |
692 | some parameters occupy more than one word) are passed in r3..r11 registers. | |
693 | float and double parameters are passed in fpr's, in addition to that. Rest of | |
694 | the parameters if any are passed in user stack. There might be cases in which | |
695 | half of the parameter is copied into registers, the other half is pushed into | |
696 | stack. | |
697 | ||
698 | If the function is returning a structure, then the return address is passed | |
699 | in r3, then the first 7 words of the parametes can be passed in registers, | |
700 | starting from r4. */ | |
701 | ||
702 | CORE_ADDR | |
703 | push_arguments (nargs, args, sp, struct_return, struct_addr) | |
704 | int nargs; | |
17221e41 | 705 | value_ptr *args; |
41abdfbd JG |
706 | CORE_ADDR sp; |
707 | int struct_return; | |
708 | CORE_ADDR struct_addr; | |
709 | { | |
710 | int ii, len; | |
711 | int argno; /* current argument number */ | |
712 | int argbytes; /* current argument byte */ | |
713 | char tmp_buffer [50]; | |
17221e41 | 714 | value_ptr arg; |
41abdfbd JG |
715 | int f_argno = 0; /* current floating point argno */ |
716 | ||
717 | CORE_ADDR saved_sp, pc; | |
718 | ||
719 | if ( dummy_frame_count <= 0) | |
199b2450 | 720 | printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n"); |
41abdfbd JG |
721 | |
722 | /* The first eight words of ther arguments are passed in registers. Copy | |
723 | them appropriately. | |
724 | ||
725 | If the function is returning a `struct', then the first word (which | |
726 | will be passed in r3) is used for struct return address. In that | |
727 | case we should advance one word and start from r4 register to copy | |
728 | parameters. */ | |
729 | ||
730 | ii = struct_return ? 1 : 0; | |
731 | ||
732 | for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) { | |
733 | ||
734 | arg = value_arg_coerce (args[argno]); | |
735 | len = TYPE_LENGTH (VALUE_TYPE (arg)); | |
736 | ||
737 | if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT) { | |
738 | ||
739 | /* floating point arguments are passed in fpr's, as well as gpr's. | |
740 | There are 13 fpr's reserved for passing parameters. At this point | |
741 | there is no way we would run out of them. */ | |
742 | ||
743 | if (len > 8) | |
199b2450 | 744 | printf_unfiltered ( |
41abdfbd JG |
745 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); |
746 | ||
ade40d31 RP |
747 | memcpy (®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg), |
748 | len); | |
41abdfbd JG |
749 | ++f_argno; |
750 | } | |
751 | ||
752 | if (len > 4) { | |
753 | ||
754 | /* Argument takes more than one register. */ | |
755 | while (argbytes < len) { | |
756 | ||
757 | *(int*)®isters[REGISTER_BYTE(ii+3)] = 0; | |
ade40d31 RP |
758 | memcpy (®isters[REGISTER_BYTE(ii+3)], |
759 | ((char*)VALUE_CONTENTS (arg))+argbytes, | |
41abdfbd JG |
760 | (len - argbytes) > 4 ? 4 : len - argbytes); |
761 | ++ii, argbytes += 4; | |
762 | ||
763 | if (ii >= 8) | |
764 | goto ran_out_of_registers_for_arguments; | |
765 | } | |
766 | argbytes = 0; | |
767 | --ii; | |
768 | } | |
769 | else { /* Argument can fit in one register. No problem. */ | |
770 | *(int*)®isters[REGISTER_BYTE(ii+3)] = 0; | |
ade40d31 | 771 | memcpy (®isters[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len); |
41abdfbd JG |
772 | } |
773 | ++argno; | |
774 | } | |
775 | ||
776 | ran_out_of_registers_for_arguments: | |
777 | ||
778 | /* location for 8 parameters are always reserved. */ | |
779 | sp -= 4 * 8; | |
780 | ||
781 | /* another six words for back chain, TOC register, link register, etc. */ | |
782 | sp -= 24; | |
783 | ||
784 | /* if there are more arguments, allocate space for them in | |
785 | the stack, then push them starting from the ninth one. */ | |
786 | ||
787 | if ((argno < nargs) || argbytes) { | |
788 | int space = 0, jj; | |
17221e41 | 789 | value_ptr val; |
41abdfbd JG |
790 | |
791 | if (argbytes) { | |
792 | space += ((len - argbytes + 3) & -4); | |
793 | jj = argno + 1; | |
794 | } | |
795 | else | |
796 | jj = argno; | |
797 | ||
798 | for (; jj < nargs; ++jj) { | |
799 | val = value_arg_coerce (args[jj]); | |
800 | space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4; | |
801 | } | |
802 | ||
803 | /* add location required for the rest of the parameters */ | |
804 | space = (space + 7) & -8; | |
805 | sp -= space; | |
806 | ||
807 | /* This is another instance we need to be concerned about securing our | |
808 | stack space. If we write anything underneath %sp (r1), we might conflict | |
809 | with the kernel who thinks he is free to use this area. So, update %sp | |
810 | first before doing anything else. */ | |
811 | ||
812 | write_register (SP_REGNUM, sp); | |
813 | ||
41abdfbd JG |
814 | /* if the last argument copied into the registers didn't fit there |
815 | completely, push the rest of it into stack. */ | |
816 | ||
817 | if (argbytes) { | |
818 | write_memory ( | |
819 | sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes); | |
820 | ++argno; | |
821 | ii += ((len - argbytes + 3) & -4) / 4; | |
822 | } | |
823 | ||
824 | /* push the rest of the arguments into stack. */ | |
825 | for (; argno < nargs; ++argno) { | |
826 | ||
827 | arg = value_arg_coerce (args[argno]); | |
828 | len = TYPE_LENGTH (VALUE_TYPE (arg)); | |
829 | ||
830 | ||
831 | /* float types should be passed in fpr's, as well as in the stack. */ | |
832 | if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT && f_argno < 13) { | |
833 | ||
834 | if (len > 8) | |
199b2450 | 835 | printf_unfiltered ( |
41abdfbd JG |
836 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); |
837 | ||
ade40d31 RP |
838 | memcpy (®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg), |
839 | len); | |
41abdfbd JG |
840 | ++f_argno; |
841 | } | |
842 | ||
359a097f | 843 | write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len); |
41abdfbd JG |
844 | ii += ((len + 3) & -4) / 4; |
845 | } | |
846 | } | |
6c6afbb9 | 847 | else |
41abdfbd JG |
848 | /* Secure stack areas first, before doing anything else. */ |
849 | write_register (SP_REGNUM, sp); | |
850 | ||
41abdfbd JG |
851 | saved_sp = dummy_frame_addr [dummy_frame_count - 1]; |
852 | read_memory (saved_sp, tmp_buffer, 24); | |
853 | write_memory (sp, tmp_buffer, 24); | |
854 | ||
855 | write_memory (sp, &saved_sp, 4); /* set back chain properly */ | |
856 | ||
5f1c39ef | 857 | target_store_registers (-1); |
41abdfbd JG |
858 | return sp; |
859 | } | |
860 | ||
861 | /* a given return value in `regbuf' with a type `valtype', extract and copy its | |
862 | value into `valbuf' */ | |
863 | ||
ecf4059f | 864 | void |
41abdfbd JG |
865 | extract_return_value (valtype, regbuf, valbuf) |
866 | struct type *valtype; | |
867 | char regbuf[REGISTER_BYTES]; | |
868 | char *valbuf; | |
869 | { | |
870 | ||
871 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT) { | |
872 | ||
873 | double dd; float ff; | |
874 | /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes. | |
875 | We need to truncate the return value into float size (4 byte) if | |
876 | necessary. */ | |
877 | ||
878 | if (TYPE_LENGTH (valtype) > 4) /* this is a double */ | |
ade40d31 | 879 | memcpy (valbuf, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], |
41abdfbd JG |
880 | TYPE_LENGTH (valtype)); |
881 | else { /* float */ | |
ade40d31 | 882 | memcpy (&dd, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], 8); |
41abdfbd | 883 | ff = (float)dd; |
ade40d31 | 884 | memcpy (valbuf, &ff, sizeof(float)); |
41abdfbd JG |
885 | } |
886 | } | |
887 | else | |
888 | /* return value is copied starting from r3. */ | |
ade40d31 | 889 | memcpy (valbuf, ®buf[REGISTER_BYTE (3)], TYPE_LENGTH (valtype)); |
41abdfbd JG |
890 | } |
891 | ||
892 | ||
ecf4059f JG |
893 | /* keep structure return address in this variable. |
894 | FIXME: This is a horrid kludge which should not be allowed to continue | |
895 | living. This only allows a single nested call to a structure-returning | |
896 | function. Come on, guys! -- gnu@cygnus.com, Aug 92 */ | |
41abdfbd JG |
897 | |
898 | CORE_ADDR rs6000_struct_return_address; | |
899 | ||
900 | ||
c2e4669f JG |
901 | /* Indirect function calls use a piece of trampoline code to do context |
902 | switching, i.e. to set the new TOC table. Skip such code if we are on | |
903 | its first instruction (as when we have single-stepped to here). | |
07aa9fdc PS |
904 | Also skip shared library trampoline code (which is different from |
905 | indirect function call trampolines). | |
c2e4669f JG |
906 | Result is desired PC to step until, or NULL if we are not in |
907 | trampoline code. */ | |
41abdfbd | 908 | |
ecf4059f | 909 | CORE_ADDR |
41abdfbd | 910 | skip_trampoline_code (pc) |
ecf4059f | 911 | CORE_ADDR pc; |
41abdfbd JG |
912 | { |
913 | register unsigned int ii, op; | |
07aa9fdc | 914 | CORE_ADDR solib_target_pc; |
41abdfbd JG |
915 | |
916 | static unsigned trampoline_code[] = { | |
917 | 0x800b0000, /* l r0,0x0(r11) */ | |
918 | 0x90410014, /* st r2,0x14(r1) */ | |
919 | 0x7c0903a6, /* mtctr r0 */ | |
920 | 0x804b0004, /* l r2,0x4(r11) */ | |
921 | 0x816b0008, /* l r11,0x8(r11) */ | |
922 | 0x4e800420, /* bctr */ | |
923 | 0x4e800020, /* br */ | |
924 | 0 | |
925 | }; | |
926 | ||
07aa9fdc PS |
927 | /* If pc is in a shared library trampoline, return its target. */ |
928 | solib_target_pc = find_solib_trampoline_target (pc); | |
929 | if (solib_target_pc) | |
930 | return solib_target_pc; | |
931 | ||
41abdfbd JG |
932 | for (ii=0; trampoline_code[ii]; ++ii) { |
933 | op = read_memory_integer (pc + (ii*4), 4); | |
934 | if (op != trampoline_code [ii]) | |
359a097f | 935 | return 0; |
41abdfbd JG |
936 | } |
937 | ii = read_register (11); /* r11 holds destination addr */ | |
938 | pc = read_memory_integer (ii, 4); /* (r11) value */ | |
939 | return pc; | |
940 | } | |
941 | ||
ecf4059f JG |
942 | |
943 | /* Determines whether the function FI has a frame on the stack or not. | |
cdb1cc92 ILT |
944 | Called from the FRAMELESS_FUNCTION_INVOCATION macro in tm.h with a |
945 | second argument of 0, and from the FRAME_SAVED_PC macro with a | |
946 | second argument of 1. */ | |
ecf4059f JG |
947 | |
948 | int | |
cdb1cc92 | 949 | frameless_function_invocation (fi, pcsaved) |
ecf4059f | 950 | struct frame_info *fi; |
cdb1cc92 | 951 | int pcsaved; |
ecf4059f JG |
952 | { |
953 | CORE_ADDR func_start; | |
954 | struct aix_framedata fdata; | |
955 | ||
b0e932ad JK |
956 | if (fi->next != NULL) |
957 | /* Don't even think about framelessness except on the innermost frame. */ | |
3f528883 JK |
958 | /* FIXME: Can also be frameless if fi->next->signal_handler_caller (if |
959 | a signal happens while executing in a frameless function). */ | |
b0e932ad JK |
960 | return 0; |
961 | ||
ecf4059f JG |
962 | func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET; |
963 | ||
964 | /* If we failed to find the start of the function, it is a mistake | |
965 | to inspect the instructions. */ | |
966 | ||
967 | if (!func_start) | |
968 | return 0; | |
969 | ||
970 | function_frame_info (func_start, &fdata); | |
cdb1cc92 | 971 | return pcsaved ? fdata.nosavedpc : fdata.frameless; |
ecf4059f JG |
972 | } |
973 | ||
974 | ||
975 | /* If saved registers of frame FI are not known yet, read and cache them. | |
976 | &FDATAP contains aix_framedata; TDATAP can be NULL, | |
977 | in which case the framedata are read. */ | |
978 | ||
979 | static void | |
980 | frame_get_cache_fsr (fi, fdatap) | |
981 | struct frame_info *fi; | |
982 | struct aix_framedata *fdatap; | |
983 | { | |
984 | int ii; | |
985 | CORE_ADDR frame_addr; | |
986 | struct aix_framedata work_fdata; | |
987 | ||
988 | if (fi->cache_fsr) | |
989 | return; | |
990 | ||
991 | if (fdatap == NULL) { | |
992 | fdatap = &work_fdata; | |
993 | function_frame_info (get_pc_function_start (fi->pc), fdatap); | |
994 | } | |
995 | ||
996 | fi->cache_fsr = (struct frame_saved_regs *) | |
997 | obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs)); | |
4ed97c9a | 998 | memset (fi->cache_fsr, '\0', sizeof (struct frame_saved_regs)); |
ecf4059f JG |
999 | |
1000 | if (fi->prev && fi->prev->frame) | |
1001 | frame_addr = fi->prev->frame; | |
1002 | else | |
1003 | frame_addr = read_memory_integer (fi->frame, 4); | |
1004 | ||
1005 | /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr. | |
1006 | All fpr's from saved_fpr to fp31 are saved right underneath caller | |
1007 | stack pointer, starting from fp31 first. */ | |
1008 | ||
1009 | if (fdatap->saved_fpr >= 0) { | |
1010 | for (ii=31; ii >= fdatap->saved_fpr; --ii) | |
1011 | fi->cache_fsr->regs [FP0_REGNUM + ii] = frame_addr - ((32 - ii) * 8); | |
1012 | frame_addr -= (32 - fdatap->saved_fpr) * 8; | |
1013 | } | |
1014 | ||
1015 | /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr. | |
1016 | All gpr's from saved_gpr to gpr31 are saved right under saved fprs, | |
1017 | starting from r31 first. */ | |
1018 | ||
1019 | if (fdatap->saved_gpr >= 0) | |
1020 | for (ii=31; ii >= fdatap->saved_gpr; --ii) | |
1021 | fi->cache_fsr->regs [ii] = frame_addr - ((32 - ii) * 4); | |
1022 | } | |
1023 | ||
1024 | /* Return the address of a frame. This is the inital %sp value when the frame | |
1025 | was first allocated. For functions calling alloca(), it might be saved in | |
1026 | an alloca register. */ | |
1027 | ||
1028 | CORE_ADDR | |
1029 | frame_initial_stack_address (fi) | |
1030 | struct frame_info *fi; | |
1031 | { | |
1032 | CORE_ADDR tmpaddr; | |
1033 | struct aix_framedata fdata; | |
1034 | struct frame_info *callee_fi; | |
1035 | ||
1036 | /* if the initial stack pointer (frame address) of this frame is known, | |
1037 | just return it. */ | |
1038 | ||
1039 | if (fi->initial_sp) | |
1040 | return fi->initial_sp; | |
1041 | ||
1042 | /* find out if this function is using an alloca register.. */ | |
1043 | ||
1044 | function_frame_info (get_pc_function_start (fi->pc), &fdata); | |
1045 | ||
1046 | /* if saved registers of this frame are not known yet, read and cache them. */ | |
1047 | ||
1048 | if (!fi->cache_fsr) | |
1049 | frame_get_cache_fsr (fi, &fdata); | |
1050 | ||
1051 | /* If no alloca register used, then fi->frame is the value of the %sp for | |
1052 | this frame, and it is good enough. */ | |
1053 | ||
1054 | if (fdata.alloca_reg < 0) { | |
1055 | fi->initial_sp = fi->frame; | |
1056 | return fi->initial_sp; | |
1057 | } | |
1058 | ||
1059 | /* This function has an alloca register. If this is the top-most frame | |
1060 | (with the lowest address), the value in alloca register is good. */ | |
1061 | ||
1062 | if (!fi->next) | |
1063 | return fi->initial_sp = read_register (fdata.alloca_reg); | |
1064 | ||
1065 | /* Otherwise, this is a caller frame. Callee has usually already saved | |
1066 | registers, but there are exceptions (such as when the callee | |
1067 | has no parameters). Find the address in which caller's alloca | |
1068 | register is saved. */ | |
1069 | ||
1070 | for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) { | |
1071 | ||
1072 | if (!callee_fi->cache_fsr) | |
cdb1cc92 | 1073 | frame_get_cache_fsr (callee_fi, NULL); |
ecf4059f JG |
1074 | |
1075 | /* this is the address in which alloca register is saved. */ | |
1076 | ||
1077 | tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg]; | |
1078 | if (tmpaddr) { | |
1079 | fi->initial_sp = read_memory_integer (tmpaddr, 4); | |
1080 | return fi->initial_sp; | |
1081 | } | |
1082 | ||
1083 | /* Go look into deeper levels of the frame chain to see if any one of | |
1084 | the callees has saved alloca register. */ | |
1085 | } | |
1086 | ||
1087 | /* If alloca register was not saved, by the callee (or any of its callees) | |
1088 | then the value in the register is still good. */ | |
1089 | ||
1090 | return fi->initial_sp = read_register (fdata.alloca_reg); | |
1091 | } | |
1092 | ||
669caa9c | 1093 | CORE_ADDR |
f3649227 JK |
1094 | rs6000_frame_chain (thisframe) |
1095 | struct frame_info *thisframe; | |
1096 | { | |
669caa9c | 1097 | CORE_ADDR fp; |
f3649227 JK |
1098 | if (inside_entry_file ((thisframe)->pc)) |
1099 | return 0; | |
cee86be3 | 1100 | if (thisframe->signal_handler_caller) |
9ed8604f | 1101 | fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4); |
cee86be3 JK |
1102 | else |
1103 | fp = read_memory_integer ((thisframe)->frame, 4); | |
1104 | ||
f3649227 JK |
1105 | return fp; |
1106 | } | |
ecf4059f JG |
1107 | \f |
1108 | /* Keep an array of load segment information and their TOC table addresses. | |
1109 | This info will be useful when calling a shared library function by hand. */ | |
1110 | ||
1111 | struct loadinfo { | |
1112 | CORE_ADDR textorg, dataorg; | |
1113 | unsigned long toc_offset; | |
1114 | }; | |
1115 | ||
1116 | #define LOADINFOLEN 10 | |
1117 | ||
ecf4059f JG |
1118 | static struct loadinfo *loadinfo = NULL; |
1119 | static int loadinfolen = 0; | |
1120 | static int loadinfotocindex = 0; | |
3c02636b | 1121 | static int loadinfotextindex = 0; |
ecf4059f JG |
1122 | |
1123 | ||
1124 | void | |
1125 | xcoff_init_loadinfo () | |
1126 | { | |
1127 | loadinfotocindex = 0; | |
1128 | loadinfotextindex = 0; | |
1129 | ||
1130 | if (loadinfolen == 0) { | |
1131 | loadinfo = (struct loadinfo *) | |
1132 | xmalloc (sizeof (struct loadinfo) * LOADINFOLEN); | |
1133 | loadinfolen = LOADINFOLEN; | |
1134 | } | |
1135 | } | |
1136 | ||
1137 | ||
1138 | /* FIXME -- this is never called! */ | |
1139 | void | |
1140 | free_loadinfo () | |
1141 | { | |
1142 | if (loadinfo) | |
1143 | free (loadinfo); | |
1144 | loadinfo = NULL; | |
1145 | loadinfolen = 0; | |
1146 | loadinfotocindex = 0; | |
1147 | loadinfotextindex = 0; | |
1148 | } | |
1149 | ||
1150 | /* this is called from xcoffread.c */ | |
1151 | ||
1152 | void | |
1153 | xcoff_add_toc_to_loadinfo (unsigned long tocoff) | |
1154 | { | |
1155 | while (loadinfotocindex >= loadinfolen) { | |
1156 | loadinfolen += LOADINFOLEN; | |
1157 | loadinfo = (struct loadinfo *) | |
1158 | xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen); | |
1159 | } | |
1160 | loadinfo [loadinfotocindex++].toc_offset = tocoff; | |
1161 | } | |
1162 | ||
2aefe6e4 | 1163 | void |
ecf4059f JG |
1164 | add_text_to_loadinfo (textaddr, dataaddr) |
1165 | CORE_ADDR textaddr; | |
1166 | CORE_ADDR dataaddr; | |
1167 | { | |
1168 | while (loadinfotextindex >= loadinfolen) { | |
1169 | loadinfolen += LOADINFOLEN; | |
1170 | loadinfo = (struct loadinfo *) | |
1171 | xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen); | |
1172 | } | |
1173 | loadinfo [loadinfotextindex].textorg = textaddr; | |
1174 | loadinfo [loadinfotextindex].dataorg = dataaddr; | |
1175 | ++loadinfotextindex; | |
1176 | } | |
1177 | ||
1178 | ||
1179 | /* FIXME: This assumes that the "textorg" and "dataorg" elements | |
1180 | of a member of this array are correlated with the "toc_offset" | |
1181 | element of the same member. But they are sequentially assigned in wildly | |
1182 | different places, and probably there is no correlation. FIXME! */ | |
1183 | ||
1184 | static CORE_ADDR | |
1185 | find_toc_address (pc) | |
1186 | CORE_ADDR pc; | |
1187 | { | |
1188 | int ii, toc_entry, tocbase = 0; | |
1189 | ||
1190 | for (ii=0; ii < loadinfotextindex; ++ii) | |
1191 | if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) { | |
1192 | toc_entry = ii; | |
1193 | tocbase = loadinfo[ii].textorg; | |
1194 | } | |
1195 | ||
1196 | return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset; | |
1197 | } |