Commit | Line | Data |
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c906108c | 1 | /* Target-dependent code for GDB, the GNU debugger. |
c877c8e6 | 2 | Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000 |
c906108c SS |
3 | Free Software Foundation, Inc. |
4 | ||
c5aa993b | 5 | This file is part of GDB. |
c906108c | 6 | |
c5aa993b JM |
7 | This program is free software; you can redistribute it and/or modify |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
c906108c | 11 | |
c5aa993b JM |
12 | This program is distributed in the hope that it will be useful, |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
c906108c | 16 | |
c5aa993b JM |
17 | You should have received a copy of the GNU General Public License |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 59 Temple Place - Suite 330, | |
20 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
21 | |
22 | #include "defs.h" | |
23 | #include "frame.h" | |
24 | #include "inferior.h" | |
25 | #include "symtab.h" | |
26 | #include "target.h" | |
27 | #include "gdbcore.h" | |
28 | #include "gdbcmd.h" | |
29 | #include "symfile.h" | |
30 | #include "objfiles.h" | |
31 | #include "xcoffsolib.h" | |
7a78ae4e ND |
32 | #include "arch-utils.h" |
33 | ||
34 | #include "bfd/libbfd.h" /* for bfd_default_set_arch_mach */ | |
35 | #include "coff/internal.h" /* for libcoff.h */ | |
36 | #include "bfd/libcoff.h" /* for xcoff_data */ | |
37 | ||
38 | /* Some important register numbers. Keep these in the same order as in | |
39 | /usr/mstsave.h `mstsave' structure, for easier processing. */ | |
40 | ||
41 | #define GP0_REGNUM 0 /* GPR register 0 */ | |
42 | #define TOC_REGNUM 2 /* TOC register */ | |
43 | #define PS_REGNUM 65 /* Processor (or machine) status (%msr) */ | |
44 | #define CR_REGNUM 66 /* Condition register */ | |
45 | #define LR_REGNUM 67 /* Link register */ | |
46 | #define CTR_REGNUM 68 /* Count register */ | |
47 | ||
48 | /* If the kernel has to deliver a signal, it pushes a sigcontext | |
49 | structure on the stack and then calls the signal handler, passing | |
50 | the address of the sigcontext in an argument register. Usually | |
51 | the signal handler doesn't save this register, so we have to | |
52 | access the sigcontext structure via an offset from the signal handler | |
53 | frame. | |
54 | The following constants were determined by experimentation on AIX 3.2. */ | |
55 | #define SIG_FRAME_PC_OFFSET 96 | |
56 | #define SIG_FRAME_LR_OFFSET 108 | |
57 | #define SIG_FRAME_FP_OFFSET 284 | |
58 | ||
7a78ae4e ND |
59 | /* To be used by skip_prologue. */ |
60 | ||
61 | struct rs6000_framedata | |
62 | { | |
63 | int offset; /* total size of frame --- the distance | |
64 | by which we decrement sp to allocate | |
65 | the frame */ | |
66 | int saved_gpr; /* smallest # of saved gpr */ | |
67 | int saved_fpr; /* smallest # of saved fpr */ | |
68 | int alloca_reg; /* alloca register number (frame ptr) */ | |
69 | char frameless; /* true if frameless functions. */ | |
70 | char nosavedpc; /* true if pc not saved. */ | |
71 | int gpr_offset; /* offset of saved gprs from prev sp */ | |
72 | int fpr_offset; /* offset of saved fprs from prev sp */ | |
73 | int lr_offset; /* offset of saved lr */ | |
74 | int cr_offset; /* offset of saved cr */ | |
75 | }; | |
76 | ||
77 | /* Description of a single register. */ | |
78 | ||
79 | struct reg | |
80 | { | |
81 | char *name; /* name of register */ | |
82 | unsigned char sz32; /* size on 32-bit arch, 0 if nonextant */ | |
83 | unsigned char sz64; /* size on 64-bit arch, 0 if nonextant */ | |
84 | unsigned char fpr; /* whether register is floating-point */ | |
85 | }; | |
86 | ||
87 | /* Private data that this module attaches to struct gdbarch. */ | |
88 | ||
89 | struct gdbarch_tdep | |
90 | { | |
91 | int wordsize; /* size in bytes of fixed-point word */ | |
92 | int *regoff; /* byte offsets in register arrays */ | |
93 | const struct reg *regs; /* from current variant */ | |
94 | }; | |
c906108c | 95 | |
7a78ae4e ND |
96 | /* Return the current architecture's gdbarch_tdep structure. */ |
97 | ||
98 | #define TDEP gdbarch_tdep (current_gdbarch) | |
c906108c SS |
99 | |
100 | /* Breakpoint shadows for the single step instructions will be kept here. */ | |
101 | ||
c5aa993b JM |
102 | static struct sstep_breaks |
103 | { | |
104 | /* Address, or 0 if this is not in use. */ | |
105 | CORE_ADDR address; | |
106 | /* Shadow contents. */ | |
107 | char data[4]; | |
108 | } | |
109 | stepBreaks[2]; | |
c906108c SS |
110 | |
111 | /* Hook for determining the TOC address when calling functions in the | |
112 | inferior under AIX. The initialization code in rs6000-nat.c sets | |
113 | this hook to point to find_toc_address. */ | |
114 | ||
7a78ae4e ND |
115 | CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR) = NULL; |
116 | ||
117 | /* Hook to set the current architecture when starting a child process. | |
118 | rs6000-nat.c sets this. */ | |
119 | ||
120 | void (*rs6000_set_host_arch_hook) (int) = NULL; | |
c906108c SS |
121 | |
122 | /* Static function prototypes */ | |
123 | ||
a14ed312 KB |
124 | static CORE_ADDR branch_dest (int opcode, int instr, CORE_ADDR pc, |
125 | CORE_ADDR safety); | |
7a78ae4e ND |
126 | static CORE_ADDR skip_prologue (CORE_ADDR, struct rs6000_framedata *); |
127 | static void frame_get_saved_regs (struct frame_info * fi, | |
128 | struct rs6000_framedata * fdatap); | |
129 | static CORE_ADDR frame_initial_stack_address (struct frame_info *); | |
c906108c | 130 | |
7a78ae4e | 131 | /* Read a LEN-byte address from debugged memory address MEMADDR. */ |
c906108c | 132 | |
7a78ae4e ND |
133 | static CORE_ADDR |
134 | read_memory_addr (CORE_ADDR memaddr, int len) | |
135 | { | |
136 | return read_memory_unsigned_integer (memaddr, len); | |
137 | } | |
c906108c | 138 | |
7a78ae4e ND |
139 | static CORE_ADDR |
140 | rs6000_skip_prologue (CORE_ADDR pc) | |
b83266a0 SS |
141 | { |
142 | struct rs6000_framedata frame; | |
143 | pc = skip_prologue (pc, &frame); | |
144 | return pc; | |
145 | } | |
146 | ||
147 | ||
c906108c SS |
148 | /* Fill in fi->saved_regs */ |
149 | ||
150 | struct frame_extra_info | |
151 | { | |
152 | /* Functions calling alloca() change the value of the stack | |
153 | pointer. We need to use initial stack pointer (which is saved in | |
154 | r31 by gcc) in such cases. If a compiler emits traceback table, | |
155 | then we should use the alloca register specified in traceback | |
156 | table. FIXME. */ | |
c5aa993b | 157 | CORE_ADDR initial_sp; /* initial stack pointer. */ |
c906108c SS |
158 | }; |
159 | ||
7a78ae4e ND |
160 | static void |
161 | rs6000_init_extra_frame_info (int fromleaf, struct frame_info *fi) | |
c906108c | 162 | { |
c5aa993b | 163 | fi->extra_info = (struct frame_extra_info *) |
c906108c SS |
164 | frame_obstack_alloc (sizeof (struct frame_extra_info)); |
165 | fi->extra_info->initial_sp = 0; | |
166 | if (fi->next != (CORE_ADDR) 0 | |
167 | && fi->pc < TEXT_SEGMENT_BASE) | |
7a292a7a | 168 | /* We're in get_prev_frame */ |
c906108c SS |
169 | /* and this is a special signal frame. */ |
170 | /* (fi->pc will be some low address in the kernel, */ | |
171 | /* to which the signal handler returns). */ | |
172 | fi->signal_handler_caller = 1; | |
173 | } | |
174 | ||
7a78ae4e ND |
175 | /* Put here the code to store, into a struct frame_saved_regs, |
176 | the addresses of the saved registers of frame described by FRAME_INFO. | |
177 | This includes special registers such as pc and fp saved in special | |
178 | ways in the stack frame. sp is even more special: | |
179 | the address we return for it IS the sp for the next frame. */ | |
c906108c | 180 | |
7a78ae4e ND |
181 | /* In this implementation for RS/6000, we do *not* save sp. I am |
182 | not sure if it will be needed. The following function takes care of gpr's | |
183 | and fpr's only. */ | |
184 | ||
185 | static void | |
186 | rs6000_frame_init_saved_regs (struct frame_info *fi) | |
c906108c SS |
187 | { |
188 | frame_get_saved_regs (fi, NULL); | |
189 | } | |
190 | ||
7a78ae4e ND |
191 | static CORE_ADDR |
192 | rs6000_frame_args_address (struct frame_info *fi) | |
c906108c SS |
193 | { |
194 | if (fi->extra_info->initial_sp != 0) | |
195 | return fi->extra_info->initial_sp; | |
196 | else | |
197 | return frame_initial_stack_address (fi); | |
198 | } | |
199 | ||
7a78ae4e ND |
200 | /* Immediately after a function call, return the saved pc. |
201 | Can't go through the frames for this because on some machines | |
202 | the new frame is not set up until the new function executes | |
203 | some instructions. */ | |
204 | ||
205 | static CORE_ADDR | |
206 | rs6000_saved_pc_after_call (struct frame_info *fi) | |
207 | { | |
208 | return read_register (LR_REGNUM); | |
209 | } | |
c906108c SS |
210 | |
211 | /* Calculate the destination of a branch/jump. Return -1 if not a branch. */ | |
212 | ||
213 | static CORE_ADDR | |
7a78ae4e | 214 | branch_dest (int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety) |
c906108c SS |
215 | { |
216 | CORE_ADDR dest; | |
217 | int immediate; | |
218 | int absolute; | |
219 | int ext_op; | |
220 | ||
221 | absolute = (int) ((instr >> 1) & 1); | |
222 | ||
c5aa993b JM |
223 | switch (opcode) |
224 | { | |
225 | case 18: | |
226 | immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */ | |
227 | if (absolute) | |
228 | dest = immediate; | |
229 | else | |
230 | dest = pc + immediate; | |
231 | break; | |
232 | ||
233 | case 16: | |
234 | immediate = ((instr & ~3) << 16) >> 16; /* br conditional */ | |
235 | if (absolute) | |
236 | dest = immediate; | |
237 | else | |
238 | dest = pc + immediate; | |
239 | break; | |
240 | ||
241 | case 19: | |
242 | ext_op = (instr >> 1) & 0x3ff; | |
243 | ||
244 | if (ext_op == 16) /* br conditional register */ | |
245 | { | |
246 | dest = read_register (LR_REGNUM) & ~3; | |
247 | ||
248 | /* If we are about to return from a signal handler, dest is | |
249 | something like 0x3c90. The current frame is a signal handler | |
250 | caller frame, upon completion of the sigreturn system call | |
251 | execution will return to the saved PC in the frame. */ | |
252 | if (dest < TEXT_SEGMENT_BASE) | |
253 | { | |
254 | struct frame_info *fi; | |
255 | ||
256 | fi = get_current_frame (); | |
257 | if (fi != NULL) | |
7a78ae4e ND |
258 | dest = read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET, |
259 | TDEP->wordsize); | |
c5aa993b JM |
260 | } |
261 | } | |
262 | ||
263 | else if (ext_op == 528) /* br cond to count reg */ | |
264 | { | |
265 | dest = read_register (CTR_REGNUM) & ~3; | |
266 | ||
267 | /* If we are about to execute a system call, dest is something | |
268 | like 0x22fc or 0x3b00. Upon completion the system call | |
269 | will return to the address in the link register. */ | |
270 | if (dest < TEXT_SEGMENT_BASE) | |
c906108c | 271 | dest = read_register (LR_REGNUM) & ~3; |
c5aa993b JM |
272 | } |
273 | else | |
274 | return -1; | |
275 | break; | |
c906108c | 276 | |
c5aa993b JM |
277 | default: |
278 | return -1; | |
279 | } | |
c906108c SS |
280 | return (dest < TEXT_SEGMENT_BASE) ? safety : dest; |
281 | } | |
282 | ||
283 | ||
284 | /* Sequence of bytes for breakpoint instruction. */ | |
285 | ||
286 | #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 } | |
287 | #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d } | |
288 | ||
7a78ae4e ND |
289 | static unsigned char * |
290 | rs6000_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size) | |
c906108c SS |
291 | { |
292 | static unsigned char big_breakpoint[] = BIG_BREAKPOINT; | |
293 | static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT; | |
294 | *bp_size = 4; | |
295 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) | |
296 | return big_breakpoint; | |
297 | else | |
298 | return little_breakpoint; | |
299 | } | |
300 | ||
301 | ||
302 | /* AIX does not support PT_STEP. Simulate it. */ | |
303 | ||
304 | void | |
7a78ae4e | 305 | rs6000_software_single_step (unsigned int signal, int insert_breakpoints_p) |
c906108c SS |
306 | { |
307 | #define INSNLEN(OPCODE) 4 | |
308 | ||
309 | static char le_breakp[] = LITTLE_BREAKPOINT; | |
310 | static char be_breakp[] = BIG_BREAKPOINT; | |
311 | char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp; | |
312 | int ii, insn; | |
313 | CORE_ADDR loc; | |
314 | CORE_ADDR breaks[2]; | |
315 | int opcode; | |
316 | ||
c5aa993b JM |
317 | if (insert_breakpoints_p) |
318 | { | |
c906108c | 319 | |
c5aa993b | 320 | loc = read_pc (); |
c906108c | 321 | |
c5aa993b | 322 | insn = read_memory_integer (loc, 4); |
c906108c | 323 | |
c5aa993b JM |
324 | breaks[0] = loc + INSNLEN (insn); |
325 | opcode = insn >> 26; | |
326 | breaks[1] = branch_dest (opcode, insn, loc, breaks[0]); | |
c906108c | 327 | |
c5aa993b JM |
328 | /* Don't put two breakpoints on the same address. */ |
329 | if (breaks[1] == breaks[0]) | |
330 | breaks[1] = -1; | |
c906108c | 331 | |
c5aa993b | 332 | stepBreaks[1].address = 0; |
c906108c | 333 | |
c5aa993b JM |
334 | for (ii = 0; ii < 2; ++ii) |
335 | { | |
c906108c | 336 | |
c5aa993b JM |
337 | /* ignore invalid breakpoint. */ |
338 | if (breaks[ii] == -1) | |
339 | continue; | |
c906108c | 340 | |
c5aa993b | 341 | read_memory (breaks[ii], stepBreaks[ii].data, 4); |
c906108c | 342 | |
c5aa993b JM |
343 | write_memory (breaks[ii], breakp, 4); |
344 | stepBreaks[ii].address = breaks[ii]; | |
345 | } | |
c906108c | 346 | |
c5aa993b JM |
347 | } |
348 | else | |
349 | { | |
c906108c | 350 | |
c5aa993b JM |
351 | /* remove step breakpoints. */ |
352 | for (ii = 0; ii < 2; ++ii) | |
353 | if (stepBreaks[ii].address != 0) | |
354 | write_memory | |
355 | (stepBreaks[ii].address, stepBreaks[ii].data, 4); | |
c906108c | 356 | |
c5aa993b | 357 | } |
c906108c | 358 | errno = 0; /* FIXME, don't ignore errors! */ |
c5aa993b | 359 | /* What errors? {read,write}_memory call error(). */ |
c906108c SS |
360 | } |
361 | ||
362 | ||
363 | /* return pc value after skipping a function prologue and also return | |
364 | information about a function frame. | |
365 | ||
366 | in struct rs6000_framedata fdata: | |
c5aa993b JM |
367 | - frameless is TRUE, if function does not have a frame. |
368 | - nosavedpc is TRUE, if function does not save %pc value in its frame. | |
369 | - offset is the initial size of this stack frame --- the amount by | |
370 | which we decrement the sp to allocate the frame. | |
371 | - saved_gpr is the number of the first saved gpr. | |
372 | - saved_fpr is the number of the first saved fpr. | |
373 | - alloca_reg is the number of the register used for alloca() handling. | |
374 | Otherwise -1. | |
375 | - gpr_offset is the offset of the first saved gpr from the previous frame. | |
376 | - fpr_offset is the offset of the first saved fpr from the previous frame. | |
377 | - lr_offset is the offset of the saved lr | |
378 | - cr_offset is the offset of the saved cr | |
379 | */ | |
c906108c SS |
380 | |
381 | #define SIGNED_SHORT(x) \ | |
382 | ((sizeof (short) == 2) \ | |
383 | ? ((int)(short)(x)) \ | |
384 | : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000))) | |
385 | ||
386 | #define GET_SRC_REG(x) (((x) >> 21) & 0x1f) | |
387 | ||
7a78ae4e | 388 | static CORE_ADDR |
ddb20c56 | 389 | skip_prologue (CORE_ADDR pc, struct rs6000_framedata *fdata) |
c906108c SS |
390 | { |
391 | CORE_ADDR orig_pc = pc; | |
ddb20c56 | 392 | CORE_ADDR last_prologue_pc; |
c906108c SS |
393 | char buf[4]; |
394 | unsigned long op; | |
395 | long offset = 0; | |
482ca3f5 KB |
396 | int lr_reg = -1; |
397 | int cr_reg = -1; | |
c906108c SS |
398 | int reg; |
399 | int framep = 0; | |
400 | int minimal_toc_loaded = 0; | |
ddb20c56 | 401 | int prev_insn_was_prologue_insn = 1; |
c906108c | 402 | |
ddb20c56 | 403 | memset (fdata, 0, sizeof (struct rs6000_framedata)); |
c906108c SS |
404 | fdata->saved_gpr = -1; |
405 | fdata->saved_fpr = -1; | |
406 | fdata->alloca_reg = -1; | |
407 | fdata->frameless = 1; | |
408 | fdata->nosavedpc = 1; | |
409 | ||
c906108c SS |
410 | pc -= 4; |
411 | for (;;) | |
412 | { | |
413 | pc += 4; | |
ddb20c56 KB |
414 | |
415 | /* Sometimes it isn't clear if an instruction is a prologue | |
416 | instruction or not. When we encounter one of these ambiguous | |
417 | cases, we'll set prev_insn_was_prologue_insn to 0 (false). | |
418 | Otherwise, we'll assume that it really is a prologue instruction. */ | |
419 | if (prev_insn_was_prologue_insn) | |
420 | last_prologue_pc = pc; | |
421 | prev_insn_was_prologue_insn = 1; | |
422 | ||
423 | if (target_read_memory (pc, buf, 4)) | |
424 | break; | |
425 | op = extract_signed_integer (buf, 4); | |
c906108c | 426 | |
c5aa993b JM |
427 | if ((op & 0xfc1fffff) == 0x7c0802a6) |
428 | { /* mflr Rx */ | |
429 | lr_reg = (op & 0x03e00000) | 0x90010000; | |
430 | continue; | |
c906108c | 431 | |
c5aa993b JM |
432 | } |
433 | else if ((op & 0xfc1fffff) == 0x7c000026) | |
434 | { /* mfcr Rx */ | |
435 | cr_reg = (op & 0x03e00000) | 0x90010000; | |
436 | continue; | |
c906108c | 437 | |
c906108c | 438 | } |
c5aa993b JM |
439 | else if ((op & 0xfc1f0000) == 0xd8010000) |
440 | { /* stfd Rx,NUM(r1) */ | |
441 | reg = GET_SRC_REG (op); | |
442 | if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg) | |
443 | { | |
444 | fdata->saved_fpr = reg; | |
445 | fdata->fpr_offset = SIGNED_SHORT (op) + offset; | |
446 | } | |
447 | continue; | |
c906108c | 448 | |
c5aa993b JM |
449 | } |
450 | else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */ | |
7a78ae4e ND |
451 | (((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */ |
452 | (op & 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */ | |
453 | (op & 0x03e00000) >= 0x01a00000)) /* rx >= r13 */ | |
c5aa993b JM |
454 | { |
455 | ||
456 | reg = GET_SRC_REG (op); | |
457 | if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg) | |
458 | { | |
459 | fdata->saved_gpr = reg; | |
7a78ae4e ND |
460 | if ((op & 0xfc1f0003) == 0xf8010000) |
461 | op = (op >> 1) << 1; | |
c5aa993b JM |
462 | fdata->gpr_offset = SIGNED_SHORT (op) + offset; |
463 | } | |
464 | continue; | |
c906108c | 465 | |
ddb20c56 KB |
466 | } |
467 | else if ((op & 0xffff0000) == 0x60000000) | |
468 | { | |
469 | /* nop */ | |
470 | /* Allow nops in the prologue, but do not consider them to | |
471 | be part of the prologue unless followed by other prologue | |
472 | instructions. */ | |
473 | prev_insn_was_prologue_insn = 0; | |
474 | continue; | |
475 | ||
c906108c | 476 | } |
c5aa993b JM |
477 | else if ((op & 0xffff0000) == 0x3c000000) |
478 | { /* addis 0,0,NUM, used | |
479 | for >= 32k frames */ | |
480 | fdata->offset = (op & 0x0000ffff) << 16; | |
481 | fdata->frameless = 0; | |
482 | continue; | |
483 | ||
484 | } | |
485 | else if ((op & 0xffff0000) == 0x60000000) | |
486 | { /* ori 0,0,NUM, 2nd ha | |
487 | lf of >= 32k frames */ | |
488 | fdata->offset |= (op & 0x0000ffff); | |
489 | fdata->frameless = 0; | |
490 | continue; | |
491 | ||
492 | } | |
482ca3f5 | 493 | else if (lr_reg != -1 && (op & 0xffff0000) == lr_reg) |
c5aa993b JM |
494 | { /* st Rx,NUM(r1) |
495 | where Rx == lr */ | |
496 | fdata->lr_offset = SIGNED_SHORT (op) + offset; | |
497 | fdata->nosavedpc = 0; | |
498 | lr_reg = 0; | |
499 | continue; | |
500 | ||
501 | } | |
482ca3f5 | 502 | else if (cr_reg != -1 && (op & 0xffff0000) == cr_reg) |
c5aa993b JM |
503 | { /* st Rx,NUM(r1) |
504 | where Rx == cr */ | |
505 | fdata->cr_offset = SIGNED_SHORT (op) + offset; | |
506 | cr_reg = 0; | |
507 | continue; | |
508 | ||
509 | } | |
510 | else if (op == 0x48000005) | |
511 | { /* bl .+4 used in | |
512 | -mrelocatable */ | |
513 | continue; | |
514 | ||
515 | } | |
516 | else if (op == 0x48000004) | |
517 | { /* b .+4 (xlc) */ | |
518 | break; | |
519 | ||
520 | } | |
521 | else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used | |
c906108c | 522 | in V.4 -mrelocatable */ |
c5aa993b JM |
523 | op == 0x7fc0f214) && /* add r30,r0,r30, used |
524 | in V.4 -mrelocatable */ | |
525 | lr_reg == 0x901e0000) | |
526 | { | |
527 | continue; | |
c906108c | 528 | |
c5aa993b JM |
529 | } |
530 | else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used | |
c906108c | 531 | in V.4 -mminimal-toc */ |
c5aa993b JM |
532 | (op & 0xffff0000) == 0x3bde0000) |
533 | { /* addi 30,30,foo@l */ | |
534 | continue; | |
c906108c | 535 | |
c5aa993b JM |
536 | } |
537 | else if ((op & 0xfc000001) == 0x48000001) | |
538 | { /* bl foo, | |
539 | to save fprs??? */ | |
c906108c | 540 | |
c5aa993b JM |
541 | fdata->frameless = 0; |
542 | /* Don't skip over the subroutine call if it is not within the first | |
543 | three instructions of the prologue. */ | |
544 | if ((pc - orig_pc) > 8) | |
545 | break; | |
546 | ||
547 | op = read_memory_integer (pc + 4, 4); | |
548 | ||
549 | /* At this point, make sure this is not a trampoline function | |
550 | (a function that simply calls another functions, and nothing else). | |
551 | If the next is not a nop, this branch was part of the function | |
552 | prologue. */ | |
553 | ||
554 | if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */ | |
555 | break; /* don't skip over | |
556 | this branch */ | |
557 | continue; | |
558 | ||
559 | /* update stack pointer */ | |
560 | } | |
7a78ae4e ND |
561 | else if ((op & 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */ |
562 | (op & 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */ | |
563 | { | |
c5aa993b | 564 | fdata->frameless = 0; |
7a78ae4e ND |
565 | if ((op & 0xffff0003) == 0xf8210001) |
566 | op = (op >> 1) << 1; | |
c5aa993b JM |
567 | fdata->offset = SIGNED_SHORT (op); |
568 | offset = fdata->offset; | |
569 | continue; | |
570 | ||
571 | } | |
572 | else if (op == 0x7c21016e) | |
573 | { /* stwux 1,1,0 */ | |
574 | fdata->frameless = 0; | |
575 | offset = fdata->offset; | |
576 | continue; | |
577 | ||
578 | /* Load up minimal toc pointer */ | |
579 | } | |
580 | else if ((op >> 22) == 0x20f | |
581 | && !minimal_toc_loaded) | |
582 | { /* l r31,... or l r30,... */ | |
583 | minimal_toc_loaded = 1; | |
584 | continue; | |
585 | ||
f6077098 KB |
586 | /* move parameters from argument registers to local variable |
587 | registers */ | |
588 | } | |
589 | else if ((op & 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */ | |
590 | (((op >> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */ | |
591 | (((op >> 21) & 31) <= 10) && | |
592 | (((op >> 16) & 31) >= fdata->saved_gpr)) /* Rx: local var reg */ | |
593 | { | |
594 | continue; | |
595 | ||
c5aa993b JM |
596 | /* store parameters in stack */ |
597 | } | |
598 | else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */ | |
7a78ae4e | 599 | (op & 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */ |
c5aa993b | 600 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ |
7a78ae4e ND |
601 | (op & 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */ |
602 | { | |
c5aa993b | 603 | continue; |
c906108c | 604 | |
c5aa993b JM |
605 | /* store parameters in stack via frame pointer */ |
606 | } | |
607 | else if (framep && | |
608 | ((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */ | |
609 | (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */ | |
610 | (op & 0xfc1f0000) == 0xfc1f0000)) | |
611 | { /* frsp, fp?,NUM(r1) */ | |
612 | continue; | |
613 | ||
614 | /* Set up frame pointer */ | |
615 | } | |
616 | else if (op == 0x603f0000 /* oril r31, r1, 0x0 */ | |
617 | || op == 0x7c3f0b78) | |
618 | { /* mr r31, r1 */ | |
619 | fdata->frameless = 0; | |
620 | framep = 1; | |
621 | fdata->alloca_reg = 31; | |
622 | continue; | |
623 | ||
624 | /* Another way to set up the frame pointer. */ | |
625 | } | |
626 | else if ((op & 0xfc1fffff) == 0x38010000) | |
627 | { /* addi rX, r1, 0x0 */ | |
628 | fdata->frameless = 0; | |
629 | framep = 1; | |
630 | fdata->alloca_reg = (op & ~0x38010000) >> 21; | |
631 | continue; | |
632 | ||
633 | } | |
634 | else | |
635 | { | |
636 | break; | |
637 | } | |
c906108c SS |
638 | } |
639 | ||
640 | #if 0 | |
641 | /* I have problems with skipping over __main() that I need to address | |
642 | * sometime. Previously, I used to use misc_function_vector which | |
643 | * didn't work as well as I wanted to be. -MGO */ | |
644 | ||
645 | /* If the first thing after skipping a prolog is a branch to a function, | |
646 | this might be a call to an initializer in main(), introduced by gcc2. | |
647 | We'd like to skip over it as well. Fortunately, xlc does some extra | |
648 | work before calling a function right after a prologue, thus we can | |
649 | single out such gcc2 behaviour. */ | |
c906108c | 650 | |
c906108c | 651 | |
c5aa993b JM |
652 | if ((op & 0xfc000001) == 0x48000001) |
653 | { /* bl foo, an initializer function? */ | |
654 | op = read_memory_integer (pc + 4, 4); | |
655 | ||
656 | if (op == 0x4def7b82) | |
657 | { /* cror 0xf, 0xf, 0xf (nop) */ | |
c906108c | 658 | |
c5aa993b JM |
659 | /* check and see if we are in main. If so, skip over this initializer |
660 | function as well. */ | |
c906108c | 661 | |
c5aa993b JM |
662 | tmp = find_pc_misc_function (pc); |
663 | if (tmp >= 0 && STREQ (misc_function_vector[tmp].name, "main")) | |
664 | return pc + 8; | |
665 | } | |
c906108c | 666 | } |
c906108c | 667 | #endif /* 0 */ |
c5aa993b JM |
668 | |
669 | fdata->offset = -fdata->offset; | |
ddb20c56 | 670 | return last_prologue_pc; |
c906108c SS |
671 | } |
672 | ||
673 | ||
674 | /************************************************************************* | |
f6077098 | 675 | Support for creating pushing a dummy frame into the stack, and popping |
c906108c SS |
676 | frames, etc. |
677 | *************************************************************************/ | |
678 | ||
c906108c SS |
679 | extern int stop_stack_dummy; |
680 | ||
c906108c | 681 | |
7a78ae4e | 682 | /* Pop the innermost frame, go back to the caller. */ |
c5aa993b | 683 | |
c906108c | 684 | static void |
7a78ae4e | 685 | rs6000_pop_frame (void) |
c906108c | 686 | { |
470d5666 | 687 | CORE_ADDR pc, lr, sp, prev_sp, addr; /* %pc, %lr, %sp */ |
c906108c SS |
688 | struct rs6000_framedata fdata; |
689 | struct frame_info *frame = get_current_frame (); | |
470d5666 | 690 | int ii, wordsize; |
c906108c SS |
691 | |
692 | pc = read_pc (); | |
693 | sp = FRAME_FP (frame); | |
694 | ||
695 | if (stop_stack_dummy) | |
696 | { | |
7a78ae4e ND |
697 | generic_pop_dummy_frame (); |
698 | flush_cached_frames (); | |
699 | return; | |
c906108c SS |
700 | } |
701 | ||
702 | /* Make sure that all registers are valid. */ | |
703 | read_register_bytes (0, NULL, REGISTER_BYTES); | |
704 | ||
705 | /* figure out previous %pc value. If the function is frameless, it is | |
706 | still in the link register, otherwise walk the frames and retrieve the | |
707 | saved %pc value in the previous frame. */ | |
708 | ||
709 | addr = get_pc_function_start (frame->pc); | |
710 | (void) skip_prologue (addr, &fdata); | |
711 | ||
7a78ae4e | 712 | wordsize = TDEP->wordsize; |
c906108c SS |
713 | if (fdata.frameless) |
714 | prev_sp = sp; | |
715 | else | |
7a78ae4e | 716 | prev_sp = read_memory_addr (sp, wordsize); |
c906108c SS |
717 | if (fdata.lr_offset == 0) |
718 | lr = read_register (LR_REGNUM); | |
719 | else | |
7a78ae4e | 720 | lr = read_memory_addr (prev_sp + fdata.lr_offset, wordsize); |
c906108c SS |
721 | |
722 | /* reset %pc value. */ | |
723 | write_register (PC_REGNUM, lr); | |
724 | ||
725 | /* reset register values if any was saved earlier. */ | |
726 | ||
727 | if (fdata.saved_gpr != -1) | |
728 | { | |
729 | addr = prev_sp + fdata.gpr_offset; | |
c5aa993b JM |
730 | for (ii = fdata.saved_gpr; ii <= 31; ++ii) |
731 | { | |
7a78ae4e ND |
732 | read_memory (addr, ®isters[REGISTER_BYTE (ii)], wordsize); |
733 | addr += wordsize; | |
c5aa993b | 734 | } |
c906108c SS |
735 | } |
736 | ||
737 | if (fdata.saved_fpr != -1) | |
738 | { | |
739 | addr = prev_sp + fdata.fpr_offset; | |
c5aa993b JM |
740 | for (ii = fdata.saved_fpr; ii <= 31; ++ii) |
741 | { | |
742 | read_memory (addr, ®isters[REGISTER_BYTE (ii + FP0_REGNUM)], 8); | |
743 | addr += 8; | |
744 | } | |
c906108c SS |
745 | } |
746 | ||
747 | write_register (SP_REGNUM, prev_sp); | |
748 | target_store_registers (-1); | |
749 | flush_cached_frames (); | |
750 | } | |
751 | ||
7a78ae4e ND |
752 | /* Fixup the call sequence of a dummy function, with the real function |
753 | address. Its arguments will be passed by gdb. */ | |
c906108c | 754 | |
7a78ae4e ND |
755 | static void |
756 | rs6000_fix_call_dummy (char *dummyname, CORE_ADDR pc, CORE_ADDR fun, | |
757 | int nargs, value_ptr *args, struct type *type, | |
758 | int gcc_p) | |
c906108c SS |
759 | { |
760 | #define TOC_ADDR_OFFSET 20 | |
761 | #define TARGET_ADDR_OFFSET 28 | |
762 | ||
763 | int ii; | |
764 | CORE_ADDR target_addr; | |
765 | ||
7a78ae4e | 766 | if (rs6000_find_toc_address_hook != NULL) |
f6077098 | 767 | { |
7a78ae4e ND |
768 | CORE_ADDR tocvalue = (*rs6000_find_toc_address_hook) (fun); |
769 | write_register (TOC_REGNUM, tocvalue); | |
f6077098 | 770 | } |
c906108c SS |
771 | } |
772 | ||
7a78ae4e | 773 | /* Pass the arguments in either registers, or in the stack. In RS/6000, |
c906108c SS |
774 | the first eight words of the argument list (that might be less than |
775 | eight parameters if some parameters occupy more than one word) are | |
7a78ae4e | 776 | passed in r3..r10 registers. float and double parameters are |
c906108c SS |
777 | passed in fpr's, in addition to that. Rest of the parameters if any |
778 | are passed in user stack. There might be cases in which half of the | |
779 | parameter is copied into registers, the other half is pushed into | |
780 | stack. | |
781 | ||
7a78ae4e ND |
782 | Stack must be aligned on 64-bit boundaries when synthesizing |
783 | function calls. | |
784 | ||
c906108c SS |
785 | If the function is returning a structure, then the return address is passed |
786 | in r3, then the first 7 words of the parameters can be passed in registers, | |
787 | starting from r4. */ | |
788 | ||
7a78ae4e ND |
789 | static CORE_ADDR |
790 | rs6000_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp, | |
791 | int struct_return, CORE_ADDR struct_addr) | |
c906108c SS |
792 | { |
793 | int ii; | |
794 | int len = 0; | |
c5aa993b JM |
795 | int argno; /* current argument number */ |
796 | int argbytes; /* current argument byte */ | |
797 | char tmp_buffer[50]; | |
798 | int f_argno = 0; /* current floating point argno */ | |
7a78ae4e | 799 | int wordsize = TDEP->wordsize; |
c906108c SS |
800 | |
801 | value_ptr arg = 0; | |
802 | struct type *type; | |
803 | ||
804 | CORE_ADDR saved_sp; | |
805 | ||
c906108c SS |
806 | /* The first eight words of ther arguments are passed in registers. Copy |
807 | them appropriately. | |
808 | ||
809 | If the function is returning a `struct', then the first word (which | |
810 | will be passed in r3) is used for struct return address. In that | |
811 | case we should advance one word and start from r4 register to copy | |
812 | parameters. */ | |
813 | ||
c5aa993b | 814 | ii = struct_return ? 1 : 0; |
c906108c SS |
815 | |
816 | /* | |
c5aa993b JM |
817 | effectively indirect call... gcc does... |
818 | ||
819 | return_val example( float, int); | |
820 | ||
821 | eabi: | |
822 | float in fp0, int in r3 | |
823 | offset of stack on overflow 8/16 | |
824 | for varargs, must go by type. | |
825 | power open: | |
826 | float in r3&r4, int in r5 | |
827 | offset of stack on overflow different | |
828 | both: | |
829 | return in r3 or f0. If no float, must study how gcc emulates floats; | |
830 | pay attention to arg promotion. | |
831 | User may have to cast\args to handle promotion correctly | |
832 | since gdb won't know if prototype supplied or not. | |
833 | */ | |
c906108c | 834 | |
c5aa993b JM |
835 | for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii) |
836 | { | |
f6077098 | 837 | int reg_size = REGISTER_RAW_SIZE (ii + 3); |
c5aa993b JM |
838 | |
839 | arg = args[argno]; | |
840 | type = check_typedef (VALUE_TYPE (arg)); | |
841 | len = TYPE_LENGTH (type); | |
842 | ||
843 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
844 | { | |
845 | ||
846 | /* floating point arguments are passed in fpr's, as well as gpr's. | |
847 | There are 13 fpr's reserved for passing parameters. At this point | |
848 | there is no way we would run out of them. */ | |
849 | ||
850 | if (len > 8) | |
851 | printf_unfiltered ( | |
852 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); | |
853 | ||
854 | memcpy (®isters[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)], | |
855 | VALUE_CONTENTS (arg), | |
856 | len); | |
857 | ++f_argno; | |
858 | } | |
859 | ||
f6077098 | 860 | if (len > reg_size) |
c5aa993b JM |
861 | { |
862 | ||
863 | /* Argument takes more than one register. */ | |
864 | while (argbytes < len) | |
865 | { | |
f6077098 | 866 | memset (®isters[REGISTER_BYTE (ii + 3)], 0, reg_size); |
c5aa993b JM |
867 | memcpy (®isters[REGISTER_BYTE (ii + 3)], |
868 | ((char *) VALUE_CONTENTS (arg)) + argbytes, | |
f6077098 KB |
869 | (len - argbytes) > reg_size |
870 | ? reg_size : len - argbytes); | |
871 | ++ii, argbytes += reg_size; | |
c5aa993b JM |
872 | |
873 | if (ii >= 8) | |
874 | goto ran_out_of_registers_for_arguments; | |
875 | } | |
876 | argbytes = 0; | |
877 | --ii; | |
878 | } | |
879 | else | |
880 | { /* Argument can fit in one register. No problem. */ | |
f6077098 KB |
881 | int adj = TARGET_BYTE_ORDER == BIG_ENDIAN ? reg_size - len : 0; |
882 | memset (®isters[REGISTER_BYTE (ii + 3)], 0, reg_size); | |
883 | memcpy ((char *)®isters[REGISTER_BYTE (ii + 3)] + adj, | |
884 | VALUE_CONTENTS (arg), len); | |
c5aa993b JM |
885 | } |
886 | ++argno; | |
c906108c | 887 | } |
c906108c SS |
888 | |
889 | ran_out_of_registers_for_arguments: | |
890 | ||
7a78ae4e | 891 | saved_sp = read_sp (); |
f6077098 | 892 | #ifndef ELF_OBJECT_FORMAT |
7a78ae4e ND |
893 | /* location for 8 parameters are always reserved. */ |
894 | sp -= wordsize * 8; | |
f6077098 | 895 | |
7a78ae4e ND |
896 | /* another six words for back chain, TOC register, link register, etc. */ |
897 | sp -= wordsize * 6; | |
f6077098 | 898 | |
7a78ae4e ND |
899 | /* stack pointer must be quadword aligned */ |
900 | sp &= -16; | |
f6077098 | 901 | #endif |
c906108c | 902 | |
c906108c SS |
903 | /* if there are more arguments, allocate space for them in |
904 | the stack, then push them starting from the ninth one. */ | |
905 | ||
c5aa993b JM |
906 | if ((argno < nargs) || argbytes) |
907 | { | |
908 | int space = 0, jj; | |
c906108c | 909 | |
c5aa993b JM |
910 | if (argbytes) |
911 | { | |
912 | space += ((len - argbytes + 3) & -4); | |
913 | jj = argno + 1; | |
914 | } | |
915 | else | |
916 | jj = argno; | |
c906108c | 917 | |
c5aa993b JM |
918 | for (; jj < nargs; ++jj) |
919 | { | |
920 | value_ptr val = args[jj]; | |
921 | space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4; | |
922 | } | |
c906108c | 923 | |
c5aa993b | 924 | /* add location required for the rest of the parameters */ |
f6077098 | 925 | space = (space + 15) & -16; |
c5aa993b | 926 | sp -= space; |
c906108c | 927 | |
c5aa993b JM |
928 | /* This is another instance we need to be concerned about securing our |
929 | stack space. If we write anything underneath %sp (r1), we might conflict | |
930 | with the kernel who thinks he is free to use this area. So, update %sp | |
931 | first before doing anything else. */ | |
c906108c | 932 | |
c5aa993b | 933 | write_register (SP_REGNUM, sp); |
c906108c | 934 | |
c5aa993b JM |
935 | /* if the last argument copied into the registers didn't fit there |
936 | completely, push the rest of it into stack. */ | |
c906108c | 937 | |
c5aa993b JM |
938 | if (argbytes) |
939 | { | |
940 | write_memory (sp + 24 + (ii * 4), | |
941 | ((char *) VALUE_CONTENTS (arg)) + argbytes, | |
942 | len - argbytes); | |
943 | ++argno; | |
944 | ii += ((len - argbytes + 3) & -4) / 4; | |
945 | } | |
c906108c | 946 | |
c5aa993b JM |
947 | /* push the rest of the arguments into stack. */ |
948 | for (; argno < nargs; ++argno) | |
949 | { | |
c906108c | 950 | |
c5aa993b JM |
951 | arg = args[argno]; |
952 | type = check_typedef (VALUE_TYPE (arg)); | |
953 | len = TYPE_LENGTH (type); | |
c906108c SS |
954 | |
955 | ||
c5aa993b JM |
956 | /* float types should be passed in fpr's, as well as in the stack. */ |
957 | if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13) | |
958 | { | |
c906108c | 959 | |
c5aa993b JM |
960 | if (len > 8) |
961 | printf_unfiltered ( | |
962 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); | |
c906108c | 963 | |
c5aa993b JM |
964 | memcpy (®isters[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)], |
965 | VALUE_CONTENTS (arg), | |
966 | len); | |
967 | ++f_argno; | |
968 | } | |
c906108c | 969 | |
c5aa993b JM |
970 | write_memory (sp + 24 + (ii * 4), (char *) VALUE_CONTENTS (arg), len); |
971 | ii += ((len + 3) & -4) / 4; | |
972 | } | |
c906108c | 973 | } |
c906108c SS |
974 | else |
975 | /* Secure stack areas first, before doing anything else. */ | |
976 | write_register (SP_REGNUM, sp); | |
977 | ||
c906108c SS |
978 | /* set back chain properly */ |
979 | store_address (tmp_buffer, 4, saved_sp); | |
980 | write_memory (sp, tmp_buffer, 4); | |
981 | ||
982 | target_store_registers (-1); | |
983 | return sp; | |
984 | } | |
c906108c SS |
985 | |
986 | /* Function: ppc_push_return_address (pc, sp) | |
987 | Set up the return address for the inferior function call. */ | |
988 | ||
7a78ae4e ND |
989 | static CORE_ADDR |
990 | ppc_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
c906108c SS |
991 | { |
992 | write_register (LR_REGNUM, CALL_DUMMY_ADDRESS ()); | |
993 | return sp; | |
994 | } | |
995 | ||
7a78ae4e ND |
996 | /* Extract a function return value of type TYPE from raw register array |
997 | REGBUF, and copy that return value into VALBUF in virtual format. */ | |
c906108c | 998 | |
7a78ae4e ND |
999 | static void |
1000 | rs6000_extract_return_value (struct type *valtype, char *regbuf, char *valbuf) | |
c906108c SS |
1001 | { |
1002 | int offset = 0; | |
1003 | ||
c5aa993b JM |
1004 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT) |
1005 | { | |
c906108c | 1006 | |
c5aa993b JM |
1007 | double dd; |
1008 | float ff; | |
1009 | /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes. | |
1010 | We need to truncate the return value into float size (4 byte) if | |
1011 | necessary. */ | |
c906108c | 1012 | |
c5aa993b JM |
1013 | if (TYPE_LENGTH (valtype) > 4) /* this is a double */ |
1014 | memcpy (valbuf, | |
1015 | ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], | |
1016 | TYPE_LENGTH (valtype)); | |
1017 | else | |
1018 | { /* float */ | |
1019 | memcpy (&dd, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], 8); | |
1020 | ff = (float) dd; | |
1021 | memcpy (valbuf, &ff, sizeof (float)); | |
1022 | } | |
1023 | } | |
1024 | else | |
1025 | { | |
1026 | /* return value is copied starting from r3. */ | |
1027 | if (TARGET_BYTE_ORDER == BIG_ENDIAN | |
1028 | && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3)) | |
1029 | offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype); | |
1030 | ||
1031 | memcpy (valbuf, | |
1032 | regbuf + REGISTER_BYTE (3) + offset, | |
c906108c | 1033 | TYPE_LENGTH (valtype)); |
c906108c | 1034 | } |
c906108c SS |
1035 | } |
1036 | ||
7a78ae4e | 1037 | /* Keep structure return address in this variable. |
c906108c SS |
1038 | FIXME: This is a horrid kludge which should not be allowed to continue |
1039 | living. This only allows a single nested call to a structure-returning | |
1040 | function. Come on, guys! -- gnu@cygnus.com, Aug 92 */ | |
1041 | ||
7a78ae4e | 1042 | static CORE_ADDR rs6000_struct_return_address; |
c906108c SS |
1043 | |
1044 | /* Indirect function calls use a piece of trampoline code to do context | |
1045 | switching, i.e. to set the new TOC table. Skip such code if we are on | |
1046 | its first instruction (as when we have single-stepped to here). | |
1047 | Also skip shared library trampoline code (which is different from | |
1048 | indirect function call trampolines). | |
1049 | Result is desired PC to step until, or NULL if we are not in | |
1050 | trampoline code. */ | |
1051 | ||
1052 | CORE_ADDR | |
7a78ae4e | 1053 | rs6000_skip_trampoline_code (CORE_ADDR pc) |
c906108c SS |
1054 | { |
1055 | register unsigned int ii, op; | |
1056 | CORE_ADDR solib_target_pc; | |
1057 | ||
c5aa993b JM |
1058 | static unsigned trampoline_code[] = |
1059 | { | |
1060 | 0x800b0000, /* l r0,0x0(r11) */ | |
1061 | 0x90410014, /* st r2,0x14(r1) */ | |
1062 | 0x7c0903a6, /* mtctr r0 */ | |
1063 | 0x804b0004, /* l r2,0x4(r11) */ | |
1064 | 0x816b0008, /* l r11,0x8(r11) */ | |
1065 | 0x4e800420, /* bctr */ | |
1066 | 0x4e800020, /* br */ | |
1067 | 0 | |
c906108c SS |
1068 | }; |
1069 | ||
1070 | /* If pc is in a shared library trampoline, return its target. */ | |
1071 | solib_target_pc = find_solib_trampoline_target (pc); | |
1072 | if (solib_target_pc) | |
1073 | return solib_target_pc; | |
1074 | ||
c5aa993b JM |
1075 | for (ii = 0; trampoline_code[ii]; ++ii) |
1076 | { | |
1077 | op = read_memory_integer (pc + (ii * 4), 4); | |
1078 | if (op != trampoline_code[ii]) | |
1079 | return 0; | |
1080 | } | |
1081 | ii = read_register (11); /* r11 holds destination addr */ | |
7a78ae4e | 1082 | pc = read_memory_addr (ii, TDEP->wordsize); /* (r11) value */ |
c906108c SS |
1083 | return pc; |
1084 | } | |
1085 | ||
1086 | /* Determines whether the function FI has a frame on the stack or not. */ | |
1087 | ||
7a78ae4e | 1088 | static int |
c877c8e6 | 1089 | rs6000_frameless_function_invocation (struct frame_info *fi) |
c906108c SS |
1090 | { |
1091 | CORE_ADDR func_start; | |
1092 | struct rs6000_framedata fdata; | |
1093 | ||
1094 | /* Don't even think about framelessness except on the innermost frame | |
1095 | or if the function was interrupted by a signal. */ | |
1096 | if (fi->next != NULL && !fi->next->signal_handler_caller) | |
1097 | return 0; | |
c5aa993b | 1098 | |
c906108c SS |
1099 | func_start = get_pc_function_start (fi->pc); |
1100 | ||
1101 | /* If we failed to find the start of the function, it is a mistake | |
1102 | to inspect the instructions. */ | |
1103 | ||
1104 | if (!func_start) | |
1105 | { | |
1106 | /* A frame with a zero PC is usually created by dereferencing a NULL | |
c5aa993b JM |
1107 | function pointer, normally causing an immediate core dump of the |
1108 | inferior. Mark function as frameless, as the inferior has no chance | |
1109 | of setting up a stack frame. */ | |
c906108c SS |
1110 | if (fi->pc == 0) |
1111 | return 1; | |
1112 | else | |
1113 | return 0; | |
1114 | } | |
1115 | ||
1116 | (void) skip_prologue (func_start, &fdata); | |
1117 | return fdata.frameless; | |
1118 | } | |
1119 | ||
1120 | /* Return the PC saved in a frame */ | |
1121 | ||
7a78ae4e | 1122 | static CORE_ADDR |
c877c8e6 | 1123 | rs6000_frame_saved_pc (struct frame_info *fi) |
c906108c SS |
1124 | { |
1125 | CORE_ADDR func_start; | |
1126 | struct rs6000_framedata fdata; | |
7a78ae4e | 1127 | int wordsize = TDEP->wordsize; |
c906108c SS |
1128 | |
1129 | if (fi->signal_handler_caller) | |
7a78ae4e | 1130 | return read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET, wordsize); |
c906108c | 1131 | |
7a78ae4e ND |
1132 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) |
1133 | return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM); | |
c906108c SS |
1134 | |
1135 | func_start = get_pc_function_start (fi->pc); | |
1136 | ||
1137 | /* If we failed to find the start of the function, it is a mistake | |
1138 | to inspect the instructions. */ | |
1139 | if (!func_start) | |
1140 | return 0; | |
1141 | ||
1142 | (void) skip_prologue (func_start, &fdata); | |
1143 | ||
1144 | if (fdata.lr_offset == 0 && fi->next != NULL) | |
1145 | { | |
1146 | if (fi->next->signal_handler_caller) | |
7a78ae4e ND |
1147 | return read_memory_addr (fi->next->frame + SIG_FRAME_LR_OFFSET, |
1148 | wordsize); | |
c906108c | 1149 | else |
7a78ae4e ND |
1150 | return read_memory_addr (FRAME_CHAIN (fi) + DEFAULT_LR_SAVE, |
1151 | wordsize); | |
c906108c SS |
1152 | } |
1153 | ||
1154 | if (fdata.lr_offset == 0) | |
1155 | return read_register (LR_REGNUM); | |
1156 | ||
7a78ae4e | 1157 | return read_memory_addr (FRAME_CHAIN (fi) + fdata.lr_offset, wordsize); |
c906108c SS |
1158 | } |
1159 | ||
1160 | /* If saved registers of frame FI are not known yet, read and cache them. | |
1161 | &FDATAP contains rs6000_framedata; TDATAP can be NULL, | |
1162 | in which case the framedata are read. */ | |
1163 | ||
1164 | static void | |
7a78ae4e | 1165 | frame_get_saved_regs (struct frame_info *fi, struct rs6000_framedata *fdatap) |
c906108c | 1166 | { |
c5aa993b | 1167 | CORE_ADDR frame_addr; |
c906108c | 1168 | struct rs6000_framedata work_fdata; |
7a78ae4e | 1169 | int wordsize = TDEP->wordsize; |
c906108c SS |
1170 | |
1171 | if (fi->saved_regs) | |
1172 | return; | |
c5aa993b | 1173 | |
c906108c SS |
1174 | if (fdatap == NULL) |
1175 | { | |
1176 | fdatap = &work_fdata; | |
1177 | (void) skip_prologue (get_pc_function_start (fi->pc), fdatap); | |
1178 | } | |
1179 | ||
1180 | frame_saved_regs_zalloc (fi); | |
1181 | ||
1182 | /* If there were any saved registers, figure out parent's stack | |
1183 | pointer. */ | |
1184 | /* The following is true only if the frame doesn't have a call to | |
1185 | alloca(), FIXME. */ | |
1186 | ||
1187 | if (fdatap->saved_fpr == 0 && fdatap->saved_gpr == 0 | |
1188 | && fdatap->lr_offset == 0 && fdatap->cr_offset == 0) | |
1189 | frame_addr = 0; | |
1190 | else if (fi->prev && fi->prev->frame) | |
1191 | frame_addr = fi->prev->frame; | |
1192 | else | |
7a78ae4e | 1193 | frame_addr = read_memory_addr (fi->frame, wordsize); |
c5aa993b | 1194 | |
c906108c SS |
1195 | /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr. |
1196 | All fpr's from saved_fpr to fp31 are saved. */ | |
1197 | ||
1198 | if (fdatap->saved_fpr >= 0) | |
1199 | { | |
1200 | int i; | |
7a78ae4e | 1201 | CORE_ADDR fpr_addr = frame_addr + fdatap->fpr_offset; |
c906108c SS |
1202 | for (i = fdatap->saved_fpr; i < 32; i++) |
1203 | { | |
7a78ae4e ND |
1204 | fi->saved_regs[FP0_REGNUM + i] = fpr_addr; |
1205 | fpr_addr += 8; | |
c906108c SS |
1206 | } |
1207 | } | |
1208 | ||
1209 | /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr. | |
1210 | All gpr's from saved_gpr to gpr31 are saved. */ | |
1211 | ||
1212 | if (fdatap->saved_gpr >= 0) | |
1213 | { | |
1214 | int i; | |
7a78ae4e | 1215 | CORE_ADDR gpr_addr = frame_addr + fdatap->gpr_offset; |
c906108c SS |
1216 | for (i = fdatap->saved_gpr; i < 32; i++) |
1217 | { | |
7a78ae4e ND |
1218 | fi->saved_regs[i] = gpr_addr; |
1219 | gpr_addr += wordsize; | |
c906108c SS |
1220 | } |
1221 | } | |
1222 | ||
1223 | /* If != 0, fdatap->cr_offset is the offset from the frame that holds | |
1224 | the CR. */ | |
1225 | if (fdatap->cr_offset != 0) | |
c5aa993b | 1226 | fi->saved_regs[CR_REGNUM] = frame_addr + fdatap->cr_offset; |
c906108c SS |
1227 | |
1228 | /* If != 0, fdatap->lr_offset is the offset from the frame that holds | |
1229 | the LR. */ | |
1230 | if (fdatap->lr_offset != 0) | |
c5aa993b | 1231 | fi->saved_regs[LR_REGNUM] = frame_addr + fdatap->lr_offset; |
c906108c SS |
1232 | } |
1233 | ||
1234 | /* Return the address of a frame. This is the inital %sp value when the frame | |
1235 | was first allocated. For functions calling alloca(), it might be saved in | |
1236 | an alloca register. */ | |
1237 | ||
1238 | static CORE_ADDR | |
7a78ae4e | 1239 | frame_initial_stack_address (struct frame_info *fi) |
c906108c SS |
1240 | { |
1241 | CORE_ADDR tmpaddr; | |
1242 | struct rs6000_framedata fdata; | |
1243 | struct frame_info *callee_fi; | |
1244 | ||
1245 | /* if the initial stack pointer (frame address) of this frame is known, | |
1246 | just return it. */ | |
1247 | ||
1248 | if (fi->extra_info->initial_sp) | |
1249 | return fi->extra_info->initial_sp; | |
1250 | ||
1251 | /* find out if this function is using an alloca register.. */ | |
1252 | ||
1253 | (void) skip_prologue (get_pc_function_start (fi->pc), &fdata); | |
1254 | ||
1255 | /* if saved registers of this frame are not known yet, read and cache them. */ | |
1256 | ||
1257 | if (!fi->saved_regs) | |
1258 | frame_get_saved_regs (fi, &fdata); | |
1259 | ||
1260 | /* If no alloca register used, then fi->frame is the value of the %sp for | |
1261 | this frame, and it is good enough. */ | |
1262 | ||
1263 | if (fdata.alloca_reg < 0) | |
1264 | { | |
1265 | fi->extra_info->initial_sp = fi->frame; | |
1266 | return fi->extra_info->initial_sp; | |
1267 | } | |
1268 | ||
1269 | /* This function has an alloca register. If this is the top-most frame | |
1270 | (with the lowest address), the value in alloca register is good. */ | |
1271 | ||
1272 | if (!fi->next) | |
c5aa993b | 1273 | return fi->extra_info->initial_sp = read_register (fdata.alloca_reg); |
c906108c SS |
1274 | |
1275 | /* Otherwise, this is a caller frame. Callee has usually already saved | |
1276 | registers, but there are exceptions (such as when the callee | |
1277 | has no parameters). Find the address in which caller's alloca | |
1278 | register is saved. */ | |
1279 | ||
c5aa993b JM |
1280 | for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) |
1281 | { | |
c906108c | 1282 | |
c5aa993b JM |
1283 | if (!callee_fi->saved_regs) |
1284 | frame_get_saved_regs (callee_fi, NULL); | |
c906108c | 1285 | |
c5aa993b | 1286 | /* this is the address in which alloca register is saved. */ |
c906108c | 1287 | |
c5aa993b JM |
1288 | tmpaddr = callee_fi->saved_regs[fdata.alloca_reg]; |
1289 | if (tmpaddr) | |
1290 | { | |
7a78ae4e ND |
1291 | fi->extra_info->initial_sp = |
1292 | read_memory_addr (tmpaddr, TDEP->wordsize); | |
c5aa993b JM |
1293 | return fi->extra_info->initial_sp; |
1294 | } | |
c906108c | 1295 | |
c5aa993b JM |
1296 | /* Go look into deeper levels of the frame chain to see if any one of |
1297 | the callees has saved alloca register. */ | |
1298 | } | |
c906108c SS |
1299 | |
1300 | /* If alloca register was not saved, by the callee (or any of its callees) | |
1301 | then the value in the register is still good. */ | |
1302 | ||
1303 | fi->extra_info->initial_sp = read_register (fdata.alloca_reg); | |
1304 | return fi->extra_info->initial_sp; | |
1305 | } | |
1306 | ||
7a78ae4e ND |
1307 | /* Describe the pointer in each stack frame to the previous stack frame |
1308 | (its caller). */ | |
1309 | ||
1310 | /* FRAME_CHAIN takes a frame's nominal address | |
1311 | and produces the frame's chain-pointer. */ | |
1312 | ||
1313 | /* In the case of the RS/6000, the frame's nominal address | |
1314 | is the address of a 4-byte word containing the calling frame's address. */ | |
1315 | ||
1316 | static CORE_ADDR | |
1317 | rs6000_frame_chain (struct frame_info *thisframe) | |
c906108c | 1318 | { |
7a78ae4e ND |
1319 | CORE_ADDR fp, fpp, lr; |
1320 | int wordsize = TDEP->wordsize; | |
c906108c | 1321 | |
7a78ae4e ND |
1322 | if (PC_IN_CALL_DUMMY (thisframe->pc, thisframe->frame, thisframe->frame)) |
1323 | return thisframe->frame; /* dummy frame same as caller's frame */ | |
c906108c | 1324 | |
c5aa993b | 1325 | if (inside_entry_file (thisframe->pc) || |
c906108c SS |
1326 | thisframe->pc == entry_point_address ()) |
1327 | return 0; | |
1328 | ||
1329 | if (thisframe->signal_handler_caller) | |
7a78ae4e ND |
1330 | fp = read_memory_addr (thisframe->frame + SIG_FRAME_FP_OFFSET, |
1331 | wordsize); | |
c906108c SS |
1332 | else if (thisframe->next != NULL |
1333 | && thisframe->next->signal_handler_caller | |
c877c8e6 | 1334 | && FRAMELESS_FUNCTION_INVOCATION (thisframe)) |
c906108c SS |
1335 | /* A frameless function interrupted by a signal did not change the |
1336 | frame pointer. */ | |
1337 | fp = FRAME_FP (thisframe); | |
1338 | else | |
7a78ae4e | 1339 | fp = read_memory_addr ((thisframe)->frame, wordsize); |
c906108c | 1340 | |
7a78ae4e ND |
1341 | lr = read_register (LR_REGNUM); |
1342 | if (lr == entry_point_address ()) | |
1343 | if (fp != 0 && (fpp = read_memory_addr (fp, wordsize)) != 0) | |
1344 | if (PC_IN_CALL_DUMMY (lr, fpp, fpp)) | |
1345 | return fpp; | |
1346 | ||
1347 | return fp; | |
1348 | } | |
1349 | ||
1350 | /* Return the size of register REG when words are WORDSIZE bytes long. If REG | |
1351 | isn't available with that word size, return 0. */ | |
1352 | ||
1353 | static int | |
1354 | regsize (const struct reg *reg, int wordsize) | |
1355 | { | |
1356 | return wordsize == 8 ? reg->sz64 : reg->sz32; | |
1357 | } | |
1358 | ||
1359 | /* Return the name of register number N, or null if no such register exists | |
1360 | in the current architecture. */ | |
1361 | ||
1362 | static char * | |
1363 | rs6000_register_name (int n) | |
1364 | { | |
1365 | struct gdbarch_tdep *tdep = TDEP; | |
1366 | const struct reg *reg = tdep->regs + n; | |
1367 | ||
1368 | if (!regsize (reg, tdep->wordsize)) | |
1369 | return NULL; | |
1370 | return reg->name; | |
1371 | } | |
1372 | ||
1373 | /* Index within `registers' of the first byte of the space for | |
1374 | register N. */ | |
1375 | ||
1376 | static int | |
1377 | rs6000_register_byte (int n) | |
1378 | { | |
1379 | return TDEP->regoff[n]; | |
1380 | } | |
1381 | ||
1382 | /* Return the number of bytes of storage in the actual machine representation | |
1383 | for register N if that register is available, else return 0. */ | |
1384 | ||
1385 | static int | |
1386 | rs6000_register_raw_size (int n) | |
1387 | { | |
1388 | struct gdbarch_tdep *tdep = TDEP; | |
1389 | const struct reg *reg = tdep->regs + n; | |
1390 | return regsize (reg, tdep->wordsize); | |
1391 | } | |
1392 | ||
1393 | /* Number of bytes of storage in the program's representation | |
1394 | for register N. */ | |
1395 | ||
1396 | static int | |
1397 | rs6000_register_virtual_size (int n) | |
1398 | { | |
1399 | return TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (n)); | |
1400 | } | |
1401 | ||
1402 | /* Return the GDB type object for the "standard" data type | |
1403 | of data in register N. */ | |
1404 | ||
1405 | static struct type * | |
1406 | rs6000_register_virtual_type (n) | |
1407 | { | |
1408 | struct gdbarch_tdep *tdep = TDEP; | |
1409 | const struct reg *reg = tdep->regs + n; | |
1410 | ||
1411 | return reg->fpr ? builtin_type_double : | |
1412 | regsize (reg, tdep->wordsize) == 8 ? builtin_type_int64 : | |
1413 | builtin_type_int32; | |
1414 | } | |
1415 | ||
1416 | /* For the PowerPC, it appears that the debug info marks float parameters as | |
1417 | floats regardless of whether the function is prototyped, but the actual | |
1418 | values are always passed in as doubles. Tell gdb to always assume that | |
1419 | floats are passed as doubles and then converted in the callee. */ | |
1420 | ||
1421 | static int | |
1422 | rs6000_coerce_float_to_double (struct type *formal, struct type *actual) | |
1423 | { | |
1424 | return 1; | |
1425 | } | |
1426 | ||
1427 | /* Return whether register N requires conversion when moving from raw format | |
1428 | to virtual format. | |
1429 | ||
1430 | The register format for RS/6000 floating point registers is always | |
1431 | double, we need a conversion if the memory format is float. */ | |
1432 | ||
1433 | static int | |
1434 | rs6000_register_convertible (int n) | |
1435 | { | |
1436 | const struct reg *reg = TDEP->regs + n; | |
1437 | return reg->fpr; | |
1438 | } | |
1439 | ||
1440 | /* Convert data from raw format for register N in buffer FROM | |
1441 | to virtual format with type TYPE in buffer TO. */ | |
1442 | ||
1443 | static void | |
1444 | rs6000_register_convert_to_virtual (int n, struct type *type, | |
1445 | char *from, char *to) | |
1446 | { | |
1447 | if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n)) | |
7a292a7a | 1448 | { |
7a78ae4e ND |
1449 | double val = extract_floating (from, REGISTER_RAW_SIZE (n)); |
1450 | store_floating (to, TYPE_LENGTH (type), val); | |
1451 | } | |
1452 | else | |
1453 | memcpy (to, from, REGISTER_RAW_SIZE (n)); | |
1454 | } | |
1455 | ||
1456 | /* Convert data from virtual format with type TYPE in buffer FROM | |
1457 | to raw format for register N in buffer TO. */ | |
7a292a7a | 1458 | |
7a78ae4e ND |
1459 | static void |
1460 | rs6000_register_convert_to_raw (struct type *type, int n, | |
1461 | char *from, char *to) | |
1462 | { | |
1463 | if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n)) | |
1464 | { | |
1465 | double val = extract_floating (from, TYPE_LENGTH (type)); | |
1466 | store_floating (to, REGISTER_RAW_SIZE (n), val); | |
7a292a7a | 1467 | } |
7a78ae4e ND |
1468 | else |
1469 | memcpy (to, from, REGISTER_RAW_SIZE (n)); | |
1470 | } | |
c906108c | 1471 | |
7a78ae4e ND |
1472 | /* Store the address of the place in which to copy the structure the |
1473 | subroutine will return. This is called from call_function. | |
1474 | ||
1475 | In RS/6000, struct return addresses are passed as an extra parameter in r3. | |
1476 | In function return, callee is not responsible of returning this address | |
1477 | back. Since gdb needs to find it, we will store in a designated variable | |
1478 | `rs6000_struct_return_address'. */ | |
1479 | ||
1480 | static void | |
1481 | rs6000_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
1482 | { | |
1483 | write_register (3, addr); | |
1484 | rs6000_struct_return_address = addr; | |
1485 | } | |
1486 | ||
1487 | /* Write into appropriate registers a function return value | |
1488 | of type TYPE, given in virtual format. */ | |
1489 | ||
1490 | static void | |
1491 | rs6000_store_return_value (struct type *type, char *valbuf) | |
1492 | { | |
1493 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
1494 | ||
1495 | /* Floating point values are returned starting from FPR1 and up. | |
1496 | Say a double_double_double type could be returned in | |
1497 | FPR1/FPR2/FPR3 triple. */ | |
1498 | ||
1499 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM + 1), valbuf, | |
1500 | TYPE_LENGTH (type)); | |
1501 | else | |
1502 | /* Everything else is returned in GPR3 and up. */ | |
1503 | write_register_bytes (REGISTER_BYTE (GP0_REGNUM + 3), valbuf, | |
1504 | TYPE_LENGTH (type)); | |
1505 | } | |
1506 | ||
1507 | /* Extract from an array REGBUF containing the (raw) register state | |
1508 | the address in which a function should return its structure value, | |
1509 | as a CORE_ADDR (or an expression that can be used as one). */ | |
1510 | ||
1511 | static CORE_ADDR | |
1512 | rs6000_extract_struct_value_address (char *regbuf) | |
1513 | { | |
1514 | return rs6000_struct_return_address; | |
1515 | } | |
1516 | ||
1517 | /* Return whether PC is in a dummy function call. | |
1518 | ||
1519 | FIXME: This just checks for the end of the stack, which is broken | |
1520 | for things like stepping through gcc nested function stubs. */ | |
1521 | ||
1522 | static int | |
1523 | rs6000_pc_in_call_dummy (CORE_ADDR pc, CORE_ADDR sp, CORE_ADDR fp) | |
1524 | { | |
1525 | return sp < pc && pc < fp; | |
1526 | } | |
1527 | ||
1528 | /* Hook called when a new child process is started. */ | |
1529 | ||
1530 | void | |
1531 | rs6000_create_inferior (int pid) | |
1532 | { | |
1533 | if (rs6000_set_host_arch_hook) | |
1534 | rs6000_set_host_arch_hook (pid); | |
c906108c SS |
1535 | } |
1536 | \f | |
7a78ae4e ND |
1537 | /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR). |
1538 | ||
1539 | Usually a function pointer's representation is simply the address | |
1540 | of the function. On the RS/6000 however, a function pointer is | |
1541 | represented by a pointer to a TOC entry. This TOC entry contains | |
1542 | three words, the first word is the address of the function, the | |
1543 | second word is the TOC pointer (r2), and the third word is the | |
1544 | static chain value. Throughout GDB it is currently assumed that a | |
1545 | function pointer contains the address of the function, which is not | |
1546 | easy to fix. In addition, the conversion of a function address to | |
1547 | a function pointer would require allocation of a TOC entry in the | |
1548 | inferior's memory space, with all its drawbacks. To be able to | |
1549 | call C++ virtual methods in the inferior (which are called via | |
1550 | function pointers), find_function_addr uses this macro to get the | |
1551 | function address from a function pointer. */ | |
1552 | ||
c906108c SS |
1553 | /* Return nonzero if ADDR (a function pointer) is in the data space and |
1554 | is therefore a special function pointer. */ | |
1555 | ||
7a78ae4e ND |
1556 | CORE_ADDR |
1557 | rs6000_convert_from_func_ptr_addr (CORE_ADDR addr) | |
c906108c SS |
1558 | { |
1559 | struct obj_section *s; | |
1560 | ||
1561 | s = find_pc_section (addr); | |
1562 | if (s && s->the_bfd_section->flags & SEC_CODE) | |
7a78ae4e | 1563 | return addr; |
c906108c | 1564 | |
7a78ae4e ND |
1565 | /* ADDR is in the data space, so it's a special function pointer. */ |
1566 | return read_memory_addr (addr, TDEP->wordsize); | |
c906108c | 1567 | } |
c906108c | 1568 | \f |
c5aa993b | 1569 | |
7a78ae4e | 1570 | /* Handling the various POWER/PowerPC variants. */ |
c906108c SS |
1571 | |
1572 | ||
7a78ae4e ND |
1573 | /* The arrays here called registers_MUMBLE hold information about available |
1574 | registers. | |
c906108c SS |
1575 | |
1576 | For each family of PPC variants, I've tried to isolate out the | |
1577 | common registers and put them up front, so that as long as you get | |
1578 | the general family right, GDB will correctly identify the registers | |
1579 | common to that family. The common register sets are: | |
1580 | ||
1581 | For the 60x family: hid0 hid1 iabr dabr pir | |
1582 | ||
1583 | For the 505 and 860 family: eie eid nri | |
1584 | ||
1585 | For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi | |
c5aa993b JM |
1586 | tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1 |
1587 | pbu1 pbl2 pbu2 | |
c906108c SS |
1588 | |
1589 | Most of these register groups aren't anything formal. I arrived at | |
1590 | them by looking at the registers that occurred in more than one | |
7a78ae4e ND |
1591 | processor. */ |
1592 | ||
1593 | /* Convenience macros for populating register arrays. */ | |
1594 | ||
1595 | /* Within another macro, convert S to a string. */ | |
1596 | ||
1597 | #define STR(s) #s | |
1598 | ||
1599 | /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems | |
1600 | and 64 bits on 64-bit systems. */ | |
1601 | #define R(name) { STR(name), 4, 8, 0 } | |
1602 | ||
1603 | /* Return a struct reg defining register NAME that's 32 bits on all | |
1604 | systems. */ | |
1605 | #define R4(name) { STR(name), 4, 4, 0 } | |
1606 | ||
1607 | /* Return a struct reg defining register NAME that's 64 bits on all | |
1608 | systems. */ | |
1609 | #define R8(name) { STR(name), 8, 8, 0 } | |
1610 | ||
1611 | /* Return a struct reg defining floating-point register NAME. */ | |
1612 | #define F(name) { STR(name), 8, 8, 1 } | |
1613 | ||
1614 | /* Return a struct reg defining register NAME that's 32 bits on 32-bit | |
1615 | systems and that doesn't exist on 64-bit systems. */ | |
1616 | #define R32(name) { STR(name), 4, 0, 0 } | |
1617 | ||
1618 | /* Return a struct reg defining register NAME that's 64 bits on 64-bit | |
1619 | systems and that doesn't exist on 32-bit systems. */ | |
1620 | #define R64(name) { STR(name), 0, 8, 0 } | |
1621 | ||
1622 | /* Return a struct reg placeholder for a register that doesn't exist. */ | |
1623 | #define R0 { 0, 0, 0, 0 } | |
1624 | ||
1625 | /* UISA registers common across all architectures, including POWER. */ | |
1626 | ||
1627 | #define COMMON_UISA_REGS \ | |
1628 | /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \ | |
1629 | /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \ | |
1630 | /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \ | |
1631 | /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \ | |
1632 | /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \ | |
1633 | /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \ | |
1634 | /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \ | |
1635 | /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \ | |
1636 | /* 64 */ R(pc), R(ps) | |
1637 | ||
1638 | /* UISA-level SPRs for PowerPC. */ | |
1639 | #define PPC_UISA_SPRS \ | |
1640 | /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0 | |
1641 | ||
1642 | /* Segment registers, for PowerPC. */ | |
1643 | #define PPC_SEGMENT_REGS \ | |
1644 | /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \ | |
1645 | /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \ | |
1646 | /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \ | |
1647 | /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15) | |
1648 | ||
1649 | /* OEA SPRs for PowerPC. */ | |
1650 | #define PPC_OEA_SPRS \ | |
1651 | /* 87 */ R4(pvr), \ | |
1652 | /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \ | |
1653 | /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \ | |
1654 | /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \ | |
1655 | /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \ | |
1656 | /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \ | |
1657 | /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \ | |
1658 | /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \ | |
1659 | /* 116 */ R4(dec), R(dabr), R4(ear) | |
1660 | ||
1661 | /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover | |
1662 | user-level SPR's. */ | |
1663 | static const struct reg registers_power[] = | |
c906108c | 1664 | { |
7a78ae4e ND |
1665 | COMMON_UISA_REGS, |
1666 | /* 66 */ R4(cnd), R(lr), R(cnt), R4(xer), R4(mq) | |
c906108c SS |
1667 | }; |
1668 | ||
7a78ae4e ND |
1669 | /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only |
1670 | view of the PowerPC. */ | |
1671 | static const struct reg registers_powerpc[] = | |
c906108c | 1672 | { |
7a78ae4e ND |
1673 | COMMON_UISA_REGS, |
1674 | PPC_UISA_SPRS | |
c906108c SS |
1675 | }; |
1676 | ||
7a78ae4e ND |
1677 | /* IBM PowerPC 403. */ |
1678 | static const struct reg registers_403[] = | |
c5aa993b | 1679 | { |
7a78ae4e ND |
1680 | COMMON_UISA_REGS, |
1681 | PPC_UISA_SPRS, | |
1682 | PPC_SEGMENT_REGS, | |
1683 | PPC_OEA_SPRS, | |
1684 | /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr), | |
1685 | /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit), | |
1686 | /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3), | |
1687 | /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2), | |
1688 | /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr), | |
1689 | /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2) | |
c906108c SS |
1690 | }; |
1691 | ||
7a78ae4e ND |
1692 | /* IBM PowerPC 403GC. */ |
1693 | static const struct reg registers_403GC[] = | |
c5aa993b | 1694 | { |
7a78ae4e ND |
1695 | COMMON_UISA_REGS, |
1696 | PPC_UISA_SPRS, | |
1697 | PPC_SEGMENT_REGS, | |
1698 | PPC_OEA_SPRS, | |
1699 | /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr), | |
1700 | /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit), | |
1701 | /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3), | |
1702 | /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2), | |
1703 | /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr), | |
1704 | /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2), | |
1705 | /* 143 */ R(zpr), R(pid), R(sgr), R(dcwr), | |
1706 | /* 147 */ R(tbhu), R(tblu) | |
c906108c SS |
1707 | }; |
1708 | ||
7a78ae4e ND |
1709 | /* Motorola PowerPC 505. */ |
1710 | static const struct reg registers_505[] = | |
c5aa993b | 1711 | { |
7a78ae4e ND |
1712 | COMMON_UISA_REGS, |
1713 | PPC_UISA_SPRS, | |
1714 | PPC_SEGMENT_REGS, | |
1715 | PPC_OEA_SPRS, | |
1716 | /* 119 */ R(eie), R(eid), R(nri) | |
c906108c SS |
1717 | }; |
1718 | ||
7a78ae4e ND |
1719 | /* Motorola PowerPC 860 or 850. */ |
1720 | static const struct reg registers_860[] = | |
c5aa993b | 1721 | { |
7a78ae4e ND |
1722 | COMMON_UISA_REGS, |
1723 | PPC_UISA_SPRS, | |
1724 | PPC_SEGMENT_REGS, | |
1725 | PPC_OEA_SPRS, | |
1726 | /* 119 */ R(eie), R(eid), R(nri), R(cmpa), | |
1727 | /* 123 */ R(cmpb), R(cmpc), R(cmpd), R(icr), | |
1728 | /* 127 */ R(der), R(counta), R(countb), R(cmpe), | |
1729 | /* 131 */ R(cmpf), R(cmpg), R(cmph), R(lctrl1), | |
1730 | /* 135 */ R(lctrl2), R(ictrl), R(bar), R(ic_cst), | |
1731 | /* 139 */ R(ic_adr), R(ic_dat), R(dc_cst), R(dc_adr), | |
1732 | /* 143 */ R(dc_dat), R(dpdr), R(dpir), R(immr), | |
1733 | /* 147 */ R(mi_ctr), R(mi_ap), R(mi_epn), R(mi_twc), | |
1734 | /* 151 */ R(mi_rpn), R(md_ctr), R(m_casid), R(md_ap), | |
1735 | /* 155 */ R(md_epn), R(md_twb), R(md_twc), R(md_rpn), | |
1736 | /* 159 */ R(m_tw), R(mi_dbcam), R(mi_dbram0), R(mi_dbram1), | |
1737 | /* 163 */ R(md_dbcam), R(md_dbram0), R(md_dbram1) | |
c906108c SS |
1738 | }; |
1739 | ||
7a78ae4e ND |
1740 | /* Motorola PowerPC 601. Note that the 601 has different register numbers |
1741 | for reading and writing RTCU and RTCL. However, how one reads and writes a | |
c906108c | 1742 | register is the stub's problem. */ |
7a78ae4e | 1743 | static const struct reg registers_601[] = |
c5aa993b | 1744 | { |
7a78ae4e ND |
1745 | COMMON_UISA_REGS, |
1746 | PPC_UISA_SPRS, | |
1747 | PPC_SEGMENT_REGS, | |
1748 | PPC_OEA_SPRS, | |
1749 | /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr), | |
1750 | /* 123 */ R(pir), R(mq), R(rtcu), R(rtcl) | |
c906108c SS |
1751 | }; |
1752 | ||
7a78ae4e ND |
1753 | /* Motorola PowerPC 602. */ |
1754 | static const struct reg registers_602[] = | |
c5aa993b | 1755 | { |
7a78ae4e ND |
1756 | COMMON_UISA_REGS, |
1757 | PPC_UISA_SPRS, | |
1758 | PPC_SEGMENT_REGS, | |
1759 | PPC_OEA_SPRS, | |
1760 | /* 119 */ R(hid0), R(hid1), R(iabr), R0, | |
1761 | /* 123 */ R0, R(tcr), R(ibr), R(esassr), | |
1762 | /* 127 */ R(sebr), R(ser), R(sp), R(lt) | |
c906108c SS |
1763 | }; |
1764 | ||
7a78ae4e ND |
1765 | /* Motorola/IBM PowerPC 603 or 603e. */ |
1766 | static const struct reg registers_603[] = | |
c5aa993b | 1767 | { |
7a78ae4e ND |
1768 | COMMON_UISA_REGS, |
1769 | PPC_UISA_SPRS, | |
1770 | PPC_SEGMENT_REGS, | |
1771 | PPC_OEA_SPRS, | |
1772 | /* 119 */ R(hid0), R(hid1), R(iabr), R0, | |
1773 | /* 123 */ R0, R(dmiss), R(dcmp), R(hash1), | |
1774 | /* 127 */ R(hash2), R(imiss), R(icmp), R(rpa) | |
c906108c SS |
1775 | }; |
1776 | ||
7a78ae4e ND |
1777 | /* Motorola PowerPC 604 or 604e. */ |
1778 | static const struct reg registers_604[] = | |
c5aa993b | 1779 | { |
7a78ae4e ND |
1780 | COMMON_UISA_REGS, |
1781 | PPC_UISA_SPRS, | |
1782 | PPC_SEGMENT_REGS, | |
1783 | PPC_OEA_SPRS, | |
1784 | /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr), | |
1785 | /* 123 */ R(pir), R(mmcr0), R(pmc1), R(pmc2), | |
1786 | /* 127 */ R(sia), R(sda) | |
c906108c SS |
1787 | }; |
1788 | ||
7a78ae4e ND |
1789 | /* Motorola/IBM PowerPC 750 or 740. */ |
1790 | static const struct reg registers_750[] = | |
c5aa993b | 1791 | { |
7a78ae4e ND |
1792 | COMMON_UISA_REGS, |
1793 | PPC_UISA_SPRS, | |
1794 | PPC_SEGMENT_REGS, | |
1795 | PPC_OEA_SPRS, | |
1796 | /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr), | |
1797 | /* 123 */ R0, R(ummcr0), R(upmc1), R(upmc2), | |
1798 | /* 127 */ R(usia), R(ummcr1), R(upmc3), R(upmc4), | |
1799 | /* 131 */ R(mmcr0), R(pmc1), R(pmc2), R(sia), | |
1800 | /* 135 */ R(mmcr1), R(pmc3), R(pmc4), R(l2cr), | |
1801 | /* 139 */ R(ictc), R(thrm1), R(thrm2), R(thrm3) | |
c906108c SS |
1802 | }; |
1803 | ||
1804 | ||
1805 | /* Information about a particular processor variant. */ | |
7a78ae4e | 1806 | |
c906108c | 1807 | struct variant |
c5aa993b JM |
1808 | { |
1809 | /* Name of this variant. */ | |
1810 | char *name; | |
c906108c | 1811 | |
c5aa993b JM |
1812 | /* English description of the variant. */ |
1813 | char *description; | |
c906108c | 1814 | |
7a78ae4e ND |
1815 | /* bfd_arch_info.arch corresponding to variant. */ |
1816 | enum bfd_architecture arch; | |
1817 | ||
1818 | /* bfd_arch_info.mach corresponding to variant. */ | |
1819 | unsigned long mach; | |
1820 | ||
c5aa993b JM |
1821 | /* Table of register names; registers[R] is the name of the register |
1822 | number R. */ | |
7a78ae4e ND |
1823 | int nregs; |
1824 | const struct reg *regs; | |
c5aa993b | 1825 | }; |
c906108c SS |
1826 | |
1827 | #define num_registers(list) (sizeof (list) / sizeof((list)[0])) | |
1828 | ||
1829 | ||
1830 | /* Information in this table comes from the following web sites: | |
1831 | IBM: http://www.chips.ibm.com:80/products/embedded/ | |
1832 | Motorola: http://www.mot.com/SPS/PowerPC/ | |
1833 | ||
1834 | I'm sure I've got some of the variant descriptions not quite right. | |
1835 | Please report any inaccuracies you find to GDB's maintainer. | |
1836 | ||
1837 | If you add entries to this table, please be sure to allow the new | |
1838 | value as an argument to the --with-cpu flag, in configure.in. */ | |
1839 | ||
7a78ae4e | 1840 | static const struct variant variants[] = |
c906108c | 1841 | { |
7a78ae4e ND |
1842 | {"powerpc", "PowerPC user-level", bfd_arch_powerpc, |
1843 | bfd_mach_ppc, num_registers (registers_powerpc), registers_powerpc}, | |
1844 | {"power", "POWER user-level", bfd_arch_rs6000, | |
1845 | bfd_mach_rs6k, num_registers (registers_power), registers_power}, | |
1846 | {"403", "IBM PowerPC 403", bfd_arch_powerpc, | |
1847 | bfd_mach_ppc_403, num_registers (registers_403), registers_403}, | |
1848 | {"601", "Motorola PowerPC 601", bfd_arch_powerpc, | |
1849 | bfd_mach_ppc_601, num_registers (registers_601), registers_601}, | |
1850 | {"602", "Motorola PowerPC 602", bfd_arch_powerpc, | |
1851 | bfd_mach_ppc_602, num_registers (registers_602), registers_602}, | |
1852 | {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc, | |
1853 | bfd_mach_ppc_603, num_registers (registers_603), registers_603}, | |
1854 | {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc, | |
1855 | 604, num_registers (registers_604), registers_604}, | |
1856 | {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc, | |
1857 | bfd_mach_ppc_403gc, num_registers (registers_403GC), registers_403GC}, | |
1858 | {"505", "Motorola PowerPC 505", bfd_arch_powerpc, | |
1859 | bfd_mach_ppc_505, num_registers (registers_505), registers_505}, | |
1860 | {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc, | |
1861 | bfd_mach_ppc_860, num_registers (registers_860), registers_860}, | |
1862 | {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc, | |
1863 | bfd_mach_ppc_750, num_registers (registers_750), registers_750}, | |
1864 | ||
1865 | /* FIXME: I haven't checked the register sets of the following. */ | |
1866 | {"620", "Motorola PowerPC 620", bfd_arch_powerpc, | |
1867 | bfd_mach_ppc_620, num_registers (registers_powerpc), registers_powerpc}, | |
1868 | {"a35", "PowerPC A35", bfd_arch_powerpc, | |
1869 | bfd_mach_ppc_a35, num_registers (registers_powerpc), registers_powerpc}, | |
1870 | {"rs1", "IBM POWER RS1", bfd_arch_rs6000, | |
1871 | bfd_mach_rs6k_rs1, num_registers (registers_power), registers_power}, | |
1872 | {"rsc", "IBM POWER RSC", bfd_arch_rs6000, | |
1873 | bfd_mach_rs6k_rsc, num_registers (registers_power), registers_power}, | |
1874 | {"rs2", "IBM POWER RS2", bfd_arch_rs6000, | |
1875 | bfd_mach_rs6k_rs2, num_registers (registers_power), registers_power}, | |
1876 | ||
c5aa993b | 1877 | {0, 0, 0, 0} |
c906108c SS |
1878 | }; |
1879 | ||
7a78ae4e | 1880 | #undef num_registers |
c906108c | 1881 | |
7a78ae4e ND |
1882 | /* Look up the variant named NAME in the `variants' table. Return a |
1883 | pointer to the struct variant, or null if we couldn't find it. */ | |
c906108c | 1884 | |
7a78ae4e ND |
1885 | static const struct variant * |
1886 | find_variant_by_name (char *name) | |
c906108c | 1887 | { |
7a78ae4e | 1888 | const struct variant *v; |
c906108c | 1889 | |
7a78ae4e ND |
1890 | for (v = variants; v->name; v++) |
1891 | if (!strcmp (name, v->name)) | |
1892 | return v; | |
c906108c | 1893 | |
7a78ae4e | 1894 | return NULL; |
c906108c SS |
1895 | } |
1896 | ||
7a78ae4e ND |
1897 | /* Return the variant corresponding to architecture ARCH and machine number |
1898 | MACH. If no such variant exists, return null. */ | |
c906108c | 1899 | |
7a78ae4e ND |
1900 | static const struct variant * |
1901 | find_variant_by_arch (enum bfd_architecture arch, unsigned long mach) | |
c906108c | 1902 | { |
7a78ae4e | 1903 | const struct variant *v; |
c5aa993b | 1904 | |
7a78ae4e ND |
1905 | for (v = variants; v->name; v++) |
1906 | if (arch == v->arch && mach == v->mach) | |
1907 | return v; | |
c906108c | 1908 | |
7a78ae4e | 1909 | return NULL; |
c906108c SS |
1910 | } |
1911 | ||
7a78ae4e | 1912 | \f |
c906108c | 1913 | |
7a78ae4e ND |
1914 | /* Initialize the current architecture based on INFO. If possible, re-use an |
1915 | architecture from ARCHES, which is a list of architectures already created | |
1916 | during this debugging session. | |
c906108c | 1917 | |
7a78ae4e ND |
1918 | Called e.g. at program startup, when reading a core file, and when reading |
1919 | a binary file. */ | |
c906108c | 1920 | |
7a78ae4e ND |
1921 | static struct gdbarch * |
1922 | rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1923 | { | |
1924 | struct gdbarch *gdbarch; | |
1925 | struct gdbarch_tdep *tdep; | |
1926 | int wordsize, fromexec, power, i, off; | |
1927 | struct reg *regs; | |
1928 | const struct variant *v; | |
1929 | enum bfd_architecture arch; | |
1930 | unsigned long mach; | |
1931 | bfd abfd; | |
1932 | ||
1933 | fromexec = info.abfd && info.abfd->format == bfd_object && | |
1934 | bfd_get_flavour (info.abfd) == bfd_target_xcoff_flavour; | |
1935 | ||
1936 | /* Check word size. If INFO is from a binary file, infer it from that, | |
1937 | else use the previously-inferred size. */ | |
1938 | if (fromexec) | |
c906108c | 1939 | { |
7a78ae4e ND |
1940 | if (xcoff_data (info.abfd)->xcoff64) |
1941 | wordsize = 8; | |
1942 | else | |
1943 | wordsize = 4; | |
c906108c SS |
1944 | } |
1945 | else | |
7a78ae4e ND |
1946 | { |
1947 | tdep = TDEP; | |
1948 | if (tdep) | |
1949 | wordsize = tdep->wordsize; | |
1950 | else | |
1951 | wordsize = 4; | |
1952 | } | |
c906108c | 1953 | |
7a78ae4e ND |
1954 | /* Find a candidate among extant architectures. */ |
1955 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
1956 | arches != NULL; | |
1957 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
1958 | { | |
1959 | /* Word size in the various PowerPC bfd_arch_info structs isn't | |
1960 | meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform | |
1961 | separate word size check. */ | |
1962 | tdep = gdbarch_tdep (arches->gdbarch); | |
1963 | if (tdep && tdep->wordsize == wordsize) | |
1964 | return arches->gdbarch; | |
1965 | } | |
c906108c | 1966 | |
7a78ae4e ND |
1967 | /* None found, create a new architecture from INFO, whose bfd_arch_info |
1968 | validity depends on the source: | |
1969 | - executable useless | |
1970 | - rs6000_host_arch() good | |
1971 | - core file good | |
1972 | - "set arch" trust blindly | |
1973 | - GDB startup useless but harmless */ | |
c906108c | 1974 | |
7a78ae4e | 1975 | if (!fromexec) |
c906108c | 1976 | { |
7a78ae4e ND |
1977 | arch = info.bfd_architecture; |
1978 | mach = info.bfd_arch_info->mach; | |
c906108c | 1979 | } |
7a78ae4e | 1980 | else |
c906108c | 1981 | { |
7a78ae4e ND |
1982 | arch = bfd_arch_powerpc; |
1983 | mach = 0; | |
1984 | bfd_default_set_arch_mach (&abfd, arch, mach); | |
1985 | info.bfd_arch_info = bfd_get_arch_info (&abfd); | |
1986 | } | |
1987 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); | |
1988 | tdep->wordsize = wordsize; | |
1989 | gdbarch = gdbarch_alloc (&info, tdep); | |
1990 | power = arch == bfd_arch_rs6000; | |
1991 | ||
1992 | /* Select instruction printer. */ | |
1993 | tm_print_insn = arch == power ? print_insn_rs6000 : | |
1994 | info.byte_order == BIG_ENDIAN ? print_insn_big_powerpc : | |
1995 | print_insn_little_powerpc; | |
1996 | ||
1997 | /* Choose variant. */ | |
1998 | v = find_variant_by_arch (arch, mach); | |
1999 | if (!v) | |
2000 | v = find_variant_by_name (power ? "power" : "powerpc"); | |
2001 | tdep->regs = v->regs; | |
2002 | ||
2003 | /* Calculate byte offsets in raw register array. */ | |
2004 | tdep->regoff = xmalloc (v->nregs * sizeof (int)); | |
2005 | for (i = off = 0; i < v->nregs; i++) | |
2006 | { | |
2007 | tdep->regoff[i] = off; | |
2008 | off += regsize (v->regs + i, wordsize); | |
c906108c SS |
2009 | } |
2010 | ||
7a78ae4e ND |
2011 | set_gdbarch_read_pc (gdbarch, generic_target_read_pc); |
2012 | set_gdbarch_write_pc (gdbarch, generic_target_write_pc); | |
2013 | set_gdbarch_read_fp (gdbarch, generic_target_read_fp); | |
2014 | set_gdbarch_write_fp (gdbarch, generic_target_write_fp); | |
2015 | set_gdbarch_read_sp (gdbarch, generic_target_read_sp); | |
2016 | set_gdbarch_write_sp (gdbarch, generic_target_write_sp); | |
2017 | ||
2018 | set_gdbarch_num_regs (gdbarch, v->nregs); | |
2019 | set_gdbarch_sp_regnum (gdbarch, 1); | |
2020 | set_gdbarch_fp_regnum (gdbarch, 1); | |
2021 | set_gdbarch_pc_regnum (gdbarch, 64); | |
2022 | set_gdbarch_register_name (gdbarch, rs6000_register_name); | |
2023 | set_gdbarch_register_size (gdbarch, wordsize); | |
2024 | set_gdbarch_register_bytes (gdbarch, off); | |
2025 | set_gdbarch_register_byte (gdbarch, rs6000_register_byte); | |
2026 | set_gdbarch_register_raw_size (gdbarch, rs6000_register_raw_size); | |
2027 | set_gdbarch_max_register_raw_size (gdbarch, 8); | |
2028 | set_gdbarch_register_virtual_size (gdbarch, rs6000_register_virtual_size); | |
2029 | set_gdbarch_max_register_virtual_size (gdbarch, 8); | |
2030 | set_gdbarch_register_virtual_type (gdbarch, rs6000_register_virtual_type); | |
2031 | ||
2032 | set_gdbarch_ptr_bit (gdbarch, wordsize * TARGET_CHAR_BIT); | |
2033 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
2034 | set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
2035 | set_gdbarch_long_bit (gdbarch, wordsize * TARGET_CHAR_BIT); | |
2036 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
2037 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
2038 | set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
2039 | set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
2040 | ||
2041 | set_gdbarch_use_generic_dummy_frames (gdbarch, 1); | |
2042 | set_gdbarch_call_dummy_length (gdbarch, 0); | |
2043 | set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); | |
2044 | set_gdbarch_call_dummy_address (gdbarch, entry_point_address); | |
2045 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); | |
2046 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); | |
2047 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); | |
fe794dc6 | 2048 | set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy); |
7a78ae4e ND |
2049 | set_gdbarch_call_dummy_p (gdbarch, 1); |
2050 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); | |
2051 | set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register); | |
2052 | set_gdbarch_fix_call_dummy (gdbarch, rs6000_fix_call_dummy); | |
2053 | set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); | |
2054 | set_gdbarch_push_return_address (gdbarch, ppc_push_return_address); | |
2055 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); | |
2056 | set_gdbarch_coerce_float_to_double (gdbarch, rs6000_coerce_float_to_double); | |
2057 | ||
2058 | set_gdbarch_register_convertible (gdbarch, rs6000_register_convertible); | |
2059 | set_gdbarch_register_convert_to_virtual (gdbarch, rs6000_register_convert_to_virtual); | |
2060 | set_gdbarch_register_convert_to_raw (gdbarch, rs6000_register_convert_to_raw); | |
2061 | ||
2062 | set_gdbarch_extract_return_value (gdbarch, rs6000_extract_return_value); | |
2063 | set_gdbarch_push_arguments (gdbarch, rs6000_push_arguments); | |
2064 | ||
2065 | set_gdbarch_store_struct_return (gdbarch, rs6000_store_struct_return); | |
2066 | set_gdbarch_store_return_value (gdbarch, rs6000_store_return_value); | |
2067 | set_gdbarch_extract_struct_value_address (gdbarch, rs6000_extract_struct_value_address); | |
2068 | set_gdbarch_use_struct_convention (gdbarch, generic_use_struct_convention); | |
2069 | ||
2070 | set_gdbarch_frame_init_saved_regs (gdbarch, rs6000_frame_init_saved_regs); | |
2071 | set_gdbarch_init_extra_frame_info (gdbarch, rs6000_init_extra_frame_info); | |
2072 | ||
2073 | set_gdbarch_pop_frame (gdbarch, rs6000_pop_frame); | |
2074 | ||
2075 | set_gdbarch_skip_prologue (gdbarch, rs6000_skip_prologue); | |
2076 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
2077 | set_gdbarch_decr_pc_after_break (gdbarch, 0); | |
2078 | set_gdbarch_function_start_offset (gdbarch, 0); | |
2079 | set_gdbarch_breakpoint_from_pc (gdbarch, rs6000_breakpoint_from_pc); | |
2080 | ||
2081 | /* Not sure on this. FIXMEmgo */ | |
2082 | set_gdbarch_frame_args_skip (gdbarch, 8); | |
2083 | ||
2084 | set_gdbarch_frameless_function_invocation (gdbarch, rs6000_frameless_function_invocation); | |
2085 | set_gdbarch_frame_chain (gdbarch, rs6000_frame_chain); | |
2086 | set_gdbarch_frame_chain_valid (gdbarch, file_frame_chain_valid); | |
2087 | set_gdbarch_frame_saved_pc (gdbarch, rs6000_frame_saved_pc); | |
2088 | set_gdbarch_frame_args_address (gdbarch, rs6000_frame_args_address); | |
2089 | set_gdbarch_frame_locals_address (gdbarch, rs6000_frame_args_address); | |
2090 | set_gdbarch_saved_pc_after_call (gdbarch, rs6000_saved_pc_after_call); | |
2091 | ||
2092 | /* We can't tell how many args there are | |
2093 | now that the C compiler delays popping them. */ | |
2094 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); | |
2095 | ||
2096 | return gdbarch; | |
c906108c SS |
2097 | } |
2098 | ||
c906108c SS |
2099 | /* Initialization code. */ |
2100 | ||
2101 | void | |
2102 | _initialize_rs6000_tdep () | |
2103 | { | |
7a78ae4e ND |
2104 | register_gdbarch_init (bfd_arch_rs6000, rs6000_gdbarch_init); |
2105 | register_gdbarch_init (bfd_arch_powerpc, rs6000_gdbarch_init); | |
c906108c | 2106 | } |