Commit | Line | Data |
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c906108c | 1 | /* Target-dependent code for GDB, the GNU debugger. |
b6ba6518 KB |
2 | Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, |
3 | 1998, 1999, 2000, 2001 | |
c906108c SS |
4 | Free Software Foundation, Inc. |
5 | ||
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | #include "defs.h" | |
24 | #include "frame.h" | |
25 | #include "inferior.h" | |
26 | #include "symtab.h" | |
27 | #include "target.h" | |
28 | #include "gdbcore.h" | |
29 | #include "gdbcmd.h" | |
30 | #include "symfile.h" | |
31 | #include "objfiles.h" | |
7a78ae4e | 32 | #include "arch-utils.h" |
4e052eda | 33 | #include "regcache.h" |
7a78ae4e ND |
34 | |
35 | #include "bfd/libbfd.h" /* for bfd_default_set_arch_mach */ | |
36 | #include "coff/internal.h" /* for libcoff.h */ | |
37 | #include "bfd/libcoff.h" /* for xcoff_data */ | |
38 | ||
9aa1e687 | 39 | #include "elf-bfd.h" |
7a78ae4e | 40 | |
9aa1e687 | 41 | #include "ppc-tdep.h" |
7a78ae4e ND |
42 | |
43 | /* If the kernel has to deliver a signal, it pushes a sigcontext | |
44 | structure on the stack and then calls the signal handler, passing | |
45 | the address of the sigcontext in an argument register. Usually | |
46 | the signal handler doesn't save this register, so we have to | |
47 | access the sigcontext structure via an offset from the signal handler | |
48 | frame. | |
49 | The following constants were determined by experimentation on AIX 3.2. */ | |
50 | #define SIG_FRAME_PC_OFFSET 96 | |
51 | #define SIG_FRAME_LR_OFFSET 108 | |
52 | #define SIG_FRAME_FP_OFFSET 284 | |
53 | ||
7a78ae4e ND |
54 | /* To be used by skip_prologue. */ |
55 | ||
56 | struct rs6000_framedata | |
57 | { | |
58 | int offset; /* total size of frame --- the distance | |
59 | by which we decrement sp to allocate | |
60 | the frame */ | |
61 | int saved_gpr; /* smallest # of saved gpr */ | |
62 | int saved_fpr; /* smallest # of saved fpr */ | |
63 | int alloca_reg; /* alloca register number (frame ptr) */ | |
64 | char frameless; /* true if frameless functions. */ | |
65 | char nosavedpc; /* true if pc not saved. */ | |
66 | int gpr_offset; /* offset of saved gprs from prev sp */ | |
67 | int fpr_offset; /* offset of saved fprs from prev sp */ | |
68 | int lr_offset; /* offset of saved lr */ | |
69 | int cr_offset; /* offset of saved cr */ | |
70 | }; | |
71 | ||
72 | /* Description of a single register. */ | |
73 | ||
74 | struct reg | |
75 | { | |
76 | char *name; /* name of register */ | |
77 | unsigned char sz32; /* size on 32-bit arch, 0 if nonextant */ | |
78 | unsigned char sz64; /* size on 64-bit arch, 0 if nonextant */ | |
79 | unsigned char fpr; /* whether register is floating-point */ | |
80 | }; | |
81 | ||
82 | /* Private data that this module attaches to struct gdbarch. */ | |
83 | ||
84 | struct gdbarch_tdep | |
85 | { | |
86 | int wordsize; /* size in bytes of fixed-point word */ | |
9aa1e687 | 87 | int osabi; /* OS / ABI from ELF header */ |
7a78ae4e ND |
88 | int *regoff; /* byte offsets in register arrays */ |
89 | const struct reg *regs; /* from current variant */ | |
90 | }; | |
c906108c | 91 | |
7a78ae4e ND |
92 | /* Return the current architecture's gdbarch_tdep structure. */ |
93 | ||
94 | #define TDEP gdbarch_tdep (current_gdbarch) | |
c906108c SS |
95 | |
96 | /* Breakpoint shadows for the single step instructions will be kept here. */ | |
97 | ||
c5aa993b JM |
98 | static struct sstep_breaks |
99 | { | |
100 | /* Address, or 0 if this is not in use. */ | |
101 | CORE_ADDR address; | |
102 | /* Shadow contents. */ | |
103 | char data[4]; | |
104 | } | |
105 | stepBreaks[2]; | |
c906108c SS |
106 | |
107 | /* Hook for determining the TOC address when calling functions in the | |
108 | inferior under AIX. The initialization code in rs6000-nat.c sets | |
109 | this hook to point to find_toc_address. */ | |
110 | ||
7a78ae4e ND |
111 | CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR) = NULL; |
112 | ||
113 | /* Hook to set the current architecture when starting a child process. | |
114 | rs6000-nat.c sets this. */ | |
115 | ||
116 | void (*rs6000_set_host_arch_hook) (int) = NULL; | |
c906108c SS |
117 | |
118 | /* Static function prototypes */ | |
119 | ||
a14ed312 KB |
120 | static CORE_ADDR branch_dest (int opcode, int instr, CORE_ADDR pc, |
121 | CORE_ADDR safety); | |
077276e8 KB |
122 | static CORE_ADDR skip_prologue (CORE_ADDR, CORE_ADDR, |
123 | struct rs6000_framedata *); | |
7a78ae4e ND |
124 | static void frame_get_saved_regs (struct frame_info * fi, |
125 | struct rs6000_framedata * fdatap); | |
126 | static CORE_ADDR frame_initial_stack_address (struct frame_info *); | |
c906108c | 127 | |
7a78ae4e | 128 | /* Read a LEN-byte address from debugged memory address MEMADDR. */ |
c906108c | 129 | |
7a78ae4e ND |
130 | static CORE_ADDR |
131 | read_memory_addr (CORE_ADDR memaddr, int len) | |
132 | { | |
133 | return read_memory_unsigned_integer (memaddr, len); | |
134 | } | |
c906108c | 135 | |
7a78ae4e ND |
136 | static CORE_ADDR |
137 | rs6000_skip_prologue (CORE_ADDR pc) | |
b83266a0 SS |
138 | { |
139 | struct rs6000_framedata frame; | |
077276e8 | 140 | pc = skip_prologue (pc, 0, &frame); |
b83266a0 SS |
141 | return pc; |
142 | } | |
143 | ||
144 | ||
c906108c SS |
145 | /* Fill in fi->saved_regs */ |
146 | ||
147 | struct frame_extra_info | |
148 | { | |
149 | /* Functions calling alloca() change the value of the stack | |
150 | pointer. We need to use initial stack pointer (which is saved in | |
151 | r31 by gcc) in such cases. If a compiler emits traceback table, | |
152 | then we should use the alloca register specified in traceback | |
153 | table. FIXME. */ | |
c5aa993b | 154 | CORE_ADDR initial_sp; /* initial stack pointer. */ |
c906108c SS |
155 | }; |
156 | ||
9aa1e687 | 157 | void |
7a78ae4e | 158 | rs6000_init_extra_frame_info (int fromleaf, struct frame_info *fi) |
c906108c | 159 | { |
c5aa993b | 160 | fi->extra_info = (struct frame_extra_info *) |
c906108c SS |
161 | frame_obstack_alloc (sizeof (struct frame_extra_info)); |
162 | fi->extra_info->initial_sp = 0; | |
163 | if (fi->next != (CORE_ADDR) 0 | |
164 | && fi->pc < TEXT_SEGMENT_BASE) | |
7a292a7a | 165 | /* We're in get_prev_frame */ |
c906108c SS |
166 | /* and this is a special signal frame. */ |
167 | /* (fi->pc will be some low address in the kernel, */ | |
168 | /* to which the signal handler returns). */ | |
169 | fi->signal_handler_caller = 1; | |
170 | } | |
171 | ||
7a78ae4e ND |
172 | /* Put here the code to store, into a struct frame_saved_regs, |
173 | the addresses of the saved registers of frame described by FRAME_INFO. | |
174 | This includes special registers such as pc and fp saved in special | |
175 | ways in the stack frame. sp is even more special: | |
176 | the address we return for it IS the sp for the next frame. */ | |
c906108c | 177 | |
7a78ae4e ND |
178 | /* In this implementation for RS/6000, we do *not* save sp. I am |
179 | not sure if it will be needed. The following function takes care of gpr's | |
180 | and fpr's only. */ | |
181 | ||
9aa1e687 | 182 | void |
7a78ae4e | 183 | rs6000_frame_init_saved_regs (struct frame_info *fi) |
c906108c SS |
184 | { |
185 | frame_get_saved_regs (fi, NULL); | |
186 | } | |
187 | ||
7a78ae4e ND |
188 | static CORE_ADDR |
189 | rs6000_frame_args_address (struct frame_info *fi) | |
c906108c SS |
190 | { |
191 | if (fi->extra_info->initial_sp != 0) | |
192 | return fi->extra_info->initial_sp; | |
193 | else | |
194 | return frame_initial_stack_address (fi); | |
195 | } | |
196 | ||
7a78ae4e ND |
197 | /* Immediately after a function call, return the saved pc. |
198 | Can't go through the frames for this because on some machines | |
199 | the new frame is not set up until the new function executes | |
200 | some instructions. */ | |
201 | ||
202 | static CORE_ADDR | |
203 | rs6000_saved_pc_after_call (struct frame_info *fi) | |
204 | { | |
9aa1e687 | 205 | return read_register (PPC_LR_REGNUM); |
7a78ae4e | 206 | } |
c906108c SS |
207 | |
208 | /* Calculate the destination of a branch/jump. Return -1 if not a branch. */ | |
209 | ||
210 | static CORE_ADDR | |
7a78ae4e | 211 | branch_dest (int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety) |
c906108c SS |
212 | { |
213 | CORE_ADDR dest; | |
214 | int immediate; | |
215 | int absolute; | |
216 | int ext_op; | |
217 | ||
218 | absolute = (int) ((instr >> 1) & 1); | |
219 | ||
c5aa993b JM |
220 | switch (opcode) |
221 | { | |
222 | case 18: | |
223 | immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */ | |
224 | if (absolute) | |
225 | dest = immediate; | |
226 | else | |
227 | dest = pc + immediate; | |
228 | break; | |
229 | ||
230 | case 16: | |
231 | immediate = ((instr & ~3) << 16) >> 16; /* br conditional */ | |
232 | if (absolute) | |
233 | dest = immediate; | |
234 | else | |
235 | dest = pc + immediate; | |
236 | break; | |
237 | ||
238 | case 19: | |
239 | ext_op = (instr >> 1) & 0x3ff; | |
240 | ||
241 | if (ext_op == 16) /* br conditional register */ | |
242 | { | |
9aa1e687 | 243 | dest = read_register (PPC_LR_REGNUM) & ~3; |
c5aa993b JM |
244 | |
245 | /* If we are about to return from a signal handler, dest is | |
246 | something like 0x3c90. The current frame is a signal handler | |
247 | caller frame, upon completion of the sigreturn system call | |
248 | execution will return to the saved PC in the frame. */ | |
249 | if (dest < TEXT_SEGMENT_BASE) | |
250 | { | |
251 | struct frame_info *fi; | |
252 | ||
253 | fi = get_current_frame (); | |
254 | if (fi != NULL) | |
7a78ae4e ND |
255 | dest = read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET, |
256 | TDEP->wordsize); | |
c5aa993b JM |
257 | } |
258 | } | |
259 | ||
260 | else if (ext_op == 528) /* br cond to count reg */ | |
261 | { | |
9aa1e687 | 262 | dest = read_register (PPC_CTR_REGNUM) & ~3; |
c5aa993b JM |
263 | |
264 | /* If we are about to execute a system call, dest is something | |
265 | like 0x22fc or 0x3b00. Upon completion the system call | |
266 | will return to the address in the link register. */ | |
267 | if (dest < TEXT_SEGMENT_BASE) | |
9aa1e687 | 268 | dest = read_register (PPC_LR_REGNUM) & ~3; |
c5aa993b JM |
269 | } |
270 | else | |
271 | return -1; | |
272 | break; | |
c906108c | 273 | |
c5aa993b JM |
274 | default: |
275 | return -1; | |
276 | } | |
c906108c SS |
277 | return (dest < TEXT_SEGMENT_BASE) ? safety : dest; |
278 | } | |
279 | ||
280 | ||
281 | /* Sequence of bytes for breakpoint instruction. */ | |
282 | ||
283 | #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 } | |
284 | #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d } | |
285 | ||
7a78ae4e ND |
286 | static unsigned char * |
287 | rs6000_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size) | |
c906108c SS |
288 | { |
289 | static unsigned char big_breakpoint[] = BIG_BREAKPOINT; | |
290 | static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT; | |
291 | *bp_size = 4; | |
292 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) | |
293 | return big_breakpoint; | |
294 | else | |
295 | return little_breakpoint; | |
296 | } | |
297 | ||
298 | ||
299 | /* AIX does not support PT_STEP. Simulate it. */ | |
300 | ||
301 | void | |
379d08a1 AC |
302 | rs6000_software_single_step (enum target_signal signal, |
303 | int insert_breakpoints_p) | |
c906108c SS |
304 | { |
305 | #define INSNLEN(OPCODE) 4 | |
306 | ||
307 | static char le_breakp[] = LITTLE_BREAKPOINT; | |
308 | static char be_breakp[] = BIG_BREAKPOINT; | |
309 | char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp; | |
310 | int ii, insn; | |
311 | CORE_ADDR loc; | |
312 | CORE_ADDR breaks[2]; | |
313 | int opcode; | |
314 | ||
c5aa993b JM |
315 | if (insert_breakpoints_p) |
316 | { | |
c906108c | 317 | |
c5aa993b | 318 | loc = read_pc (); |
c906108c | 319 | |
c5aa993b | 320 | insn = read_memory_integer (loc, 4); |
c906108c | 321 | |
c5aa993b JM |
322 | breaks[0] = loc + INSNLEN (insn); |
323 | opcode = insn >> 26; | |
324 | breaks[1] = branch_dest (opcode, insn, loc, breaks[0]); | |
c906108c | 325 | |
c5aa993b JM |
326 | /* Don't put two breakpoints on the same address. */ |
327 | if (breaks[1] == breaks[0]) | |
328 | breaks[1] = -1; | |
c906108c | 329 | |
c5aa993b | 330 | stepBreaks[1].address = 0; |
c906108c | 331 | |
c5aa993b JM |
332 | for (ii = 0; ii < 2; ++ii) |
333 | { | |
c906108c | 334 | |
c5aa993b JM |
335 | /* ignore invalid breakpoint. */ |
336 | if (breaks[ii] == -1) | |
337 | continue; | |
c906108c | 338 | |
c5aa993b | 339 | read_memory (breaks[ii], stepBreaks[ii].data, 4); |
c906108c | 340 | |
c5aa993b JM |
341 | write_memory (breaks[ii], breakp, 4); |
342 | stepBreaks[ii].address = breaks[ii]; | |
343 | } | |
c906108c | 344 | |
c5aa993b JM |
345 | } |
346 | else | |
347 | { | |
c906108c | 348 | |
c5aa993b JM |
349 | /* remove step breakpoints. */ |
350 | for (ii = 0; ii < 2; ++ii) | |
351 | if (stepBreaks[ii].address != 0) | |
352 | write_memory | |
353 | (stepBreaks[ii].address, stepBreaks[ii].data, 4); | |
c906108c | 354 | |
c5aa993b | 355 | } |
c906108c | 356 | errno = 0; /* FIXME, don't ignore errors! */ |
c5aa993b | 357 | /* What errors? {read,write}_memory call error(). */ |
c906108c SS |
358 | } |
359 | ||
360 | ||
361 | /* return pc value after skipping a function prologue and also return | |
362 | information about a function frame. | |
363 | ||
364 | in struct rs6000_framedata fdata: | |
c5aa993b JM |
365 | - frameless is TRUE, if function does not have a frame. |
366 | - nosavedpc is TRUE, if function does not save %pc value in its frame. | |
367 | - offset is the initial size of this stack frame --- the amount by | |
368 | which we decrement the sp to allocate the frame. | |
369 | - saved_gpr is the number of the first saved gpr. | |
370 | - saved_fpr is the number of the first saved fpr. | |
371 | - alloca_reg is the number of the register used for alloca() handling. | |
372 | Otherwise -1. | |
373 | - gpr_offset is the offset of the first saved gpr from the previous frame. | |
374 | - fpr_offset is the offset of the first saved fpr from the previous frame. | |
375 | - lr_offset is the offset of the saved lr | |
376 | - cr_offset is the offset of the saved cr | |
377 | */ | |
c906108c SS |
378 | |
379 | #define SIGNED_SHORT(x) \ | |
380 | ((sizeof (short) == 2) \ | |
381 | ? ((int)(short)(x)) \ | |
382 | : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000))) | |
383 | ||
384 | #define GET_SRC_REG(x) (((x) >> 21) & 0x1f) | |
385 | ||
55d05f3b KB |
386 | /* Limit the number of skipped non-prologue instructions, as the examining |
387 | of the prologue is expensive. */ | |
388 | static int max_skip_non_prologue_insns = 10; | |
389 | ||
390 | /* Given PC representing the starting address of a function, and | |
391 | LIM_PC which is the (sloppy) limit to which to scan when looking | |
392 | for a prologue, attempt to further refine this limit by using | |
393 | the line data in the symbol table. If successful, a better guess | |
394 | on where the prologue ends is returned, otherwise the previous | |
395 | value of lim_pc is returned. */ | |
396 | static CORE_ADDR | |
397 | refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc) | |
398 | { | |
399 | struct symtab_and_line prologue_sal; | |
400 | ||
401 | prologue_sal = find_pc_line (pc, 0); | |
402 | if (prologue_sal.line != 0) | |
403 | { | |
404 | int i; | |
405 | CORE_ADDR addr = prologue_sal.end; | |
406 | ||
407 | /* Handle the case in which compiler's optimizer/scheduler | |
408 | has moved instructions into the prologue. We scan ahead | |
409 | in the function looking for address ranges whose corresponding | |
410 | line number is less than or equal to the first one that we | |
411 | found for the function. (It can be less than when the | |
412 | scheduler puts a body instruction before the first prologue | |
413 | instruction.) */ | |
414 | for (i = 2 * max_skip_non_prologue_insns; | |
415 | i > 0 && (lim_pc == 0 || addr < lim_pc); | |
416 | i--) | |
417 | { | |
418 | struct symtab_and_line sal; | |
419 | ||
420 | sal = find_pc_line (addr, 0); | |
421 | if (sal.line == 0) | |
422 | break; | |
423 | if (sal.line <= prologue_sal.line | |
424 | && sal.symtab == prologue_sal.symtab) | |
425 | { | |
426 | prologue_sal = sal; | |
427 | } | |
428 | addr = sal.end; | |
429 | } | |
430 | ||
431 | if (lim_pc == 0 || prologue_sal.end < lim_pc) | |
432 | lim_pc = prologue_sal.end; | |
433 | } | |
434 | return lim_pc; | |
435 | } | |
436 | ||
437 | ||
7a78ae4e | 438 | static CORE_ADDR |
077276e8 | 439 | skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata) |
c906108c SS |
440 | { |
441 | CORE_ADDR orig_pc = pc; | |
55d05f3b | 442 | CORE_ADDR last_prologue_pc = pc; |
c906108c SS |
443 | char buf[4]; |
444 | unsigned long op; | |
445 | long offset = 0; | |
482ca3f5 KB |
446 | int lr_reg = -1; |
447 | int cr_reg = -1; | |
c906108c SS |
448 | int reg; |
449 | int framep = 0; | |
450 | int minimal_toc_loaded = 0; | |
ddb20c56 | 451 | int prev_insn_was_prologue_insn = 1; |
55d05f3b KB |
452 | int num_skip_non_prologue_insns = 0; |
453 | ||
454 | /* Attempt to find the end of the prologue when no limit is specified. | |
455 | Note that refine_prologue_limit() has been written so that it may | |
456 | be used to "refine" the limits of non-zero PC values too, but this | |
457 | is only safe if we 1) trust the line information provided by the | |
458 | compiler and 2) iterate enough to actually find the end of the | |
459 | prologue. | |
460 | ||
461 | It may become a good idea at some point (for both performance and | |
462 | accuracy) to unconditionally call refine_prologue_limit(). But, | |
463 | until we can make a clear determination that this is beneficial, | |
464 | we'll play it safe and only use it to obtain a limit when none | |
465 | has been specified. */ | |
466 | if (lim_pc == 0) | |
467 | lim_pc = refine_prologue_limit (pc, lim_pc); | |
c906108c | 468 | |
ddb20c56 | 469 | memset (fdata, 0, sizeof (struct rs6000_framedata)); |
c906108c SS |
470 | fdata->saved_gpr = -1; |
471 | fdata->saved_fpr = -1; | |
472 | fdata->alloca_reg = -1; | |
473 | fdata->frameless = 1; | |
474 | fdata->nosavedpc = 1; | |
475 | ||
55d05f3b | 476 | for (;; pc += 4) |
c906108c | 477 | { |
ddb20c56 KB |
478 | /* Sometimes it isn't clear if an instruction is a prologue |
479 | instruction or not. When we encounter one of these ambiguous | |
480 | cases, we'll set prev_insn_was_prologue_insn to 0 (false). | |
481 | Otherwise, we'll assume that it really is a prologue instruction. */ | |
482 | if (prev_insn_was_prologue_insn) | |
483 | last_prologue_pc = pc; | |
55d05f3b KB |
484 | |
485 | /* Stop scanning if we've hit the limit. */ | |
486 | if (lim_pc != 0 && pc >= lim_pc) | |
487 | break; | |
488 | ||
ddb20c56 KB |
489 | prev_insn_was_prologue_insn = 1; |
490 | ||
55d05f3b | 491 | /* Fetch the instruction and convert it to an integer. */ |
ddb20c56 KB |
492 | if (target_read_memory (pc, buf, 4)) |
493 | break; | |
494 | op = extract_signed_integer (buf, 4); | |
c906108c | 495 | |
c5aa993b JM |
496 | if ((op & 0xfc1fffff) == 0x7c0802a6) |
497 | { /* mflr Rx */ | |
498 | lr_reg = (op & 0x03e00000) | 0x90010000; | |
499 | continue; | |
c906108c | 500 | |
c5aa993b JM |
501 | } |
502 | else if ((op & 0xfc1fffff) == 0x7c000026) | |
503 | { /* mfcr Rx */ | |
504 | cr_reg = (op & 0x03e00000) | 0x90010000; | |
505 | continue; | |
c906108c | 506 | |
c906108c | 507 | } |
c5aa993b JM |
508 | else if ((op & 0xfc1f0000) == 0xd8010000) |
509 | { /* stfd Rx,NUM(r1) */ | |
510 | reg = GET_SRC_REG (op); | |
511 | if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg) | |
512 | { | |
513 | fdata->saved_fpr = reg; | |
514 | fdata->fpr_offset = SIGNED_SHORT (op) + offset; | |
515 | } | |
516 | continue; | |
c906108c | 517 | |
c5aa993b JM |
518 | } |
519 | else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */ | |
7a78ae4e ND |
520 | (((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */ |
521 | (op & 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */ | |
522 | (op & 0x03e00000) >= 0x01a00000)) /* rx >= r13 */ | |
c5aa993b JM |
523 | { |
524 | ||
525 | reg = GET_SRC_REG (op); | |
526 | if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg) | |
527 | { | |
528 | fdata->saved_gpr = reg; | |
7a78ae4e ND |
529 | if ((op & 0xfc1f0003) == 0xf8010000) |
530 | op = (op >> 1) << 1; | |
c5aa993b JM |
531 | fdata->gpr_offset = SIGNED_SHORT (op) + offset; |
532 | } | |
533 | continue; | |
c906108c | 534 | |
ddb20c56 KB |
535 | } |
536 | else if ((op & 0xffff0000) == 0x60000000) | |
537 | { | |
538 | /* nop */ | |
539 | /* Allow nops in the prologue, but do not consider them to | |
540 | be part of the prologue unless followed by other prologue | |
541 | instructions. */ | |
542 | prev_insn_was_prologue_insn = 0; | |
543 | continue; | |
544 | ||
c906108c | 545 | } |
c5aa993b JM |
546 | else if ((op & 0xffff0000) == 0x3c000000) |
547 | { /* addis 0,0,NUM, used | |
548 | for >= 32k frames */ | |
549 | fdata->offset = (op & 0x0000ffff) << 16; | |
550 | fdata->frameless = 0; | |
551 | continue; | |
552 | ||
553 | } | |
554 | else if ((op & 0xffff0000) == 0x60000000) | |
555 | { /* ori 0,0,NUM, 2nd ha | |
556 | lf of >= 32k frames */ | |
557 | fdata->offset |= (op & 0x0000ffff); | |
558 | fdata->frameless = 0; | |
559 | continue; | |
560 | ||
561 | } | |
482ca3f5 | 562 | else if (lr_reg != -1 && (op & 0xffff0000) == lr_reg) |
c5aa993b JM |
563 | { /* st Rx,NUM(r1) |
564 | where Rx == lr */ | |
565 | fdata->lr_offset = SIGNED_SHORT (op) + offset; | |
566 | fdata->nosavedpc = 0; | |
567 | lr_reg = 0; | |
568 | continue; | |
569 | ||
570 | } | |
482ca3f5 | 571 | else if (cr_reg != -1 && (op & 0xffff0000) == cr_reg) |
c5aa993b JM |
572 | { /* st Rx,NUM(r1) |
573 | where Rx == cr */ | |
574 | fdata->cr_offset = SIGNED_SHORT (op) + offset; | |
575 | cr_reg = 0; | |
576 | continue; | |
577 | ||
578 | } | |
579 | else if (op == 0x48000005) | |
580 | { /* bl .+4 used in | |
581 | -mrelocatable */ | |
582 | continue; | |
583 | ||
584 | } | |
585 | else if (op == 0x48000004) | |
586 | { /* b .+4 (xlc) */ | |
587 | break; | |
588 | ||
589 | } | |
590 | else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used | |
c906108c | 591 | in V.4 -mrelocatable */ |
c5aa993b JM |
592 | op == 0x7fc0f214) && /* add r30,r0,r30, used |
593 | in V.4 -mrelocatable */ | |
594 | lr_reg == 0x901e0000) | |
595 | { | |
596 | continue; | |
c906108c | 597 | |
c5aa993b JM |
598 | } |
599 | else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used | |
c906108c | 600 | in V.4 -mminimal-toc */ |
c5aa993b JM |
601 | (op & 0xffff0000) == 0x3bde0000) |
602 | { /* addi 30,30,foo@l */ | |
603 | continue; | |
c906108c | 604 | |
c5aa993b JM |
605 | } |
606 | else if ((op & 0xfc000001) == 0x48000001) | |
607 | { /* bl foo, | |
608 | to save fprs??? */ | |
c906108c | 609 | |
c5aa993b JM |
610 | fdata->frameless = 0; |
611 | /* Don't skip over the subroutine call if it is not within the first | |
612 | three instructions of the prologue. */ | |
613 | if ((pc - orig_pc) > 8) | |
614 | break; | |
615 | ||
616 | op = read_memory_integer (pc + 4, 4); | |
617 | ||
618 | /* At this point, make sure this is not a trampoline function | |
619 | (a function that simply calls another functions, and nothing else). | |
620 | If the next is not a nop, this branch was part of the function | |
621 | prologue. */ | |
622 | ||
623 | if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */ | |
624 | break; /* don't skip over | |
625 | this branch */ | |
626 | continue; | |
627 | ||
628 | /* update stack pointer */ | |
629 | } | |
7a78ae4e ND |
630 | else if ((op & 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */ |
631 | (op & 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */ | |
632 | { | |
c5aa993b | 633 | fdata->frameless = 0; |
7a78ae4e ND |
634 | if ((op & 0xffff0003) == 0xf8210001) |
635 | op = (op >> 1) << 1; | |
c5aa993b JM |
636 | fdata->offset = SIGNED_SHORT (op); |
637 | offset = fdata->offset; | |
638 | continue; | |
639 | ||
640 | } | |
641 | else if (op == 0x7c21016e) | |
642 | { /* stwux 1,1,0 */ | |
643 | fdata->frameless = 0; | |
644 | offset = fdata->offset; | |
645 | continue; | |
646 | ||
647 | /* Load up minimal toc pointer */ | |
648 | } | |
649 | else if ((op >> 22) == 0x20f | |
650 | && !minimal_toc_loaded) | |
651 | { /* l r31,... or l r30,... */ | |
652 | minimal_toc_loaded = 1; | |
653 | continue; | |
654 | ||
f6077098 KB |
655 | /* move parameters from argument registers to local variable |
656 | registers */ | |
657 | } | |
658 | else if ((op & 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */ | |
659 | (((op >> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */ | |
660 | (((op >> 21) & 31) <= 10) && | |
661 | (((op >> 16) & 31) >= fdata->saved_gpr)) /* Rx: local var reg */ | |
662 | { | |
663 | continue; | |
664 | ||
c5aa993b JM |
665 | /* store parameters in stack */ |
666 | } | |
667 | else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */ | |
7a78ae4e | 668 | (op & 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */ |
c5aa993b | 669 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ |
7a78ae4e ND |
670 | (op & 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */ |
671 | { | |
c5aa993b | 672 | continue; |
c906108c | 673 | |
c5aa993b JM |
674 | /* store parameters in stack via frame pointer */ |
675 | } | |
676 | else if (framep && | |
677 | ((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */ | |
678 | (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */ | |
679 | (op & 0xfc1f0000) == 0xfc1f0000)) | |
680 | { /* frsp, fp?,NUM(r1) */ | |
681 | continue; | |
682 | ||
683 | /* Set up frame pointer */ | |
684 | } | |
685 | else if (op == 0x603f0000 /* oril r31, r1, 0x0 */ | |
686 | || op == 0x7c3f0b78) | |
687 | { /* mr r31, r1 */ | |
688 | fdata->frameless = 0; | |
689 | framep = 1; | |
690 | fdata->alloca_reg = 31; | |
691 | continue; | |
692 | ||
693 | /* Another way to set up the frame pointer. */ | |
694 | } | |
695 | else if ((op & 0xfc1fffff) == 0x38010000) | |
696 | { /* addi rX, r1, 0x0 */ | |
697 | fdata->frameless = 0; | |
698 | framep = 1; | |
699 | fdata->alloca_reg = (op & ~0x38010000) >> 21; | |
700 | continue; | |
701 | ||
702 | } | |
703 | else | |
704 | { | |
55d05f3b KB |
705 | /* Not a recognized prologue instruction. |
706 | Handle optimizer code motions into the prologue by continuing | |
707 | the search if we have no valid frame yet or if the return | |
708 | address is not yet saved in the frame. */ | |
709 | if (fdata->frameless == 0 | |
710 | && (lr_reg == -1 || fdata->nosavedpc == 0)) | |
711 | break; | |
712 | ||
713 | if (op == 0x4e800020 /* blr */ | |
714 | || op == 0x4e800420) /* bctr */ | |
715 | /* Do not scan past epilogue in frameless functions or | |
716 | trampolines. */ | |
717 | break; | |
718 | if ((op & 0xf4000000) == 0x40000000) /* bxx */ | |
719 | /* Never skip branches. */ | |
720 | break; | |
721 | ||
722 | if (num_skip_non_prologue_insns++ > max_skip_non_prologue_insns) | |
723 | /* Do not scan too many insns, scanning insns is expensive with | |
724 | remote targets. */ | |
725 | break; | |
726 | ||
727 | /* Continue scanning. */ | |
728 | prev_insn_was_prologue_insn = 0; | |
729 | continue; | |
c5aa993b | 730 | } |
c906108c SS |
731 | } |
732 | ||
733 | #if 0 | |
734 | /* I have problems with skipping over __main() that I need to address | |
735 | * sometime. Previously, I used to use misc_function_vector which | |
736 | * didn't work as well as I wanted to be. -MGO */ | |
737 | ||
738 | /* If the first thing after skipping a prolog is a branch to a function, | |
739 | this might be a call to an initializer in main(), introduced by gcc2. | |
740 | We'd like to skip over it as well. Fortunately, xlc does some extra | |
741 | work before calling a function right after a prologue, thus we can | |
742 | single out such gcc2 behaviour. */ | |
c906108c | 743 | |
c906108c | 744 | |
c5aa993b JM |
745 | if ((op & 0xfc000001) == 0x48000001) |
746 | { /* bl foo, an initializer function? */ | |
747 | op = read_memory_integer (pc + 4, 4); | |
748 | ||
749 | if (op == 0x4def7b82) | |
750 | { /* cror 0xf, 0xf, 0xf (nop) */ | |
c906108c | 751 | |
c5aa993b JM |
752 | /* check and see if we are in main. If so, skip over this initializer |
753 | function as well. */ | |
c906108c | 754 | |
c5aa993b JM |
755 | tmp = find_pc_misc_function (pc); |
756 | if (tmp >= 0 && STREQ (misc_function_vector[tmp].name, "main")) | |
757 | return pc + 8; | |
758 | } | |
c906108c | 759 | } |
c906108c | 760 | #endif /* 0 */ |
c5aa993b JM |
761 | |
762 | fdata->offset = -fdata->offset; | |
ddb20c56 | 763 | return last_prologue_pc; |
c906108c SS |
764 | } |
765 | ||
766 | ||
767 | /************************************************************************* | |
f6077098 | 768 | Support for creating pushing a dummy frame into the stack, and popping |
c906108c SS |
769 | frames, etc. |
770 | *************************************************************************/ | |
771 | ||
c906108c | 772 | |
7a78ae4e | 773 | /* Pop the innermost frame, go back to the caller. */ |
c5aa993b | 774 | |
c906108c | 775 | static void |
7a78ae4e | 776 | rs6000_pop_frame (void) |
c906108c | 777 | { |
470d5666 | 778 | CORE_ADDR pc, lr, sp, prev_sp, addr; /* %pc, %lr, %sp */ |
c906108c SS |
779 | struct rs6000_framedata fdata; |
780 | struct frame_info *frame = get_current_frame (); | |
470d5666 | 781 | int ii, wordsize; |
c906108c SS |
782 | |
783 | pc = read_pc (); | |
784 | sp = FRAME_FP (frame); | |
785 | ||
58223630 | 786 | if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame)) |
c906108c | 787 | { |
7a78ae4e ND |
788 | generic_pop_dummy_frame (); |
789 | flush_cached_frames (); | |
790 | return; | |
c906108c SS |
791 | } |
792 | ||
793 | /* Make sure that all registers are valid. */ | |
794 | read_register_bytes (0, NULL, REGISTER_BYTES); | |
795 | ||
796 | /* figure out previous %pc value. If the function is frameless, it is | |
797 | still in the link register, otherwise walk the frames and retrieve the | |
798 | saved %pc value in the previous frame. */ | |
799 | ||
800 | addr = get_pc_function_start (frame->pc); | |
077276e8 | 801 | (void) skip_prologue (addr, frame->pc, &fdata); |
c906108c | 802 | |
7a78ae4e | 803 | wordsize = TDEP->wordsize; |
c906108c SS |
804 | if (fdata.frameless) |
805 | prev_sp = sp; | |
806 | else | |
7a78ae4e | 807 | prev_sp = read_memory_addr (sp, wordsize); |
c906108c | 808 | if (fdata.lr_offset == 0) |
9aa1e687 | 809 | lr = read_register (PPC_LR_REGNUM); |
c906108c | 810 | else |
7a78ae4e | 811 | lr = read_memory_addr (prev_sp + fdata.lr_offset, wordsize); |
c906108c SS |
812 | |
813 | /* reset %pc value. */ | |
814 | write_register (PC_REGNUM, lr); | |
815 | ||
816 | /* reset register values if any was saved earlier. */ | |
817 | ||
818 | if (fdata.saved_gpr != -1) | |
819 | { | |
820 | addr = prev_sp + fdata.gpr_offset; | |
c5aa993b JM |
821 | for (ii = fdata.saved_gpr; ii <= 31; ++ii) |
822 | { | |
7a78ae4e ND |
823 | read_memory (addr, ®isters[REGISTER_BYTE (ii)], wordsize); |
824 | addr += wordsize; | |
c5aa993b | 825 | } |
c906108c SS |
826 | } |
827 | ||
828 | if (fdata.saved_fpr != -1) | |
829 | { | |
830 | addr = prev_sp + fdata.fpr_offset; | |
c5aa993b JM |
831 | for (ii = fdata.saved_fpr; ii <= 31; ++ii) |
832 | { | |
833 | read_memory (addr, ®isters[REGISTER_BYTE (ii + FP0_REGNUM)], 8); | |
834 | addr += 8; | |
835 | } | |
c906108c SS |
836 | } |
837 | ||
838 | write_register (SP_REGNUM, prev_sp); | |
839 | target_store_registers (-1); | |
840 | flush_cached_frames (); | |
841 | } | |
842 | ||
7a78ae4e ND |
843 | /* Fixup the call sequence of a dummy function, with the real function |
844 | address. Its arguments will be passed by gdb. */ | |
c906108c | 845 | |
7a78ae4e ND |
846 | static void |
847 | rs6000_fix_call_dummy (char *dummyname, CORE_ADDR pc, CORE_ADDR fun, | |
848 | int nargs, value_ptr *args, struct type *type, | |
849 | int gcc_p) | |
c906108c SS |
850 | { |
851 | #define TOC_ADDR_OFFSET 20 | |
852 | #define TARGET_ADDR_OFFSET 28 | |
853 | ||
854 | int ii; | |
855 | CORE_ADDR target_addr; | |
856 | ||
7a78ae4e | 857 | if (rs6000_find_toc_address_hook != NULL) |
f6077098 | 858 | { |
7a78ae4e | 859 | CORE_ADDR tocvalue = (*rs6000_find_toc_address_hook) (fun); |
9aa1e687 | 860 | write_register (PPC_TOC_REGNUM, tocvalue); |
f6077098 | 861 | } |
c906108c SS |
862 | } |
863 | ||
7a78ae4e | 864 | /* Pass the arguments in either registers, or in the stack. In RS/6000, |
c906108c SS |
865 | the first eight words of the argument list (that might be less than |
866 | eight parameters if some parameters occupy more than one word) are | |
7a78ae4e | 867 | passed in r3..r10 registers. float and double parameters are |
c906108c SS |
868 | passed in fpr's, in addition to that. Rest of the parameters if any |
869 | are passed in user stack. There might be cases in which half of the | |
870 | parameter is copied into registers, the other half is pushed into | |
871 | stack. | |
872 | ||
7a78ae4e ND |
873 | Stack must be aligned on 64-bit boundaries when synthesizing |
874 | function calls. | |
875 | ||
c906108c SS |
876 | If the function is returning a structure, then the return address is passed |
877 | in r3, then the first 7 words of the parameters can be passed in registers, | |
878 | starting from r4. */ | |
879 | ||
7a78ae4e ND |
880 | static CORE_ADDR |
881 | rs6000_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp, | |
882 | int struct_return, CORE_ADDR struct_addr) | |
c906108c SS |
883 | { |
884 | int ii; | |
885 | int len = 0; | |
c5aa993b JM |
886 | int argno; /* current argument number */ |
887 | int argbytes; /* current argument byte */ | |
888 | char tmp_buffer[50]; | |
889 | int f_argno = 0; /* current floating point argno */ | |
7a78ae4e | 890 | int wordsize = TDEP->wordsize; |
c906108c SS |
891 | |
892 | value_ptr arg = 0; | |
893 | struct type *type; | |
894 | ||
895 | CORE_ADDR saved_sp; | |
896 | ||
c906108c SS |
897 | /* The first eight words of ther arguments are passed in registers. Copy |
898 | them appropriately. | |
899 | ||
900 | If the function is returning a `struct', then the first word (which | |
901 | will be passed in r3) is used for struct return address. In that | |
902 | case we should advance one word and start from r4 register to copy | |
903 | parameters. */ | |
904 | ||
c5aa993b | 905 | ii = struct_return ? 1 : 0; |
c906108c SS |
906 | |
907 | /* | |
c5aa993b JM |
908 | effectively indirect call... gcc does... |
909 | ||
910 | return_val example( float, int); | |
911 | ||
912 | eabi: | |
913 | float in fp0, int in r3 | |
914 | offset of stack on overflow 8/16 | |
915 | for varargs, must go by type. | |
916 | power open: | |
917 | float in r3&r4, int in r5 | |
918 | offset of stack on overflow different | |
919 | both: | |
920 | return in r3 or f0. If no float, must study how gcc emulates floats; | |
921 | pay attention to arg promotion. | |
922 | User may have to cast\args to handle promotion correctly | |
923 | since gdb won't know if prototype supplied or not. | |
924 | */ | |
c906108c | 925 | |
c5aa993b JM |
926 | for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii) |
927 | { | |
f6077098 | 928 | int reg_size = REGISTER_RAW_SIZE (ii + 3); |
c5aa993b JM |
929 | |
930 | arg = args[argno]; | |
931 | type = check_typedef (VALUE_TYPE (arg)); | |
932 | len = TYPE_LENGTH (type); | |
933 | ||
934 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
935 | { | |
936 | ||
937 | /* floating point arguments are passed in fpr's, as well as gpr's. | |
938 | There are 13 fpr's reserved for passing parameters. At this point | |
939 | there is no way we would run out of them. */ | |
940 | ||
941 | if (len > 8) | |
942 | printf_unfiltered ( | |
943 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); | |
944 | ||
945 | memcpy (®isters[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)], | |
946 | VALUE_CONTENTS (arg), | |
947 | len); | |
948 | ++f_argno; | |
949 | } | |
950 | ||
f6077098 | 951 | if (len > reg_size) |
c5aa993b JM |
952 | { |
953 | ||
954 | /* Argument takes more than one register. */ | |
955 | while (argbytes < len) | |
956 | { | |
f6077098 | 957 | memset (®isters[REGISTER_BYTE (ii + 3)], 0, reg_size); |
c5aa993b JM |
958 | memcpy (®isters[REGISTER_BYTE (ii + 3)], |
959 | ((char *) VALUE_CONTENTS (arg)) + argbytes, | |
f6077098 KB |
960 | (len - argbytes) > reg_size |
961 | ? reg_size : len - argbytes); | |
962 | ++ii, argbytes += reg_size; | |
c5aa993b JM |
963 | |
964 | if (ii >= 8) | |
965 | goto ran_out_of_registers_for_arguments; | |
966 | } | |
967 | argbytes = 0; | |
968 | --ii; | |
969 | } | |
970 | else | |
971 | { /* Argument can fit in one register. No problem. */ | |
f6077098 KB |
972 | int adj = TARGET_BYTE_ORDER == BIG_ENDIAN ? reg_size - len : 0; |
973 | memset (®isters[REGISTER_BYTE (ii + 3)], 0, reg_size); | |
974 | memcpy ((char *)®isters[REGISTER_BYTE (ii + 3)] + adj, | |
975 | VALUE_CONTENTS (arg), len); | |
c5aa993b JM |
976 | } |
977 | ++argno; | |
c906108c | 978 | } |
c906108c SS |
979 | |
980 | ran_out_of_registers_for_arguments: | |
981 | ||
7a78ae4e | 982 | saved_sp = read_sp (); |
f6077098 | 983 | #ifndef ELF_OBJECT_FORMAT |
7a78ae4e ND |
984 | /* location for 8 parameters are always reserved. */ |
985 | sp -= wordsize * 8; | |
f6077098 | 986 | |
7a78ae4e ND |
987 | /* another six words for back chain, TOC register, link register, etc. */ |
988 | sp -= wordsize * 6; | |
f6077098 | 989 | |
7a78ae4e ND |
990 | /* stack pointer must be quadword aligned */ |
991 | sp &= -16; | |
f6077098 | 992 | #endif |
c906108c | 993 | |
c906108c SS |
994 | /* if there are more arguments, allocate space for them in |
995 | the stack, then push them starting from the ninth one. */ | |
996 | ||
c5aa993b JM |
997 | if ((argno < nargs) || argbytes) |
998 | { | |
999 | int space = 0, jj; | |
c906108c | 1000 | |
c5aa993b JM |
1001 | if (argbytes) |
1002 | { | |
1003 | space += ((len - argbytes + 3) & -4); | |
1004 | jj = argno + 1; | |
1005 | } | |
1006 | else | |
1007 | jj = argno; | |
c906108c | 1008 | |
c5aa993b JM |
1009 | for (; jj < nargs; ++jj) |
1010 | { | |
1011 | value_ptr val = args[jj]; | |
1012 | space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4; | |
1013 | } | |
c906108c | 1014 | |
c5aa993b | 1015 | /* add location required for the rest of the parameters */ |
f6077098 | 1016 | space = (space + 15) & -16; |
c5aa993b | 1017 | sp -= space; |
c906108c | 1018 | |
c5aa993b JM |
1019 | /* This is another instance we need to be concerned about securing our |
1020 | stack space. If we write anything underneath %sp (r1), we might conflict | |
1021 | with the kernel who thinks he is free to use this area. So, update %sp | |
1022 | first before doing anything else. */ | |
c906108c | 1023 | |
c5aa993b | 1024 | write_register (SP_REGNUM, sp); |
c906108c | 1025 | |
c5aa993b JM |
1026 | /* if the last argument copied into the registers didn't fit there |
1027 | completely, push the rest of it into stack. */ | |
c906108c | 1028 | |
c5aa993b JM |
1029 | if (argbytes) |
1030 | { | |
1031 | write_memory (sp + 24 + (ii * 4), | |
1032 | ((char *) VALUE_CONTENTS (arg)) + argbytes, | |
1033 | len - argbytes); | |
1034 | ++argno; | |
1035 | ii += ((len - argbytes + 3) & -4) / 4; | |
1036 | } | |
c906108c | 1037 | |
c5aa993b JM |
1038 | /* push the rest of the arguments into stack. */ |
1039 | for (; argno < nargs; ++argno) | |
1040 | { | |
c906108c | 1041 | |
c5aa993b JM |
1042 | arg = args[argno]; |
1043 | type = check_typedef (VALUE_TYPE (arg)); | |
1044 | len = TYPE_LENGTH (type); | |
c906108c SS |
1045 | |
1046 | ||
c5aa993b JM |
1047 | /* float types should be passed in fpr's, as well as in the stack. */ |
1048 | if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13) | |
1049 | { | |
c906108c | 1050 | |
c5aa993b JM |
1051 | if (len > 8) |
1052 | printf_unfiltered ( | |
1053 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); | |
c906108c | 1054 | |
c5aa993b JM |
1055 | memcpy (®isters[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)], |
1056 | VALUE_CONTENTS (arg), | |
1057 | len); | |
1058 | ++f_argno; | |
1059 | } | |
c906108c | 1060 | |
c5aa993b JM |
1061 | write_memory (sp + 24 + (ii * 4), (char *) VALUE_CONTENTS (arg), len); |
1062 | ii += ((len + 3) & -4) / 4; | |
1063 | } | |
c906108c | 1064 | } |
c906108c SS |
1065 | else |
1066 | /* Secure stack areas first, before doing anything else. */ | |
1067 | write_register (SP_REGNUM, sp); | |
1068 | ||
c906108c SS |
1069 | /* set back chain properly */ |
1070 | store_address (tmp_buffer, 4, saved_sp); | |
1071 | write_memory (sp, tmp_buffer, 4); | |
1072 | ||
1073 | target_store_registers (-1); | |
1074 | return sp; | |
1075 | } | |
c906108c SS |
1076 | |
1077 | /* Function: ppc_push_return_address (pc, sp) | |
1078 | Set up the return address for the inferior function call. */ | |
1079 | ||
7a78ae4e ND |
1080 | static CORE_ADDR |
1081 | ppc_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
c906108c | 1082 | { |
9aa1e687 | 1083 | write_register (PPC_LR_REGNUM, CALL_DUMMY_ADDRESS ()); |
c906108c SS |
1084 | return sp; |
1085 | } | |
1086 | ||
7a78ae4e ND |
1087 | /* Extract a function return value of type TYPE from raw register array |
1088 | REGBUF, and copy that return value into VALBUF in virtual format. */ | |
c906108c | 1089 | |
7a78ae4e ND |
1090 | static void |
1091 | rs6000_extract_return_value (struct type *valtype, char *regbuf, char *valbuf) | |
c906108c SS |
1092 | { |
1093 | int offset = 0; | |
1094 | ||
c5aa993b JM |
1095 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT) |
1096 | { | |
c906108c | 1097 | |
c5aa993b JM |
1098 | double dd; |
1099 | float ff; | |
1100 | /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes. | |
1101 | We need to truncate the return value into float size (4 byte) if | |
1102 | necessary. */ | |
c906108c | 1103 | |
c5aa993b JM |
1104 | if (TYPE_LENGTH (valtype) > 4) /* this is a double */ |
1105 | memcpy (valbuf, | |
1106 | ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], | |
1107 | TYPE_LENGTH (valtype)); | |
1108 | else | |
1109 | { /* float */ | |
1110 | memcpy (&dd, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], 8); | |
1111 | ff = (float) dd; | |
1112 | memcpy (valbuf, &ff, sizeof (float)); | |
1113 | } | |
1114 | } | |
1115 | else | |
1116 | { | |
1117 | /* return value is copied starting from r3. */ | |
1118 | if (TARGET_BYTE_ORDER == BIG_ENDIAN | |
1119 | && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3)) | |
1120 | offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype); | |
1121 | ||
1122 | memcpy (valbuf, | |
1123 | regbuf + REGISTER_BYTE (3) + offset, | |
c906108c | 1124 | TYPE_LENGTH (valtype)); |
c906108c | 1125 | } |
c906108c SS |
1126 | } |
1127 | ||
7a78ae4e | 1128 | /* Keep structure return address in this variable. |
c906108c SS |
1129 | FIXME: This is a horrid kludge which should not be allowed to continue |
1130 | living. This only allows a single nested call to a structure-returning | |
1131 | function. Come on, guys! -- gnu@cygnus.com, Aug 92 */ | |
1132 | ||
7a78ae4e | 1133 | static CORE_ADDR rs6000_struct_return_address; |
c906108c | 1134 | |
977adac5 ND |
1135 | /* Return whether handle_inferior_event() should proceed through code |
1136 | starting at PC in function NAME when stepping. | |
1137 | ||
1138 | The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to | |
1139 | handle memory references that are too distant to fit in instructions | |
1140 | generated by the compiler. For example, if 'foo' in the following | |
1141 | instruction: | |
1142 | ||
1143 | lwz r9,foo(r2) | |
1144 | ||
1145 | is greater than 32767, the linker might replace the lwz with a branch to | |
1146 | somewhere in @FIX1 that does the load in 2 instructions and then branches | |
1147 | back to where execution should continue. | |
1148 | ||
1149 | GDB should silently step over @FIX code, just like AIX dbx does. | |
1150 | Unfortunately, the linker uses the "b" instruction for the branches, | |
1151 | meaning that the link register doesn't get set. Therefore, GDB's usual | |
1152 | step_over_function() mechanism won't work. | |
1153 | ||
1154 | Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks | |
1155 | in handle_inferior_event() to skip past @FIX code. */ | |
1156 | ||
1157 | int | |
1158 | rs6000_in_solib_return_trampoline (CORE_ADDR pc, char *name) | |
1159 | { | |
1160 | return name && !strncmp (name, "@FIX", 4); | |
1161 | } | |
1162 | ||
1163 | /* Skip code that the user doesn't want to see when stepping: | |
1164 | ||
1165 | 1. Indirect function calls use a piece of trampoline code to do context | |
1166 | switching, i.e. to set the new TOC table. Skip such code if we are on | |
1167 | its first instruction (as when we have single-stepped to here). | |
1168 | ||
1169 | 2. Skip shared library trampoline code (which is different from | |
c906108c | 1170 | indirect function call trampolines). |
977adac5 ND |
1171 | |
1172 | 3. Skip bigtoc fixup code. | |
1173 | ||
c906108c | 1174 | Result is desired PC to step until, or NULL if we are not in |
977adac5 | 1175 | code that should be skipped. */ |
c906108c SS |
1176 | |
1177 | CORE_ADDR | |
7a78ae4e | 1178 | rs6000_skip_trampoline_code (CORE_ADDR pc) |
c906108c SS |
1179 | { |
1180 | register unsigned int ii, op; | |
977adac5 | 1181 | int rel; |
c906108c | 1182 | CORE_ADDR solib_target_pc; |
977adac5 | 1183 | struct minimal_symbol *msymbol; |
c906108c | 1184 | |
c5aa993b JM |
1185 | static unsigned trampoline_code[] = |
1186 | { | |
1187 | 0x800b0000, /* l r0,0x0(r11) */ | |
1188 | 0x90410014, /* st r2,0x14(r1) */ | |
1189 | 0x7c0903a6, /* mtctr r0 */ | |
1190 | 0x804b0004, /* l r2,0x4(r11) */ | |
1191 | 0x816b0008, /* l r11,0x8(r11) */ | |
1192 | 0x4e800420, /* bctr */ | |
1193 | 0x4e800020, /* br */ | |
1194 | 0 | |
c906108c SS |
1195 | }; |
1196 | ||
977adac5 ND |
1197 | /* Check for bigtoc fixup code. */ |
1198 | msymbol = lookup_minimal_symbol_by_pc (pc); | |
1199 | if (msymbol && rs6000_in_solib_return_trampoline (pc, SYMBOL_NAME (msymbol))) | |
1200 | { | |
1201 | /* Double-check that the third instruction from PC is relative "b". */ | |
1202 | op = read_memory_integer (pc + 8, 4); | |
1203 | if ((op & 0xfc000003) == 0x48000000) | |
1204 | { | |
1205 | /* Extract bits 6-29 as a signed 24-bit relative word address and | |
1206 | add it to the containing PC. */ | |
1207 | rel = ((int)(op << 6) >> 6); | |
1208 | return pc + 8 + rel; | |
1209 | } | |
1210 | } | |
1211 | ||
c906108c SS |
1212 | /* If pc is in a shared library trampoline, return its target. */ |
1213 | solib_target_pc = find_solib_trampoline_target (pc); | |
1214 | if (solib_target_pc) | |
1215 | return solib_target_pc; | |
1216 | ||
c5aa993b JM |
1217 | for (ii = 0; trampoline_code[ii]; ++ii) |
1218 | { | |
1219 | op = read_memory_integer (pc + (ii * 4), 4); | |
1220 | if (op != trampoline_code[ii]) | |
1221 | return 0; | |
1222 | } | |
1223 | ii = read_register (11); /* r11 holds destination addr */ | |
7a78ae4e | 1224 | pc = read_memory_addr (ii, TDEP->wordsize); /* (r11) value */ |
c906108c SS |
1225 | return pc; |
1226 | } | |
1227 | ||
1228 | /* Determines whether the function FI has a frame on the stack or not. */ | |
1229 | ||
9aa1e687 | 1230 | int |
c877c8e6 | 1231 | rs6000_frameless_function_invocation (struct frame_info *fi) |
c906108c SS |
1232 | { |
1233 | CORE_ADDR func_start; | |
1234 | struct rs6000_framedata fdata; | |
1235 | ||
1236 | /* Don't even think about framelessness except on the innermost frame | |
1237 | or if the function was interrupted by a signal. */ | |
1238 | if (fi->next != NULL && !fi->next->signal_handler_caller) | |
1239 | return 0; | |
c5aa993b | 1240 | |
c906108c SS |
1241 | func_start = get_pc_function_start (fi->pc); |
1242 | ||
1243 | /* If we failed to find the start of the function, it is a mistake | |
1244 | to inspect the instructions. */ | |
1245 | ||
1246 | if (!func_start) | |
1247 | { | |
1248 | /* A frame with a zero PC is usually created by dereferencing a NULL | |
c5aa993b JM |
1249 | function pointer, normally causing an immediate core dump of the |
1250 | inferior. Mark function as frameless, as the inferior has no chance | |
1251 | of setting up a stack frame. */ | |
c906108c SS |
1252 | if (fi->pc == 0) |
1253 | return 1; | |
1254 | else | |
1255 | return 0; | |
1256 | } | |
1257 | ||
077276e8 | 1258 | (void) skip_prologue (func_start, fi->pc, &fdata); |
c906108c SS |
1259 | return fdata.frameless; |
1260 | } | |
1261 | ||
1262 | /* Return the PC saved in a frame */ | |
1263 | ||
9aa1e687 | 1264 | CORE_ADDR |
c877c8e6 | 1265 | rs6000_frame_saved_pc (struct frame_info *fi) |
c906108c SS |
1266 | { |
1267 | CORE_ADDR func_start; | |
1268 | struct rs6000_framedata fdata; | |
7a78ae4e | 1269 | int wordsize = TDEP->wordsize; |
c906108c SS |
1270 | |
1271 | if (fi->signal_handler_caller) | |
7a78ae4e | 1272 | return read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET, wordsize); |
c906108c | 1273 | |
7a78ae4e ND |
1274 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) |
1275 | return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM); | |
c906108c SS |
1276 | |
1277 | func_start = get_pc_function_start (fi->pc); | |
1278 | ||
1279 | /* If we failed to find the start of the function, it is a mistake | |
1280 | to inspect the instructions. */ | |
1281 | if (!func_start) | |
1282 | return 0; | |
1283 | ||
077276e8 | 1284 | (void) skip_prologue (func_start, fi->pc, &fdata); |
c906108c SS |
1285 | |
1286 | if (fdata.lr_offset == 0 && fi->next != NULL) | |
1287 | { | |
1288 | if (fi->next->signal_handler_caller) | |
7a78ae4e ND |
1289 | return read_memory_addr (fi->next->frame + SIG_FRAME_LR_OFFSET, |
1290 | wordsize); | |
c906108c | 1291 | else |
7a78ae4e ND |
1292 | return read_memory_addr (FRAME_CHAIN (fi) + DEFAULT_LR_SAVE, |
1293 | wordsize); | |
c906108c SS |
1294 | } |
1295 | ||
1296 | if (fdata.lr_offset == 0) | |
9aa1e687 | 1297 | return read_register (PPC_LR_REGNUM); |
c906108c | 1298 | |
7a78ae4e | 1299 | return read_memory_addr (FRAME_CHAIN (fi) + fdata.lr_offset, wordsize); |
c906108c SS |
1300 | } |
1301 | ||
1302 | /* If saved registers of frame FI are not known yet, read and cache them. | |
1303 | &FDATAP contains rs6000_framedata; TDATAP can be NULL, | |
1304 | in which case the framedata are read. */ | |
1305 | ||
1306 | static void | |
7a78ae4e | 1307 | frame_get_saved_regs (struct frame_info *fi, struct rs6000_framedata *fdatap) |
c906108c | 1308 | { |
c5aa993b | 1309 | CORE_ADDR frame_addr; |
c906108c | 1310 | struct rs6000_framedata work_fdata; |
7a78ae4e | 1311 | int wordsize = TDEP->wordsize; |
c906108c SS |
1312 | |
1313 | if (fi->saved_regs) | |
1314 | return; | |
c5aa993b | 1315 | |
c906108c SS |
1316 | if (fdatap == NULL) |
1317 | { | |
1318 | fdatap = &work_fdata; | |
077276e8 | 1319 | (void) skip_prologue (get_pc_function_start (fi->pc), fi->pc, fdatap); |
c906108c SS |
1320 | } |
1321 | ||
1322 | frame_saved_regs_zalloc (fi); | |
1323 | ||
1324 | /* If there were any saved registers, figure out parent's stack | |
1325 | pointer. */ | |
1326 | /* The following is true only if the frame doesn't have a call to | |
1327 | alloca(), FIXME. */ | |
1328 | ||
1329 | if (fdatap->saved_fpr == 0 && fdatap->saved_gpr == 0 | |
1330 | && fdatap->lr_offset == 0 && fdatap->cr_offset == 0) | |
1331 | frame_addr = 0; | |
1332 | else if (fi->prev && fi->prev->frame) | |
1333 | frame_addr = fi->prev->frame; | |
1334 | else | |
7a78ae4e | 1335 | frame_addr = read_memory_addr (fi->frame, wordsize); |
c5aa993b | 1336 | |
c906108c SS |
1337 | /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr. |
1338 | All fpr's from saved_fpr to fp31 are saved. */ | |
1339 | ||
1340 | if (fdatap->saved_fpr >= 0) | |
1341 | { | |
1342 | int i; | |
7a78ae4e | 1343 | CORE_ADDR fpr_addr = frame_addr + fdatap->fpr_offset; |
c906108c SS |
1344 | for (i = fdatap->saved_fpr; i < 32; i++) |
1345 | { | |
7a78ae4e ND |
1346 | fi->saved_regs[FP0_REGNUM + i] = fpr_addr; |
1347 | fpr_addr += 8; | |
c906108c SS |
1348 | } |
1349 | } | |
1350 | ||
1351 | /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr. | |
1352 | All gpr's from saved_gpr to gpr31 are saved. */ | |
1353 | ||
1354 | if (fdatap->saved_gpr >= 0) | |
1355 | { | |
1356 | int i; | |
7a78ae4e | 1357 | CORE_ADDR gpr_addr = frame_addr + fdatap->gpr_offset; |
c906108c SS |
1358 | for (i = fdatap->saved_gpr; i < 32; i++) |
1359 | { | |
7a78ae4e ND |
1360 | fi->saved_regs[i] = gpr_addr; |
1361 | gpr_addr += wordsize; | |
c906108c SS |
1362 | } |
1363 | } | |
1364 | ||
1365 | /* If != 0, fdatap->cr_offset is the offset from the frame that holds | |
1366 | the CR. */ | |
1367 | if (fdatap->cr_offset != 0) | |
9aa1e687 | 1368 | fi->saved_regs[PPC_CR_REGNUM] = frame_addr + fdatap->cr_offset; |
c906108c SS |
1369 | |
1370 | /* If != 0, fdatap->lr_offset is the offset from the frame that holds | |
1371 | the LR. */ | |
1372 | if (fdatap->lr_offset != 0) | |
9aa1e687 | 1373 | fi->saved_regs[PPC_LR_REGNUM] = frame_addr + fdatap->lr_offset; |
c906108c SS |
1374 | } |
1375 | ||
1376 | /* Return the address of a frame. This is the inital %sp value when the frame | |
1377 | was first allocated. For functions calling alloca(), it might be saved in | |
1378 | an alloca register. */ | |
1379 | ||
1380 | static CORE_ADDR | |
7a78ae4e | 1381 | frame_initial_stack_address (struct frame_info *fi) |
c906108c SS |
1382 | { |
1383 | CORE_ADDR tmpaddr; | |
1384 | struct rs6000_framedata fdata; | |
1385 | struct frame_info *callee_fi; | |
1386 | ||
1387 | /* if the initial stack pointer (frame address) of this frame is known, | |
1388 | just return it. */ | |
1389 | ||
1390 | if (fi->extra_info->initial_sp) | |
1391 | return fi->extra_info->initial_sp; | |
1392 | ||
1393 | /* find out if this function is using an alloca register.. */ | |
1394 | ||
077276e8 | 1395 | (void) skip_prologue (get_pc_function_start (fi->pc), fi->pc, &fdata); |
c906108c SS |
1396 | |
1397 | /* if saved registers of this frame are not known yet, read and cache them. */ | |
1398 | ||
1399 | if (!fi->saved_regs) | |
1400 | frame_get_saved_regs (fi, &fdata); | |
1401 | ||
1402 | /* If no alloca register used, then fi->frame is the value of the %sp for | |
1403 | this frame, and it is good enough. */ | |
1404 | ||
1405 | if (fdata.alloca_reg < 0) | |
1406 | { | |
1407 | fi->extra_info->initial_sp = fi->frame; | |
1408 | return fi->extra_info->initial_sp; | |
1409 | } | |
1410 | ||
1411 | /* This function has an alloca register. If this is the top-most frame | |
1412 | (with the lowest address), the value in alloca register is good. */ | |
1413 | ||
1414 | if (!fi->next) | |
c5aa993b | 1415 | return fi->extra_info->initial_sp = read_register (fdata.alloca_reg); |
c906108c SS |
1416 | |
1417 | /* Otherwise, this is a caller frame. Callee has usually already saved | |
1418 | registers, but there are exceptions (such as when the callee | |
1419 | has no parameters). Find the address in which caller's alloca | |
1420 | register is saved. */ | |
1421 | ||
c5aa993b JM |
1422 | for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) |
1423 | { | |
c906108c | 1424 | |
c5aa993b JM |
1425 | if (!callee_fi->saved_regs) |
1426 | frame_get_saved_regs (callee_fi, NULL); | |
c906108c | 1427 | |
c5aa993b | 1428 | /* this is the address in which alloca register is saved. */ |
c906108c | 1429 | |
c5aa993b JM |
1430 | tmpaddr = callee_fi->saved_regs[fdata.alloca_reg]; |
1431 | if (tmpaddr) | |
1432 | { | |
7a78ae4e ND |
1433 | fi->extra_info->initial_sp = |
1434 | read_memory_addr (tmpaddr, TDEP->wordsize); | |
c5aa993b JM |
1435 | return fi->extra_info->initial_sp; |
1436 | } | |
c906108c | 1437 | |
c5aa993b JM |
1438 | /* Go look into deeper levels of the frame chain to see if any one of |
1439 | the callees has saved alloca register. */ | |
1440 | } | |
c906108c SS |
1441 | |
1442 | /* If alloca register was not saved, by the callee (or any of its callees) | |
1443 | then the value in the register is still good. */ | |
1444 | ||
1445 | fi->extra_info->initial_sp = read_register (fdata.alloca_reg); | |
1446 | return fi->extra_info->initial_sp; | |
1447 | } | |
1448 | ||
7a78ae4e ND |
1449 | /* Describe the pointer in each stack frame to the previous stack frame |
1450 | (its caller). */ | |
1451 | ||
1452 | /* FRAME_CHAIN takes a frame's nominal address | |
1453 | and produces the frame's chain-pointer. */ | |
1454 | ||
1455 | /* In the case of the RS/6000, the frame's nominal address | |
1456 | is the address of a 4-byte word containing the calling frame's address. */ | |
1457 | ||
9aa1e687 | 1458 | CORE_ADDR |
7a78ae4e | 1459 | rs6000_frame_chain (struct frame_info *thisframe) |
c906108c | 1460 | { |
7a78ae4e ND |
1461 | CORE_ADDR fp, fpp, lr; |
1462 | int wordsize = TDEP->wordsize; | |
c906108c | 1463 | |
7a78ae4e ND |
1464 | if (PC_IN_CALL_DUMMY (thisframe->pc, thisframe->frame, thisframe->frame)) |
1465 | return thisframe->frame; /* dummy frame same as caller's frame */ | |
c906108c | 1466 | |
c5aa993b | 1467 | if (inside_entry_file (thisframe->pc) || |
c906108c SS |
1468 | thisframe->pc == entry_point_address ()) |
1469 | return 0; | |
1470 | ||
1471 | if (thisframe->signal_handler_caller) | |
7a78ae4e ND |
1472 | fp = read_memory_addr (thisframe->frame + SIG_FRAME_FP_OFFSET, |
1473 | wordsize); | |
c906108c SS |
1474 | else if (thisframe->next != NULL |
1475 | && thisframe->next->signal_handler_caller | |
c877c8e6 | 1476 | && FRAMELESS_FUNCTION_INVOCATION (thisframe)) |
c906108c SS |
1477 | /* A frameless function interrupted by a signal did not change the |
1478 | frame pointer. */ | |
1479 | fp = FRAME_FP (thisframe); | |
1480 | else | |
7a78ae4e | 1481 | fp = read_memory_addr ((thisframe)->frame, wordsize); |
c906108c | 1482 | |
9aa1e687 | 1483 | lr = read_register (PPC_LR_REGNUM); |
7a78ae4e ND |
1484 | if (lr == entry_point_address ()) |
1485 | if (fp != 0 && (fpp = read_memory_addr (fp, wordsize)) != 0) | |
1486 | if (PC_IN_CALL_DUMMY (lr, fpp, fpp)) | |
1487 | return fpp; | |
1488 | ||
1489 | return fp; | |
1490 | } | |
1491 | ||
1492 | /* Return the size of register REG when words are WORDSIZE bytes long. If REG | |
1493 | isn't available with that word size, return 0. */ | |
1494 | ||
1495 | static int | |
1496 | regsize (const struct reg *reg, int wordsize) | |
1497 | { | |
1498 | return wordsize == 8 ? reg->sz64 : reg->sz32; | |
1499 | } | |
1500 | ||
1501 | /* Return the name of register number N, or null if no such register exists | |
1502 | in the current architecture. */ | |
1503 | ||
1504 | static char * | |
1505 | rs6000_register_name (int n) | |
1506 | { | |
1507 | struct gdbarch_tdep *tdep = TDEP; | |
1508 | const struct reg *reg = tdep->regs + n; | |
1509 | ||
1510 | if (!regsize (reg, tdep->wordsize)) | |
1511 | return NULL; | |
1512 | return reg->name; | |
1513 | } | |
1514 | ||
1515 | /* Index within `registers' of the first byte of the space for | |
1516 | register N. */ | |
1517 | ||
1518 | static int | |
1519 | rs6000_register_byte (int n) | |
1520 | { | |
1521 | return TDEP->regoff[n]; | |
1522 | } | |
1523 | ||
1524 | /* Return the number of bytes of storage in the actual machine representation | |
1525 | for register N if that register is available, else return 0. */ | |
1526 | ||
1527 | static int | |
1528 | rs6000_register_raw_size (int n) | |
1529 | { | |
1530 | struct gdbarch_tdep *tdep = TDEP; | |
1531 | const struct reg *reg = tdep->regs + n; | |
1532 | return regsize (reg, tdep->wordsize); | |
1533 | } | |
1534 | ||
1535 | /* Number of bytes of storage in the program's representation | |
1536 | for register N. */ | |
1537 | ||
1538 | static int | |
1539 | rs6000_register_virtual_size (int n) | |
1540 | { | |
1541 | return TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (n)); | |
1542 | } | |
1543 | ||
1544 | /* Return the GDB type object for the "standard" data type | |
1545 | of data in register N. */ | |
1546 | ||
1547 | static struct type * | |
fba45db2 | 1548 | rs6000_register_virtual_type (int n) |
7a78ae4e ND |
1549 | { |
1550 | struct gdbarch_tdep *tdep = TDEP; | |
1551 | const struct reg *reg = tdep->regs + n; | |
1552 | ||
1553 | return reg->fpr ? builtin_type_double : | |
1554 | regsize (reg, tdep->wordsize) == 8 ? builtin_type_int64 : | |
1555 | builtin_type_int32; | |
1556 | } | |
1557 | ||
1558 | /* For the PowerPC, it appears that the debug info marks float parameters as | |
1559 | floats regardless of whether the function is prototyped, but the actual | |
1560 | values are always passed in as doubles. Tell gdb to always assume that | |
1561 | floats are passed as doubles and then converted in the callee. */ | |
1562 | ||
1563 | static int | |
1564 | rs6000_coerce_float_to_double (struct type *formal, struct type *actual) | |
1565 | { | |
1566 | return 1; | |
1567 | } | |
1568 | ||
1569 | /* Return whether register N requires conversion when moving from raw format | |
1570 | to virtual format. | |
1571 | ||
1572 | The register format for RS/6000 floating point registers is always | |
1573 | double, we need a conversion if the memory format is float. */ | |
1574 | ||
1575 | static int | |
1576 | rs6000_register_convertible (int n) | |
1577 | { | |
1578 | const struct reg *reg = TDEP->regs + n; | |
1579 | return reg->fpr; | |
1580 | } | |
1581 | ||
1582 | /* Convert data from raw format for register N in buffer FROM | |
1583 | to virtual format with type TYPE in buffer TO. */ | |
1584 | ||
1585 | static void | |
1586 | rs6000_register_convert_to_virtual (int n, struct type *type, | |
1587 | char *from, char *to) | |
1588 | { | |
1589 | if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n)) | |
7a292a7a | 1590 | { |
7a78ae4e ND |
1591 | double val = extract_floating (from, REGISTER_RAW_SIZE (n)); |
1592 | store_floating (to, TYPE_LENGTH (type), val); | |
1593 | } | |
1594 | else | |
1595 | memcpy (to, from, REGISTER_RAW_SIZE (n)); | |
1596 | } | |
1597 | ||
1598 | /* Convert data from virtual format with type TYPE in buffer FROM | |
1599 | to raw format for register N in buffer TO. */ | |
7a292a7a | 1600 | |
7a78ae4e ND |
1601 | static void |
1602 | rs6000_register_convert_to_raw (struct type *type, int n, | |
1603 | char *from, char *to) | |
1604 | { | |
1605 | if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n)) | |
1606 | { | |
1607 | double val = extract_floating (from, TYPE_LENGTH (type)); | |
1608 | store_floating (to, REGISTER_RAW_SIZE (n), val); | |
7a292a7a | 1609 | } |
7a78ae4e ND |
1610 | else |
1611 | memcpy (to, from, REGISTER_RAW_SIZE (n)); | |
1612 | } | |
c906108c | 1613 | |
7a78ae4e ND |
1614 | /* Store the address of the place in which to copy the structure the |
1615 | subroutine will return. This is called from call_function. | |
1616 | ||
1617 | In RS/6000, struct return addresses are passed as an extra parameter in r3. | |
1618 | In function return, callee is not responsible of returning this address | |
1619 | back. Since gdb needs to find it, we will store in a designated variable | |
1620 | `rs6000_struct_return_address'. */ | |
1621 | ||
1622 | static void | |
1623 | rs6000_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
1624 | { | |
1625 | write_register (3, addr); | |
1626 | rs6000_struct_return_address = addr; | |
1627 | } | |
1628 | ||
1629 | /* Write into appropriate registers a function return value | |
1630 | of type TYPE, given in virtual format. */ | |
1631 | ||
1632 | static void | |
1633 | rs6000_store_return_value (struct type *type, char *valbuf) | |
1634 | { | |
1635 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
1636 | ||
1637 | /* Floating point values are returned starting from FPR1 and up. | |
1638 | Say a double_double_double type could be returned in | |
1639 | FPR1/FPR2/FPR3 triple. */ | |
1640 | ||
1641 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM + 1), valbuf, | |
1642 | TYPE_LENGTH (type)); | |
1643 | else | |
1644 | /* Everything else is returned in GPR3 and up. */ | |
9aa1e687 | 1645 | write_register_bytes (REGISTER_BYTE (PPC_GP0_REGNUM + 3), valbuf, |
7a78ae4e ND |
1646 | TYPE_LENGTH (type)); |
1647 | } | |
1648 | ||
1649 | /* Extract from an array REGBUF containing the (raw) register state | |
1650 | the address in which a function should return its structure value, | |
1651 | as a CORE_ADDR (or an expression that can be used as one). */ | |
1652 | ||
1653 | static CORE_ADDR | |
1654 | rs6000_extract_struct_value_address (char *regbuf) | |
1655 | { | |
1656 | return rs6000_struct_return_address; | |
1657 | } | |
1658 | ||
1659 | /* Return whether PC is in a dummy function call. | |
1660 | ||
1661 | FIXME: This just checks for the end of the stack, which is broken | |
1662 | for things like stepping through gcc nested function stubs. */ | |
1663 | ||
1664 | static int | |
1665 | rs6000_pc_in_call_dummy (CORE_ADDR pc, CORE_ADDR sp, CORE_ADDR fp) | |
1666 | { | |
1667 | return sp < pc && pc < fp; | |
1668 | } | |
1669 | ||
1670 | /* Hook called when a new child process is started. */ | |
1671 | ||
1672 | void | |
1673 | rs6000_create_inferior (int pid) | |
1674 | { | |
1675 | if (rs6000_set_host_arch_hook) | |
1676 | rs6000_set_host_arch_hook (pid); | |
c906108c SS |
1677 | } |
1678 | \f | |
7a78ae4e ND |
1679 | /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR). |
1680 | ||
1681 | Usually a function pointer's representation is simply the address | |
1682 | of the function. On the RS/6000 however, a function pointer is | |
1683 | represented by a pointer to a TOC entry. This TOC entry contains | |
1684 | three words, the first word is the address of the function, the | |
1685 | second word is the TOC pointer (r2), and the third word is the | |
1686 | static chain value. Throughout GDB it is currently assumed that a | |
1687 | function pointer contains the address of the function, which is not | |
1688 | easy to fix. In addition, the conversion of a function address to | |
1689 | a function pointer would require allocation of a TOC entry in the | |
1690 | inferior's memory space, with all its drawbacks. To be able to | |
1691 | call C++ virtual methods in the inferior (which are called via | |
f517ea4e | 1692 | function pointers), find_function_addr uses this function to get the |
7a78ae4e ND |
1693 | function address from a function pointer. */ |
1694 | ||
f517ea4e PS |
1695 | /* Return real function address if ADDR (a function pointer) is in the data |
1696 | space and is therefore a special function pointer. */ | |
c906108c | 1697 | |
7a78ae4e ND |
1698 | CORE_ADDR |
1699 | rs6000_convert_from_func_ptr_addr (CORE_ADDR addr) | |
c906108c SS |
1700 | { |
1701 | struct obj_section *s; | |
1702 | ||
1703 | s = find_pc_section (addr); | |
1704 | if (s && s->the_bfd_section->flags & SEC_CODE) | |
7a78ae4e | 1705 | return addr; |
c906108c | 1706 | |
7a78ae4e ND |
1707 | /* ADDR is in the data space, so it's a special function pointer. */ |
1708 | return read_memory_addr (addr, TDEP->wordsize); | |
c906108c | 1709 | } |
c906108c | 1710 | \f |
c5aa993b | 1711 | |
7a78ae4e | 1712 | /* Handling the various POWER/PowerPC variants. */ |
c906108c SS |
1713 | |
1714 | ||
7a78ae4e ND |
1715 | /* The arrays here called registers_MUMBLE hold information about available |
1716 | registers. | |
c906108c SS |
1717 | |
1718 | For each family of PPC variants, I've tried to isolate out the | |
1719 | common registers and put them up front, so that as long as you get | |
1720 | the general family right, GDB will correctly identify the registers | |
1721 | common to that family. The common register sets are: | |
1722 | ||
1723 | For the 60x family: hid0 hid1 iabr dabr pir | |
1724 | ||
1725 | For the 505 and 860 family: eie eid nri | |
1726 | ||
1727 | For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi | |
c5aa993b JM |
1728 | tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1 |
1729 | pbu1 pbl2 pbu2 | |
c906108c SS |
1730 | |
1731 | Most of these register groups aren't anything formal. I arrived at | |
1732 | them by looking at the registers that occurred in more than one | |
7a78ae4e ND |
1733 | processor. */ |
1734 | ||
1735 | /* Convenience macros for populating register arrays. */ | |
1736 | ||
1737 | /* Within another macro, convert S to a string. */ | |
1738 | ||
1739 | #define STR(s) #s | |
1740 | ||
1741 | /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems | |
1742 | and 64 bits on 64-bit systems. */ | |
1743 | #define R(name) { STR(name), 4, 8, 0 } | |
1744 | ||
1745 | /* Return a struct reg defining register NAME that's 32 bits on all | |
1746 | systems. */ | |
1747 | #define R4(name) { STR(name), 4, 4, 0 } | |
1748 | ||
1749 | /* Return a struct reg defining register NAME that's 64 bits on all | |
1750 | systems. */ | |
1751 | #define R8(name) { STR(name), 8, 8, 0 } | |
1752 | ||
1753 | /* Return a struct reg defining floating-point register NAME. */ | |
1754 | #define F(name) { STR(name), 8, 8, 1 } | |
1755 | ||
1756 | /* Return a struct reg defining register NAME that's 32 bits on 32-bit | |
1757 | systems and that doesn't exist on 64-bit systems. */ | |
1758 | #define R32(name) { STR(name), 4, 0, 0 } | |
1759 | ||
1760 | /* Return a struct reg defining register NAME that's 64 bits on 64-bit | |
1761 | systems and that doesn't exist on 32-bit systems. */ | |
1762 | #define R64(name) { STR(name), 0, 8, 0 } | |
1763 | ||
1764 | /* Return a struct reg placeholder for a register that doesn't exist. */ | |
1765 | #define R0 { 0, 0, 0, 0 } | |
1766 | ||
1767 | /* UISA registers common across all architectures, including POWER. */ | |
1768 | ||
1769 | #define COMMON_UISA_REGS \ | |
1770 | /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \ | |
1771 | /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \ | |
1772 | /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \ | |
1773 | /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \ | |
1774 | /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \ | |
1775 | /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \ | |
1776 | /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \ | |
1777 | /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \ | |
1778 | /* 64 */ R(pc), R(ps) | |
1779 | ||
1780 | /* UISA-level SPRs for PowerPC. */ | |
1781 | #define PPC_UISA_SPRS \ | |
1782 | /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0 | |
1783 | ||
1784 | /* Segment registers, for PowerPC. */ | |
1785 | #define PPC_SEGMENT_REGS \ | |
1786 | /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \ | |
1787 | /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \ | |
1788 | /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \ | |
1789 | /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15) | |
1790 | ||
1791 | /* OEA SPRs for PowerPC. */ | |
1792 | #define PPC_OEA_SPRS \ | |
1793 | /* 87 */ R4(pvr), \ | |
1794 | /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \ | |
1795 | /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \ | |
1796 | /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \ | |
1797 | /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \ | |
1798 | /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \ | |
1799 | /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \ | |
1800 | /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \ | |
1801 | /* 116 */ R4(dec), R(dabr), R4(ear) | |
1802 | ||
1803 | /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover | |
1804 | user-level SPR's. */ | |
1805 | static const struct reg registers_power[] = | |
c906108c | 1806 | { |
7a78ae4e ND |
1807 | COMMON_UISA_REGS, |
1808 | /* 66 */ R4(cnd), R(lr), R(cnt), R4(xer), R4(mq) | |
c906108c SS |
1809 | }; |
1810 | ||
7a78ae4e ND |
1811 | /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only |
1812 | view of the PowerPC. */ | |
1813 | static const struct reg registers_powerpc[] = | |
c906108c | 1814 | { |
7a78ae4e ND |
1815 | COMMON_UISA_REGS, |
1816 | PPC_UISA_SPRS | |
c906108c SS |
1817 | }; |
1818 | ||
7a78ae4e ND |
1819 | /* IBM PowerPC 403. */ |
1820 | static const struct reg registers_403[] = | |
c5aa993b | 1821 | { |
7a78ae4e ND |
1822 | COMMON_UISA_REGS, |
1823 | PPC_UISA_SPRS, | |
1824 | PPC_SEGMENT_REGS, | |
1825 | PPC_OEA_SPRS, | |
1826 | /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr), | |
1827 | /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit), | |
1828 | /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3), | |
1829 | /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2), | |
1830 | /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr), | |
1831 | /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2) | |
c906108c SS |
1832 | }; |
1833 | ||
7a78ae4e ND |
1834 | /* IBM PowerPC 403GC. */ |
1835 | static const struct reg registers_403GC[] = | |
c5aa993b | 1836 | { |
7a78ae4e ND |
1837 | COMMON_UISA_REGS, |
1838 | PPC_UISA_SPRS, | |
1839 | PPC_SEGMENT_REGS, | |
1840 | PPC_OEA_SPRS, | |
1841 | /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr), | |
1842 | /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit), | |
1843 | /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3), | |
1844 | /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2), | |
1845 | /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr), | |
1846 | /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2), | |
1847 | /* 143 */ R(zpr), R(pid), R(sgr), R(dcwr), | |
1848 | /* 147 */ R(tbhu), R(tblu) | |
c906108c SS |
1849 | }; |
1850 | ||
7a78ae4e ND |
1851 | /* Motorola PowerPC 505. */ |
1852 | static const struct reg registers_505[] = | |
c5aa993b | 1853 | { |
7a78ae4e ND |
1854 | COMMON_UISA_REGS, |
1855 | PPC_UISA_SPRS, | |
1856 | PPC_SEGMENT_REGS, | |
1857 | PPC_OEA_SPRS, | |
1858 | /* 119 */ R(eie), R(eid), R(nri) | |
c906108c SS |
1859 | }; |
1860 | ||
7a78ae4e ND |
1861 | /* Motorola PowerPC 860 or 850. */ |
1862 | static const struct reg registers_860[] = | |
c5aa993b | 1863 | { |
7a78ae4e ND |
1864 | COMMON_UISA_REGS, |
1865 | PPC_UISA_SPRS, | |
1866 | PPC_SEGMENT_REGS, | |
1867 | PPC_OEA_SPRS, | |
1868 | /* 119 */ R(eie), R(eid), R(nri), R(cmpa), | |
1869 | /* 123 */ R(cmpb), R(cmpc), R(cmpd), R(icr), | |
1870 | /* 127 */ R(der), R(counta), R(countb), R(cmpe), | |
1871 | /* 131 */ R(cmpf), R(cmpg), R(cmph), R(lctrl1), | |
1872 | /* 135 */ R(lctrl2), R(ictrl), R(bar), R(ic_cst), | |
1873 | /* 139 */ R(ic_adr), R(ic_dat), R(dc_cst), R(dc_adr), | |
1874 | /* 143 */ R(dc_dat), R(dpdr), R(dpir), R(immr), | |
1875 | /* 147 */ R(mi_ctr), R(mi_ap), R(mi_epn), R(mi_twc), | |
1876 | /* 151 */ R(mi_rpn), R(md_ctr), R(m_casid), R(md_ap), | |
1877 | /* 155 */ R(md_epn), R(md_twb), R(md_twc), R(md_rpn), | |
1878 | /* 159 */ R(m_tw), R(mi_dbcam), R(mi_dbram0), R(mi_dbram1), | |
1879 | /* 163 */ R(md_dbcam), R(md_dbram0), R(md_dbram1) | |
c906108c SS |
1880 | }; |
1881 | ||
7a78ae4e ND |
1882 | /* Motorola PowerPC 601. Note that the 601 has different register numbers |
1883 | for reading and writing RTCU and RTCL. However, how one reads and writes a | |
c906108c | 1884 | register is the stub's problem. */ |
7a78ae4e | 1885 | static const struct reg registers_601[] = |
c5aa993b | 1886 | { |
7a78ae4e ND |
1887 | COMMON_UISA_REGS, |
1888 | PPC_UISA_SPRS, | |
1889 | PPC_SEGMENT_REGS, | |
1890 | PPC_OEA_SPRS, | |
1891 | /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr), | |
1892 | /* 123 */ R(pir), R(mq), R(rtcu), R(rtcl) | |
c906108c SS |
1893 | }; |
1894 | ||
7a78ae4e ND |
1895 | /* Motorola PowerPC 602. */ |
1896 | static const struct reg registers_602[] = | |
c5aa993b | 1897 | { |
7a78ae4e ND |
1898 | COMMON_UISA_REGS, |
1899 | PPC_UISA_SPRS, | |
1900 | PPC_SEGMENT_REGS, | |
1901 | PPC_OEA_SPRS, | |
1902 | /* 119 */ R(hid0), R(hid1), R(iabr), R0, | |
1903 | /* 123 */ R0, R(tcr), R(ibr), R(esassr), | |
1904 | /* 127 */ R(sebr), R(ser), R(sp), R(lt) | |
c906108c SS |
1905 | }; |
1906 | ||
7a78ae4e ND |
1907 | /* Motorola/IBM PowerPC 603 or 603e. */ |
1908 | static const struct reg registers_603[] = | |
c5aa993b | 1909 | { |
7a78ae4e ND |
1910 | COMMON_UISA_REGS, |
1911 | PPC_UISA_SPRS, | |
1912 | PPC_SEGMENT_REGS, | |
1913 | PPC_OEA_SPRS, | |
1914 | /* 119 */ R(hid0), R(hid1), R(iabr), R0, | |
1915 | /* 123 */ R0, R(dmiss), R(dcmp), R(hash1), | |
1916 | /* 127 */ R(hash2), R(imiss), R(icmp), R(rpa) | |
c906108c SS |
1917 | }; |
1918 | ||
7a78ae4e ND |
1919 | /* Motorola PowerPC 604 or 604e. */ |
1920 | static const struct reg registers_604[] = | |
c5aa993b | 1921 | { |
7a78ae4e ND |
1922 | COMMON_UISA_REGS, |
1923 | PPC_UISA_SPRS, | |
1924 | PPC_SEGMENT_REGS, | |
1925 | PPC_OEA_SPRS, | |
1926 | /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr), | |
1927 | /* 123 */ R(pir), R(mmcr0), R(pmc1), R(pmc2), | |
1928 | /* 127 */ R(sia), R(sda) | |
c906108c SS |
1929 | }; |
1930 | ||
7a78ae4e ND |
1931 | /* Motorola/IBM PowerPC 750 or 740. */ |
1932 | static const struct reg registers_750[] = | |
c5aa993b | 1933 | { |
7a78ae4e ND |
1934 | COMMON_UISA_REGS, |
1935 | PPC_UISA_SPRS, | |
1936 | PPC_SEGMENT_REGS, | |
1937 | PPC_OEA_SPRS, | |
1938 | /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr), | |
1939 | /* 123 */ R0, R(ummcr0), R(upmc1), R(upmc2), | |
1940 | /* 127 */ R(usia), R(ummcr1), R(upmc3), R(upmc4), | |
1941 | /* 131 */ R(mmcr0), R(pmc1), R(pmc2), R(sia), | |
1942 | /* 135 */ R(mmcr1), R(pmc3), R(pmc4), R(l2cr), | |
1943 | /* 139 */ R(ictc), R(thrm1), R(thrm2), R(thrm3) | |
c906108c SS |
1944 | }; |
1945 | ||
1946 | ||
1947 | /* Information about a particular processor variant. */ | |
7a78ae4e | 1948 | |
c906108c | 1949 | struct variant |
c5aa993b JM |
1950 | { |
1951 | /* Name of this variant. */ | |
1952 | char *name; | |
c906108c | 1953 | |
c5aa993b JM |
1954 | /* English description of the variant. */ |
1955 | char *description; | |
c906108c | 1956 | |
7a78ae4e ND |
1957 | /* bfd_arch_info.arch corresponding to variant. */ |
1958 | enum bfd_architecture arch; | |
1959 | ||
1960 | /* bfd_arch_info.mach corresponding to variant. */ | |
1961 | unsigned long mach; | |
1962 | ||
c5aa993b JM |
1963 | /* Table of register names; registers[R] is the name of the register |
1964 | number R. */ | |
7a78ae4e ND |
1965 | int nregs; |
1966 | const struct reg *regs; | |
c5aa993b | 1967 | }; |
c906108c SS |
1968 | |
1969 | #define num_registers(list) (sizeof (list) / sizeof((list)[0])) | |
1970 | ||
1971 | ||
1972 | /* Information in this table comes from the following web sites: | |
1973 | IBM: http://www.chips.ibm.com:80/products/embedded/ | |
1974 | Motorola: http://www.mot.com/SPS/PowerPC/ | |
1975 | ||
1976 | I'm sure I've got some of the variant descriptions not quite right. | |
1977 | Please report any inaccuracies you find to GDB's maintainer. | |
1978 | ||
1979 | If you add entries to this table, please be sure to allow the new | |
1980 | value as an argument to the --with-cpu flag, in configure.in. */ | |
1981 | ||
7a78ae4e | 1982 | static const struct variant variants[] = |
c906108c | 1983 | { |
7a78ae4e ND |
1984 | {"powerpc", "PowerPC user-level", bfd_arch_powerpc, |
1985 | bfd_mach_ppc, num_registers (registers_powerpc), registers_powerpc}, | |
1986 | {"power", "POWER user-level", bfd_arch_rs6000, | |
1987 | bfd_mach_rs6k, num_registers (registers_power), registers_power}, | |
1988 | {"403", "IBM PowerPC 403", bfd_arch_powerpc, | |
1989 | bfd_mach_ppc_403, num_registers (registers_403), registers_403}, | |
1990 | {"601", "Motorola PowerPC 601", bfd_arch_powerpc, | |
1991 | bfd_mach_ppc_601, num_registers (registers_601), registers_601}, | |
1992 | {"602", "Motorola PowerPC 602", bfd_arch_powerpc, | |
1993 | bfd_mach_ppc_602, num_registers (registers_602), registers_602}, | |
1994 | {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc, | |
1995 | bfd_mach_ppc_603, num_registers (registers_603), registers_603}, | |
1996 | {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc, | |
1997 | 604, num_registers (registers_604), registers_604}, | |
1998 | {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc, | |
1999 | bfd_mach_ppc_403gc, num_registers (registers_403GC), registers_403GC}, | |
2000 | {"505", "Motorola PowerPC 505", bfd_arch_powerpc, | |
2001 | bfd_mach_ppc_505, num_registers (registers_505), registers_505}, | |
2002 | {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc, | |
2003 | bfd_mach_ppc_860, num_registers (registers_860), registers_860}, | |
2004 | {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc, | |
2005 | bfd_mach_ppc_750, num_registers (registers_750), registers_750}, | |
2006 | ||
2007 | /* FIXME: I haven't checked the register sets of the following. */ | |
2008 | {"620", "Motorola PowerPC 620", bfd_arch_powerpc, | |
2009 | bfd_mach_ppc_620, num_registers (registers_powerpc), registers_powerpc}, | |
2010 | {"a35", "PowerPC A35", bfd_arch_powerpc, | |
2011 | bfd_mach_ppc_a35, num_registers (registers_powerpc), registers_powerpc}, | |
2012 | {"rs1", "IBM POWER RS1", bfd_arch_rs6000, | |
2013 | bfd_mach_rs6k_rs1, num_registers (registers_power), registers_power}, | |
2014 | {"rsc", "IBM POWER RSC", bfd_arch_rs6000, | |
2015 | bfd_mach_rs6k_rsc, num_registers (registers_power), registers_power}, | |
2016 | {"rs2", "IBM POWER RS2", bfd_arch_rs6000, | |
2017 | bfd_mach_rs6k_rs2, num_registers (registers_power), registers_power}, | |
2018 | ||
c5aa993b | 2019 | {0, 0, 0, 0} |
c906108c SS |
2020 | }; |
2021 | ||
7a78ae4e | 2022 | #undef num_registers |
c906108c | 2023 | |
7a78ae4e ND |
2024 | /* Look up the variant named NAME in the `variants' table. Return a |
2025 | pointer to the struct variant, or null if we couldn't find it. */ | |
c906108c | 2026 | |
7a78ae4e ND |
2027 | static const struct variant * |
2028 | find_variant_by_name (char *name) | |
c906108c | 2029 | { |
7a78ae4e | 2030 | const struct variant *v; |
c906108c | 2031 | |
7a78ae4e ND |
2032 | for (v = variants; v->name; v++) |
2033 | if (!strcmp (name, v->name)) | |
2034 | return v; | |
c906108c | 2035 | |
7a78ae4e | 2036 | return NULL; |
c906108c SS |
2037 | } |
2038 | ||
7a78ae4e ND |
2039 | /* Return the variant corresponding to architecture ARCH and machine number |
2040 | MACH. If no such variant exists, return null. */ | |
c906108c | 2041 | |
7a78ae4e ND |
2042 | static const struct variant * |
2043 | find_variant_by_arch (enum bfd_architecture arch, unsigned long mach) | |
c906108c | 2044 | { |
7a78ae4e | 2045 | const struct variant *v; |
c5aa993b | 2046 | |
7a78ae4e ND |
2047 | for (v = variants; v->name; v++) |
2048 | if (arch == v->arch && mach == v->mach) | |
2049 | return v; | |
c906108c | 2050 | |
7a78ae4e | 2051 | return NULL; |
c906108c SS |
2052 | } |
2053 | ||
9aa1e687 KB |
2054 | |
2055 | ||
2056 | \f | |
2057 | static void | |
2058 | process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj) | |
2059 | { | |
2060 | int *os_ident_ptr = obj; | |
2061 | const char *name; | |
2062 | unsigned int sectsize; | |
2063 | ||
2064 | name = bfd_get_section_name (abfd, sect); | |
2065 | sectsize = bfd_section_size (abfd, sect); | |
2066 | if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0) | |
2067 | { | |
2068 | unsigned int name_length, data_length, note_type; | |
2069 | char *note = alloca (sectsize); | |
2070 | ||
2071 | bfd_get_section_contents (abfd, sect, note, | |
2072 | (file_ptr) 0, (bfd_size_type) sectsize); | |
2073 | ||
2074 | name_length = bfd_h_get_32 (abfd, note); | |
2075 | data_length = bfd_h_get_32 (abfd, note + 4); | |
2076 | note_type = bfd_h_get_32 (abfd, note + 8); | |
2077 | ||
2078 | if (name_length == 4 && data_length == 16 && note_type == 1 | |
2079 | && strcmp (note + 12, "GNU") == 0) | |
2080 | { | |
2081 | int os_number = bfd_h_get_32 (abfd, note + 16); | |
2082 | ||
2083 | /* The case numbers are from abi-tags in glibc */ | |
2084 | switch (os_number) | |
2085 | { | |
2086 | case 0 : | |
2087 | *os_ident_ptr = ELFOSABI_LINUX; | |
2088 | break; | |
2089 | case 1 : | |
2090 | *os_ident_ptr = ELFOSABI_HURD; | |
2091 | break; | |
2092 | case 2 : | |
2093 | *os_ident_ptr = ELFOSABI_SOLARIS; | |
2094 | break; | |
2095 | default : | |
8e65ff28 AC |
2096 | internal_error (__FILE__, __LINE__, |
2097 | "process_note_abi_sections: unknown OS number %d", | |
2098 | os_number); | |
9aa1e687 KB |
2099 | break; |
2100 | } | |
2101 | } | |
2102 | } | |
2103 | } | |
2104 | ||
2105 | /* Return one of the ELFOSABI_ constants for BFDs representing ELF | |
2106 | executables. If it's not an ELF executable or if the OS/ABI couldn't | |
2107 | be determined, simply return -1. */ | |
2108 | ||
2109 | static int | |
2110 | get_elfosabi (bfd *abfd) | |
2111 | { | |
2112 | int elfosabi = -1; | |
2113 | ||
2114 | if (abfd != NULL && bfd_get_flavour (abfd) == bfd_target_elf_flavour) | |
2115 | { | |
2116 | elfosabi = elf_elfheader (abfd)->e_ident[EI_OSABI]; | |
2117 | ||
2118 | /* When elfosabi is 0 (ELFOSABI_NONE), this is supposed to indicate | |
2119 | that we're on a SYSV system. However, GNU/Linux uses a note section | |
2120 | to record OS/ABI info, but leaves e_ident[EI_OSABI] zero. So we | |
2121 | have to check the note sections too. */ | |
2122 | if (elfosabi == 0) | |
2123 | { | |
2124 | bfd_map_over_sections (abfd, | |
2125 | process_note_abi_tag_sections, | |
2126 | &elfosabi); | |
2127 | } | |
2128 | } | |
2129 | ||
2130 | return elfosabi; | |
2131 | } | |
2132 | ||
7a78ae4e | 2133 | \f |
c906108c | 2134 | |
7a78ae4e ND |
2135 | /* Initialize the current architecture based on INFO. If possible, re-use an |
2136 | architecture from ARCHES, which is a list of architectures already created | |
2137 | during this debugging session. | |
c906108c | 2138 | |
7a78ae4e ND |
2139 | Called e.g. at program startup, when reading a core file, and when reading |
2140 | a binary file. */ | |
c906108c | 2141 | |
7a78ae4e ND |
2142 | static struct gdbarch * |
2143 | rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
2144 | { | |
2145 | struct gdbarch *gdbarch; | |
2146 | struct gdbarch_tdep *tdep; | |
9aa1e687 | 2147 | int wordsize, from_xcoff_exec, from_elf_exec, power, i, off; |
7a78ae4e ND |
2148 | struct reg *regs; |
2149 | const struct variant *v; | |
2150 | enum bfd_architecture arch; | |
2151 | unsigned long mach; | |
2152 | bfd abfd; | |
9aa1e687 | 2153 | int osabi, sysv_abi; |
7a78ae4e | 2154 | |
9aa1e687 | 2155 | from_xcoff_exec = info.abfd && info.abfd->format == bfd_object && |
7a78ae4e ND |
2156 | bfd_get_flavour (info.abfd) == bfd_target_xcoff_flavour; |
2157 | ||
9aa1e687 KB |
2158 | from_elf_exec = info.abfd && info.abfd->format == bfd_object && |
2159 | bfd_get_flavour (info.abfd) == bfd_target_elf_flavour; | |
2160 | ||
2161 | sysv_abi = info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour; | |
2162 | ||
2163 | osabi = get_elfosabi (info.abfd); | |
2164 | ||
7a78ae4e ND |
2165 | /* Check word size. If INFO is from a binary file, infer it from that, |
2166 | else use the previously-inferred size. */ | |
9aa1e687 | 2167 | if (from_xcoff_exec) |
c906108c | 2168 | { |
7a78ae4e ND |
2169 | if (xcoff_data (info.abfd)->xcoff64) |
2170 | wordsize = 8; | |
2171 | else | |
2172 | wordsize = 4; | |
c906108c | 2173 | } |
9aa1e687 KB |
2174 | else if (from_elf_exec) |
2175 | { | |
2176 | if (elf_elfheader (info.abfd)->e_ident[EI_CLASS] == ELFCLASS64) | |
2177 | wordsize = 8; | |
2178 | else | |
2179 | wordsize = 4; | |
2180 | } | |
c906108c | 2181 | else |
7a78ae4e ND |
2182 | { |
2183 | tdep = TDEP; | |
2184 | if (tdep) | |
2185 | wordsize = tdep->wordsize; | |
2186 | else | |
2187 | wordsize = 4; | |
2188 | } | |
c906108c | 2189 | |
7a78ae4e ND |
2190 | /* Find a candidate among extant architectures. */ |
2191 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
2192 | arches != NULL; | |
2193 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
2194 | { | |
2195 | /* Word size in the various PowerPC bfd_arch_info structs isn't | |
2196 | meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform | |
2197 | separate word size check. */ | |
2198 | tdep = gdbarch_tdep (arches->gdbarch); | |
9aa1e687 | 2199 | if (tdep && tdep->wordsize == wordsize && tdep->osabi == osabi) |
7a78ae4e ND |
2200 | return arches->gdbarch; |
2201 | } | |
c906108c | 2202 | |
7a78ae4e ND |
2203 | /* None found, create a new architecture from INFO, whose bfd_arch_info |
2204 | validity depends on the source: | |
2205 | - executable useless | |
2206 | - rs6000_host_arch() good | |
2207 | - core file good | |
2208 | - "set arch" trust blindly | |
2209 | - GDB startup useless but harmless */ | |
c906108c | 2210 | |
9aa1e687 | 2211 | if (!from_xcoff_exec) |
c906108c | 2212 | { |
b732d07d | 2213 | arch = info.bfd_arch_info->arch; |
7a78ae4e | 2214 | mach = info.bfd_arch_info->mach; |
c906108c | 2215 | } |
7a78ae4e | 2216 | else |
c906108c | 2217 | { |
7a78ae4e ND |
2218 | arch = bfd_arch_powerpc; |
2219 | mach = 0; | |
2220 | bfd_default_set_arch_mach (&abfd, arch, mach); | |
2221 | info.bfd_arch_info = bfd_get_arch_info (&abfd); | |
2222 | } | |
2223 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); | |
2224 | tdep->wordsize = wordsize; | |
9aa1e687 | 2225 | tdep->osabi = osabi; |
7a78ae4e ND |
2226 | gdbarch = gdbarch_alloc (&info, tdep); |
2227 | power = arch == bfd_arch_rs6000; | |
2228 | ||
2229 | /* Select instruction printer. */ | |
2230 | tm_print_insn = arch == power ? print_insn_rs6000 : | |
2231 | info.byte_order == BIG_ENDIAN ? print_insn_big_powerpc : | |
2232 | print_insn_little_powerpc; | |
2233 | ||
2234 | /* Choose variant. */ | |
2235 | v = find_variant_by_arch (arch, mach); | |
2236 | if (!v) | |
2237 | v = find_variant_by_name (power ? "power" : "powerpc"); | |
2238 | tdep->regs = v->regs; | |
2239 | ||
2240 | /* Calculate byte offsets in raw register array. */ | |
2241 | tdep->regoff = xmalloc (v->nregs * sizeof (int)); | |
2242 | for (i = off = 0; i < v->nregs; i++) | |
2243 | { | |
2244 | tdep->regoff[i] = off; | |
2245 | off += regsize (v->regs + i, wordsize); | |
c906108c SS |
2246 | } |
2247 | ||
7a78ae4e ND |
2248 | set_gdbarch_read_pc (gdbarch, generic_target_read_pc); |
2249 | set_gdbarch_write_pc (gdbarch, generic_target_write_pc); | |
2250 | set_gdbarch_read_fp (gdbarch, generic_target_read_fp); | |
2251 | set_gdbarch_write_fp (gdbarch, generic_target_write_fp); | |
2252 | set_gdbarch_read_sp (gdbarch, generic_target_read_sp); | |
2253 | set_gdbarch_write_sp (gdbarch, generic_target_write_sp); | |
2254 | ||
2255 | set_gdbarch_num_regs (gdbarch, v->nregs); | |
2256 | set_gdbarch_sp_regnum (gdbarch, 1); | |
2257 | set_gdbarch_fp_regnum (gdbarch, 1); | |
2258 | set_gdbarch_pc_regnum (gdbarch, 64); | |
2259 | set_gdbarch_register_name (gdbarch, rs6000_register_name); | |
2260 | set_gdbarch_register_size (gdbarch, wordsize); | |
2261 | set_gdbarch_register_bytes (gdbarch, off); | |
2262 | set_gdbarch_register_byte (gdbarch, rs6000_register_byte); | |
2263 | set_gdbarch_register_raw_size (gdbarch, rs6000_register_raw_size); | |
2264 | set_gdbarch_max_register_raw_size (gdbarch, 8); | |
2265 | set_gdbarch_register_virtual_size (gdbarch, rs6000_register_virtual_size); | |
2266 | set_gdbarch_max_register_virtual_size (gdbarch, 8); | |
2267 | set_gdbarch_register_virtual_type (gdbarch, rs6000_register_virtual_type); | |
2268 | ||
2269 | set_gdbarch_ptr_bit (gdbarch, wordsize * TARGET_CHAR_BIT); | |
2270 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
2271 | set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
2272 | set_gdbarch_long_bit (gdbarch, wordsize * TARGET_CHAR_BIT); | |
2273 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
2274 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
2275 | set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
2276 | set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
2277 | ||
2278 | set_gdbarch_use_generic_dummy_frames (gdbarch, 1); | |
2279 | set_gdbarch_call_dummy_length (gdbarch, 0); | |
2280 | set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); | |
2281 | set_gdbarch_call_dummy_address (gdbarch, entry_point_address); | |
2282 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); | |
2283 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); | |
2284 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); | |
fe794dc6 | 2285 | set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy); |
7a78ae4e ND |
2286 | set_gdbarch_call_dummy_p (gdbarch, 1); |
2287 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); | |
2288 | set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register); | |
2289 | set_gdbarch_fix_call_dummy (gdbarch, rs6000_fix_call_dummy); | |
2290 | set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); | |
58223630 | 2291 | set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos); |
7a78ae4e ND |
2292 | set_gdbarch_push_return_address (gdbarch, ppc_push_return_address); |
2293 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); | |
2294 | set_gdbarch_coerce_float_to_double (gdbarch, rs6000_coerce_float_to_double); | |
2295 | ||
2296 | set_gdbarch_register_convertible (gdbarch, rs6000_register_convertible); | |
2297 | set_gdbarch_register_convert_to_virtual (gdbarch, rs6000_register_convert_to_virtual); | |
2298 | set_gdbarch_register_convert_to_raw (gdbarch, rs6000_register_convert_to_raw); | |
2299 | ||
2300 | set_gdbarch_extract_return_value (gdbarch, rs6000_extract_return_value); | |
9aa1e687 KB |
2301 | |
2302 | if (sysv_abi) | |
2303 | set_gdbarch_push_arguments (gdbarch, ppc_sysv_abi_push_arguments); | |
2304 | else | |
2305 | set_gdbarch_push_arguments (gdbarch, rs6000_push_arguments); | |
7a78ae4e ND |
2306 | |
2307 | set_gdbarch_store_struct_return (gdbarch, rs6000_store_struct_return); | |
2308 | set_gdbarch_store_return_value (gdbarch, rs6000_store_return_value); | |
2309 | set_gdbarch_extract_struct_value_address (gdbarch, rs6000_extract_struct_value_address); | |
2310 | set_gdbarch_use_struct_convention (gdbarch, generic_use_struct_convention); | |
2311 | ||
7a78ae4e ND |
2312 | set_gdbarch_pop_frame (gdbarch, rs6000_pop_frame); |
2313 | ||
2314 | set_gdbarch_skip_prologue (gdbarch, rs6000_skip_prologue); | |
2315 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
2316 | set_gdbarch_decr_pc_after_break (gdbarch, 0); | |
2317 | set_gdbarch_function_start_offset (gdbarch, 0); | |
2318 | set_gdbarch_breakpoint_from_pc (gdbarch, rs6000_breakpoint_from_pc); | |
2319 | ||
2320 | /* Not sure on this. FIXMEmgo */ | |
2321 | set_gdbarch_frame_args_skip (gdbarch, 8); | |
2322 | ||
7a78ae4e | 2323 | set_gdbarch_frame_chain_valid (gdbarch, file_frame_chain_valid); |
9aa1e687 KB |
2324 | if (osabi == ELFOSABI_LINUX) |
2325 | { | |
2326 | set_gdbarch_frameless_function_invocation (gdbarch, | |
2327 | ppc_linux_frameless_function_invocation); | |
2328 | set_gdbarch_frame_chain (gdbarch, ppc_linux_frame_chain); | |
2329 | set_gdbarch_frame_saved_pc (gdbarch, ppc_linux_frame_saved_pc); | |
2330 | ||
2331 | set_gdbarch_frame_init_saved_regs (gdbarch, | |
2332 | ppc_linux_frame_init_saved_regs); | |
2333 | set_gdbarch_init_extra_frame_info (gdbarch, | |
2334 | ppc_linux_init_extra_frame_info); | |
2335 | ||
2336 | set_gdbarch_memory_remove_breakpoint (gdbarch, | |
2337 | ppc_linux_memory_remove_breakpoint); | |
2338 | } | |
2339 | else | |
2340 | { | |
2341 | set_gdbarch_frameless_function_invocation (gdbarch, | |
2342 | rs6000_frameless_function_invocation); | |
2343 | set_gdbarch_frame_chain (gdbarch, rs6000_frame_chain); | |
2344 | set_gdbarch_frame_saved_pc (gdbarch, rs6000_frame_saved_pc); | |
2345 | ||
2346 | set_gdbarch_frame_init_saved_regs (gdbarch, rs6000_frame_init_saved_regs); | |
2347 | set_gdbarch_init_extra_frame_info (gdbarch, rs6000_init_extra_frame_info); | |
f517ea4e PS |
2348 | |
2349 | /* Handle RS/6000 function pointers. */ | |
2350 | set_gdbarch_convert_from_func_ptr_addr (gdbarch, | |
2351 | rs6000_convert_from_func_ptr_addr); | |
9aa1e687 | 2352 | } |
7a78ae4e ND |
2353 | set_gdbarch_frame_args_address (gdbarch, rs6000_frame_args_address); |
2354 | set_gdbarch_frame_locals_address (gdbarch, rs6000_frame_args_address); | |
2355 | set_gdbarch_saved_pc_after_call (gdbarch, rs6000_saved_pc_after_call); | |
2356 | ||
2357 | /* We can't tell how many args there are | |
2358 | now that the C compiler delays popping them. */ | |
2359 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); | |
2360 | ||
2361 | return gdbarch; | |
c906108c SS |
2362 | } |
2363 | ||
c906108c SS |
2364 | /* Initialization code. */ |
2365 | ||
2366 | void | |
fba45db2 | 2367 | _initialize_rs6000_tdep (void) |
c906108c | 2368 | { |
7a78ae4e ND |
2369 | register_gdbarch_init (bfd_arch_rs6000, rs6000_gdbarch_init); |
2370 | register_gdbarch_init (bfd_arch_powerpc, rs6000_gdbarch_init); | |
c906108c | 2371 | } |