* inftarg.c (child_thread_alive): New function to see if a
[deliverable/binutils-gdb.git] / gdb / rs6000-tdep.c
CommitLineData
41abdfbd 1/* Target-dependent code for GDB, the GNU debugger.
18b46e7c 2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995
07aa9fdc 3 Free Software Foundation, Inc.
41abdfbd
JG
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
20
41abdfbd 21#include "defs.h"
41abdfbd
JG
22#include "frame.h"
23#include "inferior.h"
24#include "symtab.h"
25#include "target.h"
030fb5cb 26#include "gdbcore.h"
41abdfbd 27
2aefe6e4
JK
28#include "xcoffsolib.h"
29
41abdfbd 30#include <a.out.h>
d6434f39
JG
31
32extern struct obstack frame_cache_obstack;
33
41abdfbd 34extern int errno;
41abdfbd
JG
35
36/* Nonzero if we just simulated a single step break. */
37int one_stepped;
38
41abdfbd
JG
39/* Breakpoint shadows for the single step instructions will be kept here. */
40
41static struct sstep_breaks {
030fb5cb
JK
42 /* Address, or 0 if this is not in use. */
43 CORE_ADDR address;
44 /* Shadow contents. */
45 char data[4];
41abdfbd
JG
46} stepBreaks[2];
47
ecf4059f
JG
48/* Static function prototypes */
49
ecf4059f
JG
50static CORE_ADDR
51find_toc_address PARAMS ((CORE_ADDR pc));
52
53static CORE_ADDR
54branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety));
55
56static void
57frame_get_cache_fsr PARAMS ((struct frame_info *fi,
58 struct aix_framedata *fdatap));
41abdfbd
JG
59
60/*
61 * Calculate the destination of a branch/jump. Return -1 if not a branch.
62 */
ecf4059f 63static CORE_ADDR
41abdfbd 64branch_dest (opcode, instr, pc, safety)
ecf4059f
JG
65 int opcode;
66 int instr;
67 CORE_ADDR pc;
68 CORE_ADDR safety;
41abdfbd
JG
69{
70 register long offset;
ecf4059f 71 CORE_ADDR dest;
41abdfbd
JG
72 int immediate;
73 int absolute;
74 int ext_op;
75
76 absolute = (int) ((instr >> 1) & 1);
77
78 switch (opcode) {
79 case 18 :
ecf4059f 80 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
dc59e982
MM
81 if (absolute)
82 dest = immediate;
83 else
84 dest = pc + immediate;
85 break;
41abdfbd
JG
86
87 case 16 :
dc59e982 88 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
41abdfbd
JG
89 if (absolute)
90 dest = immediate;
91 else
92 dest = pc + immediate;
93 break;
94
95 case 19 :
96 ext_op = (instr>>1) & 0x3ff;
97
98 if (ext_op == 16) /* br conditional register */
99 dest = read_register (LR_REGNUM) & ~3;
100
101 else if (ext_op == 528) /* br cond to count reg */
9aa31e91
JK
102 {
103 dest = read_register (CTR_REGNUM) & ~3;
104
105 /* If we are about to execute a system call, dest is something
106 like 0x22fc or 0x3b00. Upon completion the system call
107 will return to the address in the link register. */
108 if (dest < TEXT_SEGMENT_BASE)
109 dest = read_register (LR_REGNUM) & ~3;
110 }
41abdfbd
JG
111 else return -1;
112 break;
113
114 default: return -1;
115 }
818de002 116 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
41abdfbd
JG
117}
118
119
120
121/* AIX does not support PT_STEP. Simulate it. */
122
997cc2c0 123void
41abdfbd 124single_step (signal)
997cc2c0 125 int signal;
41abdfbd
JG
126{
127#define INSNLEN(OPCODE) 4
128
5c172b4b
MM
129 static char le_breakp[] = LITTLE_BREAKPOINT;
130 static char be_breakp[] = BIG_BREAKPOINT;
131 char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp;
030fb5cb
JK
132 int ii, insn;
133 CORE_ADDR loc;
134 CORE_ADDR breaks[2];
135 int opcode;
41abdfbd
JG
136
137 if (!one_stepped) {
41abdfbd
JG
138 loc = read_pc ();
139
b112f2ae 140 insn = read_memory_integer (loc, 4);
41abdfbd
JG
141
142 breaks[0] = loc + INSNLEN(insn);
143 opcode = insn >> 26;
144 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
145
818de002
PB
146 /* Don't put two breakpoints on the same address. */
147 if (breaks[1] == breaks[0])
148 breaks[1] = -1;
149
030fb5cb 150 stepBreaks[1].address = 0;
41abdfbd
JG
151
152 for (ii=0; ii < 2; ++ii) {
153
154 /* ignore invalid breakpoint. */
155 if ( breaks[ii] == -1)
156 continue;
157
030fb5cb 158 read_memory (breaks[ii], stepBreaks[ii].data, 4);
41abdfbd 159
030fb5cb 160 write_memory (breaks[ii], breakp, 4);
41abdfbd
JG
161 stepBreaks[ii].address = breaks[ii];
162 }
163
164 one_stepped = 1;
997cc2c0 165 } else {
41abdfbd
JG
166
167 /* remove step breakpoints. */
168 for (ii=0; ii < 2; ++ii)
030fb5cb 169 if (stepBreaks[ii].address != 0)
41abdfbd 170 write_memory
030fb5cb 171 (stepBreaks[ii].address, stepBreaks[ii].data, 4);
41abdfbd
JG
172
173 one_stepped = 0;
174 }
997cc2c0 175 errno = 0; /* FIXME, don't ignore errors! */
030fb5cb 176 /* What errors? {read,write}_memory call error(). */
41abdfbd 177}
41abdfbd
JG
178
179
180/* return pc value after skipping a function prologue. */
181
182skip_prologue (pc)
ecf4059f 183CORE_ADDR pc;
41abdfbd 184{
34df79fc 185 char buf[4];
41abdfbd 186 unsigned int tmp;
34df79fc 187 unsigned long op;
41abdfbd 188
34df79fc 189 if (target_read_memory (pc, buf, 4))
41abdfbd 190 return pc; /* Can't access it -- assume no prologue. */
34df79fc 191 op = extract_unsigned_integer (buf, 4);
41abdfbd
JG
192
193 /* Assume that subsequent fetches can fail with low probability. */
194
195 if (op == 0x7c0802a6) { /* mflr r0 */
196 pc += 4;
197 op = read_memory_integer (pc, 4);
198 }
41abdfbd
JG
199
200 if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */
201 pc += 4;
202 op = read_memory_integer (pc, 4);
203 }
204
205 if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
206 pc += 4;
207 op = read_memory_integer (pc, 4);
1eeba686
PB
208
209 /* At this point, make sure this is not a trampoline function
210 (a function that simply calls another functions, and nothing else).
211 If the next is not a nop, this branch was part of the function
212 prologue. */
213
629b6214 214 if (op == 0x4def7b82 || /* crorc 15, 15, 15 */
1eeba686 215 op == 0x0)
629b6214 216 return pc - 4; /* don't skip over this branch */
41abdfbd
JG
217 }
218
629b6214
MM
219 if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
220 pc += 4; /* store floating register double */
cdb1cc92
ILT
221 op = read_memory_integer (pc, 4);
222 }
223
629b6214 224 if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */
41abdfbd
JG
225 pc += 4;
226 op = read_memory_integer (pc, 4);
227 }
228
e137e850 229 while ((op & 0xfc1f0000) == 0x90010000 && /* st rx,NUM(r1), rx >= r13 */
629b6214
MM
230 (op & 0x03e00000) >= 0x01a00000) {
231 pc += 4;
232 op = read_memory_integer (pc, 4);
233 }
e137e850
PS
234
235 if (op == 0x90010008) { /* st r0,8(r1) */
236 pc += 4;
237 op = read_memory_integer (pc, 4);
238 }
239
240 if (op == 0x91810004) { /* st r12,4(r1) */
241 pc += 4;
242 op = read_memory_integer (pc, 4);
243 }
629b6214 244
e137e850 245 if ((op & 0xffff0000) == 0x94210000) { /* stu r1,NUM(r1) */
41abdfbd
JG
246 pc += 4;
247 op = read_memory_integer (pc, 4);
248 }
249
250 while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */
251 pc += 4; /* l r30, ... */
252 op = read_memory_integer (pc, 4);
253 }
254
507e4004 255 /* store parameters into stack */
818de002
PB
256 while(
257 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
258 (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */
259 (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */
260 (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */
261 {
262 pc += 4; /* store fpr double */
263 op = read_memory_integer (pc, 4);
264 }
41abdfbd 265
d2985684
PS
266 if (op == 0x603f0000 /* oril r31, r1, 0x0 */
267 || op == 0x7c3f0b78) { /* mr r31, r1 */
41abdfbd
JG
268 pc += 4; /* this happens if r31 is used as */
269 op = read_memory_integer (pc, 4); /* frame ptr. (gcc does that) */
270
818de002
PB
271 tmp = 0;
272 while ((op >> 16) == (0x907f + tmp)) { /* st r3, NUM(r31) */
273 pc += 4; /* st r4, NUM(r31), ... */
41abdfbd 274 op = read_memory_integer (pc, 4);
818de002 275 tmp += 0x20;
41abdfbd
JG
276 }
277 }
507e4004
PB
278#if 0
279/* I have problems with skipping over __main() that I need to address
280 * sometime. Previously, I used to use misc_function_vector which
281 * didn't work as well as I wanted to be. -MGO */
282
283 /* If the first thing after skipping a prolog is a branch to a function,
284 this might be a call to an initializer in main(), introduced by gcc2.
285 We'd like to skip over it as well. Fortunately, xlc does some extra
286 work before calling a function right after a prologue, thus we can
287 single out such gcc2 behaviour. */
288
289
290 if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */
291 op = read_memory_integer (pc+4, 4);
292
293 if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */
294
295 /* check and see if we are in main. If so, skip over this initializer
296 function as well. */
297
298 tmp = find_pc_misc_function (pc);
2e4964ad 299 if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main"))
507e4004
PB
300 return pc + 8;
301 }
302 }
303#endif /* 0 */
304
41abdfbd
JG
305 return pc;
306}
307
818de002 308
41abdfbd
JG
309/*************************************************************************
310 Support for creating pushind a dummy frame into the stack, and popping
311 frames, etc.
312*************************************************************************/
313
818de002
PB
314/* The total size of dummy frame is 436, which is;
315
316 32 gpr's - 128 bytes
317 32 fpr's - 256 "
318 7 the rest - 28 "
319 and 24 extra bytes for the callee's link area. The last 24 bytes
320 for the link area might not be necessary, since it will be taken
321 care of by push_arguments(). */
322
323#define DUMMY_FRAME_SIZE 436
324
41abdfbd
JG
325#define DUMMY_FRAME_ADDR_SIZE 10
326
327/* Make sure you initialize these in somewhere, in case gdb gives up what it
818de002 328 was debugging and starts debugging something else. FIXMEibm */
41abdfbd
JG
329
330static int dummy_frame_count = 0;
331static int dummy_frame_size = 0;
332static CORE_ADDR *dummy_frame_addr = 0;
333
334extern int stop_stack_dummy;
335
336/* push a dummy frame into stack, save all register. Currently we are saving
337 only gpr's and fpr's, which is not good enough! FIXMEmgo */
338
ecf4059f 339void
41abdfbd
JG
340push_dummy_frame ()
341{
359a097f
JK
342 /* stack pointer. */
343 CORE_ADDR sp;
b112f2ae
JK
344 /* Same thing, target byte order. */
345 char sp_targ[4];
359a097f
JK
346
347 /* link register. */
348 CORE_ADDR pc;
349 /* Same thing, target byte order. */
350 char pc_targ[4];
351
41abdfbd
JG
352 int ii;
353
5f1c39ef 354 target_fetch_registers (-1);
6c6afbb9 355
41abdfbd
JG
356 if (dummy_frame_count >= dummy_frame_size) {
357 dummy_frame_size += DUMMY_FRAME_ADDR_SIZE;
358 if (dummy_frame_addr)
359 dummy_frame_addr = (CORE_ADDR*) xrealloc
360 (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size));
361 else
362 dummy_frame_addr = (CORE_ADDR*)
363 xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size));
364 }
365
366 sp = read_register(SP_REGNUM);
359a097f 367 pc = read_register(PC_REGNUM);
5816555b 368 store_address (pc_targ, 4, pc);
41abdfbd
JG
369
370 dummy_frame_addr [dummy_frame_count++] = sp;
371
372 /* Be careful! If the stack pointer is not decremented first, then kernel
6c6afbb9 373 thinks he is free to use the space underneath it. And kernel actually
41abdfbd
JG
374 uses that area for IPC purposes when executing ptrace(2) calls. So
375 before writing register values into the new frame, decrement and update
376 %sp first in order to secure your frame. */
377
818de002 378 write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE);
41abdfbd 379
41abdfbd
JG
380 /* gdb relies on the state of current_frame. We'd better update it,
381 otherwise things like do_registers_info() wouldn't work properly! */
382
383 flush_cached_frames ();
41abdfbd
JG
384
385 /* save program counter in link register's space. */
359a097f 386 write_memory (sp+8, pc_targ, 4);
41abdfbd 387
6c6afbb9 388 /* save all floating point and general purpose registers here. */
41abdfbd
JG
389
390 /* fpr's, f0..f31 */
391 for (ii = 0; ii < 32; ++ii)
392 write_memory (sp-8-(ii*8), &registers[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8);
393
394 /* gpr's r0..r31 */
395 for (ii=1; ii <=32; ++ii)
396 write_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
397
818de002
PB
398 /* so far, 32*2 + 32 words = 384 bytes have been written.
399 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */
400
401 for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) {
402 write_memory (sp-384-(ii*4),
403 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
404 }
405
406 /* Save sp or so called back chain right here. */
b112f2ae
JK
407 store_address (sp_targ, 4, sp);
408 write_memory (sp-DUMMY_FRAME_SIZE, sp_targ, 4);
818de002 409 sp -= DUMMY_FRAME_SIZE;
41abdfbd
JG
410
411 /* And finally, this is the back chain. */
359a097f 412 write_memory (sp+8, pc_targ, 4);
41abdfbd
JG
413}
414
415
416/* Pop a dummy frame.
417
418 In rs6000 when we push a dummy frame, we save all of the registers. This
419 is usually done before user calls a function explicitly.
420
818de002
PB
421 After a dummy frame is pushed, some instructions are copied into stack,
422 and stack pointer is decremented even more. Since we don't have a frame
423 pointer to get back to the parent frame of the dummy, we start having
424 trouble poping it. Therefore, we keep a dummy frame stack, keeping
425 addresses of dummy frames as such. When poping happens and when we
426 detect that was a dummy frame, we pop it back to its parent by using
427 dummy frame stack (`dummy_frame_addr' array).
ecf4059f
JG
428
429FIXME: This whole concept is broken. You should be able to detect
430a dummy stack frame *on the user's stack itself*. When you do,
431then you know the format of that stack frame -- including its
432saved SP register! There should *not* be a separate stack in the
d6434f39 433GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92
41abdfbd
JG
434 */
435
436pop_dummy_frame ()
437{
438 CORE_ADDR sp, pc;
439 int ii;
440 sp = dummy_frame_addr [--dummy_frame_count];
441
442 /* restore all fpr's. */
443 for (ii = 1; ii <= 32; ++ii)
444 read_memory (sp-(ii*8), &registers[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8);
445
446 /* restore all gpr's */
447 for (ii=1; ii <= 32; ++ii) {
448 read_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
449 }
450
818de002
PB
451 /* restore the rest of the registers. */
452 for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii)
453 read_memory (sp-384-(ii*4),
454 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
455
456 read_memory (sp-(DUMMY_FRAME_SIZE-8),
457 &registers [REGISTER_BYTE(PC_REGNUM)], 4);
41abdfbd
JG
458
459 /* when a dummy frame was being pushed, we had to decrement %sp first, in
460 order to secure astack space. Thus, saved %sp (or %r1) value, is not the
461 one we should restore. Change it with the one we need. */
462
463 *(int*)&registers [REGISTER_BYTE(FP_REGNUM)] = sp;
464
465 /* Now we can restore all registers. */
466
5f1c39ef 467 target_store_registers (-1);
41abdfbd
JG
468 pc = read_pc ();
469 flush_cached_frames ();
41abdfbd
JG
470}
471
472
473/* pop the innermost frame, go back to the caller. */
474
ecf4059f 475void
41abdfbd
JG
476pop_frame ()
477{
359a097f 478 CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */
6c6afbb9 479 struct aix_framedata fdata;
669caa9c 480 struct frame_info *frame = get_current_frame ();
41abdfbd 481 int addr, ii;
41abdfbd
JG
482
483 pc = read_pc ();
669caa9c 484 sp = FRAME_FP (frame);
41abdfbd
JG
485
486 if (stop_stack_dummy && dummy_frame_count) {
487 pop_dummy_frame ();
488 return;
489 }
490
07aa9fdc
PS
491 /* Make sure that all registers are valid. */
492 read_register_bytes (0, NULL, REGISTER_BYTES);
493
41abdfbd
JG
494 /* figure out previous %pc value. If the function is frameless, it is
495 still in the link register, otherwise walk the frames and retrieve the
496 saved %pc value in the previous frame. */
497
34a1a3bf 498 addr = get_pc_function_start (frame->pc) + FUNCTION_START_OFFSET;
6c6afbb9 499 function_frame_info (addr, &fdata);
41abdfbd 500
6c6afbb9 501 if (fdata.frameless)
07aa9fdc
PS
502 prev_sp = sp;
503 else
504 prev_sp = read_memory_integer (sp, 4);
505 if (fdata.nosavedpc)
41abdfbd
JG
506 lr = read_register (LR_REGNUM);
507 else
359a097f 508 lr = read_memory_integer (prev_sp+8, 4);
41abdfbd
JG
509
510 /* reset %pc value. */
511 write_register (PC_REGNUM, lr);
512
513 /* reset register values if any was saved earlier. */
6c6afbb9 514 addr = prev_sp - fdata.offset;
41abdfbd 515
6c6afbb9 516 if (fdata.saved_gpr != -1)
669caa9c 517 for (ii = fdata.saved_gpr; ii <= 31; ++ii) {
41abdfbd 518 read_memory (addr, &registers [REGISTER_BYTE (ii)], 4);
cdb1cc92 519 addr += 4;
41abdfbd
JG
520 }
521
6c6afbb9 522 if (fdata.saved_fpr != -1)
669caa9c 523 for (ii = fdata.saved_fpr; ii <= 31; ++ii) {
41abdfbd
JG
524 read_memory (addr, &registers [REGISTER_BYTE (ii+FP0_REGNUM)], 8);
525 addr += 8;
526 }
527
528 write_register (SP_REGNUM, prev_sp);
5f1c39ef 529 target_store_registers (-1);
41abdfbd 530 flush_cached_frames ();
41abdfbd
JG
531}
532
41abdfbd
JG
533/* fixup the call sequence of a dummy function, with the real function address.
534 its argumets will be passed by gdb. */
535
ecf4059f 536void
41abdfbd
JG
537fix_call_dummy(dummyname, pc, fun, nargs, type)
538 char *dummyname;
ecf4059f
JG
539 CORE_ADDR pc;
540 CORE_ADDR fun;
41abdfbd
JG
541 int nargs; /* not used */
542 int type; /* not used */
41abdfbd
JG
543{
544#define TOC_ADDR_OFFSET 20
545#define TARGET_ADDR_OFFSET 28
546
547 int ii;
ecf4059f
JG
548 CORE_ADDR target_addr;
549 CORE_ADDR tocvalue;
41abdfbd
JG
550
551 target_addr = fun;
552 tocvalue = find_toc_address (target_addr);
553
554 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET);
555 ii = (ii & 0xffff0000) | (tocvalue >> 16);
556 *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii;
557
558 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4);
559 ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff);
560 *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii;
561
562 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET);
563 ii = (ii & 0xffff0000) | (target_addr >> 16);
564 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii;
565
566 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4);
567 ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff);
568 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii;
569}
570
571
41abdfbd 572/* return information about a function frame.
6c6afbb9 573 in struct aix_frameinfo fdata:
cdb1cc92
ILT
574 - frameless is TRUE, if function does not have a frame.
575 - nosavedpc is TRUE, if function does not save %pc value in its frame.
41abdfbd
JG
576 - offset is the number of bytes used in the frame to save registers.
577 - saved_gpr is the number of the first saved gpr.
578 - saved_fpr is the number of the first saved fpr.
6c6afbb9
PB
579 - alloca_reg is the number of the register used for alloca() handling.
580 Otherwise -1.
41abdfbd 581 */
ecf4059f 582void
6c6afbb9 583function_frame_info (pc, fdata)
d6434f39 584 CORE_ADDR pc;
6c6afbb9 585 struct aix_framedata *fdata;
41abdfbd
JG
586{
587 unsigned int tmp;
588 register unsigned int op;
9ed8604f 589 char buf[4];
41abdfbd 590
6c6afbb9
PB
591 fdata->offset = 0;
592 fdata->saved_gpr = fdata->saved_fpr = fdata->alloca_reg = -1;
cdb1cc92 593 fdata->frameless = 1;
41abdfbd 594
9ed8604f
PS
595 /* Do not error out if we can't access the instructions. */
596 if (target_read_memory (pc, buf, 4))
597 return;
598 op = extract_unsigned_integer (buf, 4);
41abdfbd
JG
599 if (op == 0x7c0802a6) { /* mflr r0 */
600 pc += 4;
601 op = read_memory_integer (pc, 4);
cdb1cc92 602 fdata->nosavedpc = 0;
6c6afbb9 603 fdata->frameless = 0;
41abdfbd 604 }
cdb1cc92
ILT
605 else /* else, pc is not saved */
606 fdata->nosavedpc = 1;
41abdfbd
JG
607
608 if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */
609 pc += 4;
610 op = read_memory_integer (pc, 4);
cdb1cc92 611 fdata->frameless = 0;
41abdfbd
JG
612 }
613
614 if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
615 pc += 4;
616 op = read_memory_integer (pc, 4);
1eeba686
PB
617 /* At this point, make sure this is not a trampoline function
618 (a function that simply calls another functions, and nothing else).
619 If the next is not a nop, this branch was part of the function
620 prologue. */
621
622 if (op == 0x4def7b82 || /* crorc 15, 15, 15 */
623 op == 0x0)
624 return; /* prologue is over */
cdb1cc92 625 fdata->frameless = 0;
41abdfbd
JG
626 }
627
628 if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
629 pc += 4; /* store floating register double */
630 op = read_memory_integer (pc, 4);
cdb1cc92 631 fdata->frameless = 0;
41abdfbd
JG
632 }
633
634 if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */
635 int tmp2;
6c6afbb9 636 fdata->saved_gpr = (op >> 21) & 0x1f;
41abdfbd
JG
637 tmp2 = op & 0xffff;
638 if (tmp2 > 0x7fff)
cdb1cc92 639 tmp2 = (~0 &~ 0xffff) | tmp2;
41abdfbd
JG
640
641 if (tmp2 < 0) {
642 tmp2 = tmp2 * -1;
6c6afbb9
PB
643 fdata->saved_fpr = (tmp2 - ((32 - fdata->saved_gpr) * 4)) / 8;
644 if ( fdata->saved_fpr > 0)
645 fdata->saved_fpr = 32 - fdata->saved_fpr;
41abdfbd 646 else
6c6afbb9 647 fdata->saved_fpr = -1;
41abdfbd 648 }
6c6afbb9
PB
649 fdata->offset = tmp2;
650 pc += 4;
651 op = read_memory_integer (pc, 4);
cdb1cc92 652 fdata->frameless = 0;
41abdfbd 653 }
6c6afbb9
PB
654
655 while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */
656 (tmp == 0x9421) || /* stu r1, NUM(r1) */
cdb1cc92 657 (tmp == 0x93e1)) /* st r31, NUM(r1) */
6c6afbb9 658 {
cdb1cc92
ILT
659 int tmp2;
660
6c6afbb9
PB
661 /* gcc takes a short cut and uses this instruction to save r31 only. */
662
cdb1cc92 663 if (tmp == 0x93e1) {
6c6afbb9
PB
664 if (fdata->offset)
665/* fatal ("Unrecognized prolog."); */
199b2450 666 printf_unfiltered ("Unrecognized prolog!\n");
6c6afbb9
PB
667
668 fdata->saved_gpr = 31;
cdb1cc92
ILT
669 tmp2 = op & 0xffff;
670 if (tmp2 > 0x7fff) {
671 tmp2 = - ((~0 &~ 0xffff) | tmp2);
672 fdata->saved_fpr = (tmp2 - ((32 - 31) * 4)) / 8;
673 if ( fdata->saved_fpr > 0)
674 fdata->saved_fpr = 32 - fdata->saved_fpr;
675 else
676 fdata->saved_fpr = -1;
677 }
678 fdata->offset = tmp2;
6c6afbb9
PB
679 }
680 pc += 4;
681 op = read_memory_integer (pc, 4);
cdb1cc92 682 fdata->frameless = 0;
6c6afbb9
PB
683 }
684
685 while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */
686 pc += 4; /* l r30, ... */
687 op = read_memory_integer (pc, 4);
cdb1cc92 688 fdata->frameless = 0;
6c6afbb9
PB
689 }
690
691 /* store parameters into stack */
692 while(
693 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
694 (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */
695 (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */
696 (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */
697 {
698 pc += 4; /* store fpr double */
699 op = read_memory_integer (pc, 4);
cdb1cc92 700 fdata->frameless = 0;
6c6afbb9
PB
701 }
702
07aa9fdc
PS
703 if (op == 0x603f0000 /* oril r31, r1, 0x0 */
704 || op == 0x7c3f0b78) /* mr r31, r1 */
705 {
706 fdata->alloca_reg = 31;
707 fdata->frameless = 0;
708 }
41abdfbd
JG
709}
710
711
712/* Pass the arguments in either registers, or in the stack. In RS6000, the first
713 eight words of the argument list (that might be less than eight parameters if
714 some parameters occupy more than one word) are passed in r3..r11 registers.
715 float and double parameters are passed in fpr's, in addition to that. Rest of
716 the parameters if any are passed in user stack. There might be cases in which
717 half of the parameter is copied into registers, the other half is pushed into
718 stack.
719
720 If the function is returning a structure, then the return address is passed
721 in r3, then the first 7 words of the parametes can be passed in registers,
722 starting from r4. */
723
724CORE_ADDR
725push_arguments (nargs, args, sp, struct_return, struct_addr)
726 int nargs;
17221e41 727 value_ptr *args;
41abdfbd
JG
728 CORE_ADDR sp;
729 int struct_return;
730 CORE_ADDR struct_addr;
731{
732 int ii, len;
733 int argno; /* current argument number */
734 int argbytes; /* current argument byte */
735 char tmp_buffer [50];
17221e41 736 value_ptr arg;
41abdfbd
JG
737 int f_argno = 0; /* current floating point argno */
738
739 CORE_ADDR saved_sp, pc;
740
741 if ( dummy_frame_count <= 0)
199b2450 742 printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n");
41abdfbd
JG
743
744 /* The first eight words of ther arguments are passed in registers. Copy
745 them appropriately.
746
747 If the function is returning a `struct', then the first word (which
748 will be passed in r3) is used for struct return address. In that
749 case we should advance one word and start from r4 register to copy
750 parameters. */
751
752 ii = struct_return ? 1 : 0;
753
754 for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) {
755
5222ca60 756 arg = args[argno];
41abdfbd
JG
757 len = TYPE_LENGTH (VALUE_TYPE (arg));
758
759 if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT) {
760
761 /* floating point arguments are passed in fpr's, as well as gpr's.
762 There are 13 fpr's reserved for passing parameters. At this point
763 there is no way we would run out of them. */
764
765 if (len > 8)
199b2450 766 printf_unfiltered (
41abdfbd
JG
767"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
768
ade40d31
RP
769 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
770 len);
41abdfbd
JG
771 ++f_argno;
772 }
773
774 if (len > 4) {
775
776 /* Argument takes more than one register. */
777 while (argbytes < len) {
778
779 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31
RP
780 memcpy (&registers[REGISTER_BYTE(ii+3)],
781 ((char*)VALUE_CONTENTS (arg))+argbytes,
41abdfbd
JG
782 (len - argbytes) > 4 ? 4 : len - argbytes);
783 ++ii, argbytes += 4;
784
785 if (ii >= 8)
786 goto ran_out_of_registers_for_arguments;
787 }
788 argbytes = 0;
789 --ii;
790 }
791 else { /* Argument can fit in one register. No problem. */
792 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31 793 memcpy (&registers[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len);
41abdfbd
JG
794 }
795 ++argno;
796 }
797
798ran_out_of_registers_for_arguments:
799
800 /* location for 8 parameters are always reserved. */
801 sp -= 4 * 8;
802
803 /* another six words for back chain, TOC register, link register, etc. */
804 sp -= 24;
805
806 /* if there are more arguments, allocate space for them in
807 the stack, then push them starting from the ninth one. */
808
809 if ((argno < nargs) || argbytes) {
810 int space = 0, jj;
17221e41 811 value_ptr val;
41abdfbd
JG
812
813 if (argbytes) {
814 space += ((len - argbytes + 3) & -4);
815 jj = argno + 1;
816 }
817 else
818 jj = argno;
819
820 for (; jj < nargs; ++jj) {
5222ca60 821 val = args[jj];
41abdfbd
JG
822 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
823 }
824
825 /* add location required for the rest of the parameters */
826 space = (space + 7) & -8;
827 sp -= space;
828
829 /* This is another instance we need to be concerned about securing our
830 stack space. If we write anything underneath %sp (r1), we might conflict
831 with the kernel who thinks he is free to use this area. So, update %sp
832 first before doing anything else. */
833
834 write_register (SP_REGNUM, sp);
835
41abdfbd
JG
836 /* if the last argument copied into the registers didn't fit there
837 completely, push the rest of it into stack. */
838
839 if (argbytes) {
840 write_memory (
841 sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes);
842 ++argno;
843 ii += ((len - argbytes + 3) & -4) / 4;
844 }
845
846 /* push the rest of the arguments into stack. */
847 for (; argno < nargs; ++argno) {
848
5222ca60 849 arg = args[argno];
41abdfbd
JG
850 len = TYPE_LENGTH (VALUE_TYPE (arg));
851
852
853 /* float types should be passed in fpr's, as well as in the stack. */
854 if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT && f_argno < 13) {
855
856 if (len > 8)
199b2450 857 printf_unfiltered (
41abdfbd
JG
858"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
859
ade40d31
RP
860 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
861 len);
41abdfbd
JG
862 ++f_argno;
863 }
864
359a097f 865 write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len);
41abdfbd
JG
866 ii += ((len + 3) & -4) / 4;
867 }
868 }
6c6afbb9 869 else
41abdfbd
JG
870 /* Secure stack areas first, before doing anything else. */
871 write_register (SP_REGNUM, sp);
872
41abdfbd
JG
873 saved_sp = dummy_frame_addr [dummy_frame_count - 1];
874 read_memory (saved_sp, tmp_buffer, 24);
875 write_memory (sp, tmp_buffer, 24);
876
b112f2ae
JK
877 /* set back chain properly */
878 store_address (tmp_buffer, 4, saved_sp);
879 write_memory (sp, tmp_buffer, 4);
41abdfbd 880
5f1c39ef 881 target_store_registers (-1);
41abdfbd
JG
882 return sp;
883}
884
885/* a given return value in `regbuf' with a type `valtype', extract and copy its
886 value into `valbuf' */
887
ecf4059f 888void
41abdfbd
JG
889extract_return_value (valtype, regbuf, valbuf)
890 struct type *valtype;
891 char regbuf[REGISTER_BYTES];
892 char *valbuf;
893{
894
895 if (TYPE_CODE (valtype) == TYPE_CODE_FLT) {
896
897 double dd; float ff;
898 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
899 We need to truncate the return value into float size (4 byte) if
900 necessary. */
901
902 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
ade40d31 903 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)],
41abdfbd
JG
904 TYPE_LENGTH (valtype));
905 else { /* float */
ade40d31 906 memcpy (&dd, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
41abdfbd 907 ff = (float)dd;
ade40d31 908 memcpy (valbuf, &ff, sizeof(float));
41abdfbd
JG
909 }
910 }
911 else
912 /* return value is copied starting from r3. */
ade40d31 913 memcpy (valbuf, &regbuf[REGISTER_BYTE (3)], TYPE_LENGTH (valtype));
41abdfbd
JG
914}
915
916
ecf4059f
JG
917/* keep structure return address in this variable.
918 FIXME: This is a horrid kludge which should not be allowed to continue
919 living. This only allows a single nested call to a structure-returning
920 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
41abdfbd
JG
921
922CORE_ADDR rs6000_struct_return_address;
923
924
c2e4669f
JG
925/* Indirect function calls use a piece of trampoline code to do context
926 switching, i.e. to set the new TOC table. Skip such code if we are on
927 its first instruction (as when we have single-stepped to here).
07aa9fdc
PS
928 Also skip shared library trampoline code (which is different from
929 indirect function call trampolines).
c2e4669f
JG
930 Result is desired PC to step until, or NULL if we are not in
931 trampoline code. */
41abdfbd 932
ecf4059f 933CORE_ADDR
41abdfbd 934skip_trampoline_code (pc)
ecf4059f 935CORE_ADDR pc;
41abdfbd
JG
936{
937 register unsigned int ii, op;
07aa9fdc 938 CORE_ADDR solib_target_pc;
41abdfbd
JG
939
940 static unsigned trampoline_code[] = {
941 0x800b0000, /* l r0,0x0(r11) */
942 0x90410014, /* st r2,0x14(r1) */
943 0x7c0903a6, /* mtctr r0 */
944 0x804b0004, /* l r2,0x4(r11) */
945 0x816b0008, /* l r11,0x8(r11) */
946 0x4e800420, /* bctr */
947 0x4e800020, /* br */
948 0
949 };
950
07aa9fdc
PS
951 /* If pc is in a shared library trampoline, return its target. */
952 solib_target_pc = find_solib_trampoline_target (pc);
953 if (solib_target_pc)
954 return solib_target_pc;
955
41abdfbd
JG
956 for (ii=0; trampoline_code[ii]; ++ii) {
957 op = read_memory_integer (pc + (ii*4), 4);
958 if (op != trampoline_code [ii])
359a097f 959 return 0;
41abdfbd
JG
960 }
961 ii = read_register (11); /* r11 holds destination addr */
962 pc = read_memory_integer (ii, 4); /* (r11) value */
963 return pc;
964}
965
ecf4059f
JG
966
967/* Determines whether the function FI has a frame on the stack or not.
cdb1cc92
ILT
968 Called from the FRAMELESS_FUNCTION_INVOCATION macro in tm.h with a
969 second argument of 0, and from the FRAME_SAVED_PC macro with a
970 second argument of 1. */
ecf4059f
JG
971
972int
cdb1cc92 973frameless_function_invocation (fi, pcsaved)
ecf4059f 974struct frame_info *fi;
cdb1cc92 975int pcsaved;
ecf4059f
JG
976{
977 CORE_ADDR func_start;
978 struct aix_framedata fdata;
979
b0e932ad
JK
980 if (fi->next != NULL)
981 /* Don't even think about framelessness except on the innermost frame. */
3f528883
JK
982 /* FIXME: Can also be frameless if fi->next->signal_handler_caller (if
983 a signal happens while executing in a frameless function). */
b0e932ad
JK
984 return 0;
985
ecf4059f
JG
986 func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
987
988 /* If we failed to find the start of the function, it is a mistake
989 to inspect the instructions. */
990
991 if (!func_start)
992 return 0;
993
994 function_frame_info (func_start, &fdata);
cdb1cc92 995 return pcsaved ? fdata.nosavedpc : fdata.frameless;
ecf4059f
JG
996}
997
998
999/* If saved registers of frame FI are not known yet, read and cache them.
1000 &FDATAP contains aix_framedata; TDATAP can be NULL,
1001 in which case the framedata are read. */
1002
1003static void
1004frame_get_cache_fsr (fi, fdatap)
1005 struct frame_info *fi;
1006 struct aix_framedata *fdatap;
1007{
1008 int ii;
1009 CORE_ADDR frame_addr;
1010 struct aix_framedata work_fdata;
1011
1012 if (fi->cache_fsr)
1013 return;
1014
1015 if (fdatap == NULL) {
1016 fdatap = &work_fdata;
1017 function_frame_info (get_pc_function_start (fi->pc), fdatap);
1018 }
1019
1020 fi->cache_fsr = (struct frame_saved_regs *)
1021 obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs));
4ed97c9a 1022 memset (fi->cache_fsr, '\0', sizeof (struct frame_saved_regs));
ecf4059f
JG
1023
1024 if (fi->prev && fi->prev->frame)
1025 frame_addr = fi->prev->frame;
1026 else
1027 frame_addr = read_memory_integer (fi->frame, 4);
1028
1029 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1030 All fpr's from saved_fpr to fp31 are saved right underneath caller
1031 stack pointer, starting from fp31 first. */
1032
1033 if (fdatap->saved_fpr >= 0) {
1034 for (ii=31; ii >= fdatap->saved_fpr; --ii)
1035 fi->cache_fsr->regs [FP0_REGNUM + ii] = frame_addr - ((32 - ii) * 8);
1036 frame_addr -= (32 - fdatap->saved_fpr) * 8;
1037 }
1038
1039 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1040 All gpr's from saved_gpr to gpr31 are saved right under saved fprs,
1041 starting from r31 first. */
1042
1043 if (fdatap->saved_gpr >= 0)
1044 for (ii=31; ii >= fdatap->saved_gpr; --ii)
1045 fi->cache_fsr->regs [ii] = frame_addr - ((32 - ii) * 4);
1046}
1047
1048/* Return the address of a frame. This is the inital %sp value when the frame
1049 was first allocated. For functions calling alloca(), it might be saved in
1050 an alloca register. */
1051
1052CORE_ADDR
1053frame_initial_stack_address (fi)
1054 struct frame_info *fi;
1055{
1056 CORE_ADDR tmpaddr;
1057 struct aix_framedata fdata;
1058 struct frame_info *callee_fi;
1059
1060 /* if the initial stack pointer (frame address) of this frame is known,
1061 just return it. */
1062
1063 if (fi->initial_sp)
1064 return fi->initial_sp;
1065
1066 /* find out if this function is using an alloca register.. */
1067
1068 function_frame_info (get_pc_function_start (fi->pc), &fdata);
1069
1070 /* if saved registers of this frame are not known yet, read and cache them. */
1071
1072 if (!fi->cache_fsr)
1073 frame_get_cache_fsr (fi, &fdata);
1074
1075 /* If no alloca register used, then fi->frame is the value of the %sp for
1076 this frame, and it is good enough. */
1077
1078 if (fdata.alloca_reg < 0) {
1079 fi->initial_sp = fi->frame;
1080 return fi->initial_sp;
1081 }
1082
1083 /* This function has an alloca register. If this is the top-most frame
1084 (with the lowest address), the value in alloca register is good. */
1085
1086 if (!fi->next)
1087 return fi->initial_sp = read_register (fdata.alloca_reg);
1088
1089 /* Otherwise, this is a caller frame. Callee has usually already saved
1090 registers, but there are exceptions (such as when the callee
1091 has no parameters). Find the address in which caller's alloca
1092 register is saved. */
1093
1094 for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
1095
1096 if (!callee_fi->cache_fsr)
cdb1cc92 1097 frame_get_cache_fsr (callee_fi, NULL);
ecf4059f
JG
1098
1099 /* this is the address in which alloca register is saved. */
1100
1101 tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg];
1102 if (tmpaddr) {
1103 fi->initial_sp = read_memory_integer (tmpaddr, 4);
1104 return fi->initial_sp;
1105 }
1106
1107 /* Go look into deeper levels of the frame chain to see if any one of
1108 the callees has saved alloca register. */
1109 }
1110
1111 /* If alloca register was not saved, by the callee (or any of its callees)
1112 then the value in the register is still good. */
1113
1114 return fi->initial_sp = read_register (fdata.alloca_reg);
1115}
1116
669caa9c 1117CORE_ADDR
f3649227
JK
1118rs6000_frame_chain (thisframe)
1119 struct frame_info *thisframe;
1120{
669caa9c 1121 CORE_ADDR fp;
f3649227
JK
1122 if (inside_entry_file ((thisframe)->pc))
1123 return 0;
cee86be3 1124 if (thisframe->signal_handler_caller)
9ed8604f 1125 fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4);
cee86be3
JK
1126 else
1127 fp = read_memory_integer ((thisframe)->frame, 4);
1128
f3649227
JK
1129 return fp;
1130}
ecf4059f
JG
1131\f
1132/* Keep an array of load segment information and their TOC table addresses.
1133 This info will be useful when calling a shared library function by hand. */
1134
1135struct loadinfo {
1136 CORE_ADDR textorg, dataorg;
1137 unsigned long toc_offset;
1138};
1139
1140#define LOADINFOLEN 10
1141
ecf4059f
JG
1142static struct loadinfo *loadinfo = NULL;
1143static int loadinfolen = 0;
1144static int loadinfotocindex = 0;
3c02636b 1145static int loadinfotextindex = 0;
ecf4059f
JG
1146
1147
1148void
1149xcoff_init_loadinfo ()
1150{
1151 loadinfotocindex = 0;
1152 loadinfotextindex = 0;
1153
1154 if (loadinfolen == 0) {
1155 loadinfo = (struct loadinfo *)
1156 xmalloc (sizeof (struct loadinfo) * LOADINFOLEN);
1157 loadinfolen = LOADINFOLEN;
1158 }
1159}
1160
1161
1162/* FIXME -- this is never called! */
1163void
1164free_loadinfo ()
1165{
1166 if (loadinfo)
1167 free (loadinfo);
1168 loadinfo = NULL;
1169 loadinfolen = 0;
1170 loadinfotocindex = 0;
1171 loadinfotextindex = 0;
1172}
1173
1174/* this is called from xcoffread.c */
1175
1176void
07dc1e42
MM
1177xcoff_add_toc_to_loadinfo (tocoff)
1178 unsigned long tocoff;
ecf4059f
JG
1179{
1180 while (loadinfotocindex >= loadinfolen) {
1181 loadinfolen += LOADINFOLEN;
1182 loadinfo = (struct loadinfo *)
1183 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1184 }
1185 loadinfo [loadinfotocindex++].toc_offset = tocoff;
1186}
1187
2aefe6e4 1188void
ecf4059f
JG
1189add_text_to_loadinfo (textaddr, dataaddr)
1190 CORE_ADDR textaddr;
1191 CORE_ADDR dataaddr;
1192{
1193 while (loadinfotextindex >= loadinfolen) {
1194 loadinfolen += LOADINFOLEN;
1195 loadinfo = (struct loadinfo *)
1196 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1197 }
1198 loadinfo [loadinfotextindex].textorg = textaddr;
1199 loadinfo [loadinfotextindex].dataorg = dataaddr;
1200 ++loadinfotextindex;
1201}
1202
1203
a367db89 1204/* Note that this assumes that the "textorg" and "dataorg" elements
ecf4059f 1205 of a member of this array are correlated with the "toc_offset"
a367db89
JK
1206 element of the same member. This is taken care of because the loops
1207 which assign the former (in xcoff_relocate_symtab or xcoff_relocate_core)
1208 and the latter (in scan_xcoff_symtab, via vmap_symtab, in vmap_ldinfo
1209 or xcoff_relocate_core) traverse the same objfiles in the same order. */
ecf4059f
JG
1210
1211static CORE_ADDR
1212find_toc_address (pc)
1213 CORE_ADDR pc;
1214{
1215 int ii, toc_entry, tocbase = 0;
1216
1217 for (ii=0; ii < loadinfotextindex; ++ii)
1218 if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) {
1219 toc_entry = ii;
1220 tocbase = loadinfo[ii].textorg;
1221 }
1222
1223 return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset;
1224}
18b46e7c 1225
5c172b4b
MM
1226#ifdef GDB_TARGET_POWERPC
1227int
1228gdb_print_insn_powerpc (memaddr, info)
1229 bfd_vma memaddr;
1230 disassemble_info *info;
1231{
1232 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1233 return print_insn_big_powerpc (memaddr, info);
1234 else
1235 return print_insn_little_powerpc (memaddr, info);
1236}
1237#endif
1238
18b46e7c
SS
1239void
1240_initialize_rs6000_tdep ()
1241{
1242 /* FIXME, this should not be decided via ifdef. */
1243#ifdef GDB_TARGET_POWERPC
5c172b4b 1244 tm_print_insn = gdb_print_insn_powerpc;
18b46e7c
SS
1245#else
1246 tm_print_insn = print_insn_rs6000;
1247#endif
1248}
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