From Kenneth Block <kenneth.block@compaq.com>
[deliverable/binutils-gdb.git] / gdb / rs6000-tdep.c
CommitLineData
c906108c 1/* Target-dependent code for GDB, the GNU debugger.
c877c8e6 2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 2000
c906108c
SS
3 Free Software Foundation, Inc.
4
c5aa993b 5 This file is part of GDB.
c906108c 6
c5aa993b
JM
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
c906108c 11
c5aa993b
JM
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
c906108c 16
c5aa993b
JM
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
c906108c
SS
21
22#include "defs.h"
23#include "frame.h"
24#include "inferior.h"
25#include "symtab.h"
26#include "target.h"
27#include "gdbcore.h"
28#include "gdbcmd.h"
29#include "symfile.h"
30#include "objfiles.h"
7a78ae4e
ND
31#include "arch-utils.h"
32
33#include "bfd/libbfd.h" /* for bfd_default_set_arch_mach */
34#include "coff/internal.h" /* for libcoff.h */
35#include "bfd/libcoff.h" /* for xcoff_data */
36
9aa1e687 37#include "elf-bfd.h"
7a78ae4e 38
9aa1e687 39#include "ppc-tdep.h"
7a78ae4e
ND
40
41/* If the kernel has to deliver a signal, it pushes a sigcontext
42 structure on the stack and then calls the signal handler, passing
43 the address of the sigcontext in an argument register. Usually
44 the signal handler doesn't save this register, so we have to
45 access the sigcontext structure via an offset from the signal handler
46 frame.
47 The following constants were determined by experimentation on AIX 3.2. */
48#define SIG_FRAME_PC_OFFSET 96
49#define SIG_FRAME_LR_OFFSET 108
50#define SIG_FRAME_FP_OFFSET 284
51
7a78ae4e
ND
52/* To be used by skip_prologue. */
53
54struct rs6000_framedata
55 {
56 int offset; /* total size of frame --- the distance
57 by which we decrement sp to allocate
58 the frame */
59 int saved_gpr; /* smallest # of saved gpr */
60 int saved_fpr; /* smallest # of saved fpr */
61 int alloca_reg; /* alloca register number (frame ptr) */
62 char frameless; /* true if frameless functions. */
63 char nosavedpc; /* true if pc not saved. */
64 int gpr_offset; /* offset of saved gprs from prev sp */
65 int fpr_offset; /* offset of saved fprs from prev sp */
66 int lr_offset; /* offset of saved lr */
67 int cr_offset; /* offset of saved cr */
68 };
69
70/* Description of a single register. */
71
72struct reg
73 {
74 char *name; /* name of register */
75 unsigned char sz32; /* size on 32-bit arch, 0 if nonextant */
76 unsigned char sz64; /* size on 64-bit arch, 0 if nonextant */
77 unsigned char fpr; /* whether register is floating-point */
78 };
79
80/* Private data that this module attaches to struct gdbarch. */
81
82struct gdbarch_tdep
83 {
84 int wordsize; /* size in bytes of fixed-point word */
9aa1e687 85 int osabi; /* OS / ABI from ELF header */
7a78ae4e
ND
86 int *regoff; /* byte offsets in register arrays */
87 const struct reg *regs; /* from current variant */
88 };
c906108c 89
7a78ae4e
ND
90/* Return the current architecture's gdbarch_tdep structure. */
91
92#define TDEP gdbarch_tdep (current_gdbarch)
c906108c
SS
93
94/* Breakpoint shadows for the single step instructions will be kept here. */
95
c5aa993b
JM
96static struct sstep_breaks
97 {
98 /* Address, or 0 if this is not in use. */
99 CORE_ADDR address;
100 /* Shadow contents. */
101 char data[4];
102 }
103stepBreaks[2];
c906108c
SS
104
105/* Hook for determining the TOC address when calling functions in the
106 inferior under AIX. The initialization code in rs6000-nat.c sets
107 this hook to point to find_toc_address. */
108
7a78ae4e
ND
109CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR) = NULL;
110
111/* Hook to set the current architecture when starting a child process.
112 rs6000-nat.c sets this. */
113
114void (*rs6000_set_host_arch_hook) (int) = NULL;
c906108c
SS
115
116/* Static function prototypes */
117
a14ed312
KB
118static CORE_ADDR branch_dest (int opcode, int instr, CORE_ADDR pc,
119 CORE_ADDR safety);
077276e8
KB
120static CORE_ADDR skip_prologue (CORE_ADDR, CORE_ADDR,
121 struct rs6000_framedata *);
7a78ae4e
ND
122static void frame_get_saved_regs (struct frame_info * fi,
123 struct rs6000_framedata * fdatap);
124static CORE_ADDR frame_initial_stack_address (struct frame_info *);
c906108c 125
7a78ae4e 126/* Read a LEN-byte address from debugged memory address MEMADDR. */
c906108c 127
7a78ae4e
ND
128static CORE_ADDR
129read_memory_addr (CORE_ADDR memaddr, int len)
130{
131 return read_memory_unsigned_integer (memaddr, len);
132}
c906108c 133
7a78ae4e
ND
134static CORE_ADDR
135rs6000_skip_prologue (CORE_ADDR pc)
b83266a0
SS
136{
137 struct rs6000_framedata frame;
077276e8 138 pc = skip_prologue (pc, 0, &frame);
b83266a0
SS
139 return pc;
140}
141
142
c906108c
SS
143/* Fill in fi->saved_regs */
144
145struct frame_extra_info
146{
147 /* Functions calling alloca() change the value of the stack
148 pointer. We need to use initial stack pointer (which is saved in
149 r31 by gcc) in such cases. If a compiler emits traceback table,
150 then we should use the alloca register specified in traceback
151 table. FIXME. */
c5aa993b 152 CORE_ADDR initial_sp; /* initial stack pointer. */
c906108c
SS
153};
154
9aa1e687 155void
7a78ae4e 156rs6000_init_extra_frame_info (int fromleaf, struct frame_info *fi)
c906108c 157{
c5aa993b 158 fi->extra_info = (struct frame_extra_info *)
c906108c
SS
159 frame_obstack_alloc (sizeof (struct frame_extra_info));
160 fi->extra_info->initial_sp = 0;
161 if (fi->next != (CORE_ADDR) 0
162 && fi->pc < TEXT_SEGMENT_BASE)
7a292a7a 163 /* We're in get_prev_frame */
c906108c
SS
164 /* and this is a special signal frame. */
165 /* (fi->pc will be some low address in the kernel, */
166 /* to which the signal handler returns). */
167 fi->signal_handler_caller = 1;
168}
169
7a78ae4e
ND
170/* Put here the code to store, into a struct frame_saved_regs,
171 the addresses of the saved registers of frame described by FRAME_INFO.
172 This includes special registers such as pc and fp saved in special
173 ways in the stack frame. sp is even more special:
174 the address we return for it IS the sp for the next frame. */
c906108c 175
7a78ae4e
ND
176/* In this implementation for RS/6000, we do *not* save sp. I am
177 not sure if it will be needed. The following function takes care of gpr's
178 and fpr's only. */
179
9aa1e687 180void
7a78ae4e 181rs6000_frame_init_saved_regs (struct frame_info *fi)
c906108c
SS
182{
183 frame_get_saved_regs (fi, NULL);
184}
185
7a78ae4e
ND
186static CORE_ADDR
187rs6000_frame_args_address (struct frame_info *fi)
c906108c
SS
188{
189 if (fi->extra_info->initial_sp != 0)
190 return fi->extra_info->initial_sp;
191 else
192 return frame_initial_stack_address (fi);
193}
194
7a78ae4e
ND
195/* Immediately after a function call, return the saved pc.
196 Can't go through the frames for this because on some machines
197 the new frame is not set up until the new function executes
198 some instructions. */
199
200static CORE_ADDR
201rs6000_saved_pc_after_call (struct frame_info *fi)
202{
9aa1e687 203 return read_register (PPC_LR_REGNUM);
7a78ae4e 204}
c906108c
SS
205
206/* Calculate the destination of a branch/jump. Return -1 if not a branch. */
207
208static CORE_ADDR
7a78ae4e 209branch_dest (int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety)
c906108c
SS
210{
211 CORE_ADDR dest;
212 int immediate;
213 int absolute;
214 int ext_op;
215
216 absolute = (int) ((instr >> 1) & 1);
217
c5aa993b
JM
218 switch (opcode)
219 {
220 case 18:
221 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
222 if (absolute)
223 dest = immediate;
224 else
225 dest = pc + immediate;
226 break;
227
228 case 16:
229 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
230 if (absolute)
231 dest = immediate;
232 else
233 dest = pc + immediate;
234 break;
235
236 case 19:
237 ext_op = (instr >> 1) & 0x3ff;
238
239 if (ext_op == 16) /* br conditional register */
240 {
9aa1e687 241 dest = read_register (PPC_LR_REGNUM) & ~3;
c5aa993b
JM
242
243 /* If we are about to return from a signal handler, dest is
244 something like 0x3c90. The current frame is a signal handler
245 caller frame, upon completion of the sigreturn system call
246 execution will return to the saved PC in the frame. */
247 if (dest < TEXT_SEGMENT_BASE)
248 {
249 struct frame_info *fi;
250
251 fi = get_current_frame ();
252 if (fi != NULL)
7a78ae4e
ND
253 dest = read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET,
254 TDEP->wordsize);
c5aa993b
JM
255 }
256 }
257
258 else if (ext_op == 528) /* br cond to count reg */
259 {
9aa1e687 260 dest = read_register (PPC_CTR_REGNUM) & ~3;
c5aa993b
JM
261
262 /* If we are about to execute a system call, dest is something
263 like 0x22fc or 0x3b00. Upon completion the system call
264 will return to the address in the link register. */
265 if (dest < TEXT_SEGMENT_BASE)
9aa1e687 266 dest = read_register (PPC_LR_REGNUM) & ~3;
c5aa993b
JM
267 }
268 else
269 return -1;
270 break;
c906108c 271
c5aa993b
JM
272 default:
273 return -1;
274 }
c906108c
SS
275 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
276}
277
278
279/* Sequence of bytes for breakpoint instruction. */
280
281#define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 }
282#define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d }
283
7a78ae4e
ND
284static unsigned char *
285rs6000_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size)
c906108c
SS
286{
287 static unsigned char big_breakpoint[] = BIG_BREAKPOINT;
288 static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT;
289 *bp_size = 4;
290 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
291 return big_breakpoint;
292 else
293 return little_breakpoint;
294}
295
296
297/* AIX does not support PT_STEP. Simulate it. */
298
299void
7a78ae4e 300rs6000_software_single_step (unsigned int signal, int insert_breakpoints_p)
c906108c
SS
301{
302#define INSNLEN(OPCODE) 4
303
304 static char le_breakp[] = LITTLE_BREAKPOINT;
305 static char be_breakp[] = BIG_BREAKPOINT;
306 char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp;
307 int ii, insn;
308 CORE_ADDR loc;
309 CORE_ADDR breaks[2];
310 int opcode;
311
c5aa993b
JM
312 if (insert_breakpoints_p)
313 {
c906108c 314
c5aa993b 315 loc = read_pc ();
c906108c 316
c5aa993b 317 insn = read_memory_integer (loc, 4);
c906108c 318
c5aa993b
JM
319 breaks[0] = loc + INSNLEN (insn);
320 opcode = insn >> 26;
321 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
c906108c 322
c5aa993b
JM
323 /* Don't put two breakpoints on the same address. */
324 if (breaks[1] == breaks[0])
325 breaks[1] = -1;
c906108c 326
c5aa993b 327 stepBreaks[1].address = 0;
c906108c 328
c5aa993b
JM
329 for (ii = 0; ii < 2; ++ii)
330 {
c906108c 331
c5aa993b
JM
332 /* ignore invalid breakpoint. */
333 if (breaks[ii] == -1)
334 continue;
c906108c 335
c5aa993b 336 read_memory (breaks[ii], stepBreaks[ii].data, 4);
c906108c 337
c5aa993b
JM
338 write_memory (breaks[ii], breakp, 4);
339 stepBreaks[ii].address = breaks[ii];
340 }
c906108c 341
c5aa993b
JM
342 }
343 else
344 {
c906108c 345
c5aa993b
JM
346 /* remove step breakpoints. */
347 for (ii = 0; ii < 2; ++ii)
348 if (stepBreaks[ii].address != 0)
349 write_memory
350 (stepBreaks[ii].address, stepBreaks[ii].data, 4);
c906108c 351
c5aa993b 352 }
c906108c 353 errno = 0; /* FIXME, don't ignore errors! */
c5aa993b 354 /* What errors? {read,write}_memory call error(). */
c906108c
SS
355}
356
357
358/* return pc value after skipping a function prologue and also return
359 information about a function frame.
360
361 in struct rs6000_framedata fdata:
c5aa993b
JM
362 - frameless is TRUE, if function does not have a frame.
363 - nosavedpc is TRUE, if function does not save %pc value in its frame.
364 - offset is the initial size of this stack frame --- the amount by
365 which we decrement the sp to allocate the frame.
366 - saved_gpr is the number of the first saved gpr.
367 - saved_fpr is the number of the first saved fpr.
368 - alloca_reg is the number of the register used for alloca() handling.
369 Otherwise -1.
370 - gpr_offset is the offset of the first saved gpr from the previous frame.
371 - fpr_offset is the offset of the first saved fpr from the previous frame.
372 - lr_offset is the offset of the saved lr
373 - cr_offset is the offset of the saved cr
374 */
c906108c
SS
375
376#define SIGNED_SHORT(x) \
377 ((sizeof (short) == 2) \
378 ? ((int)(short)(x)) \
379 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
380
381#define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
382
7a78ae4e 383static CORE_ADDR
077276e8 384skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata)
c906108c
SS
385{
386 CORE_ADDR orig_pc = pc;
ddb20c56 387 CORE_ADDR last_prologue_pc;
c906108c
SS
388 char buf[4];
389 unsigned long op;
390 long offset = 0;
482ca3f5
KB
391 int lr_reg = -1;
392 int cr_reg = -1;
c906108c
SS
393 int reg;
394 int framep = 0;
395 int minimal_toc_loaded = 0;
ddb20c56 396 int prev_insn_was_prologue_insn = 1;
c906108c 397
ddb20c56 398 memset (fdata, 0, sizeof (struct rs6000_framedata));
c906108c
SS
399 fdata->saved_gpr = -1;
400 fdata->saved_fpr = -1;
401 fdata->alloca_reg = -1;
402 fdata->frameless = 1;
403 fdata->nosavedpc = 1;
404
c906108c 405 pc -= 4;
077276e8 406 while (lim_pc == 0 || pc < lim_pc - 4)
c906108c
SS
407 {
408 pc += 4;
ddb20c56
KB
409
410 /* Sometimes it isn't clear if an instruction is a prologue
411 instruction or not. When we encounter one of these ambiguous
412 cases, we'll set prev_insn_was_prologue_insn to 0 (false).
413 Otherwise, we'll assume that it really is a prologue instruction. */
414 if (prev_insn_was_prologue_insn)
415 last_prologue_pc = pc;
416 prev_insn_was_prologue_insn = 1;
417
418 if (target_read_memory (pc, buf, 4))
419 break;
420 op = extract_signed_integer (buf, 4);
c906108c 421
c5aa993b
JM
422 if ((op & 0xfc1fffff) == 0x7c0802a6)
423 { /* mflr Rx */
424 lr_reg = (op & 0x03e00000) | 0x90010000;
425 continue;
c906108c 426
c5aa993b
JM
427 }
428 else if ((op & 0xfc1fffff) == 0x7c000026)
429 { /* mfcr Rx */
430 cr_reg = (op & 0x03e00000) | 0x90010000;
431 continue;
c906108c 432
c906108c 433 }
c5aa993b
JM
434 else if ((op & 0xfc1f0000) == 0xd8010000)
435 { /* stfd Rx,NUM(r1) */
436 reg = GET_SRC_REG (op);
437 if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg)
438 {
439 fdata->saved_fpr = reg;
440 fdata->fpr_offset = SIGNED_SHORT (op) + offset;
441 }
442 continue;
c906108c 443
c5aa993b
JM
444 }
445 else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
7a78ae4e
ND
446 (((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
447 (op & 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */
448 (op & 0x03e00000) >= 0x01a00000)) /* rx >= r13 */
c5aa993b
JM
449 {
450
451 reg = GET_SRC_REG (op);
452 if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg)
453 {
454 fdata->saved_gpr = reg;
7a78ae4e
ND
455 if ((op & 0xfc1f0003) == 0xf8010000)
456 op = (op >> 1) << 1;
c5aa993b
JM
457 fdata->gpr_offset = SIGNED_SHORT (op) + offset;
458 }
459 continue;
c906108c 460
ddb20c56
KB
461 }
462 else if ((op & 0xffff0000) == 0x60000000)
463 {
464 /* nop */
465 /* Allow nops in the prologue, but do not consider them to
466 be part of the prologue unless followed by other prologue
467 instructions. */
468 prev_insn_was_prologue_insn = 0;
469 continue;
470
c906108c 471 }
c5aa993b
JM
472 else if ((op & 0xffff0000) == 0x3c000000)
473 { /* addis 0,0,NUM, used
474 for >= 32k frames */
475 fdata->offset = (op & 0x0000ffff) << 16;
476 fdata->frameless = 0;
477 continue;
478
479 }
480 else if ((op & 0xffff0000) == 0x60000000)
481 { /* ori 0,0,NUM, 2nd ha
482 lf of >= 32k frames */
483 fdata->offset |= (op & 0x0000ffff);
484 fdata->frameless = 0;
485 continue;
486
487 }
482ca3f5 488 else if (lr_reg != -1 && (op & 0xffff0000) == lr_reg)
c5aa993b
JM
489 { /* st Rx,NUM(r1)
490 where Rx == lr */
491 fdata->lr_offset = SIGNED_SHORT (op) + offset;
492 fdata->nosavedpc = 0;
493 lr_reg = 0;
494 continue;
495
496 }
482ca3f5 497 else if (cr_reg != -1 && (op & 0xffff0000) == cr_reg)
c5aa993b
JM
498 { /* st Rx,NUM(r1)
499 where Rx == cr */
500 fdata->cr_offset = SIGNED_SHORT (op) + offset;
501 cr_reg = 0;
502 continue;
503
504 }
505 else if (op == 0x48000005)
506 { /* bl .+4 used in
507 -mrelocatable */
508 continue;
509
510 }
511 else if (op == 0x48000004)
512 { /* b .+4 (xlc) */
513 break;
514
515 }
516 else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used
c906108c 517 in V.4 -mrelocatable */
c5aa993b
JM
518 op == 0x7fc0f214) && /* add r30,r0,r30, used
519 in V.4 -mrelocatable */
520 lr_reg == 0x901e0000)
521 {
522 continue;
c906108c 523
c5aa993b
JM
524 }
525 else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
c906108c 526 in V.4 -mminimal-toc */
c5aa993b
JM
527 (op & 0xffff0000) == 0x3bde0000)
528 { /* addi 30,30,foo@l */
529 continue;
c906108c 530
c5aa993b
JM
531 }
532 else if ((op & 0xfc000001) == 0x48000001)
533 { /* bl foo,
534 to save fprs??? */
c906108c 535
c5aa993b
JM
536 fdata->frameless = 0;
537 /* Don't skip over the subroutine call if it is not within the first
538 three instructions of the prologue. */
539 if ((pc - orig_pc) > 8)
540 break;
541
542 op = read_memory_integer (pc + 4, 4);
543
544 /* At this point, make sure this is not a trampoline function
545 (a function that simply calls another functions, and nothing else).
546 If the next is not a nop, this branch was part of the function
547 prologue. */
548
549 if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */
550 break; /* don't skip over
551 this branch */
552 continue;
553
554 /* update stack pointer */
555 }
7a78ae4e
ND
556 else if ((op & 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */
557 (op & 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */
558 {
c5aa993b 559 fdata->frameless = 0;
7a78ae4e
ND
560 if ((op & 0xffff0003) == 0xf8210001)
561 op = (op >> 1) << 1;
c5aa993b
JM
562 fdata->offset = SIGNED_SHORT (op);
563 offset = fdata->offset;
564 continue;
565
566 }
567 else if (op == 0x7c21016e)
568 { /* stwux 1,1,0 */
569 fdata->frameless = 0;
570 offset = fdata->offset;
571 continue;
572
573 /* Load up minimal toc pointer */
574 }
575 else if ((op >> 22) == 0x20f
576 && !minimal_toc_loaded)
577 { /* l r31,... or l r30,... */
578 minimal_toc_loaded = 1;
579 continue;
580
f6077098
KB
581 /* move parameters from argument registers to local variable
582 registers */
583 }
584 else if ((op & 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */
585 (((op >> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */
586 (((op >> 21) & 31) <= 10) &&
587 (((op >> 16) & 31) >= fdata->saved_gpr)) /* Rx: local var reg */
588 {
589 continue;
590
c5aa993b
JM
591 /* store parameters in stack */
592 }
593 else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
7a78ae4e 594 (op & 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */
c5aa993b 595 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
7a78ae4e
ND
596 (op & 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */
597 {
c5aa993b 598 continue;
c906108c 599
c5aa993b
JM
600 /* store parameters in stack via frame pointer */
601 }
602 else if (framep &&
603 ((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
604 (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
605 (op & 0xfc1f0000) == 0xfc1f0000))
606 { /* frsp, fp?,NUM(r1) */
607 continue;
608
609 /* Set up frame pointer */
610 }
611 else if (op == 0x603f0000 /* oril r31, r1, 0x0 */
612 || op == 0x7c3f0b78)
613 { /* mr r31, r1 */
614 fdata->frameless = 0;
615 framep = 1;
616 fdata->alloca_reg = 31;
617 continue;
618
619 /* Another way to set up the frame pointer. */
620 }
621 else if ((op & 0xfc1fffff) == 0x38010000)
622 { /* addi rX, r1, 0x0 */
623 fdata->frameless = 0;
624 framep = 1;
625 fdata->alloca_reg = (op & ~0x38010000) >> 21;
626 continue;
627
628 }
629 else
630 {
631 break;
632 }
c906108c
SS
633 }
634
635#if 0
636/* I have problems with skipping over __main() that I need to address
637 * sometime. Previously, I used to use misc_function_vector which
638 * didn't work as well as I wanted to be. -MGO */
639
640 /* If the first thing after skipping a prolog is a branch to a function,
641 this might be a call to an initializer in main(), introduced by gcc2.
642 We'd like to skip over it as well. Fortunately, xlc does some extra
643 work before calling a function right after a prologue, thus we can
644 single out such gcc2 behaviour. */
c906108c 645
c906108c 646
c5aa993b
JM
647 if ((op & 0xfc000001) == 0x48000001)
648 { /* bl foo, an initializer function? */
649 op = read_memory_integer (pc + 4, 4);
650
651 if (op == 0x4def7b82)
652 { /* cror 0xf, 0xf, 0xf (nop) */
c906108c 653
c5aa993b
JM
654 /* check and see if we are in main. If so, skip over this initializer
655 function as well. */
c906108c 656
c5aa993b
JM
657 tmp = find_pc_misc_function (pc);
658 if (tmp >= 0 && STREQ (misc_function_vector[tmp].name, "main"))
659 return pc + 8;
660 }
c906108c 661 }
c906108c 662#endif /* 0 */
c5aa993b
JM
663
664 fdata->offset = -fdata->offset;
ddb20c56 665 return last_prologue_pc;
c906108c
SS
666}
667
668
669/*************************************************************************
f6077098 670 Support for creating pushing a dummy frame into the stack, and popping
c906108c
SS
671 frames, etc.
672*************************************************************************/
673
c906108c 674
7a78ae4e 675/* Pop the innermost frame, go back to the caller. */
c5aa993b 676
c906108c 677static void
7a78ae4e 678rs6000_pop_frame (void)
c906108c 679{
470d5666 680 CORE_ADDR pc, lr, sp, prev_sp, addr; /* %pc, %lr, %sp */
c906108c
SS
681 struct rs6000_framedata fdata;
682 struct frame_info *frame = get_current_frame ();
470d5666 683 int ii, wordsize;
c906108c
SS
684
685 pc = read_pc ();
686 sp = FRAME_FP (frame);
687
58223630 688 if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame))
c906108c 689 {
7a78ae4e
ND
690 generic_pop_dummy_frame ();
691 flush_cached_frames ();
692 return;
c906108c
SS
693 }
694
695 /* Make sure that all registers are valid. */
696 read_register_bytes (0, NULL, REGISTER_BYTES);
697
698 /* figure out previous %pc value. If the function is frameless, it is
699 still in the link register, otherwise walk the frames and retrieve the
700 saved %pc value in the previous frame. */
701
702 addr = get_pc_function_start (frame->pc);
077276e8 703 (void) skip_prologue (addr, frame->pc, &fdata);
c906108c 704
7a78ae4e 705 wordsize = TDEP->wordsize;
c906108c
SS
706 if (fdata.frameless)
707 prev_sp = sp;
708 else
7a78ae4e 709 prev_sp = read_memory_addr (sp, wordsize);
c906108c 710 if (fdata.lr_offset == 0)
9aa1e687 711 lr = read_register (PPC_LR_REGNUM);
c906108c 712 else
7a78ae4e 713 lr = read_memory_addr (prev_sp + fdata.lr_offset, wordsize);
c906108c
SS
714
715 /* reset %pc value. */
716 write_register (PC_REGNUM, lr);
717
718 /* reset register values if any was saved earlier. */
719
720 if (fdata.saved_gpr != -1)
721 {
722 addr = prev_sp + fdata.gpr_offset;
c5aa993b
JM
723 for (ii = fdata.saved_gpr; ii <= 31; ++ii)
724 {
7a78ae4e
ND
725 read_memory (addr, &registers[REGISTER_BYTE (ii)], wordsize);
726 addr += wordsize;
c5aa993b 727 }
c906108c
SS
728 }
729
730 if (fdata.saved_fpr != -1)
731 {
732 addr = prev_sp + fdata.fpr_offset;
c5aa993b
JM
733 for (ii = fdata.saved_fpr; ii <= 31; ++ii)
734 {
735 read_memory (addr, &registers[REGISTER_BYTE (ii + FP0_REGNUM)], 8);
736 addr += 8;
737 }
c906108c
SS
738 }
739
740 write_register (SP_REGNUM, prev_sp);
741 target_store_registers (-1);
742 flush_cached_frames ();
743}
744
7a78ae4e
ND
745/* Fixup the call sequence of a dummy function, with the real function
746 address. Its arguments will be passed by gdb. */
c906108c 747
7a78ae4e
ND
748static void
749rs6000_fix_call_dummy (char *dummyname, CORE_ADDR pc, CORE_ADDR fun,
750 int nargs, value_ptr *args, struct type *type,
751 int gcc_p)
c906108c
SS
752{
753#define TOC_ADDR_OFFSET 20
754#define TARGET_ADDR_OFFSET 28
755
756 int ii;
757 CORE_ADDR target_addr;
758
7a78ae4e 759 if (rs6000_find_toc_address_hook != NULL)
f6077098 760 {
7a78ae4e 761 CORE_ADDR tocvalue = (*rs6000_find_toc_address_hook) (fun);
9aa1e687 762 write_register (PPC_TOC_REGNUM, tocvalue);
f6077098 763 }
c906108c
SS
764}
765
7a78ae4e 766/* Pass the arguments in either registers, or in the stack. In RS/6000,
c906108c
SS
767 the first eight words of the argument list (that might be less than
768 eight parameters if some parameters occupy more than one word) are
7a78ae4e 769 passed in r3..r10 registers. float and double parameters are
c906108c
SS
770 passed in fpr's, in addition to that. Rest of the parameters if any
771 are passed in user stack. There might be cases in which half of the
772 parameter is copied into registers, the other half is pushed into
773 stack.
774
7a78ae4e
ND
775 Stack must be aligned on 64-bit boundaries when synthesizing
776 function calls.
777
c906108c
SS
778 If the function is returning a structure, then the return address is passed
779 in r3, then the first 7 words of the parameters can be passed in registers,
780 starting from r4. */
781
7a78ae4e
ND
782static CORE_ADDR
783rs6000_push_arguments (int nargs, value_ptr *args, CORE_ADDR sp,
784 int struct_return, CORE_ADDR struct_addr)
c906108c
SS
785{
786 int ii;
787 int len = 0;
c5aa993b
JM
788 int argno; /* current argument number */
789 int argbytes; /* current argument byte */
790 char tmp_buffer[50];
791 int f_argno = 0; /* current floating point argno */
7a78ae4e 792 int wordsize = TDEP->wordsize;
c906108c
SS
793
794 value_ptr arg = 0;
795 struct type *type;
796
797 CORE_ADDR saved_sp;
798
c906108c
SS
799 /* The first eight words of ther arguments are passed in registers. Copy
800 them appropriately.
801
802 If the function is returning a `struct', then the first word (which
803 will be passed in r3) is used for struct return address. In that
804 case we should advance one word and start from r4 register to copy
805 parameters. */
806
c5aa993b 807 ii = struct_return ? 1 : 0;
c906108c
SS
808
809/*
c5aa993b
JM
810 effectively indirect call... gcc does...
811
812 return_val example( float, int);
813
814 eabi:
815 float in fp0, int in r3
816 offset of stack on overflow 8/16
817 for varargs, must go by type.
818 power open:
819 float in r3&r4, int in r5
820 offset of stack on overflow different
821 both:
822 return in r3 or f0. If no float, must study how gcc emulates floats;
823 pay attention to arg promotion.
824 User may have to cast\args to handle promotion correctly
825 since gdb won't know if prototype supplied or not.
826 */
c906108c 827
c5aa993b
JM
828 for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii)
829 {
f6077098 830 int reg_size = REGISTER_RAW_SIZE (ii + 3);
c5aa993b
JM
831
832 arg = args[argno];
833 type = check_typedef (VALUE_TYPE (arg));
834 len = TYPE_LENGTH (type);
835
836 if (TYPE_CODE (type) == TYPE_CODE_FLT)
837 {
838
839 /* floating point arguments are passed in fpr's, as well as gpr's.
840 There are 13 fpr's reserved for passing parameters. At this point
841 there is no way we would run out of them. */
842
843 if (len > 8)
844 printf_unfiltered (
845 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
846
847 memcpy (&registers[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)],
848 VALUE_CONTENTS (arg),
849 len);
850 ++f_argno;
851 }
852
f6077098 853 if (len > reg_size)
c5aa993b
JM
854 {
855
856 /* Argument takes more than one register. */
857 while (argbytes < len)
858 {
f6077098 859 memset (&registers[REGISTER_BYTE (ii + 3)], 0, reg_size);
c5aa993b
JM
860 memcpy (&registers[REGISTER_BYTE (ii + 3)],
861 ((char *) VALUE_CONTENTS (arg)) + argbytes,
f6077098
KB
862 (len - argbytes) > reg_size
863 ? reg_size : len - argbytes);
864 ++ii, argbytes += reg_size;
c5aa993b
JM
865
866 if (ii >= 8)
867 goto ran_out_of_registers_for_arguments;
868 }
869 argbytes = 0;
870 --ii;
871 }
872 else
873 { /* Argument can fit in one register. No problem. */
f6077098
KB
874 int adj = TARGET_BYTE_ORDER == BIG_ENDIAN ? reg_size - len : 0;
875 memset (&registers[REGISTER_BYTE (ii + 3)], 0, reg_size);
876 memcpy ((char *)&registers[REGISTER_BYTE (ii + 3)] + adj,
877 VALUE_CONTENTS (arg), len);
c5aa993b
JM
878 }
879 ++argno;
c906108c 880 }
c906108c
SS
881
882ran_out_of_registers_for_arguments:
883
7a78ae4e 884 saved_sp = read_sp ();
f6077098 885#ifndef ELF_OBJECT_FORMAT
7a78ae4e
ND
886 /* location for 8 parameters are always reserved. */
887 sp -= wordsize * 8;
f6077098 888
7a78ae4e
ND
889 /* another six words for back chain, TOC register, link register, etc. */
890 sp -= wordsize * 6;
f6077098 891
7a78ae4e
ND
892 /* stack pointer must be quadword aligned */
893 sp &= -16;
f6077098 894#endif
c906108c 895
c906108c
SS
896 /* if there are more arguments, allocate space for them in
897 the stack, then push them starting from the ninth one. */
898
c5aa993b
JM
899 if ((argno < nargs) || argbytes)
900 {
901 int space = 0, jj;
c906108c 902
c5aa993b
JM
903 if (argbytes)
904 {
905 space += ((len - argbytes + 3) & -4);
906 jj = argno + 1;
907 }
908 else
909 jj = argno;
c906108c 910
c5aa993b
JM
911 for (; jj < nargs; ++jj)
912 {
913 value_ptr val = args[jj];
914 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
915 }
c906108c 916
c5aa993b 917 /* add location required for the rest of the parameters */
f6077098 918 space = (space + 15) & -16;
c5aa993b 919 sp -= space;
c906108c 920
c5aa993b
JM
921 /* This is another instance we need to be concerned about securing our
922 stack space. If we write anything underneath %sp (r1), we might conflict
923 with the kernel who thinks he is free to use this area. So, update %sp
924 first before doing anything else. */
c906108c 925
c5aa993b 926 write_register (SP_REGNUM, sp);
c906108c 927
c5aa993b
JM
928 /* if the last argument copied into the registers didn't fit there
929 completely, push the rest of it into stack. */
c906108c 930
c5aa993b
JM
931 if (argbytes)
932 {
933 write_memory (sp + 24 + (ii * 4),
934 ((char *) VALUE_CONTENTS (arg)) + argbytes,
935 len - argbytes);
936 ++argno;
937 ii += ((len - argbytes + 3) & -4) / 4;
938 }
c906108c 939
c5aa993b
JM
940 /* push the rest of the arguments into stack. */
941 for (; argno < nargs; ++argno)
942 {
c906108c 943
c5aa993b
JM
944 arg = args[argno];
945 type = check_typedef (VALUE_TYPE (arg));
946 len = TYPE_LENGTH (type);
c906108c
SS
947
948
c5aa993b
JM
949 /* float types should be passed in fpr's, as well as in the stack. */
950 if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13)
951 {
c906108c 952
c5aa993b
JM
953 if (len > 8)
954 printf_unfiltered (
955 "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
c906108c 956
c5aa993b
JM
957 memcpy (&registers[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)],
958 VALUE_CONTENTS (arg),
959 len);
960 ++f_argno;
961 }
c906108c 962
c5aa993b
JM
963 write_memory (sp + 24 + (ii * 4), (char *) VALUE_CONTENTS (arg), len);
964 ii += ((len + 3) & -4) / 4;
965 }
c906108c 966 }
c906108c
SS
967 else
968 /* Secure stack areas first, before doing anything else. */
969 write_register (SP_REGNUM, sp);
970
c906108c
SS
971 /* set back chain properly */
972 store_address (tmp_buffer, 4, saved_sp);
973 write_memory (sp, tmp_buffer, 4);
974
975 target_store_registers (-1);
976 return sp;
977}
c906108c
SS
978
979/* Function: ppc_push_return_address (pc, sp)
980 Set up the return address for the inferior function call. */
981
7a78ae4e
ND
982static CORE_ADDR
983ppc_push_return_address (CORE_ADDR pc, CORE_ADDR sp)
c906108c 984{
9aa1e687 985 write_register (PPC_LR_REGNUM, CALL_DUMMY_ADDRESS ());
c906108c
SS
986 return sp;
987}
988
7a78ae4e
ND
989/* Extract a function return value of type TYPE from raw register array
990 REGBUF, and copy that return value into VALBUF in virtual format. */
c906108c 991
7a78ae4e
ND
992static void
993rs6000_extract_return_value (struct type *valtype, char *regbuf, char *valbuf)
c906108c
SS
994{
995 int offset = 0;
996
c5aa993b
JM
997 if (TYPE_CODE (valtype) == TYPE_CODE_FLT)
998 {
c906108c 999
c5aa993b
JM
1000 double dd;
1001 float ff;
1002 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
1003 We need to truncate the return value into float size (4 byte) if
1004 necessary. */
c906108c 1005
c5aa993b
JM
1006 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
1007 memcpy (valbuf,
1008 &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)],
1009 TYPE_LENGTH (valtype));
1010 else
1011 { /* float */
1012 memcpy (&dd, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
1013 ff = (float) dd;
1014 memcpy (valbuf, &ff, sizeof (float));
1015 }
1016 }
1017 else
1018 {
1019 /* return value is copied starting from r3. */
1020 if (TARGET_BYTE_ORDER == BIG_ENDIAN
1021 && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3))
1022 offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype);
1023
1024 memcpy (valbuf,
1025 regbuf + REGISTER_BYTE (3) + offset,
c906108c 1026 TYPE_LENGTH (valtype));
c906108c 1027 }
c906108c
SS
1028}
1029
7a78ae4e 1030/* Keep structure return address in this variable.
c906108c
SS
1031 FIXME: This is a horrid kludge which should not be allowed to continue
1032 living. This only allows a single nested call to a structure-returning
1033 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
1034
7a78ae4e 1035static CORE_ADDR rs6000_struct_return_address;
c906108c
SS
1036
1037/* Indirect function calls use a piece of trampoline code to do context
1038 switching, i.e. to set the new TOC table. Skip such code if we are on
1039 its first instruction (as when we have single-stepped to here).
1040 Also skip shared library trampoline code (which is different from
1041 indirect function call trampolines).
1042 Result is desired PC to step until, or NULL if we are not in
1043 trampoline code. */
1044
1045CORE_ADDR
7a78ae4e 1046rs6000_skip_trampoline_code (CORE_ADDR pc)
c906108c
SS
1047{
1048 register unsigned int ii, op;
1049 CORE_ADDR solib_target_pc;
1050
c5aa993b
JM
1051 static unsigned trampoline_code[] =
1052 {
1053 0x800b0000, /* l r0,0x0(r11) */
1054 0x90410014, /* st r2,0x14(r1) */
1055 0x7c0903a6, /* mtctr r0 */
1056 0x804b0004, /* l r2,0x4(r11) */
1057 0x816b0008, /* l r11,0x8(r11) */
1058 0x4e800420, /* bctr */
1059 0x4e800020, /* br */
1060 0
c906108c
SS
1061 };
1062
1063 /* If pc is in a shared library trampoline, return its target. */
1064 solib_target_pc = find_solib_trampoline_target (pc);
1065 if (solib_target_pc)
1066 return solib_target_pc;
1067
c5aa993b
JM
1068 for (ii = 0; trampoline_code[ii]; ++ii)
1069 {
1070 op = read_memory_integer (pc + (ii * 4), 4);
1071 if (op != trampoline_code[ii])
1072 return 0;
1073 }
1074 ii = read_register (11); /* r11 holds destination addr */
7a78ae4e 1075 pc = read_memory_addr (ii, TDEP->wordsize); /* (r11) value */
c906108c
SS
1076 return pc;
1077}
1078
1079/* Determines whether the function FI has a frame on the stack or not. */
1080
9aa1e687 1081int
c877c8e6 1082rs6000_frameless_function_invocation (struct frame_info *fi)
c906108c
SS
1083{
1084 CORE_ADDR func_start;
1085 struct rs6000_framedata fdata;
1086
1087 /* Don't even think about framelessness except on the innermost frame
1088 or if the function was interrupted by a signal. */
1089 if (fi->next != NULL && !fi->next->signal_handler_caller)
1090 return 0;
c5aa993b 1091
c906108c
SS
1092 func_start = get_pc_function_start (fi->pc);
1093
1094 /* If we failed to find the start of the function, it is a mistake
1095 to inspect the instructions. */
1096
1097 if (!func_start)
1098 {
1099 /* A frame with a zero PC is usually created by dereferencing a NULL
c5aa993b
JM
1100 function pointer, normally causing an immediate core dump of the
1101 inferior. Mark function as frameless, as the inferior has no chance
1102 of setting up a stack frame. */
c906108c
SS
1103 if (fi->pc == 0)
1104 return 1;
1105 else
1106 return 0;
1107 }
1108
077276e8 1109 (void) skip_prologue (func_start, fi->pc, &fdata);
c906108c
SS
1110 return fdata.frameless;
1111}
1112
1113/* Return the PC saved in a frame */
1114
9aa1e687 1115CORE_ADDR
c877c8e6 1116rs6000_frame_saved_pc (struct frame_info *fi)
c906108c
SS
1117{
1118 CORE_ADDR func_start;
1119 struct rs6000_framedata fdata;
7a78ae4e 1120 int wordsize = TDEP->wordsize;
c906108c
SS
1121
1122 if (fi->signal_handler_caller)
7a78ae4e 1123 return read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET, wordsize);
c906108c 1124
7a78ae4e
ND
1125 if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame))
1126 return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM);
c906108c
SS
1127
1128 func_start = get_pc_function_start (fi->pc);
1129
1130 /* If we failed to find the start of the function, it is a mistake
1131 to inspect the instructions. */
1132 if (!func_start)
1133 return 0;
1134
077276e8 1135 (void) skip_prologue (func_start, fi->pc, &fdata);
c906108c
SS
1136
1137 if (fdata.lr_offset == 0 && fi->next != NULL)
1138 {
1139 if (fi->next->signal_handler_caller)
7a78ae4e
ND
1140 return read_memory_addr (fi->next->frame + SIG_FRAME_LR_OFFSET,
1141 wordsize);
c906108c 1142 else
7a78ae4e
ND
1143 return read_memory_addr (FRAME_CHAIN (fi) + DEFAULT_LR_SAVE,
1144 wordsize);
c906108c
SS
1145 }
1146
1147 if (fdata.lr_offset == 0)
9aa1e687 1148 return read_register (PPC_LR_REGNUM);
c906108c 1149
7a78ae4e 1150 return read_memory_addr (FRAME_CHAIN (fi) + fdata.lr_offset, wordsize);
c906108c
SS
1151}
1152
1153/* If saved registers of frame FI are not known yet, read and cache them.
1154 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
1155 in which case the framedata are read. */
1156
1157static void
7a78ae4e 1158frame_get_saved_regs (struct frame_info *fi, struct rs6000_framedata *fdatap)
c906108c 1159{
c5aa993b 1160 CORE_ADDR frame_addr;
c906108c 1161 struct rs6000_framedata work_fdata;
7a78ae4e 1162 int wordsize = TDEP->wordsize;
c906108c
SS
1163
1164 if (fi->saved_regs)
1165 return;
c5aa993b 1166
c906108c
SS
1167 if (fdatap == NULL)
1168 {
1169 fdatap = &work_fdata;
077276e8 1170 (void) skip_prologue (get_pc_function_start (fi->pc), fi->pc, fdatap);
c906108c
SS
1171 }
1172
1173 frame_saved_regs_zalloc (fi);
1174
1175 /* If there were any saved registers, figure out parent's stack
1176 pointer. */
1177 /* The following is true only if the frame doesn't have a call to
1178 alloca(), FIXME. */
1179
1180 if (fdatap->saved_fpr == 0 && fdatap->saved_gpr == 0
1181 && fdatap->lr_offset == 0 && fdatap->cr_offset == 0)
1182 frame_addr = 0;
1183 else if (fi->prev && fi->prev->frame)
1184 frame_addr = fi->prev->frame;
1185 else
7a78ae4e 1186 frame_addr = read_memory_addr (fi->frame, wordsize);
c5aa993b 1187
c906108c
SS
1188 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1189 All fpr's from saved_fpr to fp31 are saved. */
1190
1191 if (fdatap->saved_fpr >= 0)
1192 {
1193 int i;
7a78ae4e 1194 CORE_ADDR fpr_addr = frame_addr + fdatap->fpr_offset;
c906108c
SS
1195 for (i = fdatap->saved_fpr; i < 32; i++)
1196 {
7a78ae4e
ND
1197 fi->saved_regs[FP0_REGNUM + i] = fpr_addr;
1198 fpr_addr += 8;
c906108c
SS
1199 }
1200 }
1201
1202 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1203 All gpr's from saved_gpr to gpr31 are saved. */
1204
1205 if (fdatap->saved_gpr >= 0)
1206 {
1207 int i;
7a78ae4e 1208 CORE_ADDR gpr_addr = frame_addr + fdatap->gpr_offset;
c906108c
SS
1209 for (i = fdatap->saved_gpr; i < 32; i++)
1210 {
7a78ae4e
ND
1211 fi->saved_regs[i] = gpr_addr;
1212 gpr_addr += wordsize;
c906108c
SS
1213 }
1214 }
1215
1216 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1217 the CR. */
1218 if (fdatap->cr_offset != 0)
9aa1e687 1219 fi->saved_regs[PPC_CR_REGNUM] = frame_addr + fdatap->cr_offset;
c906108c
SS
1220
1221 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1222 the LR. */
1223 if (fdatap->lr_offset != 0)
9aa1e687 1224 fi->saved_regs[PPC_LR_REGNUM] = frame_addr + fdatap->lr_offset;
c906108c
SS
1225}
1226
1227/* Return the address of a frame. This is the inital %sp value when the frame
1228 was first allocated. For functions calling alloca(), it might be saved in
1229 an alloca register. */
1230
1231static CORE_ADDR
7a78ae4e 1232frame_initial_stack_address (struct frame_info *fi)
c906108c
SS
1233{
1234 CORE_ADDR tmpaddr;
1235 struct rs6000_framedata fdata;
1236 struct frame_info *callee_fi;
1237
1238 /* if the initial stack pointer (frame address) of this frame is known,
1239 just return it. */
1240
1241 if (fi->extra_info->initial_sp)
1242 return fi->extra_info->initial_sp;
1243
1244 /* find out if this function is using an alloca register.. */
1245
077276e8 1246 (void) skip_prologue (get_pc_function_start (fi->pc), fi->pc, &fdata);
c906108c
SS
1247
1248 /* if saved registers of this frame are not known yet, read and cache them. */
1249
1250 if (!fi->saved_regs)
1251 frame_get_saved_regs (fi, &fdata);
1252
1253 /* If no alloca register used, then fi->frame is the value of the %sp for
1254 this frame, and it is good enough. */
1255
1256 if (fdata.alloca_reg < 0)
1257 {
1258 fi->extra_info->initial_sp = fi->frame;
1259 return fi->extra_info->initial_sp;
1260 }
1261
1262 /* This function has an alloca register. If this is the top-most frame
1263 (with the lowest address), the value in alloca register is good. */
1264
1265 if (!fi->next)
c5aa993b 1266 return fi->extra_info->initial_sp = read_register (fdata.alloca_reg);
c906108c
SS
1267
1268 /* Otherwise, this is a caller frame. Callee has usually already saved
1269 registers, but there are exceptions (such as when the callee
1270 has no parameters). Find the address in which caller's alloca
1271 register is saved. */
1272
c5aa993b
JM
1273 for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next)
1274 {
c906108c 1275
c5aa993b
JM
1276 if (!callee_fi->saved_regs)
1277 frame_get_saved_regs (callee_fi, NULL);
c906108c 1278
c5aa993b 1279 /* this is the address in which alloca register is saved. */
c906108c 1280
c5aa993b
JM
1281 tmpaddr = callee_fi->saved_regs[fdata.alloca_reg];
1282 if (tmpaddr)
1283 {
7a78ae4e
ND
1284 fi->extra_info->initial_sp =
1285 read_memory_addr (tmpaddr, TDEP->wordsize);
c5aa993b
JM
1286 return fi->extra_info->initial_sp;
1287 }
c906108c 1288
c5aa993b
JM
1289 /* Go look into deeper levels of the frame chain to see if any one of
1290 the callees has saved alloca register. */
1291 }
c906108c
SS
1292
1293 /* If alloca register was not saved, by the callee (or any of its callees)
1294 then the value in the register is still good. */
1295
1296 fi->extra_info->initial_sp = read_register (fdata.alloca_reg);
1297 return fi->extra_info->initial_sp;
1298}
1299
7a78ae4e
ND
1300/* Describe the pointer in each stack frame to the previous stack frame
1301 (its caller). */
1302
1303/* FRAME_CHAIN takes a frame's nominal address
1304 and produces the frame's chain-pointer. */
1305
1306/* In the case of the RS/6000, the frame's nominal address
1307 is the address of a 4-byte word containing the calling frame's address. */
1308
9aa1e687 1309CORE_ADDR
7a78ae4e 1310rs6000_frame_chain (struct frame_info *thisframe)
c906108c 1311{
7a78ae4e
ND
1312 CORE_ADDR fp, fpp, lr;
1313 int wordsize = TDEP->wordsize;
c906108c 1314
7a78ae4e
ND
1315 if (PC_IN_CALL_DUMMY (thisframe->pc, thisframe->frame, thisframe->frame))
1316 return thisframe->frame; /* dummy frame same as caller's frame */
c906108c 1317
c5aa993b 1318 if (inside_entry_file (thisframe->pc) ||
c906108c
SS
1319 thisframe->pc == entry_point_address ())
1320 return 0;
1321
1322 if (thisframe->signal_handler_caller)
7a78ae4e
ND
1323 fp = read_memory_addr (thisframe->frame + SIG_FRAME_FP_OFFSET,
1324 wordsize);
c906108c
SS
1325 else if (thisframe->next != NULL
1326 && thisframe->next->signal_handler_caller
c877c8e6 1327 && FRAMELESS_FUNCTION_INVOCATION (thisframe))
c906108c
SS
1328 /* A frameless function interrupted by a signal did not change the
1329 frame pointer. */
1330 fp = FRAME_FP (thisframe);
1331 else
7a78ae4e 1332 fp = read_memory_addr ((thisframe)->frame, wordsize);
c906108c 1333
9aa1e687 1334 lr = read_register (PPC_LR_REGNUM);
7a78ae4e
ND
1335 if (lr == entry_point_address ())
1336 if (fp != 0 && (fpp = read_memory_addr (fp, wordsize)) != 0)
1337 if (PC_IN_CALL_DUMMY (lr, fpp, fpp))
1338 return fpp;
1339
1340 return fp;
1341}
1342
1343/* Return the size of register REG when words are WORDSIZE bytes long. If REG
1344 isn't available with that word size, return 0. */
1345
1346static int
1347regsize (const struct reg *reg, int wordsize)
1348{
1349 return wordsize == 8 ? reg->sz64 : reg->sz32;
1350}
1351
1352/* Return the name of register number N, or null if no such register exists
1353 in the current architecture. */
1354
1355static char *
1356rs6000_register_name (int n)
1357{
1358 struct gdbarch_tdep *tdep = TDEP;
1359 const struct reg *reg = tdep->regs + n;
1360
1361 if (!regsize (reg, tdep->wordsize))
1362 return NULL;
1363 return reg->name;
1364}
1365
1366/* Index within `registers' of the first byte of the space for
1367 register N. */
1368
1369static int
1370rs6000_register_byte (int n)
1371{
1372 return TDEP->regoff[n];
1373}
1374
1375/* Return the number of bytes of storage in the actual machine representation
1376 for register N if that register is available, else return 0. */
1377
1378static int
1379rs6000_register_raw_size (int n)
1380{
1381 struct gdbarch_tdep *tdep = TDEP;
1382 const struct reg *reg = tdep->regs + n;
1383 return regsize (reg, tdep->wordsize);
1384}
1385
1386/* Number of bytes of storage in the program's representation
1387 for register N. */
1388
1389static int
1390rs6000_register_virtual_size (int n)
1391{
1392 return TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (n));
1393}
1394
1395/* Return the GDB type object for the "standard" data type
1396 of data in register N. */
1397
1398static struct type *
fba45db2 1399rs6000_register_virtual_type (int n)
7a78ae4e
ND
1400{
1401 struct gdbarch_tdep *tdep = TDEP;
1402 const struct reg *reg = tdep->regs + n;
1403
1404 return reg->fpr ? builtin_type_double :
1405 regsize (reg, tdep->wordsize) == 8 ? builtin_type_int64 :
1406 builtin_type_int32;
1407}
1408
1409/* For the PowerPC, it appears that the debug info marks float parameters as
1410 floats regardless of whether the function is prototyped, but the actual
1411 values are always passed in as doubles. Tell gdb to always assume that
1412 floats are passed as doubles and then converted in the callee. */
1413
1414static int
1415rs6000_coerce_float_to_double (struct type *formal, struct type *actual)
1416{
1417 return 1;
1418}
1419
1420/* Return whether register N requires conversion when moving from raw format
1421 to virtual format.
1422
1423 The register format for RS/6000 floating point registers is always
1424 double, we need a conversion if the memory format is float. */
1425
1426static int
1427rs6000_register_convertible (int n)
1428{
1429 const struct reg *reg = TDEP->regs + n;
1430 return reg->fpr;
1431}
1432
1433/* Convert data from raw format for register N in buffer FROM
1434 to virtual format with type TYPE in buffer TO. */
1435
1436static void
1437rs6000_register_convert_to_virtual (int n, struct type *type,
1438 char *from, char *to)
1439{
1440 if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n))
7a292a7a 1441 {
7a78ae4e
ND
1442 double val = extract_floating (from, REGISTER_RAW_SIZE (n));
1443 store_floating (to, TYPE_LENGTH (type), val);
1444 }
1445 else
1446 memcpy (to, from, REGISTER_RAW_SIZE (n));
1447}
1448
1449/* Convert data from virtual format with type TYPE in buffer FROM
1450 to raw format for register N in buffer TO. */
7a292a7a 1451
7a78ae4e
ND
1452static void
1453rs6000_register_convert_to_raw (struct type *type, int n,
1454 char *from, char *to)
1455{
1456 if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n))
1457 {
1458 double val = extract_floating (from, TYPE_LENGTH (type));
1459 store_floating (to, REGISTER_RAW_SIZE (n), val);
7a292a7a 1460 }
7a78ae4e
ND
1461 else
1462 memcpy (to, from, REGISTER_RAW_SIZE (n));
1463}
c906108c 1464
7a78ae4e
ND
1465/* Store the address of the place in which to copy the structure the
1466 subroutine will return. This is called from call_function.
1467
1468 In RS/6000, struct return addresses are passed as an extra parameter in r3.
1469 In function return, callee is not responsible of returning this address
1470 back. Since gdb needs to find it, we will store in a designated variable
1471 `rs6000_struct_return_address'. */
1472
1473static void
1474rs6000_store_struct_return (CORE_ADDR addr, CORE_ADDR sp)
1475{
1476 write_register (3, addr);
1477 rs6000_struct_return_address = addr;
1478}
1479
1480/* Write into appropriate registers a function return value
1481 of type TYPE, given in virtual format. */
1482
1483static void
1484rs6000_store_return_value (struct type *type, char *valbuf)
1485{
1486 if (TYPE_CODE (type) == TYPE_CODE_FLT)
1487
1488 /* Floating point values are returned starting from FPR1 and up.
1489 Say a double_double_double type could be returned in
1490 FPR1/FPR2/FPR3 triple. */
1491
1492 write_register_bytes (REGISTER_BYTE (FP0_REGNUM + 1), valbuf,
1493 TYPE_LENGTH (type));
1494 else
1495 /* Everything else is returned in GPR3 and up. */
9aa1e687 1496 write_register_bytes (REGISTER_BYTE (PPC_GP0_REGNUM + 3), valbuf,
7a78ae4e
ND
1497 TYPE_LENGTH (type));
1498}
1499
1500/* Extract from an array REGBUF containing the (raw) register state
1501 the address in which a function should return its structure value,
1502 as a CORE_ADDR (or an expression that can be used as one). */
1503
1504static CORE_ADDR
1505rs6000_extract_struct_value_address (char *regbuf)
1506{
1507 return rs6000_struct_return_address;
1508}
1509
1510/* Return whether PC is in a dummy function call.
1511
1512 FIXME: This just checks for the end of the stack, which is broken
1513 for things like stepping through gcc nested function stubs. */
1514
1515static int
1516rs6000_pc_in_call_dummy (CORE_ADDR pc, CORE_ADDR sp, CORE_ADDR fp)
1517{
1518 return sp < pc && pc < fp;
1519}
1520
1521/* Hook called when a new child process is started. */
1522
1523void
1524rs6000_create_inferior (int pid)
1525{
1526 if (rs6000_set_host_arch_hook)
1527 rs6000_set_host_arch_hook (pid);
c906108c
SS
1528}
1529\f
7a78ae4e
ND
1530/* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR).
1531
1532 Usually a function pointer's representation is simply the address
1533 of the function. On the RS/6000 however, a function pointer is
1534 represented by a pointer to a TOC entry. This TOC entry contains
1535 three words, the first word is the address of the function, the
1536 second word is the TOC pointer (r2), and the third word is the
1537 static chain value. Throughout GDB it is currently assumed that a
1538 function pointer contains the address of the function, which is not
1539 easy to fix. In addition, the conversion of a function address to
1540 a function pointer would require allocation of a TOC entry in the
1541 inferior's memory space, with all its drawbacks. To be able to
1542 call C++ virtual methods in the inferior (which are called via
f517ea4e 1543 function pointers), find_function_addr uses this function to get the
7a78ae4e
ND
1544 function address from a function pointer. */
1545
f517ea4e
PS
1546/* Return real function address if ADDR (a function pointer) is in the data
1547 space and is therefore a special function pointer. */
c906108c 1548
7a78ae4e
ND
1549CORE_ADDR
1550rs6000_convert_from_func_ptr_addr (CORE_ADDR addr)
c906108c
SS
1551{
1552 struct obj_section *s;
1553
1554 s = find_pc_section (addr);
1555 if (s && s->the_bfd_section->flags & SEC_CODE)
7a78ae4e 1556 return addr;
c906108c 1557
7a78ae4e
ND
1558 /* ADDR is in the data space, so it's a special function pointer. */
1559 return read_memory_addr (addr, TDEP->wordsize);
c906108c 1560}
c906108c 1561\f
c5aa993b 1562
7a78ae4e 1563/* Handling the various POWER/PowerPC variants. */
c906108c
SS
1564
1565
7a78ae4e
ND
1566/* The arrays here called registers_MUMBLE hold information about available
1567 registers.
c906108c
SS
1568
1569 For each family of PPC variants, I've tried to isolate out the
1570 common registers and put them up front, so that as long as you get
1571 the general family right, GDB will correctly identify the registers
1572 common to that family. The common register sets are:
1573
1574 For the 60x family: hid0 hid1 iabr dabr pir
1575
1576 For the 505 and 860 family: eie eid nri
1577
1578 For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi
c5aa993b
JM
1579 tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1
1580 pbu1 pbl2 pbu2
c906108c
SS
1581
1582 Most of these register groups aren't anything formal. I arrived at
1583 them by looking at the registers that occurred in more than one
7a78ae4e
ND
1584 processor. */
1585
1586/* Convenience macros for populating register arrays. */
1587
1588/* Within another macro, convert S to a string. */
1589
1590#define STR(s) #s
1591
1592/* Return a struct reg defining register NAME that's 32 bits on 32-bit systems
1593 and 64 bits on 64-bit systems. */
1594#define R(name) { STR(name), 4, 8, 0 }
1595
1596/* Return a struct reg defining register NAME that's 32 bits on all
1597 systems. */
1598#define R4(name) { STR(name), 4, 4, 0 }
1599
1600/* Return a struct reg defining register NAME that's 64 bits on all
1601 systems. */
1602#define R8(name) { STR(name), 8, 8, 0 }
1603
1604/* Return a struct reg defining floating-point register NAME. */
1605#define F(name) { STR(name), 8, 8, 1 }
1606
1607/* Return a struct reg defining register NAME that's 32 bits on 32-bit
1608 systems and that doesn't exist on 64-bit systems. */
1609#define R32(name) { STR(name), 4, 0, 0 }
1610
1611/* Return a struct reg defining register NAME that's 64 bits on 64-bit
1612 systems and that doesn't exist on 32-bit systems. */
1613#define R64(name) { STR(name), 0, 8, 0 }
1614
1615/* Return a struct reg placeholder for a register that doesn't exist. */
1616#define R0 { 0, 0, 0, 0 }
1617
1618/* UISA registers common across all architectures, including POWER. */
1619
1620#define COMMON_UISA_REGS \
1621 /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \
1622 /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \
1623 /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \
1624 /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \
1625 /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \
1626 /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \
1627 /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \
1628 /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \
1629 /* 64 */ R(pc), R(ps)
1630
1631/* UISA-level SPRs for PowerPC. */
1632#define PPC_UISA_SPRS \
1633 /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R0
1634
1635/* Segment registers, for PowerPC. */
1636#define PPC_SEGMENT_REGS \
1637 /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \
1638 /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \
1639 /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \
1640 /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15)
1641
1642/* OEA SPRs for PowerPC. */
1643#define PPC_OEA_SPRS \
1644 /* 87 */ R4(pvr), \
1645 /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \
1646 /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \
1647 /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \
1648 /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \
1649 /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \
1650 /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \
1651 /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \
1652 /* 116 */ R4(dec), R(dabr), R4(ear)
1653
1654/* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover
1655 user-level SPR's. */
1656static const struct reg registers_power[] =
c906108c 1657{
7a78ae4e
ND
1658 COMMON_UISA_REGS,
1659 /* 66 */ R4(cnd), R(lr), R(cnt), R4(xer), R4(mq)
c906108c
SS
1660};
1661
7a78ae4e
ND
1662/* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only
1663 view of the PowerPC. */
1664static const struct reg registers_powerpc[] =
c906108c 1665{
7a78ae4e
ND
1666 COMMON_UISA_REGS,
1667 PPC_UISA_SPRS
c906108c
SS
1668};
1669
7a78ae4e
ND
1670/* IBM PowerPC 403. */
1671static const struct reg registers_403[] =
c5aa993b 1672{
7a78ae4e
ND
1673 COMMON_UISA_REGS,
1674 PPC_UISA_SPRS,
1675 PPC_SEGMENT_REGS,
1676 PPC_OEA_SPRS,
1677 /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr),
1678 /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit),
1679 /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3),
1680 /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2),
1681 /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr),
1682 /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2)
c906108c
SS
1683};
1684
7a78ae4e
ND
1685/* IBM PowerPC 403GC. */
1686static const struct reg registers_403GC[] =
c5aa993b 1687{
7a78ae4e
ND
1688 COMMON_UISA_REGS,
1689 PPC_UISA_SPRS,
1690 PPC_SEGMENT_REGS,
1691 PPC_OEA_SPRS,
1692 /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr),
1693 /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit),
1694 /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3),
1695 /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2),
1696 /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr),
1697 /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2),
1698 /* 143 */ R(zpr), R(pid), R(sgr), R(dcwr),
1699 /* 147 */ R(tbhu), R(tblu)
c906108c
SS
1700};
1701
7a78ae4e
ND
1702/* Motorola PowerPC 505. */
1703static const struct reg registers_505[] =
c5aa993b 1704{
7a78ae4e
ND
1705 COMMON_UISA_REGS,
1706 PPC_UISA_SPRS,
1707 PPC_SEGMENT_REGS,
1708 PPC_OEA_SPRS,
1709 /* 119 */ R(eie), R(eid), R(nri)
c906108c
SS
1710};
1711
7a78ae4e
ND
1712/* Motorola PowerPC 860 or 850. */
1713static const struct reg registers_860[] =
c5aa993b 1714{
7a78ae4e
ND
1715 COMMON_UISA_REGS,
1716 PPC_UISA_SPRS,
1717 PPC_SEGMENT_REGS,
1718 PPC_OEA_SPRS,
1719 /* 119 */ R(eie), R(eid), R(nri), R(cmpa),
1720 /* 123 */ R(cmpb), R(cmpc), R(cmpd), R(icr),
1721 /* 127 */ R(der), R(counta), R(countb), R(cmpe),
1722 /* 131 */ R(cmpf), R(cmpg), R(cmph), R(lctrl1),
1723 /* 135 */ R(lctrl2), R(ictrl), R(bar), R(ic_cst),
1724 /* 139 */ R(ic_adr), R(ic_dat), R(dc_cst), R(dc_adr),
1725 /* 143 */ R(dc_dat), R(dpdr), R(dpir), R(immr),
1726 /* 147 */ R(mi_ctr), R(mi_ap), R(mi_epn), R(mi_twc),
1727 /* 151 */ R(mi_rpn), R(md_ctr), R(m_casid), R(md_ap),
1728 /* 155 */ R(md_epn), R(md_twb), R(md_twc), R(md_rpn),
1729 /* 159 */ R(m_tw), R(mi_dbcam), R(mi_dbram0), R(mi_dbram1),
1730 /* 163 */ R(md_dbcam), R(md_dbram0), R(md_dbram1)
c906108c
SS
1731};
1732
7a78ae4e
ND
1733/* Motorola PowerPC 601. Note that the 601 has different register numbers
1734 for reading and writing RTCU and RTCL. However, how one reads and writes a
c906108c 1735 register is the stub's problem. */
7a78ae4e 1736static const struct reg registers_601[] =
c5aa993b 1737{
7a78ae4e
ND
1738 COMMON_UISA_REGS,
1739 PPC_UISA_SPRS,
1740 PPC_SEGMENT_REGS,
1741 PPC_OEA_SPRS,
1742 /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
1743 /* 123 */ R(pir), R(mq), R(rtcu), R(rtcl)
c906108c
SS
1744};
1745
7a78ae4e
ND
1746/* Motorola PowerPC 602. */
1747static const struct reg registers_602[] =
c5aa993b 1748{
7a78ae4e
ND
1749 COMMON_UISA_REGS,
1750 PPC_UISA_SPRS,
1751 PPC_SEGMENT_REGS,
1752 PPC_OEA_SPRS,
1753 /* 119 */ R(hid0), R(hid1), R(iabr), R0,
1754 /* 123 */ R0, R(tcr), R(ibr), R(esassr),
1755 /* 127 */ R(sebr), R(ser), R(sp), R(lt)
c906108c
SS
1756};
1757
7a78ae4e
ND
1758/* Motorola/IBM PowerPC 603 or 603e. */
1759static const struct reg registers_603[] =
c5aa993b 1760{
7a78ae4e
ND
1761 COMMON_UISA_REGS,
1762 PPC_UISA_SPRS,
1763 PPC_SEGMENT_REGS,
1764 PPC_OEA_SPRS,
1765 /* 119 */ R(hid0), R(hid1), R(iabr), R0,
1766 /* 123 */ R0, R(dmiss), R(dcmp), R(hash1),
1767 /* 127 */ R(hash2), R(imiss), R(icmp), R(rpa)
c906108c
SS
1768};
1769
7a78ae4e
ND
1770/* Motorola PowerPC 604 or 604e. */
1771static const struct reg registers_604[] =
c5aa993b 1772{
7a78ae4e
ND
1773 COMMON_UISA_REGS,
1774 PPC_UISA_SPRS,
1775 PPC_SEGMENT_REGS,
1776 PPC_OEA_SPRS,
1777 /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
1778 /* 123 */ R(pir), R(mmcr0), R(pmc1), R(pmc2),
1779 /* 127 */ R(sia), R(sda)
c906108c
SS
1780};
1781
7a78ae4e
ND
1782/* Motorola/IBM PowerPC 750 or 740. */
1783static const struct reg registers_750[] =
c5aa993b 1784{
7a78ae4e
ND
1785 COMMON_UISA_REGS,
1786 PPC_UISA_SPRS,
1787 PPC_SEGMENT_REGS,
1788 PPC_OEA_SPRS,
1789 /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr),
1790 /* 123 */ R0, R(ummcr0), R(upmc1), R(upmc2),
1791 /* 127 */ R(usia), R(ummcr1), R(upmc3), R(upmc4),
1792 /* 131 */ R(mmcr0), R(pmc1), R(pmc2), R(sia),
1793 /* 135 */ R(mmcr1), R(pmc3), R(pmc4), R(l2cr),
1794 /* 139 */ R(ictc), R(thrm1), R(thrm2), R(thrm3)
c906108c
SS
1795};
1796
1797
1798/* Information about a particular processor variant. */
7a78ae4e 1799
c906108c 1800struct variant
c5aa993b
JM
1801 {
1802 /* Name of this variant. */
1803 char *name;
c906108c 1804
c5aa993b
JM
1805 /* English description of the variant. */
1806 char *description;
c906108c 1807
7a78ae4e
ND
1808 /* bfd_arch_info.arch corresponding to variant. */
1809 enum bfd_architecture arch;
1810
1811 /* bfd_arch_info.mach corresponding to variant. */
1812 unsigned long mach;
1813
c5aa993b
JM
1814 /* Table of register names; registers[R] is the name of the register
1815 number R. */
7a78ae4e
ND
1816 int nregs;
1817 const struct reg *regs;
c5aa993b 1818 };
c906108c
SS
1819
1820#define num_registers(list) (sizeof (list) / sizeof((list)[0]))
1821
1822
1823/* Information in this table comes from the following web sites:
1824 IBM: http://www.chips.ibm.com:80/products/embedded/
1825 Motorola: http://www.mot.com/SPS/PowerPC/
1826
1827 I'm sure I've got some of the variant descriptions not quite right.
1828 Please report any inaccuracies you find to GDB's maintainer.
1829
1830 If you add entries to this table, please be sure to allow the new
1831 value as an argument to the --with-cpu flag, in configure.in. */
1832
7a78ae4e 1833static const struct variant variants[] =
c906108c 1834{
7a78ae4e
ND
1835 {"powerpc", "PowerPC user-level", bfd_arch_powerpc,
1836 bfd_mach_ppc, num_registers (registers_powerpc), registers_powerpc},
1837 {"power", "POWER user-level", bfd_arch_rs6000,
1838 bfd_mach_rs6k, num_registers (registers_power), registers_power},
1839 {"403", "IBM PowerPC 403", bfd_arch_powerpc,
1840 bfd_mach_ppc_403, num_registers (registers_403), registers_403},
1841 {"601", "Motorola PowerPC 601", bfd_arch_powerpc,
1842 bfd_mach_ppc_601, num_registers (registers_601), registers_601},
1843 {"602", "Motorola PowerPC 602", bfd_arch_powerpc,
1844 bfd_mach_ppc_602, num_registers (registers_602), registers_602},
1845 {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc,
1846 bfd_mach_ppc_603, num_registers (registers_603), registers_603},
1847 {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc,
1848 604, num_registers (registers_604), registers_604},
1849 {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc,
1850 bfd_mach_ppc_403gc, num_registers (registers_403GC), registers_403GC},
1851 {"505", "Motorola PowerPC 505", bfd_arch_powerpc,
1852 bfd_mach_ppc_505, num_registers (registers_505), registers_505},
1853 {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc,
1854 bfd_mach_ppc_860, num_registers (registers_860), registers_860},
1855 {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc,
1856 bfd_mach_ppc_750, num_registers (registers_750), registers_750},
1857
1858 /* FIXME: I haven't checked the register sets of the following. */
1859 {"620", "Motorola PowerPC 620", bfd_arch_powerpc,
1860 bfd_mach_ppc_620, num_registers (registers_powerpc), registers_powerpc},
1861 {"a35", "PowerPC A35", bfd_arch_powerpc,
1862 bfd_mach_ppc_a35, num_registers (registers_powerpc), registers_powerpc},
1863 {"rs1", "IBM POWER RS1", bfd_arch_rs6000,
1864 bfd_mach_rs6k_rs1, num_registers (registers_power), registers_power},
1865 {"rsc", "IBM POWER RSC", bfd_arch_rs6000,
1866 bfd_mach_rs6k_rsc, num_registers (registers_power), registers_power},
1867 {"rs2", "IBM POWER RS2", bfd_arch_rs6000,
1868 bfd_mach_rs6k_rs2, num_registers (registers_power), registers_power},
1869
c5aa993b 1870 {0, 0, 0, 0}
c906108c
SS
1871};
1872
7a78ae4e 1873#undef num_registers
c906108c 1874
7a78ae4e
ND
1875/* Look up the variant named NAME in the `variants' table. Return a
1876 pointer to the struct variant, or null if we couldn't find it. */
c906108c 1877
7a78ae4e
ND
1878static const struct variant *
1879find_variant_by_name (char *name)
c906108c 1880{
7a78ae4e 1881 const struct variant *v;
c906108c 1882
7a78ae4e
ND
1883 for (v = variants; v->name; v++)
1884 if (!strcmp (name, v->name))
1885 return v;
c906108c 1886
7a78ae4e 1887 return NULL;
c906108c
SS
1888}
1889
7a78ae4e
ND
1890/* Return the variant corresponding to architecture ARCH and machine number
1891 MACH. If no such variant exists, return null. */
c906108c 1892
7a78ae4e
ND
1893static const struct variant *
1894find_variant_by_arch (enum bfd_architecture arch, unsigned long mach)
c906108c 1895{
7a78ae4e 1896 const struct variant *v;
c5aa993b 1897
7a78ae4e
ND
1898 for (v = variants; v->name; v++)
1899 if (arch == v->arch && mach == v->mach)
1900 return v;
c906108c 1901
7a78ae4e 1902 return NULL;
c906108c
SS
1903}
1904
9aa1e687
KB
1905
1906
1907\f
1908static void
1909process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj)
1910{
1911 int *os_ident_ptr = obj;
1912 const char *name;
1913 unsigned int sectsize;
1914
1915 name = bfd_get_section_name (abfd, sect);
1916 sectsize = bfd_section_size (abfd, sect);
1917 if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0)
1918 {
1919 unsigned int name_length, data_length, note_type;
1920 char *note = alloca (sectsize);
1921
1922 bfd_get_section_contents (abfd, sect, note,
1923 (file_ptr) 0, (bfd_size_type) sectsize);
1924
1925 name_length = bfd_h_get_32 (abfd, note);
1926 data_length = bfd_h_get_32 (abfd, note + 4);
1927 note_type = bfd_h_get_32 (abfd, note + 8);
1928
1929 if (name_length == 4 && data_length == 16 && note_type == 1
1930 && strcmp (note + 12, "GNU") == 0)
1931 {
1932 int os_number = bfd_h_get_32 (abfd, note + 16);
1933
1934 /* The case numbers are from abi-tags in glibc */
1935 switch (os_number)
1936 {
1937 case 0 :
1938 *os_ident_ptr = ELFOSABI_LINUX;
1939 break;
1940 case 1 :
1941 *os_ident_ptr = ELFOSABI_HURD;
1942 break;
1943 case 2 :
1944 *os_ident_ptr = ELFOSABI_SOLARIS;
1945 break;
1946 default :
1947 internal_error (
1948 "process_note_abi_sections: unknown OS number %d", os_number);
1949 break;
1950 }
1951 }
1952 }
1953}
1954
1955/* Return one of the ELFOSABI_ constants for BFDs representing ELF
1956 executables. If it's not an ELF executable or if the OS/ABI couldn't
1957 be determined, simply return -1. */
1958
1959static int
1960get_elfosabi (bfd *abfd)
1961{
1962 int elfosabi = -1;
1963
1964 if (abfd != NULL && bfd_get_flavour (abfd) == bfd_target_elf_flavour)
1965 {
1966 elfosabi = elf_elfheader (abfd)->e_ident[EI_OSABI];
1967
1968 /* When elfosabi is 0 (ELFOSABI_NONE), this is supposed to indicate
1969 that we're on a SYSV system. However, GNU/Linux uses a note section
1970 to record OS/ABI info, but leaves e_ident[EI_OSABI] zero. So we
1971 have to check the note sections too. */
1972 if (elfosabi == 0)
1973 {
1974 bfd_map_over_sections (abfd,
1975 process_note_abi_tag_sections,
1976 &elfosabi);
1977 }
1978 }
1979
1980 return elfosabi;
1981}
1982
7a78ae4e 1983\f
c906108c 1984
7a78ae4e
ND
1985/* Initialize the current architecture based on INFO. If possible, re-use an
1986 architecture from ARCHES, which is a list of architectures already created
1987 during this debugging session.
c906108c 1988
7a78ae4e
ND
1989 Called e.g. at program startup, when reading a core file, and when reading
1990 a binary file. */
c906108c 1991
7a78ae4e
ND
1992static struct gdbarch *
1993rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
1994{
1995 struct gdbarch *gdbarch;
1996 struct gdbarch_tdep *tdep;
9aa1e687 1997 int wordsize, from_xcoff_exec, from_elf_exec, power, i, off;
7a78ae4e
ND
1998 struct reg *regs;
1999 const struct variant *v;
2000 enum bfd_architecture arch;
2001 unsigned long mach;
2002 bfd abfd;
9aa1e687 2003 int osabi, sysv_abi;
7a78ae4e 2004
9aa1e687 2005 from_xcoff_exec = info.abfd && info.abfd->format == bfd_object &&
7a78ae4e
ND
2006 bfd_get_flavour (info.abfd) == bfd_target_xcoff_flavour;
2007
9aa1e687
KB
2008 from_elf_exec = info.abfd && info.abfd->format == bfd_object &&
2009 bfd_get_flavour (info.abfd) == bfd_target_elf_flavour;
2010
2011 sysv_abi = info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour;
2012
2013 osabi = get_elfosabi (info.abfd);
2014
7a78ae4e
ND
2015 /* Check word size. If INFO is from a binary file, infer it from that,
2016 else use the previously-inferred size. */
9aa1e687 2017 if (from_xcoff_exec)
c906108c 2018 {
7a78ae4e
ND
2019 if (xcoff_data (info.abfd)->xcoff64)
2020 wordsize = 8;
2021 else
2022 wordsize = 4;
c906108c 2023 }
9aa1e687
KB
2024 else if (from_elf_exec)
2025 {
2026 if (elf_elfheader (info.abfd)->e_ident[EI_CLASS] == ELFCLASS64)
2027 wordsize = 8;
2028 else
2029 wordsize = 4;
2030 }
c906108c 2031 else
7a78ae4e
ND
2032 {
2033 tdep = TDEP;
2034 if (tdep)
2035 wordsize = tdep->wordsize;
2036 else
2037 wordsize = 4;
2038 }
c906108c 2039
7a78ae4e
ND
2040 /* Find a candidate among extant architectures. */
2041 for (arches = gdbarch_list_lookup_by_info (arches, &info);
2042 arches != NULL;
2043 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2044 {
2045 /* Word size in the various PowerPC bfd_arch_info structs isn't
2046 meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform
2047 separate word size check. */
2048 tdep = gdbarch_tdep (arches->gdbarch);
9aa1e687 2049 if (tdep && tdep->wordsize == wordsize && tdep->osabi == osabi)
7a78ae4e
ND
2050 return arches->gdbarch;
2051 }
c906108c 2052
7a78ae4e
ND
2053 /* None found, create a new architecture from INFO, whose bfd_arch_info
2054 validity depends on the source:
2055 - executable useless
2056 - rs6000_host_arch() good
2057 - core file good
2058 - "set arch" trust blindly
2059 - GDB startup useless but harmless */
c906108c 2060
9aa1e687 2061 if (!from_xcoff_exec)
c906108c 2062 {
7a78ae4e
ND
2063 arch = info.bfd_architecture;
2064 mach = info.bfd_arch_info->mach;
c906108c 2065 }
7a78ae4e 2066 else
c906108c 2067 {
7a78ae4e
ND
2068 arch = bfd_arch_powerpc;
2069 mach = 0;
2070 bfd_default_set_arch_mach (&abfd, arch, mach);
2071 info.bfd_arch_info = bfd_get_arch_info (&abfd);
2072 }
2073 tdep = xmalloc (sizeof (struct gdbarch_tdep));
2074 tdep->wordsize = wordsize;
9aa1e687 2075 tdep->osabi = osabi;
7a78ae4e
ND
2076 gdbarch = gdbarch_alloc (&info, tdep);
2077 power = arch == bfd_arch_rs6000;
2078
2079 /* Select instruction printer. */
2080 tm_print_insn = arch == power ? print_insn_rs6000 :
2081 info.byte_order == BIG_ENDIAN ? print_insn_big_powerpc :
2082 print_insn_little_powerpc;
2083
2084 /* Choose variant. */
2085 v = find_variant_by_arch (arch, mach);
2086 if (!v)
2087 v = find_variant_by_name (power ? "power" : "powerpc");
2088 tdep->regs = v->regs;
2089
2090 /* Calculate byte offsets in raw register array. */
2091 tdep->regoff = xmalloc (v->nregs * sizeof (int));
2092 for (i = off = 0; i < v->nregs; i++)
2093 {
2094 tdep->regoff[i] = off;
2095 off += regsize (v->regs + i, wordsize);
c906108c
SS
2096 }
2097
7a78ae4e
ND
2098 set_gdbarch_read_pc (gdbarch, generic_target_read_pc);
2099 set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
2100 set_gdbarch_read_fp (gdbarch, generic_target_read_fp);
2101 set_gdbarch_write_fp (gdbarch, generic_target_write_fp);
2102 set_gdbarch_read_sp (gdbarch, generic_target_read_sp);
2103 set_gdbarch_write_sp (gdbarch, generic_target_write_sp);
2104
2105 set_gdbarch_num_regs (gdbarch, v->nregs);
2106 set_gdbarch_sp_regnum (gdbarch, 1);
2107 set_gdbarch_fp_regnum (gdbarch, 1);
2108 set_gdbarch_pc_regnum (gdbarch, 64);
2109 set_gdbarch_register_name (gdbarch, rs6000_register_name);
2110 set_gdbarch_register_size (gdbarch, wordsize);
2111 set_gdbarch_register_bytes (gdbarch, off);
2112 set_gdbarch_register_byte (gdbarch, rs6000_register_byte);
2113 set_gdbarch_register_raw_size (gdbarch, rs6000_register_raw_size);
2114 set_gdbarch_max_register_raw_size (gdbarch, 8);
2115 set_gdbarch_register_virtual_size (gdbarch, rs6000_register_virtual_size);
2116 set_gdbarch_max_register_virtual_size (gdbarch, 8);
2117 set_gdbarch_register_virtual_type (gdbarch, rs6000_register_virtual_type);
2118
2119 set_gdbarch_ptr_bit (gdbarch, wordsize * TARGET_CHAR_BIT);
2120 set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT);
2121 set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2122 set_gdbarch_long_bit (gdbarch, wordsize * TARGET_CHAR_BIT);
2123 set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2124 set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT);
2125 set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2126 set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT);
2127
2128 set_gdbarch_use_generic_dummy_frames (gdbarch, 1);
2129 set_gdbarch_call_dummy_length (gdbarch, 0);
2130 set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT);
2131 set_gdbarch_call_dummy_address (gdbarch, entry_point_address);
2132 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1);
2133 set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0);
2134 set_gdbarch_call_dummy_start_offset (gdbarch, 0);
fe794dc6 2135 set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy);
7a78ae4e
ND
2136 set_gdbarch_call_dummy_p (gdbarch, 1);
2137 set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0);
2138 set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register);
2139 set_gdbarch_fix_call_dummy (gdbarch, rs6000_fix_call_dummy);
2140 set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame);
58223630 2141 set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos);
7a78ae4e
ND
2142 set_gdbarch_push_return_address (gdbarch, ppc_push_return_address);
2143 set_gdbarch_believe_pcc_promotion (gdbarch, 1);
2144 set_gdbarch_coerce_float_to_double (gdbarch, rs6000_coerce_float_to_double);
2145
2146 set_gdbarch_register_convertible (gdbarch, rs6000_register_convertible);
2147 set_gdbarch_register_convert_to_virtual (gdbarch, rs6000_register_convert_to_virtual);
2148 set_gdbarch_register_convert_to_raw (gdbarch, rs6000_register_convert_to_raw);
2149
2150 set_gdbarch_extract_return_value (gdbarch, rs6000_extract_return_value);
9aa1e687
KB
2151
2152 if (sysv_abi)
2153 set_gdbarch_push_arguments (gdbarch, ppc_sysv_abi_push_arguments);
2154 else
2155 set_gdbarch_push_arguments (gdbarch, rs6000_push_arguments);
7a78ae4e
ND
2156
2157 set_gdbarch_store_struct_return (gdbarch, rs6000_store_struct_return);
2158 set_gdbarch_store_return_value (gdbarch, rs6000_store_return_value);
2159 set_gdbarch_extract_struct_value_address (gdbarch, rs6000_extract_struct_value_address);
2160 set_gdbarch_use_struct_convention (gdbarch, generic_use_struct_convention);
2161
7a78ae4e
ND
2162 set_gdbarch_pop_frame (gdbarch, rs6000_pop_frame);
2163
2164 set_gdbarch_skip_prologue (gdbarch, rs6000_skip_prologue);
2165 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2166 set_gdbarch_decr_pc_after_break (gdbarch, 0);
2167 set_gdbarch_function_start_offset (gdbarch, 0);
2168 set_gdbarch_breakpoint_from_pc (gdbarch, rs6000_breakpoint_from_pc);
2169
2170 /* Not sure on this. FIXMEmgo */
2171 set_gdbarch_frame_args_skip (gdbarch, 8);
2172
7a78ae4e 2173 set_gdbarch_frame_chain_valid (gdbarch, file_frame_chain_valid);
9aa1e687
KB
2174 if (osabi == ELFOSABI_LINUX)
2175 {
2176 set_gdbarch_frameless_function_invocation (gdbarch,
2177 ppc_linux_frameless_function_invocation);
2178 set_gdbarch_frame_chain (gdbarch, ppc_linux_frame_chain);
2179 set_gdbarch_frame_saved_pc (gdbarch, ppc_linux_frame_saved_pc);
2180
2181 set_gdbarch_frame_init_saved_regs (gdbarch,
2182 ppc_linux_frame_init_saved_regs);
2183 set_gdbarch_init_extra_frame_info (gdbarch,
2184 ppc_linux_init_extra_frame_info);
2185
2186 set_gdbarch_memory_remove_breakpoint (gdbarch,
2187 ppc_linux_memory_remove_breakpoint);
2188 }
2189 else
2190 {
2191 set_gdbarch_frameless_function_invocation (gdbarch,
2192 rs6000_frameless_function_invocation);
2193 set_gdbarch_frame_chain (gdbarch, rs6000_frame_chain);
2194 set_gdbarch_frame_saved_pc (gdbarch, rs6000_frame_saved_pc);
2195
2196 set_gdbarch_frame_init_saved_regs (gdbarch, rs6000_frame_init_saved_regs);
2197 set_gdbarch_init_extra_frame_info (gdbarch, rs6000_init_extra_frame_info);
f517ea4e
PS
2198
2199 /* Handle RS/6000 function pointers. */
2200 set_gdbarch_convert_from_func_ptr_addr (gdbarch,
2201 rs6000_convert_from_func_ptr_addr);
9aa1e687 2202 }
7a78ae4e
ND
2203 set_gdbarch_frame_args_address (gdbarch, rs6000_frame_args_address);
2204 set_gdbarch_frame_locals_address (gdbarch, rs6000_frame_args_address);
2205 set_gdbarch_saved_pc_after_call (gdbarch, rs6000_saved_pc_after_call);
2206
2207 /* We can't tell how many args there are
2208 now that the C compiler delays popping them. */
2209 set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown);
2210
2211 return gdbarch;
c906108c
SS
2212}
2213
c906108c
SS
2214/* Initialization code. */
2215
2216void
fba45db2 2217_initialize_rs6000_tdep (void)
c906108c 2218{
7a78ae4e
ND
2219 register_gdbarch_init (bfd_arch_rs6000, rs6000_gdbarch_init);
2220 register_gdbarch_init (bfd_arch_powerpc, rs6000_gdbarch_init);
c906108c 2221}
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