Commit | Line | Data |
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41abdfbd | 1 | /* Target-dependent code for GDB, the GNU debugger. |
ecf4059f | 2 | Copyright 1986, 1987, 1989, 1991, 1992 Free Software Foundation, Inc. |
41abdfbd JG |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
41abdfbd | 20 | #include "defs.h" |
41abdfbd JG |
21 | #include "frame.h" |
22 | #include "inferior.h" | |
23 | #include "symtab.h" | |
24 | #include "target.h" | |
25 | ||
2aefe6e4 JK |
26 | #include "xcoffsolib.h" |
27 | ||
41abdfbd JG |
28 | #include <sys/param.h> |
29 | #include <sys/dir.h> | |
30 | #include <sys/user.h> | |
31 | #include <signal.h> | |
32 | #include <sys/ioctl.h> | |
33 | #include <fcntl.h> | |
34 | ||
41abdfbd JG |
35 | #include <a.out.h> |
36 | #include <sys/file.h> | |
37 | #include <sys/stat.h> | |
38 | #include <sys/core.h> | |
ecf4059f | 39 | #include <sys/ldr.h> |
41abdfbd | 40 | |
d6434f39 JG |
41 | |
42 | extern struct obstack frame_cache_obstack; | |
43 | ||
41abdfbd | 44 | extern int errno; |
41abdfbd JG |
45 | |
46 | /* Nonzero if we just simulated a single step break. */ | |
47 | int one_stepped; | |
48 | ||
41abdfbd JG |
49 | /* Breakpoint shadows for the single step instructions will be kept here. */ |
50 | ||
51 | static struct sstep_breaks { | |
52 | int address; | |
53 | int data; | |
54 | } stepBreaks[2]; | |
55 | ||
ecf4059f JG |
56 | /* Static function prototypes */ |
57 | ||
ecf4059f JG |
58 | static CORE_ADDR |
59 | find_toc_address PARAMS ((CORE_ADDR pc)); | |
60 | ||
61 | static CORE_ADDR | |
62 | branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety)); | |
63 | ||
64 | static void | |
65 | frame_get_cache_fsr PARAMS ((struct frame_info *fi, | |
66 | struct aix_framedata *fdatap)); | |
41abdfbd JG |
67 | |
68 | /* | |
69 | * Calculate the destination of a branch/jump. Return -1 if not a branch. | |
70 | */ | |
ecf4059f | 71 | static CORE_ADDR |
41abdfbd | 72 | branch_dest (opcode, instr, pc, safety) |
ecf4059f JG |
73 | int opcode; |
74 | int instr; | |
75 | CORE_ADDR pc; | |
76 | CORE_ADDR safety; | |
41abdfbd JG |
77 | { |
78 | register long offset; | |
ecf4059f | 79 | CORE_ADDR dest; |
41abdfbd JG |
80 | int immediate; |
81 | int absolute; | |
82 | int ext_op; | |
83 | ||
84 | absolute = (int) ((instr >> 1) & 1); | |
85 | ||
86 | switch (opcode) { | |
87 | case 18 : | |
ecf4059f | 88 | immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */ |
41abdfbd JG |
89 | |
90 | case 16 : | |
91 | if (opcode != 18) /* br conditional */ | |
92 | immediate = ((instr & ~3) << 16) >> 16; | |
93 | if (absolute) | |
94 | dest = immediate; | |
95 | else | |
96 | dest = pc + immediate; | |
97 | break; | |
98 | ||
99 | case 19 : | |
100 | ext_op = (instr>>1) & 0x3ff; | |
101 | ||
102 | if (ext_op == 16) /* br conditional register */ | |
103 | dest = read_register (LR_REGNUM) & ~3; | |
104 | ||
105 | else if (ext_op == 528) /* br cond to count reg */ | |
106 | dest = read_register (CTR_REGNUM) & ~3; | |
107 | ||
108 | else return -1; | |
109 | break; | |
110 | ||
111 | default: return -1; | |
112 | } | |
818de002 | 113 | return (dest < TEXT_SEGMENT_BASE) ? safety : dest; |
41abdfbd JG |
114 | } |
115 | ||
116 | ||
117 | ||
118 | /* AIX does not support PT_STEP. Simulate it. */ | |
119 | ||
997cc2c0 | 120 | void |
41abdfbd | 121 | single_step (signal) |
997cc2c0 | 122 | int signal; |
41abdfbd JG |
123 | { |
124 | #define INSNLEN(OPCODE) 4 | |
125 | ||
126 | static char breakp[] = BREAKPOINT; | |
127 | int ii, insn, ret, loc; | |
128 | int breaks[2], opcode; | |
129 | ||
130 | if (!one_stepped) { | |
41abdfbd JG |
131 | loc = read_pc (); |
132 | ||
133 | ret = read_memory (loc, &insn, sizeof (int)); | |
134 | if (ret) | |
135 | printf ("Error in single_step()!!\n"); | |
136 | ||
137 | breaks[0] = loc + INSNLEN(insn); | |
138 | opcode = insn >> 26; | |
139 | breaks[1] = branch_dest (opcode, insn, loc, breaks[0]); | |
140 | ||
818de002 PB |
141 | /* Don't put two breakpoints on the same address. */ |
142 | if (breaks[1] == breaks[0]) | |
143 | breaks[1] = -1; | |
144 | ||
41abdfbd JG |
145 | stepBreaks[1].address = -1; |
146 | ||
147 | for (ii=0; ii < 2; ++ii) { | |
148 | ||
149 | /* ignore invalid breakpoint. */ | |
150 | if ( breaks[ii] == -1) | |
151 | continue; | |
152 | ||
153 | read_memory (breaks[ii], &(stepBreaks[ii].data), sizeof(int)); | |
154 | ||
155 | ret = write_memory (breaks[ii], breakp, sizeof(int)); | |
156 | stepBreaks[ii].address = breaks[ii]; | |
157 | } | |
158 | ||
159 | one_stepped = 1; | |
997cc2c0 | 160 | } else { |
41abdfbd JG |
161 | |
162 | /* remove step breakpoints. */ | |
163 | for (ii=0; ii < 2; ++ii) | |
164 | if (stepBreaks[ii].address != -1) | |
165 | write_memory | |
166 | (stepBreaks[ii].address, &(stepBreaks[ii].data), sizeof(int)); | |
167 | ||
168 | one_stepped = 0; | |
169 | } | |
997cc2c0 | 170 | errno = 0; /* FIXME, don't ignore errors! */ |
41abdfbd | 171 | } |
41abdfbd JG |
172 | |
173 | ||
174 | /* return pc value after skipping a function prologue. */ | |
175 | ||
176 | skip_prologue (pc) | |
ecf4059f | 177 | CORE_ADDR pc; |
41abdfbd JG |
178 | { |
179 | unsigned int tmp; | |
ecf4059f | 180 | unsigned int op; /* FIXME, assumes instruction size matches host int!!! */ |
41abdfbd JG |
181 | |
182 | if (target_read_memory (pc, (char *)&op, sizeof (op))) | |
183 | return pc; /* Can't access it -- assume no prologue. */ | |
184 | SWAP_TARGET_AND_HOST (&op, sizeof (op)); | |
185 | ||
186 | /* Assume that subsequent fetches can fail with low probability. */ | |
187 | ||
188 | if (op == 0x7c0802a6) { /* mflr r0 */ | |
189 | pc += 4; | |
190 | op = read_memory_integer (pc, 4); | |
191 | } | |
41abdfbd JG |
192 | |
193 | if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */ | |
194 | pc += 4; | |
195 | op = read_memory_integer (pc, 4); | |
196 | } | |
197 | ||
198 | if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */ | |
199 | pc += 4; | |
200 | op = read_memory_integer (pc, 4); | |
1eeba686 PB |
201 | |
202 | /* At this point, make sure this is not a trampoline function | |
203 | (a function that simply calls another functions, and nothing else). | |
204 | If the next is not a nop, this branch was part of the function | |
205 | prologue. */ | |
206 | ||
207 | if (op == 0x4def7b82 || /* crorc 15, 15, 15 */ | |
208 | op == 0x0) | |
209 | return pc - 4; /* don't skip over this branch */ | |
41abdfbd JG |
210 | } |
211 | ||
cdb1cc92 ILT |
212 | if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */ |
213 | pc += 4; /* store floating register double */ | |
214 | op = read_memory_integer (pc, 4); | |
215 | } | |
216 | ||
41abdfbd JG |
217 | if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */ |
218 | pc += 4; | |
219 | op = read_memory_integer (pc, 4); | |
220 | } | |
221 | ||
222 | while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */ | |
223 | (tmp == 0x9421) || /* stu r1, NUM(r1) */ | |
cdb1cc92 | 224 | (tmp == 0x93e1)) /* st r31,NUM(r1) */ |
41abdfbd JG |
225 | { |
226 | pc += 4; | |
227 | op = read_memory_integer (pc, 4); | |
228 | } | |
229 | ||
230 | while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */ | |
231 | pc += 4; /* l r30, ... */ | |
232 | op = read_memory_integer (pc, 4); | |
233 | } | |
234 | ||
507e4004 | 235 | /* store parameters into stack */ |
818de002 PB |
236 | while( |
237 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ | |
238 | (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */ | |
239 | (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */ | |
240 | (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */ | |
241 | { | |
242 | pc += 4; /* store fpr double */ | |
243 | op = read_memory_integer (pc, 4); | |
244 | } | |
41abdfbd JG |
245 | |
246 | if (op == 0x603f0000) { /* oril r31, r1, 0x0 */ | |
247 | pc += 4; /* this happens if r31 is used as */ | |
248 | op = read_memory_integer (pc, 4); /* frame ptr. (gcc does that) */ | |
249 | ||
818de002 PB |
250 | tmp = 0; |
251 | while ((op >> 16) == (0x907f + tmp)) { /* st r3, NUM(r31) */ | |
252 | pc += 4; /* st r4, NUM(r31), ... */ | |
41abdfbd | 253 | op = read_memory_integer (pc, 4); |
818de002 | 254 | tmp += 0x20; |
41abdfbd JG |
255 | } |
256 | } | |
507e4004 PB |
257 | #if 0 |
258 | /* I have problems with skipping over __main() that I need to address | |
259 | * sometime. Previously, I used to use misc_function_vector which | |
260 | * didn't work as well as I wanted to be. -MGO */ | |
261 | ||
262 | /* If the first thing after skipping a prolog is a branch to a function, | |
263 | this might be a call to an initializer in main(), introduced by gcc2. | |
264 | We'd like to skip over it as well. Fortunately, xlc does some extra | |
265 | work before calling a function right after a prologue, thus we can | |
266 | single out such gcc2 behaviour. */ | |
267 | ||
268 | ||
269 | if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */ | |
270 | op = read_memory_integer (pc+4, 4); | |
271 | ||
272 | if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */ | |
273 | ||
274 | /* check and see if we are in main. If so, skip over this initializer | |
275 | function as well. */ | |
276 | ||
277 | tmp = find_pc_misc_function (pc); | |
2e4964ad | 278 | if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main")) |
507e4004 PB |
279 | return pc + 8; |
280 | } | |
281 | } | |
282 | #endif /* 0 */ | |
283 | ||
41abdfbd JG |
284 | return pc; |
285 | } | |
286 | ||
818de002 | 287 | |
41abdfbd JG |
288 | /************************************************************************* |
289 | Support for creating pushind a dummy frame into the stack, and popping | |
290 | frames, etc. | |
291 | *************************************************************************/ | |
292 | ||
818de002 PB |
293 | /* The total size of dummy frame is 436, which is; |
294 | ||
295 | 32 gpr's - 128 bytes | |
296 | 32 fpr's - 256 " | |
297 | 7 the rest - 28 " | |
298 | and 24 extra bytes for the callee's link area. The last 24 bytes | |
299 | for the link area might not be necessary, since it will be taken | |
300 | care of by push_arguments(). */ | |
301 | ||
302 | #define DUMMY_FRAME_SIZE 436 | |
303 | ||
41abdfbd JG |
304 | #define DUMMY_FRAME_ADDR_SIZE 10 |
305 | ||
306 | /* Make sure you initialize these in somewhere, in case gdb gives up what it | |
818de002 | 307 | was debugging and starts debugging something else. FIXMEibm */ |
41abdfbd JG |
308 | |
309 | static int dummy_frame_count = 0; | |
310 | static int dummy_frame_size = 0; | |
311 | static CORE_ADDR *dummy_frame_addr = 0; | |
312 | ||
313 | extern int stop_stack_dummy; | |
314 | ||
315 | /* push a dummy frame into stack, save all register. Currently we are saving | |
316 | only gpr's and fpr's, which is not good enough! FIXMEmgo */ | |
317 | ||
ecf4059f | 318 | void |
41abdfbd JG |
319 | push_dummy_frame () |
320 | { | |
321 | int sp, pc; /* stack pointer and link register */ | |
322 | int ii; | |
323 | ||
5f1c39ef | 324 | target_fetch_registers (-1); |
6c6afbb9 | 325 | |
41abdfbd JG |
326 | if (dummy_frame_count >= dummy_frame_size) { |
327 | dummy_frame_size += DUMMY_FRAME_ADDR_SIZE; | |
328 | if (dummy_frame_addr) | |
329 | dummy_frame_addr = (CORE_ADDR*) xrealloc | |
330 | (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size)); | |
331 | else | |
332 | dummy_frame_addr = (CORE_ADDR*) | |
333 | xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size)); | |
334 | } | |
335 | ||
336 | sp = read_register(SP_REGNUM); | |
337 | pc = read_register(PC_REGNUM); | |
338 | ||
339 | dummy_frame_addr [dummy_frame_count++] = sp; | |
340 | ||
341 | /* Be careful! If the stack pointer is not decremented first, then kernel | |
6c6afbb9 | 342 | thinks he is free to use the space underneath it. And kernel actually |
41abdfbd JG |
343 | uses that area for IPC purposes when executing ptrace(2) calls. So |
344 | before writing register values into the new frame, decrement and update | |
345 | %sp first in order to secure your frame. */ | |
346 | ||
818de002 | 347 | write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE); |
41abdfbd | 348 | |
41abdfbd JG |
349 | /* gdb relies on the state of current_frame. We'd better update it, |
350 | otherwise things like do_registers_info() wouldn't work properly! */ | |
351 | ||
352 | flush_cached_frames (); | |
818de002 | 353 | set_current_frame (create_new_frame (sp-DUMMY_FRAME_SIZE, pc)); |
41abdfbd JG |
354 | |
355 | /* save program counter in link register's space. */ | |
356 | write_memory (sp+8, &pc, 4); | |
357 | ||
6c6afbb9 | 358 | /* save all floating point and general purpose registers here. */ |
41abdfbd JG |
359 | |
360 | /* fpr's, f0..f31 */ | |
361 | for (ii = 0; ii < 32; ++ii) | |
362 | write_memory (sp-8-(ii*8), ®isters[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8); | |
363 | ||
364 | /* gpr's r0..r31 */ | |
365 | for (ii=1; ii <=32; ++ii) | |
366 | write_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); | |
367 | ||
818de002 PB |
368 | /* so far, 32*2 + 32 words = 384 bytes have been written. |
369 | 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */ | |
370 | ||
371 | for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) { | |
372 | write_memory (sp-384-(ii*4), | |
373 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); | |
374 | } | |
375 | ||
376 | /* Save sp or so called back chain right here. */ | |
377 | write_memory (sp-DUMMY_FRAME_SIZE, &sp, 4); | |
378 | sp -= DUMMY_FRAME_SIZE; | |
41abdfbd JG |
379 | |
380 | /* And finally, this is the back chain. */ | |
381 | write_memory (sp+8, &pc, 4); | |
382 | } | |
383 | ||
384 | ||
385 | /* Pop a dummy frame. | |
386 | ||
387 | In rs6000 when we push a dummy frame, we save all of the registers. This | |
388 | is usually done before user calls a function explicitly. | |
389 | ||
818de002 PB |
390 | After a dummy frame is pushed, some instructions are copied into stack, |
391 | and stack pointer is decremented even more. Since we don't have a frame | |
392 | pointer to get back to the parent frame of the dummy, we start having | |
393 | trouble poping it. Therefore, we keep a dummy frame stack, keeping | |
394 | addresses of dummy frames as such. When poping happens and when we | |
395 | detect that was a dummy frame, we pop it back to its parent by using | |
396 | dummy frame stack (`dummy_frame_addr' array). | |
ecf4059f JG |
397 | |
398 | FIXME: This whole concept is broken. You should be able to detect | |
399 | a dummy stack frame *on the user's stack itself*. When you do, | |
400 | then you know the format of that stack frame -- including its | |
401 | saved SP register! There should *not* be a separate stack in the | |
d6434f39 | 402 | GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92 |
41abdfbd JG |
403 | */ |
404 | ||
405 | pop_dummy_frame () | |
406 | { | |
407 | CORE_ADDR sp, pc; | |
408 | int ii; | |
409 | sp = dummy_frame_addr [--dummy_frame_count]; | |
410 | ||
411 | /* restore all fpr's. */ | |
412 | for (ii = 1; ii <= 32; ++ii) | |
413 | read_memory (sp-(ii*8), ®isters[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8); | |
414 | ||
415 | /* restore all gpr's */ | |
416 | for (ii=1; ii <= 32; ++ii) { | |
417 | read_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); | |
418 | } | |
419 | ||
818de002 PB |
420 | /* restore the rest of the registers. */ |
421 | for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) | |
422 | read_memory (sp-384-(ii*4), | |
423 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); | |
424 | ||
425 | read_memory (sp-(DUMMY_FRAME_SIZE-8), | |
426 | ®isters [REGISTER_BYTE(PC_REGNUM)], 4); | |
41abdfbd JG |
427 | |
428 | /* when a dummy frame was being pushed, we had to decrement %sp first, in | |
429 | order to secure astack space. Thus, saved %sp (or %r1) value, is not the | |
430 | one we should restore. Change it with the one we need. */ | |
431 | ||
432 | *(int*)®isters [REGISTER_BYTE(FP_REGNUM)] = sp; | |
433 | ||
434 | /* Now we can restore all registers. */ | |
435 | ||
5f1c39ef | 436 | target_store_registers (-1); |
41abdfbd JG |
437 | pc = read_pc (); |
438 | flush_cached_frames (); | |
439 | set_current_frame (create_new_frame (sp, pc)); | |
440 | } | |
441 | ||
442 | ||
443 | /* pop the innermost frame, go back to the caller. */ | |
444 | ||
ecf4059f | 445 | void |
41abdfbd JG |
446 | pop_frame () |
447 | { | |
448 | int pc, lr, sp, prev_sp; /* %pc, %lr, %sp */ | |
6c6afbb9 | 449 | struct aix_framedata fdata; |
41abdfbd | 450 | FRAME fr = get_current_frame (); |
41abdfbd | 451 | int addr, ii; |
41abdfbd JG |
452 | |
453 | pc = read_pc (); | |
454 | sp = FRAME_FP (fr); | |
455 | ||
456 | if (stop_stack_dummy && dummy_frame_count) { | |
457 | pop_dummy_frame (); | |
458 | return; | |
459 | } | |
460 | ||
461 | /* figure out previous %pc value. If the function is frameless, it is | |
462 | still in the link register, otherwise walk the frames and retrieve the | |
463 | saved %pc value in the previous frame. */ | |
464 | ||
465 | addr = get_pc_function_start (fr->pc) + FUNCTION_START_OFFSET; | |
6c6afbb9 | 466 | function_frame_info (addr, &fdata); |
41abdfbd JG |
467 | |
468 | read_memory (sp, &prev_sp, 4); | |
6c6afbb9 | 469 | if (fdata.frameless) |
41abdfbd JG |
470 | lr = read_register (LR_REGNUM); |
471 | else | |
472 | read_memory (prev_sp+8, &lr, 4); | |
473 | ||
474 | /* reset %pc value. */ | |
475 | write_register (PC_REGNUM, lr); | |
476 | ||
477 | /* reset register values if any was saved earlier. */ | |
6c6afbb9 | 478 | addr = prev_sp - fdata.offset; |
41abdfbd | 479 | |
6c6afbb9 PB |
480 | if (fdata.saved_gpr != -1) |
481 | for (ii=fdata.saved_gpr; ii <= 31; ++ii) { | |
41abdfbd | 482 | read_memory (addr, ®isters [REGISTER_BYTE (ii)], 4); |
cdb1cc92 | 483 | addr += 4; |
41abdfbd JG |
484 | } |
485 | ||
6c6afbb9 PB |
486 | if (fdata.saved_fpr != -1) |
487 | for (ii=fdata.saved_fpr; ii <= 31; ++ii) { | |
41abdfbd JG |
488 | read_memory (addr, ®isters [REGISTER_BYTE (ii+FP0_REGNUM)], 8); |
489 | addr += 8; | |
490 | } | |
491 | ||
492 | write_register (SP_REGNUM, prev_sp); | |
5f1c39ef | 493 | target_store_registers (-1); |
41abdfbd JG |
494 | flush_cached_frames (); |
495 | set_current_frame (create_new_frame (prev_sp, lr)); | |
496 | } | |
497 | ||
498 | ||
499 | /* fixup the call sequence of a dummy function, with the real function address. | |
500 | its argumets will be passed by gdb. */ | |
501 | ||
ecf4059f | 502 | void |
41abdfbd JG |
503 | fix_call_dummy(dummyname, pc, fun, nargs, type) |
504 | char *dummyname; | |
ecf4059f JG |
505 | CORE_ADDR pc; |
506 | CORE_ADDR fun; | |
41abdfbd JG |
507 | int nargs; /* not used */ |
508 | int type; /* not used */ | |
41abdfbd JG |
509 | { |
510 | #define TOC_ADDR_OFFSET 20 | |
511 | #define TARGET_ADDR_OFFSET 28 | |
512 | ||
513 | int ii; | |
ecf4059f JG |
514 | CORE_ADDR target_addr; |
515 | CORE_ADDR tocvalue; | |
41abdfbd JG |
516 | |
517 | target_addr = fun; | |
518 | tocvalue = find_toc_address (target_addr); | |
519 | ||
520 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET); | |
521 | ii = (ii & 0xffff0000) | (tocvalue >> 16); | |
522 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii; | |
523 | ||
524 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4); | |
525 | ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff); | |
526 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii; | |
527 | ||
528 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET); | |
529 | ii = (ii & 0xffff0000) | (target_addr >> 16); | |
530 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii; | |
531 | ||
532 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4); | |
533 | ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff); | |
534 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii; | |
535 | } | |
536 | ||
537 | ||
41abdfbd | 538 | /* return information about a function frame. |
6c6afbb9 | 539 | in struct aix_frameinfo fdata: |
cdb1cc92 ILT |
540 | - frameless is TRUE, if function does not have a frame. |
541 | - nosavedpc is TRUE, if function does not save %pc value in its frame. | |
41abdfbd JG |
542 | - offset is the number of bytes used in the frame to save registers. |
543 | - saved_gpr is the number of the first saved gpr. | |
544 | - saved_fpr is the number of the first saved fpr. | |
6c6afbb9 PB |
545 | - alloca_reg is the number of the register used for alloca() handling. |
546 | Otherwise -1. | |
41abdfbd | 547 | */ |
ecf4059f | 548 | void |
6c6afbb9 | 549 | function_frame_info (pc, fdata) |
d6434f39 | 550 | CORE_ADDR pc; |
6c6afbb9 | 551 | struct aix_framedata *fdata; |
41abdfbd JG |
552 | { |
553 | unsigned int tmp; | |
554 | register unsigned int op; | |
555 | ||
6c6afbb9 PB |
556 | fdata->offset = 0; |
557 | fdata->saved_gpr = fdata->saved_fpr = fdata->alloca_reg = -1; | |
cdb1cc92 | 558 | fdata->frameless = 1; |
41abdfbd | 559 | |
41abdfbd JG |
560 | op = read_memory_integer (pc, 4); |
561 | if (op == 0x7c0802a6) { /* mflr r0 */ | |
562 | pc += 4; | |
563 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 564 | fdata->nosavedpc = 0; |
6c6afbb9 | 565 | fdata->frameless = 0; |
41abdfbd | 566 | } |
cdb1cc92 ILT |
567 | else /* else, pc is not saved */ |
568 | fdata->nosavedpc = 1; | |
41abdfbd JG |
569 | |
570 | if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */ | |
571 | pc += 4; | |
572 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 573 | fdata->frameless = 0; |
41abdfbd JG |
574 | } |
575 | ||
576 | if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */ | |
577 | pc += 4; | |
578 | op = read_memory_integer (pc, 4); | |
1eeba686 PB |
579 | /* At this point, make sure this is not a trampoline function |
580 | (a function that simply calls another functions, and nothing else). | |
581 | If the next is not a nop, this branch was part of the function | |
582 | prologue. */ | |
583 | ||
584 | if (op == 0x4def7b82 || /* crorc 15, 15, 15 */ | |
585 | op == 0x0) | |
586 | return; /* prologue is over */ | |
cdb1cc92 | 587 | fdata->frameless = 0; |
41abdfbd JG |
588 | } |
589 | ||
590 | if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */ | |
591 | pc += 4; /* store floating register double */ | |
592 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 593 | fdata->frameless = 0; |
41abdfbd JG |
594 | } |
595 | ||
596 | if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */ | |
597 | int tmp2; | |
6c6afbb9 | 598 | fdata->saved_gpr = (op >> 21) & 0x1f; |
41abdfbd JG |
599 | tmp2 = op & 0xffff; |
600 | if (tmp2 > 0x7fff) | |
cdb1cc92 | 601 | tmp2 = (~0 &~ 0xffff) | tmp2; |
41abdfbd JG |
602 | |
603 | if (tmp2 < 0) { | |
604 | tmp2 = tmp2 * -1; | |
6c6afbb9 PB |
605 | fdata->saved_fpr = (tmp2 - ((32 - fdata->saved_gpr) * 4)) / 8; |
606 | if ( fdata->saved_fpr > 0) | |
607 | fdata->saved_fpr = 32 - fdata->saved_fpr; | |
41abdfbd | 608 | else |
6c6afbb9 | 609 | fdata->saved_fpr = -1; |
41abdfbd | 610 | } |
6c6afbb9 PB |
611 | fdata->offset = tmp2; |
612 | pc += 4; | |
613 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 614 | fdata->frameless = 0; |
41abdfbd | 615 | } |
6c6afbb9 PB |
616 | |
617 | while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */ | |
618 | (tmp == 0x9421) || /* stu r1, NUM(r1) */ | |
cdb1cc92 | 619 | (tmp == 0x93e1)) /* st r31, NUM(r1) */ |
6c6afbb9 | 620 | { |
cdb1cc92 ILT |
621 | int tmp2; |
622 | ||
6c6afbb9 PB |
623 | /* gcc takes a short cut and uses this instruction to save r31 only. */ |
624 | ||
cdb1cc92 | 625 | if (tmp == 0x93e1) { |
6c6afbb9 PB |
626 | if (fdata->offset) |
627 | /* fatal ("Unrecognized prolog."); */ | |
628 | printf ("Unrecognized prolog!\n"); | |
629 | ||
630 | fdata->saved_gpr = 31; | |
cdb1cc92 ILT |
631 | tmp2 = op & 0xffff; |
632 | if (tmp2 > 0x7fff) { | |
633 | tmp2 = - ((~0 &~ 0xffff) | tmp2); | |
634 | fdata->saved_fpr = (tmp2 - ((32 - 31) * 4)) / 8; | |
635 | if ( fdata->saved_fpr > 0) | |
636 | fdata->saved_fpr = 32 - fdata->saved_fpr; | |
637 | else | |
638 | fdata->saved_fpr = -1; | |
639 | } | |
640 | fdata->offset = tmp2; | |
6c6afbb9 PB |
641 | } |
642 | pc += 4; | |
643 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 644 | fdata->frameless = 0; |
6c6afbb9 PB |
645 | } |
646 | ||
647 | while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */ | |
648 | pc += 4; /* l r30, ... */ | |
649 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 650 | fdata->frameless = 0; |
6c6afbb9 PB |
651 | } |
652 | ||
653 | /* store parameters into stack */ | |
654 | while( | |
655 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ | |
656 | (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */ | |
657 | (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */ | |
658 | (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */ | |
659 | { | |
660 | pc += 4; /* store fpr double */ | |
661 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 662 | fdata->frameless = 0; |
6c6afbb9 PB |
663 | } |
664 | ||
cdb1cc92 | 665 | if (op == 0x603f0000) { /* oril r31, r1, 0x0 */ |
6c6afbb9 | 666 | fdata->alloca_reg = 31; |
cdb1cc92 ILT |
667 | fdata->frameless = 0; |
668 | } | |
41abdfbd JG |
669 | } |
670 | ||
671 | ||
672 | /* Pass the arguments in either registers, or in the stack. In RS6000, the first | |
673 | eight words of the argument list (that might be less than eight parameters if | |
674 | some parameters occupy more than one word) are passed in r3..r11 registers. | |
675 | float and double parameters are passed in fpr's, in addition to that. Rest of | |
676 | the parameters if any are passed in user stack. There might be cases in which | |
677 | half of the parameter is copied into registers, the other half is pushed into | |
678 | stack. | |
679 | ||
680 | If the function is returning a structure, then the return address is passed | |
681 | in r3, then the first 7 words of the parametes can be passed in registers, | |
682 | starting from r4. */ | |
683 | ||
684 | CORE_ADDR | |
685 | push_arguments (nargs, args, sp, struct_return, struct_addr) | |
686 | int nargs; | |
687 | value *args; | |
688 | CORE_ADDR sp; | |
689 | int struct_return; | |
690 | CORE_ADDR struct_addr; | |
691 | { | |
692 | int ii, len; | |
693 | int argno; /* current argument number */ | |
694 | int argbytes; /* current argument byte */ | |
695 | char tmp_buffer [50]; | |
696 | value arg; | |
697 | int f_argno = 0; /* current floating point argno */ | |
698 | ||
699 | CORE_ADDR saved_sp, pc; | |
700 | ||
701 | if ( dummy_frame_count <= 0) | |
702 | printf ("FATAL ERROR -push_arguments()! frame not found!!\n"); | |
703 | ||
704 | /* The first eight words of ther arguments are passed in registers. Copy | |
705 | them appropriately. | |
706 | ||
707 | If the function is returning a `struct', then the first word (which | |
708 | will be passed in r3) is used for struct return address. In that | |
709 | case we should advance one word and start from r4 register to copy | |
710 | parameters. */ | |
711 | ||
712 | ii = struct_return ? 1 : 0; | |
713 | ||
714 | for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) { | |
715 | ||
716 | arg = value_arg_coerce (args[argno]); | |
717 | len = TYPE_LENGTH (VALUE_TYPE (arg)); | |
718 | ||
719 | if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT) { | |
720 | ||
721 | /* floating point arguments are passed in fpr's, as well as gpr's. | |
722 | There are 13 fpr's reserved for passing parameters. At this point | |
723 | there is no way we would run out of them. */ | |
724 | ||
725 | if (len > 8) | |
726 | printf ( | |
727 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); | |
728 | ||
729 | bcopy (VALUE_CONTENTS (arg), | |
730 | ®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], len); | |
731 | ++f_argno; | |
732 | } | |
733 | ||
734 | if (len > 4) { | |
735 | ||
736 | /* Argument takes more than one register. */ | |
737 | while (argbytes < len) { | |
738 | ||
739 | *(int*)®isters[REGISTER_BYTE(ii+3)] = 0; | |
740 | bcopy ( ((char*)VALUE_CONTENTS (arg))+argbytes, | |
741 | ®isters[REGISTER_BYTE(ii+3)], | |
742 | (len - argbytes) > 4 ? 4 : len - argbytes); | |
743 | ++ii, argbytes += 4; | |
744 | ||
745 | if (ii >= 8) | |
746 | goto ran_out_of_registers_for_arguments; | |
747 | } | |
748 | argbytes = 0; | |
749 | --ii; | |
750 | } | |
751 | else { /* Argument can fit in one register. No problem. */ | |
752 | *(int*)®isters[REGISTER_BYTE(ii+3)] = 0; | |
753 | bcopy (VALUE_CONTENTS (arg), ®isters[REGISTER_BYTE(ii+3)], len); | |
754 | } | |
755 | ++argno; | |
756 | } | |
757 | ||
758 | ran_out_of_registers_for_arguments: | |
759 | ||
760 | /* location for 8 parameters are always reserved. */ | |
761 | sp -= 4 * 8; | |
762 | ||
763 | /* another six words for back chain, TOC register, link register, etc. */ | |
764 | sp -= 24; | |
765 | ||
766 | /* if there are more arguments, allocate space for them in | |
767 | the stack, then push them starting from the ninth one. */ | |
768 | ||
769 | if ((argno < nargs) || argbytes) { | |
770 | int space = 0, jj; | |
771 | value val; | |
772 | ||
773 | if (argbytes) { | |
774 | space += ((len - argbytes + 3) & -4); | |
775 | jj = argno + 1; | |
776 | } | |
777 | else | |
778 | jj = argno; | |
779 | ||
780 | for (; jj < nargs; ++jj) { | |
781 | val = value_arg_coerce (args[jj]); | |
782 | space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4; | |
783 | } | |
784 | ||
785 | /* add location required for the rest of the parameters */ | |
786 | space = (space + 7) & -8; | |
787 | sp -= space; | |
788 | ||
789 | /* This is another instance we need to be concerned about securing our | |
790 | stack space. If we write anything underneath %sp (r1), we might conflict | |
791 | with the kernel who thinks he is free to use this area. So, update %sp | |
792 | first before doing anything else. */ | |
793 | ||
794 | write_register (SP_REGNUM, sp); | |
795 | ||
41abdfbd JG |
796 | /* if the last argument copied into the registers didn't fit there |
797 | completely, push the rest of it into stack. */ | |
798 | ||
799 | if (argbytes) { | |
800 | write_memory ( | |
801 | sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes); | |
802 | ++argno; | |
803 | ii += ((len - argbytes + 3) & -4) / 4; | |
804 | } | |
805 | ||
806 | /* push the rest of the arguments into stack. */ | |
807 | for (; argno < nargs; ++argno) { | |
808 | ||
809 | arg = value_arg_coerce (args[argno]); | |
810 | len = TYPE_LENGTH (VALUE_TYPE (arg)); | |
811 | ||
812 | ||
813 | /* float types should be passed in fpr's, as well as in the stack. */ | |
814 | if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT && f_argno < 13) { | |
815 | ||
816 | if (len > 8) | |
817 | printf ( | |
818 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); | |
819 | ||
820 | bcopy (VALUE_CONTENTS (arg), | |
821 | ®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], len); | |
822 | ++f_argno; | |
823 | } | |
824 | ||
825 | write_memory (sp+24+(ii*4), VALUE_CONTENTS (arg), len); | |
826 | ii += ((len + 3) & -4) / 4; | |
827 | } | |
828 | } | |
6c6afbb9 | 829 | else |
41abdfbd JG |
830 | /* Secure stack areas first, before doing anything else. */ |
831 | write_register (SP_REGNUM, sp); | |
832 | ||
41abdfbd JG |
833 | saved_sp = dummy_frame_addr [dummy_frame_count - 1]; |
834 | read_memory (saved_sp, tmp_buffer, 24); | |
835 | write_memory (sp, tmp_buffer, 24); | |
836 | ||
837 | write_memory (sp, &saved_sp, 4); /* set back chain properly */ | |
838 | ||
5f1c39ef | 839 | target_store_registers (-1); |
41abdfbd JG |
840 | return sp; |
841 | } | |
842 | ||
843 | /* a given return value in `regbuf' with a type `valtype', extract and copy its | |
844 | value into `valbuf' */ | |
845 | ||
ecf4059f | 846 | void |
41abdfbd JG |
847 | extract_return_value (valtype, regbuf, valbuf) |
848 | struct type *valtype; | |
849 | char regbuf[REGISTER_BYTES]; | |
850 | char *valbuf; | |
851 | { | |
852 | ||
853 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT) { | |
854 | ||
855 | double dd; float ff; | |
856 | /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes. | |
857 | We need to truncate the return value into float size (4 byte) if | |
858 | necessary. */ | |
859 | ||
860 | if (TYPE_LENGTH (valtype) > 4) /* this is a double */ | |
861 | bcopy (®buf[REGISTER_BYTE (FP0_REGNUM + 1)], valbuf, | |
862 | TYPE_LENGTH (valtype)); | |
863 | else { /* float */ | |
864 | bcopy (®buf[REGISTER_BYTE (FP0_REGNUM + 1)], &dd, 8); | |
865 | ff = (float)dd; | |
866 | bcopy (&ff, valbuf, sizeof(float)); | |
867 | } | |
868 | } | |
869 | else | |
870 | /* return value is copied starting from r3. */ | |
871 | bcopy (®buf[REGISTER_BYTE (3)], valbuf, TYPE_LENGTH (valtype)); | |
872 | } | |
873 | ||
874 | ||
ecf4059f JG |
875 | /* keep structure return address in this variable. |
876 | FIXME: This is a horrid kludge which should not be allowed to continue | |
877 | living. This only allows a single nested call to a structure-returning | |
878 | function. Come on, guys! -- gnu@cygnus.com, Aug 92 */ | |
41abdfbd JG |
879 | |
880 | CORE_ADDR rs6000_struct_return_address; | |
881 | ||
882 | ||
883 | /* Throw away this debugging code. FIXMEmgo. */ | |
ecf4059f | 884 | void |
41abdfbd JG |
885 | print_frame(fram) |
886 | int fram; | |
887 | { | |
888 | int ii, val; | |
889 | for (ii=0; ii<40; ++ii) { | |
890 | if ((ii % 4) == 0) | |
891 | printf ("\n"); | |
892 | val = read_memory_integer (fram + ii * 4, 4); | |
893 | printf ("0x%08x\t", val); | |
894 | } | |
895 | printf ("\n"); | |
896 | } | |
897 | ||
898 | ||
899 | ||
c2e4669f JG |
900 | /* Indirect function calls use a piece of trampoline code to do context |
901 | switching, i.e. to set the new TOC table. Skip such code if we are on | |
902 | its first instruction (as when we have single-stepped to here). | |
903 | Result is desired PC to step until, or NULL if we are not in | |
904 | trampoline code. */ | |
41abdfbd | 905 | |
ecf4059f | 906 | CORE_ADDR |
41abdfbd | 907 | skip_trampoline_code (pc) |
ecf4059f | 908 | CORE_ADDR pc; |
41abdfbd JG |
909 | { |
910 | register unsigned int ii, op; | |
911 | ||
912 | static unsigned trampoline_code[] = { | |
913 | 0x800b0000, /* l r0,0x0(r11) */ | |
914 | 0x90410014, /* st r2,0x14(r1) */ | |
915 | 0x7c0903a6, /* mtctr r0 */ | |
916 | 0x804b0004, /* l r2,0x4(r11) */ | |
917 | 0x816b0008, /* l r11,0x8(r11) */ | |
918 | 0x4e800420, /* bctr */ | |
919 | 0x4e800020, /* br */ | |
920 | 0 | |
921 | }; | |
922 | ||
923 | for (ii=0; trampoline_code[ii]; ++ii) { | |
924 | op = read_memory_integer (pc + (ii*4), 4); | |
925 | if (op != trampoline_code [ii]) | |
926 | return NULL; | |
927 | } | |
928 | ii = read_register (11); /* r11 holds destination addr */ | |
929 | pc = read_memory_integer (ii, 4); /* (r11) value */ | |
930 | return pc; | |
931 | } | |
932 | ||
ecf4059f JG |
933 | |
934 | /* Determines whether the function FI has a frame on the stack or not. | |
cdb1cc92 ILT |
935 | Called from the FRAMELESS_FUNCTION_INVOCATION macro in tm.h with a |
936 | second argument of 0, and from the FRAME_SAVED_PC macro with a | |
937 | second argument of 1. */ | |
ecf4059f JG |
938 | |
939 | int | |
cdb1cc92 | 940 | frameless_function_invocation (fi, pcsaved) |
ecf4059f | 941 | struct frame_info *fi; |
cdb1cc92 | 942 | int pcsaved; |
ecf4059f JG |
943 | { |
944 | CORE_ADDR func_start; | |
945 | struct aix_framedata fdata; | |
946 | ||
947 | func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET; | |
948 | ||
949 | /* If we failed to find the start of the function, it is a mistake | |
950 | to inspect the instructions. */ | |
951 | ||
952 | if (!func_start) | |
953 | return 0; | |
954 | ||
955 | function_frame_info (func_start, &fdata); | |
cdb1cc92 | 956 | return pcsaved ? fdata.nosavedpc : fdata.frameless; |
ecf4059f JG |
957 | } |
958 | ||
959 | ||
960 | /* If saved registers of frame FI are not known yet, read and cache them. | |
961 | &FDATAP contains aix_framedata; TDATAP can be NULL, | |
962 | in which case the framedata are read. */ | |
963 | ||
964 | static void | |
965 | frame_get_cache_fsr (fi, fdatap) | |
966 | struct frame_info *fi; | |
967 | struct aix_framedata *fdatap; | |
968 | { | |
969 | int ii; | |
970 | CORE_ADDR frame_addr; | |
971 | struct aix_framedata work_fdata; | |
972 | ||
973 | if (fi->cache_fsr) | |
974 | return; | |
975 | ||
976 | if (fdatap == NULL) { | |
977 | fdatap = &work_fdata; | |
978 | function_frame_info (get_pc_function_start (fi->pc), fdatap); | |
979 | } | |
980 | ||
981 | fi->cache_fsr = (struct frame_saved_regs *) | |
982 | obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs)); | |
983 | bzero (fi->cache_fsr, sizeof (struct frame_saved_regs)); | |
984 | ||
985 | if (fi->prev && fi->prev->frame) | |
986 | frame_addr = fi->prev->frame; | |
987 | else | |
988 | frame_addr = read_memory_integer (fi->frame, 4); | |
989 | ||
990 | /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr. | |
991 | All fpr's from saved_fpr to fp31 are saved right underneath caller | |
992 | stack pointer, starting from fp31 first. */ | |
993 | ||
994 | if (fdatap->saved_fpr >= 0) { | |
995 | for (ii=31; ii >= fdatap->saved_fpr; --ii) | |
996 | fi->cache_fsr->regs [FP0_REGNUM + ii] = frame_addr - ((32 - ii) * 8); | |
997 | frame_addr -= (32 - fdatap->saved_fpr) * 8; | |
998 | } | |
999 | ||
1000 | /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr. | |
1001 | All gpr's from saved_gpr to gpr31 are saved right under saved fprs, | |
1002 | starting from r31 first. */ | |
1003 | ||
1004 | if (fdatap->saved_gpr >= 0) | |
1005 | for (ii=31; ii >= fdatap->saved_gpr; --ii) | |
1006 | fi->cache_fsr->regs [ii] = frame_addr - ((32 - ii) * 4); | |
1007 | } | |
1008 | ||
1009 | /* Return the address of a frame. This is the inital %sp value when the frame | |
1010 | was first allocated. For functions calling alloca(), it might be saved in | |
1011 | an alloca register. */ | |
1012 | ||
1013 | CORE_ADDR | |
1014 | frame_initial_stack_address (fi) | |
1015 | struct frame_info *fi; | |
1016 | { | |
1017 | CORE_ADDR tmpaddr; | |
1018 | struct aix_framedata fdata; | |
1019 | struct frame_info *callee_fi; | |
1020 | ||
1021 | /* if the initial stack pointer (frame address) of this frame is known, | |
1022 | just return it. */ | |
1023 | ||
1024 | if (fi->initial_sp) | |
1025 | return fi->initial_sp; | |
1026 | ||
1027 | /* find out if this function is using an alloca register.. */ | |
1028 | ||
1029 | function_frame_info (get_pc_function_start (fi->pc), &fdata); | |
1030 | ||
1031 | /* if saved registers of this frame are not known yet, read and cache them. */ | |
1032 | ||
1033 | if (!fi->cache_fsr) | |
1034 | frame_get_cache_fsr (fi, &fdata); | |
1035 | ||
1036 | /* If no alloca register used, then fi->frame is the value of the %sp for | |
1037 | this frame, and it is good enough. */ | |
1038 | ||
1039 | if (fdata.alloca_reg < 0) { | |
1040 | fi->initial_sp = fi->frame; | |
1041 | return fi->initial_sp; | |
1042 | } | |
1043 | ||
1044 | /* This function has an alloca register. If this is the top-most frame | |
1045 | (with the lowest address), the value in alloca register is good. */ | |
1046 | ||
1047 | if (!fi->next) | |
1048 | return fi->initial_sp = read_register (fdata.alloca_reg); | |
1049 | ||
1050 | /* Otherwise, this is a caller frame. Callee has usually already saved | |
1051 | registers, but there are exceptions (such as when the callee | |
1052 | has no parameters). Find the address in which caller's alloca | |
1053 | register is saved. */ | |
1054 | ||
1055 | for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) { | |
1056 | ||
1057 | if (!callee_fi->cache_fsr) | |
cdb1cc92 | 1058 | frame_get_cache_fsr (callee_fi, NULL); |
ecf4059f JG |
1059 | |
1060 | /* this is the address in which alloca register is saved. */ | |
1061 | ||
1062 | tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg]; | |
1063 | if (tmpaddr) { | |
1064 | fi->initial_sp = read_memory_integer (tmpaddr, 4); | |
1065 | return fi->initial_sp; | |
1066 | } | |
1067 | ||
1068 | /* Go look into deeper levels of the frame chain to see if any one of | |
1069 | the callees has saved alloca register. */ | |
1070 | } | |
1071 | ||
1072 | /* If alloca register was not saved, by the callee (or any of its callees) | |
1073 | then the value in the register is still good. */ | |
1074 | ||
1075 | return fi->initial_sp = read_register (fdata.alloca_reg); | |
1076 | } | |
1077 | ||
1078 | /* xcoff_relocate_symtab - hook for symbol table relocation. | |
1079 | also reads shared libraries.. */ | |
1080 | ||
1081 | xcoff_relocate_symtab (pid) | |
1082 | unsigned int pid; | |
1083 | { | |
1084 | #define MAX_LOAD_SEGS 64 /* maximum number of load segments */ | |
1085 | ||
1086 | struct ld_info *ldi; | |
1087 | int temp; | |
1088 | ||
1089 | ldi = (void *) alloca(MAX_LOAD_SEGS * sizeof (*ldi)); | |
1090 | ||
1091 | /* According to my humble theory, AIX has some timing problems and | |
1092 | when the user stack grows, kernel doesn't update stack info in time | |
1093 | and ptrace calls step on user stack. That is why we sleep here a little, | |
1094 | and give kernel to update its internals. */ | |
1095 | ||
1096 | usleep (36000); | |
1097 | ||
1098 | errno = 0; | |
1099 | ptrace(PT_LDINFO, pid, (PTRACE_ARG3_TYPE) ldi, | |
1100 | MAX_LOAD_SEGS * sizeof(*ldi), ldi); | |
1101 | if (errno) { | |
1102 | perror_with_name ("ptrace ldinfo"); | |
1103 | return 0; | |
1104 | } | |
1105 | ||
1106 | vmap_ldinfo(ldi); | |
1107 | ||
1108 | do { | |
1109 | add_text_to_loadinfo (ldi->ldinfo_textorg, ldi->ldinfo_dataorg); | |
1110 | } while (ldi->ldinfo_next | |
1111 | && (ldi = (void *) (ldi->ldinfo_next + (char *) ldi))); | |
1112 | ||
1113 | #if 0 | |
1114 | /* Now that we've jumbled things around, re-sort them. */ | |
1115 | sort_minimal_symbols (); | |
1116 | #endif | |
1117 | ||
1118 | /* relocate the exec and core sections as well. */ | |
1119 | vmap_exec (); | |
1120 | } | |
1121 | \f | |
1122 | /* Keep an array of load segment information and their TOC table addresses. | |
1123 | This info will be useful when calling a shared library function by hand. */ | |
1124 | ||
1125 | struct loadinfo { | |
1126 | CORE_ADDR textorg, dataorg; | |
1127 | unsigned long toc_offset; | |
1128 | }; | |
1129 | ||
1130 | #define LOADINFOLEN 10 | |
1131 | ||
1132 | /* FIXME Warning -- loadinfotextindex is used for a nefarious purpose by | |
1133 | tm-rs6000.h. */ | |
1134 | ||
1135 | static struct loadinfo *loadinfo = NULL; | |
1136 | static int loadinfolen = 0; | |
1137 | static int loadinfotocindex = 0; | |
1138 | int loadinfotextindex = 0; | |
1139 | ||
1140 | ||
1141 | void | |
1142 | xcoff_init_loadinfo () | |
1143 | { | |
1144 | loadinfotocindex = 0; | |
1145 | loadinfotextindex = 0; | |
1146 | ||
1147 | if (loadinfolen == 0) { | |
1148 | loadinfo = (struct loadinfo *) | |
1149 | xmalloc (sizeof (struct loadinfo) * LOADINFOLEN); | |
1150 | loadinfolen = LOADINFOLEN; | |
1151 | } | |
1152 | } | |
1153 | ||
1154 | ||
1155 | /* FIXME -- this is never called! */ | |
1156 | void | |
1157 | free_loadinfo () | |
1158 | { | |
1159 | if (loadinfo) | |
1160 | free (loadinfo); | |
1161 | loadinfo = NULL; | |
1162 | loadinfolen = 0; | |
1163 | loadinfotocindex = 0; | |
1164 | loadinfotextindex = 0; | |
1165 | } | |
1166 | ||
1167 | /* this is called from xcoffread.c */ | |
1168 | ||
1169 | void | |
1170 | xcoff_add_toc_to_loadinfo (unsigned long tocoff) | |
1171 | { | |
1172 | while (loadinfotocindex >= loadinfolen) { | |
1173 | loadinfolen += LOADINFOLEN; | |
1174 | loadinfo = (struct loadinfo *) | |
1175 | xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen); | |
1176 | } | |
1177 | loadinfo [loadinfotocindex++].toc_offset = tocoff; | |
1178 | } | |
1179 | ||
1180 | ||
2aefe6e4 | 1181 | void |
ecf4059f JG |
1182 | add_text_to_loadinfo (textaddr, dataaddr) |
1183 | CORE_ADDR textaddr; | |
1184 | CORE_ADDR dataaddr; | |
1185 | { | |
1186 | while (loadinfotextindex >= loadinfolen) { | |
1187 | loadinfolen += LOADINFOLEN; | |
1188 | loadinfo = (struct loadinfo *) | |
1189 | xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen); | |
1190 | } | |
1191 | loadinfo [loadinfotextindex].textorg = textaddr; | |
1192 | loadinfo [loadinfotextindex].dataorg = dataaddr; | |
1193 | ++loadinfotextindex; | |
1194 | } | |
1195 | ||
1196 | ||
1197 | /* FIXME: This assumes that the "textorg" and "dataorg" elements | |
1198 | of a member of this array are correlated with the "toc_offset" | |
1199 | element of the same member. But they are sequentially assigned in wildly | |
1200 | different places, and probably there is no correlation. FIXME! */ | |
1201 | ||
1202 | static CORE_ADDR | |
1203 | find_toc_address (pc) | |
1204 | CORE_ADDR pc; | |
1205 | { | |
1206 | int ii, toc_entry, tocbase = 0; | |
1207 | ||
1208 | for (ii=0; ii < loadinfotextindex; ++ii) | |
1209 | if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) { | |
1210 | toc_entry = ii; | |
1211 | tocbase = loadinfo[ii].textorg; | |
1212 | } | |
1213 | ||
1214 | return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset; | |
1215 | } |