Commit | Line | Data |
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41abdfbd | 1 | /* Target-dependent code for GDB, the GNU debugger. |
ecf4059f | 2 | Copyright 1986, 1987, 1989, 1991, 1992 Free Software Foundation, Inc. |
41abdfbd JG |
3 | |
4 | This file is part of GDB. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */ | |
19 | ||
41abdfbd | 20 | #include "defs.h" |
41abdfbd JG |
21 | #include "frame.h" |
22 | #include "inferior.h" | |
23 | #include "symtab.h" | |
24 | #include "target.h" | |
030fb5cb | 25 | #include "gdbcore.h" |
41abdfbd | 26 | |
2aefe6e4 JK |
27 | #include "xcoffsolib.h" |
28 | ||
41abdfbd JG |
29 | #include <sys/param.h> |
30 | #include <sys/dir.h> | |
31 | #include <sys/user.h> | |
32 | #include <signal.h> | |
33 | #include <sys/ioctl.h> | |
34 | #include <fcntl.h> | |
35 | ||
41abdfbd JG |
36 | #include <a.out.h> |
37 | #include <sys/file.h> | |
38 | #include <sys/stat.h> | |
39 | #include <sys/core.h> | |
ecf4059f | 40 | #include <sys/ldr.h> |
41abdfbd | 41 | |
d6434f39 JG |
42 | |
43 | extern struct obstack frame_cache_obstack; | |
44 | ||
41abdfbd | 45 | extern int errno; |
41abdfbd JG |
46 | |
47 | /* Nonzero if we just simulated a single step break. */ | |
48 | int one_stepped; | |
49 | ||
41abdfbd JG |
50 | /* Breakpoint shadows for the single step instructions will be kept here. */ |
51 | ||
52 | static struct sstep_breaks { | |
030fb5cb JK |
53 | /* Address, or 0 if this is not in use. */ |
54 | CORE_ADDR address; | |
55 | /* Shadow contents. */ | |
56 | char data[4]; | |
41abdfbd JG |
57 | } stepBreaks[2]; |
58 | ||
ecf4059f JG |
59 | /* Static function prototypes */ |
60 | ||
ecf4059f JG |
61 | static CORE_ADDR |
62 | find_toc_address PARAMS ((CORE_ADDR pc)); | |
63 | ||
64 | static CORE_ADDR | |
65 | branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety)); | |
66 | ||
67 | static void | |
68 | frame_get_cache_fsr PARAMS ((struct frame_info *fi, | |
69 | struct aix_framedata *fdatap)); | |
41abdfbd JG |
70 | |
71 | /* | |
72 | * Calculate the destination of a branch/jump. Return -1 if not a branch. | |
73 | */ | |
ecf4059f | 74 | static CORE_ADDR |
41abdfbd | 75 | branch_dest (opcode, instr, pc, safety) |
ecf4059f JG |
76 | int opcode; |
77 | int instr; | |
78 | CORE_ADDR pc; | |
79 | CORE_ADDR safety; | |
41abdfbd JG |
80 | { |
81 | register long offset; | |
ecf4059f | 82 | CORE_ADDR dest; |
41abdfbd JG |
83 | int immediate; |
84 | int absolute; | |
85 | int ext_op; | |
86 | ||
87 | absolute = (int) ((instr >> 1) & 1); | |
88 | ||
89 | switch (opcode) { | |
90 | case 18 : | |
ecf4059f | 91 | immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */ |
41abdfbd JG |
92 | |
93 | case 16 : | |
94 | if (opcode != 18) /* br conditional */ | |
95 | immediate = ((instr & ~3) << 16) >> 16; | |
96 | if (absolute) | |
97 | dest = immediate; | |
98 | else | |
99 | dest = pc + immediate; | |
100 | break; | |
101 | ||
102 | case 19 : | |
103 | ext_op = (instr>>1) & 0x3ff; | |
104 | ||
105 | if (ext_op == 16) /* br conditional register */ | |
106 | dest = read_register (LR_REGNUM) & ~3; | |
107 | ||
108 | else if (ext_op == 528) /* br cond to count reg */ | |
109 | dest = read_register (CTR_REGNUM) & ~3; | |
110 | ||
111 | else return -1; | |
112 | break; | |
113 | ||
114 | default: return -1; | |
115 | } | |
818de002 | 116 | return (dest < TEXT_SEGMENT_BASE) ? safety : dest; |
41abdfbd JG |
117 | } |
118 | ||
119 | ||
120 | ||
121 | /* AIX does not support PT_STEP. Simulate it. */ | |
122 | ||
997cc2c0 | 123 | void |
41abdfbd | 124 | single_step (signal) |
997cc2c0 | 125 | int signal; |
41abdfbd JG |
126 | { |
127 | #define INSNLEN(OPCODE) 4 | |
128 | ||
129 | static char breakp[] = BREAKPOINT; | |
030fb5cb JK |
130 | int ii, insn; |
131 | CORE_ADDR loc; | |
132 | CORE_ADDR breaks[2]; | |
133 | int opcode; | |
41abdfbd JG |
134 | |
135 | if (!one_stepped) { | |
41abdfbd JG |
136 | loc = read_pc (); |
137 | ||
030fb5cb | 138 | read_memory (loc, &insn, 4); |
41abdfbd JG |
139 | |
140 | breaks[0] = loc + INSNLEN(insn); | |
141 | opcode = insn >> 26; | |
142 | breaks[1] = branch_dest (opcode, insn, loc, breaks[0]); | |
143 | ||
818de002 PB |
144 | /* Don't put two breakpoints on the same address. */ |
145 | if (breaks[1] == breaks[0]) | |
146 | breaks[1] = -1; | |
147 | ||
030fb5cb | 148 | stepBreaks[1].address = 0; |
41abdfbd JG |
149 | |
150 | for (ii=0; ii < 2; ++ii) { | |
151 | ||
152 | /* ignore invalid breakpoint. */ | |
153 | if ( breaks[ii] == -1) | |
154 | continue; | |
155 | ||
030fb5cb | 156 | read_memory (breaks[ii], stepBreaks[ii].data, 4); |
41abdfbd | 157 | |
030fb5cb | 158 | write_memory (breaks[ii], breakp, 4); |
41abdfbd JG |
159 | stepBreaks[ii].address = breaks[ii]; |
160 | } | |
161 | ||
162 | one_stepped = 1; | |
997cc2c0 | 163 | } else { |
41abdfbd JG |
164 | |
165 | /* remove step breakpoints. */ | |
166 | for (ii=0; ii < 2; ++ii) | |
030fb5cb | 167 | if (stepBreaks[ii].address != 0) |
41abdfbd | 168 | write_memory |
030fb5cb | 169 | (stepBreaks[ii].address, stepBreaks[ii].data, 4); |
41abdfbd JG |
170 | |
171 | one_stepped = 0; | |
172 | } | |
997cc2c0 | 173 | errno = 0; /* FIXME, don't ignore errors! */ |
030fb5cb | 174 | /* What errors? {read,write}_memory call error(). */ |
41abdfbd | 175 | } |
41abdfbd JG |
176 | |
177 | ||
178 | /* return pc value after skipping a function prologue. */ | |
179 | ||
180 | skip_prologue (pc) | |
ecf4059f | 181 | CORE_ADDR pc; |
41abdfbd JG |
182 | { |
183 | unsigned int tmp; | |
ecf4059f | 184 | unsigned int op; /* FIXME, assumes instruction size matches host int!!! */ |
41abdfbd JG |
185 | |
186 | if (target_read_memory (pc, (char *)&op, sizeof (op))) | |
187 | return pc; /* Can't access it -- assume no prologue. */ | |
188 | SWAP_TARGET_AND_HOST (&op, sizeof (op)); | |
189 | ||
190 | /* Assume that subsequent fetches can fail with low probability. */ | |
191 | ||
192 | if (op == 0x7c0802a6) { /* mflr r0 */ | |
193 | pc += 4; | |
194 | op = read_memory_integer (pc, 4); | |
195 | } | |
41abdfbd JG |
196 | |
197 | if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */ | |
198 | pc += 4; | |
199 | op = read_memory_integer (pc, 4); | |
200 | } | |
201 | ||
202 | if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */ | |
203 | pc += 4; | |
204 | op = read_memory_integer (pc, 4); | |
1eeba686 PB |
205 | |
206 | /* At this point, make sure this is not a trampoline function | |
207 | (a function that simply calls another functions, and nothing else). | |
208 | If the next is not a nop, this branch was part of the function | |
209 | prologue. */ | |
210 | ||
211 | if (op == 0x4def7b82 || /* crorc 15, 15, 15 */ | |
212 | op == 0x0) | |
213 | return pc - 4; /* don't skip over this branch */ | |
41abdfbd JG |
214 | } |
215 | ||
cdb1cc92 ILT |
216 | if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */ |
217 | pc += 4; /* store floating register double */ | |
218 | op = read_memory_integer (pc, 4); | |
219 | } | |
220 | ||
41abdfbd JG |
221 | if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */ |
222 | pc += 4; | |
223 | op = read_memory_integer (pc, 4); | |
224 | } | |
225 | ||
226 | while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */ | |
227 | (tmp == 0x9421) || /* stu r1, NUM(r1) */ | |
cdb1cc92 | 228 | (tmp == 0x93e1)) /* st r31,NUM(r1) */ |
41abdfbd JG |
229 | { |
230 | pc += 4; | |
231 | op = read_memory_integer (pc, 4); | |
232 | } | |
233 | ||
234 | while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */ | |
235 | pc += 4; /* l r30, ... */ | |
236 | op = read_memory_integer (pc, 4); | |
237 | } | |
238 | ||
507e4004 | 239 | /* store parameters into stack */ |
818de002 PB |
240 | while( |
241 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ | |
242 | (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */ | |
243 | (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */ | |
244 | (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */ | |
245 | { | |
246 | pc += 4; /* store fpr double */ | |
247 | op = read_memory_integer (pc, 4); | |
248 | } | |
41abdfbd JG |
249 | |
250 | if (op == 0x603f0000) { /* oril r31, r1, 0x0 */ | |
251 | pc += 4; /* this happens if r31 is used as */ | |
252 | op = read_memory_integer (pc, 4); /* frame ptr. (gcc does that) */ | |
253 | ||
818de002 PB |
254 | tmp = 0; |
255 | while ((op >> 16) == (0x907f + tmp)) { /* st r3, NUM(r31) */ | |
256 | pc += 4; /* st r4, NUM(r31), ... */ | |
41abdfbd | 257 | op = read_memory_integer (pc, 4); |
818de002 | 258 | tmp += 0x20; |
41abdfbd JG |
259 | } |
260 | } | |
507e4004 PB |
261 | #if 0 |
262 | /* I have problems with skipping over __main() that I need to address | |
263 | * sometime. Previously, I used to use misc_function_vector which | |
264 | * didn't work as well as I wanted to be. -MGO */ | |
265 | ||
266 | /* If the first thing after skipping a prolog is a branch to a function, | |
267 | this might be a call to an initializer in main(), introduced by gcc2. | |
268 | We'd like to skip over it as well. Fortunately, xlc does some extra | |
269 | work before calling a function right after a prologue, thus we can | |
270 | single out such gcc2 behaviour. */ | |
271 | ||
272 | ||
273 | if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */ | |
274 | op = read_memory_integer (pc+4, 4); | |
275 | ||
276 | if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */ | |
277 | ||
278 | /* check and see if we are in main. If so, skip over this initializer | |
279 | function as well. */ | |
280 | ||
281 | tmp = find_pc_misc_function (pc); | |
2e4964ad | 282 | if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main")) |
507e4004 PB |
283 | return pc + 8; |
284 | } | |
285 | } | |
286 | #endif /* 0 */ | |
287 | ||
41abdfbd JG |
288 | return pc; |
289 | } | |
290 | ||
818de002 | 291 | |
41abdfbd JG |
292 | /************************************************************************* |
293 | Support for creating pushind a dummy frame into the stack, and popping | |
294 | frames, etc. | |
295 | *************************************************************************/ | |
296 | ||
818de002 PB |
297 | /* The total size of dummy frame is 436, which is; |
298 | ||
299 | 32 gpr's - 128 bytes | |
300 | 32 fpr's - 256 " | |
301 | 7 the rest - 28 " | |
302 | and 24 extra bytes for the callee's link area. The last 24 bytes | |
303 | for the link area might not be necessary, since it will be taken | |
304 | care of by push_arguments(). */ | |
305 | ||
306 | #define DUMMY_FRAME_SIZE 436 | |
307 | ||
41abdfbd JG |
308 | #define DUMMY_FRAME_ADDR_SIZE 10 |
309 | ||
310 | /* Make sure you initialize these in somewhere, in case gdb gives up what it | |
818de002 | 311 | was debugging and starts debugging something else. FIXMEibm */ |
41abdfbd JG |
312 | |
313 | static int dummy_frame_count = 0; | |
314 | static int dummy_frame_size = 0; | |
315 | static CORE_ADDR *dummy_frame_addr = 0; | |
316 | ||
317 | extern int stop_stack_dummy; | |
318 | ||
319 | /* push a dummy frame into stack, save all register. Currently we are saving | |
320 | only gpr's and fpr's, which is not good enough! FIXMEmgo */ | |
321 | ||
ecf4059f | 322 | void |
41abdfbd JG |
323 | push_dummy_frame () |
324 | { | |
325 | int sp, pc; /* stack pointer and link register */ | |
326 | int ii; | |
327 | ||
5f1c39ef | 328 | target_fetch_registers (-1); |
6c6afbb9 | 329 | |
41abdfbd JG |
330 | if (dummy_frame_count >= dummy_frame_size) { |
331 | dummy_frame_size += DUMMY_FRAME_ADDR_SIZE; | |
332 | if (dummy_frame_addr) | |
333 | dummy_frame_addr = (CORE_ADDR*) xrealloc | |
334 | (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size)); | |
335 | else | |
336 | dummy_frame_addr = (CORE_ADDR*) | |
337 | xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size)); | |
338 | } | |
339 | ||
340 | sp = read_register(SP_REGNUM); | |
341 | pc = read_register(PC_REGNUM); | |
342 | ||
343 | dummy_frame_addr [dummy_frame_count++] = sp; | |
344 | ||
345 | /* Be careful! If the stack pointer is not decremented first, then kernel | |
6c6afbb9 | 346 | thinks he is free to use the space underneath it. And kernel actually |
41abdfbd JG |
347 | uses that area for IPC purposes when executing ptrace(2) calls. So |
348 | before writing register values into the new frame, decrement and update | |
349 | %sp first in order to secure your frame. */ | |
350 | ||
818de002 | 351 | write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE); |
41abdfbd | 352 | |
41abdfbd JG |
353 | /* gdb relies on the state of current_frame. We'd better update it, |
354 | otherwise things like do_registers_info() wouldn't work properly! */ | |
355 | ||
356 | flush_cached_frames (); | |
818de002 | 357 | set_current_frame (create_new_frame (sp-DUMMY_FRAME_SIZE, pc)); |
41abdfbd JG |
358 | |
359 | /* save program counter in link register's space. */ | |
360 | write_memory (sp+8, &pc, 4); | |
361 | ||
6c6afbb9 | 362 | /* save all floating point and general purpose registers here. */ |
41abdfbd JG |
363 | |
364 | /* fpr's, f0..f31 */ | |
365 | for (ii = 0; ii < 32; ++ii) | |
366 | write_memory (sp-8-(ii*8), ®isters[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8); | |
367 | ||
368 | /* gpr's r0..r31 */ | |
369 | for (ii=1; ii <=32; ++ii) | |
370 | write_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); | |
371 | ||
818de002 PB |
372 | /* so far, 32*2 + 32 words = 384 bytes have been written. |
373 | 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */ | |
374 | ||
375 | for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) { | |
376 | write_memory (sp-384-(ii*4), | |
377 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); | |
378 | } | |
379 | ||
380 | /* Save sp or so called back chain right here. */ | |
381 | write_memory (sp-DUMMY_FRAME_SIZE, &sp, 4); | |
382 | sp -= DUMMY_FRAME_SIZE; | |
41abdfbd JG |
383 | |
384 | /* And finally, this is the back chain. */ | |
385 | write_memory (sp+8, &pc, 4); | |
386 | } | |
387 | ||
388 | ||
389 | /* Pop a dummy frame. | |
390 | ||
391 | In rs6000 when we push a dummy frame, we save all of the registers. This | |
392 | is usually done before user calls a function explicitly. | |
393 | ||
818de002 PB |
394 | After a dummy frame is pushed, some instructions are copied into stack, |
395 | and stack pointer is decremented even more. Since we don't have a frame | |
396 | pointer to get back to the parent frame of the dummy, we start having | |
397 | trouble poping it. Therefore, we keep a dummy frame stack, keeping | |
398 | addresses of dummy frames as such. When poping happens and when we | |
399 | detect that was a dummy frame, we pop it back to its parent by using | |
400 | dummy frame stack (`dummy_frame_addr' array). | |
ecf4059f JG |
401 | |
402 | FIXME: This whole concept is broken. You should be able to detect | |
403 | a dummy stack frame *on the user's stack itself*. When you do, | |
404 | then you know the format of that stack frame -- including its | |
405 | saved SP register! There should *not* be a separate stack in the | |
d6434f39 | 406 | GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92 |
41abdfbd JG |
407 | */ |
408 | ||
409 | pop_dummy_frame () | |
410 | { | |
411 | CORE_ADDR sp, pc; | |
412 | int ii; | |
413 | sp = dummy_frame_addr [--dummy_frame_count]; | |
414 | ||
415 | /* restore all fpr's. */ | |
416 | for (ii = 1; ii <= 32; ++ii) | |
417 | read_memory (sp-(ii*8), ®isters[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8); | |
418 | ||
419 | /* restore all gpr's */ | |
420 | for (ii=1; ii <= 32; ++ii) { | |
421 | read_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); | |
422 | } | |
423 | ||
818de002 PB |
424 | /* restore the rest of the registers. */ |
425 | for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) | |
426 | read_memory (sp-384-(ii*4), | |
427 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); | |
428 | ||
429 | read_memory (sp-(DUMMY_FRAME_SIZE-8), | |
430 | ®isters [REGISTER_BYTE(PC_REGNUM)], 4); | |
41abdfbd JG |
431 | |
432 | /* when a dummy frame was being pushed, we had to decrement %sp first, in | |
433 | order to secure astack space. Thus, saved %sp (or %r1) value, is not the | |
434 | one we should restore. Change it with the one we need. */ | |
435 | ||
436 | *(int*)®isters [REGISTER_BYTE(FP_REGNUM)] = sp; | |
437 | ||
438 | /* Now we can restore all registers. */ | |
439 | ||
5f1c39ef | 440 | target_store_registers (-1); |
41abdfbd JG |
441 | pc = read_pc (); |
442 | flush_cached_frames (); | |
443 | set_current_frame (create_new_frame (sp, pc)); | |
444 | } | |
445 | ||
446 | ||
447 | /* pop the innermost frame, go back to the caller. */ | |
448 | ||
ecf4059f | 449 | void |
41abdfbd JG |
450 | pop_frame () |
451 | { | |
452 | int pc, lr, sp, prev_sp; /* %pc, %lr, %sp */ | |
6c6afbb9 | 453 | struct aix_framedata fdata; |
41abdfbd | 454 | FRAME fr = get_current_frame (); |
41abdfbd | 455 | int addr, ii; |
41abdfbd JG |
456 | |
457 | pc = read_pc (); | |
458 | sp = FRAME_FP (fr); | |
459 | ||
460 | if (stop_stack_dummy && dummy_frame_count) { | |
461 | pop_dummy_frame (); | |
462 | return; | |
463 | } | |
464 | ||
465 | /* figure out previous %pc value. If the function is frameless, it is | |
466 | still in the link register, otherwise walk the frames and retrieve the | |
467 | saved %pc value in the previous frame. */ | |
468 | ||
469 | addr = get_pc_function_start (fr->pc) + FUNCTION_START_OFFSET; | |
6c6afbb9 | 470 | function_frame_info (addr, &fdata); |
41abdfbd JG |
471 | |
472 | read_memory (sp, &prev_sp, 4); | |
6c6afbb9 | 473 | if (fdata.frameless) |
41abdfbd JG |
474 | lr = read_register (LR_REGNUM); |
475 | else | |
476 | read_memory (prev_sp+8, &lr, 4); | |
477 | ||
478 | /* reset %pc value. */ | |
479 | write_register (PC_REGNUM, lr); | |
480 | ||
481 | /* reset register values if any was saved earlier. */ | |
6c6afbb9 | 482 | addr = prev_sp - fdata.offset; |
41abdfbd | 483 | |
6c6afbb9 PB |
484 | if (fdata.saved_gpr != -1) |
485 | for (ii=fdata.saved_gpr; ii <= 31; ++ii) { | |
41abdfbd | 486 | read_memory (addr, ®isters [REGISTER_BYTE (ii)], 4); |
cdb1cc92 | 487 | addr += 4; |
41abdfbd JG |
488 | } |
489 | ||
6c6afbb9 PB |
490 | if (fdata.saved_fpr != -1) |
491 | for (ii=fdata.saved_fpr; ii <= 31; ++ii) { | |
41abdfbd JG |
492 | read_memory (addr, ®isters [REGISTER_BYTE (ii+FP0_REGNUM)], 8); |
493 | addr += 8; | |
494 | } | |
495 | ||
496 | write_register (SP_REGNUM, prev_sp); | |
5f1c39ef | 497 | target_store_registers (-1); |
41abdfbd JG |
498 | flush_cached_frames (); |
499 | set_current_frame (create_new_frame (prev_sp, lr)); | |
500 | } | |
501 | ||
502 | ||
503 | /* fixup the call sequence of a dummy function, with the real function address. | |
504 | its argumets will be passed by gdb. */ | |
505 | ||
ecf4059f | 506 | void |
41abdfbd JG |
507 | fix_call_dummy(dummyname, pc, fun, nargs, type) |
508 | char *dummyname; | |
ecf4059f JG |
509 | CORE_ADDR pc; |
510 | CORE_ADDR fun; | |
41abdfbd JG |
511 | int nargs; /* not used */ |
512 | int type; /* not used */ | |
41abdfbd JG |
513 | { |
514 | #define TOC_ADDR_OFFSET 20 | |
515 | #define TARGET_ADDR_OFFSET 28 | |
516 | ||
517 | int ii; | |
ecf4059f JG |
518 | CORE_ADDR target_addr; |
519 | CORE_ADDR tocvalue; | |
41abdfbd JG |
520 | |
521 | target_addr = fun; | |
522 | tocvalue = find_toc_address (target_addr); | |
523 | ||
524 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET); | |
525 | ii = (ii & 0xffff0000) | (tocvalue >> 16); | |
526 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii; | |
527 | ||
528 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4); | |
529 | ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff); | |
530 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii; | |
531 | ||
532 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET); | |
533 | ii = (ii & 0xffff0000) | (target_addr >> 16); | |
534 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii; | |
535 | ||
536 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4); | |
537 | ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff); | |
538 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii; | |
539 | } | |
540 | ||
541 | ||
41abdfbd | 542 | /* return information about a function frame. |
6c6afbb9 | 543 | in struct aix_frameinfo fdata: |
cdb1cc92 ILT |
544 | - frameless is TRUE, if function does not have a frame. |
545 | - nosavedpc is TRUE, if function does not save %pc value in its frame. | |
41abdfbd JG |
546 | - offset is the number of bytes used in the frame to save registers. |
547 | - saved_gpr is the number of the first saved gpr. | |
548 | - saved_fpr is the number of the first saved fpr. | |
6c6afbb9 PB |
549 | - alloca_reg is the number of the register used for alloca() handling. |
550 | Otherwise -1. | |
41abdfbd | 551 | */ |
ecf4059f | 552 | void |
6c6afbb9 | 553 | function_frame_info (pc, fdata) |
d6434f39 | 554 | CORE_ADDR pc; |
6c6afbb9 | 555 | struct aix_framedata *fdata; |
41abdfbd JG |
556 | { |
557 | unsigned int tmp; | |
558 | register unsigned int op; | |
559 | ||
6c6afbb9 PB |
560 | fdata->offset = 0; |
561 | fdata->saved_gpr = fdata->saved_fpr = fdata->alloca_reg = -1; | |
cdb1cc92 | 562 | fdata->frameless = 1; |
41abdfbd | 563 | |
41abdfbd JG |
564 | op = read_memory_integer (pc, 4); |
565 | if (op == 0x7c0802a6) { /* mflr r0 */ | |
566 | pc += 4; | |
567 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 568 | fdata->nosavedpc = 0; |
6c6afbb9 | 569 | fdata->frameless = 0; |
41abdfbd | 570 | } |
cdb1cc92 ILT |
571 | else /* else, pc is not saved */ |
572 | fdata->nosavedpc = 1; | |
41abdfbd JG |
573 | |
574 | if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */ | |
575 | pc += 4; | |
576 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 577 | fdata->frameless = 0; |
41abdfbd JG |
578 | } |
579 | ||
580 | if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */ | |
581 | pc += 4; | |
582 | op = read_memory_integer (pc, 4); | |
1eeba686 PB |
583 | /* At this point, make sure this is not a trampoline function |
584 | (a function that simply calls another functions, and nothing else). | |
585 | If the next is not a nop, this branch was part of the function | |
586 | prologue. */ | |
587 | ||
588 | if (op == 0x4def7b82 || /* crorc 15, 15, 15 */ | |
589 | op == 0x0) | |
590 | return; /* prologue is over */ | |
cdb1cc92 | 591 | fdata->frameless = 0; |
41abdfbd JG |
592 | } |
593 | ||
594 | if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */ | |
595 | pc += 4; /* store floating register double */ | |
596 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 597 | fdata->frameless = 0; |
41abdfbd JG |
598 | } |
599 | ||
600 | if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */ | |
601 | int tmp2; | |
6c6afbb9 | 602 | fdata->saved_gpr = (op >> 21) & 0x1f; |
41abdfbd JG |
603 | tmp2 = op & 0xffff; |
604 | if (tmp2 > 0x7fff) | |
cdb1cc92 | 605 | tmp2 = (~0 &~ 0xffff) | tmp2; |
41abdfbd JG |
606 | |
607 | if (tmp2 < 0) { | |
608 | tmp2 = tmp2 * -1; | |
6c6afbb9 PB |
609 | fdata->saved_fpr = (tmp2 - ((32 - fdata->saved_gpr) * 4)) / 8; |
610 | if ( fdata->saved_fpr > 0) | |
611 | fdata->saved_fpr = 32 - fdata->saved_fpr; | |
41abdfbd | 612 | else |
6c6afbb9 | 613 | fdata->saved_fpr = -1; |
41abdfbd | 614 | } |
6c6afbb9 PB |
615 | fdata->offset = tmp2; |
616 | pc += 4; | |
617 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 618 | fdata->frameless = 0; |
41abdfbd | 619 | } |
6c6afbb9 PB |
620 | |
621 | while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */ | |
622 | (tmp == 0x9421) || /* stu r1, NUM(r1) */ | |
cdb1cc92 | 623 | (tmp == 0x93e1)) /* st r31, NUM(r1) */ |
6c6afbb9 | 624 | { |
cdb1cc92 ILT |
625 | int tmp2; |
626 | ||
6c6afbb9 PB |
627 | /* gcc takes a short cut and uses this instruction to save r31 only. */ |
628 | ||
cdb1cc92 | 629 | if (tmp == 0x93e1) { |
6c6afbb9 PB |
630 | if (fdata->offset) |
631 | /* fatal ("Unrecognized prolog."); */ | |
632 | printf ("Unrecognized prolog!\n"); | |
633 | ||
634 | fdata->saved_gpr = 31; | |
cdb1cc92 ILT |
635 | tmp2 = op & 0xffff; |
636 | if (tmp2 > 0x7fff) { | |
637 | tmp2 = - ((~0 &~ 0xffff) | tmp2); | |
638 | fdata->saved_fpr = (tmp2 - ((32 - 31) * 4)) / 8; | |
639 | if ( fdata->saved_fpr > 0) | |
640 | fdata->saved_fpr = 32 - fdata->saved_fpr; | |
641 | else | |
642 | fdata->saved_fpr = -1; | |
643 | } | |
644 | fdata->offset = tmp2; | |
6c6afbb9 PB |
645 | } |
646 | pc += 4; | |
647 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 648 | fdata->frameless = 0; |
6c6afbb9 PB |
649 | } |
650 | ||
651 | while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */ | |
652 | pc += 4; /* l r30, ... */ | |
653 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 654 | fdata->frameless = 0; |
6c6afbb9 PB |
655 | } |
656 | ||
657 | /* store parameters into stack */ | |
658 | while( | |
659 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ | |
660 | (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */ | |
661 | (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */ | |
662 | (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */ | |
663 | { | |
664 | pc += 4; /* store fpr double */ | |
665 | op = read_memory_integer (pc, 4); | |
cdb1cc92 | 666 | fdata->frameless = 0; |
6c6afbb9 PB |
667 | } |
668 | ||
cdb1cc92 | 669 | if (op == 0x603f0000) { /* oril r31, r1, 0x0 */ |
6c6afbb9 | 670 | fdata->alloca_reg = 31; |
cdb1cc92 ILT |
671 | fdata->frameless = 0; |
672 | } | |
41abdfbd JG |
673 | } |
674 | ||
675 | ||
676 | /* Pass the arguments in either registers, or in the stack. In RS6000, the first | |
677 | eight words of the argument list (that might be less than eight parameters if | |
678 | some parameters occupy more than one word) are passed in r3..r11 registers. | |
679 | float and double parameters are passed in fpr's, in addition to that. Rest of | |
680 | the parameters if any are passed in user stack. There might be cases in which | |
681 | half of the parameter is copied into registers, the other half is pushed into | |
682 | stack. | |
683 | ||
684 | If the function is returning a structure, then the return address is passed | |
685 | in r3, then the first 7 words of the parametes can be passed in registers, | |
686 | starting from r4. */ | |
687 | ||
688 | CORE_ADDR | |
689 | push_arguments (nargs, args, sp, struct_return, struct_addr) | |
690 | int nargs; | |
691 | value *args; | |
692 | CORE_ADDR sp; | |
693 | int struct_return; | |
694 | CORE_ADDR struct_addr; | |
695 | { | |
696 | int ii, len; | |
697 | int argno; /* current argument number */ | |
698 | int argbytes; /* current argument byte */ | |
699 | char tmp_buffer [50]; | |
700 | value arg; | |
701 | int f_argno = 0; /* current floating point argno */ | |
702 | ||
703 | CORE_ADDR saved_sp, pc; | |
704 | ||
705 | if ( dummy_frame_count <= 0) | |
706 | printf ("FATAL ERROR -push_arguments()! frame not found!!\n"); | |
707 | ||
708 | /* The first eight words of ther arguments are passed in registers. Copy | |
709 | them appropriately. | |
710 | ||
711 | If the function is returning a `struct', then the first word (which | |
712 | will be passed in r3) is used for struct return address. In that | |
713 | case we should advance one word and start from r4 register to copy | |
714 | parameters. */ | |
715 | ||
716 | ii = struct_return ? 1 : 0; | |
717 | ||
718 | for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) { | |
719 | ||
720 | arg = value_arg_coerce (args[argno]); | |
721 | len = TYPE_LENGTH (VALUE_TYPE (arg)); | |
722 | ||
723 | if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT) { | |
724 | ||
725 | /* floating point arguments are passed in fpr's, as well as gpr's. | |
726 | There are 13 fpr's reserved for passing parameters. At this point | |
727 | there is no way we would run out of them. */ | |
728 | ||
729 | if (len > 8) | |
730 | printf ( | |
731 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); | |
732 | ||
733 | bcopy (VALUE_CONTENTS (arg), | |
734 | ®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], len); | |
735 | ++f_argno; | |
736 | } | |
737 | ||
738 | if (len > 4) { | |
739 | ||
740 | /* Argument takes more than one register. */ | |
741 | while (argbytes < len) { | |
742 | ||
743 | *(int*)®isters[REGISTER_BYTE(ii+3)] = 0; | |
744 | bcopy ( ((char*)VALUE_CONTENTS (arg))+argbytes, | |
745 | ®isters[REGISTER_BYTE(ii+3)], | |
746 | (len - argbytes) > 4 ? 4 : len - argbytes); | |
747 | ++ii, argbytes += 4; | |
748 | ||
749 | if (ii >= 8) | |
750 | goto ran_out_of_registers_for_arguments; | |
751 | } | |
752 | argbytes = 0; | |
753 | --ii; | |
754 | } | |
755 | else { /* Argument can fit in one register. No problem. */ | |
756 | *(int*)®isters[REGISTER_BYTE(ii+3)] = 0; | |
757 | bcopy (VALUE_CONTENTS (arg), ®isters[REGISTER_BYTE(ii+3)], len); | |
758 | } | |
759 | ++argno; | |
760 | } | |
761 | ||
762 | ran_out_of_registers_for_arguments: | |
763 | ||
764 | /* location for 8 parameters are always reserved. */ | |
765 | sp -= 4 * 8; | |
766 | ||
767 | /* another six words for back chain, TOC register, link register, etc. */ | |
768 | sp -= 24; | |
769 | ||
770 | /* if there are more arguments, allocate space for them in | |
771 | the stack, then push them starting from the ninth one. */ | |
772 | ||
773 | if ((argno < nargs) || argbytes) { | |
774 | int space = 0, jj; | |
775 | value val; | |
776 | ||
777 | if (argbytes) { | |
778 | space += ((len - argbytes + 3) & -4); | |
779 | jj = argno + 1; | |
780 | } | |
781 | else | |
782 | jj = argno; | |
783 | ||
784 | for (; jj < nargs; ++jj) { | |
785 | val = value_arg_coerce (args[jj]); | |
786 | space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4; | |
787 | } | |
788 | ||
789 | /* add location required for the rest of the parameters */ | |
790 | space = (space + 7) & -8; | |
791 | sp -= space; | |
792 | ||
793 | /* This is another instance we need to be concerned about securing our | |
794 | stack space. If we write anything underneath %sp (r1), we might conflict | |
795 | with the kernel who thinks he is free to use this area. So, update %sp | |
796 | first before doing anything else. */ | |
797 | ||
798 | write_register (SP_REGNUM, sp); | |
799 | ||
41abdfbd JG |
800 | /* if the last argument copied into the registers didn't fit there |
801 | completely, push the rest of it into stack. */ | |
802 | ||
803 | if (argbytes) { | |
804 | write_memory ( | |
805 | sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes); | |
806 | ++argno; | |
807 | ii += ((len - argbytes + 3) & -4) / 4; | |
808 | } | |
809 | ||
810 | /* push the rest of the arguments into stack. */ | |
811 | for (; argno < nargs; ++argno) { | |
812 | ||
813 | arg = value_arg_coerce (args[argno]); | |
814 | len = TYPE_LENGTH (VALUE_TYPE (arg)); | |
815 | ||
816 | ||
817 | /* float types should be passed in fpr's, as well as in the stack. */ | |
818 | if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT && f_argno < 13) { | |
819 | ||
820 | if (len > 8) | |
821 | printf ( | |
822 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); | |
823 | ||
824 | bcopy (VALUE_CONTENTS (arg), | |
825 | ®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], len); | |
826 | ++f_argno; | |
827 | } | |
828 | ||
829 | write_memory (sp+24+(ii*4), VALUE_CONTENTS (arg), len); | |
830 | ii += ((len + 3) & -4) / 4; | |
831 | } | |
832 | } | |
6c6afbb9 | 833 | else |
41abdfbd JG |
834 | /* Secure stack areas first, before doing anything else. */ |
835 | write_register (SP_REGNUM, sp); | |
836 | ||
41abdfbd JG |
837 | saved_sp = dummy_frame_addr [dummy_frame_count - 1]; |
838 | read_memory (saved_sp, tmp_buffer, 24); | |
839 | write_memory (sp, tmp_buffer, 24); | |
840 | ||
841 | write_memory (sp, &saved_sp, 4); /* set back chain properly */ | |
842 | ||
5f1c39ef | 843 | target_store_registers (-1); |
41abdfbd JG |
844 | return sp; |
845 | } | |
846 | ||
847 | /* a given return value in `regbuf' with a type `valtype', extract and copy its | |
848 | value into `valbuf' */ | |
849 | ||
ecf4059f | 850 | void |
41abdfbd JG |
851 | extract_return_value (valtype, regbuf, valbuf) |
852 | struct type *valtype; | |
853 | char regbuf[REGISTER_BYTES]; | |
854 | char *valbuf; | |
855 | { | |
856 | ||
857 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT) { | |
858 | ||
859 | double dd; float ff; | |
860 | /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes. | |
861 | We need to truncate the return value into float size (4 byte) if | |
862 | necessary. */ | |
863 | ||
864 | if (TYPE_LENGTH (valtype) > 4) /* this is a double */ | |
865 | bcopy (®buf[REGISTER_BYTE (FP0_REGNUM + 1)], valbuf, | |
866 | TYPE_LENGTH (valtype)); | |
867 | else { /* float */ | |
868 | bcopy (®buf[REGISTER_BYTE (FP0_REGNUM + 1)], &dd, 8); | |
869 | ff = (float)dd; | |
870 | bcopy (&ff, valbuf, sizeof(float)); | |
871 | } | |
872 | } | |
873 | else | |
874 | /* return value is copied starting from r3. */ | |
875 | bcopy (®buf[REGISTER_BYTE (3)], valbuf, TYPE_LENGTH (valtype)); | |
876 | } | |
877 | ||
878 | ||
ecf4059f JG |
879 | /* keep structure return address in this variable. |
880 | FIXME: This is a horrid kludge which should not be allowed to continue | |
881 | living. This only allows a single nested call to a structure-returning | |
882 | function. Come on, guys! -- gnu@cygnus.com, Aug 92 */ | |
41abdfbd JG |
883 | |
884 | CORE_ADDR rs6000_struct_return_address; | |
885 | ||
886 | ||
887 | /* Throw away this debugging code. FIXMEmgo. */ | |
ecf4059f | 888 | void |
41abdfbd JG |
889 | print_frame(fram) |
890 | int fram; | |
891 | { | |
892 | int ii, val; | |
893 | for (ii=0; ii<40; ++ii) { | |
894 | if ((ii % 4) == 0) | |
895 | printf ("\n"); | |
896 | val = read_memory_integer (fram + ii * 4, 4); | |
897 | printf ("0x%08x\t", val); | |
898 | } | |
899 | printf ("\n"); | |
900 | } | |
901 | ||
902 | ||
903 | ||
c2e4669f JG |
904 | /* Indirect function calls use a piece of trampoline code to do context |
905 | switching, i.e. to set the new TOC table. Skip such code if we are on | |
906 | its first instruction (as when we have single-stepped to here). | |
907 | Result is desired PC to step until, or NULL if we are not in | |
908 | trampoline code. */ | |
41abdfbd | 909 | |
ecf4059f | 910 | CORE_ADDR |
41abdfbd | 911 | skip_trampoline_code (pc) |
ecf4059f | 912 | CORE_ADDR pc; |
41abdfbd JG |
913 | { |
914 | register unsigned int ii, op; | |
915 | ||
916 | static unsigned trampoline_code[] = { | |
917 | 0x800b0000, /* l r0,0x0(r11) */ | |
918 | 0x90410014, /* st r2,0x14(r1) */ | |
919 | 0x7c0903a6, /* mtctr r0 */ | |
920 | 0x804b0004, /* l r2,0x4(r11) */ | |
921 | 0x816b0008, /* l r11,0x8(r11) */ | |
922 | 0x4e800420, /* bctr */ | |
923 | 0x4e800020, /* br */ | |
924 | 0 | |
925 | }; | |
926 | ||
927 | for (ii=0; trampoline_code[ii]; ++ii) { | |
928 | op = read_memory_integer (pc + (ii*4), 4); | |
929 | if (op != trampoline_code [ii]) | |
930 | return NULL; | |
931 | } | |
932 | ii = read_register (11); /* r11 holds destination addr */ | |
933 | pc = read_memory_integer (ii, 4); /* (r11) value */ | |
934 | return pc; | |
935 | } | |
936 | ||
ecf4059f JG |
937 | |
938 | /* Determines whether the function FI has a frame on the stack or not. | |
cdb1cc92 ILT |
939 | Called from the FRAMELESS_FUNCTION_INVOCATION macro in tm.h with a |
940 | second argument of 0, and from the FRAME_SAVED_PC macro with a | |
941 | second argument of 1. */ | |
ecf4059f JG |
942 | |
943 | int | |
cdb1cc92 | 944 | frameless_function_invocation (fi, pcsaved) |
ecf4059f | 945 | struct frame_info *fi; |
cdb1cc92 | 946 | int pcsaved; |
ecf4059f JG |
947 | { |
948 | CORE_ADDR func_start; | |
949 | struct aix_framedata fdata; | |
950 | ||
951 | func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET; | |
952 | ||
953 | /* If we failed to find the start of the function, it is a mistake | |
954 | to inspect the instructions. */ | |
955 | ||
956 | if (!func_start) | |
957 | return 0; | |
958 | ||
959 | function_frame_info (func_start, &fdata); | |
cdb1cc92 | 960 | return pcsaved ? fdata.nosavedpc : fdata.frameless; |
ecf4059f JG |
961 | } |
962 | ||
963 | ||
964 | /* If saved registers of frame FI are not known yet, read and cache them. | |
965 | &FDATAP contains aix_framedata; TDATAP can be NULL, | |
966 | in which case the framedata are read. */ | |
967 | ||
968 | static void | |
969 | frame_get_cache_fsr (fi, fdatap) | |
970 | struct frame_info *fi; | |
971 | struct aix_framedata *fdatap; | |
972 | { | |
973 | int ii; | |
974 | CORE_ADDR frame_addr; | |
975 | struct aix_framedata work_fdata; | |
976 | ||
977 | if (fi->cache_fsr) | |
978 | return; | |
979 | ||
980 | if (fdatap == NULL) { | |
981 | fdatap = &work_fdata; | |
982 | function_frame_info (get_pc_function_start (fi->pc), fdatap); | |
983 | } | |
984 | ||
985 | fi->cache_fsr = (struct frame_saved_regs *) | |
986 | obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs)); | |
987 | bzero (fi->cache_fsr, sizeof (struct frame_saved_regs)); | |
988 | ||
989 | if (fi->prev && fi->prev->frame) | |
990 | frame_addr = fi->prev->frame; | |
991 | else | |
992 | frame_addr = read_memory_integer (fi->frame, 4); | |
993 | ||
994 | /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr. | |
995 | All fpr's from saved_fpr to fp31 are saved right underneath caller | |
996 | stack pointer, starting from fp31 first. */ | |
997 | ||
998 | if (fdatap->saved_fpr >= 0) { | |
999 | for (ii=31; ii >= fdatap->saved_fpr; --ii) | |
1000 | fi->cache_fsr->regs [FP0_REGNUM + ii] = frame_addr - ((32 - ii) * 8); | |
1001 | frame_addr -= (32 - fdatap->saved_fpr) * 8; | |
1002 | } | |
1003 | ||
1004 | /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr. | |
1005 | All gpr's from saved_gpr to gpr31 are saved right under saved fprs, | |
1006 | starting from r31 first. */ | |
1007 | ||
1008 | if (fdatap->saved_gpr >= 0) | |
1009 | for (ii=31; ii >= fdatap->saved_gpr; --ii) | |
1010 | fi->cache_fsr->regs [ii] = frame_addr - ((32 - ii) * 4); | |
1011 | } | |
1012 | ||
1013 | /* Return the address of a frame. This is the inital %sp value when the frame | |
1014 | was first allocated. For functions calling alloca(), it might be saved in | |
1015 | an alloca register. */ | |
1016 | ||
1017 | CORE_ADDR | |
1018 | frame_initial_stack_address (fi) | |
1019 | struct frame_info *fi; | |
1020 | { | |
1021 | CORE_ADDR tmpaddr; | |
1022 | struct aix_framedata fdata; | |
1023 | struct frame_info *callee_fi; | |
1024 | ||
1025 | /* if the initial stack pointer (frame address) of this frame is known, | |
1026 | just return it. */ | |
1027 | ||
1028 | if (fi->initial_sp) | |
1029 | return fi->initial_sp; | |
1030 | ||
1031 | /* find out if this function is using an alloca register.. */ | |
1032 | ||
1033 | function_frame_info (get_pc_function_start (fi->pc), &fdata); | |
1034 | ||
1035 | /* if saved registers of this frame are not known yet, read and cache them. */ | |
1036 | ||
1037 | if (!fi->cache_fsr) | |
1038 | frame_get_cache_fsr (fi, &fdata); | |
1039 | ||
1040 | /* If no alloca register used, then fi->frame is the value of the %sp for | |
1041 | this frame, and it is good enough. */ | |
1042 | ||
1043 | if (fdata.alloca_reg < 0) { | |
1044 | fi->initial_sp = fi->frame; | |
1045 | return fi->initial_sp; | |
1046 | } | |
1047 | ||
1048 | /* This function has an alloca register. If this is the top-most frame | |
1049 | (with the lowest address), the value in alloca register is good. */ | |
1050 | ||
1051 | if (!fi->next) | |
1052 | return fi->initial_sp = read_register (fdata.alloca_reg); | |
1053 | ||
1054 | /* Otherwise, this is a caller frame. Callee has usually already saved | |
1055 | registers, but there are exceptions (such as when the callee | |
1056 | has no parameters). Find the address in which caller's alloca | |
1057 | register is saved. */ | |
1058 | ||
1059 | for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) { | |
1060 | ||
1061 | if (!callee_fi->cache_fsr) | |
cdb1cc92 | 1062 | frame_get_cache_fsr (callee_fi, NULL); |
ecf4059f JG |
1063 | |
1064 | /* this is the address in which alloca register is saved. */ | |
1065 | ||
1066 | tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg]; | |
1067 | if (tmpaddr) { | |
1068 | fi->initial_sp = read_memory_integer (tmpaddr, 4); | |
1069 | return fi->initial_sp; | |
1070 | } | |
1071 | ||
1072 | /* Go look into deeper levels of the frame chain to see if any one of | |
1073 | the callees has saved alloca register. */ | |
1074 | } | |
1075 | ||
1076 | /* If alloca register was not saved, by the callee (or any of its callees) | |
1077 | then the value in the register is still good. */ | |
1078 | ||
1079 | return fi->initial_sp = read_register (fdata.alloca_reg); | |
1080 | } | |
1081 | ||
1082 | /* xcoff_relocate_symtab - hook for symbol table relocation. | |
1083 | also reads shared libraries.. */ | |
1084 | ||
1085 | xcoff_relocate_symtab (pid) | |
1086 | unsigned int pid; | |
1087 | { | |
1088 | #define MAX_LOAD_SEGS 64 /* maximum number of load segments */ | |
1089 | ||
1090 | struct ld_info *ldi; | |
1091 | int temp; | |
1092 | ||
1093 | ldi = (void *) alloca(MAX_LOAD_SEGS * sizeof (*ldi)); | |
1094 | ||
1095 | /* According to my humble theory, AIX has some timing problems and | |
1096 | when the user stack grows, kernel doesn't update stack info in time | |
1097 | and ptrace calls step on user stack. That is why we sleep here a little, | |
1098 | and give kernel to update its internals. */ | |
1099 | ||
1100 | usleep (36000); | |
1101 | ||
1102 | errno = 0; | |
1103 | ptrace(PT_LDINFO, pid, (PTRACE_ARG3_TYPE) ldi, | |
1104 | MAX_LOAD_SEGS * sizeof(*ldi), ldi); | |
1105 | if (errno) { | |
1106 | perror_with_name ("ptrace ldinfo"); | |
1107 | return 0; | |
1108 | } | |
1109 | ||
1110 | vmap_ldinfo(ldi); | |
1111 | ||
1112 | do { | |
1113 | add_text_to_loadinfo (ldi->ldinfo_textorg, ldi->ldinfo_dataorg); | |
1114 | } while (ldi->ldinfo_next | |
1115 | && (ldi = (void *) (ldi->ldinfo_next + (char *) ldi))); | |
1116 | ||
1117 | #if 0 | |
1118 | /* Now that we've jumbled things around, re-sort them. */ | |
1119 | sort_minimal_symbols (); | |
1120 | #endif | |
1121 | ||
1122 | /* relocate the exec and core sections as well. */ | |
1123 | vmap_exec (); | |
1124 | } | |
1125 | \f | |
1126 | /* Keep an array of load segment information and their TOC table addresses. | |
1127 | This info will be useful when calling a shared library function by hand. */ | |
1128 | ||
1129 | struct loadinfo { | |
1130 | CORE_ADDR textorg, dataorg; | |
1131 | unsigned long toc_offset; | |
1132 | }; | |
1133 | ||
1134 | #define LOADINFOLEN 10 | |
1135 | ||
ecf4059f JG |
1136 | static struct loadinfo *loadinfo = NULL; |
1137 | static int loadinfolen = 0; | |
1138 | static int loadinfotocindex = 0; | |
3c02636b | 1139 | static int loadinfotextindex = 0; |
ecf4059f JG |
1140 | |
1141 | ||
1142 | void | |
1143 | xcoff_init_loadinfo () | |
1144 | { | |
1145 | loadinfotocindex = 0; | |
1146 | loadinfotextindex = 0; | |
1147 | ||
1148 | if (loadinfolen == 0) { | |
1149 | loadinfo = (struct loadinfo *) | |
1150 | xmalloc (sizeof (struct loadinfo) * LOADINFOLEN); | |
1151 | loadinfolen = LOADINFOLEN; | |
1152 | } | |
1153 | } | |
1154 | ||
1155 | ||
1156 | /* FIXME -- this is never called! */ | |
1157 | void | |
1158 | free_loadinfo () | |
1159 | { | |
1160 | if (loadinfo) | |
1161 | free (loadinfo); | |
1162 | loadinfo = NULL; | |
1163 | loadinfolen = 0; | |
1164 | loadinfotocindex = 0; | |
1165 | loadinfotextindex = 0; | |
1166 | } | |
1167 | ||
1168 | /* this is called from xcoffread.c */ | |
1169 | ||
1170 | void | |
1171 | xcoff_add_toc_to_loadinfo (unsigned long tocoff) | |
1172 | { | |
1173 | while (loadinfotocindex >= loadinfolen) { | |
1174 | loadinfolen += LOADINFOLEN; | |
1175 | loadinfo = (struct loadinfo *) | |
1176 | xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen); | |
1177 | } | |
1178 | loadinfo [loadinfotocindex++].toc_offset = tocoff; | |
1179 | } | |
1180 | ||
1181 | ||
2aefe6e4 | 1182 | void |
ecf4059f JG |
1183 | add_text_to_loadinfo (textaddr, dataaddr) |
1184 | CORE_ADDR textaddr; | |
1185 | CORE_ADDR dataaddr; | |
1186 | { | |
1187 | while (loadinfotextindex >= loadinfolen) { | |
1188 | loadinfolen += LOADINFOLEN; | |
1189 | loadinfo = (struct loadinfo *) | |
1190 | xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen); | |
1191 | } | |
1192 | loadinfo [loadinfotextindex].textorg = textaddr; | |
1193 | loadinfo [loadinfotextindex].dataorg = dataaddr; | |
1194 | ++loadinfotextindex; | |
1195 | } | |
1196 | ||
1197 | ||
1198 | /* FIXME: This assumes that the "textorg" and "dataorg" elements | |
1199 | of a member of this array are correlated with the "toc_offset" | |
1200 | element of the same member. But they are sequentially assigned in wildly | |
1201 | different places, and probably there is no correlation. FIXME! */ | |
1202 | ||
1203 | static CORE_ADDR | |
1204 | find_toc_address (pc) | |
1205 | CORE_ADDR pc; | |
1206 | { | |
1207 | int ii, toc_entry, tocbase = 0; | |
1208 | ||
1209 | for (ii=0; ii < loadinfotextindex; ++ii) | |
1210 | if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) { | |
1211 | toc_entry = ii; | |
1212 | tocbase = loadinfo[ii].textorg; | |
1213 | } | |
1214 | ||
1215 | return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset; | |
1216 | } |