Commit | Line | Data |
---|---|---|
41abdfbd | 1 | /* Target-dependent code for GDB, the GNU debugger. |
18b46e7c | 2 | Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995 |
07aa9fdc | 3 | Free Software Foundation, Inc. |
41abdfbd JG |
4 | |
5 | This file is part of GDB. | |
6 | ||
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
6c9638b4 | 19 | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ |
41abdfbd | 20 | |
41abdfbd | 21 | #include "defs.h" |
41abdfbd JG |
22 | #include "frame.h" |
23 | #include "inferior.h" | |
24 | #include "symtab.h" | |
25 | #include "target.h" | |
030fb5cb | 26 | #include "gdbcore.h" |
65eaea27 JL |
27 | #include "symfile.h" |
28 | #include "objfiles.h" | |
41abdfbd | 29 | |
2aefe6e4 JK |
30 | #include "xcoffsolib.h" |
31 | ||
41abdfbd | 32 | #include <a.out.h> |
d6434f39 JG |
33 | |
34 | extern struct obstack frame_cache_obstack; | |
35 | ||
41abdfbd | 36 | extern int errno; |
41abdfbd JG |
37 | |
38 | /* Nonzero if we just simulated a single step break. */ | |
39 | int one_stepped; | |
40 | ||
41abdfbd JG |
41 | /* Breakpoint shadows for the single step instructions will be kept here. */ |
42 | ||
43 | static struct sstep_breaks { | |
030fb5cb JK |
44 | /* Address, or 0 if this is not in use. */ |
45 | CORE_ADDR address; | |
46 | /* Shadow contents. */ | |
47 | char data[4]; | |
41abdfbd JG |
48 | } stepBreaks[2]; |
49 | ||
ecf4059f JG |
50 | /* Static function prototypes */ |
51 | ||
ecf4059f JG |
52 | static CORE_ADDR |
53 | find_toc_address PARAMS ((CORE_ADDR pc)); | |
54 | ||
55 | static CORE_ADDR | |
56 | branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety)); | |
57 | ||
58 | static void | |
59 | frame_get_cache_fsr PARAMS ((struct frame_info *fi, | |
63641491 | 60 | struct rs6000_framedata *fdatap)); |
41abdfbd JG |
61 | |
62 | /* | |
63 | * Calculate the destination of a branch/jump. Return -1 if not a branch. | |
64 | */ | |
ecf4059f | 65 | static CORE_ADDR |
41abdfbd | 66 | branch_dest (opcode, instr, pc, safety) |
ecf4059f JG |
67 | int opcode; |
68 | int instr; | |
69 | CORE_ADDR pc; | |
70 | CORE_ADDR safety; | |
41abdfbd JG |
71 | { |
72 | register long offset; | |
ecf4059f | 73 | CORE_ADDR dest; |
41abdfbd JG |
74 | int immediate; |
75 | int absolute; | |
76 | int ext_op; | |
77 | ||
78 | absolute = (int) ((instr >> 1) & 1); | |
79 | ||
80 | switch (opcode) { | |
81 | case 18 : | |
ecf4059f | 82 | immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */ |
dc59e982 MM |
83 | if (absolute) |
84 | dest = immediate; | |
85 | else | |
86 | dest = pc + immediate; | |
87 | break; | |
41abdfbd JG |
88 | |
89 | case 16 : | |
dc59e982 | 90 | immediate = ((instr & ~3) << 16) >> 16; /* br conditional */ |
41abdfbd JG |
91 | if (absolute) |
92 | dest = immediate; | |
93 | else | |
94 | dest = pc + immediate; | |
95 | break; | |
96 | ||
97 | case 19 : | |
98 | ext_op = (instr>>1) & 0x3ff; | |
99 | ||
100 | if (ext_op == 16) /* br conditional register */ | |
101 | dest = read_register (LR_REGNUM) & ~3; | |
102 | ||
103 | else if (ext_op == 528) /* br cond to count reg */ | |
9aa31e91 JK |
104 | { |
105 | dest = read_register (CTR_REGNUM) & ~3; | |
106 | ||
107 | /* If we are about to execute a system call, dest is something | |
108 | like 0x22fc or 0x3b00. Upon completion the system call | |
109 | will return to the address in the link register. */ | |
110 | if (dest < TEXT_SEGMENT_BASE) | |
111 | dest = read_register (LR_REGNUM) & ~3; | |
112 | } | |
41abdfbd JG |
113 | else return -1; |
114 | break; | |
115 | ||
116 | default: return -1; | |
117 | } | |
818de002 | 118 | return (dest < TEXT_SEGMENT_BASE) ? safety : dest; |
41abdfbd JG |
119 | } |
120 | ||
121 | ||
122 | ||
123 | /* AIX does not support PT_STEP. Simulate it. */ | |
124 | ||
997cc2c0 | 125 | void |
41abdfbd | 126 | single_step (signal) |
997cc2c0 | 127 | int signal; |
41abdfbd JG |
128 | { |
129 | #define INSNLEN(OPCODE) 4 | |
130 | ||
5c172b4b MM |
131 | static char le_breakp[] = LITTLE_BREAKPOINT; |
132 | static char be_breakp[] = BIG_BREAKPOINT; | |
133 | char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp; | |
030fb5cb JK |
134 | int ii, insn; |
135 | CORE_ADDR loc; | |
136 | CORE_ADDR breaks[2]; | |
137 | int opcode; | |
41abdfbd JG |
138 | |
139 | if (!one_stepped) { | |
41abdfbd JG |
140 | loc = read_pc (); |
141 | ||
b112f2ae | 142 | insn = read_memory_integer (loc, 4); |
41abdfbd JG |
143 | |
144 | breaks[0] = loc + INSNLEN(insn); | |
145 | opcode = insn >> 26; | |
146 | breaks[1] = branch_dest (opcode, insn, loc, breaks[0]); | |
147 | ||
818de002 PB |
148 | /* Don't put two breakpoints on the same address. */ |
149 | if (breaks[1] == breaks[0]) | |
150 | breaks[1] = -1; | |
151 | ||
030fb5cb | 152 | stepBreaks[1].address = 0; |
41abdfbd JG |
153 | |
154 | for (ii=0; ii < 2; ++ii) { | |
155 | ||
156 | /* ignore invalid breakpoint. */ | |
157 | if ( breaks[ii] == -1) | |
158 | continue; | |
159 | ||
030fb5cb | 160 | read_memory (breaks[ii], stepBreaks[ii].data, 4); |
41abdfbd | 161 | |
030fb5cb | 162 | write_memory (breaks[ii], breakp, 4); |
41abdfbd JG |
163 | stepBreaks[ii].address = breaks[ii]; |
164 | } | |
165 | ||
166 | one_stepped = 1; | |
997cc2c0 | 167 | } else { |
41abdfbd JG |
168 | |
169 | /* remove step breakpoints. */ | |
170 | for (ii=0; ii < 2; ++ii) | |
030fb5cb | 171 | if (stepBreaks[ii].address != 0) |
41abdfbd | 172 | write_memory |
030fb5cb | 173 | (stepBreaks[ii].address, stepBreaks[ii].data, 4); |
41abdfbd JG |
174 | |
175 | one_stepped = 0; | |
176 | } | |
997cc2c0 | 177 | errno = 0; /* FIXME, don't ignore errors! */ |
030fb5cb | 178 | /* What errors? {read,write}_memory call error(). */ |
41abdfbd | 179 | } |
41abdfbd JG |
180 | |
181 | ||
068c9fd6 MM |
182 | /* return pc value after skipping a function prologue and also return |
183 | information about a function frame. | |
41abdfbd | 184 | |
068c9fd6 MM |
185 | in struct rs6000_frameinfo fdata: |
186 | - frameless is TRUE, if function does not have a frame. | |
187 | - nosavedpc is TRUE, if function does not save %pc value in its frame. | |
188 | - offset is the number of bytes used in the frame to save registers. | |
189 | - saved_gpr is the number of the first saved gpr. | |
190 | - saved_fpr is the number of the first saved fpr. | |
191 | - alloca_reg is the number of the register used for alloca() handling. | |
192 | Otherwise -1. | |
193 | - gpr_offset is the offset of the saved gprs | |
194 | - fpr_offset is the offset of the saved fprs | |
195 | - lr_offset is the offset of the saved lr | |
196 | - cr_offset is the offset of the saved cr | |
197 | */ | |
198 | ||
199 | #define SIGNED_SHORT(x) \ | |
200 | ((sizeof (short) == 2) \ | |
201 | ? ((int)(short)(x)) \ | |
202 | : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000))) | |
203 | ||
204 | #define GET_SRC_REG(x) (((x) >> 21) & 0x1f) | |
205 | ||
206 | CORE_ADDR | |
207 | skip_prologue (pc, fdata) | |
208 | CORE_ADDR pc; | |
209 | struct rs6000_framedata *fdata; | |
41abdfbd | 210 | { |
068c9fd6 | 211 | CORE_ADDR orig_pc = pc; |
34df79fc | 212 | char buf[4]; |
34df79fc | 213 | unsigned long op; |
4b4c6c96 | 214 | long offset = 0; |
068c9fd6 MM |
215 | int lr_reg = 0; |
216 | int cr_reg = 0; | |
217 | int reg; | |
4b4c6c96 | 218 | int framep = 0; |
65eaea27 | 219 | int minimal_toc_loaded = 0; |
068c9fd6 MM |
220 | static struct rs6000_framedata zero_frame; |
221 | ||
222 | *fdata = zero_frame; | |
223 | fdata->saved_gpr = -1; | |
224 | fdata->saved_fpr = -1; | |
225 | fdata->alloca_reg = -1; | |
226 | fdata->frameless = 1; | |
227 | fdata->nosavedpc = 1; | |
41abdfbd | 228 | |
34df79fc | 229 | if (target_read_memory (pc, buf, 4)) |
41abdfbd | 230 | return pc; /* Can't access it -- assume no prologue. */ |
41abdfbd JG |
231 | |
232 | /* Assume that subsequent fetches can fail with low probability. */ | |
068c9fd6 MM |
233 | pc -= 4; |
234 | for (;;) | |
235 | { | |
236 | pc += 4; | |
237 | op = read_memory_integer (pc, 4); | |
41abdfbd | 238 | |
068c9fd6 MM |
239 | if ((op & 0xfc1fffff) == 0x7c0802a6) { /* mflr Rx */ |
240 | lr_reg = (op & 0x03e00000) | 0x90010000; | |
241 | continue; | |
242 | ||
243 | } else if ((op & 0xfc1fffff) == 0x7c000026) { /* mfcr Rx */ | |
244 | cr_reg = (op & 0x03e00000) | 0x90010000; | |
245 | continue; | |
246 | ||
247 | } else if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */ | |
248 | reg = GET_SRC_REG (op); | |
249 | if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg) { | |
250 | fdata->saved_fpr = reg; | |
4b4c6c96 | 251 | fdata->fpr_offset = SIGNED_SHORT (op) + offset; |
068c9fd6 MM |
252 | } |
253 | continue; | |
254 | ||
255 | } else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */ | |
256 | ((op & 0xfc1f0000) == 0x90010000 && /* st rx,NUM(r1), rx >= r13 */ | |
257 | (op & 0x03e00000) >= 0x01a00000)) { | |
258 | ||
259 | reg = GET_SRC_REG (op); | |
260 | if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg) { | |
261 | fdata->saved_gpr = reg; | |
4b4c6c96 | 262 | fdata->gpr_offset = SIGNED_SHORT (op) + offset; |
068c9fd6 MM |
263 | } |
264 | continue; | |
265 | ||
266 | } else if ((op & 0xffff0000) == 0x3c000000) { /* addis 0,0,NUM, used for >= 32k frames */ | |
267 | fdata->offset = (op & 0x0000ffff) << 16; | |
65eaea27 | 268 | fdata->frameless = 0; |
068c9fd6 MM |
269 | continue; |
270 | ||
271 | } else if ((op & 0xffff0000) == 0x60000000) { /* ori 0,0,NUM, 2nd half of >= 32k frames */ | |
272 | fdata->offset |= (op & 0x0000ffff); | |
65eaea27 | 273 | fdata->frameless = 0; |
068c9fd6 MM |
274 | continue; |
275 | ||
276 | } else if ((op & 0xffff0000) == lr_reg) { /* st Rx,NUM(r1) where Rx == lr */ | |
4b4c6c96 | 277 | fdata->lr_offset = SIGNED_SHORT (op) + offset; |
068c9fd6 MM |
278 | fdata->nosavedpc = 0; |
279 | lr_reg = 0; | |
280 | continue; | |
281 | ||
282 | } else if ((op & 0xffff0000) == cr_reg) { /* st Rx,NUM(r1) where Rx == cr */ | |
4b4c6c96 | 283 | fdata->cr_offset = SIGNED_SHORT (op) + offset; |
068c9fd6 MM |
284 | cr_reg = 0; |
285 | continue; | |
286 | ||
4b4c6c96 MM |
287 | } else if (op == 0x48000005) { /* bl .+4 used in -mrelocatable */ |
288 | continue; | |
289 | ||
65eaea27 JL |
290 | } else if (op == 0x48000004) { /* b .+4 (xlc) */ |
291 | break; | |
292 | ||
4b4c6c96 MM |
293 | } else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used in V.4 -mrelocatable */ |
294 | op == 0x7fc0f214) && /* add r30,r0,r30, used in V.4 -mrelocatable */ | |
295 | lr_reg == 0x901e0000) { | |
296 | continue; | |
297 | ||
298 | } else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used in V.4 -mminimal-toc */ | |
299 | (op & 0xffff0000) == 0x3bde0000) { /* addi 30,30,foo@l */ | |
300 | continue; | |
301 | ||
068c9fd6 | 302 | } else if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */ |
965dde97 | 303 | |
65eaea27 | 304 | fdata->frameless = 0; |
965dde97 PS |
305 | /* Don't skip over the subroutine call if it is not within the first |
306 | three instructions of the prologue. */ | |
307 | if ((pc - orig_pc) > 8) | |
308 | break; | |
309 | ||
068c9fd6 MM |
310 | op = read_memory_integer (pc+4, 4); |
311 | ||
312 | /* At this point, make sure this is not a trampoline function | |
313 | (a function that simply calls another functions, and nothing else). | |
314 | If the next is not a nop, this branch was part of the function | |
315 | prologue. */ | |
316 | ||
317 | if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */ | |
965dde97 | 318 | break; /* don't skip over this branch */ |
068c9fd6 MM |
319 | |
320 | continue; | |
321 | ||
4b4c6c96 | 322 | /* update stack pointer */ |
068c9fd6 | 323 | } else if ((op & 0xffff0000) == 0x94210000) { /* stu r1,NUM(r1) */ |
65eaea27 | 324 | fdata->frameless = 0; |
4b4c6c96 MM |
325 | fdata->offset = SIGNED_SHORT (op); |
326 | offset = fdata->offset; | |
327 | continue; | |
1eeba686 | 328 | |
068c9fd6 | 329 | } else if (op == 0x7c21016e) { /* stwux 1,1,0 */ |
65eaea27 | 330 | fdata->frameless = 0; |
4b4c6c96 MM |
331 | offset = fdata->offset; |
332 | continue; | |
41abdfbd | 333 | |
4b4c6c96 | 334 | /* Load up minimal toc pointer */ |
65eaea27 JL |
335 | } else if ((op >> 22) == 0x20f |
336 | && ! minimal_toc_loaded) { /* l r31,... or l r30,... */ | |
337 | minimal_toc_loaded = 1; | |
4b4c6c96 | 338 | continue; |
cdb1cc92 | 339 | |
4b4c6c96 MM |
340 | /* store parameters in stack */ |
341 | } else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */ | |
342 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ | |
343 | (op & 0xfc1f0000) == 0xfc010000) { /* frsp, fp?,NUM(r1) */ | |
344 | continue; | |
e137e850 | 345 | |
4b4c6c96 MM |
346 | /* store parameters in stack via frame pointer */ |
347 | } else if (framep && | |
348 | (op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */ | |
349 | (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */ | |
350 | (op & 0xfc1f0000) == 0xfc1f0000) { /* frsp, fp?,NUM(r1) */ | |
351 | continue; | |
e137e850 | 352 | |
4b4c6c96 MM |
353 | /* Set up frame pointer */ |
354 | } else if (op == 0x603f0000 /* oril r31, r1, 0x0 */ | |
355 | || op == 0x7c3f0b78) { /* mr r31, r1 */ | |
65eaea27 | 356 | fdata->frameless = 0; |
4b4c6c96 | 357 | framep = 1; |
965dde97 | 358 | fdata->alloca_reg = 31; |
4b4c6c96 | 359 | continue; |
41abdfbd | 360 | |
65eaea27 JL |
361 | /* Another way to set up the frame pointer. */ |
362 | } else if ((op & 0xfc1fffff) == 0x38010000) { /* addi rX, r1, 0x0 */ | |
363 | fdata->frameless = 0; | |
364 | framep = 1; | |
365 | fdata->alloca_reg = (op & ~0x38010000) >> 21; | |
366 | continue; | |
367 | ||
4b4c6c96 MM |
368 | } else { |
369 | break; | |
370 | } | |
41abdfbd | 371 | } |
068c9fd6 | 372 | |
507e4004 PB |
373 | #if 0 |
374 | /* I have problems with skipping over __main() that I need to address | |
375 | * sometime. Previously, I used to use misc_function_vector which | |
376 | * didn't work as well as I wanted to be. -MGO */ | |
377 | ||
378 | /* If the first thing after skipping a prolog is a branch to a function, | |
379 | this might be a call to an initializer in main(), introduced by gcc2. | |
380 | We'd like to skip over it as well. Fortunately, xlc does some extra | |
381 | work before calling a function right after a prologue, thus we can | |
382 | single out such gcc2 behaviour. */ | |
383 | ||
384 | ||
385 | if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */ | |
386 | op = read_memory_integer (pc+4, 4); | |
387 | ||
388 | if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */ | |
389 | ||
390 | /* check and see if we are in main. If so, skip over this initializer | |
391 | function as well. */ | |
392 | ||
393 | tmp = find_pc_misc_function (pc); | |
2e4964ad | 394 | if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main")) |
507e4004 PB |
395 | return pc + 8; |
396 | } | |
397 | } | |
398 | #endif /* 0 */ | |
399 | ||
4b4c6c96 | 400 | fdata->offset = - fdata->offset; |
41abdfbd JG |
401 | return pc; |
402 | } | |
403 | ||
818de002 | 404 | |
41abdfbd JG |
405 | /************************************************************************* |
406 | Support for creating pushind a dummy frame into the stack, and popping | |
407 | frames, etc. | |
408 | *************************************************************************/ | |
409 | ||
818de002 PB |
410 | /* The total size of dummy frame is 436, which is; |
411 | ||
412 | 32 gpr's - 128 bytes | |
413 | 32 fpr's - 256 " | |
414 | 7 the rest - 28 " | |
415 | and 24 extra bytes for the callee's link area. The last 24 bytes | |
416 | for the link area might not be necessary, since it will be taken | |
417 | care of by push_arguments(). */ | |
418 | ||
419 | #define DUMMY_FRAME_SIZE 436 | |
420 | ||
41abdfbd JG |
421 | #define DUMMY_FRAME_ADDR_SIZE 10 |
422 | ||
423 | /* Make sure you initialize these in somewhere, in case gdb gives up what it | |
818de002 | 424 | was debugging and starts debugging something else. FIXMEibm */ |
41abdfbd JG |
425 | |
426 | static int dummy_frame_count = 0; | |
427 | static int dummy_frame_size = 0; | |
428 | static CORE_ADDR *dummy_frame_addr = 0; | |
429 | ||
430 | extern int stop_stack_dummy; | |
431 | ||
432 | /* push a dummy frame into stack, save all register. Currently we are saving | |
433 | only gpr's and fpr's, which is not good enough! FIXMEmgo */ | |
434 | ||
ecf4059f | 435 | void |
41abdfbd JG |
436 | push_dummy_frame () |
437 | { | |
359a097f JK |
438 | /* stack pointer. */ |
439 | CORE_ADDR sp; | |
b112f2ae JK |
440 | /* Same thing, target byte order. */ |
441 | char sp_targ[4]; | |
359a097f JK |
442 | |
443 | /* link register. */ | |
444 | CORE_ADDR pc; | |
445 | /* Same thing, target byte order. */ | |
446 | char pc_targ[4]; | |
447 | ||
41abdfbd JG |
448 | int ii; |
449 | ||
5f1c39ef | 450 | target_fetch_registers (-1); |
6c6afbb9 | 451 | |
41abdfbd JG |
452 | if (dummy_frame_count >= dummy_frame_size) { |
453 | dummy_frame_size += DUMMY_FRAME_ADDR_SIZE; | |
454 | if (dummy_frame_addr) | |
455 | dummy_frame_addr = (CORE_ADDR*) xrealloc | |
456 | (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size)); | |
457 | else | |
458 | dummy_frame_addr = (CORE_ADDR*) | |
459 | xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size)); | |
460 | } | |
461 | ||
462 | sp = read_register(SP_REGNUM); | |
359a097f | 463 | pc = read_register(PC_REGNUM); |
5816555b | 464 | store_address (pc_targ, 4, pc); |
41abdfbd JG |
465 | |
466 | dummy_frame_addr [dummy_frame_count++] = sp; | |
467 | ||
468 | /* Be careful! If the stack pointer is not decremented first, then kernel | |
6c6afbb9 | 469 | thinks he is free to use the space underneath it. And kernel actually |
41abdfbd JG |
470 | uses that area for IPC purposes when executing ptrace(2) calls. So |
471 | before writing register values into the new frame, decrement and update | |
472 | %sp first in order to secure your frame. */ | |
473 | ||
818de002 | 474 | write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE); |
41abdfbd | 475 | |
41abdfbd JG |
476 | /* gdb relies on the state of current_frame. We'd better update it, |
477 | otherwise things like do_registers_info() wouldn't work properly! */ | |
478 | ||
479 | flush_cached_frames (); | |
41abdfbd JG |
480 | |
481 | /* save program counter in link register's space. */ | |
359a097f | 482 | write_memory (sp+8, pc_targ, 4); |
41abdfbd | 483 | |
6c6afbb9 | 484 | /* save all floating point and general purpose registers here. */ |
41abdfbd JG |
485 | |
486 | /* fpr's, f0..f31 */ | |
487 | for (ii = 0; ii < 32; ++ii) | |
488 | write_memory (sp-8-(ii*8), ®isters[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8); | |
489 | ||
490 | /* gpr's r0..r31 */ | |
491 | for (ii=1; ii <=32; ++ii) | |
492 | write_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); | |
493 | ||
818de002 PB |
494 | /* so far, 32*2 + 32 words = 384 bytes have been written. |
495 | 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */ | |
496 | ||
497 | for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) { | |
498 | write_memory (sp-384-(ii*4), | |
499 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); | |
500 | } | |
501 | ||
502 | /* Save sp or so called back chain right here. */ | |
b112f2ae JK |
503 | store_address (sp_targ, 4, sp); |
504 | write_memory (sp-DUMMY_FRAME_SIZE, sp_targ, 4); | |
818de002 | 505 | sp -= DUMMY_FRAME_SIZE; |
41abdfbd JG |
506 | |
507 | /* And finally, this is the back chain. */ | |
359a097f | 508 | write_memory (sp+8, pc_targ, 4); |
41abdfbd JG |
509 | } |
510 | ||
511 | ||
512 | /* Pop a dummy frame. | |
513 | ||
514 | In rs6000 when we push a dummy frame, we save all of the registers. This | |
515 | is usually done before user calls a function explicitly. | |
516 | ||
818de002 PB |
517 | After a dummy frame is pushed, some instructions are copied into stack, |
518 | and stack pointer is decremented even more. Since we don't have a frame | |
519 | pointer to get back to the parent frame of the dummy, we start having | |
520 | trouble poping it. Therefore, we keep a dummy frame stack, keeping | |
521 | addresses of dummy frames as such. When poping happens and when we | |
522 | detect that was a dummy frame, we pop it back to its parent by using | |
523 | dummy frame stack (`dummy_frame_addr' array). | |
ecf4059f JG |
524 | |
525 | FIXME: This whole concept is broken. You should be able to detect | |
526 | a dummy stack frame *on the user's stack itself*. When you do, | |
527 | then you know the format of that stack frame -- including its | |
528 | saved SP register! There should *not* be a separate stack in the | |
d6434f39 | 529 | GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92 |
41abdfbd JG |
530 | */ |
531 | ||
532 | pop_dummy_frame () | |
533 | { | |
534 | CORE_ADDR sp, pc; | |
535 | int ii; | |
536 | sp = dummy_frame_addr [--dummy_frame_count]; | |
537 | ||
538 | /* restore all fpr's. */ | |
539 | for (ii = 1; ii <= 32; ++ii) | |
540 | read_memory (sp-(ii*8), ®isters[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8); | |
541 | ||
542 | /* restore all gpr's */ | |
543 | for (ii=1; ii <= 32; ++ii) { | |
544 | read_memory (sp-256-(ii*4), ®isters[REGISTER_BYTE (32-ii)], 4); | |
545 | } | |
546 | ||
818de002 PB |
547 | /* restore the rest of the registers. */ |
548 | for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) | |
549 | read_memory (sp-384-(ii*4), | |
550 | ®isters[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4); | |
551 | ||
552 | read_memory (sp-(DUMMY_FRAME_SIZE-8), | |
553 | ®isters [REGISTER_BYTE(PC_REGNUM)], 4); | |
41abdfbd JG |
554 | |
555 | /* when a dummy frame was being pushed, we had to decrement %sp first, in | |
556 | order to secure astack space. Thus, saved %sp (or %r1) value, is not the | |
557 | one we should restore. Change it with the one we need. */ | |
558 | ||
559 | *(int*)®isters [REGISTER_BYTE(FP_REGNUM)] = sp; | |
560 | ||
561 | /* Now we can restore all registers. */ | |
562 | ||
5f1c39ef | 563 | target_store_registers (-1); |
41abdfbd JG |
564 | pc = read_pc (); |
565 | flush_cached_frames (); | |
41abdfbd JG |
566 | } |
567 | ||
568 | ||
569 | /* pop the innermost frame, go back to the caller. */ | |
570 | ||
ecf4059f | 571 | void |
41abdfbd JG |
572 | pop_frame () |
573 | { | |
359a097f | 574 | CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */ |
63641491 | 575 | struct rs6000_framedata fdata; |
669caa9c | 576 | struct frame_info *frame = get_current_frame (); |
41abdfbd | 577 | int addr, ii; |
41abdfbd JG |
578 | |
579 | pc = read_pc (); | |
669caa9c | 580 | sp = FRAME_FP (frame); |
41abdfbd JG |
581 | |
582 | if (stop_stack_dummy && dummy_frame_count) { | |
583 | pop_dummy_frame (); | |
584 | return; | |
585 | } | |
586 | ||
07aa9fdc PS |
587 | /* Make sure that all registers are valid. */ |
588 | read_register_bytes (0, NULL, REGISTER_BYTES); | |
589 | ||
41abdfbd JG |
590 | /* figure out previous %pc value. If the function is frameless, it is |
591 | still in the link register, otherwise walk the frames and retrieve the | |
592 | saved %pc value in the previous frame. */ | |
593 | ||
34a1a3bf | 594 | addr = get_pc_function_start (frame->pc) + FUNCTION_START_OFFSET; |
068c9fd6 | 595 | (void) skip_prologue (addr, &fdata); |
41abdfbd | 596 | |
6c6afbb9 | 597 | if (fdata.frameless) |
07aa9fdc PS |
598 | prev_sp = sp; |
599 | else | |
600 | prev_sp = read_memory_integer (sp, 4); | |
068c9fd6 | 601 | if (fdata.lr_offset == 0) |
41abdfbd JG |
602 | lr = read_register (LR_REGNUM); |
603 | else | |
068c9fd6 | 604 | lr = read_memory_integer (prev_sp + fdata.lr_offset, 4); |
41abdfbd JG |
605 | |
606 | /* reset %pc value. */ | |
607 | write_register (PC_REGNUM, lr); | |
608 | ||
609 | /* reset register values if any was saved earlier. */ | |
6c6afbb9 | 610 | addr = prev_sp - fdata.offset; |
41abdfbd | 611 | |
6c6afbb9 | 612 | if (fdata.saved_gpr != -1) |
669caa9c | 613 | for (ii = fdata.saved_gpr; ii <= 31; ++ii) { |
41abdfbd | 614 | read_memory (addr, ®isters [REGISTER_BYTE (ii)], 4); |
cdb1cc92 | 615 | addr += 4; |
41abdfbd JG |
616 | } |
617 | ||
6c6afbb9 | 618 | if (fdata.saved_fpr != -1) |
669caa9c | 619 | for (ii = fdata.saved_fpr; ii <= 31; ++ii) { |
41abdfbd JG |
620 | read_memory (addr, ®isters [REGISTER_BYTE (ii+FP0_REGNUM)], 8); |
621 | addr += 8; | |
622 | } | |
623 | ||
624 | write_register (SP_REGNUM, prev_sp); | |
5f1c39ef | 625 | target_store_registers (-1); |
41abdfbd | 626 | flush_cached_frames (); |
41abdfbd JG |
627 | } |
628 | ||
41abdfbd JG |
629 | /* fixup the call sequence of a dummy function, with the real function address. |
630 | its argumets will be passed by gdb. */ | |
631 | ||
ecf4059f | 632 | void |
41abdfbd JG |
633 | fix_call_dummy(dummyname, pc, fun, nargs, type) |
634 | char *dummyname; | |
ecf4059f JG |
635 | CORE_ADDR pc; |
636 | CORE_ADDR fun; | |
41abdfbd JG |
637 | int nargs; /* not used */ |
638 | int type; /* not used */ | |
41abdfbd JG |
639 | { |
640 | #define TOC_ADDR_OFFSET 20 | |
641 | #define TARGET_ADDR_OFFSET 28 | |
642 | ||
643 | int ii; | |
ecf4059f JG |
644 | CORE_ADDR target_addr; |
645 | CORE_ADDR tocvalue; | |
41abdfbd JG |
646 | |
647 | target_addr = fun; | |
648 | tocvalue = find_toc_address (target_addr); | |
649 | ||
650 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET); | |
651 | ii = (ii & 0xffff0000) | (tocvalue >> 16); | |
652 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii; | |
653 | ||
654 | ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4); | |
655 | ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff); | |
656 | *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii; | |
657 | ||
658 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET); | |
659 | ii = (ii & 0xffff0000) | (target_addr >> 16); | |
660 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii; | |
661 | ||
662 | ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4); | |
663 | ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff); | |
664 | *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii; | |
665 | } | |
666 | ||
41abdfbd JG |
667 | /* Pass the arguments in either registers, or in the stack. In RS6000, the first |
668 | eight words of the argument list (that might be less than eight parameters if | |
669 | some parameters occupy more than one word) are passed in r3..r11 registers. | |
670 | float and double parameters are passed in fpr's, in addition to that. Rest of | |
671 | the parameters if any are passed in user stack. There might be cases in which | |
672 | half of the parameter is copied into registers, the other half is pushed into | |
673 | stack. | |
674 | ||
675 | If the function is returning a structure, then the return address is passed | |
676 | in r3, then the first 7 words of the parametes can be passed in registers, | |
677 | starting from r4. */ | |
678 | ||
679 | CORE_ADDR | |
680 | push_arguments (nargs, args, sp, struct_return, struct_addr) | |
681 | int nargs; | |
17221e41 | 682 | value_ptr *args; |
41abdfbd JG |
683 | CORE_ADDR sp; |
684 | int struct_return; | |
685 | CORE_ADDR struct_addr; | |
686 | { | |
687 | int ii, len; | |
688 | int argno; /* current argument number */ | |
689 | int argbytes; /* current argument byte */ | |
690 | char tmp_buffer [50]; | |
17221e41 | 691 | value_ptr arg; |
41abdfbd JG |
692 | int f_argno = 0; /* current floating point argno */ |
693 | ||
694 | CORE_ADDR saved_sp, pc; | |
695 | ||
696 | if ( dummy_frame_count <= 0) | |
199b2450 | 697 | printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n"); |
41abdfbd JG |
698 | |
699 | /* The first eight words of ther arguments are passed in registers. Copy | |
700 | them appropriately. | |
701 | ||
702 | If the function is returning a `struct', then the first word (which | |
703 | will be passed in r3) is used for struct return address. In that | |
704 | case we should advance one word and start from r4 register to copy | |
705 | parameters. */ | |
706 | ||
707 | ii = struct_return ? 1 : 0; | |
708 | ||
709 | for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) { | |
710 | ||
5222ca60 | 711 | arg = args[argno]; |
41abdfbd JG |
712 | len = TYPE_LENGTH (VALUE_TYPE (arg)); |
713 | ||
714 | if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT) { | |
715 | ||
716 | /* floating point arguments are passed in fpr's, as well as gpr's. | |
717 | There are 13 fpr's reserved for passing parameters. At this point | |
718 | there is no way we would run out of them. */ | |
719 | ||
720 | if (len > 8) | |
199b2450 | 721 | printf_unfiltered ( |
41abdfbd JG |
722 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); |
723 | ||
ade40d31 RP |
724 | memcpy (®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg), |
725 | len); | |
41abdfbd JG |
726 | ++f_argno; |
727 | } | |
728 | ||
729 | if (len > 4) { | |
730 | ||
731 | /* Argument takes more than one register. */ | |
732 | while (argbytes < len) { | |
733 | ||
734 | *(int*)®isters[REGISTER_BYTE(ii+3)] = 0; | |
ade40d31 RP |
735 | memcpy (®isters[REGISTER_BYTE(ii+3)], |
736 | ((char*)VALUE_CONTENTS (arg))+argbytes, | |
41abdfbd JG |
737 | (len - argbytes) > 4 ? 4 : len - argbytes); |
738 | ++ii, argbytes += 4; | |
739 | ||
740 | if (ii >= 8) | |
741 | goto ran_out_of_registers_for_arguments; | |
742 | } | |
743 | argbytes = 0; | |
744 | --ii; | |
745 | } | |
746 | else { /* Argument can fit in one register. No problem. */ | |
747 | *(int*)®isters[REGISTER_BYTE(ii+3)] = 0; | |
ade40d31 | 748 | memcpy (®isters[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len); |
41abdfbd JG |
749 | } |
750 | ++argno; | |
751 | } | |
752 | ||
753 | ran_out_of_registers_for_arguments: | |
754 | ||
755 | /* location for 8 parameters are always reserved. */ | |
756 | sp -= 4 * 8; | |
757 | ||
758 | /* another six words for back chain, TOC register, link register, etc. */ | |
759 | sp -= 24; | |
760 | ||
761 | /* if there are more arguments, allocate space for them in | |
762 | the stack, then push them starting from the ninth one. */ | |
763 | ||
764 | if ((argno < nargs) || argbytes) { | |
765 | int space = 0, jj; | |
17221e41 | 766 | value_ptr val; |
41abdfbd JG |
767 | |
768 | if (argbytes) { | |
769 | space += ((len - argbytes + 3) & -4); | |
770 | jj = argno + 1; | |
771 | } | |
772 | else | |
773 | jj = argno; | |
774 | ||
775 | for (; jj < nargs; ++jj) { | |
5222ca60 | 776 | val = args[jj]; |
41abdfbd JG |
777 | space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4; |
778 | } | |
779 | ||
780 | /* add location required for the rest of the parameters */ | |
781 | space = (space + 7) & -8; | |
782 | sp -= space; | |
783 | ||
784 | /* This is another instance we need to be concerned about securing our | |
785 | stack space. If we write anything underneath %sp (r1), we might conflict | |
786 | with the kernel who thinks he is free to use this area. So, update %sp | |
787 | first before doing anything else. */ | |
788 | ||
789 | write_register (SP_REGNUM, sp); | |
790 | ||
41abdfbd JG |
791 | /* if the last argument copied into the registers didn't fit there |
792 | completely, push the rest of it into stack. */ | |
793 | ||
794 | if (argbytes) { | |
795 | write_memory ( | |
796 | sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes); | |
797 | ++argno; | |
798 | ii += ((len - argbytes + 3) & -4) / 4; | |
799 | } | |
800 | ||
801 | /* push the rest of the arguments into stack. */ | |
802 | for (; argno < nargs; ++argno) { | |
803 | ||
5222ca60 | 804 | arg = args[argno]; |
41abdfbd JG |
805 | len = TYPE_LENGTH (VALUE_TYPE (arg)); |
806 | ||
807 | ||
808 | /* float types should be passed in fpr's, as well as in the stack. */ | |
809 | if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT && f_argno < 13) { | |
810 | ||
811 | if (len > 8) | |
199b2450 | 812 | printf_unfiltered ( |
41abdfbd JG |
813 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); |
814 | ||
ade40d31 RP |
815 | memcpy (®isters[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg), |
816 | len); | |
41abdfbd JG |
817 | ++f_argno; |
818 | } | |
819 | ||
359a097f | 820 | write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len); |
41abdfbd JG |
821 | ii += ((len + 3) & -4) / 4; |
822 | } | |
823 | } | |
6c6afbb9 | 824 | else |
41abdfbd JG |
825 | /* Secure stack areas first, before doing anything else. */ |
826 | write_register (SP_REGNUM, sp); | |
827 | ||
41abdfbd JG |
828 | saved_sp = dummy_frame_addr [dummy_frame_count - 1]; |
829 | read_memory (saved_sp, tmp_buffer, 24); | |
830 | write_memory (sp, tmp_buffer, 24); | |
831 | ||
b112f2ae JK |
832 | /* set back chain properly */ |
833 | store_address (tmp_buffer, 4, saved_sp); | |
834 | write_memory (sp, tmp_buffer, 4); | |
41abdfbd | 835 | |
5f1c39ef | 836 | target_store_registers (-1); |
41abdfbd JG |
837 | return sp; |
838 | } | |
839 | ||
840 | /* a given return value in `regbuf' with a type `valtype', extract and copy its | |
841 | value into `valbuf' */ | |
842 | ||
ecf4059f | 843 | void |
41abdfbd JG |
844 | extract_return_value (valtype, regbuf, valbuf) |
845 | struct type *valtype; | |
846 | char regbuf[REGISTER_BYTES]; | |
847 | char *valbuf; | |
848 | { | |
07781ac0 | 849 | int offset = 0; |
41abdfbd JG |
850 | |
851 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT) { | |
852 | ||
853 | double dd; float ff; | |
854 | /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes. | |
855 | We need to truncate the return value into float size (4 byte) if | |
856 | necessary. */ | |
857 | ||
858 | if (TYPE_LENGTH (valtype) > 4) /* this is a double */ | |
ade40d31 | 859 | memcpy (valbuf, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], |
41abdfbd JG |
860 | TYPE_LENGTH (valtype)); |
861 | else { /* float */ | |
ade40d31 | 862 | memcpy (&dd, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], 8); |
41abdfbd | 863 | ff = (float)dd; |
ade40d31 | 864 | memcpy (valbuf, &ff, sizeof(float)); |
41abdfbd JG |
865 | } |
866 | } | |
07781ac0 | 867 | else { |
41abdfbd | 868 | /* return value is copied starting from r3. */ |
07781ac0 PS |
869 | if (TARGET_BYTE_ORDER == BIG_ENDIAN |
870 | && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3)) | |
871 | offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype); | |
872 | ||
873 | memcpy (valbuf, regbuf + REGISTER_BYTE (3) + offset, | |
874 | TYPE_LENGTH (valtype)); | |
875 | } | |
41abdfbd JG |
876 | } |
877 | ||
878 | ||
ecf4059f JG |
879 | /* keep structure return address in this variable. |
880 | FIXME: This is a horrid kludge which should not be allowed to continue | |
881 | living. This only allows a single nested call to a structure-returning | |
882 | function. Come on, guys! -- gnu@cygnus.com, Aug 92 */ | |
41abdfbd JG |
883 | |
884 | CORE_ADDR rs6000_struct_return_address; | |
885 | ||
886 | ||
c2e4669f JG |
887 | /* Indirect function calls use a piece of trampoline code to do context |
888 | switching, i.e. to set the new TOC table. Skip such code if we are on | |
889 | its first instruction (as when we have single-stepped to here). | |
07aa9fdc PS |
890 | Also skip shared library trampoline code (which is different from |
891 | indirect function call trampolines). | |
c2e4669f JG |
892 | Result is desired PC to step until, or NULL if we are not in |
893 | trampoline code. */ | |
41abdfbd | 894 | |
ecf4059f | 895 | CORE_ADDR |
41abdfbd | 896 | skip_trampoline_code (pc) |
ecf4059f | 897 | CORE_ADDR pc; |
41abdfbd JG |
898 | { |
899 | register unsigned int ii, op; | |
07aa9fdc | 900 | CORE_ADDR solib_target_pc; |
41abdfbd JG |
901 | |
902 | static unsigned trampoline_code[] = { | |
903 | 0x800b0000, /* l r0,0x0(r11) */ | |
904 | 0x90410014, /* st r2,0x14(r1) */ | |
905 | 0x7c0903a6, /* mtctr r0 */ | |
906 | 0x804b0004, /* l r2,0x4(r11) */ | |
907 | 0x816b0008, /* l r11,0x8(r11) */ | |
908 | 0x4e800420, /* bctr */ | |
909 | 0x4e800020, /* br */ | |
910 | 0 | |
911 | }; | |
912 | ||
07aa9fdc PS |
913 | /* If pc is in a shared library trampoline, return its target. */ |
914 | solib_target_pc = find_solib_trampoline_target (pc); | |
915 | if (solib_target_pc) | |
916 | return solib_target_pc; | |
917 | ||
41abdfbd JG |
918 | for (ii=0; trampoline_code[ii]; ++ii) { |
919 | op = read_memory_integer (pc + (ii*4), 4); | |
920 | if (op != trampoline_code [ii]) | |
359a097f | 921 | return 0; |
41abdfbd JG |
922 | } |
923 | ii = read_register (11); /* r11 holds destination addr */ | |
924 | pc = read_memory_integer (ii, 4); /* (r11) value */ | |
925 | return pc; | |
926 | } | |
927 | ||
ecf4059f | 928 | |
068c9fd6 | 929 | /* Determines whether the function FI has a frame on the stack or not. */ |
ecf4059f | 930 | int |
068c9fd6 MM |
931 | frameless_function_invocation (fi) |
932 | struct frame_info *fi; | |
ecf4059f JG |
933 | { |
934 | CORE_ADDR func_start; | |
63641491 | 935 | struct rs6000_framedata fdata; |
ecf4059f | 936 | |
b0e932ad JK |
937 | if (fi->next != NULL) |
938 | /* Don't even think about framelessness except on the innermost frame. */ | |
3f528883 JK |
939 | /* FIXME: Can also be frameless if fi->next->signal_handler_caller (if |
940 | a signal happens while executing in a frameless function). */ | |
b0e932ad JK |
941 | return 0; |
942 | ||
ecf4059f JG |
943 | func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET; |
944 | ||
945 | /* If we failed to find the start of the function, it is a mistake | |
946 | to inspect the instructions. */ | |
947 | ||
948 | if (!func_start) | |
949 | return 0; | |
950 | ||
068c9fd6 MM |
951 | (void) skip_prologue (func_start, &fdata); |
952 | return fdata.frameless; | |
ecf4059f JG |
953 | } |
954 | ||
068c9fd6 MM |
955 | /* Return the PC saved in a frame */ |
956 | unsigned long | |
957 | frame_saved_pc (fi) | |
958 | struct frame_info *fi; | |
959 | { | |
960 | CORE_ADDR func_start; | |
961 | struct rs6000_framedata fdata; | |
962 | int frameless; | |
963 | ||
965dde97 PS |
964 | if (fi->signal_handler_caller) |
965 | return read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, 4); | |
966 | ||
068c9fd6 MM |
967 | func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET; |
968 | ||
969 | /* If we failed to find the start of the function, it is a mistake | |
970 | to inspect the instructions. */ | |
971 | if (!func_start) | |
972 | return 0; | |
973 | ||
974 | (void) skip_prologue (func_start, &fdata); | |
068c9fd6 | 975 | |
4b4c6c96 MM |
976 | if (fdata.lr_offset == 0 && fi->next != NULL) |
977 | return read_memory_integer (rs6000_frame_chain (fi) + DEFAULT_LR_SAVE, 4); | |
978 | ||
979 | if (fdata.lr_offset == 0) | |
980 | return read_register (LR_REGNUM); | |
981 | ||
068c9fd6 MM |
982 | return read_memory_integer (rs6000_frame_chain (fi) + fdata.lr_offset, 4); |
983 | } | |
ecf4059f JG |
984 | |
985 | /* If saved registers of frame FI are not known yet, read and cache them. | |
63641491 | 986 | &FDATAP contains rs6000_framedata; TDATAP can be NULL, |
ecf4059f JG |
987 | in which case the framedata are read. */ |
988 | ||
989 | static void | |
990 | frame_get_cache_fsr (fi, fdatap) | |
991 | struct frame_info *fi; | |
63641491 | 992 | struct rs6000_framedata *fdatap; |
ecf4059f JG |
993 | { |
994 | int ii; | |
995 | CORE_ADDR frame_addr; | |
63641491 | 996 | struct rs6000_framedata work_fdata; |
ecf4059f JG |
997 | |
998 | if (fi->cache_fsr) | |
999 | return; | |
1000 | ||
1001 | if (fdatap == NULL) { | |
1002 | fdatap = &work_fdata; | |
068c9fd6 | 1003 | (void) skip_prologue (get_pc_function_start (fi->pc), fdatap); |
ecf4059f JG |
1004 | } |
1005 | ||
1006 | fi->cache_fsr = (struct frame_saved_regs *) | |
1007 | obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs)); | |
4ed97c9a | 1008 | memset (fi->cache_fsr, '\0', sizeof (struct frame_saved_regs)); |
ecf4059f JG |
1009 | |
1010 | if (fi->prev && fi->prev->frame) | |
1011 | frame_addr = fi->prev->frame; | |
1012 | else | |
1013 | frame_addr = read_memory_integer (fi->frame, 4); | |
1014 | ||
1015 | /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr. | |
965dde97 | 1016 | All fpr's from saved_fpr to fp31 are saved. */ |
ecf4059f JG |
1017 | |
1018 | if (fdatap->saved_fpr >= 0) { | |
965dde97 PS |
1019 | int fpr_offset = frame_addr + fdatap->fpr_offset; |
1020 | for (ii = fdatap->saved_fpr; ii < 32; ii++) { | |
1021 | fi->cache_fsr->regs [FP0_REGNUM + ii] = fpr_offset; | |
1022 | fpr_offset += 8; | |
1023 | } | |
ecf4059f JG |
1024 | } |
1025 | ||
1026 | /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr. | |
965dde97 | 1027 | All gpr's from saved_gpr to gpr31 are saved. */ |
ecf4059f | 1028 | |
965dde97 PS |
1029 | if (fdatap->saved_gpr >= 0) { |
1030 | int gpr_offset = frame_addr + fdatap->gpr_offset; | |
1031 | for (ii = fdatap->saved_gpr; ii < 32; ii++) { | |
1032 | fi->cache_fsr->regs [ii] = gpr_offset; | |
1033 | gpr_offset += 4; | |
1034 | } | |
1035 | } | |
1036 | ||
1037 | /* If != 0, fdatap->cr_offset is the offset from the frame that holds | |
1038 | the CR. */ | |
1039 | if (fdatap->cr_offset != 0) | |
1040 | fi->cache_fsr->regs [CR_REGNUM] = frame_addr + fdatap->cr_offset; | |
1041 | ||
1042 | /* If != 0, fdatap->lr_offset is the offset from the frame that holds | |
1043 | the LR. */ | |
1044 | if (fdatap->lr_offset != 0) | |
1045 | fi->cache_fsr->regs [LR_REGNUM] = frame_addr + fdatap->lr_offset; | |
ecf4059f JG |
1046 | } |
1047 | ||
1048 | /* Return the address of a frame. This is the inital %sp value when the frame | |
1049 | was first allocated. For functions calling alloca(), it might be saved in | |
1050 | an alloca register. */ | |
1051 | ||
1052 | CORE_ADDR | |
1053 | frame_initial_stack_address (fi) | |
1054 | struct frame_info *fi; | |
1055 | { | |
1056 | CORE_ADDR tmpaddr; | |
63641491 | 1057 | struct rs6000_framedata fdata; |
ecf4059f JG |
1058 | struct frame_info *callee_fi; |
1059 | ||
1060 | /* if the initial stack pointer (frame address) of this frame is known, | |
1061 | just return it. */ | |
1062 | ||
1063 | if (fi->initial_sp) | |
1064 | return fi->initial_sp; | |
1065 | ||
1066 | /* find out if this function is using an alloca register.. */ | |
1067 | ||
068c9fd6 | 1068 | (void) skip_prologue (get_pc_function_start (fi->pc), &fdata); |
ecf4059f JG |
1069 | |
1070 | /* if saved registers of this frame are not known yet, read and cache them. */ | |
1071 | ||
1072 | if (!fi->cache_fsr) | |
1073 | frame_get_cache_fsr (fi, &fdata); | |
1074 | ||
1075 | /* If no alloca register used, then fi->frame is the value of the %sp for | |
1076 | this frame, and it is good enough. */ | |
1077 | ||
1078 | if (fdata.alloca_reg < 0) { | |
1079 | fi->initial_sp = fi->frame; | |
1080 | return fi->initial_sp; | |
1081 | } | |
1082 | ||
1083 | /* This function has an alloca register. If this is the top-most frame | |
1084 | (with the lowest address), the value in alloca register is good. */ | |
1085 | ||
1086 | if (!fi->next) | |
1087 | return fi->initial_sp = read_register (fdata.alloca_reg); | |
1088 | ||
1089 | /* Otherwise, this is a caller frame. Callee has usually already saved | |
1090 | registers, but there are exceptions (such as when the callee | |
1091 | has no parameters). Find the address in which caller's alloca | |
1092 | register is saved. */ | |
1093 | ||
1094 | for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) { | |
1095 | ||
1096 | if (!callee_fi->cache_fsr) | |
cdb1cc92 | 1097 | frame_get_cache_fsr (callee_fi, NULL); |
ecf4059f JG |
1098 | |
1099 | /* this is the address in which alloca register is saved. */ | |
1100 | ||
1101 | tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg]; | |
1102 | if (tmpaddr) { | |
1103 | fi->initial_sp = read_memory_integer (tmpaddr, 4); | |
1104 | return fi->initial_sp; | |
1105 | } | |
1106 | ||
1107 | /* Go look into deeper levels of the frame chain to see if any one of | |
1108 | the callees has saved alloca register. */ | |
1109 | } | |
1110 | ||
1111 | /* If alloca register was not saved, by the callee (or any of its callees) | |
1112 | then the value in the register is still good. */ | |
1113 | ||
1114 | return fi->initial_sp = read_register (fdata.alloca_reg); | |
1115 | } | |
1116 | ||
669caa9c | 1117 | CORE_ADDR |
f3649227 JK |
1118 | rs6000_frame_chain (thisframe) |
1119 | struct frame_info *thisframe; | |
1120 | { | |
669caa9c | 1121 | CORE_ADDR fp; |
f3649227 JK |
1122 | if (inside_entry_file ((thisframe)->pc)) |
1123 | return 0; | |
cee86be3 | 1124 | if (thisframe->signal_handler_caller) |
9ed8604f | 1125 | fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4); |
cee86be3 JK |
1126 | else |
1127 | fp = read_memory_integer ((thisframe)->frame, 4); | |
1128 | ||
f3649227 JK |
1129 | return fp; |
1130 | } | |
ecf4059f JG |
1131 | \f |
1132 | /* Keep an array of load segment information and their TOC table addresses. | |
1133 | This info will be useful when calling a shared library function by hand. */ | |
1134 | ||
1135 | struct loadinfo { | |
1136 | CORE_ADDR textorg, dataorg; | |
1137 | unsigned long toc_offset; | |
1138 | }; | |
1139 | ||
1140 | #define LOADINFOLEN 10 | |
1141 | ||
ecf4059f JG |
1142 | static struct loadinfo *loadinfo = NULL; |
1143 | static int loadinfolen = 0; | |
1144 | static int loadinfotocindex = 0; | |
3c02636b | 1145 | static int loadinfotextindex = 0; |
ecf4059f JG |
1146 | |
1147 | ||
1148 | void | |
1149 | xcoff_init_loadinfo () | |
1150 | { | |
1151 | loadinfotocindex = 0; | |
1152 | loadinfotextindex = 0; | |
1153 | ||
1154 | if (loadinfolen == 0) { | |
1155 | loadinfo = (struct loadinfo *) | |
1156 | xmalloc (sizeof (struct loadinfo) * LOADINFOLEN); | |
1157 | loadinfolen = LOADINFOLEN; | |
1158 | } | |
1159 | } | |
1160 | ||
1161 | ||
1162 | /* FIXME -- this is never called! */ | |
1163 | void | |
1164 | free_loadinfo () | |
1165 | { | |
1166 | if (loadinfo) | |
1167 | free (loadinfo); | |
1168 | loadinfo = NULL; | |
1169 | loadinfolen = 0; | |
1170 | loadinfotocindex = 0; | |
1171 | loadinfotextindex = 0; | |
1172 | } | |
1173 | ||
1174 | /* this is called from xcoffread.c */ | |
1175 | ||
1176 | void | |
07dc1e42 MM |
1177 | xcoff_add_toc_to_loadinfo (tocoff) |
1178 | unsigned long tocoff; | |
ecf4059f JG |
1179 | { |
1180 | while (loadinfotocindex >= loadinfolen) { | |
1181 | loadinfolen += LOADINFOLEN; | |
1182 | loadinfo = (struct loadinfo *) | |
1183 | xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen); | |
1184 | } | |
1185 | loadinfo [loadinfotocindex++].toc_offset = tocoff; | |
1186 | } | |
1187 | ||
2aefe6e4 | 1188 | void |
ecf4059f JG |
1189 | add_text_to_loadinfo (textaddr, dataaddr) |
1190 | CORE_ADDR textaddr; | |
1191 | CORE_ADDR dataaddr; | |
1192 | { | |
1193 | while (loadinfotextindex >= loadinfolen) { | |
1194 | loadinfolen += LOADINFOLEN; | |
1195 | loadinfo = (struct loadinfo *) | |
1196 | xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen); | |
1197 | } | |
1198 | loadinfo [loadinfotextindex].textorg = textaddr; | |
1199 | loadinfo [loadinfotextindex].dataorg = dataaddr; | |
1200 | ++loadinfotextindex; | |
1201 | } | |
1202 | ||
1203 | ||
a367db89 | 1204 | /* Note that this assumes that the "textorg" and "dataorg" elements |
ecf4059f | 1205 | of a member of this array are correlated with the "toc_offset" |
a367db89 JK |
1206 | element of the same member. This is taken care of because the loops |
1207 | which assign the former (in xcoff_relocate_symtab or xcoff_relocate_core) | |
1208 | and the latter (in scan_xcoff_symtab, via vmap_symtab, in vmap_ldinfo | |
1209 | or xcoff_relocate_core) traverse the same objfiles in the same order. */ | |
ecf4059f JG |
1210 | |
1211 | static CORE_ADDR | |
1212 | find_toc_address (pc) | |
1213 | CORE_ADDR pc; | |
1214 | { | |
1215 | int ii, toc_entry, tocbase = 0; | |
1216 | ||
65eaea27 | 1217 | toc_entry = -1; |
ecf4059f JG |
1218 | for (ii=0; ii < loadinfotextindex; ++ii) |
1219 | if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) { | |
1220 | toc_entry = ii; | |
1221 | tocbase = loadinfo[ii].textorg; | |
1222 | } | |
1223 | ||
65eaea27 JL |
1224 | if (toc_entry == -1) |
1225 | error ("Unable to find TOC entry for pc 0x%x\n", pc); | |
ecf4059f JG |
1226 | return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset; |
1227 | } | |
18b46e7c | 1228 | |
65eaea27 JL |
1229 | /* Return nonzero if ADDR (a function pointer) is in the data space and |
1230 | is therefore a special function pointer. */ | |
1231 | ||
1232 | int | |
1233 | is_magic_function_pointer (addr) | |
1234 | CORE_ADDR addr; | |
1235 | { | |
1236 | struct obj_section *s; | |
1237 | ||
1238 | s = find_pc_section (addr); | |
1239 | if (s && s->the_bfd_section->flags & SEC_CODE) | |
1240 | return 0; | |
1241 | else | |
1242 | return 1; | |
1243 | } | |
1244 | ||
5c172b4b MM |
1245 | #ifdef GDB_TARGET_POWERPC |
1246 | int | |
1247 | gdb_print_insn_powerpc (memaddr, info) | |
1248 | bfd_vma memaddr; | |
1249 | disassemble_info *info; | |
1250 | { | |
1251 | if (TARGET_BYTE_ORDER == BIG_ENDIAN) | |
1252 | return print_insn_big_powerpc (memaddr, info); | |
1253 | else | |
1254 | return print_insn_little_powerpc (memaddr, info); | |
1255 | } | |
1256 | #endif | |
1257 | ||
18b46e7c SS |
1258 | void |
1259 | _initialize_rs6000_tdep () | |
1260 | { | |
1261 | /* FIXME, this should not be decided via ifdef. */ | |
1262 | #ifdef GDB_TARGET_POWERPC | |
5c172b4b | 1263 | tm_print_insn = gdb_print_insn_powerpc; |
18b46e7c SS |
1264 | #else |
1265 | tm_print_insn = print_insn_rs6000; | |
1266 | #endif | |
1267 | } |