Commit | Line | Data |
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c906108c | 1 | /* Target-dependent code for GDB, the GNU debugger. |
b6ba6518 | 2 | Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, |
2a873819 | 3 | 1998, 1999, 2000, 2001, 2002 |
c906108c SS |
4 | Free Software Foundation, Inc. |
5 | ||
c5aa993b | 6 | This file is part of GDB. |
c906108c | 7 | |
c5aa993b JM |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
c906108c | 12 | |
c5aa993b JM |
13 | This program is distributed in the hope that it will be useful, |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
c906108c | 17 | |
c5aa993b JM |
18 | You should have received a copy of the GNU General Public License |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 59 Temple Place - Suite 330, | |
21 | Boston, MA 02111-1307, USA. */ | |
c906108c SS |
22 | |
23 | #include "defs.h" | |
24 | #include "frame.h" | |
25 | #include "inferior.h" | |
26 | #include "symtab.h" | |
27 | #include "target.h" | |
28 | #include "gdbcore.h" | |
29 | #include "gdbcmd.h" | |
30 | #include "symfile.h" | |
31 | #include "objfiles.h" | |
7a78ae4e | 32 | #include "arch-utils.h" |
4e052eda | 33 | #include "regcache.h" |
d16aafd8 | 34 | #include "doublest.h" |
fd0407d6 | 35 | #include "value.h" |
1fcc0bb8 | 36 | #include "parser-defs.h" |
7a78ae4e | 37 | |
2fccf04a | 38 | #include "libbfd.h" /* for bfd_default_set_arch_mach */ |
7a78ae4e | 39 | #include "coff/internal.h" /* for libcoff.h */ |
2fccf04a | 40 | #include "libcoff.h" /* for xcoff_data */ |
7a78ae4e | 41 | |
9aa1e687 | 42 | #include "elf-bfd.h" |
7a78ae4e | 43 | |
6ded7999 | 44 | #include "solib-svr4.h" |
9aa1e687 | 45 | #include "ppc-tdep.h" |
7a78ae4e ND |
46 | |
47 | /* If the kernel has to deliver a signal, it pushes a sigcontext | |
48 | structure on the stack and then calls the signal handler, passing | |
49 | the address of the sigcontext in an argument register. Usually | |
50 | the signal handler doesn't save this register, so we have to | |
51 | access the sigcontext structure via an offset from the signal handler | |
52 | frame. | |
53 | The following constants were determined by experimentation on AIX 3.2. */ | |
54 | #define SIG_FRAME_PC_OFFSET 96 | |
55 | #define SIG_FRAME_LR_OFFSET 108 | |
56 | #define SIG_FRAME_FP_OFFSET 284 | |
57 | ||
7a78ae4e ND |
58 | /* To be used by skip_prologue. */ |
59 | ||
60 | struct rs6000_framedata | |
61 | { | |
62 | int offset; /* total size of frame --- the distance | |
63 | by which we decrement sp to allocate | |
64 | the frame */ | |
65 | int saved_gpr; /* smallest # of saved gpr */ | |
66 | int saved_fpr; /* smallest # of saved fpr */ | |
6be8bc0c | 67 | int saved_vr; /* smallest # of saved vr */ |
7a78ae4e ND |
68 | int alloca_reg; /* alloca register number (frame ptr) */ |
69 | char frameless; /* true if frameless functions. */ | |
70 | char nosavedpc; /* true if pc not saved. */ | |
71 | int gpr_offset; /* offset of saved gprs from prev sp */ | |
72 | int fpr_offset; /* offset of saved fprs from prev sp */ | |
6be8bc0c | 73 | int vr_offset; /* offset of saved vrs from prev sp */ |
7a78ae4e ND |
74 | int lr_offset; /* offset of saved lr */ |
75 | int cr_offset; /* offset of saved cr */ | |
6be8bc0c | 76 | int vrsave_offset; /* offset of saved vrsave register */ |
7a78ae4e ND |
77 | }; |
78 | ||
79 | /* Description of a single register. */ | |
80 | ||
81 | struct reg | |
82 | { | |
83 | char *name; /* name of register */ | |
84 | unsigned char sz32; /* size on 32-bit arch, 0 if nonextant */ | |
85 | unsigned char sz64; /* size on 64-bit arch, 0 if nonextant */ | |
86 | unsigned char fpr; /* whether register is floating-point */ | |
87 | }; | |
88 | ||
7a78ae4e ND |
89 | /* Return the current architecture's gdbarch_tdep structure. */ |
90 | ||
91 | #define TDEP gdbarch_tdep (current_gdbarch) | |
c906108c SS |
92 | |
93 | /* Breakpoint shadows for the single step instructions will be kept here. */ | |
94 | ||
c5aa993b JM |
95 | static struct sstep_breaks |
96 | { | |
97 | /* Address, or 0 if this is not in use. */ | |
98 | CORE_ADDR address; | |
99 | /* Shadow contents. */ | |
100 | char data[4]; | |
101 | } | |
102 | stepBreaks[2]; | |
c906108c SS |
103 | |
104 | /* Hook for determining the TOC address when calling functions in the | |
105 | inferior under AIX. The initialization code in rs6000-nat.c sets | |
106 | this hook to point to find_toc_address. */ | |
107 | ||
7a78ae4e ND |
108 | CORE_ADDR (*rs6000_find_toc_address_hook) (CORE_ADDR) = NULL; |
109 | ||
110 | /* Hook to set the current architecture when starting a child process. | |
111 | rs6000-nat.c sets this. */ | |
112 | ||
113 | void (*rs6000_set_host_arch_hook) (int) = NULL; | |
c906108c SS |
114 | |
115 | /* Static function prototypes */ | |
116 | ||
a14ed312 KB |
117 | static CORE_ADDR branch_dest (int opcode, int instr, CORE_ADDR pc, |
118 | CORE_ADDR safety); | |
077276e8 KB |
119 | static CORE_ADDR skip_prologue (CORE_ADDR, CORE_ADDR, |
120 | struct rs6000_framedata *); | |
7a78ae4e ND |
121 | static void frame_get_saved_regs (struct frame_info * fi, |
122 | struct rs6000_framedata * fdatap); | |
123 | static CORE_ADDR frame_initial_stack_address (struct frame_info *); | |
c906108c | 124 | |
7a78ae4e | 125 | /* Read a LEN-byte address from debugged memory address MEMADDR. */ |
c906108c | 126 | |
7a78ae4e ND |
127 | static CORE_ADDR |
128 | read_memory_addr (CORE_ADDR memaddr, int len) | |
129 | { | |
130 | return read_memory_unsigned_integer (memaddr, len); | |
131 | } | |
c906108c | 132 | |
7a78ae4e ND |
133 | static CORE_ADDR |
134 | rs6000_skip_prologue (CORE_ADDR pc) | |
b83266a0 SS |
135 | { |
136 | struct rs6000_framedata frame; | |
077276e8 | 137 | pc = skip_prologue (pc, 0, &frame); |
b83266a0 SS |
138 | return pc; |
139 | } | |
140 | ||
141 | ||
c906108c SS |
142 | /* Fill in fi->saved_regs */ |
143 | ||
144 | struct frame_extra_info | |
145 | { | |
146 | /* Functions calling alloca() change the value of the stack | |
147 | pointer. We need to use initial stack pointer (which is saved in | |
148 | r31 by gcc) in such cases. If a compiler emits traceback table, | |
149 | then we should use the alloca register specified in traceback | |
150 | table. FIXME. */ | |
c5aa993b | 151 | CORE_ADDR initial_sp; /* initial stack pointer. */ |
c906108c SS |
152 | }; |
153 | ||
9aa1e687 | 154 | void |
7a78ae4e | 155 | rs6000_init_extra_frame_info (int fromleaf, struct frame_info *fi) |
c906108c | 156 | { |
c5aa993b | 157 | fi->extra_info = (struct frame_extra_info *) |
c906108c SS |
158 | frame_obstack_alloc (sizeof (struct frame_extra_info)); |
159 | fi->extra_info->initial_sp = 0; | |
160 | if (fi->next != (CORE_ADDR) 0 | |
161 | && fi->pc < TEXT_SEGMENT_BASE) | |
7a292a7a | 162 | /* We're in get_prev_frame */ |
c906108c SS |
163 | /* and this is a special signal frame. */ |
164 | /* (fi->pc will be some low address in the kernel, */ | |
165 | /* to which the signal handler returns). */ | |
166 | fi->signal_handler_caller = 1; | |
167 | } | |
168 | ||
7a78ae4e ND |
169 | /* Put here the code to store, into a struct frame_saved_regs, |
170 | the addresses of the saved registers of frame described by FRAME_INFO. | |
171 | This includes special registers such as pc and fp saved in special | |
172 | ways in the stack frame. sp is even more special: | |
173 | the address we return for it IS the sp for the next frame. */ | |
c906108c | 174 | |
7a78ae4e ND |
175 | /* In this implementation for RS/6000, we do *not* save sp. I am |
176 | not sure if it will be needed. The following function takes care of gpr's | |
177 | and fpr's only. */ | |
178 | ||
9aa1e687 | 179 | void |
7a78ae4e | 180 | rs6000_frame_init_saved_regs (struct frame_info *fi) |
c906108c SS |
181 | { |
182 | frame_get_saved_regs (fi, NULL); | |
183 | } | |
184 | ||
7a78ae4e ND |
185 | static CORE_ADDR |
186 | rs6000_frame_args_address (struct frame_info *fi) | |
c906108c SS |
187 | { |
188 | if (fi->extra_info->initial_sp != 0) | |
189 | return fi->extra_info->initial_sp; | |
190 | else | |
191 | return frame_initial_stack_address (fi); | |
192 | } | |
193 | ||
7a78ae4e ND |
194 | /* Immediately after a function call, return the saved pc. |
195 | Can't go through the frames for this because on some machines | |
196 | the new frame is not set up until the new function executes | |
197 | some instructions. */ | |
198 | ||
199 | static CORE_ADDR | |
200 | rs6000_saved_pc_after_call (struct frame_info *fi) | |
201 | { | |
2188cbdd | 202 | return read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum); |
7a78ae4e | 203 | } |
c906108c SS |
204 | |
205 | /* Calculate the destination of a branch/jump. Return -1 if not a branch. */ | |
206 | ||
207 | static CORE_ADDR | |
7a78ae4e | 208 | branch_dest (int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety) |
c906108c SS |
209 | { |
210 | CORE_ADDR dest; | |
211 | int immediate; | |
212 | int absolute; | |
213 | int ext_op; | |
214 | ||
215 | absolute = (int) ((instr >> 1) & 1); | |
216 | ||
c5aa993b JM |
217 | switch (opcode) |
218 | { | |
219 | case 18: | |
220 | immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */ | |
221 | if (absolute) | |
222 | dest = immediate; | |
223 | else | |
224 | dest = pc + immediate; | |
225 | break; | |
226 | ||
227 | case 16: | |
228 | immediate = ((instr & ~3) << 16) >> 16; /* br conditional */ | |
229 | if (absolute) | |
230 | dest = immediate; | |
231 | else | |
232 | dest = pc + immediate; | |
233 | break; | |
234 | ||
235 | case 19: | |
236 | ext_op = (instr >> 1) & 0x3ff; | |
237 | ||
238 | if (ext_op == 16) /* br conditional register */ | |
239 | { | |
2188cbdd | 240 | dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum) & ~3; |
c5aa993b JM |
241 | |
242 | /* If we are about to return from a signal handler, dest is | |
243 | something like 0x3c90. The current frame is a signal handler | |
244 | caller frame, upon completion of the sigreturn system call | |
245 | execution will return to the saved PC in the frame. */ | |
246 | if (dest < TEXT_SEGMENT_BASE) | |
247 | { | |
248 | struct frame_info *fi; | |
249 | ||
250 | fi = get_current_frame (); | |
251 | if (fi != NULL) | |
7a78ae4e ND |
252 | dest = read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET, |
253 | TDEP->wordsize); | |
c5aa993b JM |
254 | } |
255 | } | |
256 | ||
257 | else if (ext_op == 528) /* br cond to count reg */ | |
258 | { | |
2188cbdd | 259 | dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_ctr_regnum) & ~3; |
c5aa993b JM |
260 | |
261 | /* If we are about to execute a system call, dest is something | |
262 | like 0x22fc or 0x3b00. Upon completion the system call | |
263 | will return to the address in the link register. */ | |
264 | if (dest < TEXT_SEGMENT_BASE) | |
2188cbdd | 265 | dest = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum) & ~3; |
c5aa993b JM |
266 | } |
267 | else | |
268 | return -1; | |
269 | break; | |
c906108c | 270 | |
c5aa993b JM |
271 | default: |
272 | return -1; | |
273 | } | |
c906108c SS |
274 | return (dest < TEXT_SEGMENT_BASE) ? safety : dest; |
275 | } | |
276 | ||
277 | ||
278 | /* Sequence of bytes for breakpoint instruction. */ | |
279 | ||
280 | #define BIG_BREAKPOINT { 0x7d, 0x82, 0x10, 0x08 } | |
281 | #define LITTLE_BREAKPOINT { 0x08, 0x10, 0x82, 0x7d } | |
282 | ||
7a78ae4e ND |
283 | static unsigned char * |
284 | rs6000_breakpoint_from_pc (CORE_ADDR *bp_addr, int *bp_size) | |
c906108c SS |
285 | { |
286 | static unsigned char big_breakpoint[] = BIG_BREAKPOINT; | |
287 | static unsigned char little_breakpoint[] = LITTLE_BREAKPOINT; | |
288 | *bp_size = 4; | |
d7449b42 | 289 | if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) |
c906108c SS |
290 | return big_breakpoint; |
291 | else | |
292 | return little_breakpoint; | |
293 | } | |
294 | ||
295 | ||
296 | /* AIX does not support PT_STEP. Simulate it. */ | |
297 | ||
298 | void | |
379d08a1 AC |
299 | rs6000_software_single_step (enum target_signal signal, |
300 | int insert_breakpoints_p) | |
c906108c | 301 | { |
7c40d541 KB |
302 | CORE_ADDR dummy; |
303 | int breakp_sz; | |
304 | char *breakp = rs6000_breakpoint_from_pc (&dummy, &breakp_sz); | |
c906108c SS |
305 | int ii, insn; |
306 | CORE_ADDR loc; | |
307 | CORE_ADDR breaks[2]; | |
308 | int opcode; | |
309 | ||
c5aa993b JM |
310 | if (insert_breakpoints_p) |
311 | { | |
c906108c | 312 | |
c5aa993b | 313 | loc = read_pc (); |
c906108c | 314 | |
c5aa993b | 315 | insn = read_memory_integer (loc, 4); |
c906108c | 316 | |
7c40d541 | 317 | breaks[0] = loc + breakp_sz; |
c5aa993b JM |
318 | opcode = insn >> 26; |
319 | breaks[1] = branch_dest (opcode, insn, loc, breaks[0]); | |
c906108c | 320 | |
c5aa993b JM |
321 | /* Don't put two breakpoints on the same address. */ |
322 | if (breaks[1] == breaks[0]) | |
323 | breaks[1] = -1; | |
c906108c | 324 | |
c5aa993b | 325 | stepBreaks[1].address = 0; |
c906108c | 326 | |
c5aa993b JM |
327 | for (ii = 0; ii < 2; ++ii) |
328 | { | |
c906108c | 329 | |
c5aa993b JM |
330 | /* ignore invalid breakpoint. */ |
331 | if (breaks[ii] == -1) | |
332 | continue; | |
7c40d541 | 333 | target_insert_breakpoint (breaks[ii], stepBreaks[ii].data); |
c5aa993b JM |
334 | stepBreaks[ii].address = breaks[ii]; |
335 | } | |
c906108c | 336 | |
c5aa993b JM |
337 | } |
338 | else | |
339 | { | |
c906108c | 340 | |
c5aa993b JM |
341 | /* remove step breakpoints. */ |
342 | for (ii = 0; ii < 2; ++ii) | |
343 | if (stepBreaks[ii].address != 0) | |
7c40d541 KB |
344 | target_remove_breakpoint (stepBreaks[ii].address, |
345 | stepBreaks[ii].data); | |
c5aa993b | 346 | } |
c906108c | 347 | errno = 0; /* FIXME, don't ignore errors! */ |
c5aa993b | 348 | /* What errors? {read,write}_memory call error(). */ |
c906108c SS |
349 | } |
350 | ||
351 | ||
352 | /* return pc value after skipping a function prologue and also return | |
353 | information about a function frame. | |
354 | ||
355 | in struct rs6000_framedata fdata: | |
c5aa993b JM |
356 | - frameless is TRUE, if function does not have a frame. |
357 | - nosavedpc is TRUE, if function does not save %pc value in its frame. | |
358 | - offset is the initial size of this stack frame --- the amount by | |
359 | which we decrement the sp to allocate the frame. | |
360 | - saved_gpr is the number of the first saved gpr. | |
361 | - saved_fpr is the number of the first saved fpr. | |
6be8bc0c | 362 | - saved_vr is the number of the first saved vr. |
c5aa993b JM |
363 | - alloca_reg is the number of the register used for alloca() handling. |
364 | Otherwise -1. | |
365 | - gpr_offset is the offset of the first saved gpr from the previous frame. | |
366 | - fpr_offset is the offset of the first saved fpr from the previous frame. | |
6be8bc0c | 367 | - vr_offset is the offset of the first saved vr from the previous frame. |
c5aa993b JM |
368 | - lr_offset is the offset of the saved lr |
369 | - cr_offset is the offset of the saved cr | |
6be8bc0c | 370 | - vrsave_offset is the offset of the saved vrsave register |
c5aa993b | 371 | */ |
c906108c SS |
372 | |
373 | #define SIGNED_SHORT(x) \ | |
374 | ((sizeof (short) == 2) \ | |
375 | ? ((int)(short)(x)) \ | |
376 | : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000))) | |
377 | ||
378 | #define GET_SRC_REG(x) (((x) >> 21) & 0x1f) | |
379 | ||
55d05f3b KB |
380 | /* Limit the number of skipped non-prologue instructions, as the examining |
381 | of the prologue is expensive. */ | |
382 | static int max_skip_non_prologue_insns = 10; | |
383 | ||
384 | /* Given PC representing the starting address of a function, and | |
385 | LIM_PC which is the (sloppy) limit to which to scan when looking | |
386 | for a prologue, attempt to further refine this limit by using | |
387 | the line data in the symbol table. If successful, a better guess | |
388 | on where the prologue ends is returned, otherwise the previous | |
389 | value of lim_pc is returned. */ | |
390 | static CORE_ADDR | |
391 | refine_prologue_limit (CORE_ADDR pc, CORE_ADDR lim_pc) | |
392 | { | |
393 | struct symtab_and_line prologue_sal; | |
394 | ||
395 | prologue_sal = find_pc_line (pc, 0); | |
396 | if (prologue_sal.line != 0) | |
397 | { | |
398 | int i; | |
399 | CORE_ADDR addr = prologue_sal.end; | |
400 | ||
401 | /* Handle the case in which compiler's optimizer/scheduler | |
402 | has moved instructions into the prologue. We scan ahead | |
403 | in the function looking for address ranges whose corresponding | |
404 | line number is less than or equal to the first one that we | |
405 | found for the function. (It can be less than when the | |
406 | scheduler puts a body instruction before the first prologue | |
407 | instruction.) */ | |
408 | for (i = 2 * max_skip_non_prologue_insns; | |
409 | i > 0 && (lim_pc == 0 || addr < lim_pc); | |
410 | i--) | |
411 | { | |
412 | struct symtab_and_line sal; | |
413 | ||
414 | sal = find_pc_line (addr, 0); | |
415 | if (sal.line == 0) | |
416 | break; | |
417 | if (sal.line <= prologue_sal.line | |
418 | && sal.symtab == prologue_sal.symtab) | |
419 | { | |
420 | prologue_sal = sal; | |
421 | } | |
422 | addr = sal.end; | |
423 | } | |
424 | ||
425 | if (lim_pc == 0 || prologue_sal.end < lim_pc) | |
426 | lim_pc = prologue_sal.end; | |
427 | } | |
428 | return lim_pc; | |
429 | } | |
430 | ||
431 | ||
7a78ae4e | 432 | static CORE_ADDR |
077276e8 | 433 | skip_prologue (CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata) |
c906108c SS |
434 | { |
435 | CORE_ADDR orig_pc = pc; | |
55d05f3b | 436 | CORE_ADDR last_prologue_pc = pc; |
6be8bc0c | 437 | CORE_ADDR li_found_pc = 0; |
c906108c SS |
438 | char buf[4]; |
439 | unsigned long op; | |
440 | long offset = 0; | |
6be8bc0c | 441 | long vr_saved_offset = 0; |
482ca3f5 KB |
442 | int lr_reg = -1; |
443 | int cr_reg = -1; | |
6be8bc0c EZ |
444 | int vr_reg = -1; |
445 | int vrsave_reg = -1; | |
c906108c SS |
446 | int reg; |
447 | int framep = 0; | |
448 | int minimal_toc_loaded = 0; | |
ddb20c56 | 449 | int prev_insn_was_prologue_insn = 1; |
55d05f3b KB |
450 | int num_skip_non_prologue_insns = 0; |
451 | ||
452 | /* Attempt to find the end of the prologue when no limit is specified. | |
453 | Note that refine_prologue_limit() has been written so that it may | |
454 | be used to "refine" the limits of non-zero PC values too, but this | |
455 | is only safe if we 1) trust the line information provided by the | |
456 | compiler and 2) iterate enough to actually find the end of the | |
457 | prologue. | |
458 | ||
459 | It may become a good idea at some point (for both performance and | |
460 | accuracy) to unconditionally call refine_prologue_limit(). But, | |
461 | until we can make a clear determination that this is beneficial, | |
462 | we'll play it safe and only use it to obtain a limit when none | |
463 | has been specified. */ | |
464 | if (lim_pc == 0) | |
465 | lim_pc = refine_prologue_limit (pc, lim_pc); | |
c906108c | 466 | |
ddb20c56 | 467 | memset (fdata, 0, sizeof (struct rs6000_framedata)); |
c906108c SS |
468 | fdata->saved_gpr = -1; |
469 | fdata->saved_fpr = -1; | |
6be8bc0c | 470 | fdata->saved_vr = -1; |
c906108c SS |
471 | fdata->alloca_reg = -1; |
472 | fdata->frameless = 1; | |
473 | fdata->nosavedpc = 1; | |
474 | ||
55d05f3b | 475 | for (;; pc += 4) |
c906108c | 476 | { |
ddb20c56 KB |
477 | /* Sometimes it isn't clear if an instruction is a prologue |
478 | instruction or not. When we encounter one of these ambiguous | |
479 | cases, we'll set prev_insn_was_prologue_insn to 0 (false). | |
480 | Otherwise, we'll assume that it really is a prologue instruction. */ | |
481 | if (prev_insn_was_prologue_insn) | |
482 | last_prologue_pc = pc; | |
55d05f3b KB |
483 | |
484 | /* Stop scanning if we've hit the limit. */ | |
485 | if (lim_pc != 0 && pc >= lim_pc) | |
486 | break; | |
487 | ||
ddb20c56 KB |
488 | prev_insn_was_prologue_insn = 1; |
489 | ||
55d05f3b | 490 | /* Fetch the instruction and convert it to an integer. */ |
ddb20c56 KB |
491 | if (target_read_memory (pc, buf, 4)) |
492 | break; | |
493 | op = extract_signed_integer (buf, 4); | |
c906108c | 494 | |
c5aa993b JM |
495 | if ((op & 0xfc1fffff) == 0x7c0802a6) |
496 | { /* mflr Rx */ | |
497 | lr_reg = (op & 0x03e00000) | 0x90010000; | |
498 | continue; | |
c906108c | 499 | |
c5aa993b JM |
500 | } |
501 | else if ((op & 0xfc1fffff) == 0x7c000026) | |
502 | { /* mfcr Rx */ | |
503 | cr_reg = (op & 0x03e00000) | 0x90010000; | |
504 | continue; | |
c906108c | 505 | |
c906108c | 506 | } |
c5aa993b JM |
507 | else if ((op & 0xfc1f0000) == 0xd8010000) |
508 | { /* stfd Rx,NUM(r1) */ | |
509 | reg = GET_SRC_REG (op); | |
510 | if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg) | |
511 | { | |
512 | fdata->saved_fpr = reg; | |
513 | fdata->fpr_offset = SIGNED_SHORT (op) + offset; | |
514 | } | |
515 | continue; | |
c906108c | 516 | |
c5aa993b JM |
517 | } |
518 | else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */ | |
7a78ae4e ND |
519 | (((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */ |
520 | (op & 0xfc1f0003) == 0xf8010000) && /* std rx,NUM(r1) */ | |
521 | (op & 0x03e00000) >= 0x01a00000)) /* rx >= r13 */ | |
c5aa993b JM |
522 | { |
523 | ||
524 | reg = GET_SRC_REG (op); | |
525 | if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg) | |
526 | { | |
527 | fdata->saved_gpr = reg; | |
7a78ae4e ND |
528 | if ((op & 0xfc1f0003) == 0xf8010000) |
529 | op = (op >> 1) << 1; | |
c5aa993b JM |
530 | fdata->gpr_offset = SIGNED_SHORT (op) + offset; |
531 | } | |
532 | continue; | |
c906108c | 533 | |
ddb20c56 KB |
534 | } |
535 | else if ((op & 0xffff0000) == 0x60000000) | |
536 | { | |
537 | /* nop */ | |
538 | /* Allow nops in the prologue, but do not consider them to | |
539 | be part of the prologue unless followed by other prologue | |
540 | instructions. */ | |
541 | prev_insn_was_prologue_insn = 0; | |
542 | continue; | |
543 | ||
c906108c | 544 | } |
c5aa993b JM |
545 | else if ((op & 0xffff0000) == 0x3c000000) |
546 | { /* addis 0,0,NUM, used | |
547 | for >= 32k frames */ | |
548 | fdata->offset = (op & 0x0000ffff) << 16; | |
549 | fdata->frameless = 0; | |
550 | continue; | |
551 | ||
552 | } | |
553 | else if ((op & 0xffff0000) == 0x60000000) | |
554 | { /* ori 0,0,NUM, 2nd ha | |
555 | lf of >= 32k frames */ | |
556 | fdata->offset |= (op & 0x0000ffff); | |
557 | fdata->frameless = 0; | |
558 | continue; | |
559 | ||
560 | } | |
482ca3f5 | 561 | else if (lr_reg != -1 && (op & 0xffff0000) == lr_reg) |
c5aa993b JM |
562 | { /* st Rx,NUM(r1) |
563 | where Rx == lr */ | |
564 | fdata->lr_offset = SIGNED_SHORT (op) + offset; | |
565 | fdata->nosavedpc = 0; | |
566 | lr_reg = 0; | |
567 | continue; | |
568 | ||
569 | } | |
482ca3f5 | 570 | else if (cr_reg != -1 && (op & 0xffff0000) == cr_reg) |
c5aa993b JM |
571 | { /* st Rx,NUM(r1) |
572 | where Rx == cr */ | |
573 | fdata->cr_offset = SIGNED_SHORT (op) + offset; | |
574 | cr_reg = 0; | |
575 | continue; | |
576 | ||
577 | } | |
578 | else if (op == 0x48000005) | |
579 | { /* bl .+4 used in | |
580 | -mrelocatable */ | |
581 | continue; | |
582 | ||
583 | } | |
584 | else if (op == 0x48000004) | |
585 | { /* b .+4 (xlc) */ | |
586 | break; | |
587 | ||
c5aa993b | 588 | } |
6be8bc0c EZ |
589 | else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used |
590 | in V.4 -mminimal-toc */ | |
c5aa993b JM |
591 | (op & 0xffff0000) == 0x3bde0000) |
592 | { /* addi 30,30,foo@l */ | |
593 | continue; | |
c906108c | 594 | |
c5aa993b JM |
595 | } |
596 | else if ((op & 0xfc000001) == 0x48000001) | |
597 | { /* bl foo, | |
598 | to save fprs??? */ | |
c906108c | 599 | |
c5aa993b | 600 | fdata->frameless = 0; |
6be8bc0c EZ |
601 | /* Don't skip over the subroutine call if it is not within |
602 | the first three instructions of the prologue. */ | |
c5aa993b JM |
603 | if ((pc - orig_pc) > 8) |
604 | break; | |
605 | ||
606 | op = read_memory_integer (pc + 4, 4); | |
607 | ||
6be8bc0c EZ |
608 | /* At this point, make sure this is not a trampoline |
609 | function (a function that simply calls another functions, | |
610 | and nothing else). If the next is not a nop, this branch | |
611 | was part of the function prologue. */ | |
c5aa993b JM |
612 | |
613 | if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */ | |
614 | break; /* don't skip over | |
615 | this branch */ | |
616 | continue; | |
617 | ||
618 | /* update stack pointer */ | |
619 | } | |
7a78ae4e ND |
620 | else if ((op & 0xffff0000) == 0x94210000 || /* stu r1,NUM(r1) */ |
621 | (op & 0xffff0003) == 0xf8210001) /* stdu r1,NUM(r1) */ | |
622 | { | |
c5aa993b | 623 | fdata->frameless = 0; |
7a78ae4e ND |
624 | if ((op & 0xffff0003) == 0xf8210001) |
625 | op = (op >> 1) << 1; | |
c5aa993b JM |
626 | fdata->offset = SIGNED_SHORT (op); |
627 | offset = fdata->offset; | |
628 | continue; | |
629 | ||
630 | } | |
631 | else if (op == 0x7c21016e) | |
632 | { /* stwux 1,1,0 */ | |
633 | fdata->frameless = 0; | |
634 | offset = fdata->offset; | |
635 | continue; | |
636 | ||
637 | /* Load up minimal toc pointer */ | |
638 | } | |
639 | else if ((op >> 22) == 0x20f | |
640 | && !minimal_toc_loaded) | |
641 | { /* l r31,... or l r30,... */ | |
642 | minimal_toc_loaded = 1; | |
643 | continue; | |
644 | ||
f6077098 KB |
645 | /* move parameters from argument registers to local variable |
646 | registers */ | |
647 | } | |
648 | else if ((op & 0xfc0007fe) == 0x7c000378 && /* mr(.) Rx,Ry */ | |
649 | (((op >> 21) & 31) >= 3) && /* R3 >= Ry >= R10 */ | |
650 | (((op >> 21) & 31) <= 10) && | |
651 | (((op >> 16) & 31) >= fdata->saved_gpr)) /* Rx: local var reg */ | |
652 | { | |
653 | continue; | |
654 | ||
c5aa993b JM |
655 | /* store parameters in stack */ |
656 | } | |
6be8bc0c | 657 | else if ((op & 0xfc1f0003) == 0xf8010000 || /* std rx,NUM(r1) */ |
c5aa993b | 658 | (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */ |
7a78ae4e ND |
659 | (op & 0xfc1f0000) == 0xfc010000) /* frsp, fp?,NUM(r1) */ |
660 | { | |
c5aa993b | 661 | continue; |
c906108c | 662 | |
c5aa993b JM |
663 | /* store parameters in stack via frame pointer */ |
664 | } | |
665 | else if (framep && | |
666 | ((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */ | |
667 | (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */ | |
668 | (op & 0xfc1f0000) == 0xfc1f0000)) | |
669 | { /* frsp, fp?,NUM(r1) */ | |
670 | continue; | |
671 | ||
672 | /* Set up frame pointer */ | |
673 | } | |
674 | else if (op == 0x603f0000 /* oril r31, r1, 0x0 */ | |
675 | || op == 0x7c3f0b78) | |
676 | { /* mr r31, r1 */ | |
677 | fdata->frameless = 0; | |
678 | framep = 1; | |
679 | fdata->alloca_reg = 31; | |
680 | continue; | |
681 | ||
682 | /* Another way to set up the frame pointer. */ | |
683 | } | |
684 | else if ((op & 0xfc1fffff) == 0x38010000) | |
685 | { /* addi rX, r1, 0x0 */ | |
686 | fdata->frameless = 0; | |
687 | framep = 1; | |
688 | fdata->alloca_reg = (op & ~0x38010000) >> 21; | |
689 | continue; | |
c5aa993b | 690 | } |
6be8bc0c EZ |
691 | /* AltiVec related instructions. */ |
692 | /* Store the vrsave register (spr 256) in another register for | |
693 | later manipulation, or load a register into the vrsave | |
694 | register. 2 instructions are used: mfvrsave and | |
695 | mtvrsave. They are shorthand notation for mfspr Rn, SPR256 | |
696 | and mtspr SPR256, Rn. */ | |
697 | /* mfspr Rn SPR256 == 011111 nnnnn 0000001000 01010100110 | |
698 | mtspr SPR256 Rn == 011111 nnnnn 0000001000 01110100110 */ | |
699 | else if ((op & 0xfc1fffff) == 0x7c0042a6) /* mfvrsave Rn */ | |
700 | { | |
701 | vrsave_reg = GET_SRC_REG (op); | |
702 | continue; | |
703 | } | |
704 | else if ((op & 0xfc1fffff) == 0x7c0043a6) /* mtvrsave Rn */ | |
705 | { | |
706 | continue; | |
707 | } | |
708 | /* Store the register where vrsave was saved to onto the stack: | |
709 | rS is the register where vrsave was stored in a previous | |
710 | instruction. */ | |
711 | /* 100100 sssss 00001 dddddddd dddddddd */ | |
712 | else if ((op & 0xfc1f0000) == 0x90010000) /* stw rS, d(r1) */ | |
713 | { | |
714 | if (vrsave_reg == GET_SRC_REG (op)) | |
715 | { | |
716 | fdata->vrsave_offset = SIGNED_SHORT (op) + offset; | |
717 | vrsave_reg = -1; | |
718 | } | |
719 | continue; | |
720 | } | |
721 | /* Compute the new value of vrsave, by modifying the register | |
722 | where vrsave was saved to. */ | |
723 | else if (((op & 0xfc000000) == 0x64000000) /* oris Ra, Rs, UIMM */ | |
724 | || ((op & 0xfc000000) == 0x60000000))/* ori Ra, Rs, UIMM */ | |
725 | { | |
726 | continue; | |
727 | } | |
728 | /* li r0, SIMM (short for addi r0, 0, SIMM). This is the first | |
729 | in a pair of insns to save the vector registers on the | |
730 | stack. */ | |
731 | /* 001110 00000 00000 iiii iiii iiii iiii */ | |
732 | else if ((op & 0xffff0000) == 0x38000000) /* li r0, SIMM */ | |
733 | { | |
734 | li_found_pc = pc; | |
735 | vr_saved_offset = SIGNED_SHORT (op); | |
736 | } | |
737 | /* Store vector register S at (r31+r0) aligned to 16 bytes. */ | |
738 | /* 011111 sssss 11111 00000 00111001110 */ | |
739 | else if ((op & 0xfc1fffff) == 0x7c1f01ce) /* stvx Vs, R31, R0 */ | |
740 | { | |
741 | if (pc == (li_found_pc + 4)) | |
742 | { | |
743 | vr_reg = GET_SRC_REG (op); | |
744 | /* If this is the first vector reg to be saved, or if | |
745 | it has a lower number than others previously seen, | |
746 | reupdate the frame info. */ | |
747 | if (fdata->saved_vr == -1 || fdata->saved_vr > vr_reg) | |
748 | { | |
749 | fdata->saved_vr = vr_reg; | |
750 | fdata->vr_offset = vr_saved_offset + offset; | |
751 | } | |
752 | vr_saved_offset = -1; | |
753 | vr_reg = -1; | |
754 | li_found_pc = 0; | |
755 | } | |
756 | } | |
757 | /* End AltiVec related instructions. */ | |
c5aa993b JM |
758 | else |
759 | { | |
55d05f3b KB |
760 | /* Not a recognized prologue instruction. |
761 | Handle optimizer code motions into the prologue by continuing | |
762 | the search if we have no valid frame yet or if the return | |
763 | address is not yet saved in the frame. */ | |
764 | if (fdata->frameless == 0 | |
765 | && (lr_reg == -1 || fdata->nosavedpc == 0)) | |
766 | break; | |
767 | ||
768 | if (op == 0x4e800020 /* blr */ | |
769 | || op == 0x4e800420) /* bctr */ | |
770 | /* Do not scan past epilogue in frameless functions or | |
771 | trampolines. */ | |
772 | break; | |
773 | if ((op & 0xf4000000) == 0x40000000) /* bxx */ | |
774 | /* Never skip branches. */ | |
775 | break; | |
776 | ||
777 | if (num_skip_non_prologue_insns++ > max_skip_non_prologue_insns) | |
778 | /* Do not scan too many insns, scanning insns is expensive with | |
779 | remote targets. */ | |
780 | break; | |
781 | ||
782 | /* Continue scanning. */ | |
783 | prev_insn_was_prologue_insn = 0; | |
784 | continue; | |
c5aa993b | 785 | } |
c906108c SS |
786 | } |
787 | ||
788 | #if 0 | |
789 | /* I have problems with skipping over __main() that I need to address | |
790 | * sometime. Previously, I used to use misc_function_vector which | |
791 | * didn't work as well as I wanted to be. -MGO */ | |
792 | ||
793 | /* If the first thing after skipping a prolog is a branch to a function, | |
794 | this might be a call to an initializer in main(), introduced by gcc2. | |
795 | We'd like to skip over it as well. Fortunately, xlc does some extra | |
796 | work before calling a function right after a prologue, thus we can | |
797 | single out such gcc2 behaviour. */ | |
c906108c | 798 | |
c906108c | 799 | |
c5aa993b JM |
800 | if ((op & 0xfc000001) == 0x48000001) |
801 | { /* bl foo, an initializer function? */ | |
802 | op = read_memory_integer (pc + 4, 4); | |
803 | ||
804 | if (op == 0x4def7b82) | |
805 | { /* cror 0xf, 0xf, 0xf (nop) */ | |
c906108c | 806 | |
c5aa993b JM |
807 | /* check and see if we are in main. If so, skip over this initializer |
808 | function as well. */ | |
c906108c | 809 | |
c5aa993b | 810 | tmp = find_pc_misc_function (pc); |
51cc5b07 | 811 | if (tmp >= 0 && STREQ (misc_function_vector[tmp].name, main_name ())) |
c5aa993b JM |
812 | return pc + 8; |
813 | } | |
c906108c | 814 | } |
c906108c | 815 | #endif /* 0 */ |
c5aa993b JM |
816 | |
817 | fdata->offset = -fdata->offset; | |
ddb20c56 | 818 | return last_prologue_pc; |
c906108c SS |
819 | } |
820 | ||
821 | ||
822 | /************************************************************************* | |
f6077098 | 823 | Support for creating pushing a dummy frame into the stack, and popping |
c906108c SS |
824 | frames, etc. |
825 | *************************************************************************/ | |
826 | ||
c906108c | 827 | |
7a78ae4e | 828 | /* Pop the innermost frame, go back to the caller. */ |
c5aa993b | 829 | |
c906108c | 830 | static void |
7a78ae4e | 831 | rs6000_pop_frame (void) |
c906108c | 832 | { |
470d5666 | 833 | CORE_ADDR pc, lr, sp, prev_sp, addr; /* %pc, %lr, %sp */ |
c906108c SS |
834 | struct rs6000_framedata fdata; |
835 | struct frame_info *frame = get_current_frame (); | |
470d5666 | 836 | int ii, wordsize; |
c906108c SS |
837 | |
838 | pc = read_pc (); | |
839 | sp = FRAME_FP (frame); | |
840 | ||
58223630 | 841 | if (PC_IN_CALL_DUMMY (frame->pc, frame->frame, frame->frame)) |
c906108c | 842 | { |
7a78ae4e ND |
843 | generic_pop_dummy_frame (); |
844 | flush_cached_frames (); | |
845 | return; | |
c906108c SS |
846 | } |
847 | ||
848 | /* Make sure that all registers are valid. */ | |
849 | read_register_bytes (0, NULL, REGISTER_BYTES); | |
850 | ||
851 | /* figure out previous %pc value. If the function is frameless, it is | |
852 | still in the link register, otherwise walk the frames and retrieve the | |
853 | saved %pc value in the previous frame. */ | |
854 | ||
855 | addr = get_pc_function_start (frame->pc); | |
077276e8 | 856 | (void) skip_prologue (addr, frame->pc, &fdata); |
c906108c | 857 | |
7a78ae4e | 858 | wordsize = TDEP->wordsize; |
c906108c SS |
859 | if (fdata.frameless) |
860 | prev_sp = sp; | |
861 | else | |
7a78ae4e | 862 | prev_sp = read_memory_addr (sp, wordsize); |
c906108c | 863 | if (fdata.lr_offset == 0) |
2188cbdd | 864 | lr = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum); |
c906108c | 865 | else |
7a78ae4e | 866 | lr = read_memory_addr (prev_sp + fdata.lr_offset, wordsize); |
c906108c SS |
867 | |
868 | /* reset %pc value. */ | |
869 | write_register (PC_REGNUM, lr); | |
870 | ||
871 | /* reset register values if any was saved earlier. */ | |
872 | ||
873 | if (fdata.saved_gpr != -1) | |
874 | { | |
875 | addr = prev_sp + fdata.gpr_offset; | |
c5aa993b JM |
876 | for (ii = fdata.saved_gpr; ii <= 31; ++ii) |
877 | { | |
7a78ae4e ND |
878 | read_memory (addr, ®isters[REGISTER_BYTE (ii)], wordsize); |
879 | addr += wordsize; | |
c5aa993b | 880 | } |
c906108c SS |
881 | } |
882 | ||
883 | if (fdata.saved_fpr != -1) | |
884 | { | |
885 | addr = prev_sp + fdata.fpr_offset; | |
c5aa993b JM |
886 | for (ii = fdata.saved_fpr; ii <= 31; ++ii) |
887 | { | |
888 | read_memory (addr, ®isters[REGISTER_BYTE (ii + FP0_REGNUM)], 8); | |
889 | addr += 8; | |
890 | } | |
c906108c SS |
891 | } |
892 | ||
893 | write_register (SP_REGNUM, prev_sp); | |
894 | target_store_registers (-1); | |
895 | flush_cached_frames (); | |
896 | } | |
897 | ||
7a78ae4e ND |
898 | /* Fixup the call sequence of a dummy function, with the real function |
899 | address. Its arguments will be passed by gdb. */ | |
c906108c | 900 | |
7a78ae4e ND |
901 | static void |
902 | rs6000_fix_call_dummy (char *dummyname, CORE_ADDR pc, CORE_ADDR fun, | |
ea7c478f | 903 | int nargs, struct value **args, struct type *type, |
7a78ae4e | 904 | int gcc_p) |
c906108c | 905 | { |
c906108c SS |
906 | int ii; |
907 | CORE_ADDR target_addr; | |
908 | ||
7a78ae4e | 909 | if (rs6000_find_toc_address_hook != NULL) |
f6077098 | 910 | { |
7a78ae4e | 911 | CORE_ADDR tocvalue = (*rs6000_find_toc_address_hook) (fun); |
2188cbdd EZ |
912 | write_register (gdbarch_tdep (current_gdbarch)->ppc_toc_regnum, |
913 | tocvalue); | |
f6077098 | 914 | } |
c906108c SS |
915 | } |
916 | ||
7a78ae4e | 917 | /* Pass the arguments in either registers, or in the stack. In RS/6000, |
c906108c SS |
918 | the first eight words of the argument list (that might be less than |
919 | eight parameters if some parameters occupy more than one word) are | |
7a78ae4e | 920 | passed in r3..r10 registers. float and double parameters are |
c906108c SS |
921 | passed in fpr's, in addition to that. Rest of the parameters if any |
922 | are passed in user stack. There might be cases in which half of the | |
923 | parameter is copied into registers, the other half is pushed into | |
924 | stack. | |
925 | ||
7a78ae4e ND |
926 | Stack must be aligned on 64-bit boundaries when synthesizing |
927 | function calls. | |
928 | ||
c906108c SS |
929 | If the function is returning a structure, then the return address is passed |
930 | in r3, then the first 7 words of the parameters can be passed in registers, | |
931 | starting from r4. */ | |
932 | ||
7a78ae4e | 933 | static CORE_ADDR |
ea7c478f | 934 | rs6000_push_arguments (int nargs, struct value **args, CORE_ADDR sp, |
7a78ae4e | 935 | int struct_return, CORE_ADDR struct_addr) |
c906108c SS |
936 | { |
937 | int ii; | |
938 | int len = 0; | |
c5aa993b JM |
939 | int argno; /* current argument number */ |
940 | int argbytes; /* current argument byte */ | |
941 | char tmp_buffer[50]; | |
942 | int f_argno = 0; /* current floating point argno */ | |
7a78ae4e | 943 | int wordsize = TDEP->wordsize; |
c906108c | 944 | |
ea7c478f | 945 | struct value *arg = 0; |
c906108c SS |
946 | struct type *type; |
947 | ||
948 | CORE_ADDR saved_sp; | |
949 | ||
c906108c SS |
950 | /* The first eight words of ther arguments are passed in registers. Copy |
951 | them appropriately. | |
952 | ||
953 | If the function is returning a `struct', then the first word (which | |
954 | will be passed in r3) is used for struct return address. In that | |
955 | case we should advance one word and start from r4 register to copy | |
956 | parameters. */ | |
957 | ||
c5aa993b | 958 | ii = struct_return ? 1 : 0; |
c906108c SS |
959 | |
960 | /* | |
c5aa993b JM |
961 | effectively indirect call... gcc does... |
962 | ||
963 | return_val example( float, int); | |
964 | ||
965 | eabi: | |
966 | float in fp0, int in r3 | |
967 | offset of stack on overflow 8/16 | |
968 | for varargs, must go by type. | |
969 | power open: | |
970 | float in r3&r4, int in r5 | |
971 | offset of stack on overflow different | |
972 | both: | |
973 | return in r3 or f0. If no float, must study how gcc emulates floats; | |
974 | pay attention to arg promotion. | |
975 | User may have to cast\args to handle promotion correctly | |
976 | since gdb won't know if prototype supplied or not. | |
977 | */ | |
c906108c | 978 | |
c5aa993b JM |
979 | for (argno = 0, argbytes = 0; argno < nargs && ii < 8; ++ii) |
980 | { | |
f6077098 | 981 | int reg_size = REGISTER_RAW_SIZE (ii + 3); |
c5aa993b JM |
982 | |
983 | arg = args[argno]; | |
984 | type = check_typedef (VALUE_TYPE (arg)); | |
985 | len = TYPE_LENGTH (type); | |
986 | ||
987 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
988 | { | |
989 | ||
990 | /* floating point arguments are passed in fpr's, as well as gpr's. | |
991 | There are 13 fpr's reserved for passing parameters. At this point | |
992 | there is no way we would run out of them. */ | |
993 | ||
994 | if (len > 8) | |
995 | printf_unfiltered ( | |
996 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); | |
997 | ||
998 | memcpy (®isters[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)], | |
999 | VALUE_CONTENTS (arg), | |
1000 | len); | |
1001 | ++f_argno; | |
1002 | } | |
1003 | ||
f6077098 | 1004 | if (len > reg_size) |
c5aa993b JM |
1005 | { |
1006 | ||
1007 | /* Argument takes more than one register. */ | |
1008 | while (argbytes < len) | |
1009 | { | |
f6077098 | 1010 | memset (®isters[REGISTER_BYTE (ii + 3)], 0, reg_size); |
c5aa993b JM |
1011 | memcpy (®isters[REGISTER_BYTE (ii + 3)], |
1012 | ((char *) VALUE_CONTENTS (arg)) + argbytes, | |
f6077098 KB |
1013 | (len - argbytes) > reg_size |
1014 | ? reg_size : len - argbytes); | |
1015 | ++ii, argbytes += reg_size; | |
c5aa993b JM |
1016 | |
1017 | if (ii >= 8) | |
1018 | goto ran_out_of_registers_for_arguments; | |
1019 | } | |
1020 | argbytes = 0; | |
1021 | --ii; | |
1022 | } | |
1023 | else | |
1024 | { /* Argument can fit in one register. No problem. */ | |
d7449b42 | 1025 | int adj = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? reg_size - len : 0; |
f6077098 KB |
1026 | memset (®isters[REGISTER_BYTE (ii + 3)], 0, reg_size); |
1027 | memcpy ((char *)®isters[REGISTER_BYTE (ii + 3)] + adj, | |
1028 | VALUE_CONTENTS (arg), len); | |
c5aa993b JM |
1029 | } |
1030 | ++argno; | |
c906108c | 1031 | } |
c906108c SS |
1032 | |
1033 | ran_out_of_registers_for_arguments: | |
1034 | ||
7a78ae4e | 1035 | saved_sp = read_sp (); |
cc9836a8 | 1036 | |
7a78ae4e ND |
1037 | /* location for 8 parameters are always reserved. */ |
1038 | sp -= wordsize * 8; | |
f6077098 | 1039 | |
7a78ae4e ND |
1040 | /* another six words for back chain, TOC register, link register, etc. */ |
1041 | sp -= wordsize * 6; | |
f6077098 | 1042 | |
7a78ae4e ND |
1043 | /* stack pointer must be quadword aligned */ |
1044 | sp &= -16; | |
c906108c | 1045 | |
c906108c SS |
1046 | /* if there are more arguments, allocate space for them in |
1047 | the stack, then push them starting from the ninth one. */ | |
1048 | ||
c5aa993b JM |
1049 | if ((argno < nargs) || argbytes) |
1050 | { | |
1051 | int space = 0, jj; | |
c906108c | 1052 | |
c5aa993b JM |
1053 | if (argbytes) |
1054 | { | |
1055 | space += ((len - argbytes + 3) & -4); | |
1056 | jj = argno + 1; | |
1057 | } | |
1058 | else | |
1059 | jj = argno; | |
c906108c | 1060 | |
c5aa993b JM |
1061 | for (; jj < nargs; ++jj) |
1062 | { | |
ea7c478f | 1063 | struct value *val = args[jj]; |
c5aa993b JM |
1064 | space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4; |
1065 | } | |
c906108c | 1066 | |
c5aa993b | 1067 | /* add location required for the rest of the parameters */ |
f6077098 | 1068 | space = (space + 15) & -16; |
c5aa993b | 1069 | sp -= space; |
c906108c | 1070 | |
c5aa993b JM |
1071 | /* This is another instance we need to be concerned about securing our |
1072 | stack space. If we write anything underneath %sp (r1), we might conflict | |
1073 | with the kernel who thinks he is free to use this area. So, update %sp | |
1074 | first before doing anything else. */ | |
c906108c | 1075 | |
c5aa993b | 1076 | write_register (SP_REGNUM, sp); |
c906108c | 1077 | |
c5aa993b JM |
1078 | /* if the last argument copied into the registers didn't fit there |
1079 | completely, push the rest of it into stack. */ | |
c906108c | 1080 | |
c5aa993b JM |
1081 | if (argbytes) |
1082 | { | |
1083 | write_memory (sp + 24 + (ii * 4), | |
1084 | ((char *) VALUE_CONTENTS (arg)) + argbytes, | |
1085 | len - argbytes); | |
1086 | ++argno; | |
1087 | ii += ((len - argbytes + 3) & -4) / 4; | |
1088 | } | |
c906108c | 1089 | |
c5aa993b JM |
1090 | /* push the rest of the arguments into stack. */ |
1091 | for (; argno < nargs; ++argno) | |
1092 | { | |
c906108c | 1093 | |
c5aa993b JM |
1094 | arg = args[argno]; |
1095 | type = check_typedef (VALUE_TYPE (arg)); | |
1096 | len = TYPE_LENGTH (type); | |
c906108c SS |
1097 | |
1098 | ||
c5aa993b JM |
1099 | /* float types should be passed in fpr's, as well as in the stack. */ |
1100 | if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13) | |
1101 | { | |
c906108c | 1102 | |
c5aa993b JM |
1103 | if (len > 8) |
1104 | printf_unfiltered ( | |
1105 | "Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno); | |
c906108c | 1106 | |
c5aa993b JM |
1107 | memcpy (®isters[REGISTER_BYTE (FP0_REGNUM + 1 + f_argno)], |
1108 | VALUE_CONTENTS (arg), | |
1109 | len); | |
1110 | ++f_argno; | |
1111 | } | |
c906108c | 1112 | |
c5aa993b JM |
1113 | write_memory (sp + 24 + (ii * 4), (char *) VALUE_CONTENTS (arg), len); |
1114 | ii += ((len + 3) & -4) / 4; | |
1115 | } | |
c906108c | 1116 | } |
c906108c SS |
1117 | else |
1118 | /* Secure stack areas first, before doing anything else. */ | |
1119 | write_register (SP_REGNUM, sp); | |
1120 | ||
c906108c SS |
1121 | /* set back chain properly */ |
1122 | store_address (tmp_buffer, 4, saved_sp); | |
1123 | write_memory (sp, tmp_buffer, 4); | |
1124 | ||
1125 | target_store_registers (-1); | |
1126 | return sp; | |
1127 | } | |
c906108c SS |
1128 | |
1129 | /* Function: ppc_push_return_address (pc, sp) | |
1130 | Set up the return address for the inferior function call. */ | |
1131 | ||
7a78ae4e ND |
1132 | static CORE_ADDR |
1133 | ppc_push_return_address (CORE_ADDR pc, CORE_ADDR sp) | |
c906108c | 1134 | { |
2188cbdd EZ |
1135 | write_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum, |
1136 | CALL_DUMMY_ADDRESS ()); | |
c906108c SS |
1137 | return sp; |
1138 | } | |
1139 | ||
7a78ae4e ND |
1140 | /* Extract a function return value of type TYPE from raw register array |
1141 | REGBUF, and copy that return value into VALBUF in virtual format. */ | |
c906108c | 1142 | |
7a78ae4e ND |
1143 | static void |
1144 | rs6000_extract_return_value (struct type *valtype, char *regbuf, char *valbuf) | |
c906108c SS |
1145 | { |
1146 | int offset = 0; | |
1147 | ||
c5aa993b JM |
1148 | if (TYPE_CODE (valtype) == TYPE_CODE_FLT) |
1149 | { | |
c906108c | 1150 | |
c5aa993b JM |
1151 | double dd; |
1152 | float ff; | |
1153 | /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes. | |
1154 | We need to truncate the return value into float size (4 byte) if | |
1155 | necessary. */ | |
c906108c | 1156 | |
c5aa993b JM |
1157 | if (TYPE_LENGTH (valtype) > 4) /* this is a double */ |
1158 | memcpy (valbuf, | |
1159 | ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], | |
1160 | TYPE_LENGTH (valtype)); | |
1161 | else | |
1162 | { /* float */ | |
1163 | memcpy (&dd, ®buf[REGISTER_BYTE (FP0_REGNUM + 1)], 8); | |
1164 | ff = (float) dd; | |
1165 | memcpy (valbuf, &ff, sizeof (float)); | |
1166 | } | |
1167 | } | |
1168 | else | |
1169 | { | |
1170 | /* return value is copied starting from r3. */ | |
d7449b42 | 1171 | if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG |
c5aa993b JM |
1172 | && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3)) |
1173 | offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype); | |
1174 | ||
1175 | memcpy (valbuf, | |
1176 | regbuf + REGISTER_BYTE (3) + offset, | |
c906108c | 1177 | TYPE_LENGTH (valtype)); |
c906108c | 1178 | } |
c906108c SS |
1179 | } |
1180 | ||
7a78ae4e | 1181 | /* Keep structure return address in this variable. |
c906108c SS |
1182 | FIXME: This is a horrid kludge which should not be allowed to continue |
1183 | living. This only allows a single nested call to a structure-returning | |
1184 | function. Come on, guys! -- gnu@cygnus.com, Aug 92 */ | |
1185 | ||
7a78ae4e | 1186 | static CORE_ADDR rs6000_struct_return_address; |
c906108c | 1187 | |
977adac5 ND |
1188 | /* Return whether handle_inferior_event() should proceed through code |
1189 | starting at PC in function NAME when stepping. | |
1190 | ||
1191 | The AIX -bbigtoc linker option generates functions @FIX0, @FIX1, etc. to | |
1192 | handle memory references that are too distant to fit in instructions | |
1193 | generated by the compiler. For example, if 'foo' in the following | |
1194 | instruction: | |
1195 | ||
1196 | lwz r9,foo(r2) | |
1197 | ||
1198 | is greater than 32767, the linker might replace the lwz with a branch to | |
1199 | somewhere in @FIX1 that does the load in 2 instructions and then branches | |
1200 | back to where execution should continue. | |
1201 | ||
1202 | GDB should silently step over @FIX code, just like AIX dbx does. | |
1203 | Unfortunately, the linker uses the "b" instruction for the branches, | |
1204 | meaning that the link register doesn't get set. Therefore, GDB's usual | |
1205 | step_over_function() mechanism won't work. | |
1206 | ||
1207 | Instead, use the IN_SOLIB_RETURN_TRAMPOLINE and SKIP_TRAMPOLINE_CODE hooks | |
1208 | in handle_inferior_event() to skip past @FIX code. */ | |
1209 | ||
1210 | int | |
1211 | rs6000_in_solib_return_trampoline (CORE_ADDR pc, char *name) | |
1212 | { | |
1213 | return name && !strncmp (name, "@FIX", 4); | |
1214 | } | |
1215 | ||
1216 | /* Skip code that the user doesn't want to see when stepping: | |
1217 | ||
1218 | 1. Indirect function calls use a piece of trampoline code to do context | |
1219 | switching, i.e. to set the new TOC table. Skip such code if we are on | |
1220 | its first instruction (as when we have single-stepped to here). | |
1221 | ||
1222 | 2. Skip shared library trampoline code (which is different from | |
c906108c | 1223 | indirect function call trampolines). |
977adac5 ND |
1224 | |
1225 | 3. Skip bigtoc fixup code. | |
1226 | ||
c906108c | 1227 | Result is desired PC to step until, or NULL if we are not in |
977adac5 | 1228 | code that should be skipped. */ |
c906108c SS |
1229 | |
1230 | CORE_ADDR | |
7a78ae4e | 1231 | rs6000_skip_trampoline_code (CORE_ADDR pc) |
c906108c SS |
1232 | { |
1233 | register unsigned int ii, op; | |
977adac5 | 1234 | int rel; |
c906108c | 1235 | CORE_ADDR solib_target_pc; |
977adac5 | 1236 | struct minimal_symbol *msymbol; |
c906108c | 1237 | |
c5aa993b JM |
1238 | static unsigned trampoline_code[] = |
1239 | { | |
1240 | 0x800b0000, /* l r0,0x0(r11) */ | |
1241 | 0x90410014, /* st r2,0x14(r1) */ | |
1242 | 0x7c0903a6, /* mtctr r0 */ | |
1243 | 0x804b0004, /* l r2,0x4(r11) */ | |
1244 | 0x816b0008, /* l r11,0x8(r11) */ | |
1245 | 0x4e800420, /* bctr */ | |
1246 | 0x4e800020, /* br */ | |
1247 | 0 | |
c906108c SS |
1248 | }; |
1249 | ||
977adac5 ND |
1250 | /* Check for bigtoc fixup code. */ |
1251 | msymbol = lookup_minimal_symbol_by_pc (pc); | |
1252 | if (msymbol && rs6000_in_solib_return_trampoline (pc, SYMBOL_NAME (msymbol))) | |
1253 | { | |
1254 | /* Double-check that the third instruction from PC is relative "b". */ | |
1255 | op = read_memory_integer (pc + 8, 4); | |
1256 | if ((op & 0xfc000003) == 0x48000000) | |
1257 | { | |
1258 | /* Extract bits 6-29 as a signed 24-bit relative word address and | |
1259 | add it to the containing PC. */ | |
1260 | rel = ((int)(op << 6) >> 6); | |
1261 | return pc + 8 + rel; | |
1262 | } | |
1263 | } | |
1264 | ||
c906108c SS |
1265 | /* If pc is in a shared library trampoline, return its target. */ |
1266 | solib_target_pc = find_solib_trampoline_target (pc); | |
1267 | if (solib_target_pc) | |
1268 | return solib_target_pc; | |
1269 | ||
c5aa993b JM |
1270 | for (ii = 0; trampoline_code[ii]; ++ii) |
1271 | { | |
1272 | op = read_memory_integer (pc + (ii * 4), 4); | |
1273 | if (op != trampoline_code[ii]) | |
1274 | return 0; | |
1275 | } | |
1276 | ii = read_register (11); /* r11 holds destination addr */ | |
7a78ae4e | 1277 | pc = read_memory_addr (ii, TDEP->wordsize); /* (r11) value */ |
c906108c SS |
1278 | return pc; |
1279 | } | |
1280 | ||
1281 | /* Determines whether the function FI has a frame on the stack or not. */ | |
1282 | ||
9aa1e687 | 1283 | int |
c877c8e6 | 1284 | rs6000_frameless_function_invocation (struct frame_info *fi) |
c906108c SS |
1285 | { |
1286 | CORE_ADDR func_start; | |
1287 | struct rs6000_framedata fdata; | |
1288 | ||
1289 | /* Don't even think about framelessness except on the innermost frame | |
1290 | or if the function was interrupted by a signal. */ | |
1291 | if (fi->next != NULL && !fi->next->signal_handler_caller) | |
1292 | return 0; | |
c5aa993b | 1293 | |
c906108c SS |
1294 | func_start = get_pc_function_start (fi->pc); |
1295 | ||
1296 | /* If we failed to find the start of the function, it is a mistake | |
1297 | to inspect the instructions. */ | |
1298 | ||
1299 | if (!func_start) | |
1300 | { | |
1301 | /* A frame with a zero PC is usually created by dereferencing a NULL | |
c5aa993b JM |
1302 | function pointer, normally causing an immediate core dump of the |
1303 | inferior. Mark function as frameless, as the inferior has no chance | |
1304 | of setting up a stack frame. */ | |
c906108c SS |
1305 | if (fi->pc == 0) |
1306 | return 1; | |
1307 | else | |
1308 | return 0; | |
1309 | } | |
1310 | ||
077276e8 | 1311 | (void) skip_prologue (func_start, fi->pc, &fdata); |
c906108c SS |
1312 | return fdata.frameless; |
1313 | } | |
1314 | ||
1315 | /* Return the PC saved in a frame */ | |
1316 | ||
9aa1e687 | 1317 | CORE_ADDR |
c877c8e6 | 1318 | rs6000_frame_saved_pc (struct frame_info *fi) |
c906108c SS |
1319 | { |
1320 | CORE_ADDR func_start; | |
1321 | struct rs6000_framedata fdata; | |
7a78ae4e | 1322 | int wordsize = TDEP->wordsize; |
c906108c SS |
1323 | |
1324 | if (fi->signal_handler_caller) | |
7a78ae4e | 1325 | return read_memory_addr (fi->frame + SIG_FRAME_PC_OFFSET, wordsize); |
c906108c | 1326 | |
7a78ae4e ND |
1327 | if (PC_IN_CALL_DUMMY (fi->pc, fi->frame, fi->frame)) |
1328 | return generic_read_register_dummy (fi->pc, fi->frame, PC_REGNUM); | |
c906108c SS |
1329 | |
1330 | func_start = get_pc_function_start (fi->pc); | |
1331 | ||
1332 | /* If we failed to find the start of the function, it is a mistake | |
1333 | to inspect the instructions. */ | |
1334 | if (!func_start) | |
1335 | return 0; | |
1336 | ||
077276e8 | 1337 | (void) skip_prologue (func_start, fi->pc, &fdata); |
c906108c SS |
1338 | |
1339 | if (fdata.lr_offset == 0 && fi->next != NULL) | |
1340 | { | |
1341 | if (fi->next->signal_handler_caller) | |
7a78ae4e ND |
1342 | return read_memory_addr (fi->next->frame + SIG_FRAME_LR_OFFSET, |
1343 | wordsize); | |
c906108c | 1344 | else |
7a78ae4e ND |
1345 | return read_memory_addr (FRAME_CHAIN (fi) + DEFAULT_LR_SAVE, |
1346 | wordsize); | |
c906108c SS |
1347 | } |
1348 | ||
1349 | if (fdata.lr_offset == 0) | |
2188cbdd | 1350 | return read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum); |
c906108c | 1351 | |
7a78ae4e | 1352 | return read_memory_addr (FRAME_CHAIN (fi) + fdata.lr_offset, wordsize); |
c906108c SS |
1353 | } |
1354 | ||
1355 | /* If saved registers of frame FI are not known yet, read and cache them. | |
1356 | &FDATAP contains rs6000_framedata; TDATAP can be NULL, | |
1357 | in which case the framedata are read. */ | |
1358 | ||
1359 | static void | |
7a78ae4e | 1360 | frame_get_saved_regs (struct frame_info *fi, struct rs6000_framedata *fdatap) |
c906108c | 1361 | { |
c5aa993b | 1362 | CORE_ADDR frame_addr; |
c906108c | 1363 | struct rs6000_framedata work_fdata; |
6be8bc0c EZ |
1364 | struct gdbarch_tdep * tdep = gdbarch_tdep (current_gdbarch); |
1365 | int wordsize = tdep->wordsize; | |
c906108c SS |
1366 | |
1367 | if (fi->saved_regs) | |
1368 | return; | |
c5aa993b | 1369 | |
c906108c SS |
1370 | if (fdatap == NULL) |
1371 | { | |
1372 | fdatap = &work_fdata; | |
077276e8 | 1373 | (void) skip_prologue (get_pc_function_start (fi->pc), fi->pc, fdatap); |
c906108c SS |
1374 | } |
1375 | ||
1376 | frame_saved_regs_zalloc (fi); | |
1377 | ||
1378 | /* If there were any saved registers, figure out parent's stack | |
1379 | pointer. */ | |
1380 | /* The following is true only if the frame doesn't have a call to | |
1381 | alloca(), FIXME. */ | |
1382 | ||
6be8bc0c EZ |
1383 | if (fdatap->saved_fpr == 0 |
1384 | && fdatap->saved_gpr == 0 | |
1385 | && fdatap->saved_vr == 0 | |
1386 | && fdatap->lr_offset == 0 | |
1387 | && fdatap->cr_offset == 0 | |
1388 | && fdatap->vr_offset == 0) | |
c906108c SS |
1389 | frame_addr = 0; |
1390 | else if (fi->prev && fi->prev->frame) | |
1391 | frame_addr = fi->prev->frame; | |
1392 | else | |
7a78ae4e | 1393 | frame_addr = read_memory_addr (fi->frame, wordsize); |
c5aa993b | 1394 | |
c906108c SS |
1395 | /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr. |
1396 | All fpr's from saved_fpr to fp31 are saved. */ | |
1397 | ||
1398 | if (fdatap->saved_fpr >= 0) | |
1399 | { | |
1400 | int i; | |
7a78ae4e | 1401 | CORE_ADDR fpr_addr = frame_addr + fdatap->fpr_offset; |
c906108c SS |
1402 | for (i = fdatap->saved_fpr; i < 32; i++) |
1403 | { | |
7a78ae4e ND |
1404 | fi->saved_regs[FP0_REGNUM + i] = fpr_addr; |
1405 | fpr_addr += 8; | |
c906108c SS |
1406 | } |
1407 | } | |
1408 | ||
1409 | /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr. | |
1410 | All gpr's from saved_gpr to gpr31 are saved. */ | |
1411 | ||
1412 | if (fdatap->saved_gpr >= 0) | |
1413 | { | |
1414 | int i; | |
7a78ae4e | 1415 | CORE_ADDR gpr_addr = frame_addr + fdatap->gpr_offset; |
c906108c SS |
1416 | for (i = fdatap->saved_gpr; i < 32; i++) |
1417 | { | |
7a78ae4e ND |
1418 | fi->saved_regs[i] = gpr_addr; |
1419 | gpr_addr += wordsize; | |
c906108c SS |
1420 | } |
1421 | } | |
1422 | ||
6be8bc0c EZ |
1423 | /* if != -1, fdatap->saved_vr is the smallest number of saved_vr. |
1424 | All vr's from saved_vr to vr31 are saved. */ | |
1425 | if (tdep->ppc_vr0_regnum != -1 && tdep->ppc_vrsave_regnum != -1) | |
1426 | { | |
1427 | if (fdatap->saved_vr >= 0) | |
1428 | { | |
1429 | int i; | |
1430 | CORE_ADDR vr_addr = frame_addr + fdatap->vr_offset; | |
1431 | for (i = fdatap->saved_vr; i < 32; i++) | |
1432 | { | |
1433 | fi->saved_regs[tdep->ppc_vr0_regnum + i] = vr_addr; | |
1434 | vr_addr += REGISTER_RAW_SIZE (tdep->ppc_vr0_regnum); | |
1435 | } | |
1436 | } | |
1437 | } | |
1438 | ||
c906108c SS |
1439 | /* If != 0, fdatap->cr_offset is the offset from the frame that holds |
1440 | the CR. */ | |
1441 | if (fdatap->cr_offset != 0) | |
6be8bc0c | 1442 | fi->saved_regs[tdep->ppc_cr_regnum] = frame_addr + fdatap->cr_offset; |
c906108c SS |
1443 | |
1444 | /* If != 0, fdatap->lr_offset is the offset from the frame that holds | |
1445 | the LR. */ | |
1446 | if (fdatap->lr_offset != 0) | |
6be8bc0c EZ |
1447 | fi->saved_regs[tdep->ppc_lr_regnum] = frame_addr + fdatap->lr_offset; |
1448 | ||
1449 | /* If != 0, fdatap->vrsave_offset is the offset from the frame that holds | |
1450 | the VRSAVE. */ | |
1451 | if (fdatap->vrsave_offset != 0) | |
1452 | fi->saved_regs[tdep->ppc_vrsave_regnum] = frame_addr + fdatap->vrsave_offset; | |
c906108c SS |
1453 | } |
1454 | ||
1455 | /* Return the address of a frame. This is the inital %sp value when the frame | |
1456 | was first allocated. For functions calling alloca(), it might be saved in | |
1457 | an alloca register. */ | |
1458 | ||
1459 | static CORE_ADDR | |
7a78ae4e | 1460 | frame_initial_stack_address (struct frame_info *fi) |
c906108c SS |
1461 | { |
1462 | CORE_ADDR tmpaddr; | |
1463 | struct rs6000_framedata fdata; | |
1464 | struct frame_info *callee_fi; | |
1465 | ||
1466 | /* if the initial stack pointer (frame address) of this frame is known, | |
1467 | just return it. */ | |
1468 | ||
1469 | if (fi->extra_info->initial_sp) | |
1470 | return fi->extra_info->initial_sp; | |
1471 | ||
1472 | /* find out if this function is using an alloca register.. */ | |
1473 | ||
077276e8 | 1474 | (void) skip_prologue (get_pc_function_start (fi->pc), fi->pc, &fdata); |
c906108c SS |
1475 | |
1476 | /* if saved registers of this frame are not known yet, read and cache them. */ | |
1477 | ||
1478 | if (!fi->saved_regs) | |
1479 | frame_get_saved_regs (fi, &fdata); | |
1480 | ||
1481 | /* If no alloca register used, then fi->frame is the value of the %sp for | |
1482 | this frame, and it is good enough. */ | |
1483 | ||
1484 | if (fdata.alloca_reg < 0) | |
1485 | { | |
1486 | fi->extra_info->initial_sp = fi->frame; | |
1487 | return fi->extra_info->initial_sp; | |
1488 | } | |
1489 | ||
1490 | /* This function has an alloca register. If this is the top-most frame | |
1491 | (with the lowest address), the value in alloca register is good. */ | |
1492 | ||
1493 | if (!fi->next) | |
c5aa993b | 1494 | return fi->extra_info->initial_sp = read_register (fdata.alloca_reg); |
c906108c SS |
1495 | |
1496 | /* Otherwise, this is a caller frame. Callee has usually already saved | |
1497 | registers, but there are exceptions (such as when the callee | |
1498 | has no parameters). Find the address in which caller's alloca | |
1499 | register is saved. */ | |
1500 | ||
c5aa993b JM |
1501 | for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) |
1502 | { | |
c906108c | 1503 | |
c5aa993b JM |
1504 | if (!callee_fi->saved_regs) |
1505 | frame_get_saved_regs (callee_fi, NULL); | |
c906108c | 1506 | |
c5aa993b | 1507 | /* this is the address in which alloca register is saved. */ |
c906108c | 1508 | |
c5aa993b JM |
1509 | tmpaddr = callee_fi->saved_regs[fdata.alloca_reg]; |
1510 | if (tmpaddr) | |
1511 | { | |
7a78ae4e ND |
1512 | fi->extra_info->initial_sp = |
1513 | read_memory_addr (tmpaddr, TDEP->wordsize); | |
c5aa993b JM |
1514 | return fi->extra_info->initial_sp; |
1515 | } | |
c906108c | 1516 | |
c5aa993b JM |
1517 | /* Go look into deeper levels of the frame chain to see if any one of |
1518 | the callees has saved alloca register. */ | |
1519 | } | |
c906108c SS |
1520 | |
1521 | /* If alloca register was not saved, by the callee (or any of its callees) | |
1522 | then the value in the register is still good. */ | |
1523 | ||
1524 | fi->extra_info->initial_sp = read_register (fdata.alloca_reg); | |
1525 | return fi->extra_info->initial_sp; | |
1526 | } | |
1527 | ||
7a78ae4e ND |
1528 | /* Describe the pointer in each stack frame to the previous stack frame |
1529 | (its caller). */ | |
1530 | ||
1531 | /* FRAME_CHAIN takes a frame's nominal address | |
1532 | and produces the frame's chain-pointer. */ | |
1533 | ||
1534 | /* In the case of the RS/6000, the frame's nominal address | |
1535 | is the address of a 4-byte word containing the calling frame's address. */ | |
1536 | ||
9aa1e687 | 1537 | CORE_ADDR |
7a78ae4e | 1538 | rs6000_frame_chain (struct frame_info *thisframe) |
c906108c | 1539 | { |
7a78ae4e ND |
1540 | CORE_ADDR fp, fpp, lr; |
1541 | int wordsize = TDEP->wordsize; | |
c906108c | 1542 | |
7a78ae4e ND |
1543 | if (PC_IN_CALL_DUMMY (thisframe->pc, thisframe->frame, thisframe->frame)) |
1544 | return thisframe->frame; /* dummy frame same as caller's frame */ | |
c906108c | 1545 | |
c5aa993b | 1546 | if (inside_entry_file (thisframe->pc) || |
c906108c SS |
1547 | thisframe->pc == entry_point_address ()) |
1548 | return 0; | |
1549 | ||
1550 | if (thisframe->signal_handler_caller) | |
7a78ae4e ND |
1551 | fp = read_memory_addr (thisframe->frame + SIG_FRAME_FP_OFFSET, |
1552 | wordsize); | |
c906108c SS |
1553 | else if (thisframe->next != NULL |
1554 | && thisframe->next->signal_handler_caller | |
c877c8e6 | 1555 | && FRAMELESS_FUNCTION_INVOCATION (thisframe)) |
c906108c SS |
1556 | /* A frameless function interrupted by a signal did not change the |
1557 | frame pointer. */ | |
1558 | fp = FRAME_FP (thisframe); | |
1559 | else | |
7a78ae4e | 1560 | fp = read_memory_addr ((thisframe)->frame, wordsize); |
c906108c | 1561 | |
2188cbdd | 1562 | lr = read_register (gdbarch_tdep (current_gdbarch)->ppc_lr_regnum); |
7a78ae4e ND |
1563 | if (lr == entry_point_address ()) |
1564 | if (fp != 0 && (fpp = read_memory_addr (fp, wordsize)) != 0) | |
1565 | if (PC_IN_CALL_DUMMY (lr, fpp, fpp)) | |
1566 | return fpp; | |
1567 | ||
1568 | return fp; | |
1569 | } | |
1570 | ||
1571 | /* Return the size of register REG when words are WORDSIZE bytes long. If REG | |
1572 | isn't available with that word size, return 0. */ | |
1573 | ||
1574 | static int | |
1575 | regsize (const struct reg *reg, int wordsize) | |
1576 | { | |
1577 | return wordsize == 8 ? reg->sz64 : reg->sz32; | |
1578 | } | |
1579 | ||
1580 | /* Return the name of register number N, or null if no such register exists | |
1581 | in the current architecture. */ | |
1582 | ||
1583 | static char * | |
1584 | rs6000_register_name (int n) | |
1585 | { | |
1586 | struct gdbarch_tdep *tdep = TDEP; | |
1587 | const struct reg *reg = tdep->regs + n; | |
1588 | ||
1589 | if (!regsize (reg, tdep->wordsize)) | |
1590 | return NULL; | |
1591 | return reg->name; | |
1592 | } | |
1593 | ||
1594 | /* Index within `registers' of the first byte of the space for | |
1595 | register N. */ | |
1596 | ||
1597 | static int | |
1598 | rs6000_register_byte (int n) | |
1599 | { | |
1600 | return TDEP->regoff[n]; | |
1601 | } | |
1602 | ||
1603 | /* Return the number of bytes of storage in the actual machine representation | |
1604 | for register N if that register is available, else return 0. */ | |
1605 | ||
1606 | static int | |
1607 | rs6000_register_raw_size (int n) | |
1608 | { | |
1609 | struct gdbarch_tdep *tdep = TDEP; | |
1610 | const struct reg *reg = tdep->regs + n; | |
1611 | return regsize (reg, tdep->wordsize); | |
1612 | } | |
1613 | ||
7a78ae4e ND |
1614 | /* Return the GDB type object for the "standard" data type |
1615 | of data in register N. */ | |
1616 | ||
1617 | static struct type * | |
fba45db2 | 1618 | rs6000_register_virtual_type (int n) |
7a78ae4e ND |
1619 | { |
1620 | struct gdbarch_tdep *tdep = TDEP; | |
1621 | const struct reg *reg = tdep->regs + n; | |
1622 | ||
1fcc0bb8 EZ |
1623 | if (reg->fpr) |
1624 | return builtin_type_double; | |
1625 | else | |
1626 | { | |
1627 | int size = regsize (reg, tdep->wordsize); | |
1628 | switch (size) | |
1629 | { | |
1630 | case 8: | |
1631 | return builtin_type_int64; | |
1632 | break; | |
1633 | case 16: | |
08cf96df | 1634 | return builtin_type_vec128; |
1fcc0bb8 EZ |
1635 | break; |
1636 | default: | |
1637 | return builtin_type_int32; | |
1638 | break; | |
1639 | } | |
1640 | } | |
7a78ae4e ND |
1641 | } |
1642 | ||
1643 | /* For the PowerPC, it appears that the debug info marks float parameters as | |
1644 | floats regardless of whether the function is prototyped, but the actual | |
1645 | values are always passed in as doubles. Tell gdb to always assume that | |
1646 | floats are passed as doubles and then converted in the callee. */ | |
1647 | ||
1648 | static int | |
1649 | rs6000_coerce_float_to_double (struct type *formal, struct type *actual) | |
1650 | { | |
1651 | return 1; | |
1652 | } | |
1653 | ||
1654 | /* Return whether register N requires conversion when moving from raw format | |
1655 | to virtual format. | |
1656 | ||
1657 | The register format for RS/6000 floating point registers is always | |
1658 | double, we need a conversion if the memory format is float. */ | |
1659 | ||
1660 | static int | |
1661 | rs6000_register_convertible (int n) | |
1662 | { | |
1663 | const struct reg *reg = TDEP->regs + n; | |
1664 | return reg->fpr; | |
1665 | } | |
1666 | ||
1667 | /* Convert data from raw format for register N in buffer FROM | |
1668 | to virtual format with type TYPE in buffer TO. */ | |
1669 | ||
1670 | static void | |
1671 | rs6000_register_convert_to_virtual (int n, struct type *type, | |
1672 | char *from, char *to) | |
1673 | { | |
1674 | if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n)) | |
7a292a7a | 1675 | { |
7a78ae4e ND |
1676 | double val = extract_floating (from, REGISTER_RAW_SIZE (n)); |
1677 | store_floating (to, TYPE_LENGTH (type), val); | |
1678 | } | |
1679 | else | |
1680 | memcpy (to, from, REGISTER_RAW_SIZE (n)); | |
1681 | } | |
1682 | ||
1683 | /* Convert data from virtual format with type TYPE in buffer FROM | |
1684 | to raw format for register N in buffer TO. */ | |
7a292a7a | 1685 | |
7a78ae4e ND |
1686 | static void |
1687 | rs6000_register_convert_to_raw (struct type *type, int n, | |
1688 | char *from, char *to) | |
1689 | { | |
1690 | if (TYPE_LENGTH (type) != REGISTER_RAW_SIZE (n)) | |
1691 | { | |
1692 | double val = extract_floating (from, TYPE_LENGTH (type)); | |
1693 | store_floating (to, REGISTER_RAW_SIZE (n), val); | |
7a292a7a | 1694 | } |
7a78ae4e ND |
1695 | else |
1696 | memcpy (to, from, REGISTER_RAW_SIZE (n)); | |
1697 | } | |
c906108c | 1698 | |
1fcc0bb8 EZ |
1699 | int |
1700 | altivec_register_p (int regno) | |
1701 | { | |
1702 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
1703 | if (tdep->ppc_vr0_regnum < 0 || tdep->ppc_vrsave_regnum < 0) | |
1704 | return 0; | |
1705 | else | |
1706 | return (regno >= tdep->ppc_vr0_regnum && regno <= tdep->ppc_vrsave_regnum); | |
1707 | } | |
1708 | ||
1709 | static void | |
1710 | rs6000_do_altivec_registers (int regnum) | |
1711 | { | |
1712 | int i; | |
1713 | char *raw_buffer = (char*) alloca (MAX_REGISTER_RAW_SIZE); | |
1714 | char *virtual_buffer = (char*) alloca (MAX_REGISTER_VIRTUAL_SIZE); | |
1715 | struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); | |
1716 | ||
1717 | for (i = tdep->ppc_vr0_regnum; i <= tdep->ppc_vrsave_regnum; i++) | |
1718 | { | |
1719 | /* If we want just one reg, check that this is the one we want. */ | |
1720 | if (regnum != -1 && i != regnum) | |
1721 | continue; | |
1722 | ||
1723 | /* If the register name is empty, it is undefined for this | |
1724 | processor, so don't display anything. */ | |
1725 | if (REGISTER_NAME (i) == NULL || *(REGISTER_NAME (i)) == '\0') | |
1726 | continue; | |
1727 | ||
1728 | fputs_filtered (REGISTER_NAME (i), gdb_stdout); | |
1729 | print_spaces_filtered (15 - strlen (REGISTER_NAME (i)), gdb_stdout); | |
1730 | ||
1731 | /* Get the data in raw format. */ | |
1732 | if (read_relative_register_raw_bytes (i, raw_buffer)) | |
1733 | { | |
1734 | printf_filtered ("*value not available*\n"); | |
1735 | continue; | |
1736 | } | |
1737 | ||
1738 | /* Convert raw data to virtual format if necessary. */ | |
1739 | if (REGISTER_CONVERTIBLE (i)) | |
1740 | REGISTER_CONVERT_TO_VIRTUAL (i, REGISTER_VIRTUAL_TYPE (i), | |
1741 | raw_buffer, virtual_buffer); | |
1742 | else | |
1743 | memcpy (virtual_buffer, raw_buffer, REGISTER_VIRTUAL_SIZE (i)); | |
1744 | ||
1745 | /* Print as integer in hex only. */ | |
1746 | val_print (REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, 0, | |
1747 | gdb_stdout, 'x', 1, 0, Val_pretty_default); | |
1748 | printf_filtered ("\n"); | |
1749 | } | |
1750 | } | |
1751 | ||
1752 | static void | |
1753 | rs6000_altivec_registers_info (char *addr_exp, int from_tty) | |
1754 | { | |
1755 | int regnum, numregs; | |
1756 | register char *end; | |
1757 | ||
1758 | if (!target_has_registers) | |
1759 | error ("The program has no registers now."); | |
1760 | if (selected_frame == NULL) | |
1761 | error ("No selected frame."); | |
1762 | ||
1763 | if (!addr_exp) | |
1764 | { | |
1765 | rs6000_do_altivec_registers (-1); | |
1766 | return; | |
1767 | } | |
1768 | ||
1769 | numregs = NUM_REGS + NUM_PSEUDO_REGS; | |
1770 | do | |
1771 | { | |
1772 | if (addr_exp[0] == '$') | |
1773 | addr_exp++; | |
1774 | end = addr_exp; | |
1775 | while (*end != '\0' && *end != ' ' && *end != '\t') | |
1776 | ++end; | |
1777 | ||
1778 | regnum = target_map_name_to_register (addr_exp, end - addr_exp); | |
1779 | if (regnum < 0) | |
1780 | { | |
1781 | regnum = numregs; | |
1782 | if (*addr_exp >= '0' && *addr_exp <= '9') | |
1783 | regnum = atoi (addr_exp); /* Take a number */ | |
1784 | if (regnum >= numregs) /* Bad name, or bad number */ | |
1785 | error ("%.*s: invalid register", end - addr_exp, addr_exp); | |
1786 | } | |
1787 | ||
1788 | rs6000_do_altivec_registers (regnum); | |
1789 | ||
1790 | addr_exp = end; | |
1791 | while (*addr_exp == ' ' || *addr_exp == '\t') | |
1792 | ++addr_exp; | |
1793 | } | |
1794 | while (*addr_exp != '\0'); | |
1795 | } | |
1796 | ||
1797 | static void | |
1798 | rs6000_do_registers_info (int regnum, int fpregs) | |
1799 | { | |
1800 | register int i; | |
1801 | int numregs = NUM_REGS + NUM_PSEUDO_REGS; | |
1802 | char *raw_buffer = (char*) alloca (MAX_REGISTER_RAW_SIZE); | |
1803 | char *virtual_buffer = (char*) alloca (MAX_REGISTER_VIRTUAL_SIZE); | |
1804 | ||
1805 | for (i = 0; i < numregs; i++) | |
1806 | { | |
1807 | /* Decide between printing all regs, nonfloat regs, or specific reg. */ | |
1808 | if (regnum == -1) | |
1809 | { | |
1810 | if ((TYPE_CODE (REGISTER_VIRTUAL_TYPE (i)) == TYPE_CODE_FLT && !fpregs) | |
1811 | || (altivec_register_p (i) && !fpregs)) | |
1812 | continue; | |
1813 | } | |
1814 | else | |
1815 | { | |
1816 | if (i != regnum) | |
1817 | continue; | |
1818 | } | |
1819 | ||
1820 | /* If the register name is empty, it is undefined for this | |
1821 | processor, so don't display anything. */ | |
1822 | if (REGISTER_NAME (i) == NULL || *(REGISTER_NAME (i)) == '\0') | |
1823 | continue; | |
1824 | ||
1825 | fputs_filtered (REGISTER_NAME (i), gdb_stdout); | |
1826 | print_spaces_filtered (15 - strlen (REGISTER_NAME (i)), gdb_stdout); | |
1827 | ||
1828 | /* Get the data in raw format. */ | |
1829 | if (read_relative_register_raw_bytes (i, raw_buffer)) | |
1830 | { | |
1831 | printf_filtered ("*value not available*\n"); | |
1832 | continue; | |
1833 | } | |
1834 | ||
1835 | /* Convert raw data to virtual format if necessary. */ | |
1836 | if (REGISTER_CONVERTIBLE (i)) | |
1837 | REGISTER_CONVERT_TO_VIRTUAL (i, REGISTER_VIRTUAL_TYPE (i), | |
1838 | raw_buffer, virtual_buffer); | |
1839 | else | |
1840 | memcpy (virtual_buffer, raw_buffer, REGISTER_VIRTUAL_SIZE (i)); | |
1841 | ||
1842 | /* If virtual format is floating, print it that way, and in raw hex. */ | |
1843 | if (TYPE_CODE (REGISTER_VIRTUAL_TYPE (i)) == TYPE_CODE_FLT) | |
1844 | { | |
1845 | register int j; | |
1846 | ||
75bc7ddf AC |
1847 | val_print (REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, 0, |
1848 | gdb_stdout, 0, 1, 0, Val_pretty_default); | |
1fcc0bb8 EZ |
1849 | |
1850 | printf_filtered ("\t(raw 0x"); | |
1851 | for (j = 0; j < REGISTER_RAW_SIZE (i); j++) | |
1852 | { | |
a9011d31 | 1853 | register int idx = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? j |
1fcc0bb8 EZ |
1854 | : REGISTER_RAW_SIZE (i) - 1 - j; |
1855 | printf_filtered ("%02x", (unsigned char) raw_buffer[idx]); | |
1856 | } | |
1857 | printf_filtered (")"); | |
1858 | } | |
1859 | else | |
1860 | { | |
1861 | /* Print as integer in hex and in decimal. */ | |
1862 | if (!altivec_register_p (i)) | |
1863 | { | |
1864 | val_print (REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, 0, | |
1865 | gdb_stdout, 'x', 1, 0, Val_pretty_default); | |
1866 | printf_filtered ("\t"); | |
1867 | val_print (REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, 0, | |
1868 | gdb_stdout, 0, 1, 0, Val_pretty_default); | |
1869 | } | |
1870 | else | |
1871 | /* Print as integer in hex only. */ | |
1872 | val_print (REGISTER_VIRTUAL_TYPE (i), virtual_buffer, 0, 0, | |
1873 | gdb_stdout, 'x', 1, 0, Val_pretty_default); | |
1874 | } | |
1875 | printf_filtered ("\n"); | |
1876 | } | |
1877 | } | |
1878 | ||
2188cbdd EZ |
1879 | /* Convert a dbx stab register number (from `r' declaration) to a gdb |
1880 | REGNUM. */ | |
1881 | static int | |
1882 | rs6000_stab_reg_to_regnum (int num) | |
1883 | { | |
1884 | int regnum; | |
1885 | switch (num) | |
1886 | { | |
1887 | case 64: | |
1888 | regnum = gdbarch_tdep (current_gdbarch)->ppc_mq_regnum; | |
1889 | break; | |
1890 | case 65: | |
1891 | regnum = gdbarch_tdep (current_gdbarch)->ppc_lr_regnum; | |
1892 | break; | |
1893 | case 66: | |
1894 | regnum = gdbarch_tdep (current_gdbarch)->ppc_ctr_regnum; | |
1895 | break; | |
1896 | case 76: | |
1897 | regnum = gdbarch_tdep (current_gdbarch)->ppc_xer_regnum; | |
1898 | break; | |
1899 | default: | |
1900 | regnum = num; | |
1901 | break; | |
1902 | } | |
1903 | return regnum; | |
1904 | } | |
1905 | ||
7a78ae4e ND |
1906 | /* Store the address of the place in which to copy the structure the |
1907 | subroutine will return. This is called from call_function. | |
1908 | ||
1909 | In RS/6000, struct return addresses are passed as an extra parameter in r3. | |
1910 | In function return, callee is not responsible of returning this address | |
1911 | back. Since gdb needs to find it, we will store in a designated variable | |
1912 | `rs6000_struct_return_address'. */ | |
1913 | ||
1914 | static void | |
1915 | rs6000_store_struct_return (CORE_ADDR addr, CORE_ADDR sp) | |
1916 | { | |
1917 | write_register (3, addr); | |
1918 | rs6000_struct_return_address = addr; | |
1919 | } | |
1920 | ||
1921 | /* Write into appropriate registers a function return value | |
1922 | of type TYPE, given in virtual format. */ | |
1923 | ||
1924 | static void | |
1925 | rs6000_store_return_value (struct type *type, char *valbuf) | |
1926 | { | |
1927 | if (TYPE_CODE (type) == TYPE_CODE_FLT) | |
1928 | ||
1929 | /* Floating point values are returned starting from FPR1 and up. | |
1930 | Say a double_double_double type could be returned in | |
1931 | FPR1/FPR2/FPR3 triple. */ | |
1932 | ||
1933 | write_register_bytes (REGISTER_BYTE (FP0_REGNUM + 1), valbuf, | |
1934 | TYPE_LENGTH (type)); | |
1935 | else | |
1936 | /* Everything else is returned in GPR3 and up. */ | |
2188cbdd EZ |
1937 | write_register_bytes (REGISTER_BYTE (gdbarch_tdep (current_gdbarch)->ppc_gp0_regnum + 3), |
1938 | valbuf, TYPE_LENGTH (type)); | |
7a78ae4e ND |
1939 | } |
1940 | ||
1941 | /* Extract from an array REGBUF containing the (raw) register state | |
1942 | the address in which a function should return its structure value, | |
1943 | as a CORE_ADDR (or an expression that can be used as one). */ | |
1944 | ||
1945 | static CORE_ADDR | |
1946 | rs6000_extract_struct_value_address (char *regbuf) | |
1947 | { | |
1948 | return rs6000_struct_return_address; | |
1949 | } | |
1950 | ||
1951 | /* Return whether PC is in a dummy function call. | |
1952 | ||
1953 | FIXME: This just checks for the end of the stack, which is broken | |
1954 | for things like stepping through gcc nested function stubs. */ | |
1955 | ||
1956 | static int | |
1957 | rs6000_pc_in_call_dummy (CORE_ADDR pc, CORE_ADDR sp, CORE_ADDR fp) | |
1958 | { | |
1959 | return sp < pc && pc < fp; | |
1960 | } | |
1961 | ||
1962 | /* Hook called when a new child process is started. */ | |
1963 | ||
1964 | void | |
1965 | rs6000_create_inferior (int pid) | |
1966 | { | |
1967 | if (rs6000_set_host_arch_hook) | |
1968 | rs6000_set_host_arch_hook (pid); | |
c906108c SS |
1969 | } |
1970 | \f | |
7a78ae4e ND |
1971 | /* Support for CONVERT_FROM_FUNC_PTR_ADDR(ADDR). |
1972 | ||
1973 | Usually a function pointer's representation is simply the address | |
1974 | of the function. On the RS/6000 however, a function pointer is | |
1975 | represented by a pointer to a TOC entry. This TOC entry contains | |
1976 | three words, the first word is the address of the function, the | |
1977 | second word is the TOC pointer (r2), and the third word is the | |
1978 | static chain value. Throughout GDB it is currently assumed that a | |
1979 | function pointer contains the address of the function, which is not | |
1980 | easy to fix. In addition, the conversion of a function address to | |
1981 | a function pointer would require allocation of a TOC entry in the | |
1982 | inferior's memory space, with all its drawbacks. To be able to | |
1983 | call C++ virtual methods in the inferior (which are called via | |
f517ea4e | 1984 | function pointers), find_function_addr uses this function to get the |
7a78ae4e ND |
1985 | function address from a function pointer. */ |
1986 | ||
f517ea4e PS |
1987 | /* Return real function address if ADDR (a function pointer) is in the data |
1988 | space and is therefore a special function pointer. */ | |
c906108c | 1989 | |
7a78ae4e ND |
1990 | CORE_ADDR |
1991 | rs6000_convert_from_func_ptr_addr (CORE_ADDR addr) | |
c906108c SS |
1992 | { |
1993 | struct obj_section *s; | |
1994 | ||
1995 | s = find_pc_section (addr); | |
1996 | if (s && s->the_bfd_section->flags & SEC_CODE) | |
7a78ae4e | 1997 | return addr; |
c906108c | 1998 | |
7a78ae4e ND |
1999 | /* ADDR is in the data space, so it's a special function pointer. */ |
2000 | return read_memory_addr (addr, TDEP->wordsize); | |
c906108c | 2001 | } |
c906108c | 2002 | \f |
c5aa993b | 2003 | |
7a78ae4e | 2004 | /* Handling the various POWER/PowerPC variants. */ |
c906108c SS |
2005 | |
2006 | ||
7a78ae4e ND |
2007 | /* The arrays here called registers_MUMBLE hold information about available |
2008 | registers. | |
c906108c SS |
2009 | |
2010 | For each family of PPC variants, I've tried to isolate out the | |
2011 | common registers and put them up front, so that as long as you get | |
2012 | the general family right, GDB will correctly identify the registers | |
2013 | common to that family. The common register sets are: | |
2014 | ||
2015 | For the 60x family: hid0 hid1 iabr dabr pir | |
2016 | ||
2017 | For the 505 and 860 family: eie eid nri | |
2018 | ||
2019 | For the 403 and 403GC: icdbdr esr dear evpr cdbcr tsr tcr pit tbhi | |
c5aa993b JM |
2020 | tblo srr2 srr3 dbsr dbcr iac1 iac2 dac1 dac2 dccr iccr pbl1 |
2021 | pbu1 pbl2 pbu2 | |
c906108c SS |
2022 | |
2023 | Most of these register groups aren't anything formal. I arrived at | |
2024 | them by looking at the registers that occurred in more than one | |
7a78ae4e ND |
2025 | processor. */ |
2026 | ||
2027 | /* Convenience macros for populating register arrays. */ | |
2028 | ||
2029 | /* Within another macro, convert S to a string. */ | |
2030 | ||
2031 | #define STR(s) #s | |
2032 | ||
2033 | /* Return a struct reg defining register NAME that's 32 bits on 32-bit systems | |
2034 | and 64 bits on 64-bit systems. */ | |
2035 | #define R(name) { STR(name), 4, 8, 0 } | |
2036 | ||
2037 | /* Return a struct reg defining register NAME that's 32 bits on all | |
2038 | systems. */ | |
2039 | #define R4(name) { STR(name), 4, 4, 0 } | |
2040 | ||
2041 | /* Return a struct reg defining register NAME that's 64 bits on all | |
2042 | systems. */ | |
2043 | #define R8(name) { STR(name), 8, 8, 0 } | |
2044 | ||
1fcc0bb8 EZ |
2045 | /* Return a struct reg defining register NAME that's 128 bits on all |
2046 | systems. */ | |
2047 | #define R16(name) { STR(name), 16, 16, 0 } | |
2048 | ||
7a78ae4e ND |
2049 | /* Return a struct reg defining floating-point register NAME. */ |
2050 | #define F(name) { STR(name), 8, 8, 1 } | |
2051 | ||
2052 | /* Return a struct reg defining register NAME that's 32 bits on 32-bit | |
2053 | systems and that doesn't exist on 64-bit systems. */ | |
2054 | #define R32(name) { STR(name), 4, 0, 0 } | |
2055 | ||
2056 | /* Return a struct reg defining register NAME that's 64 bits on 64-bit | |
2057 | systems and that doesn't exist on 32-bit systems. */ | |
2058 | #define R64(name) { STR(name), 0, 8, 0 } | |
2059 | ||
2060 | /* Return a struct reg placeholder for a register that doesn't exist. */ | |
2061 | #define R0 { 0, 0, 0, 0 } | |
2062 | ||
2063 | /* UISA registers common across all architectures, including POWER. */ | |
2064 | ||
2065 | #define COMMON_UISA_REGS \ | |
2066 | /* 0 */ R(r0), R(r1), R(r2), R(r3), R(r4), R(r5), R(r6), R(r7), \ | |
2067 | /* 8 */ R(r8), R(r9), R(r10),R(r11),R(r12),R(r13),R(r14),R(r15), \ | |
2068 | /* 16 */ R(r16),R(r17),R(r18),R(r19),R(r20),R(r21),R(r22),R(r23), \ | |
2069 | /* 24 */ R(r24),R(r25),R(r26),R(r27),R(r28),R(r29),R(r30),R(r31), \ | |
2070 | /* 32 */ F(f0), F(f1), F(f2), F(f3), F(f4), F(f5), F(f6), F(f7), \ | |
2071 | /* 40 */ F(f8), F(f9), F(f10),F(f11),F(f12),F(f13),F(f14),F(f15), \ | |
2072 | /* 48 */ F(f16),F(f17),F(f18),F(f19),F(f20),F(f21),F(f22),F(f23), \ | |
2073 | /* 56 */ F(f24),F(f25),F(f26),F(f27),F(f28),F(f29),F(f30),F(f31), \ | |
2074 | /* 64 */ R(pc), R(ps) | |
2075 | ||
2076 | /* UISA-level SPRs for PowerPC. */ | |
2077 | #define PPC_UISA_SPRS \ | |
e3f36dbd | 2078 | /* 66 */ R4(cr), R(lr), R(ctr), R4(xer), R4(fpscr) |
7a78ae4e ND |
2079 | |
2080 | /* Segment registers, for PowerPC. */ | |
2081 | #define PPC_SEGMENT_REGS \ | |
2082 | /* 71 */ R32(sr0), R32(sr1), R32(sr2), R32(sr3), \ | |
2083 | /* 75 */ R32(sr4), R32(sr5), R32(sr6), R32(sr7), \ | |
2084 | /* 79 */ R32(sr8), R32(sr9), R32(sr10), R32(sr11), \ | |
2085 | /* 83 */ R32(sr12), R32(sr13), R32(sr14), R32(sr15) | |
2086 | ||
2087 | /* OEA SPRs for PowerPC. */ | |
2088 | #define PPC_OEA_SPRS \ | |
2089 | /* 87 */ R4(pvr), \ | |
2090 | /* 88 */ R(ibat0u), R(ibat0l), R(ibat1u), R(ibat1l), \ | |
2091 | /* 92 */ R(ibat2u), R(ibat2l), R(ibat3u), R(ibat3l), \ | |
2092 | /* 96 */ R(dbat0u), R(dbat0l), R(dbat1u), R(dbat1l), \ | |
2093 | /* 100 */ R(dbat2u), R(dbat2l), R(dbat3u), R(dbat3l), \ | |
2094 | /* 104 */ R(sdr1), R64(asr), R(dar), R4(dsisr), \ | |
2095 | /* 108 */ R(sprg0), R(sprg1), R(sprg2), R(sprg3), \ | |
2096 | /* 112 */ R(srr0), R(srr1), R(tbl), R(tbu), \ | |
2097 | /* 116 */ R4(dec), R(dabr), R4(ear) | |
2098 | ||
1fcc0bb8 EZ |
2099 | /* AltiVec registers */ |
2100 | #define PPC_ALTIVEC_REGS \ | |
2101 | /*119*/R16(vr0), R16(vr1), R16(vr2), R16(vr3), R16(vr4), R16(vr5), R16(vr6), R16(vr7), \ | |
2102 | /*127*/R16(vr8), R16(vr9), R16(vr10),R16(vr11),R16(vr12),R16(vr13),R16(vr14),R16(vr15), \ | |
2103 | /*135*/R16(vr16),R16(vr17),R16(vr18),R16(vr19),R16(vr20),R16(vr21),R16(vr22),R16(vr23), \ | |
2104 | /*143*/R16(vr24),R16(vr25),R16(vr26),R16(vr27),R16(vr28),R16(vr29),R16(vr30),R16(vr31), \ | |
2105 | /*151*/R4(vscr), R4(vrsave) | |
2106 | ||
7a78ae4e ND |
2107 | /* IBM POWER (pre-PowerPC) architecture, user-level view. We only cover |
2108 | user-level SPR's. */ | |
2109 | static const struct reg registers_power[] = | |
c906108c | 2110 | { |
7a78ae4e | 2111 | COMMON_UISA_REGS, |
e3f36dbd KB |
2112 | /* 66 */ R4(cnd), R(lr), R(cnt), R4(xer), R4(mq), |
2113 | /* 71 */ R4(fpscr) | |
c906108c SS |
2114 | }; |
2115 | ||
7a78ae4e ND |
2116 | /* PowerPC UISA - a PPC processor as viewed by user-level code. A UISA-only |
2117 | view of the PowerPC. */ | |
2118 | static const struct reg registers_powerpc[] = | |
c906108c | 2119 | { |
7a78ae4e | 2120 | COMMON_UISA_REGS, |
1fcc0bb8 EZ |
2121 | PPC_UISA_SPRS, |
2122 | PPC_ALTIVEC_REGS | |
c906108c SS |
2123 | }; |
2124 | ||
7a78ae4e ND |
2125 | /* IBM PowerPC 403. */ |
2126 | static const struct reg registers_403[] = | |
c5aa993b | 2127 | { |
7a78ae4e ND |
2128 | COMMON_UISA_REGS, |
2129 | PPC_UISA_SPRS, | |
2130 | PPC_SEGMENT_REGS, | |
2131 | PPC_OEA_SPRS, | |
2132 | /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr), | |
2133 | /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit), | |
2134 | /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3), | |
2135 | /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2), | |
2136 | /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr), | |
2137 | /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2) | |
c906108c SS |
2138 | }; |
2139 | ||
7a78ae4e ND |
2140 | /* IBM PowerPC 403GC. */ |
2141 | static const struct reg registers_403GC[] = | |
c5aa993b | 2142 | { |
7a78ae4e ND |
2143 | COMMON_UISA_REGS, |
2144 | PPC_UISA_SPRS, | |
2145 | PPC_SEGMENT_REGS, | |
2146 | PPC_OEA_SPRS, | |
2147 | /* 119 */ R(icdbdr), R(esr), R(dear), R(evpr), | |
2148 | /* 123 */ R(cdbcr), R(tsr), R(tcr), R(pit), | |
2149 | /* 127 */ R(tbhi), R(tblo), R(srr2), R(srr3), | |
2150 | /* 131 */ R(dbsr), R(dbcr), R(iac1), R(iac2), | |
2151 | /* 135 */ R(dac1), R(dac2), R(dccr), R(iccr), | |
2152 | /* 139 */ R(pbl1), R(pbu1), R(pbl2), R(pbu2), | |
2153 | /* 143 */ R(zpr), R(pid), R(sgr), R(dcwr), | |
2154 | /* 147 */ R(tbhu), R(tblu) | |
c906108c SS |
2155 | }; |
2156 | ||
7a78ae4e ND |
2157 | /* Motorola PowerPC 505. */ |
2158 | static const struct reg registers_505[] = | |
c5aa993b | 2159 | { |
7a78ae4e ND |
2160 | COMMON_UISA_REGS, |
2161 | PPC_UISA_SPRS, | |
2162 | PPC_SEGMENT_REGS, | |
2163 | PPC_OEA_SPRS, | |
2164 | /* 119 */ R(eie), R(eid), R(nri) | |
c906108c SS |
2165 | }; |
2166 | ||
7a78ae4e ND |
2167 | /* Motorola PowerPC 860 or 850. */ |
2168 | static const struct reg registers_860[] = | |
c5aa993b | 2169 | { |
7a78ae4e ND |
2170 | COMMON_UISA_REGS, |
2171 | PPC_UISA_SPRS, | |
2172 | PPC_SEGMENT_REGS, | |
2173 | PPC_OEA_SPRS, | |
2174 | /* 119 */ R(eie), R(eid), R(nri), R(cmpa), | |
2175 | /* 123 */ R(cmpb), R(cmpc), R(cmpd), R(icr), | |
2176 | /* 127 */ R(der), R(counta), R(countb), R(cmpe), | |
2177 | /* 131 */ R(cmpf), R(cmpg), R(cmph), R(lctrl1), | |
2178 | /* 135 */ R(lctrl2), R(ictrl), R(bar), R(ic_cst), | |
2179 | /* 139 */ R(ic_adr), R(ic_dat), R(dc_cst), R(dc_adr), | |
2180 | /* 143 */ R(dc_dat), R(dpdr), R(dpir), R(immr), | |
2181 | /* 147 */ R(mi_ctr), R(mi_ap), R(mi_epn), R(mi_twc), | |
2182 | /* 151 */ R(mi_rpn), R(md_ctr), R(m_casid), R(md_ap), | |
2183 | /* 155 */ R(md_epn), R(md_twb), R(md_twc), R(md_rpn), | |
2184 | /* 159 */ R(m_tw), R(mi_dbcam), R(mi_dbram0), R(mi_dbram1), | |
2185 | /* 163 */ R(md_dbcam), R(md_dbram0), R(md_dbram1) | |
c906108c SS |
2186 | }; |
2187 | ||
7a78ae4e ND |
2188 | /* Motorola PowerPC 601. Note that the 601 has different register numbers |
2189 | for reading and writing RTCU and RTCL. However, how one reads and writes a | |
c906108c | 2190 | register is the stub's problem. */ |
7a78ae4e | 2191 | static const struct reg registers_601[] = |
c5aa993b | 2192 | { |
7a78ae4e ND |
2193 | COMMON_UISA_REGS, |
2194 | PPC_UISA_SPRS, | |
2195 | PPC_SEGMENT_REGS, | |
2196 | PPC_OEA_SPRS, | |
2197 | /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr), | |
2198 | /* 123 */ R(pir), R(mq), R(rtcu), R(rtcl) | |
c906108c SS |
2199 | }; |
2200 | ||
7a78ae4e ND |
2201 | /* Motorola PowerPC 602. */ |
2202 | static const struct reg registers_602[] = | |
c5aa993b | 2203 | { |
7a78ae4e ND |
2204 | COMMON_UISA_REGS, |
2205 | PPC_UISA_SPRS, | |
2206 | PPC_SEGMENT_REGS, | |
2207 | PPC_OEA_SPRS, | |
2208 | /* 119 */ R(hid0), R(hid1), R(iabr), R0, | |
2209 | /* 123 */ R0, R(tcr), R(ibr), R(esassr), | |
2210 | /* 127 */ R(sebr), R(ser), R(sp), R(lt) | |
c906108c SS |
2211 | }; |
2212 | ||
7a78ae4e ND |
2213 | /* Motorola/IBM PowerPC 603 or 603e. */ |
2214 | static const struct reg registers_603[] = | |
c5aa993b | 2215 | { |
7a78ae4e ND |
2216 | COMMON_UISA_REGS, |
2217 | PPC_UISA_SPRS, | |
2218 | PPC_SEGMENT_REGS, | |
2219 | PPC_OEA_SPRS, | |
2220 | /* 119 */ R(hid0), R(hid1), R(iabr), R0, | |
2221 | /* 123 */ R0, R(dmiss), R(dcmp), R(hash1), | |
2222 | /* 127 */ R(hash2), R(imiss), R(icmp), R(rpa) | |
c906108c SS |
2223 | }; |
2224 | ||
7a78ae4e ND |
2225 | /* Motorola PowerPC 604 or 604e. */ |
2226 | static const struct reg registers_604[] = | |
c5aa993b | 2227 | { |
7a78ae4e ND |
2228 | COMMON_UISA_REGS, |
2229 | PPC_UISA_SPRS, | |
2230 | PPC_SEGMENT_REGS, | |
2231 | PPC_OEA_SPRS, | |
2232 | /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr), | |
2233 | /* 123 */ R(pir), R(mmcr0), R(pmc1), R(pmc2), | |
2234 | /* 127 */ R(sia), R(sda) | |
c906108c SS |
2235 | }; |
2236 | ||
7a78ae4e ND |
2237 | /* Motorola/IBM PowerPC 750 or 740. */ |
2238 | static const struct reg registers_750[] = | |
c5aa993b | 2239 | { |
7a78ae4e ND |
2240 | COMMON_UISA_REGS, |
2241 | PPC_UISA_SPRS, | |
2242 | PPC_SEGMENT_REGS, | |
2243 | PPC_OEA_SPRS, | |
2244 | /* 119 */ R(hid0), R(hid1), R(iabr), R(dabr), | |
2245 | /* 123 */ R0, R(ummcr0), R(upmc1), R(upmc2), | |
2246 | /* 127 */ R(usia), R(ummcr1), R(upmc3), R(upmc4), | |
2247 | /* 131 */ R(mmcr0), R(pmc1), R(pmc2), R(sia), | |
2248 | /* 135 */ R(mmcr1), R(pmc3), R(pmc4), R(l2cr), | |
2249 | /* 139 */ R(ictc), R(thrm1), R(thrm2), R(thrm3) | |
c906108c SS |
2250 | }; |
2251 | ||
2252 | ||
1fcc0bb8 EZ |
2253 | /* Motorola PowerPC 7400. */ |
2254 | static const struct reg registers_7400[] = | |
2255 | { | |
2256 | /* gpr0-gpr31, fpr0-fpr31 */ | |
2257 | COMMON_UISA_REGS, | |
2258 | /* ctr, xre, lr, cr */ | |
2259 | PPC_UISA_SPRS, | |
2260 | /* sr0-sr15 */ | |
2261 | PPC_SEGMENT_REGS, | |
2262 | PPC_OEA_SPRS, | |
2263 | /* vr0-vr31, vrsave, vscr */ | |
2264 | PPC_ALTIVEC_REGS | |
2265 | /* FIXME? Add more registers? */ | |
2266 | }; | |
2267 | ||
c906108c | 2268 | /* Information about a particular processor variant. */ |
7a78ae4e | 2269 | |
c906108c | 2270 | struct variant |
c5aa993b JM |
2271 | { |
2272 | /* Name of this variant. */ | |
2273 | char *name; | |
c906108c | 2274 | |
c5aa993b JM |
2275 | /* English description of the variant. */ |
2276 | char *description; | |
c906108c | 2277 | |
7a78ae4e ND |
2278 | /* bfd_arch_info.arch corresponding to variant. */ |
2279 | enum bfd_architecture arch; | |
2280 | ||
2281 | /* bfd_arch_info.mach corresponding to variant. */ | |
2282 | unsigned long mach; | |
2283 | ||
c5aa993b JM |
2284 | /* Table of register names; registers[R] is the name of the register |
2285 | number R. */ | |
7a78ae4e ND |
2286 | int nregs; |
2287 | const struct reg *regs; | |
c5aa993b | 2288 | }; |
c906108c SS |
2289 | |
2290 | #define num_registers(list) (sizeof (list) / sizeof((list)[0])) | |
2291 | ||
2292 | ||
2293 | /* Information in this table comes from the following web sites: | |
2294 | IBM: http://www.chips.ibm.com:80/products/embedded/ | |
2295 | Motorola: http://www.mot.com/SPS/PowerPC/ | |
2296 | ||
2297 | I'm sure I've got some of the variant descriptions not quite right. | |
2298 | Please report any inaccuracies you find to GDB's maintainer. | |
2299 | ||
2300 | If you add entries to this table, please be sure to allow the new | |
2301 | value as an argument to the --with-cpu flag, in configure.in. */ | |
2302 | ||
7a78ae4e | 2303 | static const struct variant variants[] = |
c906108c | 2304 | { |
7a78ae4e ND |
2305 | {"powerpc", "PowerPC user-level", bfd_arch_powerpc, |
2306 | bfd_mach_ppc, num_registers (registers_powerpc), registers_powerpc}, | |
2307 | {"power", "POWER user-level", bfd_arch_rs6000, | |
2308 | bfd_mach_rs6k, num_registers (registers_power), registers_power}, | |
2309 | {"403", "IBM PowerPC 403", bfd_arch_powerpc, | |
2310 | bfd_mach_ppc_403, num_registers (registers_403), registers_403}, | |
2311 | {"601", "Motorola PowerPC 601", bfd_arch_powerpc, | |
2312 | bfd_mach_ppc_601, num_registers (registers_601), registers_601}, | |
2313 | {"602", "Motorola PowerPC 602", bfd_arch_powerpc, | |
2314 | bfd_mach_ppc_602, num_registers (registers_602), registers_602}, | |
2315 | {"603", "Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc, | |
2316 | bfd_mach_ppc_603, num_registers (registers_603), registers_603}, | |
2317 | {"604", "Motorola PowerPC 604 or 604e", bfd_arch_powerpc, | |
2318 | 604, num_registers (registers_604), registers_604}, | |
2319 | {"403GC", "IBM PowerPC 403GC", bfd_arch_powerpc, | |
2320 | bfd_mach_ppc_403gc, num_registers (registers_403GC), registers_403GC}, | |
2321 | {"505", "Motorola PowerPC 505", bfd_arch_powerpc, | |
2322 | bfd_mach_ppc_505, num_registers (registers_505), registers_505}, | |
2323 | {"860", "Motorola PowerPC 860 or 850", bfd_arch_powerpc, | |
2324 | bfd_mach_ppc_860, num_registers (registers_860), registers_860}, | |
2325 | {"750", "Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc, | |
2326 | bfd_mach_ppc_750, num_registers (registers_750), registers_750}, | |
1fcc0bb8 EZ |
2327 | {"7400", "Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc, |
2328 | bfd_mach_ppc_7400, num_registers (registers_7400), registers_7400}, | |
7a78ae4e | 2329 | |
5d57ee30 KB |
2330 | /* 64-bit */ |
2331 | {"powerpc64", "PowerPC 64-bit user-level", bfd_arch_powerpc, | |
2332 | bfd_mach_ppc64, num_registers (registers_powerpc), registers_powerpc}, | |
7a78ae4e ND |
2333 | {"620", "Motorola PowerPC 620", bfd_arch_powerpc, |
2334 | bfd_mach_ppc_620, num_registers (registers_powerpc), registers_powerpc}, | |
5d57ee30 KB |
2335 | {"630", "Motorola PowerPC 630", bfd_arch_powerpc, |
2336 | bfd_mach_ppc_630, num_registers (registers_powerpc), registers_powerpc}, | |
7a78ae4e ND |
2337 | {"a35", "PowerPC A35", bfd_arch_powerpc, |
2338 | bfd_mach_ppc_a35, num_registers (registers_powerpc), registers_powerpc}, | |
5d57ee30 KB |
2339 | {"rs64ii", "PowerPC rs64ii", bfd_arch_powerpc, |
2340 | bfd_mach_ppc_rs64ii, num_registers (registers_powerpc), registers_powerpc}, | |
2341 | {"rs64iii", "PowerPC rs64iii", bfd_arch_powerpc, | |
2342 | bfd_mach_ppc_rs64iii, num_registers (registers_powerpc), registers_powerpc}, | |
2343 | ||
2344 | /* FIXME: I haven't checked the register sets of the following. */ | |
7a78ae4e ND |
2345 | {"rs1", "IBM POWER RS1", bfd_arch_rs6000, |
2346 | bfd_mach_rs6k_rs1, num_registers (registers_power), registers_power}, | |
2347 | {"rsc", "IBM POWER RSC", bfd_arch_rs6000, | |
2348 | bfd_mach_rs6k_rsc, num_registers (registers_power), registers_power}, | |
2349 | {"rs2", "IBM POWER RS2", bfd_arch_rs6000, | |
2350 | bfd_mach_rs6k_rs2, num_registers (registers_power), registers_power}, | |
2351 | ||
c5aa993b | 2352 | {0, 0, 0, 0} |
c906108c SS |
2353 | }; |
2354 | ||
7a78ae4e | 2355 | #undef num_registers |
c906108c | 2356 | |
7a78ae4e ND |
2357 | /* Return the variant corresponding to architecture ARCH and machine number |
2358 | MACH. If no such variant exists, return null. */ | |
c906108c | 2359 | |
7a78ae4e ND |
2360 | static const struct variant * |
2361 | find_variant_by_arch (enum bfd_architecture arch, unsigned long mach) | |
c906108c | 2362 | { |
7a78ae4e | 2363 | const struct variant *v; |
c5aa993b | 2364 | |
7a78ae4e ND |
2365 | for (v = variants; v->name; v++) |
2366 | if (arch == v->arch && mach == v->mach) | |
2367 | return v; | |
c906108c | 2368 | |
7a78ae4e | 2369 | return NULL; |
c906108c SS |
2370 | } |
2371 | ||
9aa1e687 KB |
2372 | |
2373 | ||
2374 | \f | |
2375 | static void | |
2376 | process_note_abi_tag_sections (bfd *abfd, asection *sect, void *obj) | |
2377 | { | |
2378 | int *os_ident_ptr = obj; | |
2379 | const char *name; | |
2380 | unsigned int sectsize; | |
2381 | ||
2382 | name = bfd_get_section_name (abfd, sect); | |
2383 | sectsize = bfd_section_size (abfd, sect); | |
2384 | if (strcmp (name, ".note.ABI-tag") == 0 && sectsize > 0) | |
2385 | { | |
2386 | unsigned int name_length, data_length, note_type; | |
2387 | char *note = alloca (sectsize); | |
2388 | ||
2389 | bfd_get_section_contents (abfd, sect, note, | |
2390 | (file_ptr) 0, (bfd_size_type) sectsize); | |
2391 | ||
2392 | name_length = bfd_h_get_32 (abfd, note); | |
2393 | data_length = bfd_h_get_32 (abfd, note + 4); | |
2394 | note_type = bfd_h_get_32 (abfd, note + 8); | |
2395 | ||
2396 | if (name_length == 4 && data_length == 16 && note_type == 1 | |
2397 | && strcmp (note + 12, "GNU") == 0) | |
2398 | { | |
2399 | int os_number = bfd_h_get_32 (abfd, note + 16); | |
2400 | ||
2401 | /* The case numbers are from abi-tags in glibc */ | |
2402 | switch (os_number) | |
2403 | { | |
2404 | case 0 : | |
2405 | *os_ident_ptr = ELFOSABI_LINUX; | |
2406 | break; | |
2407 | case 1 : | |
2408 | *os_ident_ptr = ELFOSABI_HURD; | |
2409 | break; | |
2410 | case 2 : | |
2411 | *os_ident_ptr = ELFOSABI_SOLARIS; | |
2412 | break; | |
2413 | default : | |
8e65ff28 AC |
2414 | internal_error (__FILE__, __LINE__, |
2415 | "process_note_abi_sections: unknown OS number %d", | |
2416 | os_number); | |
9aa1e687 KB |
2417 | break; |
2418 | } | |
2419 | } | |
2420 | } | |
2421 | } | |
2422 | ||
2423 | /* Return one of the ELFOSABI_ constants for BFDs representing ELF | |
2424 | executables. If it's not an ELF executable or if the OS/ABI couldn't | |
2425 | be determined, simply return -1. */ | |
2426 | ||
2427 | static int | |
2428 | get_elfosabi (bfd *abfd) | |
2429 | { | |
2430 | int elfosabi = -1; | |
2431 | ||
2432 | if (abfd != NULL && bfd_get_flavour (abfd) == bfd_target_elf_flavour) | |
2433 | { | |
2434 | elfosabi = elf_elfheader (abfd)->e_ident[EI_OSABI]; | |
2435 | ||
2436 | /* When elfosabi is 0 (ELFOSABI_NONE), this is supposed to indicate | |
2437 | that we're on a SYSV system. However, GNU/Linux uses a note section | |
2438 | to record OS/ABI info, but leaves e_ident[EI_OSABI] zero. So we | |
2439 | have to check the note sections too. */ | |
2440 | if (elfosabi == 0) | |
2441 | { | |
2442 | bfd_map_over_sections (abfd, | |
2443 | process_note_abi_tag_sections, | |
2444 | &elfosabi); | |
2445 | } | |
2446 | } | |
2447 | ||
2448 | return elfosabi; | |
2449 | } | |
2450 | ||
7a78ae4e | 2451 | \f |
c906108c | 2452 | |
7a78ae4e ND |
2453 | /* Initialize the current architecture based on INFO. If possible, re-use an |
2454 | architecture from ARCHES, which is a list of architectures already created | |
2455 | during this debugging session. | |
c906108c | 2456 | |
7a78ae4e ND |
2457 | Called e.g. at program startup, when reading a core file, and when reading |
2458 | a binary file. */ | |
c906108c | 2459 | |
7a78ae4e ND |
2460 | static struct gdbarch * |
2461 | rs6000_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
2462 | { | |
2463 | struct gdbarch *gdbarch; | |
2464 | struct gdbarch_tdep *tdep; | |
9aa1e687 | 2465 | int wordsize, from_xcoff_exec, from_elf_exec, power, i, off; |
7a78ae4e ND |
2466 | struct reg *regs; |
2467 | const struct variant *v; | |
2468 | enum bfd_architecture arch; | |
2469 | unsigned long mach; | |
2470 | bfd abfd; | |
9aa1e687 | 2471 | int osabi, sysv_abi; |
56a6dfb9 | 2472 | gdbarch_print_insn_ftype *print_insn; |
7a78ae4e | 2473 | |
9aa1e687 | 2474 | from_xcoff_exec = info.abfd && info.abfd->format == bfd_object && |
7a78ae4e ND |
2475 | bfd_get_flavour (info.abfd) == bfd_target_xcoff_flavour; |
2476 | ||
9aa1e687 KB |
2477 | from_elf_exec = info.abfd && info.abfd->format == bfd_object && |
2478 | bfd_get_flavour (info.abfd) == bfd_target_elf_flavour; | |
2479 | ||
2480 | sysv_abi = info.abfd && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour; | |
2481 | ||
2482 | osabi = get_elfosabi (info.abfd); | |
2483 | ||
e712c1cf AC |
2484 | /* Check word size. If INFO is from a binary file, infer it from |
2485 | that, else choose a likely default. */ | |
9aa1e687 | 2486 | if (from_xcoff_exec) |
c906108c | 2487 | { |
7a78ae4e ND |
2488 | if (xcoff_data (info.abfd)->xcoff64) |
2489 | wordsize = 8; | |
2490 | else | |
2491 | wordsize = 4; | |
c906108c | 2492 | } |
9aa1e687 KB |
2493 | else if (from_elf_exec) |
2494 | { | |
2495 | if (elf_elfheader (info.abfd)->e_ident[EI_CLASS] == ELFCLASS64) | |
2496 | wordsize = 8; | |
2497 | else | |
2498 | wordsize = 4; | |
2499 | } | |
c906108c | 2500 | else |
7a78ae4e | 2501 | { |
27b15785 KB |
2502 | if (info.bfd_arch_info != NULL && info.bfd_arch_info->bits_per_word != 0) |
2503 | wordsize = info.bfd_arch_info->bits_per_word / | |
2504 | info.bfd_arch_info->bits_per_byte; | |
2505 | else | |
2506 | wordsize = 4; | |
7a78ae4e | 2507 | } |
c906108c | 2508 | |
7a78ae4e ND |
2509 | /* Find a candidate among extant architectures. */ |
2510 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
2511 | arches != NULL; | |
2512 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
2513 | { | |
2514 | /* Word size in the various PowerPC bfd_arch_info structs isn't | |
2515 | meaningful, because 64-bit CPUs can run in 32-bit mode. So, perform | |
2516 | separate word size check. */ | |
2517 | tdep = gdbarch_tdep (arches->gdbarch); | |
9aa1e687 | 2518 | if (tdep && tdep->wordsize == wordsize && tdep->osabi == osabi) |
7a78ae4e ND |
2519 | return arches->gdbarch; |
2520 | } | |
c906108c | 2521 | |
7a78ae4e ND |
2522 | /* None found, create a new architecture from INFO, whose bfd_arch_info |
2523 | validity depends on the source: | |
2524 | - executable useless | |
2525 | - rs6000_host_arch() good | |
2526 | - core file good | |
2527 | - "set arch" trust blindly | |
2528 | - GDB startup useless but harmless */ | |
c906108c | 2529 | |
9aa1e687 | 2530 | if (!from_xcoff_exec) |
c906108c | 2531 | { |
b732d07d | 2532 | arch = info.bfd_arch_info->arch; |
7a78ae4e | 2533 | mach = info.bfd_arch_info->mach; |
c906108c | 2534 | } |
7a78ae4e | 2535 | else |
c906108c | 2536 | { |
7a78ae4e ND |
2537 | arch = bfd_arch_powerpc; |
2538 | mach = 0; | |
2539 | bfd_default_set_arch_mach (&abfd, arch, mach); | |
2540 | info.bfd_arch_info = bfd_get_arch_info (&abfd); | |
2541 | } | |
2542 | tdep = xmalloc (sizeof (struct gdbarch_tdep)); | |
2543 | tdep->wordsize = wordsize; | |
9aa1e687 | 2544 | tdep->osabi = osabi; |
7a78ae4e ND |
2545 | gdbarch = gdbarch_alloc (&info, tdep); |
2546 | power = arch == bfd_arch_rs6000; | |
2547 | ||
7a78ae4e ND |
2548 | /* Choose variant. */ |
2549 | v = find_variant_by_arch (arch, mach); | |
2550 | if (!v) | |
dd47e6fd EZ |
2551 | return NULL; |
2552 | ||
7a78ae4e ND |
2553 | tdep->regs = v->regs; |
2554 | ||
2188cbdd EZ |
2555 | tdep->ppc_gp0_regnum = 0; |
2556 | tdep->ppc_gplast_regnum = 31; | |
2557 | tdep->ppc_toc_regnum = 2; | |
2558 | tdep->ppc_ps_regnum = 65; | |
2559 | tdep->ppc_cr_regnum = 66; | |
2560 | tdep->ppc_lr_regnum = 67; | |
2561 | tdep->ppc_ctr_regnum = 68; | |
2562 | tdep->ppc_xer_regnum = 69; | |
2563 | if (v->mach == bfd_mach_ppc_601) | |
2564 | tdep->ppc_mq_regnum = 124; | |
e3f36dbd | 2565 | else if (power) |
2188cbdd | 2566 | tdep->ppc_mq_regnum = 70; |
e3f36dbd KB |
2567 | else |
2568 | tdep->ppc_mq_regnum = -1; | |
2569 | tdep->ppc_fpscr_regnum = power ? 71 : 70; | |
2188cbdd | 2570 | |
1fcc0bb8 EZ |
2571 | if (v->arch == bfd_arch_powerpc) |
2572 | switch (v->mach) | |
2573 | { | |
2574 | case bfd_mach_ppc: | |
2575 | tdep->ppc_vr0_regnum = 71; | |
2576 | tdep->ppc_vrsave_regnum = 104; | |
2577 | break; | |
2578 | case bfd_mach_ppc_7400: | |
2579 | tdep->ppc_vr0_regnum = 119; | |
2580 | tdep->ppc_vrsave_regnum = 153; | |
2581 | break; | |
2582 | default: | |
2583 | tdep->ppc_vr0_regnum = -1; | |
2584 | tdep->ppc_vrsave_regnum = -1; | |
2585 | break; | |
2586 | } | |
2587 | ||
7a78ae4e ND |
2588 | /* Calculate byte offsets in raw register array. */ |
2589 | tdep->regoff = xmalloc (v->nregs * sizeof (int)); | |
2590 | for (i = off = 0; i < v->nregs; i++) | |
2591 | { | |
2592 | tdep->regoff[i] = off; | |
2593 | off += regsize (v->regs + i, wordsize); | |
c906108c SS |
2594 | } |
2595 | ||
56a6dfb9 KB |
2596 | /* Select instruction printer. */ |
2597 | if (arch == power) | |
2598 | print_insn = print_insn_rs6000; | |
2599 | else if (info.byte_order == BFD_ENDIAN_BIG) | |
2600 | print_insn = print_insn_big_powerpc; | |
2601 | else | |
2602 | print_insn = print_insn_little_powerpc; | |
2603 | set_gdbarch_print_insn (gdbarch, print_insn); | |
7495d1dc | 2604 | |
7a78ae4e ND |
2605 | set_gdbarch_read_pc (gdbarch, generic_target_read_pc); |
2606 | set_gdbarch_write_pc (gdbarch, generic_target_write_pc); | |
2607 | set_gdbarch_read_fp (gdbarch, generic_target_read_fp); | |
7a78ae4e ND |
2608 | set_gdbarch_read_sp (gdbarch, generic_target_read_sp); |
2609 | set_gdbarch_write_sp (gdbarch, generic_target_write_sp); | |
2610 | ||
2611 | set_gdbarch_num_regs (gdbarch, v->nregs); | |
2612 | set_gdbarch_sp_regnum (gdbarch, 1); | |
2613 | set_gdbarch_fp_regnum (gdbarch, 1); | |
2614 | set_gdbarch_pc_regnum (gdbarch, 64); | |
2615 | set_gdbarch_register_name (gdbarch, rs6000_register_name); | |
2616 | set_gdbarch_register_size (gdbarch, wordsize); | |
2617 | set_gdbarch_register_bytes (gdbarch, off); | |
2618 | set_gdbarch_register_byte (gdbarch, rs6000_register_byte); | |
2619 | set_gdbarch_register_raw_size (gdbarch, rs6000_register_raw_size); | |
2a873819 | 2620 | set_gdbarch_max_register_raw_size (gdbarch, 16); |
0e7c5946 | 2621 | set_gdbarch_register_virtual_size (gdbarch, generic_register_virtual_size); |
2a873819 | 2622 | set_gdbarch_max_register_virtual_size (gdbarch, 16); |
7a78ae4e | 2623 | set_gdbarch_register_virtual_type (gdbarch, rs6000_register_virtual_type); |
1fcc0bb8 | 2624 | set_gdbarch_do_registers_info (gdbarch, rs6000_do_registers_info); |
7a78ae4e ND |
2625 | |
2626 | set_gdbarch_ptr_bit (gdbarch, wordsize * TARGET_CHAR_BIT); | |
2627 | set_gdbarch_short_bit (gdbarch, 2 * TARGET_CHAR_BIT); | |
2628 | set_gdbarch_int_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
2629 | set_gdbarch_long_bit (gdbarch, wordsize * TARGET_CHAR_BIT); | |
2630 | set_gdbarch_long_long_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
2631 | set_gdbarch_float_bit (gdbarch, 4 * TARGET_CHAR_BIT); | |
2632 | set_gdbarch_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
2633 | set_gdbarch_long_double_bit (gdbarch, 8 * TARGET_CHAR_BIT); | |
4e409299 | 2634 | set_gdbarch_char_signed (gdbarch, 0); |
7a78ae4e ND |
2635 | |
2636 | set_gdbarch_use_generic_dummy_frames (gdbarch, 1); | |
2637 | set_gdbarch_call_dummy_length (gdbarch, 0); | |
2638 | set_gdbarch_call_dummy_location (gdbarch, AT_ENTRY_POINT); | |
2639 | set_gdbarch_call_dummy_address (gdbarch, entry_point_address); | |
2640 | set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch, 1); | |
2641 | set_gdbarch_call_dummy_breakpoint_offset (gdbarch, 0); | |
2642 | set_gdbarch_call_dummy_start_offset (gdbarch, 0); | |
fe794dc6 | 2643 | set_gdbarch_pc_in_call_dummy (gdbarch, generic_pc_in_call_dummy); |
7a78ae4e ND |
2644 | set_gdbarch_call_dummy_p (gdbarch, 1); |
2645 | set_gdbarch_call_dummy_stack_adjust_p (gdbarch, 0); | |
2646 | set_gdbarch_get_saved_register (gdbarch, generic_get_saved_register); | |
2647 | set_gdbarch_fix_call_dummy (gdbarch, rs6000_fix_call_dummy); | |
2648 | set_gdbarch_push_dummy_frame (gdbarch, generic_push_dummy_frame); | |
58223630 | 2649 | set_gdbarch_save_dummy_frame_tos (gdbarch, generic_save_dummy_frame_tos); |
7a78ae4e ND |
2650 | set_gdbarch_push_return_address (gdbarch, ppc_push_return_address); |
2651 | set_gdbarch_believe_pcc_promotion (gdbarch, 1); | |
2652 | set_gdbarch_coerce_float_to_double (gdbarch, rs6000_coerce_float_to_double); | |
2653 | ||
2654 | set_gdbarch_register_convertible (gdbarch, rs6000_register_convertible); | |
2655 | set_gdbarch_register_convert_to_virtual (gdbarch, rs6000_register_convert_to_virtual); | |
2656 | set_gdbarch_register_convert_to_raw (gdbarch, rs6000_register_convert_to_raw); | |
2188cbdd | 2657 | set_gdbarch_stab_reg_to_regnum (gdbarch, rs6000_stab_reg_to_regnum); |
7a78ae4e ND |
2658 | |
2659 | set_gdbarch_extract_return_value (gdbarch, rs6000_extract_return_value); | |
9aa1e687 | 2660 | |
2ea5f656 KB |
2661 | /* Note: kevinb/2002-04-12: I'm not convinced that rs6000_push_arguments() |
2662 | is correct for the SysV ABI when the wordsize is 8, but I'm also | |
2663 | fairly certain that ppc_sysv_abi_push_arguments() will give even | |
2664 | worse results since it only works for 32-bit code. So, for the moment, | |
2665 | we're better off calling rs6000_push_arguments() since it works for | |
2666 | 64-bit code. At some point in the future, this matter needs to be | |
2667 | revisited. */ | |
2668 | if (sysv_abi && wordsize == 4) | |
9aa1e687 KB |
2669 | set_gdbarch_push_arguments (gdbarch, ppc_sysv_abi_push_arguments); |
2670 | else | |
2671 | set_gdbarch_push_arguments (gdbarch, rs6000_push_arguments); | |
7a78ae4e ND |
2672 | |
2673 | set_gdbarch_store_struct_return (gdbarch, rs6000_store_struct_return); | |
2674 | set_gdbarch_store_return_value (gdbarch, rs6000_store_return_value); | |
2675 | set_gdbarch_extract_struct_value_address (gdbarch, rs6000_extract_struct_value_address); | |
7a78ae4e ND |
2676 | set_gdbarch_pop_frame (gdbarch, rs6000_pop_frame); |
2677 | ||
2678 | set_gdbarch_skip_prologue (gdbarch, rs6000_skip_prologue); | |
2679 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
2680 | set_gdbarch_decr_pc_after_break (gdbarch, 0); | |
2681 | set_gdbarch_function_start_offset (gdbarch, 0); | |
2682 | set_gdbarch_breakpoint_from_pc (gdbarch, rs6000_breakpoint_from_pc); | |
2683 | ||
2684 | /* Not sure on this. FIXMEmgo */ | |
2685 | set_gdbarch_frame_args_skip (gdbarch, 8); | |
2686 | ||
8e0662df EZ |
2687 | /* Until November 2001, gcc was not complying to the SYSV ABI for |
2688 | returning structures less than or equal to 8 bytes in size. It was | |
2689 | returning everything in memory. When this was corrected, it wasn't | |
2690 | fixed for native platforms. */ | |
2691 | if (sysv_abi) | |
2692 | { | |
2693 | if (osabi == ELFOSABI_LINUX | |
2694 | || osabi == ELFOSABI_NETBSD | |
2695 | || osabi == ELFOSABI_FREEBSD) | |
2696 | set_gdbarch_use_struct_convention (gdbarch, | |
2697 | generic_use_struct_convention); | |
2698 | else | |
2699 | set_gdbarch_use_struct_convention (gdbarch, | |
2700 | ppc_sysv_abi_use_struct_convention); | |
2701 | } | |
2702 | else | |
2703 | { | |
2704 | set_gdbarch_use_struct_convention (gdbarch, | |
2705 | generic_use_struct_convention); | |
2706 | } | |
2707 | ||
7a78ae4e | 2708 | set_gdbarch_frame_chain_valid (gdbarch, file_frame_chain_valid); |
2ea5f656 KB |
2709 | /* Note: kevinb/2002-04-12: See note above regarding *_push_arguments(). |
2710 | The same remarks hold for the methods below. */ | |
2711 | if (osabi == ELFOSABI_LINUX && wordsize == 4) | |
9aa1e687 KB |
2712 | { |
2713 | set_gdbarch_frameless_function_invocation (gdbarch, | |
2714 | ppc_linux_frameless_function_invocation); | |
2715 | set_gdbarch_frame_chain (gdbarch, ppc_linux_frame_chain); | |
2716 | set_gdbarch_frame_saved_pc (gdbarch, ppc_linux_frame_saved_pc); | |
2717 | ||
2718 | set_gdbarch_frame_init_saved_regs (gdbarch, | |
2719 | ppc_linux_frame_init_saved_regs); | |
2720 | set_gdbarch_init_extra_frame_info (gdbarch, | |
2721 | ppc_linux_init_extra_frame_info); | |
2722 | ||
2723 | set_gdbarch_memory_remove_breakpoint (gdbarch, | |
2724 | ppc_linux_memory_remove_breakpoint); | |
6ded7999 KB |
2725 | set_solib_svr4_fetch_link_map_offsets |
2726 | (gdbarch, ppc_linux_svr4_fetch_link_map_offsets); | |
9aa1e687 KB |
2727 | } |
2728 | else | |
2729 | { | |
2730 | set_gdbarch_frameless_function_invocation (gdbarch, | |
2731 | rs6000_frameless_function_invocation); | |
2732 | set_gdbarch_frame_chain (gdbarch, rs6000_frame_chain); | |
2733 | set_gdbarch_frame_saved_pc (gdbarch, rs6000_frame_saved_pc); | |
2734 | ||
2735 | set_gdbarch_frame_init_saved_regs (gdbarch, rs6000_frame_init_saved_regs); | |
2736 | set_gdbarch_init_extra_frame_info (gdbarch, rs6000_init_extra_frame_info); | |
f517ea4e PS |
2737 | |
2738 | /* Handle RS/6000 function pointers. */ | |
2739 | set_gdbarch_convert_from_func_ptr_addr (gdbarch, | |
2740 | rs6000_convert_from_func_ptr_addr); | |
9aa1e687 | 2741 | } |
7a78ae4e ND |
2742 | set_gdbarch_frame_args_address (gdbarch, rs6000_frame_args_address); |
2743 | set_gdbarch_frame_locals_address (gdbarch, rs6000_frame_args_address); | |
2744 | set_gdbarch_saved_pc_after_call (gdbarch, rs6000_saved_pc_after_call); | |
2745 | ||
2746 | /* We can't tell how many args there are | |
2747 | now that the C compiler delays popping them. */ | |
2748 | set_gdbarch_frame_num_args (gdbarch, frame_num_args_unknown); | |
2749 | ||
2750 | return gdbarch; | |
c906108c SS |
2751 | } |
2752 | ||
1fcc0bb8 EZ |
2753 | static struct cmd_list_element *info_powerpc_cmdlist = NULL; |
2754 | ||
2755 | static void | |
2756 | rs6000_info_powerpc_command (char *args, int from_tty) | |
2757 | { | |
2758 | help_list (info_powerpc_cmdlist, "info powerpc ", class_info, gdb_stdout); | |
2759 | } | |
2760 | ||
c906108c SS |
2761 | /* Initialization code. */ |
2762 | ||
2763 | void | |
fba45db2 | 2764 | _initialize_rs6000_tdep (void) |
c906108c | 2765 | { |
7a78ae4e ND |
2766 | register_gdbarch_init (bfd_arch_rs6000, rs6000_gdbarch_init); |
2767 | register_gdbarch_init (bfd_arch_powerpc, rs6000_gdbarch_init); | |
1fcc0bb8 EZ |
2768 | |
2769 | /* Add root prefix command for "info powerpc" commands */ | |
2770 | add_prefix_cmd ("powerpc", class_info, rs6000_info_powerpc_command, | |
2771 | "Various POWERPC info specific commands.", | |
2772 | &info_powerpc_cmdlist, "info powerpc ", 0, &infolist); | |
2773 | ||
2774 | add_cmd ("altivec", class_info, rs6000_altivec_registers_info, | |
2775 | "Display the contents of the AltiVec registers.", | |
2776 | &info_powerpc_cmdlist); | |
2777 | ||
c906108c | 2778 | } |