* hppa-tdep.c (hppa_fix_call_dummy): Rewrite code for calling
[deliverable/binutils-gdb.git] / gdb / rs6000-tdep.c
CommitLineData
41abdfbd 1/* Target-dependent code for GDB, the GNU debugger.
18b46e7c 2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995
07aa9fdc 3 Free Software Foundation, Inc.
41abdfbd
JG
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
20
41abdfbd 21#include "defs.h"
41abdfbd
JG
22#include "frame.h"
23#include "inferior.h"
24#include "symtab.h"
25#include "target.h"
030fb5cb 26#include "gdbcore.h"
41abdfbd 27
2aefe6e4
JK
28#include "xcoffsolib.h"
29
41abdfbd 30#include <a.out.h>
d6434f39
JG
31
32extern struct obstack frame_cache_obstack;
33
41abdfbd 34extern int errno;
41abdfbd
JG
35
36/* Nonzero if we just simulated a single step break. */
37int one_stepped;
38
41abdfbd
JG
39/* Breakpoint shadows for the single step instructions will be kept here. */
40
41static struct sstep_breaks {
030fb5cb
JK
42 /* Address, or 0 if this is not in use. */
43 CORE_ADDR address;
44 /* Shadow contents. */
45 char data[4];
41abdfbd
JG
46} stepBreaks[2];
47
ecf4059f
JG
48/* Static function prototypes */
49
ecf4059f
JG
50static CORE_ADDR
51find_toc_address PARAMS ((CORE_ADDR pc));
52
53static CORE_ADDR
54branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety));
55
56static void
57frame_get_cache_fsr PARAMS ((struct frame_info *fi,
63641491 58 struct rs6000_framedata *fdatap));
41abdfbd
JG
59
60/*
61 * Calculate the destination of a branch/jump. Return -1 if not a branch.
62 */
ecf4059f 63static CORE_ADDR
41abdfbd 64branch_dest (opcode, instr, pc, safety)
ecf4059f
JG
65 int opcode;
66 int instr;
67 CORE_ADDR pc;
68 CORE_ADDR safety;
41abdfbd
JG
69{
70 register long offset;
ecf4059f 71 CORE_ADDR dest;
41abdfbd
JG
72 int immediate;
73 int absolute;
74 int ext_op;
75
76 absolute = (int) ((instr >> 1) & 1);
77
78 switch (opcode) {
79 case 18 :
ecf4059f 80 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
dc59e982
MM
81 if (absolute)
82 dest = immediate;
83 else
84 dest = pc + immediate;
85 break;
41abdfbd
JG
86
87 case 16 :
dc59e982 88 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
41abdfbd
JG
89 if (absolute)
90 dest = immediate;
91 else
92 dest = pc + immediate;
93 break;
94
95 case 19 :
96 ext_op = (instr>>1) & 0x3ff;
97
98 if (ext_op == 16) /* br conditional register */
99 dest = read_register (LR_REGNUM) & ~3;
100
101 else if (ext_op == 528) /* br cond to count reg */
9aa31e91
JK
102 {
103 dest = read_register (CTR_REGNUM) & ~3;
104
105 /* If we are about to execute a system call, dest is something
106 like 0x22fc or 0x3b00. Upon completion the system call
107 will return to the address in the link register. */
108 if (dest < TEXT_SEGMENT_BASE)
109 dest = read_register (LR_REGNUM) & ~3;
110 }
41abdfbd
JG
111 else return -1;
112 break;
113
114 default: return -1;
115 }
818de002 116 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
41abdfbd
JG
117}
118
119
120
121/* AIX does not support PT_STEP. Simulate it. */
122
997cc2c0 123void
41abdfbd 124single_step (signal)
997cc2c0 125 int signal;
41abdfbd
JG
126{
127#define INSNLEN(OPCODE) 4
128
5c172b4b
MM
129 static char le_breakp[] = LITTLE_BREAKPOINT;
130 static char be_breakp[] = BIG_BREAKPOINT;
131 char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp;
030fb5cb
JK
132 int ii, insn;
133 CORE_ADDR loc;
134 CORE_ADDR breaks[2];
135 int opcode;
41abdfbd
JG
136
137 if (!one_stepped) {
41abdfbd
JG
138 loc = read_pc ();
139
b112f2ae 140 insn = read_memory_integer (loc, 4);
41abdfbd
JG
141
142 breaks[0] = loc + INSNLEN(insn);
143 opcode = insn >> 26;
144 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
145
818de002
PB
146 /* Don't put two breakpoints on the same address. */
147 if (breaks[1] == breaks[0])
148 breaks[1] = -1;
149
030fb5cb 150 stepBreaks[1].address = 0;
41abdfbd
JG
151
152 for (ii=0; ii < 2; ++ii) {
153
154 /* ignore invalid breakpoint. */
155 if ( breaks[ii] == -1)
156 continue;
157
030fb5cb 158 read_memory (breaks[ii], stepBreaks[ii].data, 4);
41abdfbd 159
030fb5cb 160 write_memory (breaks[ii], breakp, 4);
41abdfbd
JG
161 stepBreaks[ii].address = breaks[ii];
162 }
163
164 one_stepped = 1;
997cc2c0 165 } else {
41abdfbd
JG
166
167 /* remove step breakpoints. */
168 for (ii=0; ii < 2; ++ii)
030fb5cb 169 if (stepBreaks[ii].address != 0)
41abdfbd 170 write_memory
030fb5cb 171 (stepBreaks[ii].address, stepBreaks[ii].data, 4);
41abdfbd
JG
172
173 one_stepped = 0;
174 }
997cc2c0 175 errno = 0; /* FIXME, don't ignore errors! */
030fb5cb 176 /* What errors? {read,write}_memory call error(). */
41abdfbd 177}
41abdfbd
JG
178
179
068c9fd6
MM
180/* return pc value after skipping a function prologue and also return
181 information about a function frame.
41abdfbd 182
068c9fd6
MM
183 in struct rs6000_frameinfo fdata:
184 - frameless is TRUE, if function does not have a frame.
185 - nosavedpc is TRUE, if function does not save %pc value in its frame.
186 - offset is the number of bytes used in the frame to save registers.
187 - saved_gpr is the number of the first saved gpr.
188 - saved_fpr is the number of the first saved fpr.
189 - alloca_reg is the number of the register used for alloca() handling.
190 Otherwise -1.
191 - gpr_offset is the offset of the saved gprs
192 - fpr_offset is the offset of the saved fprs
193 - lr_offset is the offset of the saved lr
194 - cr_offset is the offset of the saved cr
195 */
196
197#define SIGNED_SHORT(x) \
198 ((sizeof (short) == 2) \
199 ? ((int)(short)(x)) \
200 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
201
202#define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
203
204CORE_ADDR
205skip_prologue (pc, fdata)
206 CORE_ADDR pc;
207 struct rs6000_framedata *fdata;
41abdfbd 208{
068c9fd6 209 CORE_ADDR orig_pc = pc;
34df79fc 210 char buf[4];
34df79fc 211 unsigned long op;
068c9fd6
MM
212 int lr_reg = 0;
213 int cr_reg = 0;
214 int reg;
215 static struct rs6000_framedata zero_frame;
216
217 *fdata = zero_frame;
218 fdata->saved_gpr = -1;
219 fdata->saved_fpr = -1;
220 fdata->alloca_reg = -1;
221 fdata->frameless = 1;
222 fdata->nosavedpc = 1;
41abdfbd 223
34df79fc 224 if (target_read_memory (pc, buf, 4))
41abdfbd 225 return pc; /* Can't access it -- assume no prologue. */
41abdfbd
JG
226
227 /* Assume that subsequent fetches can fail with low probability. */
068c9fd6
MM
228 pc -= 4;
229 for (;;)
230 {
231 pc += 4;
232 op = read_memory_integer (pc, 4);
41abdfbd 233
068c9fd6
MM
234 if ((op & 0xfc1fffff) == 0x7c0802a6) { /* mflr Rx */
235 lr_reg = (op & 0x03e00000) | 0x90010000;
236 continue;
237
238 } else if ((op & 0xfc1fffff) == 0x7c000026) { /* mfcr Rx */
239 cr_reg = (op & 0x03e00000) | 0x90010000;
240 continue;
241
242 } else if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
243 reg = GET_SRC_REG (op);
244 if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg) {
245 fdata->saved_fpr = reg;
246 fdata->fpr_offset = SIGNED_SHORT (op);
247 }
248 continue;
249
250 } else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
251 ((op & 0xfc1f0000) == 0x90010000 && /* st rx,NUM(r1), rx >= r13 */
252 (op & 0x03e00000) >= 0x01a00000)) {
253
254 reg = GET_SRC_REG (op);
255 if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg) {
256 fdata->saved_gpr = reg;
257 fdata->gpr_offset = SIGNED_SHORT (op);
258 }
259 continue;
260
261 } else if ((op & 0xffff0000) == 0x3c000000) { /* addis 0,0,NUM, used for >= 32k frames */
262 fdata->offset = (op & 0x0000ffff) << 16;
263 continue;
264
265 } else if ((op & 0xffff0000) == 0x60000000) { /* ori 0,0,NUM, 2nd half of >= 32k frames */
266 fdata->offset |= (op & 0x0000ffff);
267 continue;
268
269 } else if ((op & 0xffff0000) == lr_reg) { /* st Rx,NUM(r1) where Rx == lr */
270 fdata->lr_offset = SIGNED_SHORT (op);
271 fdata->nosavedpc = 0;
272 lr_reg = 0;
273 continue;
274
275 } else if ((op & 0xffff0000) == cr_reg) { /* st Rx,NUM(r1) where Rx == cr */
276 fdata->cr_offset = SIGNED_SHORT (op);
277 cr_reg = 0;
278 continue;
279
280 } else if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
281 op = read_memory_integer (pc+4, 4);
282
283 /* At this point, make sure this is not a trampoline function
284 (a function that simply calls another functions, and nothing else).
285 If the next is not a nop, this branch was part of the function
286 prologue. */
287
288 if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */
289 return pc; /* don't skip over this branch */
290
291 continue;
292
293 } else if ((op & 0xffff0000) == 0x94210000) { /* stu r1,NUM(r1) */
294 fdata->offset = - SIGNED_SHORT (op);
295 pc += 4;
296 op = read_memory_integer (pc, 4);
297 break;
1eeba686 298
068c9fd6
MM
299 } else if (op == 0x7c21016e) { /* stwux 1,1,0 */
300 pc += 4; /* offset set above */
301 op = read_memory_integer (pc, 4);
302 break;
41abdfbd 303
068c9fd6
MM
304 } else {
305 break;
306 }
307 }
cdb1cc92 308
068c9fd6
MM
309 /* Skip -mreloctable (V.4/eabi) load up the toc case */
310 if (op == 0x48000005 && /* bl .+4 */
311 read_memory_integer (pc+4, 4) == 0x7fc802a6 && /* mflr r30 */
312 (read_memory_integer (pc+8, 4) & 0xffff) == 0x801e0000 && /* lwz 0,NUM(r30) */
313 read_memory_integer (pc+12, 4) == 0x7fc0f214) { /* add r30,r0,r30 */
314 pc += 16;
41abdfbd 315 op = read_memory_integer (pc, 4);
41abdfbd 316
068c9fd6
MM
317 /* And -mminimal-toc code on V.4 */
318 } else if ((op & 0xffff0000) == 0x3fc00000 && /* addis 30,0,foo@ha */
319 /* addi 30,30,foo@l */
320 ((read_memory_integer (pc+4, 4) & 0xffff0000) == 0x3bde0000)) {
321 pc += 8;
322 op = read_memory_integer (pc, 8);
629b6214 323 }
e137e850 324
068c9fd6
MM
325 while ((op >> 22) == 0x20f) { /* l r31, ... or */
326 pc += 4; /* l r30, ... */
e137e850
PS
327 op = read_memory_integer (pc, 4);
328 }
329
068c9fd6
MM
330 /* store parameters into stack */
331 while(
332 (op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
333 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
334 (op & 0xfc1f0000) == 0xfc010000) { /* frsp, fp?,NUM(r1) */
41abdfbd
JG
335 pc += 4;
336 op = read_memory_integer (pc, 4);
337 }
338
068c9fd6
MM
339 /* Set up frame pointer */
340 if (op == 0x603f0000 /* oril r31, r1, 0x0 */
341 || op == 0x7c3f0b78) { /* mr r31, r1 */
342 pc += 4; /* this happens if r31 is used as */
343 op = read_memory_integer (pc, 4); /* frame ptr. (gcc does that) */
344
345 /* store parameters into frame */
346 while (
347 (op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
348 (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
349 (op & 0xfc1f0000) == 0xfc1f0000) { /* frsp, fp?,NUM(r1) */
350 pc += 4;
41abdfbd
JG
351 op = read_memory_integer (pc, 4);
352 }
353 }
068c9fd6 354
507e4004
PB
355#if 0
356/* I have problems with skipping over __main() that I need to address
357 * sometime. Previously, I used to use misc_function_vector which
358 * didn't work as well as I wanted to be. -MGO */
359
360 /* If the first thing after skipping a prolog is a branch to a function,
361 this might be a call to an initializer in main(), introduced by gcc2.
362 We'd like to skip over it as well. Fortunately, xlc does some extra
363 work before calling a function right after a prologue, thus we can
364 single out such gcc2 behaviour. */
365
366
367 if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */
368 op = read_memory_integer (pc+4, 4);
369
370 if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */
371
372 /* check and see if we are in main. If so, skip over this initializer
373 function as well. */
374
375 tmp = find_pc_misc_function (pc);
2e4964ad 376 if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main"))
507e4004
PB
377 return pc + 8;
378 }
379 }
380#endif /* 0 */
381
068c9fd6 382 fdata->frameless = (pc == orig_pc);
41abdfbd
JG
383 return pc;
384}
385
818de002 386
41abdfbd
JG
387/*************************************************************************
388 Support for creating pushind a dummy frame into the stack, and popping
389 frames, etc.
390*************************************************************************/
391
818de002
PB
392/* The total size of dummy frame is 436, which is;
393
394 32 gpr's - 128 bytes
395 32 fpr's - 256 "
396 7 the rest - 28 "
397 and 24 extra bytes for the callee's link area. The last 24 bytes
398 for the link area might not be necessary, since it will be taken
399 care of by push_arguments(). */
400
401#define DUMMY_FRAME_SIZE 436
402
41abdfbd
JG
403#define DUMMY_FRAME_ADDR_SIZE 10
404
405/* Make sure you initialize these in somewhere, in case gdb gives up what it
818de002 406 was debugging and starts debugging something else. FIXMEibm */
41abdfbd
JG
407
408static int dummy_frame_count = 0;
409static int dummy_frame_size = 0;
410static CORE_ADDR *dummy_frame_addr = 0;
411
412extern int stop_stack_dummy;
413
414/* push a dummy frame into stack, save all register. Currently we are saving
415 only gpr's and fpr's, which is not good enough! FIXMEmgo */
416
ecf4059f 417void
41abdfbd
JG
418push_dummy_frame ()
419{
359a097f
JK
420 /* stack pointer. */
421 CORE_ADDR sp;
b112f2ae
JK
422 /* Same thing, target byte order. */
423 char sp_targ[4];
359a097f
JK
424
425 /* link register. */
426 CORE_ADDR pc;
427 /* Same thing, target byte order. */
428 char pc_targ[4];
429
41abdfbd
JG
430 int ii;
431
5f1c39ef 432 target_fetch_registers (-1);
6c6afbb9 433
41abdfbd
JG
434 if (dummy_frame_count >= dummy_frame_size) {
435 dummy_frame_size += DUMMY_FRAME_ADDR_SIZE;
436 if (dummy_frame_addr)
437 dummy_frame_addr = (CORE_ADDR*) xrealloc
438 (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size));
439 else
440 dummy_frame_addr = (CORE_ADDR*)
441 xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size));
442 }
443
444 sp = read_register(SP_REGNUM);
359a097f 445 pc = read_register(PC_REGNUM);
5816555b 446 store_address (pc_targ, 4, pc);
41abdfbd
JG
447
448 dummy_frame_addr [dummy_frame_count++] = sp;
449
450 /* Be careful! If the stack pointer is not decremented first, then kernel
6c6afbb9 451 thinks he is free to use the space underneath it. And kernel actually
41abdfbd
JG
452 uses that area for IPC purposes when executing ptrace(2) calls. So
453 before writing register values into the new frame, decrement and update
454 %sp first in order to secure your frame. */
455
818de002 456 write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE);
41abdfbd 457
41abdfbd
JG
458 /* gdb relies on the state of current_frame. We'd better update it,
459 otherwise things like do_registers_info() wouldn't work properly! */
460
461 flush_cached_frames ();
41abdfbd
JG
462
463 /* save program counter in link register's space. */
359a097f 464 write_memory (sp+8, pc_targ, 4);
41abdfbd 465
6c6afbb9 466 /* save all floating point and general purpose registers here. */
41abdfbd
JG
467
468 /* fpr's, f0..f31 */
469 for (ii = 0; ii < 32; ++ii)
470 write_memory (sp-8-(ii*8), &registers[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8);
471
472 /* gpr's r0..r31 */
473 for (ii=1; ii <=32; ++ii)
474 write_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
475
818de002
PB
476 /* so far, 32*2 + 32 words = 384 bytes have been written.
477 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */
478
479 for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) {
480 write_memory (sp-384-(ii*4),
481 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
482 }
483
484 /* Save sp or so called back chain right here. */
b112f2ae
JK
485 store_address (sp_targ, 4, sp);
486 write_memory (sp-DUMMY_FRAME_SIZE, sp_targ, 4);
818de002 487 sp -= DUMMY_FRAME_SIZE;
41abdfbd
JG
488
489 /* And finally, this is the back chain. */
359a097f 490 write_memory (sp+8, pc_targ, 4);
41abdfbd
JG
491}
492
493
494/* Pop a dummy frame.
495
496 In rs6000 when we push a dummy frame, we save all of the registers. This
497 is usually done before user calls a function explicitly.
498
818de002
PB
499 After a dummy frame is pushed, some instructions are copied into stack,
500 and stack pointer is decremented even more. Since we don't have a frame
501 pointer to get back to the parent frame of the dummy, we start having
502 trouble poping it. Therefore, we keep a dummy frame stack, keeping
503 addresses of dummy frames as such. When poping happens and when we
504 detect that was a dummy frame, we pop it back to its parent by using
505 dummy frame stack (`dummy_frame_addr' array).
ecf4059f
JG
506
507FIXME: This whole concept is broken. You should be able to detect
508a dummy stack frame *on the user's stack itself*. When you do,
509then you know the format of that stack frame -- including its
510saved SP register! There should *not* be a separate stack in the
d6434f39 511GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92
41abdfbd
JG
512 */
513
514pop_dummy_frame ()
515{
516 CORE_ADDR sp, pc;
517 int ii;
518 sp = dummy_frame_addr [--dummy_frame_count];
519
520 /* restore all fpr's. */
521 for (ii = 1; ii <= 32; ++ii)
522 read_memory (sp-(ii*8), &registers[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8);
523
524 /* restore all gpr's */
525 for (ii=1; ii <= 32; ++ii) {
526 read_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
527 }
528
818de002
PB
529 /* restore the rest of the registers. */
530 for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii)
531 read_memory (sp-384-(ii*4),
532 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
533
534 read_memory (sp-(DUMMY_FRAME_SIZE-8),
535 &registers [REGISTER_BYTE(PC_REGNUM)], 4);
41abdfbd
JG
536
537 /* when a dummy frame was being pushed, we had to decrement %sp first, in
538 order to secure astack space. Thus, saved %sp (or %r1) value, is not the
539 one we should restore. Change it with the one we need. */
540
541 *(int*)&registers [REGISTER_BYTE(FP_REGNUM)] = sp;
542
543 /* Now we can restore all registers. */
544
5f1c39ef 545 target_store_registers (-1);
41abdfbd
JG
546 pc = read_pc ();
547 flush_cached_frames ();
41abdfbd
JG
548}
549
550
551/* pop the innermost frame, go back to the caller. */
552
ecf4059f 553void
41abdfbd
JG
554pop_frame ()
555{
359a097f 556 CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */
63641491 557 struct rs6000_framedata fdata;
669caa9c 558 struct frame_info *frame = get_current_frame ();
41abdfbd 559 int addr, ii;
41abdfbd
JG
560
561 pc = read_pc ();
669caa9c 562 sp = FRAME_FP (frame);
41abdfbd
JG
563
564 if (stop_stack_dummy && dummy_frame_count) {
565 pop_dummy_frame ();
566 return;
567 }
568
07aa9fdc
PS
569 /* Make sure that all registers are valid. */
570 read_register_bytes (0, NULL, REGISTER_BYTES);
571
41abdfbd
JG
572 /* figure out previous %pc value. If the function is frameless, it is
573 still in the link register, otherwise walk the frames and retrieve the
574 saved %pc value in the previous frame. */
575
34a1a3bf 576 addr = get_pc_function_start (frame->pc) + FUNCTION_START_OFFSET;
068c9fd6 577 (void) skip_prologue (addr, &fdata);
41abdfbd 578
6c6afbb9 579 if (fdata.frameless)
07aa9fdc
PS
580 prev_sp = sp;
581 else
582 prev_sp = read_memory_integer (sp, 4);
068c9fd6 583 if (fdata.lr_offset == 0)
41abdfbd
JG
584 lr = read_register (LR_REGNUM);
585 else
068c9fd6 586 lr = read_memory_integer (prev_sp + fdata.lr_offset, 4);
41abdfbd
JG
587
588 /* reset %pc value. */
589 write_register (PC_REGNUM, lr);
590
591 /* reset register values if any was saved earlier. */
6c6afbb9 592 addr = prev_sp - fdata.offset;
41abdfbd 593
6c6afbb9 594 if (fdata.saved_gpr != -1)
669caa9c 595 for (ii = fdata.saved_gpr; ii <= 31; ++ii) {
41abdfbd 596 read_memory (addr, &registers [REGISTER_BYTE (ii)], 4);
cdb1cc92 597 addr += 4;
41abdfbd
JG
598 }
599
6c6afbb9 600 if (fdata.saved_fpr != -1)
669caa9c 601 for (ii = fdata.saved_fpr; ii <= 31; ++ii) {
41abdfbd
JG
602 read_memory (addr, &registers [REGISTER_BYTE (ii+FP0_REGNUM)], 8);
603 addr += 8;
604 }
605
606 write_register (SP_REGNUM, prev_sp);
5f1c39ef 607 target_store_registers (-1);
41abdfbd 608 flush_cached_frames ();
41abdfbd
JG
609}
610
41abdfbd
JG
611/* fixup the call sequence of a dummy function, with the real function address.
612 its argumets will be passed by gdb. */
613
ecf4059f 614void
41abdfbd
JG
615fix_call_dummy(dummyname, pc, fun, nargs, type)
616 char *dummyname;
ecf4059f
JG
617 CORE_ADDR pc;
618 CORE_ADDR fun;
41abdfbd
JG
619 int nargs; /* not used */
620 int type; /* not used */
41abdfbd
JG
621{
622#define TOC_ADDR_OFFSET 20
623#define TARGET_ADDR_OFFSET 28
624
625 int ii;
ecf4059f
JG
626 CORE_ADDR target_addr;
627 CORE_ADDR tocvalue;
41abdfbd
JG
628
629 target_addr = fun;
630 tocvalue = find_toc_address (target_addr);
631
632 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET);
633 ii = (ii & 0xffff0000) | (tocvalue >> 16);
634 *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii;
635
636 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4);
637 ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff);
638 *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii;
639
640 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET);
641 ii = (ii & 0xffff0000) | (target_addr >> 16);
642 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii;
643
644 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4);
645 ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff);
646 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii;
647}
648
41abdfbd
JG
649/* Pass the arguments in either registers, or in the stack. In RS6000, the first
650 eight words of the argument list (that might be less than eight parameters if
651 some parameters occupy more than one word) are passed in r3..r11 registers.
652 float and double parameters are passed in fpr's, in addition to that. Rest of
653 the parameters if any are passed in user stack. There might be cases in which
654 half of the parameter is copied into registers, the other half is pushed into
655 stack.
656
657 If the function is returning a structure, then the return address is passed
658 in r3, then the first 7 words of the parametes can be passed in registers,
659 starting from r4. */
660
661CORE_ADDR
662push_arguments (nargs, args, sp, struct_return, struct_addr)
663 int nargs;
17221e41 664 value_ptr *args;
41abdfbd
JG
665 CORE_ADDR sp;
666 int struct_return;
667 CORE_ADDR struct_addr;
668{
669 int ii, len;
670 int argno; /* current argument number */
671 int argbytes; /* current argument byte */
672 char tmp_buffer [50];
17221e41 673 value_ptr arg;
41abdfbd
JG
674 int f_argno = 0; /* current floating point argno */
675
676 CORE_ADDR saved_sp, pc;
677
678 if ( dummy_frame_count <= 0)
199b2450 679 printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n");
41abdfbd
JG
680
681 /* The first eight words of ther arguments are passed in registers. Copy
682 them appropriately.
683
684 If the function is returning a `struct', then the first word (which
685 will be passed in r3) is used for struct return address. In that
686 case we should advance one word and start from r4 register to copy
687 parameters. */
688
689 ii = struct_return ? 1 : 0;
690
691 for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) {
692
5222ca60 693 arg = args[argno];
41abdfbd
JG
694 len = TYPE_LENGTH (VALUE_TYPE (arg));
695
696 if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT) {
697
698 /* floating point arguments are passed in fpr's, as well as gpr's.
699 There are 13 fpr's reserved for passing parameters. At this point
700 there is no way we would run out of them. */
701
702 if (len > 8)
199b2450 703 printf_unfiltered (
41abdfbd
JG
704"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
705
ade40d31
RP
706 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
707 len);
41abdfbd
JG
708 ++f_argno;
709 }
710
711 if (len > 4) {
712
713 /* Argument takes more than one register. */
714 while (argbytes < len) {
715
716 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31
RP
717 memcpy (&registers[REGISTER_BYTE(ii+3)],
718 ((char*)VALUE_CONTENTS (arg))+argbytes,
41abdfbd
JG
719 (len - argbytes) > 4 ? 4 : len - argbytes);
720 ++ii, argbytes += 4;
721
722 if (ii >= 8)
723 goto ran_out_of_registers_for_arguments;
724 }
725 argbytes = 0;
726 --ii;
727 }
728 else { /* Argument can fit in one register. No problem. */
729 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31 730 memcpy (&registers[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len);
41abdfbd
JG
731 }
732 ++argno;
733 }
734
735ran_out_of_registers_for_arguments:
736
737 /* location for 8 parameters are always reserved. */
738 sp -= 4 * 8;
739
740 /* another six words for back chain, TOC register, link register, etc. */
741 sp -= 24;
742
743 /* if there are more arguments, allocate space for them in
744 the stack, then push them starting from the ninth one. */
745
746 if ((argno < nargs) || argbytes) {
747 int space = 0, jj;
17221e41 748 value_ptr val;
41abdfbd
JG
749
750 if (argbytes) {
751 space += ((len - argbytes + 3) & -4);
752 jj = argno + 1;
753 }
754 else
755 jj = argno;
756
757 for (; jj < nargs; ++jj) {
5222ca60 758 val = args[jj];
41abdfbd
JG
759 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
760 }
761
762 /* add location required for the rest of the parameters */
763 space = (space + 7) & -8;
764 sp -= space;
765
766 /* This is another instance we need to be concerned about securing our
767 stack space. If we write anything underneath %sp (r1), we might conflict
768 with the kernel who thinks he is free to use this area. So, update %sp
769 first before doing anything else. */
770
771 write_register (SP_REGNUM, sp);
772
41abdfbd
JG
773 /* if the last argument copied into the registers didn't fit there
774 completely, push the rest of it into stack. */
775
776 if (argbytes) {
777 write_memory (
778 sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes);
779 ++argno;
780 ii += ((len - argbytes + 3) & -4) / 4;
781 }
782
783 /* push the rest of the arguments into stack. */
784 for (; argno < nargs; ++argno) {
785
5222ca60 786 arg = args[argno];
41abdfbd
JG
787 len = TYPE_LENGTH (VALUE_TYPE (arg));
788
789
790 /* float types should be passed in fpr's, as well as in the stack. */
791 if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT && f_argno < 13) {
792
793 if (len > 8)
199b2450 794 printf_unfiltered (
41abdfbd
JG
795"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
796
ade40d31
RP
797 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
798 len);
41abdfbd
JG
799 ++f_argno;
800 }
801
359a097f 802 write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len);
41abdfbd
JG
803 ii += ((len + 3) & -4) / 4;
804 }
805 }
6c6afbb9 806 else
41abdfbd
JG
807 /* Secure stack areas first, before doing anything else. */
808 write_register (SP_REGNUM, sp);
809
41abdfbd
JG
810 saved_sp = dummy_frame_addr [dummy_frame_count - 1];
811 read_memory (saved_sp, tmp_buffer, 24);
812 write_memory (sp, tmp_buffer, 24);
813
b112f2ae
JK
814 /* set back chain properly */
815 store_address (tmp_buffer, 4, saved_sp);
816 write_memory (sp, tmp_buffer, 4);
41abdfbd 817
5f1c39ef 818 target_store_registers (-1);
41abdfbd
JG
819 return sp;
820}
821
822/* a given return value in `regbuf' with a type `valtype', extract and copy its
823 value into `valbuf' */
824
ecf4059f 825void
41abdfbd
JG
826extract_return_value (valtype, regbuf, valbuf)
827 struct type *valtype;
828 char regbuf[REGISTER_BYTES];
829 char *valbuf;
830{
831
832 if (TYPE_CODE (valtype) == TYPE_CODE_FLT) {
833
834 double dd; float ff;
835 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
836 We need to truncate the return value into float size (4 byte) if
837 necessary. */
838
839 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
ade40d31 840 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)],
41abdfbd
JG
841 TYPE_LENGTH (valtype));
842 else { /* float */
ade40d31 843 memcpy (&dd, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
41abdfbd 844 ff = (float)dd;
ade40d31 845 memcpy (valbuf, &ff, sizeof(float));
41abdfbd
JG
846 }
847 }
848 else
849 /* return value is copied starting from r3. */
ade40d31 850 memcpy (valbuf, &regbuf[REGISTER_BYTE (3)], TYPE_LENGTH (valtype));
41abdfbd
JG
851}
852
853
ecf4059f
JG
854/* keep structure return address in this variable.
855 FIXME: This is a horrid kludge which should not be allowed to continue
856 living. This only allows a single nested call to a structure-returning
857 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
41abdfbd
JG
858
859CORE_ADDR rs6000_struct_return_address;
860
861
c2e4669f
JG
862/* Indirect function calls use a piece of trampoline code to do context
863 switching, i.e. to set the new TOC table. Skip such code if we are on
864 its first instruction (as when we have single-stepped to here).
07aa9fdc
PS
865 Also skip shared library trampoline code (which is different from
866 indirect function call trampolines).
c2e4669f
JG
867 Result is desired PC to step until, or NULL if we are not in
868 trampoline code. */
41abdfbd 869
ecf4059f 870CORE_ADDR
41abdfbd 871skip_trampoline_code (pc)
ecf4059f 872CORE_ADDR pc;
41abdfbd
JG
873{
874 register unsigned int ii, op;
07aa9fdc 875 CORE_ADDR solib_target_pc;
41abdfbd
JG
876
877 static unsigned trampoline_code[] = {
878 0x800b0000, /* l r0,0x0(r11) */
879 0x90410014, /* st r2,0x14(r1) */
880 0x7c0903a6, /* mtctr r0 */
881 0x804b0004, /* l r2,0x4(r11) */
882 0x816b0008, /* l r11,0x8(r11) */
883 0x4e800420, /* bctr */
884 0x4e800020, /* br */
885 0
886 };
887
07aa9fdc
PS
888 /* If pc is in a shared library trampoline, return its target. */
889 solib_target_pc = find_solib_trampoline_target (pc);
890 if (solib_target_pc)
891 return solib_target_pc;
892
41abdfbd
JG
893 for (ii=0; trampoline_code[ii]; ++ii) {
894 op = read_memory_integer (pc + (ii*4), 4);
895 if (op != trampoline_code [ii])
359a097f 896 return 0;
41abdfbd
JG
897 }
898 ii = read_register (11); /* r11 holds destination addr */
899 pc = read_memory_integer (ii, 4); /* (r11) value */
900 return pc;
901}
902
ecf4059f 903
068c9fd6 904/* Determines whether the function FI has a frame on the stack or not. */
ecf4059f 905int
068c9fd6
MM
906frameless_function_invocation (fi)
907 struct frame_info *fi;
ecf4059f
JG
908{
909 CORE_ADDR func_start;
63641491 910 struct rs6000_framedata fdata;
ecf4059f 911
b0e932ad
JK
912 if (fi->next != NULL)
913 /* Don't even think about framelessness except on the innermost frame. */
3f528883
JK
914 /* FIXME: Can also be frameless if fi->next->signal_handler_caller (if
915 a signal happens while executing in a frameless function). */
b0e932ad
JK
916 return 0;
917
ecf4059f
JG
918 func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
919
920 /* If we failed to find the start of the function, it is a mistake
921 to inspect the instructions. */
922
923 if (!func_start)
924 return 0;
925
068c9fd6
MM
926 (void) skip_prologue (func_start, &fdata);
927 return fdata.frameless;
ecf4059f
JG
928}
929
068c9fd6
MM
930/* Return the PC saved in a frame */
931unsigned long
932frame_saved_pc (fi)
933 struct frame_info *fi;
934{
935 CORE_ADDR func_start;
936 struct rs6000_framedata fdata;
937 int frameless;
938
939 func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
940
941 /* If we failed to find the start of the function, it is a mistake
942 to inspect the instructions. */
943 if (!func_start)
944 return 0;
945
946 (void) skip_prologue (func_start, &fdata);
947 if (fdata.lr_offset == 0)
948 return read_register (LR_REGNUM);
949
950 if (fi->signal_handler_caller)
951 return read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, 4);
952
953 return read_memory_integer (rs6000_frame_chain (fi) + fdata.lr_offset, 4);
954}
ecf4059f
JG
955
956/* If saved registers of frame FI are not known yet, read and cache them.
63641491 957 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
ecf4059f
JG
958 in which case the framedata are read. */
959
960static void
961frame_get_cache_fsr (fi, fdatap)
962 struct frame_info *fi;
63641491 963 struct rs6000_framedata *fdatap;
ecf4059f
JG
964{
965 int ii;
966 CORE_ADDR frame_addr;
63641491 967 struct rs6000_framedata work_fdata;
ecf4059f
JG
968
969 if (fi->cache_fsr)
970 return;
971
972 if (fdatap == NULL) {
973 fdatap = &work_fdata;
068c9fd6 974 (void) skip_prologue (get_pc_function_start (fi->pc), fdatap);
ecf4059f
JG
975 }
976
977 fi->cache_fsr = (struct frame_saved_regs *)
978 obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs));
4ed97c9a 979 memset (fi->cache_fsr, '\0', sizeof (struct frame_saved_regs));
ecf4059f
JG
980
981 if (fi->prev && fi->prev->frame)
982 frame_addr = fi->prev->frame;
983 else
984 frame_addr = read_memory_integer (fi->frame, 4);
985
986 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
987 All fpr's from saved_fpr to fp31 are saved right underneath caller
988 stack pointer, starting from fp31 first. */
989
990 if (fdatap->saved_fpr >= 0) {
991 for (ii=31; ii >= fdatap->saved_fpr; --ii)
992 fi->cache_fsr->regs [FP0_REGNUM + ii] = frame_addr - ((32 - ii) * 8);
993 frame_addr -= (32 - fdatap->saved_fpr) * 8;
994 }
995
996 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
997 All gpr's from saved_gpr to gpr31 are saved right under saved fprs,
998 starting from r31 first. */
999
1000 if (fdatap->saved_gpr >= 0)
1001 for (ii=31; ii >= fdatap->saved_gpr; --ii)
1002 fi->cache_fsr->regs [ii] = frame_addr - ((32 - ii) * 4);
1003}
1004
1005/* Return the address of a frame. This is the inital %sp value when the frame
1006 was first allocated. For functions calling alloca(), it might be saved in
1007 an alloca register. */
1008
1009CORE_ADDR
1010frame_initial_stack_address (fi)
1011 struct frame_info *fi;
1012{
1013 CORE_ADDR tmpaddr;
63641491 1014 struct rs6000_framedata fdata;
ecf4059f
JG
1015 struct frame_info *callee_fi;
1016
1017 /* if the initial stack pointer (frame address) of this frame is known,
1018 just return it. */
1019
1020 if (fi->initial_sp)
1021 return fi->initial_sp;
1022
1023 /* find out if this function is using an alloca register.. */
1024
068c9fd6 1025 (void) skip_prologue (get_pc_function_start (fi->pc), &fdata);
ecf4059f
JG
1026
1027 /* if saved registers of this frame are not known yet, read and cache them. */
1028
1029 if (!fi->cache_fsr)
1030 frame_get_cache_fsr (fi, &fdata);
1031
1032 /* If no alloca register used, then fi->frame is the value of the %sp for
1033 this frame, and it is good enough. */
1034
1035 if (fdata.alloca_reg < 0) {
1036 fi->initial_sp = fi->frame;
1037 return fi->initial_sp;
1038 }
1039
1040 /* This function has an alloca register. If this is the top-most frame
1041 (with the lowest address), the value in alloca register is good. */
1042
1043 if (!fi->next)
1044 return fi->initial_sp = read_register (fdata.alloca_reg);
1045
1046 /* Otherwise, this is a caller frame. Callee has usually already saved
1047 registers, but there are exceptions (such as when the callee
1048 has no parameters). Find the address in which caller's alloca
1049 register is saved. */
1050
1051 for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
1052
1053 if (!callee_fi->cache_fsr)
cdb1cc92 1054 frame_get_cache_fsr (callee_fi, NULL);
ecf4059f
JG
1055
1056 /* this is the address in which alloca register is saved. */
1057
1058 tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg];
1059 if (tmpaddr) {
1060 fi->initial_sp = read_memory_integer (tmpaddr, 4);
1061 return fi->initial_sp;
1062 }
1063
1064 /* Go look into deeper levels of the frame chain to see if any one of
1065 the callees has saved alloca register. */
1066 }
1067
1068 /* If alloca register was not saved, by the callee (or any of its callees)
1069 then the value in the register is still good. */
1070
1071 return fi->initial_sp = read_register (fdata.alloca_reg);
1072}
1073
669caa9c 1074CORE_ADDR
f3649227
JK
1075rs6000_frame_chain (thisframe)
1076 struct frame_info *thisframe;
1077{
669caa9c 1078 CORE_ADDR fp;
f3649227
JK
1079 if (inside_entry_file ((thisframe)->pc))
1080 return 0;
cee86be3 1081 if (thisframe->signal_handler_caller)
9ed8604f 1082 fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4);
cee86be3
JK
1083 else
1084 fp = read_memory_integer ((thisframe)->frame, 4);
1085
f3649227
JK
1086 return fp;
1087}
ecf4059f
JG
1088\f
1089/* Keep an array of load segment information and their TOC table addresses.
1090 This info will be useful when calling a shared library function by hand. */
1091
1092struct loadinfo {
1093 CORE_ADDR textorg, dataorg;
1094 unsigned long toc_offset;
1095};
1096
1097#define LOADINFOLEN 10
1098
ecf4059f
JG
1099static struct loadinfo *loadinfo = NULL;
1100static int loadinfolen = 0;
1101static int loadinfotocindex = 0;
3c02636b 1102static int loadinfotextindex = 0;
ecf4059f
JG
1103
1104
1105void
1106xcoff_init_loadinfo ()
1107{
1108 loadinfotocindex = 0;
1109 loadinfotextindex = 0;
1110
1111 if (loadinfolen == 0) {
1112 loadinfo = (struct loadinfo *)
1113 xmalloc (sizeof (struct loadinfo) * LOADINFOLEN);
1114 loadinfolen = LOADINFOLEN;
1115 }
1116}
1117
1118
1119/* FIXME -- this is never called! */
1120void
1121free_loadinfo ()
1122{
1123 if (loadinfo)
1124 free (loadinfo);
1125 loadinfo = NULL;
1126 loadinfolen = 0;
1127 loadinfotocindex = 0;
1128 loadinfotextindex = 0;
1129}
1130
1131/* this is called from xcoffread.c */
1132
1133void
07dc1e42
MM
1134xcoff_add_toc_to_loadinfo (tocoff)
1135 unsigned long tocoff;
ecf4059f
JG
1136{
1137 while (loadinfotocindex >= loadinfolen) {
1138 loadinfolen += LOADINFOLEN;
1139 loadinfo = (struct loadinfo *)
1140 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1141 }
1142 loadinfo [loadinfotocindex++].toc_offset = tocoff;
1143}
1144
2aefe6e4 1145void
ecf4059f
JG
1146add_text_to_loadinfo (textaddr, dataaddr)
1147 CORE_ADDR textaddr;
1148 CORE_ADDR dataaddr;
1149{
1150 while (loadinfotextindex >= loadinfolen) {
1151 loadinfolen += LOADINFOLEN;
1152 loadinfo = (struct loadinfo *)
1153 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1154 }
1155 loadinfo [loadinfotextindex].textorg = textaddr;
1156 loadinfo [loadinfotextindex].dataorg = dataaddr;
1157 ++loadinfotextindex;
1158}
1159
1160
a367db89 1161/* Note that this assumes that the "textorg" and "dataorg" elements
ecf4059f 1162 of a member of this array are correlated with the "toc_offset"
a367db89
JK
1163 element of the same member. This is taken care of because the loops
1164 which assign the former (in xcoff_relocate_symtab or xcoff_relocate_core)
1165 and the latter (in scan_xcoff_symtab, via vmap_symtab, in vmap_ldinfo
1166 or xcoff_relocate_core) traverse the same objfiles in the same order. */
ecf4059f
JG
1167
1168static CORE_ADDR
1169find_toc_address (pc)
1170 CORE_ADDR pc;
1171{
1172 int ii, toc_entry, tocbase = 0;
1173
1174 for (ii=0; ii < loadinfotextindex; ++ii)
1175 if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) {
1176 toc_entry = ii;
1177 tocbase = loadinfo[ii].textorg;
1178 }
1179
1180 return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset;
1181}
18b46e7c 1182
5c172b4b
MM
1183#ifdef GDB_TARGET_POWERPC
1184int
1185gdb_print_insn_powerpc (memaddr, info)
1186 bfd_vma memaddr;
1187 disassemble_info *info;
1188{
1189 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1190 return print_insn_big_powerpc (memaddr, info);
1191 else
1192 return print_insn_little_powerpc (memaddr, info);
1193}
1194#endif
1195
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1196void
1197_initialize_rs6000_tdep ()
1198{
1199 /* FIXME, this should not be decided via ifdef. */
1200#ifdef GDB_TARGET_POWERPC
5c172b4b 1201 tm_print_insn = gdb_print_insn_powerpc;
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1202#else
1203 tm_print_insn = print_insn_rs6000;
1204#endif
1205}
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