More V.4/AIX fixes
[deliverable/binutils-gdb.git] / gdb / rs6000-tdep.c
CommitLineData
41abdfbd 1/* Target-dependent code for GDB, the GNU debugger.
18b46e7c 2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995
07aa9fdc 3 Free Software Foundation, Inc.
41abdfbd
JG
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
20
41abdfbd 21#include "defs.h"
41abdfbd
JG
22#include "frame.h"
23#include "inferior.h"
24#include "symtab.h"
25#include "target.h"
030fb5cb 26#include "gdbcore.h"
41abdfbd 27
2aefe6e4
JK
28#include "xcoffsolib.h"
29
41abdfbd 30#include <a.out.h>
d6434f39
JG
31
32extern struct obstack frame_cache_obstack;
33
41abdfbd 34extern int errno;
41abdfbd
JG
35
36/* Nonzero if we just simulated a single step break. */
37int one_stepped;
38
41abdfbd
JG
39/* Breakpoint shadows for the single step instructions will be kept here. */
40
41static struct sstep_breaks {
030fb5cb
JK
42 /* Address, or 0 if this is not in use. */
43 CORE_ADDR address;
44 /* Shadow contents. */
45 char data[4];
41abdfbd
JG
46} stepBreaks[2];
47
ecf4059f
JG
48/* Static function prototypes */
49
ecf4059f
JG
50static CORE_ADDR
51find_toc_address PARAMS ((CORE_ADDR pc));
52
53static CORE_ADDR
54branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety));
55
56static void
57frame_get_cache_fsr PARAMS ((struct frame_info *fi,
63641491 58 struct rs6000_framedata *fdatap));
41abdfbd
JG
59
60/*
61 * Calculate the destination of a branch/jump. Return -1 if not a branch.
62 */
ecf4059f 63static CORE_ADDR
41abdfbd 64branch_dest (opcode, instr, pc, safety)
ecf4059f
JG
65 int opcode;
66 int instr;
67 CORE_ADDR pc;
68 CORE_ADDR safety;
41abdfbd
JG
69{
70 register long offset;
ecf4059f 71 CORE_ADDR dest;
41abdfbd
JG
72 int immediate;
73 int absolute;
74 int ext_op;
75
76 absolute = (int) ((instr >> 1) & 1);
77
78 switch (opcode) {
79 case 18 :
ecf4059f 80 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
dc59e982
MM
81 if (absolute)
82 dest = immediate;
83 else
84 dest = pc + immediate;
85 break;
41abdfbd
JG
86
87 case 16 :
dc59e982 88 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
41abdfbd
JG
89 if (absolute)
90 dest = immediate;
91 else
92 dest = pc + immediate;
93 break;
94
95 case 19 :
96 ext_op = (instr>>1) & 0x3ff;
97
98 if (ext_op == 16) /* br conditional register */
99 dest = read_register (LR_REGNUM) & ~3;
100
101 else if (ext_op == 528) /* br cond to count reg */
9aa31e91
JK
102 {
103 dest = read_register (CTR_REGNUM) & ~3;
104
105 /* If we are about to execute a system call, dest is something
106 like 0x22fc or 0x3b00. Upon completion the system call
107 will return to the address in the link register. */
108 if (dest < TEXT_SEGMENT_BASE)
109 dest = read_register (LR_REGNUM) & ~3;
110 }
41abdfbd
JG
111 else return -1;
112 break;
113
114 default: return -1;
115 }
818de002 116 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
41abdfbd
JG
117}
118
119
120
121/* AIX does not support PT_STEP. Simulate it. */
122
997cc2c0 123void
41abdfbd 124single_step (signal)
997cc2c0 125 int signal;
41abdfbd
JG
126{
127#define INSNLEN(OPCODE) 4
128
5c172b4b
MM
129 static char le_breakp[] = LITTLE_BREAKPOINT;
130 static char be_breakp[] = BIG_BREAKPOINT;
131 char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp;
030fb5cb
JK
132 int ii, insn;
133 CORE_ADDR loc;
134 CORE_ADDR breaks[2];
135 int opcode;
41abdfbd
JG
136
137 if (!one_stepped) {
41abdfbd
JG
138 loc = read_pc ();
139
b112f2ae 140 insn = read_memory_integer (loc, 4);
41abdfbd
JG
141
142 breaks[0] = loc + INSNLEN(insn);
143 opcode = insn >> 26;
144 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
145
818de002
PB
146 /* Don't put two breakpoints on the same address. */
147 if (breaks[1] == breaks[0])
148 breaks[1] = -1;
149
030fb5cb 150 stepBreaks[1].address = 0;
41abdfbd
JG
151
152 for (ii=0; ii < 2; ++ii) {
153
154 /* ignore invalid breakpoint. */
155 if ( breaks[ii] == -1)
156 continue;
157
030fb5cb 158 read_memory (breaks[ii], stepBreaks[ii].data, 4);
41abdfbd 159
030fb5cb 160 write_memory (breaks[ii], breakp, 4);
41abdfbd
JG
161 stepBreaks[ii].address = breaks[ii];
162 }
163
164 one_stepped = 1;
997cc2c0 165 } else {
41abdfbd
JG
166
167 /* remove step breakpoints. */
168 for (ii=0; ii < 2; ++ii)
030fb5cb 169 if (stepBreaks[ii].address != 0)
41abdfbd 170 write_memory
030fb5cb 171 (stepBreaks[ii].address, stepBreaks[ii].data, 4);
41abdfbd
JG
172
173 one_stepped = 0;
174 }
997cc2c0 175 errno = 0; /* FIXME, don't ignore errors! */
030fb5cb 176 /* What errors? {read,write}_memory call error(). */
41abdfbd 177}
41abdfbd
JG
178
179
068c9fd6
MM
180/* return pc value after skipping a function prologue and also return
181 information about a function frame.
41abdfbd 182
068c9fd6
MM
183 in struct rs6000_frameinfo fdata:
184 - frameless is TRUE, if function does not have a frame.
185 - nosavedpc is TRUE, if function does not save %pc value in its frame.
186 - offset is the number of bytes used in the frame to save registers.
187 - saved_gpr is the number of the first saved gpr.
188 - saved_fpr is the number of the first saved fpr.
189 - alloca_reg is the number of the register used for alloca() handling.
190 Otherwise -1.
191 - gpr_offset is the offset of the saved gprs
192 - fpr_offset is the offset of the saved fprs
193 - lr_offset is the offset of the saved lr
194 - cr_offset is the offset of the saved cr
195 */
196
197#define SIGNED_SHORT(x) \
198 ((sizeof (short) == 2) \
199 ? ((int)(short)(x)) \
200 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
201
202#define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
203
204CORE_ADDR
205skip_prologue (pc, fdata)
206 CORE_ADDR pc;
207 struct rs6000_framedata *fdata;
41abdfbd 208{
068c9fd6 209 CORE_ADDR orig_pc = pc;
34df79fc 210 char buf[4];
34df79fc 211 unsigned long op;
4b4c6c96 212 long offset = 0;
068c9fd6
MM
213 int lr_reg = 0;
214 int cr_reg = 0;
215 int reg;
4b4c6c96 216 int framep = 0;
068c9fd6
MM
217 static struct rs6000_framedata zero_frame;
218
219 *fdata = zero_frame;
220 fdata->saved_gpr = -1;
221 fdata->saved_fpr = -1;
222 fdata->alloca_reg = -1;
223 fdata->frameless = 1;
224 fdata->nosavedpc = 1;
41abdfbd 225
34df79fc 226 if (target_read_memory (pc, buf, 4))
41abdfbd 227 return pc; /* Can't access it -- assume no prologue. */
41abdfbd
JG
228
229 /* Assume that subsequent fetches can fail with low probability. */
068c9fd6
MM
230 pc -= 4;
231 for (;;)
232 {
233 pc += 4;
234 op = read_memory_integer (pc, 4);
41abdfbd 235
068c9fd6
MM
236 if ((op & 0xfc1fffff) == 0x7c0802a6) { /* mflr Rx */
237 lr_reg = (op & 0x03e00000) | 0x90010000;
238 continue;
239
240 } else if ((op & 0xfc1fffff) == 0x7c000026) { /* mfcr Rx */
241 cr_reg = (op & 0x03e00000) | 0x90010000;
242 continue;
243
244 } else if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
245 reg = GET_SRC_REG (op);
246 if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg) {
247 fdata->saved_fpr = reg;
4b4c6c96 248 fdata->fpr_offset = SIGNED_SHORT (op) + offset;
068c9fd6
MM
249 }
250 continue;
251
252 } else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
253 ((op & 0xfc1f0000) == 0x90010000 && /* st rx,NUM(r1), rx >= r13 */
254 (op & 0x03e00000) >= 0x01a00000)) {
255
256 reg = GET_SRC_REG (op);
257 if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg) {
258 fdata->saved_gpr = reg;
4b4c6c96 259 fdata->gpr_offset = SIGNED_SHORT (op) + offset;
068c9fd6
MM
260 }
261 continue;
262
263 } else if ((op & 0xffff0000) == 0x3c000000) { /* addis 0,0,NUM, used for >= 32k frames */
264 fdata->offset = (op & 0x0000ffff) << 16;
265 continue;
266
267 } else if ((op & 0xffff0000) == 0x60000000) { /* ori 0,0,NUM, 2nd half of >= 32k frames */
268 fdata->offset |= (op & 0x0000ffff);
269 continue;
270
271 } else if ((op & 0xffff0000) == lr_reg) { /* st Rx,NUM(r1) where Rx == lr */
4b4c6c96 272 fdata->lr_offset = SIGNED_SHORT (op) + offset;
068c9fd6
MM
273 fdata->nosavedpc = 0;
274 lr_reg = 0;
275 continue;
276
277 } else if ((op & 0xffff0000) == cr_reg) { /* st Rx,NUM(r1) where Rx == cr */
4b4c6c96 278 fdata->cr_offset = SIGNED_SHORT (op) + offset;
068c9fd6
MM
279 cr_reg = 0;
280 continue;
281
4b4c6c96
MM
282 } else if (op == 0x48000005) { /* bl .+4 used in -mrelocatable */
283 continue;
284
285 } else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used in V.4 -mrelocatable */
286 op == 0x7fc0f214) && /* add r30,r0,r30, used in V.4 -mrelocatable */
287 lr_reg == 0x901e0000) {
288 continue;
289
290 } else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used in V.4 -mminimal-toc */
291 (op & 0xffff0000) == 0x3bde0000) { /* addi 30,30,foo@l */
292 continue;
293
068c9fd6
MM
294 } else if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
295 op = read_memory_integer (pc+4, 4);
296
297 /* At this point, make sure this is not a trampoline function
298 (a function that simply calls another functions, and nothing else).
299 If the next is not a nop, this branch was part of the function
300 prologue. */
301
302 if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */
303 return pc; /* don't skip over this branch */
304
305 continue;
306
4b4c6c96 307 /* update stack pointer */
068c9fd6 308 } else if ((op & 0xffff0000) == 0x94210000) { /* stu r1,NUM(r1) */
4b4c6c96
MM
309 fdata->offset = SIGNED_SHORT (op);
310 offset = fdata->offset;
311 continue;
1eeba686 312
068c9fd6 313 } else if (op == 0x7c21016e) { /* stwux 1,1,0 */
4b4c6c96
MM
314 offset = fdata->offset;
315 continue;
41abdfbd 316
4b4c6c96
MM
317 /* Load up minimal toc pointer */
318 } else if ((op >> 22) == 0x20f) { /* l r31,... or l r30,... */
319 continue;
cdb1cc92 320
4b4c6c96
MM
321 /* store parameters in stack */
322 } else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
323 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
324 (op & 0xfc1f0000) == 0xfc010000) { /* frsp, fp?,NUM(r1) */
325 continue;
e137e850 326
4b4c6c96
MM
327 /* store parameters in stack via frame pointer */
328 } else if (framep &&
329 (op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
330 (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
331 (op & 0xfc1f0000) == 0xfc1f0000) { /* frsp, fp?,NUM(r1) */
332 continue;
e137e850 333
4b4c6c96
MM
334 /* Set up frame pointer */
335 } else if (op == 0x603f0000 /* oril r31, r1, 0x0 */
336 || op == 0x7c3f0b78) { /* mr r31, r1 */
337 framep = 1;
338 continue;
41abdfbd 339
4b4c6c96
MM
340 } else {
341 break;
342 }
41abdfbd 343 }
068c9fd6 344
507e4004
PB
345#if 0
346/* I have problems with skipping over __main() that I need to address
347 * sometime. Previously, I used to use misc_function_vector which
348 * didn't work as well as I wanted to be. -MGO */
349
350 /* If the first thing after skipping a prolog is a branch to a function,
351 this might be a call to an initializer in main(), introduced by gcc2.
352 We'd like to skip over it as well. Fortunately, xlc does some extra
353 work before calling a function right after a prologue, thus we can
354 single out such gcc2 behaviour. */
355
356
357 if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */
358 op = read_memory_integer (pc+4, 4);
359
360 if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */
361
362 /* check and see if we are in main. If so, skip over this initializer
363 function as well. */
364
365 tmp = find_pc_misc_function (pc);
2e4964ad 366 if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main"))
507e4004
PB
367 return pc + 8;
368 }
369 }
370#endif /* 0 */
371
068c9fd6 372 fdata->frameless = (pc == orig_pc);
4b4c6c96 373 fdata->offset = - fdata->offset;
41abdfbd
JG
374 return pc;
375}
376
818de002 377
41abdfbd
JG
378/*************************************************************************
379 Support for creating pushind a dummy frame into the stack, and popping
380 frames, etc.
381*************************************************************************/
382
818de002
PB
383/* The total size of dummy frame is 436, which is;
384
385 32 gpr's - 128 bytes
386 32 fpr's - 256 "
387 7 the rest - 28 "
388 and 24 extra bytes for the callee's link area. The last 24 bytes
389 for the link area might not be necessary, since it will be taken
390 care of by push_arguments(). */
391
392#define DUMMY_FRAME_SIZE 436
393
41abdfbd
JG
394#define DUMMY_FRAME_ADDR_SIZE 10
395
396/* Make sure you initialize these in somewhere, in case gdb gives up what it
818de002 397 was debugging and starts debugging something else. FIXMEibm */
41abdfbd
JG
398
399static int dummy_frame_count = 0;
400static int dummy_frame_size = 0;
401static CORE_ADDR *dummy_frame_addr = 0;
402
403extern int stop_stack_dummy;
404
405/* push a dummy frame into stack, save all register. Currently we are saving
406 only gpr's and fpr's, which is not good enough! FIXMEmgo */
407
ecf4059f 408void
41abdfbd
JG
409push_dummy_frame ()
410{
359a097f
JK
411 /* stack pointer. */
412 CORE_ADDR sp;
b112f2ae
JK
413 /* Same thing, target byte order. */
414 char sp_targ[4];
359a097f
JK
415
416 /* link register. */
417 CORE_ADDR pc;
418 /* Same thing, target byte order. */
419 char pc_targ[4];
420
41abdfbd
JG
421 int ii;
422
5f1c39ef 423 target_fetch_registers (-1);
6c6afbb9 424
41abdfbd
JG
425 if (dummy_frame_count >= dummy_frame_size) {
426 dummy_frame_size += DUMMY_FRAME_ADDR_SIZE;
427 if (dummy_frame_addr)
428 dummy_frame_addr = (CORE_ADDR*) xrealloc
429 (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size));
430 else
431 dummy_frame_addr = (CORE_ADDR*)
432 xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size));
433 }
434
435 sp = read_register(SP_REGNUM);
359a097f 436 pc = read_register(PC_REGNUM);
5816555b 437 store_address (pc_targ, 4, pc);
41abdfbd
JG
438
439 dummy_frame_addr [dummy_frame_count++] = sp;
440
441 /* Be careful! If the stack pointer is not decremented first, then kernel
6c6afbb9 442 thinks he is free to use the space underneath it. And kernel actually
41abdfbd
JG
443 uses that area for IPC purposes when executing ptrace(2) calls. So
444 before writing register values into the new frame, decrement and update
445 %sp first in order to secure your frame. */
446
818de002 447 write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE);
41abdfbd 448
41abdfbd
JG
449 /* gdb relies on the state of current_frame. We'd better update it,
450 otherwise things like do_registers_info() wouldn't work properly! */
451
452 flush_cached_frames ();
41abdfbd
JG
453
454 /* save program counter in link register's space. */
359a097f 455 write_memory (sp+8, pc_targ, 4);
41abdfbd 456
6c6afbb9 457 /* save all floating point and general purpose registers here. */
41abdfbd
JG
458
459 /* fpr's, f0..f31 */
460 for (ii = 0; ii < 32; ++ii)
461 write_memory (sp-8-(ii*8), &registers[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8);
462
463 /* gpr's r0..r31 */
464 for (ii=1; ii <=32; ++ii)
465 write_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
466
818de002
PB
467 /* so far, 32*2 + 32 words = 384 bytes have been written.
468 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */
469
470 for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) {
471 write_memory (sp-384-(ii*4),
472 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
473 }
474
475 /* Save sp or so called back chain right here. */
b112f2ae
JK
476 store_address (sp_targ, 4, sp);
477 write_memory (sp-DUMMY_FRAME_SIZE, sp_targ, 4);
818de002 478 sp -= DUMMY_FRAME_SIZE;
41abdfbd
JG
479
480 /* And finally, this is the back chain. */
359a097f 481 write_memory (sp+8, pc_targ, 4);
41abdfbd
JG
482}
483
484
485/* Pop a dummy frame.
486
487 In rs6000 when we push a dummy frame, we save all of the registers. This
488 is usually done before user calls a function explicitly.
489
818de002
PB
490 After a dummy frame is pushed, some instructions are copied into stack,
491 and stack pointer is decremented even more. Since we don't have a frame
492 pointer to get back to the parent frame of the dummy, we start having
493 trouble poping it. Therefore, we keep a dummy frame stack, keeping
494 addresses of dummy frames as such. When poping happens and when we
495 detect that was a dummy frame, we pop it back to its parent by using
496 dummy frame stack (`dummy_frame_addr' array).
ecf4059f
JG
497
498FIXME: This whole concept is broken. You should be able to detect
499a dummy stack frame *on the user's stack itself*. When you do,
500then you know the format of that stack frame -- including its
501saved SP register! There should *not* be a separate stack in the
d6434f39 502GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92
41abdfbd
JG
503 */
504
505pop_dummy_frame ()
506{
507 CORE_ADDR sp, pc;
508 int ii;
509 sp = dummy_frame_addr [--dummy_frame_count];
510
511 /* restore all fpr's. */
512 for (ii = 1; ii <= 32; ++ii)
513 read_memory (sp-(ii*8), &registers[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8);
514
515 /* restore all gpr's */
516 for (ii=1; ii <= 32; ++ii) {
517 read_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
518 }
519
818de002
PB
520 /* restore the rest of the registers. */
521 for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii)
522 read_memory (sp-384-(ii*4),
523 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
524
525 read_memory (sp-(DUMMY_FRAME_SIZE-8),
526 &registers [REGISTER_BYTE(PC_REGNUM)], 4);
41abdfbd
JG
527
528 /* when a dummy frame was being pushed, we had to decrement %sp first, in
529 order to secure astack space. Thus, saved %sp (or %r1) value, is not the
530 one we should restore. Change it with the one we need. */
531
532 *(int*)&registers [REGISTER_BYTE(FP_REGNUM)] = sp;
533
534 /* Now we can restore all registers. */
535
5f1c39ef 536 target_store_registers (-1);
41abdfbd
JG
537 pc = read_pc ();
538 flush_cached_frames ();
41abdfbd
JG
539}
540
541
542/* pop the innermost frame, go back to the caller. */
543
ecf4059f 544void
41abdfbd
JG
545pop_frame ()
546{
359a097f 547 CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */
63641491 548 struct rs6000_framedata fdata;
669caa9c 549 struct frame_info *frame = get_current_frame ();
41abdfbd 550 int addr, ii;
41abdfbd
JG
551
552 pc = read_pc ();
669caa9c 553 sp = FRAME_FP (frame);
41abdfbd
JG
554
555 if (stop_stack_dummy && dummy_frame_count) {
556 pop_dummy_frame ();
557 return;
558 }
559
07aa9fdc
PS
560 /* Make sure that all registers are valid. */
561 read_register_bytes (0, NULL, REGISTER_BYTES);
562
41abdfbd
JG
563 /* figure out previous %pc value. If the function is frameless, it is
564 still in the link register, otherwise walk the frames and retrieve the
565 saved %pc value in the previous frame. */
566
34a1a3bf 567 addr = get_pc_function_start (frame->pc) + FUNCTION_START_OFFSET;
068c9fd6 568 (void) skip_prologue (addr, &fdata);
41abdfbd 569
6c6afbb9 570 if (fdata.frameless)
07aa9fdc
PS
571 prev_sp = sp;
572 else
573 prev_sp = read_memory_integer (sp, 4);
068c9fd6 574 if (fdata.lr_offset == 0)
41abdfbd
JG
575 lr = read_register (LR_REGNUM);
576 else
068c9fd6 577 lr = read_memory_integer (prev_sp + fdata.lr_offset, 4);
41abdfbd
JG
578
579 /* reset %pc value. */
580 write_register (PC_REGNUM, lr);
581
582 /* reset register values if any was saved earlier. */
6c6afbb9 583 addr = prev_sp - fdata.offset;
41abdfbd 584
6c6afbb9 585 if (fdata.saved_gpr != -1)
669caa9c 586 for (ii = fdata.saved_gpr; ii <= 31; ++ii) {
41abdfbd 587 read_memory (addr, &registers [REGISTER_BYTE (ii)], 4);
cdb1cc92 588 addr += 4;
41abdfbd
JG
589 }
590
6c6afbb9 591 if (fdata.saved_fpr != -1)
669caa9c 592 for (ii = fdata.saved_fpr; ii <= 31; ++ii) {
41abdfbd
JG
593 read_memory (addr, &registers [REGISTER_BYTE (ii+FP0_REGNUM)], 8);
594 addr += 8;
595 }
596
597 write_register (SP_REGNUM, prev_sp);
5f1c39ef 598 target_store_registers (-1);
41abdfbd 599 flush_cached_frames ();
41abdfbd
JG
600}
601
41abdfbd
JG
602/* fixup the call sequence of a dummy function, with the real function address.
603 its argumets will be passed by gdb. */
604
ecf4059f 605void
41abdfbd
JG
606fix_call_dummy(dummyname, pc, fun, nargs, type)
607 char *dummyname;
ecf4059f
JG
608 CORE_ADDR pc;
609 CORE_ADDR fun;
41abdfbd
JG
610 int nargs; /* not used */
611 int type; /* not used */
41abdfbd
JG
612{
613#define TOC_ADDR_OFFSET 20
614#define TARGET_ADDR_OFFSET 28
615
616 int ii;
ecf4059f
JG
617 CORE_ADDR target_addr;
618 CORE_ADDR tocvalue;
41abdfbd
JG
619
620 target_addr = fun;
621 tocvalue = find_toc_address (target_addr);
622
623 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET);
624 ii = (ii & 0xffff0000) | (tocvalue >> 16);
625 *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii;
626
627 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4);
628 ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff);
629 *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii;
630
631 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET);
632 ii = (ii & 0xffff0000) | (target_addr >> 16);
633 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii;
634
635 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4);
636 ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff);
637 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii;
638}
639
41abdfbd
JG
640/* Pass the arguments in either registers, or in the stack. In RS6000, the first
641 eight words of the argument list (that might be less than eight parameters if
642 some parameters occupy more than one word) are passed in r3..r11 registers.
643 float and double parameters are passed in fpr's, in addition to that. Rest of
644 the parameters if any are passed in user stack. There might be cases in which
645 half of the parameter is copied into registers, the other half is pushed into
646 stack.
647
648 If the function is returning a structure, then the return address is passed
649 in r3, then the first 7 words of the parametes can be passed in registers,
650 starting from r4. */
651
652CORE_ADDR
653push_arguments (nargs, args, sp, struct_return, struct_addr)
654 int nargs;
17221e41 655 value_ptr *args;
41abdfbd
JG
656 CORE_ADDR sp;
657 int struct_return;
658 CORE_ADDR struct_addr;
659{
660 int ii, len;
661 int argno; /* current argument number */
662 int argbytes; /* current argument byte */
663 char tmp_buffer [50];
17221e41 664 value_ptr arg;
41abdfbd
JG
665 int f_argno = 0; /* current floating point argno */
666
667 CORE_ADDR saved_sp, pc;
668
669 if ( dummy_frame_count <= 0)
199b2450 670 printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n");
41abdfbd
JG
671
672 /* The first eight words of ther arguments are passed in registers. Copy
673 them appropriately.
674
675 If the function is returning a `struct', then the first word (which
676 will be passed in r3) is used for struct return address. In that
677 case we should advance one word and start from r4 register to copy
678 parameters. */
679
680 ii = struct_return ? 1 : 0;
681
682 for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) {
683
5222ca60 684 arg = args[argno];
41abdfbd
JG
685 len = TYPE_LENGTH (VALUE_TYPE (arg));
686
687 if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT) {
688
689 /* floating point arguments are passed in fpr's, as well as gpr's.
690 There are 13 fpr's reserved for passing parameters. At this point
691 there is no way we would run out of them. */
692
693 if (len > 8)
199b2450 694 printf_unfiltered (
41abdfbd
JG
695"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
696
ade40d31
RP
697 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
698 len);
41abdfbd
JG
699 ++f_argno;
700 }
701
702 if (len > 4) {
703
704 /* Argument takes more than one register. */
705 while (argbytes < len) {
706
707 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31
RP
708 memcpy (&registers[REGISTER_BYTE(ii+3)],
709 ((char*)VALUE_CONTENTS (arg))+argbytes,
41abdfbd
JG
710 (len - argbytes) > 4 ? 4 : len - argbytes);
711 ++ii, argbytes += 4;
712
713 if (ii >= 8)
714 goto ran_out_of_registers_for_arguments;
715 }
716 argbytes = 0;
717 --ii;
718 }
719 else { /* Argument can fit in one register. No problem. */
720 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31 721 memcpy (&registers[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len);
41abdfbd
JG
722 }
723 ++argno;
724 }
725
726ran_out_of_registers_for_arguments:
727
728 /* location for 8 parameters are always reserved. */
729 sp -= 4 * 8;
730
731 /* another six words for back chain, TOC register, link register, etc. */
732 sp -= 24;
733
734 /* if there are more arguments, allocate space for them in
735 the stack, then push them starting from the ninth one. */
736
737 if ((argno < nargs) || argbytes) {
738 int space = 0, jj;
17221e41 739 value_ptr val;
41abdfbd
JG
740
741 if (argbytes) {
742 space += ((len - argbytes + 3) & -4);
743 jj = argno + 1;
744 }
745 else
746 jj = argno;
747
748 for (; jj < nargs; ++jj) {
5222ca60 749 val = args[jj];
41abdfbd
JG
750 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
751 }
752
753 /* add location required for the rest of the parameters */
754 space = (space + 7) & -8;
755 sp -= space;
756
757 /* This is another instance we need to be concerned about securing our
758 stack space. If we write anything underneath %sp (r1), we might conflict
759 with the kernel who thinks he is free to use this area. So, update %sp
760 first before doing anything else. */
761
762 write_register (SP_REGNUM, sp);
763
41abdfbd
JG
764 /* if the last argument copied into the registers didn't fit there
765 completely, push the rest of it into stack. */
766
767 if (argbytes) {
768 write_memory (
769 sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes);
770 ++argno;
771 ii += ((len - argbytes + 3) & -4) / 4;
772 }
773
774 /* push the rest of the arguments into stack. */
775 for (; argno < nargs; ++argno) {
776
5222ca60 777 arg = args[argno];
41abdfbd
JG
778 len = TYPE_LENGTH (VALUE_TYPE (arg));
779
780
781 /* float types should be passed in fpr's, as well as in the stack. */
782 if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT && f_argno < 13) {
783
784 if (len > 8)
199b2450 785 printf_unfiltered (
41abdfbd
JG
786"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
787
ade40d31
RP
788 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
789 len);
41abdfbd
JG
790 ++f_argno;
791 }
792
359a097f 793 write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len);
41abdfbd
JG
794 ii += ((len + 3) & -4) / 4;
795 }
796 }
6c6afbb9 797 else
41abdfbd
JG
798 /* Secure stack areas first, before doing anything else. */
799 write_register (SP_REGNUM, sp);
800
41abdfbd
JG
801 saved_sp = dummy_frame_addr [dummy_frame_count - 1];
802 read_memory (saved_sp, tmp_buffer, 24);
803 write_memory (sp, tmp_buffer, 24);
804
b112f2ae
JK
805 /* set back chain properly */
806 store_address (tmp_buffer, 4, saved_sp);
807 write_memory (sp, tmp_buffer, 4);
41abdfbd 808
5f1c39ef 809 target_store_registers (-1);
41abdfbd
JG
810 return sp;
811}
812
813/* a given return value in `regbuf' with a type `valtype', extract and copy its
814 value into `valbuf' */
815
ecf4059f 816void
41abdfbd
JG
817extract_return_value (valtype, regbuf, valbuf)
818 struct type *valtype;
819 char regbuf[REGISTER_BYTES];
820 char *valbuf;
821{
822
823 if (TYPE_CODE (valtype) == TYPE_CODE_FLT) {
824
825 double dd; float ff;
826 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
827 We need to truncate the return value into float size (4 byte) if
828 necessary. */
829
830 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
ade40d31 831 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)],
41abdfbd
JG
832 TYPE_LENGTH (valtype));
833 else { /* float */
ade40d31 834 memcpy (&dd, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
41abdfbd 835 ff = (float)dd;
ade40d31 836 memcpy (valbuf, &ff, sizeof(float));
41abdfbd
JG
837 }
838 }
839 else
840 /* return value is copied starting from r3. */
ade40d31 841 memcpy (valbuf, &regbuf[REGISTER_BYTE (3)], TYPE_LENGTH (valtype));
41abdfbd
JG
842}
843
844
ecf4059f
JG
845/* keep structure return address in this variable.
846 FIXME: This is a horrid kludge which should not be allowed to continue
847 living. This only allows a single nested call to a structure-returning
848 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
41abdfbd
JG
849
850CORE_ADDR rs6000_struct_return_address;
851
852
c2e4669f
JG
853/* Indirect function calls use a piece of trampoline code to do context
854 switching, i.e. to set the new TOC table. Skip such code if we are on
855 its first instruction (as when we have single-stepped to here).
07aa9fdc
PS
856 Also skip shared library trampoline code (which is different from
857 indirect function call trampolines).
c2e4669f
JG
858 Result is desired PC to step until, or NULL if we are not in
859 trampoline code. */
41abdfbd 860
ecf4059f 861CORE_ADDR
41abdfbd 862skip_trampoline_code (pc)
ecf4059f 863CORE_ADDR pc;
41abdfbd
JG
864{
865 register unsigned int ii, op;
07aa9fdc 866 CORE_ADDR solib_target_pc;
41abdfbd
JG
867
868 static unsigned trampoline_code[] = {
869 0x800b0000, /* l r0,0x0(r11) */
870 0x90410014, /* st r2,0x14(r1) */
871 0x7c0903a6, /* mtctr r0 */
872 0x804b0004, /* l r2,0x4(r11) */
873 0x816b0008, /* l r11,0x8(r11) */
874 0x4e800420, /* bctr */
875 0x4e800020, /* br */
876 0
877 };
878
07aa9fdc
PS
879 /* If pc is in a shared library trampoline, return its target. */
880 solib_target_pc = find_solib_trampoline_target (pc);
881 if (solib_target_pc)
882 return solib_target_pc;
883
41abdfbd
JG
884 for (ii=0; trampoline_code[ii]; ++ii) {
885 op = read_memory_integer (pc + (ii*4), 4);
886 if (op != trampoline_code [ii])
359a097f 887 return 0;
41abdfbd
JG
888 }
889 ii = read_register (11); /* r11 holds destination addr */
890 pc = read_memory_integer (ii, 4); /* (r11) value */
891 return pc;
892}
893
ecf4059f 894
068c9fd6 895/* Determines whether the function FI has a frame on the stack or not. */
ecf4059f 896int
068c9fd6
MM
897frameless_function_invocation (fi)
898 struct frame_info *fi;
ecf4059f
JG
899{
900 CORE_ADDR func_start;
63641491 901 struct rs6000_framedata fdata;
ecf4059f 902
b0e932ad
JK
903 if (fi->next != NULL)
904 /* Don't even think about framelessness except on the innermost frame. */
3f528883
JK
905 /* FIXME: Can also be frameless if fi->next->signal_handler_caller (if
906 a signal happens while executing in a frameless function). */
b0e932ad
JK
907 return 0;
908
ecf4059f
JG
909 func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
910
911 /* If we failed to find the start of the function, it is a mistake
912 to inspect the instructions. */
913
914 if (!func_start)
915 return 0;
916
068c9fd6
MM
917 (void) skip_prologue (func_start, &fdata);
918 return fdata.frameless;
ecf4059f
JG
919}
920
068c9fd6
MM
921/* Return the PC saved in a frame */
922unsigned long
923frame_saved_pc (fi)
924 struct frame_info *fi;
925{
926 CORE_ADDR func_start;
927 struct rs6000_framedata fdata;
928 int frameless;
929
930 func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
931
932 /* If we failed to find the start of the function, it is a mistake
933 to inspect the instructions. */
934 if (!func_start)
935 return 0;
936
937 (void) skip_prologue (func_start, &fdata);
068c9fd6
MM
938
939 if (fi->signal_handler_caller)
940 return read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, 4);
941
4b4c6c96
MM
942 if (fdata.lr_offset == 0 && fi->next != NULL)
943 return read_memory_integer (rs6000_frame_chain (fi) + DEFAULT_LR_SAVE, 4);
944
945 if (fdata.lr_offset == 0)
946 return read_register (LR_REGNUM);
947
068c9fd6
MM
948 return read_memory_integer (rs6000_frame_chain (fi) + fdata.lr_offset, 4);
949}
ecf4059f
JG
950
951/* If saved registers of frame FI are not known yet, read and cache them.
63641491 952 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
ecf4059f
JG
953 in which case the framedata are read. */
954
955static void
956frame_get_cache_fsr (fi, fdatap)
957 struct frame_info *fi;
63641491 958 struct rs6000_framedata *fdatap;
ecf4059f
JG
959{
960 int ii;
961 CORE_ADDR frame_addr;
63641491 962 struct rs6000_framedata work_fdata;
ecf4059f
JG
963
964 if (fi->cache_fsr)
965 return;
966
967 if (fdatap == NULL) {
968 fdatap = &work_fdata;
068c9fd6 969 (void) skip_prologue (get_pc_function_start (fi->pc), fdatap);
ecf4059f
JG
970 }
971
972 fi->cache_fsr = (struct frame_saved_regs *)
973 obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs));
4ed97c9a 974 memset (fi->cache_fsr, '\0', sizeof (struct frame_saved_regs));
ecf4059f
JG
975
976 if (fi->prev && fi->prev->frame)
977 frame_addr = fi->prev->frame;
978 else
979 frame_addr = read_memory_integer (fi->frame, 4);
980
981 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
982 All fpr's from saved_fpr to fp31 are saved right underneath caller
983 stack pointer, starting from fp31 first. */
984
985 if (fdatap->saved_fpr >= 0) {
986 for (ii=31; ii >= fdatap->saved_fpr; --ii)
987 fi->cache_fsr->regs [FP0_REGNUM + ii] = frame_addr - ((32 - ii) * 8);
988 frame_addr -= (32 - fdatap->saved_fpr) * 8;
989 }
990
991 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
992 All gpr's from saved_gpr to gpr31 are saved right under saved fprs,
993 starting from r31 first. */
994
995 if (fdatap->saved_gpr >= 0)
996 for (ii=31; ii >= fdatap->saved_gpr; --ii)
997 fi->cache_fsr->regs [ii] = frame_addr - ((32 - ii) * 4);
998}
999
1000/* Return the address of a frame. This is the inital %sp value when the frame
1001 was first allocated. For functions calling alloca(), it might be saved in
1002 an alloca register. */
1003
1004CORE_ADDR
1005frame_initial_stack_address (fi)
1006 struct frame_info *fi;
1007{
1008 CORE_ADDR tmpaddr;
63641491 1009 struct rs6000_framedata fdata;
ecf4059f
JG
1010 struct frame_info *callee_fi;
1011
1012 /* if the initial stack pointer (frame address) of this frame is known,
1013 just return it. */
1014
1015 if (fi->initial_sp)
1016 return fi->initial_sp;
1017
1018 /* find out if this function is using an alloca register.. */
1019
068c9fd6 1020 (void) skip_prologue (get_pc_function_start (fi->pc), &fdata);
ecf4059f
JG
1021
1022 /* if saved registers of this frame are not known yet, read and cache them. */
1023
1024 if (!fi->cache_fsr)
1025 frame_get_cache_fsr (fi, &fdata);
1026
1027 /* If no alloca register used, then fi->frame is the value of the %sp for
1028 this frame, and it is good enough. */
1029
1030 if (fdata.alloca_reg < 0) {
1031 fi->initial_sp = fi->frame;
1032 return fi->initial_sp;
1033 }
1034
1035 /* This function has an alloca register. If this is the top-most frame
1036 (with the lowest address), the value in alloca register is good. */
1037
1038 if (!fi->next)
1039 return fi->initial_sp = read_register (fdata.alloca_reg);
1040
1041 /* Otherwise, this is a caller frame. Callee has usually already saved
1042 registers, but there are exceptions (such as when the callee
1043 has no parameters). Find the address in which caller's alloca
1044 register is saved. */
1045
1046 for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
1047
1048 if (!callee_fi->cache_fsr)
cdb1cc92 1049 frame_get_cache_fsr (callee_fi, NULL);
ecf4059f
JG
1050
1051 /* this is the address in which alloca register is saved. */
1052
1053 tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg];
1054 if (tmpaddr) {
1055 fi->initial_sp = read_memory_integer (tmpaddr, 4);
1056 return fi->initial_sp;
1057 }
1058
1059 /* Go look into deeper levels of the frame chain to see if any one of
1060 the callees has saved alloca register. */
1061 }
1062
1063 /* If alloca register was not saved, by the callee (or any of its callees)
1064 then the value in the register is still good. */
1065
1066 return fi->initial_sp = read_register (fdata.alloca_reg);
1067}
1068
669caa9c 1069CORE_ADDR
f3649227
JK
1070rs6000_frame_chain (thisframe)
1071 struct frame_info *thisframe;
1072{
669caa9c 1073 CORE_ADDR fp;
f3649227
JK
1074 if (inside_entry_file ((thisframe)->pc))
1075 return 0;
cee86be3 1076 if (thisframe->signal_handler_caller)
9ed8604f 1077 fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4);
cee86be3
JK
1078 else
1079 fp = read_memory_integer ((thisframe)->frame, 4);
1080
f3649227
JK
1081 return fp;
1082}
ecf4059f
JG
1083\f
1084/* Keep an array of load segment information and their TOC table addresses.
1085 This info will be useful when calling a shared library function by hand. */
1086
1087struct loadinfo {
1088 CORE_ADDR textorg, dataorg;
1089 unsigned long toc_offset;
1090};
1091
1092#define LOADINFOLEN 10
1093
ecf4059f
JG
1094static struct loadinfo *loadinfo = NULL;
1095static int loadinfolen = 0;
1096static int loadinfotocindex = 0;
3c02636b 1097static int loadinfotextindex = 0;
ecf4059f
JG
1098
1099
1100void
1101xcoff_init_loadinfo ()
1102{
1103 loadinfotocindex = 0;
1104 loadinfotextindex = 0;
1105
1106 if (loadinfolen == 0) {
1107 loadinfo = (struct loadinfo *)
1108 xmalloc (sizeof (struct loadinfo) * LOADINFOLEN);
1109 loadinfolen = LOADINFOLEN;
1110 }
1111}
1112
1113
1114/* FIXME -- this is never called! */
1115void
1116free_loadinfo ()
1117{
1118 if (loadinfo)
1119 free (loadinfo);
1120 loadinfo = NULL;
1121 loadinfolen = 0;
1122 loadinfotocindex = 0;
1123 loadinfotextindex = 0;
1124}
1125
1126/* this is called from xcoffread.c */
1127
1128void
07dc1e42
MM
1129xcoff_add_toc_to_loadinfo (tocoff)
1130 unsigned long tocoff;
ecf4059f
JG
1131{
1132 while (loadinfotocindex >= loadinfolen) {
1133 loadinfolen += LOADINFOLEN;
1134 loadinfo = (struct loadinfo *)
1135 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1136 }
1137 loadinfo [loadinfotocindex++].toc_offset = tocoff;
1138}
1139
2aefe6e4 1140void
ecf4059f
JG
1141add_text_to_loadinfo (textaddr, dataaddr)
1142 CORE_ADDR textaddr;
1143 CORE_ADDR dataaddr;
1144{
1145 while (loadinfotextindex >= loadinfolen) {
1146 loadinfolen += LOADINFOLEN;
1147 loadinfo = (struct loadinfo *)
1148 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1149 }
1150 loadinfo [loadinfotextindex].textorg = textaddr;
1151 loadinfo [loadinfotextindex].dataorg = dataaddr;
1152 ++loadinfotextindex;
1153}
1154
1155
a367db89 1156/* Note that this assumes that the "textorg" and "dataorg" elements
ecf4059f 1157 of a member of this array are correlated with the "toc_offset"
a367db89
JK
1158 element of the same member. This is taken care of because the loops
1159 which assign the former (in xcoff_relocate_symtab or xcoff_relocate_core)
1160 and the latter (in scan_xcoff_symtab, via vmap_symtab, in vmap_ldinfo
1161 or xcoff_relocate_core) traverse the same objfiles in the same order. */
ecf4059f
JG
1162
1163static CORE_ADDR
1164find_toc_address (pc)
1165 CORE_ADDR pc;
1166{
1167 int ii, toc_entry, tocbase = 0;
1168
1169 for (ii=0; ii < loadinfotextindex; ++ii)
1170 if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) {
1171 toc_entry = ii;
1172 tocbase = loadinfo[ii].textorg;
1173 }
1174
1175 return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset;
1176}
18b46e7c 1177
5c172b4b
MM
1178#ifdef GDB_TARGET_POWERPC
1179int
1180gdb_print_insn_powerpc (memaddr, info)
1181 bfd_vma memaddr;
1182 disassemble_info *info;
1183{
1184 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1185 return print_insn_big_powerpc (memaddr, info);
1186 else
1187 return print_insn_little_powerpc (memaddr, info);
1188}
1189#endif
1190
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1191void
1192_initialize_rs6000_tdep ()
1193{
1194 /* FIXME, this should not be decided via ifdef. */
1195#ifdef GDB_TARGET_POWERPC
5c172b4b 1196 tm_print_insn = gdb_print_insn_powerpc;
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1197#else
1198 tm_print_insn = print_insn_rs6000;
1199#endif
1200}
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