Tue Jun 23 17:32:26 1998 Michael Snyder <msnyder@cleaver.cygnus.com>
[deliverable/binutils-gdb.git] / gdb / rs6000-tdep.c
CommitLineData
41abdfbd 1/* Target-dependent code for GDB, the GNU debugger.
211b564e 2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997
07aa9fdc 3 Free Software Foundation, Inc.
41abdfbd
JG
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
6c9638b4 19Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
41abdfbd 20
41abdfbd 21#include "defs.h"
41abdfbd
JG
22#include "frame.h"
23#include "inferior.h"
24#include "symtab.h"
25#include "target.h"
030fb5cb 26#include "gdbcore.h"
65eaea27
JL
27#include "symfile.h"
28#include "objfiles.h"
2aefe6e4
JK
29#include "xcoffsolib.h"
30
d6434f39
JG
31extern struct obstack frame_cache_obstack;
32
41abdfbd 33extern int errno;
41abdfbd
JG
34
35/* Nonzero if we just simulated a single step break. */
36int one_stepped;
37
41abdfbd
JG
38/* Breakpoint shadows for the single step instructions will be kept here. */
39
40static struct sstep_breaks {
030fb5cb
JK
41 /* Address, or 0 if this is not in use. */
42 CORE_ADDR address;
43 /* Shadow contents. */
44 char data[4];
41abdfbd
JG
45} stepBreaks[2];
46
05d52ace
PS
47/* Hook for determining the TOC address when calling functions in the
48 inferior under AIX. The initialization code in rs6000-nat.c sets
49 this hook to point to find_toc_address. */
50
51CORE_ADDR (*find_toc_address_hook) PARAMS ((CORE_ADDR)) = NULL;
ecf4059f 52
05d52ace 53/* Static function prototypes */
ecf4059f 54
cd8a3d84
SS
55static CORE_ADDR branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc,
56 CORE_ADDR safety));
ecf4059f 57
cd8a3d84
SS
58static void frame_get_cache_fsr PARAMS ((struct frame_info *fi,
59 struct rs6000_framedata *fdatap));
60
368f1e77
FF
61static void pop_dummy_frame PARAMS ((void));
62
cd8a3d84 63/* Calculate the destination of a branch/jump. Return -1 if not a branch. */
41abdfbd 64
ecf4059f 65static CORE_ADDR
41abdfbd 66branch_dest (opcode, instr, pc, safety)
ecf4059f
JG
67 int opcode;
68 int instr;
69 CORE_ADDR pc;
70 CORE_ADDR safety;
41abdfbd 71{
ecf4059f 72 CORE_ADDR dest;
41abdfbd
JG
73 int immediate;
74 int absolute;
75 int ext_op;
76
77 absolute = (int) ((instr >> 1) & 1);
78
79 switch (opcode) {
80 case 18 :
ecf4059f 81 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
dc59e982
MM
82 if (absolute)
83 dest = immediate;
84 else
85 dest = pc + immediate;
86 break;
41abdfbd
JG
87
88 case 16 :
dc59e982 89 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
41abdfbd
JG
90 if (absolute)
91 dest = immediate;
92 else
93 dest = pc + immediate;
94 break;
95
96 case 19 :
97 ext_op = (instr>>1) & 0x3ff;
98
99 if (ext_op == 16) /* br conditional register */
0c6c5eeb
PS
100 {
101 dest = read_register (LR_REGNUM) & ~3;
102
103 /* If we are about to return from a signal handler, dest is
104 something like 0x3c90. The current frame is a signal handler
105 caller frame, upon completion of the sigreturn system call
106 execution will return to the saved PC in the frame. */
107 if (dest < TEXT_SEGMENT_BASE)
108 {
109 struct frame_info *fi;
110
111 fi = get_current_frame ();
112 if (fi != NULL)
113 dest = read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET,
114 4);
115 }
116 }
41abdfbd
JG
117
118 else if (ext_op == 528) /* br cond to count reg */
9aa31e91
JK
119 {
120 dest = read_register (CTR_REGNUM) & ~3;
121
122 /* If we are about to execute a system call, dest is something
123 like 0x22fc or 0x3b00. Upon completion the system call
124 will return to the address in the link register. */
125 if (dest < TEXT_SEGMENT_BASE)
126 dest = read_register (LR_REGNUM) & ~3;
127 }
41abdfbd
JG
128 else return -1;
129 break;
130
131 default: return -1;
132 }
818de002 133 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
41abdfbd
JG
134}
135
136
137
138/* AIX does not support PT_STEP. Simulate it. */
139
997cc2c0 140void
41abdfbd 141single_step (signal)
b607efe7 142 enum target_signal signal;
41abdfbd
JG
143{
144#define INSNLEN(OPCODE) 4
145
5c172b4b
MM
146 static char le_breakp[] = LITTLE_BREAKPOINT;
147 static char be_breakp[] = BIG_BREAKPOINT;
148 char *breakp = TARGET_BYTE_ORDER == BIG_ENDIAN ? be_breakp : le_breakp;
030fb5cb
JK
149 int ii, insn;
150 CORE_ADDR loc;
151 CORE_ADDR breaks[2];
152 int opcode;
41abdfbd
JG
153
154 if (!one_stepped) {
41abdfbd
JG
155 loc = read_pc ();
156
b112f2ae 157 insn = read_memory_integer (loc, 4);
41abdfbd
JG
158
159 breaks[0] = loc + INSNLEN(insn);
160 opcode = insn >> 26;
161 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
162
818de002
PB
163 /* Don't put two breakpoints on the same address. */
164 if (breaks[1] == breaks[0])
165 breaks[1] = -1;
166
030fb5cb 167 stepBreaks[1].address = 0;
41abdfbd
JG
168
169 for (ii=0; ii < 2; ++ii) {
170
171 /* ignore invalid breakpoint. */
172 if ( breaks[ii] == -1)
173 continue;
174
030fb5cb 175 read_memory (breaks[ii], stepBreaks[ii].data, 4);
41abdfbd 176
030fb5cb 177 write_memory (breaks[ii], breakp, 4);
41abdfbd
JG
178 stepBreaks[ii].address = breaks[ii];
179 }
180
181 one_stepped = 1;
997cc2c0 182 } else {
41abdfbd
JG
183
184 /* remove step breakpoints. */
185 for (ii=0; ii < 2; ++ii)
030fb5cb 186 if (stepBreaks[ii].address != 0)
41abdfbd 187 write_memory
030fb5cb 188 (stepBreaks[ii].address, stepBreaks[ii].data, 4);
41abdfbd
JG
189
190 one_stepped = 0;
191 }
997cc2c0 192 errno = 0; /* FIXME, don't ignore errors! */
030fb5cb 193 /* What errors? {read,write}_memory call error(). */
41abdfbd 194}
41abdfbd
JG
195
196
068c9fd6
MM
197/* return pc value after skipping a function prologue and also return
198 information about a function frame.
41abdfbd 199
068c9fd6
MM
200 in struct rs6000_frameinfo fdata:
201 - frameless is TRUE, if function does not have a frame.
202 - nosavedpc is TRUE, if function does not save %pc value in its frame.
203 - offset is the number of bytes used in the frame to save registers.
204 - saved_gpr is the number of the first saved gpr.
205 - saved_fpr is the number of the first saved fpr.
206 - alloca_reg is the number of the register used for alloca() handling.
207 Otherwise -1.
208 - gpr_offset is the offset of the saved gprs
209 - fpr_offset is the offset of the saved fprs
210 - lr_offset is the offset of the saved lr
211 - cr_offset is the offset of the saved cr
212 */
213
214#define SIGNED_SHORT(x) \
215 ((sizeof (short) == 2) \
216 ? ((int)(short)(x)) \
217 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
218
219#define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
220
221CORE_ADDR
222skip_prologue (pc, fdata)
223 CORE_ADDR pc;
224 struct rs6000_framedata *fdata;
41abdfbd 225{
068c9fd6 226 CORE_ADDR orig_pc = pc;
34df79fc 227 char buf[4];
34df79fc 228 unsigned long op;
4b4c6c96 229 long offset = 0;
068c9fd6
MM
230 int lr_reg = 0;
231 int cr_reg = 0;
232 int reg;
4b4c6c96 233 int framep = 0;
65eaea27 234 int minimal_toc_loaded = 0;
068c9fd6
MM
235 static struct rs6000_framedata zero_frame;
236
237 *fdata = zero_frame;
238 fdata->saved_gpr = -1;
239 fdata->saved_fpr = -1;
240 fdata->alloca_reg = -1;
241 fdata->frameless = 1;
242 fdata->nosavedpc = 1;
41abdfbd 243
34df79fc 244 if (target_read_memory (pc, buf, 4))
41abdfbd 245 return pc; /* Can't access it -- assume no prologue. */
41abdfbd
JG
246
247 /* Assume that subsequent fetches can fail with low probability. */
068c9fd6
MM
248 pc -= 4;
249 for (;;)
250 {
251 pc += 4;
252 op = read_memory_integer (pc, 4);
41abdfbd 253
068c9fd6
MM
254 if ((op & 0xfc1fffff) == 0x7c0802a6) { /* mflr Rx */
255 lr_reg = (op & 0x03e00000) | 0x90010000;
256 continue;
257
258 } else if ((op & 0xfc1fffff) == 0x7c000026) { /* mfcr Rx */
259 cr_reg = (op & 0x03e00000) | 0x90010000;
260 continue;
261
262 } else if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
263 reg = GET_SRC_REG (op);
264 if (fdata->saved_fpr == -1 || fdata->saved_fpr > reg) {
265 fdata->saved_fpr = reg;
4b4c6c96 266 fdata->fpr_offset = SIGNED_SHORT (op) + offset;
068c9fd6
MM
267 }
268 continue;
269
270 } else if (((op & 0xfc1f0000) == 0xbc010000) || /* stm Rx, NUM(r1) */
75621b2b
MS
271 ((op & 0xfc1f0000) == 0x90010000 && /* st rx,NUM(r1),
272 rx >= r13 */
068c9fd6
MM
273 (op & 0x03e00000) >= 0x01a00000)) {
274
275 reg = GET_SRC_REG (op);
276 if (fdata->saved_gpr == -1 || fdata->saved_gpr > reg) {
277 fdata->saved_gpr = reg;
4b4c6c96 278 fdata->gpr_offset = SIGNED_SHORT (op) + offset;
068c9fd6
MM
279 }
280 continue;
281
75621b2b
MS
282 } else if ((op & 0xffff0000) == 0x3c000000) { /* addis 0,0,NUM, used
283 for >= 32k frames */
068c9fd6 284 fdata->offset = (op & 0x0000ffff) << 16;
65eaea27 285 fdata->frameless = 0;
068c9fd6
MM
286 continue;
287
75621b2b
MS
288 } else if ((op & 0xffff0000) == 0x60000000) { /* ori 0,0,NUM, 2nd ha
289 lf of >= 32k frames */
068c9fd6 290 fdata->offset |= (op & 0x0000ffff);
65eaea27 291 fdata->frameless = 0;
068c9fd6
MM
292 continue;
293
75621b2b
MS
294 } else if ((op & 0xffff0000) == lr_reg) { /* st Rx,NUM(r1)
295 where Rx == lr */
4b4c6c96 296 fdata->lr_offset = SIGNED_SHORT (op) + offset;
068c9fd6
MM
297 fdata->nosavedpc = 0;
298 lr_reg = 0;
299 continue;
300
75621b2b
MS
301 } else if ((op & 0xffff0000) == cr_reg) { /* st Rx,NUM(r1)
302 where Rx == cr */
4b4c6c96 303 fdata->cr_offset = SIGNED_SHORT (op) + offset;
068c9fd6
MM
304 cr_reg = 0;
305 continue;
306
75621b2b
MS
307 } else if (op == 0x48000005) { /* bl .+4 used in
308 -mrelocatable */
4b4c6c96
MM
309 continue;
310
65eaea27
JL
311 } else if (op == 0x48000004) { /* b .+4 (xlc) */
312 break;
313
75621b2b
MS
314 } else if (((op & 0xffff0000) == 0x801e0000 || /* lwz 0,NUM(r30), used
315 in V.4 -mrelocatable */
316 op == 0x7fc0f214) && /* add r30,r0,r30, used
317 in V.4 -mrelocatable */
4b4c6c96
MM
318 lr_reg == 0x901e0000) {
319 continue;
320
75621b2b
MS
321 } else if ((op & 0xffff0000) == 0x3fc00000 || /* addis 30,0,foo@ha, used
322 in V.4 -mminimal-toc */
4b4c6c96
MM
323 (op & 0xffff0000) == 0x3bde0000) { /* addi 30,30,foo@l */
324 continue;
325
75621b2b
MS
326 } else if ((op & 0xfc000000) == 0x48000000) { /* bl foo,
327 to save fprs??? */
965dde97 328
65eaea27 329 fdata->frameless = 0;
965dde97
PS
330 /* Don't skip over the subroutine call if it is not within the first
331 three instructions of the prologue. */
332 if ((pc - orig_pc) > 8)
333 break;
334
068c9fd6
MM
335 op = read_memory_integer (pc+4, 4);
336
337 /* At this point, make sure this is not a trampoline function
338 (a function that simply calls another functions, and nothing else).
339 If the next is not a nop, this branch was part of the function
340 prologue. */
341
342 if (op == 0x4def7b82 || op == 0) /* crorc 15, 15, 15 */
75621b2b
MS
343 break; /* don't skip over
344 this branch */
068c9fd6
MM
345 continue;
346
4b4c6c96 347 /* update stack pointer */
068c9fd6 348 } else if ((op & 0xffff0000) == 0x94210000) { /* stu r1,NUM(r1) */
65eaea27 349 fdata->frameless = 0;
4b4c6c96
MM
350 fdata->offset = SIGNED_SHORT (op);
351 offset = fdata->offset;
352 continue;
1eeba686 353
068c9fd6 354 } else if (op == 0x7c21016e) { /* stwux 1,1,0 */
65eaea27 355 fdata->frameless = 0;
4b4c6c96
MM
356 offset = fdata->offset;
357 continue;
41abdfbd 358
4b4c6c96 359 /* Load up minimal toc pointer */
65eaea27
JL
360 } else if ((op >> 22) == 0x20f
361 && ! minimal_toc_loaded) { /* l r31,... or l r30,... */
362 minimal_toc_loaded = 1;
4b4c6c96 363 continue;
cdb1cc92 364
4b4c6c96
MM
365 /* store parameters in stack */
366 } else if ((op & 0xfc1f0000) == 0x90010000 || /* st rx,NUM(r1) */
367 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
368 (op & 0xfc1f0000) == 0xfc010000) { /* frsp, fp?,NUM(r1) */
369 continue;
e137e850 370
4b4c6c96
MM
371 /* store parameters in stack via frame pointer */
372 } else if (framep &&
58b4fad2 373 ((op & 0xfc1f0000) == 0x901f0000 || /* st rx,NUM(r1) */
4b4c6c96 374 (op & 0xfc1f0000) == 0xd81f0000 || /* stfd Rx,NUM(r1) */
58b4fad2 375 (op & 0xfc1f0000) == 0xfc1f0000)) { /* frsp, fp?,NUM(r1) */
4b4c6c96 376 continue;
e137e850 377
4b4c6c96
MM
378 /* Set up frame pointer */
379 } else if (op == 0x603f0000 /* oril r31, r1, 0x0 */
380 || op == 0x7c3f0b78) { /* mr r31, r1 */
65eaea27 381 fdata->frameless = 0;
4b4c6c96 382 framep = 1;
965dde97 383 fdata->alloca_reg = 31;
4b4c6c96 384 continue;
41abdfbd 385
65eaea27
JL
386 /* Another way to set up the frame pointer. */
387 } else if ((op & 0xfc1fffff) == 0x38010000) { /* addi rX, r1, 0x0 */
388 fdata->frameless = 0;
389 framep = 1;
390 fdata->alloca_reg = (op & ~0x38010000) >> 21;
391 continue;
392
4b4c6c96
MM
393 } else {
394 break;
395 }
41abdfbd 396 }
068c9fd6 397
507e4004
PB
398#if 0
399/* I have problems with skipping over __main() that I need to address
400 * sometime. Previously, I used to use misc_function_vector which
401 * didn't work as well as I wanted to be. -MGO */
402
403 /* If the first thing after skipping a prolog is a branch to a function,
404 this might be a call to an initializer in main(), introduced by gcc2.
405 We'd like to skip over it as well. Fortunately, xlc does some extra
406 work before calling a function right after a prologue, thus we can
407 single out such gcc2 behaviour. */
408
409
410 if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */
411 op = read_memory_integer (pc+4, 4);
412
413 if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */
414
415 /* check and see if we are in main. If so, skip over this initializer
416 function as well. */
417
418 tmp = find_pc_misc_function (pc);
2e4964ad 419 if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main"))
507e4004
PB
420 return pc + 8;
421 }
422 }
423#endif /* 0 */
424
4b4c6c96 425 fdata->offset = - fdata->offset;
41abdfbd
JG
426 return pc;
427}
428
818de002 429
41abdfbd
JG
430/*************************************************************************
431 Support for creating pushind a dummy frame into the stack, and popping
432 frames, etc.
433*************************************************************************/
434
818de002
PB
435/* The total size of dummy frame is 436, which is;
436
437 32 gpr's - 128 bytes
438 32 fpr's - 256 "
439 7 the rest - 28 "
440 and 24 extra bytes for the callee's link area. The last 24 bytes
441 for the link area might not be necessary, since it will be taken
442 care of by push_arguments(). */
443
444#define DUMMY_FRAME_SIZE 436
445
41abdfbd
JG
446#define DUMMY_FRAME_ADDR_SIZE 10
447
448/* Make sure you initialize these in somewhere, in case gdb gives up what it
818de002 449 was debugging and starts debugging something else. FIXMEibm */
41abdfbd
JG
450
451static int dummy_frame_count = 0;
452static int dummy_frame_size = 0;
453static CORE_ADDR *dummy_frame_addr = 0;
454
455extern int stop_stack_dummy;
456
457/* push a dummy frame into stack, save all register. Currently we are saving
458 only gpr's and fpr's, which is not good enough! FIXMEmgo */
459
ecf4059f 460void
41abdfbd
JG
461push_dummy_frame ()
462{
359a097f
JK
463 /* stack pointer. */
464 CORE_ADDR sp;
b112f2ae
JK
465 /* Same thing, target byte order. */
466 char sp_targ[4];
359a097f
JK
467
468 /* link register. */
469 CORE_ADDR pc;
470 /* Same thing, target byte order. */
471 char pc_targ[4];
472
3a4f9786
MT
473 /* Needed to figure out where to save the dummy link area.
474 FIXME: There should be an easier way to do this, no? tiemann 9/9/95. */
475 struct rs6000_framedata fdata;
476
41abdfbd
JG
477 int ii;
478
5f1c39ef 479 target_fetch_registers (-1);
6c6afbb9 480
41abdfbd
JG
481 if (dummy_frame_count >= dummy_frame_size) {
482 dummy_frame_size += DUMMY_FRAME_ADDR_SIZE;
483 if (dummy_frame_addr)
484 dummy_frame_addr = (CORE_ADDR*) xrealloc
485 (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size));
486 else
487 dummy_frame_addr = (CORE_ADDR*)
488 xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size));
489 }
490
491 sp = read_register(SP_REGNUM);
359a097f 492 pc = read_register(PC_REGNUM);
5816555b 493 store_address (pc_targ, 4, pc);
41abdfbd 494
75621b2b 495 skip_prologue (get_pc_function_start (pc) + FUNCTION_START_OFFSET, &fdata);
3a4f9786 496
41abdfbd
JG
497 dummy_frame_addr [dummy_frame_count++] = sp;
498
499 /* Be careful! If the stack pointer is not decremented first, then kernel
6c6afbb9 500 thinks he is free to use the space underneath it. And kernel actually
41abdfbd
JG
501 uses that area for IPC purposes when executing ptrace(2) calls. So
502 before writing register values into the new frame, decrement and update
503 %sp first in order to secure your frame. */
504
3a4f9786
MT
505 /* FIXME: We don't check if the stack really has this much space.
506 This is a problem on the ppc simulator (which only grants one page
507 (4096 bytes) by default. */
508
818de002 509 write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE);
41abdfbd 510
41abdfbd
JG
511 /* gdb relies on the state of current_frame. We'd better update it,
512 otherwise things like do_registers_info() wouldn't work properly! */
513
514 flush_cached_frames ();
41abdfbd
JG
515
516 /* save program counter in link register's space. */
4f8710e6
PS
517 write_memory (sp + (fdata.lr_offset ? fdata.lr_offset : DEFAULT_LR_SAVE),
518 pc_targ, 4);
41abdfbd 519
6c6afbb9 520 /* save all floating point and general purpose registers here. */
41abdfbd
JG
521
522 /* fpr's, f0..f31 */
523 for (ii = 0; ii < 32; ++ii)
524 write_memory (sp-8-(ii*8), &registers[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8);
525
526 /* gpr's r0..r31 */
527 for (ii=1; ii <=32; ++ii)
528 write_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
529
818de002
PB
530 /* so far, 32*2 + 32 words = 384 bytes have been written.
531 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */
532
533 for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) {
534 write_memory (sp-384-(ii*4),
75621b2b 535 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
818de002
PB
536 }
537
538 /* Save sp or so called back chain right here. */
b112f2ae
JK
539 store_address (sp_targ, 4, sp);
540 write_memory (sp-DUMMY_FRAME_SIZE, sp_targ, 4);
818de002 541 sp -= DUMMY_FRAME_SIZE;
41abdfbd
JG
542
543 /* And finally, this is the back chain. */
359a097f 544 write_memory (sp+8, pc_targ, 4);
41abdfbd
JG
545}
546
547
548/* Pop a dummy frame.
549
550 In rs6000 when we push a dummy frame, we save all of the registers. This
551 is usually done before user calls a function explicitly.
552
818de002
PB
553 After a dummy frame is pushed, some instructions are copied into stack,
554 and stack pointer is decremented even more. Since we don't have a frame
555 pointer to get back to the parent frame of the dummy, we start having
556 trouble poping it. Therefore, we keep a dummy frame stack, keeping
557 addresses of dummy frames as such. When poping happens and when we
558 detect that was a dummy frame, we pop it back to its parent by using
559 dummy frame stack (`dummy_frame_addr' array).
ecf4059f
JG
560
561FIXME: This whole concept is broken. You should be able to detect
562a dummy stack frame *on the user's stack itself*. When you do,
563then you know the format of that stack frame -- including its
564saved SP register! There should *not* be a separate stack in the
d6434f39 565GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92
41abdfbd
JG
566 */
567
368f1e77 568static void
41abdfbd
JG
569pop_dummy_frame ()
570{
571 CORE_ADDR sp, pc;
572 int ii;
573 sp = dummy_frame_addr [--dummy_frame_count];
574
575 /* restore all fpr's. */
576 for (ii = 1; ii <= 32; ++ii)
577 read_memory (sp-(ii*8), &registers[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8);
578
579 /* restore all gpr's */
580 for (ii=1; ii <= 32; ++ii) {
581 read_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
582 }
583
818de002
PB
584 /* restore the rest of the registers. */
585 for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii)
586 read_memory (sp-384-(ii*4),
587 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
588
589 read_memory (sp-(DUMMY_FRAME_SIZE-8),
3a4f9786 590 &registers [REGISTER_BYTE(PC_REGNUM)], 4);
41abdfbd
JG
591
592 /* when a dummy frame was being pushed, we had to decrement %sp first, in
593 order to secure astack space. Thus, saved %sp (or %r1) value, is not the
594 one we should restore. Change it with the one we need. */
595
75621b2b 596 memcpy (&registers [REGISTER_BYTE(FP_REGNUM)], (char *) &sp, sizeof (int));
41abdfbd
JG
597
598 /* Now we can restore all registers. */
599
5f1c39ef 600 target_store_registers (-1);
41abdfbd
JG
601 pc = read_pc ();
602 flush_cached_frames ();
41abdfbd
JG
603}
604
605
606/* pop the innermost frame, go back to the caller. */
607
ecf4059f 608void
41abdfbd
JG
609pop_frame ()
610{
359a097f 611 CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */
63641491 612 struct rs6000_framedata fdata;
669caa9c 613 struct frame_info *frame = get_current_frame ();
41abdfbd 614 int addr, ii;
41abdfbd
JG
615
616 pc = read_pc ();
669caa9c 617 sp = FRAME_FP (frame);
41abdfbd
JG
618
619 if (stop_stack_dummy && dummy_frame_count) {
620 pop_dummy_frame ();
621 return;
622 }
623
07aa9fdc
PS
624 /* Make sure that all registers are valid. */
625 read_register_bytes (0, NULL, REGISTER_BYTES);
626
41abdfbd
JG
627 /* figure out previous %pc value. If the function is frameless, it is
628 still in the link register, otherwise walk the frames and retrieve the
629 saved %pc value in the previous frame. */
630
34a1a3bf 631 addr = get_pc_function_start (frame->pc) + FUNCTION_START_OFFSET;
068c9fd6 632 (void) skip_prologue (addr, &fdata);
41abdfbd 633
6c6afbb9 634 if (fdata.frameless)
07aa9fdc
PS
635 prev_sp = sp;
636 else
637 prev_sp = read_memory_integer (sp, 4);
068c9fd6 638 if (fdata.lr_offset == 0)
41abdfbd
JG
639 lr = read_register (LR_REGNUM);
640 else
068c9fd6 641 lr = read_memory_integer (prev_sp + fdata.lr_offset, 4);
41abdfbd
JG
642
643 /* reset %pc value. */
644 write_register (PC_REGNUM, lr);
645
646 /* reset register values if any was saved earlier. */
6c6afbb9 647 addr = prev_sp - fdata.offset;
41abdfbd 648
6c6afbb9 649 if (fdata.saved_gpr != -1)
669caa9c 650 for (ii = fdata.saved_gpr; ii <= 31; ++ii) {
41abdfbd 651 read_memory (addr, &registers [REGISTER_BYTE (ii)], 4);
cdb1cc92 652 addr += 4;
41abdfbd
JG
653 }
654
6c6afbb9 655 if (fdata.saved_fpr != -1)
669caa9c 656 for (ii = fdata.saved_fpr; ii <= 31; ++ii) {
41abdfbd
JG
657 read_memory (addr, &registers [REGISTER_BYTE (ii+FP0_REGNUM)], 8);
658 addr += 8;
659 }
660
661 write_register (SP_REGNUM, prev_sp);
5f1c39ef 662 target_store_registers (-1);
41abdfbd 663 flush_cached_frames ();
41abdfbd
JG
664}
665
41abdfbd
JG
666/* fixup the call sequence of a dummy function, with the real function address.
667 its argumets will be passed by gdb. */
668
ecf4059f 669void
2f163bc3 670rs6000_fix_call_dummy (dummyname, pc, fun, nargs, args, type, gcc_p)
cd8a3d84
SS
671 char *dummyname;
672 CORE_ADDR pc;
673 CORE_ADDR fun;
2f163bc3
SS
674 int nargs;
675 value_ptr *args;
676 struct type *type;
677 int gcc_p;
41abdfbd
JG
678{
679#define TOC_ADDR_OFFSET 20
680#define TARGET_ADDR_OFFSET 28
681
682 int ii;
ecf4059f 683 CORE_ADDR target_addr;
41abdfbd 684
05d52ace
PS
685 if (find_toc_address_hook != NULL)
686 {
687 CORE_ADDR tocvalue;
41abdfbd 688
05d52ace
PS
689 tocvalue = (*find_toc_address_hook) (fun);
690 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET);
691 ii = (ii & 0xffff0000) | (tocvalue >> 16);
692 *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii;
41abdfbd 693
05d52ace
PS
694 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4);
695 ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff);
696 *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii;
697 }
41abdfbd 698
05d52ace 699 target_addr = fun;
41abdfbd
JG
700 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET);
701 ii = (ii & 0xffff0000) | (target_addr >> 16);
702 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii;
703
704 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4);
705 ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff);
706 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii;
707}
708
cd8a3d84
SS
709/* Pass the arguments in either registers, or in the stack. In RS6000,
710 the first eight words of the argument list (that might be less than
711 eight parameters if some parameters occupy more than one word) are
712 passed in r3..r11 registers. float and double parameters are
713 passed in fpr's, in addition to that. Rest of the parameters if any
714 are passed in user stack. There might be cases in which half of the
715 parameter is copied into registers, the other half is pushed into
41abdfbd
JG
716 stack.
717
718 If the function is returning a structure, then the return address is passed
94b4f756 719 in r3, then the first 7 words of the parameters can be passed in registers,
41abdfbd
JG
720 starting from r4. */
721
722CORE_ADDR
723push_arguments (nargs, args, sp, struct_return, struct_addr)
cd8a3d84
SS
724 int nargs;
725 value_ptr *args;
726 CORE_ADDR sp;
727 int struct_return;
728 CORE_ADDR struct_addr;
41abdfbd 729{
368f1e77
FF
730 int ii;
731 int len = 0;
41abdfbd
JG
732 int argno; /* current argument number */
733 int argbytes; /* current argument byte */
734 char tmp_buffer [50];
41abdfbd 735 int f_argno = 0; /* current floating point argno */
368f1e77 736 value_ptr arg = 0;
940d5967 737 struct type *type;
41abdfbd 738
368f1e77 739 CORE_ADDR saved_sp;
41abdfbd
JG
740
741 if ( dummy_frame_count <= 0)
199b2450 742 printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n");
41abdfbd
JG
743
744 /* The first eight words of ther arguments are passed in registers. Copy
745 them appropriately.
746
747 If the function is returning a `struct', then the first word (which
748 will be passed in r3) is used for struct return address. In that
749 case we should advance one word and start from r4 register to copy
750 parameters. */
751
752 ii = struct_return ? 1 : 0;
753
754 for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) {
755
5222ca60 756 arg = args[argno];
59c84318 757 type = check_typedef (VALUE_TYPE (arg));
940d5967 758 len = TYPE_LENGTH (type);
41abdfbd 759
940d5967 760 if (TYPE_CODE (type) == TYPE_CODE_FLT) {
41abdfbd
JG
761
762 /* floating point arguments are passed in fpr's, as well as gpr's.
763 There are 13 fpr's reserved for passing parameters. At this point
764 there is no way we would run out of them. */
765
766 if (len > 8)
199b2450 767 printf_unfiltered (
41abdfbd
JG
768"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
769
75621b2b
MS
770 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)],
771 VALUE_CONTENTS (arg),
772 len);
41abdfbd
JG
773 ++f_argno;
774 }
775
776 if (len > 4) {
777
778 /* Argument takes more than one register. */
779 while (argbytes < len) {
75621b2b 780 memset (&registers[REGISTER_BYTE(ii+3)], 0, sizeof(int));
ade40d31 781 memcpy (&registers[REGISTER_BYTE(ii+3)],
75621b2b
MS
782 ((char*)VALUE_CONTENTS (arg))+argbytes,
783 (len - argbytes) > 4 ? 4 : len - argbytes);
41abdfbd
JG
784 ++ii, argbytes += 4;
785
786 if (ii >= 8)
787 goto ran_out_of_registers_for_arguments;
788 }
789 argbytes = 0;
790 --ii;
791 }
792 else { /* Argument can fit in one register. No problem. */
75621b2b 793 memset (&registers[REGISTER_BYTE(ii+3)], 0, sizeof(int));
ade40d31 794 memcpy (&registers[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len);
41abdfbd
JG
795 }
796 ++argno;
797 }
798
799ran_out_of_registers_for_arguments:
800
801 /* location for 8 parameters are always reserved. */
802 sp -= 4 * 8;
803
804 /* another six words for back chain, TOC register, link register, etc. */
805 sp -= 24;
806
807 /* if there are more arguments, allocate space for them in
808 the stack, then push them starting from the ninth one. */
809
810 if ((argno < nargs) || argbytes) {
811 int space = 0, jj;
41abdfbd
JG
812
813 if (argbytes) {
814 space += ((len - argbytes + 3) & -4);
815 jj = argno + 1;
816 }
817 else
818 jj = argno;
819
820 for (; jj < nargs; ++jj) {
940d5967 821 value_ptr val = args[jj];
41abdfbd
JG
822 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
823 }
824
825 /* add location required for the rest of the parameters */
826 space = (space + 7) & -8;
827 sp -= space;
828
829 /* This is another instance we need to be concerned about securing our
830 stack space. If we write anything underneath %sp (r1), we might conflict
831 with the kernel who thinks he is free to use this area. So, update %sp
832 first before doing anything else. */
833
834 write_register (SP_REGNUM, sp);
835
41abdfbd
JG
836 /* if the last argument copied into the registers didn't fit there
837 completely, push the rest of it into stack. */
838
839 if (argbytes) {
75621b2b
MS
840 write_memory (sp+24+(ii*4),
841 ((char*)VALUE_CONTENTS (arg))+argbytes,
842 len - argbytes);
41abdfbd
JG
843 ++argno;
844 ii += ((len - argbytes + 3) & -4) / 4;
845 }
846
847 /* push the rest of the arguments into stack. */
848 for (; argno < nargs; ++argno) {
849
5222ca60 850 arg = args[argno];
940d5967
PB
851 type = check_typedef (VALUE_TYPE (arg));
852 len = TYPE_LENGTH (type);
41abdfbd
JG
853
854
855 /* float types should be passed in fpr's, as well as in the stack. */
940d5967 856 if (TYPE_CODE (type) == TYPE_CODE_FLT && f_argno < 13) {
41abdfbd
JG
857
858 if (len > 8)
199b2450 859 printf_unfiltered (
41abdfbd
JG
860"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
861
75621b2b
MS
862 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)],
863 VALUE_CONTENTS (arg),
864 len);
41abdfbd
JG
865 ++f_argno;
866 }
867
359a097f 868 write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len);
41abdfbd
JG
869 ii += ((len + 3) & -4) / 4;
870 }
871 }
6c6afbb9 872 else
41abdfbd
JG
873 /* Secure stack areas first, before doing anything else. */
874 write_register (SP_REGNUM, sp);
875
41abdfbd
JG
876 saved_sp = dummy_frame_addr [dummy_frame_count - 1];
877 read_memory (saved_sp, tmp_buffer, 24);
878 write_memory (sp, tmp_buffer, 24);
879
b112f2ae
JK
880 /* set back chain properly */
881 store_address (tmp_buffer, 4, saved_sp);
882 write_memory (sp, tmp_buffer, 4);
41abdfbd 883
5f1c39ef 884 target_store_registers (-1);
41abdfbd
JG
885 return sp;
886}
887
888/* a given return value in `regbuf' with a type `valtype', extract and copy its
889 value into `valbuf' */
890
ecf4059f 891void
41abdfbd 892extract_return_value (valtype, regbuf, valbuf)
cd8a3d84
SS
893 struct type *valtype;
894 char regbuf[REGISTER_BYTES];
895 char *valbuf;
41abdfbd 896{
07781ac0 897 int offset = 0;
41abdfbd
JG
898
899 if (TYPE_CODE (valtype) == TYPE_CODE_FLT) {
900
901 double dd; float ff;
902 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
903 We need to truncate the return value into float size (4 byte) if
904 necessary. */
905
906 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
75621b2b
MS
907 memcpy (valbuf,
908 &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)],
909 TYPE_LENGTH (valtype));
41abdfbd 910 else { /* float */
ade40d31 911 memcpy (&dd, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
41abdfbd 912 ff = (float)dd;
ade40d31 913 memcpy (valbuf, &ff, sizeof(float));
41abdfbd
JG
914 }
915 }
07781ac0 916 else {
41abdfbd 917 /* return value is copied starting from r3. */
07781ac0
PS
918 if (TARGET_BYTE_ORDER == BIG_ENDIAN
919 && TYPE_LENGTH (valtype) < REGISTER_RAW_SIZE (3))
920 offset = REGISTER_RAW_SIZE (3) - TYPE_LENGTH (valtype);
921
75621b2b
MS
922 memcpy (valbuf,
923 regbuf + REGISTER_BYTE (3) + offset,
07781ac0
PS
924 TYPE_LENGTH (valtype));
925 }
41abdfbd
JG
926}
927
928
ecf4059f
JG
929/* keep structure return address in this variable.
930 FIXME: This is a horrid kludge which should not be allowed to continue
931 living. This only allows a single nested call to a structure-returning
932 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
41abdfbd
JG
933
934CORE_ADDR rs6000_struct_return_address;
935
936
c2e4669f
JG
937/* Indirect function calls use a piece of trampoline code to do context
938 switching, i.e. to set the new TOC table. Skip such code if we are on
939 its first instruction (as when we have single-stepped to here).
07aa9fdc
PS
940 Also skip shared library trampoline code (which is different from
941 indirect function call trampolines).
c2e4669f
JG
942 Result is desired PC to step until, or NULL if we are not in
943 trampoline code. */
41abdfbd 944
ecf4059f 945CORE_ADDR
41abdfbd 946skip_trampoline_code (pc)
cd8a3d84 947 CORE_ADDR pc;
41abdfbd
JG
948{
949 register unsigned int ii, op;
07aa9fdc 950 CORE_ADDR solib_target_pc;
41abdfbd
JG
951
952 static unsigned trampoline_code[] = {
953 0x800b0000, /* l r0,0x0(r11) */
954 0x90410014, /* st r2,0x14(r1) */
955 0x7c0903a6, /* mtctr r0 */
956 0x804b0004, /* l r2,0x4(r11) */
957 0x816b0008, /* l r11,0x8(r11) */
958 0x4e800420, /* bctr */
959 0x4e800020, /* br */
960 0
961 };
962
07aa9fdc
PS
963 /* If pc is in a shared library trampoline, return its target. */
964 solib_target_pc = find_solib_trampoline_target (pc);
965 if (solib_target_pc)
966 return solib_target_pc;
967
41abdfbd
JG
968 for (ii=0; trampoline_code[ii]; ++ii) {
969 op = read_memory_integer (pc + (ii*4), 4);
970 if (op != trampoline_code [ii])
359a097f 971 return 0;
41abdfbd
JG
972 }
973 ii = read_register (11); /* r11 holds destination addr */
974 pc = read_memory_integer (ii, 4); /* (r11) value */
975 return pc;
976}
977
068c9fd6 978/* Determines whether the function FI has a frame on the stack or not. */
cd8a3d84 979
ecf4059f 980int
068c9fd6
MM
981frameless_function_invocation (fi)
982 struct frame_info *fi;
ecf4059f
JG
983{
984 CORE_ADDR func_start;
63641491 985 struct rs6000_framedata fdata;
ecf4059f 986
4cc56716
PS
987 /* Don't even think about framelessness except on the innermost frame
988 or if the function was interrupted by a signal. */
989 if (fi->next != NULL && !fi->next->signal_handler_caller)
b0e932ad
JK
990 return 0;
991
4cc56716 992 func_start = get_pc_function_start (fi->pc);
ecf4059f
JG
993
994 /* If we failed to find the start of the function, it is a mistake
995 to inspect the instructions. */
996
997 if (!func_start)
4cc56716
PS
998 {
999 /* A frame with a zero PC is usually created by dereferencing a NULL
1000 function pointer, normally causing an immediate core dump of the
1001 inferior. Mark function as frameless, as the inferior has no chance
1002 of setting up a stack frame. */
1003 if (fi->pc == 0)
1004 return 1;
1005 else
1006 return 0;
1007 }
ecf4059f 1008
4cc56716 1009 func_start += FUNCTION_START_OFFSET;
068c9fd6
MM
1010 (void) skip_prologue (func_start, &fdata);
1011 return fdata.frameless;
ecf4059f
JG
1012}
1013
068c9fd6 1014/* Return the PC saved in a frame */
cd8a3d84 1015
068c9fd6
MM
1016unsigned long
1017frame_saved_pc (fi)
1018 struct frame_info *fi;
1019{
1020 CORE_ADDR func_start;
1021 struct rs6000_framedata fdata;
068c9fd6 1022
965dde97
PS
1023 if (fi->signal_handler_caller)
1024 return read_memory_integer (fi->frame + SIG_FRAME_PC_OFFSET, 4);
1025
068c9fd6
MM
1026 func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
1027
1028 /* If we failed to find the start of the function, it is a mistake
1029 to inspect the instructions. */
1030 if (!func_start)
1031 return 0;
1032
1033 (void) skip_prologue (func_start, &fdata);
068c9fd6 1034
4b4c6c96 1035 if (fdata.lr_offset == 0 && fi->next != NULL)
4cc56716
PS
1036 {
1037 if (fi->next->signal_handler_caller)
1038 return read_memory_integer (fi->next->frame + SIG_FRAME_LR_OFFSET, 4);
1039 else
1040 return read_memory_integer (rs6000_frame_chain (fi) + DEFAULT_LR_SAVE,
1041 4);
1042 }
4b4c6c96
MM
1043
1044 if (fdata.lr_offset == 0)
1045 return read_register (LR_REGNUM);
1046
068c9fd6
MM
1047 return read_memory_integer (rs6000_frame_chain (fi) + fdata.lr_offset, 4);
1048}
ecf4059f
JG
1049
1050/* If saved registers of frame FI are not known yet, read and cache them.
63641491 1051 &FDATAP contains rs6000_framedata; TDATAP can be NULL,
ecf4059f
JG
1052 in which case the framedata are read. */
1053
1054static void
1055frame_get_cache_fsr (fi, fdatap)
1056 struct frame_info *fi;
63641491 1057 struct rs6000_framedata *fdatap;
ecf4059f
JG
1058{
1059 int ii;
1060 CORE_ADDR frame_addr;
63641491 1061 struct rs6000_framedata work_fdata;
ecf4059f
JG
1062
1063 if (fi->cache_fsr)
1064 return;
1065
1066 if (fdatap == NULL) {
1067 fdatap = &work_fdata;
068c9fd6 1068 (void) skip_prologue (get_pc_function_start (fi->pc), fdatap);
ecf4059f
JG
1069 }
1070
1071 fi->cache_fsr = (struct frame_saved_regs *)
1072 obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs));
4ed97c9a 1073 memset (fi->cache_fsr, '\0', sizeof (struct frame_saved_regs));
ecf4059f
JG
1074
1075 if (fi->prev && fi->prev->frame)
1076 frame_addr = fi->prev->frame;
1077 else
1078 frame_addr = read_memory_integer (fi->frame, 4);
1079
1080 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
965dde97 1081 All fpr's from saved_fpr to fp31 are saved. */
ecf4059f
JG
1082
1083 if (fdatap->saved_fpr >= 0) {
965dde97
PS
1084 int fpr_offset = frame_addr + fdatap->fpr_offset;
1085 for (ii = fdatap->saved_fpr; ii < 32; ii++) {
1086 fi->cache_fsr->regs [FP0_REGNUM + ii] = fpr_offset;
1087 fpr_offset += 8;
1088 }
ecf4059f
JG
1089 }
1090
1091 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
965dde97 1092 All gpr's from saved_gpr to gpr31 are saved. */
ecf4059f 1093
965dde97
PS
1094 if (fdatap->saved_gpr >= 0) {
1095 int gpr_offset = frame_addr + fdatap->gpr_offset;
1096 for (ii = fdatap->saved_gpr; ii < 32; ii++) {
1097 fi->cache_fsr->regs [ii] = gpr_offset;
1098 gpr_offset += 4;
1099 }
1100 }
1101
1102 /* If != 0, fdatap->cr_offset is the offset from the frame that holds
1103 the CR. */
1104 if (fdatap->cr_offset != 0)
1105 fi->cache_fsr->regs [CR_REGNUM] = frame_addr + fdatap->cr_offset;
1106
1107 /* If != 0, fdatap->lr_offset is the offset from the frame that holds
1108 the LR. */
1109 if (fdatap->lr_offset != 0)
1110 fi->cache_fsr->regs [LR_REGNUM] = frame_addr + fdatap->lr_offset;
ecf4059f
JG
1111}
1112
1113/* Return the address of a frame. This is the inital %sp value when the frame
1114 was first allocated. For functions calling alloca(), it might be saved in
1115 an alloca register. */
1116
1117CORE_ADDR
1118frame_initial_stack_address (fi)
1119 struct frame_info *fi;
1120{
1121 CORE_ADDR tmpaddr;
63641491 1122 struct rs6000_framedata fdata;
ecf4059f
JG
1123 struct frame_info *callee_fi;
1124
1125 /* if the initial stack pointer (frame address) of this frame is known,
1126 just return it. */
1127
1128 if (fi->initial_sp)
1129 return fi->initial_sp;
1130
1131 /* find out if this function is using an alloca register.. */
1132
068c9fd6 1133 (void) skip_prologue (get_pc_function_start (fi->pc), &fdata);
ecf4059f
JG
1134
1135 /* if saved registers of this frame are not known yet, read and cache them. */
1136
1137 if (!fi->cache_fsr)
1138 frame_get_cache_fsr (fi, &fdata);
1139
1140 /* If no alloca register used, then fi->frame is the value of the %sp for
1141 this frame, and it is good enough. */
1142
1143 if (fdata.alloca_reg < 0) {
1144 fi->initial_sp = fi->frame;
1145 return fi->initial_sp;
1146 }
1147
1148 /* This function has an alloca register. If this is the top-most frame
1149 (with the lowest address), the value in alloca register is good. */
1150
1151 if (!fi->next)
1152 return fi->initial_sp = read_register (fdata.alloca_reg);
1153
1154 /* Otherwise, this is a caller frame. Callee has usually already saved
1155 registers, but there are exceptions (such as when the callee
1156 has no parameters). Find the address in which caller's alloca
1157 register is saved. */
1158
1159 for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
1160
1161 if (!callee_fi->cache_fsr)
cdb1cc92 1162 frame_get_cache_fsr (callee_fi, NULL);
ecf4059f
JG
1163
1164 /* this is the address in which alloca register is saved. */
1165
1166 tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg];
1167 if (tmpaddr) {
1168 fi->initial_sp = read_memory_integer (tmpaddr, 4);
1169 return fi->initial_sp;
1170 }
1171
1172 /* Go look into deeper levels of the frame chain to see if any one of
1173 the callees has saved alloca register. */
1174 }
1175
1176 /* If alloca register was not saved, by the callee (or any of its callees)
1177 then the value in the register is still good. */
1178
1179 return fi->initial_sp = read_register (fdata.alloca_reg);
1180}
1181
669caa9c 1182CORE_ADDR
f3649227
JK
1183rs6000_frame_chain (thisframe)
1184 struct frame_info *thisframe;
1185{
669caa9c 1186 CORE_ADDR fp;
f3649227
JK
1187 if (inside_entry_file ((thisframe)->pc))
1188 return 0;
cee86be3 1189 if (thisframe->signal_handler_caller)
9ed8604f 1190 fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4);
4cc56716
PS
1191 else if (thisframe->next != NULL
1192 && thisframe->next->signal_handler_caller
1193 && frameless_function_invocation (thisframe))
1194 /* A frameless function interrupted by a signal did not change the
1195 frame pointer. */
1196 fp = FRAME_FP (thisframe);
cee86be3
JK
1197 else
1198 fp = read_memory_integer ((thisframe)->frame, 4);
1199
f3649227
JK
1200 return fp;
1201}
ecf4059f 1202\f
65eaea27
JL
1203/* Return nonzero if ADDR (a function pointer) is in the data space and
1204 is therefore a special function pointer. */
1205
1206int
1207is_magic_function_pointer (addr)
1208 CORE_ADDR addr;
1209{
1210 struct obj_section *s;
1211
1212 s = find_pc_section (addr);
1213 if (s && s->the_bfd_section->flags & SEC_CODE)
1214 return 0;
1215 else
1216 return 1;
1217}
1218
5c172b4b
MM
1219#ifdef GDB_TARGET_POWERPC
1220int
1221gdb_print_insn_powerpc (memaddr, info)
1222 bfd_vma memaddr;
1223 disassemble_info *info;
1224{
1225 if (TARGET_BYTE_ORDER == BIG_ENDIAN)
1226 return print_insn_big_powerpc (memaddr, info);
1227 else
1228 return print_insn_little_powerpc (memaddr, info);
1229}
1230#endif
1231
18b46e7c
SS
1232void
1233_initialize_rs6000_tdep ()
1234{
1235 /* FIXME, this should not be decided via ifdef. */
1236#ifdef GDB_TARGET_POWERPC
5c172b4b 1237 tm_print_insn = gdb_print_insn_powerpc;
18b46e7c
SS
1238#else
1239 tm_print_insn = print_insn_rs6000;
1240#endif
1241}
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