kill it dead
[deliverable/binutils-gdb.git] / gdb / rs6000-tdep.c
CommitLineData
41abdfbd 1/* Target-dependent code for GDB, the GNU debugger.
ecf4059f 2 Copyright 1986, 1987, 1989, 1991, 1992 Free Software Foundation, Inc.
41abdfbd
JG
3
4This file is part of GDB.
5
6This program is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 2 of the License, or
9(at your option) any later version.
10
11This program is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with this program; if not, write to the Free Software
18Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
19
41abdfbd 20#include "defs.h"
41abdfbd
JG
21#include "frame.h"
22#include "inferior.h"
23#include "symtab.h"
24#include "target.h"
030fb5cb 25#include "gdbcore.h"
41abdfbd 26
2aefe6e4
JK
27#include "xcoffsolib.h"
28
41abdfbd
JG
29#include <sys/param.h>
30#include <sys/dir.h>
31#include <sys/user.h>
32#include <signal.h>
33#include <sys/ioctl.h>
34#include <fcntl.h>
35
41abdfbd
JG
36#include <a.out.h>
37#include <sys/file.h>
38#include <sys/stat.h>
39#include <sys/core.h>
ecf4059f 40#include <sys/ldr.h>
41abdfbd 41
d6434f39
JG
42
43extern struct obstack frame_cache_obstack;
44
41abdfbd 45extern int errno;
41abdfbd
JG
46
47/* Nonzero if we just simulated a single step break. */
48int one_stepped;
49
41abdfbd
JG
50/* Breakpoint shadows for the single step instructions will be kept here. */
51
52static struct sstep_breaks {
030fb5cb
JK
53 /* Address, or 0 if this is not in use. */
54 CORE_ADDR address;
55 /* Shadow contents. */
56 char data[4];
41abdfbd
JG
57} stepBreaks[2];
58
ecf4059f
JG
59/* Static function prototypes */
60
ecf4059f
JG
61static CORE_ADDR
62find_toc_address PARAMS ((CORE_ADDR pc));
63
64static CORE_ADDR
65branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety));
66
67static void
68frame_get_cache_fsr PARAMS ((struct frame_info *fi,
69 struct aix_framedata *fdatap));
41abdfbd
JG
70
71/*
72 * Calculate the destination of a branch/jump. Return -1 if not a branch.
73 */
ecf4059f 74static CORE_ADDR
41abdfbd 75branch_dest (opcode, instr, pc, safety)
ecf4059f
JG
76 int opcode;
77 int instr;
78 CORE_ADDR pc;
79 CORE_ADDR safety;
41abdfbd
JG
80{
81 register long offset;
ecf4059f 82 CORE_ADDR dest;
41abdfbd
JG
83 int immediate;
84 int absolute;
85 int ext_op;
86
87 absolute = (int) ((instr >> 1) & 1);
88
89 switch (opcode) {
90 case 18 :
ecf4059f 91 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
41abdfbd
JG
92
93 case 16 :
94 if (opcode != 18) /* br conditional */
95 immediate = ((instr & ~3) << 16) >> 16;
96 if (absolute)
97 dest = immediate;
98 else
99 dest = pc + immediate;
100 break;
101
102 case 19 :
103 ext_op = (instr>>1) & 0x3ff;
104
105 if (ext_op == 16) /* br conditional register */
106 dest = read_register (LR_REGNUM) & ~3;
107
108 else if (ext_op == 528) /* br cond to count reg */
109 dest = read_register (CTR_REGNUM) & ~3;
110
111 else return -1;
112 break;
113
114 default: return -1;
115 }
818de002 116 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
41abdfbd
JG
117}
118
119
120
121/* AIX does not support PT_STEP. Simulate it. */
122
997cc2c0 123void
41abdfbd 124single_step (signal)
997cc2c0 125 int signal;
41abdfbd
JG
126{
127#define INSNLEN(OPCODE) 4
128
129 static char breakp[] = BREAKPOINT;
030fb5cb
JK
130 int ii, insn;
131 CORE_ADDR loc;
132 CORE_ADDR breaks[2];
133 int opcode;
41abdfbd
JG
134
135 if (!one_stepped) {
41abdfbd
JG
136 loc = read_pc ();
137
359a097f 138 read_memory (loc, (char *) &insn, 4);
41abdfbd
JG
139
140 breaks[0] = loc + INSNLEN(insn);
141 opcode = insn >> 26;
142 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
143
818de002
PB
144 /* Don't put two breakpoints on the same address. */
145 if (breaks[1] == breaks[0])
146 breaks[1] = -1;
147
030fb5cb 148 stepBreaks[1].address = 0;
41abdfbd
JG
149
150 for (ii=0; ii < 2; ++ii) {
151
152 /* ignore invalid breakpoint. */
153 if ( breaks[ii] == -1)
154 continue;
155
030fb5cb 156 read_memory (breaks[ii], stepBreaks[ii].data, 4);
41abdfbd 157
030fb5cb 158 write_memory (breaks[ii], breakp, 4);
41abdfbd
JG
159 stepBreaks[ii].address = breaks[ii];
160 }
161
162 one_stepped = 1;
997cc2c0 163 } else {
41abdfbd
JG
164
165 /* remove step breakpoints. */
166 for (ii=0; ii < 2; ++ii)
030fb5cb 167 if (stepBreaks[ii].address != 0)
41abdfbd 168 write_memory
030fb5cb 169 (stepBreaks[ii].address, stepBreaks[ii].data, 4);
41abdfbd
JG
170
171 one_stepped = 0;
172 }
997cc2c0 173 errno = 0; /* FIXME, don't ignore errors! */
030fb5cb 174 /* What errors? {read,write}_memory call error(). */
41abdfbd 175}
41abdfbd
JG
176
177
178/* return pc value after skipping a function prologue. */
179
180skip_prologue (pc)
ecf4059f 181CORE_ADDR pc;
41abdfbd
JG
182{
183 unsigned int tmp;
ecf4059f 184 unsigned int op; /* FIXME, assumes instruction size matches host int!!! */
41abdfbd
JG
185
186 if (target_read_memory (pc, (char *)&op, sizeof (op)))
187 return pc; /* Can't access it -- assume no prologue. */
188 SWAP_TARGET_AND_HOST (&op, sizeof (op));
189
190 /* Assume that subsequent fetches can fail with low probability. */
191
192 if (op == 0x7c0802a6) { /* mflr r0 */
193 pc += 4;
194 op = read_memory_integer (pc, 4);
195 }
41abdfbd
JG
196
197 if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */
198 pc += 4;
199 op = read_memory_integer (pc, 4);
200 }
201
202 if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
203 pc += 4;
204 op = read_memory_integer (pc, 4);
1eeba686
PB
205
206 /* At this point, make sure this is not a trampoline function
207 (a function that simply calls another functions, and nothing else).
208 If the next is not a nop, this branch was part of the function
209 prologue. */
210
211 if (op == 0x4def7b82 || /* crorc 15, 15, 15 */
212 op == 0x0)
213 return pc - 4; /* don't skip over this branch */
41abdfbd
JG
214 }
215
cdb1cc92
ILT
216 if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
217 pc += 4; /* store floating register double */
218 op = read_memory_integer (pc, 4);
219 }
220
41abdfbd
JG
221 if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */
222 pc += 4;
223 op = read_memory_integer (pc, 4);
224 }
225
226 while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */
227 (tmp == 0x9421) || /* stu r1, NUM(r1) */
cdb1cc92 228 (tmp == 0x93e1)) /* st r31,NUM(r1) */
41abdfbd
JG
229 {
230 pc += 4;
231 op = read_memory_integer (pc, 4);
232 }
233
234 while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */
235 pc += 4; /* l r30, ... */
236 op = read_memory_integer (pc, 4);
237 }
238
507e4004 239 /* store parameters into stack */
818de002
PB
240 while(
241 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
242 (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */
243 (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */
244 (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */
245 {
246 pc += 4; /* store fpr double */
247 op = read_memory_integer (pc, 4);
248 }
41abdfbd
JG
249
250 if (op == 0x603f0000) { /* oril r31, r1, 0x0 */
251 pc += 4; /* this happens if r31 is used as */
252 op = read_memory_integer (pc, 4); /* frame ptr. (gcc does that) */
253
818de002
PB
254 tmp = 0;
255 while ((op >> 16) == (0x907f + tmp)) { /* st r3, NUM(r31) */
256 pc += 4; /* st r4, NUM(r31), ... */
41abdfbd 257 op = read_memory_integer (pc, 4);
818de002 258 tmp += 0x20;
41abdfbd
JG
259 }
260 }
507e4004
PB
261#if 0
262/* I have problems with skipping over __main() that I need to address
263 * sometime. Previously, I used to use misc_function_vector which
264 * didn't work as well as I wanted to be. -MGO */
265
266 /* If the first thing after skipping a prolog is a branch to a function,
267 this might be a call to an initializer in main(), introduced by gcc2.
268 We'd like to skip over it as well. Fortunately, xlc does some extra
269 work before calling a function right after a prologue, thus we can
270 single out such gcc2 behaviour. */
271
272
273 if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */
274 op = read_memory_integer (pc+4, 4);
275
276 if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */
277
278 /* check and see if we are in main. If so, skip over this initializer
279 function as well. */
280
281 tmp = find_pc_misc_function (pc);
2e4964ad 282 if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main"))
507e4004
PB
283 return pc + 8;
284 }
285 }
286#endif /* 0 */
287
41abdfbd
JG
288 return pc;
289}
290
818de002 291
41abdfbd
JG
292/*************************************************************************
293 Support for creating pushind a dummy frame into the stack, and popping
294 frames, etc.
295*************************************************************************/
296
818de002
PB
297/* The total size of dummy frame is 436, which is;
298
299 32 gpr's - 128 bytes
300 32 fpr's - 256 "
301 7 the rest - 28 "
302 and 24 extra bytes for the callee's link area. The last 24 bytes
303 for the link area might not be necessary, since it will be taken
304 care of by push_arguments(). */
305
306#define DUMMY_FRAME_SIZE 436
307
41abdfbd
JG
308#define DUMMY_FRAME_ADDR_SIZE 10
309
310/* Make sure you initialize these in somewhere, in case gdb gives up what it
818de002 311 was debugging and starts debugging something else. FIXMEibm */
41abdfbd
JG
312
313static int dummy_frame_count = 0;
314static int dummy_frame_size = 0;
315static CORE_ADDR *dummy_frame_addr = 0;
316
317extern int stop_stack_dummy;
318
319/* push a dummy frame into stack, save all register. Currently we are saving
320 only gpr's and fpr's, which is not good enough! FIXMEmgo */
321
ecf4059f 322void
41abdfbd
JG
323push_dummy_frame ()
324{
359a097f
JK
325 /* stack pointer. */
326 CORE_ADDR sp;
327
328 /* link register. */
329 CORE_ADDR pc;
330 /* Same thing, target byte order. */
331 char pc_targ[4];
332
41abdfbd
JG
333 int ii;
334
5f1c39ef 335 target_fetch_registers (-1);
6c6afbb9 336
41abdfbd
JG
337 if (dummy_frame_count >= dummy_frame_size) {
338 dummy_frame_size += DUMMY_FRAME_ADDR_SIZE;
339 if (dummy_frame_addr)
340 dummy_frame_addr = (CORE_ADDR*) xrealloc
341 (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size));
342 else
343 dummy_frame_addr = (CORE_ADDR*)
344 xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size));
345 }
346
347 sp = read_register(SP_REGNUM);
359a097f
JK
348 pc = read_register(PC_REGNUM);
349 memcpy (pc_targ, (char *) &pc, 4);
41abdfbd
JG
350
351 dummy_frame_addr [dummy_frame_count++] = sp;
352
353 /* Be careful! If the stack pointer is not decremented first, then kernel
6c6afbb9 354 thinks he is free to use the space underneath it. And kernel actually
41abdfbd
JG
355 uses that area for IPC purposes when executing ptrace(2) calls. So
356 before writing register values into the new frame, decrement and update
357 %sp first in order to secure your frame. */
358
818de002 359 write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE);
41abdfbd 360
41abdfbd
JG
361 /* gdb relies on the state of current_frame. We'd better update it,
362 otherwise things like do_registers_info() wouldn't work properly! */
363
364 flush_cached_frames ();
818de002 365 set_current_frame (create_new_frame (sp-DUMMY_FRAME_SIZE, pc));
41abdfbd
JG
366
367 /* save program counter in link register's space. */
359a097f 368 write_memory (sp+8, pc_targ, 4);
41abdfbd 369
6c6afbb9 370 /* save all floating point and general purpose registers here. */
41abdfbd
JG
371
372 /* fpr's, f0..f31 */
373 for (ii = 0; ii < 32; ++ii)
374 write_memory (sp-8-(ii*8), &registers[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8);
375
376 /* gpr's r0..r31 */
377 for (ii=1; ii <=32; ++ii)
378 write_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
379
818de002
PB
380 /* so far, 32*2 + 32 words = 384 bytes have been written.
381 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */
382
383 for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) {
384 write_memory (sp-384-(ii*4),
385 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
386 }
387
388 /* Save sp or so called back chain right here. */
389 write_memory (sp-DUMMY_FRAME_SIZE, &sp, 4);
390 sp -= DUMMY_FRAME_SIZE;
41abdfbd
JG
391
392 /* And finally, this is the back chain. */
359a097f 393 write_memory (sp+8, pc_targ, 4);
41abdfbd
JG
394}
395
396
397/* Pop a dummy frame.
398
399 In rs6000 when we push a dummy frame, we save all of the registers. This
400 is usually done before user calls a function explicitly.
401
818de002
PB
402 After a dummy frame is pushed, some instructions are copied into stack,
403 and stack pointer is decremented even more. Since we don't have a frame
404 pointer to get back to the parent frame of the dummy, we start having
405 trouble poping it. Therefore, we keep a dummy frame stack, keeping
406 addresses of dummy frames as such. When poping happens and when we
407 detect that was a dummy frame, we pop it back to its parent by using
408 dummy frame stack (`dummy_frame_addr' array).
ecf4059f
JG
409
410FIXME: This whole concept is broken. You should be able to detect
411a dummy stack frame *on the user's stack itself*. When you do,
412then you know the format of that stack frame -- including its
413saved SP register! There should *not* be a separate stack in the
d6434f39 414GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92
41abdfbd
JG
415 */
416
417pop_dummy_frame ()
418{
419 CORE_ADDR sp, pc;
420 int ii;
421 sp = dummy_frame_addr [--dummy_frame_count];
422
423 /* restore all fpr's. */
424 for (ii = 1; ii <= 32; ++ii)
425 read_memory (sp-(ii*8), &registers[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8);
426
427 /* restore all gpr's */
428 for (ii=1; ii <= 32; ++ii) {
429 read_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
430 }
431
818de002
PB
432 /* restore the rest of the registers. */
433 for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii)
434 read_memory (sp-384-(ii*4),
435 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
436
437 read_memory (sp-(DUMMY_FRAME_SIZE-8),
438 &registers [REGISTER_BYTE(PC_REGNUM)], 4);
41abdfbd
JG
439
440 /* when a dummy frame was being pushed, we had to decrement %sp first, in
441 order to secure astack space. Thus, saved %sp (or %r1) value, is not the
442 one we should restore. Change it with the one we need. */
443
444 *(int*)&registers [REGISTER_BYTE(FP_REGNUM)] = sp;
445
446 /* Now we can restore all registers. */
447
5f1c39ef 448 target_store_registers (-1);
41abdfbd
JG
449 pc = read_pc ();
450 flush_cached_frames ();
451 set_current_frame (create_new_frame (sp, pc));
452}
453
454
455/* pop the innermost frame, go back to the caller. */
456
ecf4059f 457void
41abdfbd
JG
458pop_frame ()
459{
359a097f 460 CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */
6c6afbb9 461 struct aix_framedata fdata;
41abdfbd 462 FRAME fr = get_current_frame ();
41abdfbd 463 int addr, ii;
41abdfbd
JG
464
465 pc = read_pc ();
466 sp = FRAME_FP (fr);
467
468 if (stop_stack_dummy && dummy_frame_count) {
469 pop_dummy_frame ();
470 return;
471 }
472
473 /* figure out previous %pc value. If the function is frameless, it is
474 still in the link register, otherwise walk the frames and retrieve the
475 saved %pc value in the previous frame. */
476
477 addr = get_pc_function_start (fr->pc) + FUNCTION_START_OFFSET;
6c6afbb9 478 function_frame_info (addr, &fdata);
41abdfbd 479
359a097f 480 prev_sp = read_memory_integer (sp, 4);
6c6afbb9 481 if (fdata.frameless)
41abdfbd
JG
482 lr = read_register (LR_REGNUM);
483 else
359a097f 484 lr = read_memory_integer (prev_sp+8, 4);
41abdfbd
JG
485
486 /* reset %pc value. */
487 write_register (PC_REGNUM, lr);
488
489 /* reset register values if any was saved earlier. */
6c6afbb9 490 addr = prev_sp - fdata.offset;
41abdfbd 491
6c6afbb9
PB
492 if (fdata.saved_gpr != -1)
493 for (ii=fdata.saved_gpr; ii <= 31; ++ii) {
41abdfbd 494 read_memory (addr, &registers [REGISTER_BYTE (ii)], 4);
cdb1cc92 495 addr += 4;
41abdfbd
JG
496 }
497
6c6afbb9
PB
498 if (fdata.saved_fpr != -1)
499 for (ii=fdata.saved_fpr; ii <= 31; ++ii) {
41abdfbd
JG
500 read_memory (addr, &registers [REGISTER_BYTE (ii+FP0_REGNUM)], 8);
501 addr += 8;
502 }
503
504 write_register (SP_REGNUM, prev_sp);
5f1c39ef 505 target_store_registers (-1);
41abdfbd
JG
506 flush_cached_frames ();
507 set_current_frame (create_new_frame (prev_sp, lr));
508}
509
510
511/* fixup the call sequence of a dummy function, with the real function address.
512 its argumets will be passed by gdb. */
513
ecf4059f 514void
41abdfbd
JG
515fix_call_dummy(dummyname, pc, fun, nargs, type)
516 char *dummyname;
ecf4059f
JG
517 CORE_ADDR pc;
518 CORE_ADDR fun;
41abdfbd
JG
519 int nargs; /* not used */
520 int type; /* not used */
41abdfbd
JG
521{
522#define TOC_ADDR_OFFSET 20
523#define TARGET_ADDR_OFFSET 28
524
525 int ii;
ecf4059f
JG
526 CORE_ADDR target_addr;
527 CORE_ADDR tocvalue;
41abdfbd
JG
528
529 target_addr = fun;
530 tocvalue = find_toc_address (target_addr);
531
532 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET);
533 ii = (ii & 0xffff0000) | (tocvalue >> 16);
534 *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii;
535
536 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4);
537 ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff);
538 *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii;
539
540 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET);
541 ii = (ii & 0xffff0000) | (target_addr >> 16);
542 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii;
543
544 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4);
545 ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff);
546 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii;
547}
548
549
41abdfbd 550/* return information about a function frame.
6c6afbb9 551 in struct aix_frameinfo fdata:
cdb1cc92
ILT
552 - frameless is TRUE, if function does not have a frame.
553 - nosavedpc is TRUE, if function does not save %pc value in its frame.
41abdfbd
JG
554 - offset is the number of bytes used in the frame to save registers.
555 - saved_gpr is the number of the first saved gpr.
556 - saved_fpr is the number of the first saved fpr.
6c6afbb9
PB
557 - alloca_reg is the number of the register used for alloca() handling.
558 Otherwise -1.
41abdfbd 559 */
ecf4059f 560void
6c6afbb9 561function_frame_info (pc, fdata)
d6434f39 562 CORE_ADDR pc;
6c6afbb9 563 struct aix_framedata *fdata;
41abdfbd
JG
564{
565 unsigned int tmp;
566 register unsigned int op;
567
6c6afbb9
PB
568 fdata->offset = 0;
569 fdata->saved_gpr = fdata->saved_fpr = fdata->alloca_reg = -1;
cdb1cc92 570 fdata->frameless = 1;
41abdfbd 571
41abdfbd
JG
572 op = read_memory_integer (pc, 4);
573 if (op == 0x7c0802a6) { /* mflr r0 */
574 pc += 4;
575 op = read_memory_integer (pc, 4);
cdb1cc92 576 fdata->nosavedpc = 0;
6c6afbb9 577 fdata->frameless = 0;
41abdfbd 578 }
cdb1cc92
ILT
579 else /* else, pc is not saved */
580 fdata->nosavedpc = 1;
41abdfbd
JG
581
582 if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */
583 pc += 4;
584 op = read_memory_integer (pc, 4);
cdb1cc92 585 fdata->frameless = 0;
41abdfbd
JG
586 }
587
588 if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
589 pc += 4;
590 op = read_memory_integer (pc, 4);
1eeba686
PB
591 /* At this point, make sure this is not a trampoline function
592 (a function that simply calls another functions, and nothing else).
593 If the next is not a nop, this branch was part of the function
594 prologue. */
595
596 if (op == 0x4def7b82 || /* crorc 15, 15, 15 */
597 op == 0x0)
598 return; /* prologue is over */
cdb1cc92 599 fdata->frameless = 0;
41abdfbd
JG
600 }
601
602 if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
603 pc += 4; /* store floating register double */
604 op = read_memory_integer (pc, 4);
cdb1cc92 605 fdata->frameless = 0;
41abdfbd
JG
606 }
607
608 if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */
609 int tmp2;
6c6afbb9 610 fdata->saved_gpr = (op >> 21) & 0x1f;
41abdfbd
JG
611 tmp2 = op & 0xffff;
612 if (tmp2 > 0x7fff)
cdb1cc92 613 tmp2 = (~0 &~ 0xffff) | tmp2;
41abdfbd
JG
614
615 if (tmp2 < 0) {
616 tmp2 = tmp2 * -1;
6c6afbb9
PB
617 fdata->saved_fpr = (tmp2 - ((32 - fdata->saved_gpr) * 4)) / 8;
618 if ( fdata->saved_fpr > 0)
619 fdata->saved_fpr = 32 - fdata->saved_fpr;
41abdfbd 620 else
6c6afbb9 621 fdata->saved_fpr = -1;
41abdfbd 622 }
6c6afbb9
PB
623 fdata->offset = tmp2;
624 pc += 4;
625 op = read_memory_integer (pc, 4);
cdb1cc92 626 fdata->frameless = 0;
41abdfbd 627 }
6c6afbb9
PB
628
629 while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */
630 (tmp == 0x9421) || /* stu r1, NUM(r1) */
cdb1cc92 631 (tmp == 0x93e1)) /* st r31, NUM(r1) */
6c6afbb9 632 {
cdb1cc92
ILT
633 int tmp2;
634
6c6afbb9
PB
635 /* gcc takes a short cut and uses this instruction to save r31 only. */
636
cdb1cc92 637 if (tmp == 0x93e1) {
6c6afbb9
PB
638 if (fdata->offset)
639/* fatal ("Unrecognized prolog."); */
640 printf ("Unrecognized prolog!\n");
641
642 fdata->saved_gpr = 31;
cdb1cc92
ILT
643 tmp2 = op & 0xffff;
644 if (tmp2 > 0x7fff) {
645 tmp2 = - ((~0 &~ 0xffff) | tmp2);
646 fdata->saved_fpr = (tmp2 - ((32 - 31) * 4)) / 8;
647 if ( fdata->saved_fpr > 0)
648 fdata->saved_fpr = 32 - fdata->saved_fpr;
649 else
650 fdata->saved_fpr = -1;
651 }
652 fdata->offset = tmp2;
6c6afbb9
PB
653 }
654 pc += 4;
655 op = read_memory_integer (pc, 4);
cdb1cc92 656 fdata->frameless = 0;
6c6afbb9
PB
657 }
658
659 while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */
660 pc += 4; /* l r30, ... */
661 op = read_memory_integer (pc, 4);
cdb1cc92 662 fdata->frameless = 0;
6c6afbb9
PB
663 }
664
665 /* store parameters into stack */
666 while(
667 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
668 (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */
669 (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */
670 (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */
671 {
672 pc += 4; /* store fpr double */
673 op = read_memory_integer (pc, 4);
cdb1cc92 674 fdata->frameless = 0;
6c6afbb9
PB
675 }
676
cdb1cc92 677 if (op == 0x603f0000) { /* oril r31, r1, 0x0 */
6c6afbb9 678 fdata->alloca_reg = 31;
cdb1cc92
ILT
679 fdata->frameless = 0;
680 }
41abdfbd
JG
681}
682
683
684/* Pass the arguments in either registers, or in the stack. In RS6000, the first
685 eight words of the argument list (that might be less than eight parameters if
686 some parameters occupy more than one word) are passed in r3..r11 registers.
687 float and double parameters are passed in fpr's, in addition to that. Rest of
688 the parameters if any are passed in user stack. There might be cases in which
689 half of the parameter is copied into registers, the other half is pushed into
690 stack.
691
692 If the function is returning a structure, then the return address is passed
693 in r3, then the first 7 words of the parametes can be passed in registers,
694 starting from r4. */
695
696CORE_ADDR
697push_arguments (nargs, args, sp, struct_return, struct_addr)
698 int nargs;
699 value *args;
700 CORE_ADDR sp;
701 int struct_return;
702 CORE_ADDR struct_addr;
703{
704 int ii, len;
705 int argno; /* current argument number */
706 int argbytes; /* current argument byte */
707 char tmp_buffer [50];
708 value arg;
709 int f_argno = 0; /* current floating point argno */
710
711 CORE_ADDR saved_sp, pc;
712
713 if ( dummy_frame_count <= 0)
714 printf ("FATAL ERROR -push_arguments()! frame not found!!\n");
715
716 /* The first eight words of ther arguments are passed in registers. Copy
717 them appropriately.
718
719 If the function is returning a `struct', then the first word (which
720 will be passed in r3) is used for struct return address. In that
721 case we should advance one word and start from r4 register to copy
722 parameters. */
723
724 ii = struct_return ? 1 : 0;
725
726 for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) {
727
728 arg = value_arg_coerce (args[argno]);
729 len = TYPE_LENGTH (VALUE_TYPE (arg));
730
731 if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT) {
732
733 /* floating point arguments are passed in fpr's, as well as gpr's.
734 There are 13 fpr's reserved for passing parameters. At this point
735 there is no way we would run out of them. */
736
737 if (len > 8)
738 printf (
739"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
740
741 bcopy (VALUE_CONTENTS (arg),
742 &registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], len);
743 ++f_argno;
744 }
745
746 if (len > 4) {
747
748 /* Argument takes more than one register. */
749 while (argbytes < len) {
750
751 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
752 bcopy ( ((char*)VALUE_CONTENTS (arg))+argbytes,
753 &registers[REGISTER_BYTE(ii+3)],
754 (len - argbytes) > 4 ? 4 : len - argbytes);
755 ++ii, argbytes += 4;
756
757 if (ii >= 8)
758 goto ran_out_of_registers_for_arguments;
759 }
760 argbytes = 0;
761 --ii;
762 }
763 else { /* Argument can fit in one register. No problem. */
764 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
765 bcopy (VALUE_CONTENTS (arg), &registers[REGISTER_BYTE(ii+3)], len);
766 }
767 ++argno;
768 }
769
770ran_out_of_registers_for_arguments:
771
772 /* location for 8 parameters are always reserved. */
773 sp -= 4 * 8;
774
775 /* another six words for back chain, TOC register, link register, etc. */
776 sp -= 24;
777
778 /* if there are more arguments, allocate space for them in
779 the stack, then push them starting from the ninth one. */
780
781 if ((argno < nargs) || argbytes) {
782 int space = 0, jj;
783 value val;
784
785 if (argbytes) {
786 space += ((len - argbytes + 3) & -4);
787 jj = argno + 1;
788 }
789 else
790 jj = argno;
791
792 for (; jj < nargs; ++jj) {
793 val = value_arg_coerce (args[jj]);
794 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
795 }
796
797 /* add location required for the rest of the parameters */
798 space = (space + 7) & -8;
799 sp -= space;
800
801 /* This is another instance we need to be concerned about securing our
802 stack space. If we write anything underneath %sp (r1), we might conflict
803 with the kernel who thinks he is free to use this area. So, update %sp
804 first before doing anything else. */
805
806 write_register (SP_REGNUM, sp);
807
41abdfbd
JG
808 /* if the last argument copied into the registers didn't fit there
809 completely, push the rest of it into stack. */
810
811 if (argbytes) {
812 write_memory (
813 sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes);
814 ++argno;
815 ii += ((len - argbytes + 3) & -4) / 4;
816 }
817
818 /* push the rest of the arguments into stack. */
819 for (; argno < nargs; ++argno) {
820
821 arg = value_arg_coerce (args[argno]);
822 len = TYPE_LENGTH (VALUE_TYPE (arg));
823
824
825 /* float types should be passed in fpr's, as well as in the stack. */
826 if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT && f_argno < 13) {
827
828 if (len > 8)
829 printf (
830"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
831
832 bcopy (VALUE_CONTENTS (arg),
833 &registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], len);
834 ++f_argno;
835 }
836
359a097f 837 write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len);
41abdfbd
JG
838 ii += ((len + 3) & -4) / 4;
839 }
840 }
6c6afbb9 841 else
41abdfbd
JG
842 /* Secure stack areas first, before doing anything else. */
843 write_register (SP_REGNUM, sp);
844
41abdfbd
JG
845 saved_sp = dummy_frame_addr [dummy_frame_count - 1];
846 read_memory (saved_sp, tmp_buffer, 24);
847 write_memory (sp, tmp_buffer, 24);
848
849 write_memory (sp, &saved_sp, 4); /* set back chain properly */
850
5f1c39ef 851 target_store_registers (-1);
41abdfbd
JG
852 return sp;
853}
854
855/* a given return value in `regbuf' with a type `valtype', extract and copy its
856 value into `valbuf' */
857
ecf4059f 858void
41abdfbd
JG
859extract_return_value (valtype, regbuf, valbuf)
860 struct type *valtype;
861 char regbuf[REGISTER_BYTES];
862 char *valbuf;
863{
864
865 if (TYPE_CODE (valtype) == TYPE_CODE_FLT) {
866
867 double dd; float ff;
868 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
869 We need to truncate the return value into float size (4 byte) if
870 necessary. */
871
872 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
873 bcopy (&regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], valbuf,
874 TYPE_LENGTH (valtype));
875 else { /* float */
876 bcopy (&regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], &dd, 8);
877 ff = (float)dd;
878 bcopy (&ff, valbuf, sizeof(float));
879 }
880 }
881 else
882 /* return value is copied starting from r3. */
883 bcopy (&regbuf[REGISTER_BYTE (3)], valbuf, TYPE_LENGTH (valtype));
884}
885
886
ecf4059f
JG
887/* keep structure return address in this variable.
888 FIXME: This is a horrid kludge which should not be allowed to continue
889 living. This only allows a single nested call to a structure-returning
890 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
41abdfbd
JG
891
892CORE_ADDR rs6000_struct_return_address;
893
894
895/* Throw away this debugging code. FIXMEmgo. */
ecf4059f 896void
41abdfbd
JG
897print_frame(fram)
898int fram;
899{
900 int ii, val;
901 for (ii=0; ii<40; ++ii) {
902 if ((ii % 4) == 0)
903 printf ("\n");
904 val = read_memory_integer (fram + ii * 4, 4);
905 printf ("0x%08x\t", val);
906 }
907 printf ("\n");
908}
909
910
911
c2e4669f
JG
912/* Indirect function calls use a piece of trampoline code to do context
913 switching, i.e. to set the new TOC table. Skip such code if we are on
914 its first instruction (as when we have single-stepped to here).
915 Result is desired PC to step until, or NULL if we are not in
916 trampoline code. */
41abdfbd 917
ecf4059f 918CORE_ADDR
41abdfbd 919skip_trampoline_code (pc)
ecf4059f 920CORE_ADDR pc;
41abdfbd
JG
921{
922 register unsigned int ii, op;
923
924 static unsigned trampoline_code[] = {
925 0x800b0000, /* l r0,0x0(r11) */
926 0x90410014, /* st r2,0x14(r1) */
927 0x7c0903a6, /* mtctr r0 */
928 0x804b0004, /* l r2,0x4(r11) */
929 0x816b0008, /* l r11,0x8(r11) */
930 0x4e800420, /* bctr */
931 0x4e800020, /* br */
932 0
933 };
934
935 for (ii=0; trampoline_code[ii]; ++ii) {
936 op = read_memory_integer (pc + (ii*4), 4);
937 if (op != trampoline_code [ii])
359a097f 938 return 0;
41abdfbd
JG
939 }
940 ii = read_register (11); /* r11 holds destination addr */
941 pc = read_memory_integer (ii, 4); /* (r11) value */
942 return pc;
943}
944
ecf4059f
JG
945
946/* Determines whether the function FI has a frame on the stack or not.
cdb1cc92
ILT
947 Called from the FRAMELESS_FUNCTION_INVOCATION macro in tm.h with a
948 second argument of 0, and from the FRAME_SAVED_PC macro with a
949 second argument of 1. */
ecf4059f
JG
950
951int
cdb1cc92 952frameless_function_invocation (fi, pcsaved)
ecf4059f 953struct frame_info *fi;
cdb1cc92 954int pcsaved;
ecf4059f
JG
955{
956 CORE_ADDR func_start;
957 struct aix_framedata fdata;
958
b0e932ad
JK
959 if (fi->next != NULL)
960 /* Don't even think about framelessness except on the innermost frame. */
961 return 0;
962
ecf4059f
JG
963 func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
964
965 /* If we failed to find the start of the function, it is a mistake
966 to inspect the instructions. */
967
968 if (!func_start)
969 return 0;
970
971 function_frame_info (func_start, &fdata);
cdb1cc92 972 return pcsaved ? fdata.nosavedpc : fdata.frameless;
ecf4059f
JG
973}
974
975
976/* If saved registers of frame FI are not known yet, read and cache them.
977 &FDATAP contains aix_framedata; TDATAP can be NULL,
978 in which case the framedata are read. */
979
980static void
981frame_get_cache_fsr (fi, fdatap)
982 struct frame_info *fi;
983 struct aix_framedata *fdatap;
984{
985 int ii;
986 CORE_ADDR frame_addr;
987 struct aix_framedata work_fdata;
988
989 if (fi->cache_fsr)
990 return;
991
992 if (fdatap == NULL) {
993 fdatap = &work_fdata;
994 function_frame_info (get_pc_function_start (fi->pc), fdatap);
995 }
996
997 fi->cache_fsr = (struct frame_saved_regs *)
998 obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs));
999 bzero (fi->cache_fsr, sizeof (struct frame_saved_regs));
1000
1001 if (fi->prev && fi->prev->frame)
1002 frame_addr = fi->prev->frame;
1003 else
1004 frame_addr = read_memory_integer (fi->frame, 4);
1005
1006 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1007 All fpr's from saved_fpr to fp31 are saved right underneath caller
1008 stack pointer, starting from fp31 first. */
1009
1010 if (fdatap->saved_fpr >= 0) {
1011 for (ii=31; ii >= fdatap->saved_fpr; --ii)
1012 fi->cache_fsr->regs [FP0_REGNUM + ii] = frame_addr - ((32 - ii) * 8);
1013 frame_addr -= (32 - fdatap->saved_fpr) * 8;
1014 }
1015
1016 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1017 All gpr's from saved_gpr to gpr31 are saved right under saved fprs,
1018 starting from r31 first. */
1019
1020 if (fdatap->saved_gpr >= 0)
1021 for (ii=31; ii >= fdatap->saved_gpr; --ii)
1022 fi->cache_fsr->regs [ii] = frame_addr - ((32 - ii) * 4);
1023}
1024
1025/* Return the address of a frame. This is the inital %sp value when the frame
1026 was first allocated. For functions calling alloca(), it might be saved in
1027 an alloca register. */
1028
1029CORE_ADDR
1030frame_initial_stack_address (fi)
1031 struct frame_info *fi;
1032{
1033 CORE_ADDR tmpaddr;
1034 struct aix_framedata fdata;
1035 struct frame_info *callee_fi;
1036
1037 /* if the initial stack pointer (frame address) of this frame is known,
1038 just return it. */
1039
1040 if (fi->initial_sp)
1041 return fi->initial_sp;
1042
1043 /* find out if this function is using an alloca register.. */
1044
1045 function_frame_info (get_pc_function_start (fi->pc), &fdata);
1046
1047 /* if saved registers of this frame are not known yet, read and cache them. */
1048
1049 if (!fi->cache_fsr)
1050 frame_get_cache_fsr (fi, &fdata);
1051
1052 /* If no alloca register used, then fi->frame is the value of the %sp for
1053 this frame, and it is good enough. */
1054
1055 if (fdata.alloca_reg < 0) {
1056 fi->initial_sp = fi->frame;
1057 return fi->initial_sp;
1058 }
1059
1060 /* This function has an alloca register. If this is the top-most frame
1061 (with the lowest address), the value in alloca register is good. */
1062
1063 if (!fi->next)
1064 return fi->initial_sp = read_register (fdata.alloca_reg);
1065
1066 /* Otherwise, this is a caller frame. Callee has usually already saved
1067 registers, but there are exceptions (such as when the callee
1068 has no parameters). Find the address in which caller's alloca
1069 register is saved. */
1070
1071 for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
1072
1073 if (!callee_fi->cache_fsr)
cdb1cc92 1074 frame_get_cache_fsr (callee_fi, NULL);
ecf4059f
JG
1075
1076 /* this is the address in which alloca register is saved. */
1077
1078 tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg];
1079 if (tmpaddr) {
1080 fi->initial_sp = read_memory_integer (tmpaddr, 4);
1081 return fi->initial_sp;
1082 }
1083
1084 /* Go look into deeper levels of the frame chain to see if any one of
1085 the callees has saved alloca register. */
1086 }
1087
1088 /* If alloca register was not saved, by the callee (or any of its callees)
1089 then the value in the register is still good. */
1090
1091 return fi->initial_sp = read_register (fdata.alloca_reg);
1092}
1093
1094/* xcoff_relocate_symtab - hook for symbol table relocation.
1095 also reads shared libraries.. */
1096
1097xcoff_relocate_symtab (pid)
1098unsigned int pid;
1099{
1100#define MAX_LOAD_SEGS 64 /* maximum number of load segments */
1101
1102 struct ld_info *ldi;
1103 int temp;
1104
1105 ldi = (void *) alloca(MAX_LOAD_SEGS * sizeof (*ldi));
1106
1107 /* According to my humble theory, AIX has some timing problems and
1108 when the user stack grows, kernel doesn't update stack info in time
1109 and ptrace calls step on user stack. That is why we sleep here a little,
1110 and give kernel to update its internals. */
1111
1112 usleep (36000);
1113
1114 errno = 0;
1115 ptrace(PT_LDINFO, pid, (PTRACE_ARG3_TYPE) ldi,
1116 MAX_LOAD_SEGS * sizeof(*ldi), ldi);
1117 if (errno) {
1118 perror_with_name ("ptrace ldinfo");
1119 return 0;
1120 }
1121
1122 vmap_ldinfo(ldi);
1123
1124 do {
359a097f
JK
1125 /* We are allowed to assume CORE_ADDR == pointer. This code is
1126 native only. */
1127 add_text_to_loadinfo ((CORE_ADDR) ldi->ldinfo_textorg,
1128 (CORE_ADDR) ldi->ldinfo_dataorg);
ecf4059f
JG
1129 } while (ldi->ldinfo_next
1130 && (ldi = (void *) (ldi->ldinfo_next + (char *) ldi)));
1131
1132#if 0
1133 /* Now that we've jumbled things around, re-sort them. */
1134 sort_minimal_symbols ();
1135#endif
1136
1137 /* relocate the exec and core sections as well. */
1138 vmap_exec ();
1139}
1140\f
1141/* Keep an array of load segment information and their TOC table addresses.
1142 This info will be useful when calling a shared library function by hand. */
1143
1144struct loadinfo {
1145 CORE_ADDR textorg, dataorg;
1146 unsigned long toc_offset;
1147};
1148
1149#define LOADINFOLEN 10
1150
ecf4059f
JG
1151static struct loadinfo *loadinfo = NULL;
1152static int loadinfolen = 0;
1153static int loadinfotocindex = 0;
3c02636b 1154static int loadinfotextindex = 0;
ecf4059f
JG
1155
1156
1157void
1158xcoff_init_loadinfo ()
1159{
1160 loadinfotocindex = 0;
1161 loadinfotextindex = 0;
1162
1163 if (loadinfolen == 0) {
1164 loadinfo = (struct loadinfo *)
1165 xmalloc (sizeof (struct loadinfo) * LOADINFOLEN);
1166 loadinfolen = LOADINFOLEN;
1167 }
1168}
1169
1170
1171/* FIXME -- this is never called! */
1172void
1173free_loadinfo ()
1174{
1175 if (loadinfo)
1176 free (loadinfo);
1177 loadinfo = NULL;
1178 loadinfolen = 0;
1179 loadinfotocindex = 0;
1180 loadinfotextindex = 0;
1181}
1182
1183/* this is called from xcoffread.c */
1184
1185void
1186xcoff_add_toc_to_loadinfo (unsigned long tocoff)
1187{
1188 while (loadinfotocindex >= loadinfolen) {
1189 loadinfolen += LOADINFOLEN;
1190 loadinfo = (struct loadinfo *)
1191 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1192 }
1193 loadinfo [loadinfotocindex++].toc_offset = tocoff;
1194}
1195
1196
2aefe6e4 1197void
ecf4059f
JG
1198add_text_to_loadinfo (textaddr, dataaddr)
1199 CORE_ADDR textaddr;
1200 CORE_ADDR dataaddr;
1201{
1202 while (loadinfotextindex >= loadinfolen) {
1203 loadinfolen += LOADINFOLEN;
1204 loadinfo = (struct loadinfo *)
1205 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1206 }
1207 loadinfo [loadinfotextindex].textorg = textaddr;
1208 loadinfo [loadinfotextindex].dataorg = dataaddr;
1209 ++loadinfotextindex;
1210}
1211
1212
1213/* FIXME: This assumes that the "textorg" and "dataorg" elements
1214 of a member of this array are correlated with the "toc_offset"
1215 element of the same member. But they are sequentially assigned in wildly
1216 different places, and probably there is no correlation. FIXME! */
1217
1218static CORE_ADDR
1219find_toc_address (pc)
1220 CORE_ADDR pc;
1221{
1222 int ii, toc_entry, tocbase = 0;
1223
1224 for (ii=0; ii < loadinfotextindex; ++ii)
1225 if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) {
1226 toc_entry = ii;
1227 tocbase = loadinfo[ii].textorg;
1228 }
1229
1230 return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset;
1231}
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