additions for binutils release from dj
[deliverable/binutils-gdb.git] / gdb / rs6000-tdep.c
CommitLineData
41abdfbd 1/* Target-dependent code for GDB, the GNU debugger.
07aa9fdc
PS
2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994
3 Free Software Foundation, Inc.
41abdfbd
JG
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
20
41abdfbd 21#include "defs.h"
41abdfbd
JG
22#include "frame.h"
23#include "inferior.h"
24#include "symtab.h"
25#include "target.h"
030fb5cb 26#include "gdbcore.h"
41abdfbd 27
2aefe6e4
JK
28#include "xcoffsolib.h"
29
41abdfbd 30#include <a.out.h>
d6434f39
JG
31
32extern struct obstack frame_cache_obstack;
33
41abdfbd 34extern int errno;
41abdfbd
JG
35
36/* Nonzero if we just simulated a single step break. */
37int one_stepped;
38
41abdfbd
JG
39/* Breakpoint shadows for the single step instructions will be kept here. */
40
41static struct sstep_breaks {
030fb5cb
JK
42 /* Address, or 0 if this is not in use. */
43 CORE_ADDR address;
44 /* Shadow contents. */
45 char data[4];
41abdfbd
JG
46} stepBreaks[2];
47
ecf4059f
JG
48/* Static function prototypes */
49
ecf4059f
JG
50static CORE_ADDR
51find_toc_address PARAMS ((CORE_ADDR pc));
52
53static CORE_ADDR
54branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety));
55
56static void
57frame_get_cache_fsr PARAMS ((struct frame_info *fi,
58 struct aix_framedata *fdatap));
41abdfbd
JG
59
60/*
61 * Calculate the destination of a branch/jump. Return -1 if not a branch.
62 */
ecf4059f 63static CORE_ADDR
41abdfbd 64branch_dest (opcode, instr, pc, safety)
ecf4059f
JG
65 int opcode;
66 int instr;
67 CORE_ADDR pc;
68 CORE_ADDR safety;
41abdfbd
JG
69{
70 register long offset;
ecf4059f 71 CORE_ADDR dest;
41abdfbd
JG
72 int immediate;
73 int absolute;
74 int ext_op;
75
76 absolute = (int) ((instr >> 1) & 1);
77
78 switch (opcode) {
79 case 18 :
ecf4059f 80 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
41abdfbd
JG
81
82 case 16 :
83 if (opcode != 18) /* br conditional */
84 immediate = ((instr & ~3) << 16) >> 16;
85 if (absolute)
86 dest = immediate;
87 else
88 dest = pc + immediate;
89 break;
90
91 case 19 :
92 ext_op = (instr>>1) & 0x3ff;
93
94 if (ext_op == 16) /* br conditional register */
95 dest = read_register (LR_REGNUM) & ~3;
96
97 else if (ext_op == 528) /* br cond to count reg */
9aa31e91
JK
98 {
99 dest = read_register (CTR_REGNUM) & ~3;
100
101 /* If we are about to execute a system call, dest is something
102 like 0x22fc or 0x3b00. Upon completion the system call
103 will return to the address in the link register. */
104 if (dest < TEXT_SEGMENT_BASE)
105 dest = read_register (LR_REGNUM) & ~3;
106 }
41abdfbd
JG
107 else return -1;
108 break;
109
110 default: return -1;
111 }
818de002 112 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
41abdfbd
JG
113}
114
115
116
117/* AIX does not support PT_STEP. Simulate it. */
118
997cc2c0 119void
41abdfbd 120single_step (signal)
997cc2c0 121 int signal;
41abdfbd
JG
122{
123#define INSNLEN(OPCODE) 4
124
125 static char breakp[] = BREAKPOINT;
030fb5cb
JK
126 int ii, insn;
127 CORE_ADDR loc;
128 CORE_ADDR breaks[2];
129 int opcode;
41abdfbd
JG
130
131 if (!one_stepped) {
41abdfbd
JG
132 loc = read_pc ();
133
359a097f 134 read_memory (loc, (char *) &insn, 4);
41abdfbd
JG
135
136 breaks[0] = loc + INSNLEN(insn);
137 opcode = insn >> 26;
138 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
139
818de002
PB
140 /* Don't put two breakpoints on the same address. */
141 if (breaks[1] == breaks[0])
142 breaks[1] = -1;
143
030fb5cb 144 stepBreaks[1].address = 0;
41abdfbd
JG
145
146 for (ii=0; ii < 2; ++ii) {
147
148 /* ignore invalid breakpoint. */
149 if ( breaks[ii] == -1)
150 continue;
151
030fb5cb 152 read_memory (breaks[ii], stepBreaks[ii].data, 4);
41abdfbd 153
030fb5cb 154 write_memory (breaks[ii], breakp, 4);
41abdfbd
JG
155 stepBreaks[ii].address = breaks[ii];
156 }
157
158 one_stepped = 1;
997cc2c0 159 } else {
41abdfbd
JG
160
161 /* remove step breakpoints. */
162 for (ii=0; ii < 2; ++ii)
030fb5cb 163 if (stepBreaks[ii].address != 0)
41abdfbd 164 write_memory
030fb5cb 165 (stepBreaks[ii].address, stepBreaks[ii].data, 4);
41abdfbd
JG
166
167 one_stepped = 0;
168 }
997cc2c0 169 errno = 0; /* FIXME, don't ignore errors! */
030fb5cb 170 /* What errors? {read,write}_memory call error(). */
41abdfbd 171}
41abdfbd
JG
172
173
174/* return pc value after skipping a function prologue. */
175
176skip_prologue (pc)
ecf4059f 177CORE_ADDR pc;
41abdfbd 178{
34df79fc 179 char buf[4];
41abdfbd 180 unsigned int tmp;
34df79fc 181 unsigned long op;
41abdfbd 182
34df79fc 183 if (target_read_memory (pc, buf, 4))
41abdfbd 184 return pc; /* Can't access it -- assume no prologue. */
34df79fc 185 op = extract_unsigned_integer (buf, 4);
41abdfbd
JG
186
187 /* Assume that subsequent fetches can fail with low probability. */
188
189 if (op == 0x7c0802a6) { /* mflr r0 */
190 pc += 4;
191 op = read_memory_integer (pc, 4);
192 }
41abdfbd
JG
193
194 if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */
195 pc += 4;
196 op = read_memory_integer (pc, 4);
197 }
198
199 if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
200 pc += 4;
201 op = read_memory_integer (pc, 4);
1eeba686
PB
202
203 /* At this point, make sure this is not a trampoline function
204 (a function that simply calls another functions, and nothing else).
205 If the next is not a nop, this branch was part of the function
206 prologue. */
207
208 if (op == 0x4def7b82 || /* crorc 15, 15, 15 */
209 op == 0x0)
210 return pc - 4; /* don't skip over this branch */
41abdfbd
JG
211 }
212
cdb1cc92
ILT
213 if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
214 pc += 4; /* store floating register double */
215 op = read_memory_integer (pc, 4);
216 }
217
41abdfbd
JG
218 if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */
219 pc += 4;
220 op = read_memory_integer (pc, 4);
221 }
222
223 while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */
224 (tmp == 0x9421) || /* stu r1, NUM(r1) */
cdb1cc92 225 (tmp == 0x93e1)) /* st r31,NUM(r1) */
41abdfbd
JG
226 {
227 pc += 4;
228 op = read_memory_integer (pc, 4);
229 }
230
231 while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */
232 pc += 4; /* l r30, ... */
233 op = read_memory_integer (pc, 4);
234 }
235
507e4004 236 /* store parameters into stack */
818de002
PB
237 while(
238 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
239 (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */
240 (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */
241 (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */
242 {
243 pc += 4; /* store fpr double */
244 op = read_memory_integer (pc, 4);
245 }
41abdfbd
JG
246
247 if (op == 0x603f0000) { /* oril r31, r1, 0x0 */
248 pc += 4; /* this happens if r31 is used as */
249 op = read_memory_integer (pc, 4); /* frame ptr. (gcc does that) */
250
818de002
PB
251 tmp = 0;
252 while ((op >> 16) == (0x907f + tmp)) { /* st r3, NUM(r31) */
253 pc += 4; /* st r4, NUM(r31), ... */
41abdfbd 254 op = read_memory_integer (pc, 4);
818de002 255 tmp += 0x20;
41abdfbd
JG
256 }
257 }
507e4004
PB
258#if 0
259/* I have problems with skipping over __main() that I need to address
260 * sometime. Previously, I used to use misc_function_vector which
261 * didn't work as well as I wanted to be. -MGO */
262
263 /* If the first thing after skipping a prolog is a branch to a function,
264 this might be a call to an initializer in main(), introduced by gcc2.
265 We'd like to skip over it as well. Fortunately, xlc does some extra
266 work before calling a function right after a prologue, thus we can
267 single out such gcc2 behaviour. */
268
269
270 if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */
271 op = read_memory_integer (pc+4, 4);
272
273 if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */
274
275 /* check and see if we are in main. If so, skip over this initializer
276 function as well. */
277
278 tmp = find_pc_misc_function (pc);
2e4964ad 279 if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main"))
507e4004
PB
280 return pc + 8;
281 }
282 }
283#endif /* 0 */
284
41abdfbd
JG
285 return pc;
286}
287
818de002 288
41abdfbd
JG
289/*************************************************************************
290 Support for creating pushind a dummy frame into the stack, and popping
291 frames, etc.
292*************************************************************************/
293
818de002
PB
294/* The total size of dummy frame is 436, which is;
295
296 32 gpr's - 128 bytes
297 32 fpr's - 256 "
298 7 the rest - 28 "
299 and 24 extra bytes for the callee's link area. The last 24 bytes
300 for the link area might not be necessary, since it will be taken
301 care of by push_arguments(). */
302
303#define DUMMY_FRAME_SIZE 436
304
41abdfbd
JG
305#define DUMMY_FRAME_ADDR_SIZE 10
306
307/* Make sure you initialize these in somewhere, in case gdb gives up what it
818de002 308 was debugging and starts debugging something else. FIXMEibm */
41abdfbd
JG
309
310static int dummy_frame_count = 0;
311static int dummy_frame_size = 0;
312static CORE_ADDR *dummy_frame_addr = 0;
313
314extern int stop_stack_dummy;
315
316/* push a dummy frame into stack, save all register. Currently we are saving
317 only gpr's and fpr's, which is not good enough! FIXMEmgo */
318
ecf4059f 319void
41abdfbd
JG
320push_dummy_frame ()
321{
359a097f
JK
322 /* stack pointer. */
323 CORE_ADDR sp;
324
325 /* link register. */
326 CORE_ADDR pc;
327 /* Same thing, target byte order. */
328 char pc_targ[4];
329
41abdfbd
JG
330 int ii;
331
5f1c39ef 332 target_fetch_registers (-1);
6c6afbb9 333
41abdfbd
JG
334 if (dummy_frame_count >= dummy_frame_size) {
335 dummy_frame_size += DUMMY_FRAME_ADDR_SIZE;
336 if (dummy_frame_addr)
337 dummy_frame_addr = (CORE_ADDR*) xrealloc
338 (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size));
339 else
340 dummy_frame_addr = (CORE_ADDR*)
341 xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size));
342 }
343
344 sp = read_register(SP_REGNUM);
359a097f
JK
345 pc = read_register(PC_REGNUM);
346 memcpy (pc_targ, (char *) &pc, 4);
41abdfbd
JG
347
348 dummy_frame_addr [dummy_frame_count++] = sp;
349
350 /* Be careful! If the stack pointer is not decremented first, then kernel
6c6afbb9 351 thinks he is free to use the space underneath it. And kernel actually
41abdfbd
JG
352 uses that area for IPC purposes when executing ptrace(2) calls. So
353 before writing register values into the new frame, decrement and update
354 %sp first in order to secure your frame. */
355
818de002 356 write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE);
41abdfbd 357
41abdfbd
JG
358 /* gdb relies on the state of current_frame. We'd better update it,
359 otherwise things like do_registers_info() wouldn't work properly! */
360
361 flush_cached_frames ();
41abdfbd
JG
362
363 /* save program counter in link register's space. */
359a097f 364 write_memory (sp+8, pc_targ, 4);
41abdfbd 365
6c6afbb9 366 /* save all floating point and general purpose registers here. */
41abdfbd
JG
367
368 /* fpr's, f0..f31 */
369 for (ii = 0; ii < 32; ++ii)
370 write_memory (sp-8-(ii*8), &registers[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8);
371
372 /* gpr's r0..r31 */
373 for (ii=1; ii <=32; ++ii)
374 write_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
375
818de002
PB
376 /* so far, 32*2 + 32 words = 384 bytes have been written.
377 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */
378
379 for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) {
380 write_memory (sp-384-(ii*4),
381 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
382 }
383
384 /* Save sp or so called back chain right here. */
385 write_memory (sp-DUMMY_FRAME_SIZE, &sp, 4);
386 sp -= DUMMY_FRAME_SIZE;
41abdfbd
JG
387
388 /* And finally, this is the back chain. */
359a097f 389 write_memory (sp+8, pc_targ, 4);
41abdfbd
JG
390}
391
392
393/* Pop a dummy frame.
394
395 In rs6000 when we push a dummy frame, we save all of the registers. This
396 is usually done before user calls a function explicitly.
397
818de002
PB
398 After a dummy frame is pushed, some instructions are copied into stack,
399 and stack pointer is decremented even more. Since we don't have a frame
400 pointer to get back to the parent frame of the dummy, we start having
401 trouble poping it. Therefore, we keep a dummy frame stack, keeping
402 addresses of dummy frames as such. When poping happens and when we
403 detect that was a dummy frame, we pop it back to its parent by using
404 dummy frame stack (`dummy_frame_addr' array).
ecf4059f
JG
405
406FIXME: This whole concept is broken. You should be able to detect
407a dummy stack frame *on the user's stack itself*. When you do,
408then you know the format of that stack frame -- including its
409saved SP register! There should *not* be a separate stack in the
d6434f39 410GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92
41abdfbd
JG
411 */
412
413pop_dummy_frame ()
414{
415 CORE_ADDR sp, pc;
416 int ii;
417 sp = dummy_frame_addr [--dummy_frame_count];
418
419 /* restore all fpr's. */
420 for (ii = 1; ii <= 32; ++ii)
421 read_memory (sp-(ii*8), &registers[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8);
422
423 /* restore all gpr's */
424 for (ii=1; ii <= 32; ++ii) {
425 read_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
426 }
427
818de002
PB
428 /* restore the rest of the registers. */
429 for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii)
430 read_memory (sp-384-(ii*4),
431 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
432
433 read_memory (sp-(DUMMY_FRAME_SIZE-8),
434 &registers [REGISTER_BYTE(PC_REGNUM)], 4);
41abdfbd
JG
435
436 /* when a dummy frame was being pushed, we had to decrement %sp first, in
437 order to secure astack space. Thus, saved %sp (or %r1) value, is not the
438 one we should restore. Change it with the one we need. */
439
440 *(int*)&registers [REGISTER_BYTE(FP_REGNUM)] = sp;
441
442 /* Now we can restore all registers. */
443
5f1c39ef 444 target_store_registers (-1);
41abdfbd
JG
445 pc = read_pc ();
446 flush_cached_frames ();
41abdfbd
JG
447}
448
449
450/* pop the innermost frame, go back to the caller. */
451
ecf4059f 452void
41abdfbd
JG
453pop_frame ()
454{
359a097f 455 CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */
6c6afbb9 456 struct aix_framedata fdata;
41abdfbd 457 FRAME fr = get_current_frame ();
41abdfbd 458 int addr, ii;
41abdfbd
JG
459
460 pc = read_pc ();
461 sp = FRAME_FP (fr);
462
463 if (stop_stack_dummy && dummy_frame_count) {
464 pop_dummy_frame ();
465 return;
466 }
467
07aa9fdc
PS
468 /* Make sure that all registers are valid. */
469 read_register_bytes (0, NULL, REGISTER_BYTES);
470
41abdfbd
JG
471 /* figure out previous %pc value. If the function is frameless, it is
472 still in the link register, otherwise walk the frames and retrieve the
473 saved %pc value in the previous frame. */
474
475 addr = get_pc_function_start (fr->pc) + FUNCTION_START_OFFSET;
6c6afbb9 476 function_frame_info (addr, &fdata);
41abdfbd 477
6c6afbb9 478 if (fdata.frameless)
07aa9fdc
PS
479 prev_sp = sp;
480 else
481 prev_sp = read_memory_integer (sp, 4);
482 if (fdata.nosavedpc)
41abdfbd
JG
483 lr = read_register (LR_REGNUM);
484 else
359a097f 485 lr = read_memory_integer (prev_sp+8, 4);
41abdfbd
JG
486
487 /* reset %pc value. */
488 write_register (PC_REGNUM, lr);
489
490 /* reset register values if any was saved earlier. */
6c6afbb9 491 addr = prev_sp - fdata.offset;
41abdfbd 492
6c6afbb9
PB
493 if (fdata.saved_gpr != -1)
494 for (ii=fdata.saved_gpr; ii <= 31; ++ii) {
41abdfbd 495 read_memory (addr, &registers [REGISTER_BYTE (ii)], 4);
cdb1cc92 496 addr += 4;
41abdfbd
JG
497 }
498
6c6afbb9
PB
499 if (fdata.saved_fpr != -1)
500 for (ii=fdata.saved_fpr; ii <= 31; ++ii) {
41abdfbd
JG
501 read_memory (addr, &registers [REGISTER_BYTE (ii+FP0_REGNUM)], 8);
502 addr += 8;
503 }
504
505 write_register (SP_REGNUM, prev_sp);
5f1c39ef 506 target_store_registers (-1);
41abdfbd 507 flush_cached_frames ();
41abdfbd
JG
508}
509
41abdfbd
JG
510/* fixup the call sequence of a dummy function, with the real function address.
511 its argumets will be passed by gdb. */
512
ecf4059f 513void
41abdfbd
JG
514fix_call_dummy(dummyname, pc, fun, nargs, type)
515 char *dummyname;
ecf4059f
JG
516 CORE_ADDR pc;
517 CORE_ADDR fun;
41abdfbd
JG
518 int nargs; /* not used */
519 int type; /* not used */
41abdfbd
JG
520{
521#define TOC_ADDR_OFFSET 20
522#define TARGET_ADDR_OFFSET 28
523
524 int ii;
ecf4059f
JG
525 CORE_ADDR target_addr;
526 CORE_ADDR tocvalue;
41abdfbd
JG
527
528 target_addr = fun;
529 tocvalue = find_toc_address (target_addr);
530
531 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET);
532 ii = (ii & 0xffff0000) | (tocvalue >> 16);
533 *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii;
534
535 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4);
536 ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff);
537 *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii;
538
539 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET);
540 ii = (ii & 0xffff0000) | (target_addr >> 16);
541 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii;
542
543 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4);
544 ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff);
545 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii;
546}
547
548
41abdfbd 549/* return information about a function frame.
6c6afbb9 550 in struct aix_frameinfo fdata:
cdb1cc92
ILT
551 - frameless is TRUE, if function does not have a frame.
552 - nosavedpc is TRUE, if function does not save %pc value in its frame.
41abdfbd
JG
553 - offset is the number of bytes used in the frame to save registers.
554 - saved_gpr is the number of the first saved gpr.
555 - saved_fpr is the number of the first saved fpr.
6c6afbb9
PB
556 - alloca_reg is the number of the register used for alloca() handling.
557 Otherwise -1.
41abdfbd 558 */
ecf4059f 559void
6c6afbb9 560function_frame_info (pc, fdata)
d6434f39 561 CORE_ADDR pc;
6c6afbb9 562 struct aix_framedata *fdata;
41abdfbd
JG
563{
564 unsigned int tmp;
565 register unsigned int op;
566
6c6afbb9
PB
567 fdata->offset = 0;
568 fdata->saved_gpr = fdata->saved_fpr = fdata->alloca_reg = -1;
cdb1cc92 569 fdata->frameless = 1;
41abdfbd 570
41abdfbd
JG
571 op = read_memory_integer (pc, 4);
572 if (op == 0x7c0802a6) { /* mflr r0 */
573 pc += 4;
574 op = read_memory_integer (pc, 4);
cdb1cc92 575 fdata->nosavedpc = 0;
6c6afbb9 576 fdata->frameless = 0;
41abdfbd 577 }
cdb1cc92
ILT
578 else /* else, pc is not saved */
579 fdata->nosavedpc = 1;
41abdfbd
JG
580
581 if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */
582 pc += 4;
583 op = read_memory_integer (pc, 4);
cdb1cc92 584 fdata->frameless = 0;
41abdfbd
JG
585 }
586
587 if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
588 pc += 4;
589 op = read_memory_integer (pc, 4);
1eeba686
PB
590 /* At this point, make sure this is not a trampoline function
591 (a function that simply calls another functions, and nothing else).
592 If the next is not a nop, this branch was part of the function
593 prologue. */
594
595 if (op == 0x4def7b82 || /* crorc 15, 15, 15 */
596 op == 0x0)
597 return; /* prologue is over */
cdb1cc92 598 fdata->frameless = 0;
41abdfbd
JG
599 }
600
601 if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
602 pc += 4; /* store floating register double */
603 op = read_memory_integer (pc, 4);
cdb1cc92 604 fdata->frameless = 0;
41abdfbd
JG
605 }
606
607 if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */
608 int tmp2;
6c6afbb9 609 fdata->saved_gpr = (op >> 21) & 0x1f;
41abdfbd
JG
610 tmp2 = op & 0xffff;
611 if (tmp2 > 0x7fff)
cdb1cc92 612 tmp2 = (~0 &~ 0xffff) | tmp2;
41abdfbd
JG
613
614 if (tmp2 < 0) {
615 tmp2 = tmp2 * -1;
6c6afbb9
PB
616 fdata->saved_fpr = (tmp2 - ((32 - fdata->saved_gpr) * 4)) / 8;
617 if ( fdata->saved_fpr > 0)
618 fdata->saved_fpr = 32 - fdata->saved_fpr;
41abdfbd 619 else
6c6afbb9 620 fdata->saved_fpr = -1;
41abdfbd 621 }
6c6afbb9
PB
622 fdata->offset = tmp2;
623 pc += 4;
624 op = read_memory_integer (pc, 4);
cdb1cc92 625 fdata->frameless = 0;
41abdfbd 626 }
6c6afbb9
PB
627
628 while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */
629 (tmp == 0x9421) || /* stu r1, NUM(r1) */
cdb1cc92 630 (tmp == 0x93e1)) /* st r31, NUM(r1) */
6c6afbb9 631 {
cdb1cc92
ILT
632 int tmp2;
633
6c6afbb9
PB
634 /* gcc takes a short cut and uses this instruction to save r31 only. */
635
cdb1cc92 636 if (tmp == 0x93e1) {
6c6afbb9
PB
637 if (fdata->offset)
638/* fatal ("Unrecognized prolog."); */
199b2450 639 printf_unfiltered ("Unrecognized prolog!\n");
6c6afbb9
PB
640
641 fdata->saved_gpr = 31;
cdb1cc92
ILT
642 tmp2 = op & 0xffff;
643 if (tmp2 > 0x7fff) {
644 tmp2 = - ((~0 &~ 0xffff) | tmp2);
645 fdata->saved_fpr = (tmp2 - ((32 - 31) * 4)) / 8;
646 if ( fdata->saved_fpr > 0)
647 fdata->saved_fpr = 32 - fdata->saved_fpr;
648 else
649 fdata->saved_fpr = -1;
650 }
651 fdata->offset = tmp2;
6c6afbb9
PB
652 }
653 pc += 4;
654 op = read_memory_integer (pc, 4);
cdb1cc92 655 fdata->frameless = 0;
6c6afbb9
PB
656 }
657
658 while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */
659 pc += 4; /* l r30, ... */
660 op = read_memory_integer (pc, 4);
cdb1cc92 661 fdata->frameless = 0;
6c6afbb9
PB
662 }
663
664 /* store parameters into stack */
665 while(
666 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
667 (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */
668 (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */
669 (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */
670 {
671 pc += 4; /* store fpr double */
672 op = read_memory_integer (pc, 4);
cdb1cc92 673 fdata->frameless = 0;
6c6afbb9
PB
674 }
675
07aa9fdc
PS
676 if (op == 0x603f0000 /* oril r31, r1, 0x0 */
677 || op == 0x7c3f0b78) /* mr r31, r1 */
678 {
679 fdata->alloca_reg = 31;
680 fdata->frameless = 0;
681 }
41abdfbd
JG
682}
683
684
685/* Pass the arguments in either registers, or in the stack. In RS6000, the first
686 eight words of the argument list (that might be less than eight parameters if
687 some parameters occupy more than one word) are passed in r3..r11 registers.
688 float and double parameters are passed in fpr's, in addition to that. Rest of
689 the parameters if any are passed in user stack. There might be cases in which
690 half of the parameter is copied into registers, the other half is pushed into
691 stack.
692
693 If the function is returning a structure, then the return address is passed
694 in r3, then the first 7 words of the parametes can be passed in registers,
695 starting from r4. */
696
697CORE_ADDR
698push_arguments (nargs, args, sp, struct_return, struct_addr)
699 int nargs;
17221e41 700 value_ptr *args;
41abdfbd
JG
701 CORE_ADDR sp;
702 int struct_return;
703 CORE_ADDR struct_addr;
704{
705 int ii, len;
706 int argno; /* current argument number */
707 int argbytes; /* current argument byte */
708 char tmp_buffer [50];
17221e41 709 value_ptr arg;
41abdfbd
JG
710 int f_argno = 0; /* current floating point argno */
711
712 CORE_ADDR saved_sp, pc;
713
714 if ( dummy_frame_count <= 0)
199b2450 715 printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n");
41abdfbd
JG
716
717 /* The first eight words of ther arguments are passed in registers. Copy
718 them appropriately.
719
720 If the function is returning a `struct', then the first word (which
721 will be passed in r3) is used for struct return address. In that
722 case we should advance one word and start from r4 register to copy
723 parameters. */
724
725 ii = struct_return ? 1 : 0;
726
727 for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) {
728
729 arg = value_arg_coerce (args[argno]);
730 len = TYPE_LENGTH (VALUE_TYPE (arg));
731
732 if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT) {
733
734 /* floating point arguments are passed in fpr's, as well as gpr's.
735 There are 13 fpr's reserved for passing parameters. At this point
736 there is no way we would run out of them. */
737
738 if (len > 8)
199b2450 739 printf_unfiltered (
41abdfbd
JG
740"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
741
ade40d31
RP
742 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
743 len);
41abdfbd
JG
744 ++f_argno;
745 }
746
747 if (len > 4) {
748
749 /* Argument takes more than one register. */
750 while (argbytes < len) {
751
752 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31
RP
753 memcpy (&registers[REGISTER_BYTE(ii+3)],
754 ((char*)VALUE_CONTENTS (arg))+argbytes,
41abdfbd
JG
755 (len - argbytes) > 4 ? 4 : len - argbytes);
756 ++ii, argbytes += 4;
757
758 if (ii >= 8)
759 goto ran_out_of_registers_for_arguments;
760 }
761 argbytes = 0;
762 --ii;
763 }
764 else { /* Argument can fit in one register. No problem. */
765 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31 766 memcpy (&registers[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len);
41abdfbd
JG
767 }
768 ++argno;
769 }
770
771ran_out_of_registers_for_arguments:
772
773 /* location for 8 parameters are always reserved. */
774 sp -= 4 * 8;
775
776 /* another six words for back chain, TOC register, link register, etc. */
777 sp -= 24;
778
779 /* if there are more arguments, allocate space for them in
780 the stack, then push them starting from the ninth one. */
781
782 if ((argno < nargs) || argbytes) {
783 int space = 0, jj;
17221e41 784 value_ptr val;
41abdfbd
JG
785
786 if (argbytes) {
787 space += ((len - argbytes + 3) & -4);
788 jj = argno + 1;
789 }
790 else
791 jj = argno;
792
793 for (; jj < nargs; ++jj) {
794 val = value_arg_coerce (args[jj]);
795 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
796 }
797
798 /* add location required for the rest of the parameters */
799 space = (space + 7) & -8;
800 sp -= space;
801
802 /* This is another instance we need to be concerned about securing our
803 stack space. If we write anything underneath %sp (r1), we might conflict
804 with the kernel who thinks he is free to use this area. So, update %sp
805 first before doing anything else. */
806
807 write_register (SP_REGNUM, sp);
808
41abdfbd
JG
809 /* if the last argument copied into the registers didn't fit there
810 completely, push the rest of it into stack. */
811
812 if (argbytes) {
813 write_memory (
814 sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes);
815 ++argno;
816 ii += ((len - argbytes + 3) & -4) / 4;
817 }
818
819 /* push the rest of the arguments into stack. */
820 for (; argno < nargs; ++argno) {
821
822 arg = value_arg_coerce (args[argno]);
823 len = TYPE_LENGTH (VALUE_TYPE (arg));
824
825
826 /* float types should be passed in fpr's, as well as in the stack. */
827 if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT && f_argno < 13) {
828
829 if (len > 8)
199b2450 830 printf_unfiltered (
41abdfbd
JG
831"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
832
ade40d31
RP
833 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
834 len);
41abdfbd
JG
835 ++f_argno;
836 }
837
359a097f 838 write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len);
41abdfbd
JG
839 ii += ((len + 3) & -4) / 4;
840 }
841 }
6c6afbb9 842 else
41abdfbd
JG
843 /* Secure stack areas first, before doing anything else. */
844 write_register (SP_REGNUM, sp);
845
41abdfbd
JG
846 saved_sp = dummy_frame_addr [dummy_frame_count - 1];
847 read_memory (saved_sp, tmp_buffer, 24);
848 write_memory (sp, tmp_buffer, 24);
849
850 write_memory (sp, &saved_sp, 4); /* set back chain properly */
851
5f1c39ef 852 target_store_registers (-1);
41abdfbd
JG
853 return sp;
854}
855
856/* a given return value in `regbuf' with a type `valtype', extract and copy its
857 value into `valbuf' */
858
ecf4059f 859void
41abdfbd
JG
860extract_return_value (valtype, regbuf, valbuf)
861 struct type *valtype;
862 char regbuf[REGISTER_BYTES];
863 char *valbuf;
864{
865
866 if (TYPE_CODE (valtype) == TYPE_CODE_FLT) {
867
868 double dd; float ff;
869 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
870 We need to truncate the return value into float size (4 byte) if
871 necessary. */
872
873 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
ade40d31 874 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)],
41abdfbd
JG
875 TYPE_LENGTH (valtype));
876 else { /* float */
ade40d31 877 memcpy (&dd, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
41abdfbd 878 ff = (float)dd;
ade40d31 879 memcpy (valbuf, &ff, sizeof(float));
41abdfbd
JG
880 }
881 }
882 else
883 /* return value is copied starting from r3. */
ade40d31 884 memcpy (valbuf, &regbuf[REGISTER_BYTE (3)], TYPE_LENGTH (valtype));
41abdfbd
JG
885}
886
887
ecf4059f
JG
888/* keep structure return address in this variable.
889 FIXME: This is a horrid kludge which should not be allowed to continue
890 living. This only allows a single nested call to a structure-returning
891 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
41abdfbd
JG
892
893CORE_ADDR rs6000_struct_return_address;
894
895
c2e4669f
JG
896/* Indirect function calls use a piece of trampoline code to do context
897 switching, i.e. to set the new TOC table. Skip such code if we are on
898 its first instruction (as when we have single-stepped to here).
07aa9fdc
PS
899 Also skip shared library trampoline code (which is different from
900 indirect function call trampolines).
c2e4669f
JG
901 Result is desired PC to step until, or NULL if we are not in
902 trampoline code. */
41abdfbd 903
ecf4059f 904CORE_ADDR
41abdfbd 905skip_trampoline_code (pc)
ecf4059f 906CORE_ADDR pc;
41abdfbd
JG
907{
908 register unsigned int ii, op;
07aa9fdc 909 CORE_ADDR solib_target_pc;
41abdfbd
JG
910
911 static unsigned trampoline_code[] = {
912 0x800b0000, /* l r0,0x0(r11) */
913 0x90410014, /* st r2,0x14(r1) */
914 0x7c0903a6, /* mtctr r0 */
915 0x804b0004, /* l r2,0x4(r11) */
916 0x816b0008, /* l r11,0x8(r11) */
917 0x4e800420, /* bctr */
918 0x4e800020, /* br */
919 0
920 };
921
07aa9fdc
PS
922 /* If pc is in a shared library trampoline, return its target. */
923 solib_target_pc = find_solib_trampoline_target (pc);
924 if (solib_target_pc)
925 return solib_target_pc;
926
41abdfbd
JG
927 for (ii=0; trampoline_code[ii]; ++ii) {
928 op = read_memory_integer (pc + (ii*4), 4);
929 if (op != trampoline_code [ii])
359a097f 930 return 0;
41abdfbd
JG
931 }
932 ii = read_register (11); /* r11 holds destination addr */
933 pc = read_memory_integer (ii, 4); /* (r11) value */
934 return pc;
935}
936
ecf4059f
JG
937
938/* Determines whether the function FI has a frame on the stack or not.
cdb1cc92
ILT
939 Called from the FRAMELESS_FUNCTION_INVOCATION macro in tm.h with a
940 second argument of 0, and from the FRAME_SAVED_PC macro with a
941 second argument of 1. */
ecf4059f
JG
942
943int
cdb1cc92 944frameless_function_invocation (fi, pcsaved)
ecf4059f 945struct frame_info *fi;
cdb1cc92 946int pcsaved;
ecf4059f
JG
947{
948 CORE_ADDR func_start;
949 struct aix_framedata fdata;
950
b0e932ad
JK
951 if (fi->next != NULL)
952 /* Don't even think about framelessness except on the innermost frame. */
3f528883
JK
953 /* FIXME: Can also be frameless if fi->next->signal_handler_caller (if
954 a signal happens while executing in a frameless function). */
b0e932ad
JK
955 return 0;
956
ecf4059f
JG
957 func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
958
959 /* If we failed to find the start of the function, it is a mistake
960 to inspect the instructions. */
961
962 if (!func_start)
963 return 0;
964
965 function_frame_info (func_start, &fdata);
cdb1cc92 966 return pcsaved ? fdata.nosavedpc : fdata.frameless;
ecf4059f
JG
967}
968
969
970/* If saved registers of frame FI are not known yet, read and cache them.
971 &FDATAP contains aix_framedata; TDATAP can be NULL,
972 in which case the framedata are read. */
973
974static void
975frame_get_cache_fsr (fi, fdatap)
976 struct frame_info *fi;
977 struct aix_framedata *fdatap;
978{
979 int ii;
980 CORE_ADDR frame_addr;
981 struct aix_framedata work_fdata;
982
983 if (fi->cache_fsr)
984 return;
985
986 if (fdatap == NULL) {
987 fdatap = &work_fdata;
988 function_frame_info (get_pc_function_start (fi->pc), fdatap);
989 }
990
991 fi->cache_fsr = (struct frame_saved_regs *)
992 obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs));
4ed97c9a 993 memset (fi->cache_fsr, '\0', sizeof (struct frame_saved_regs));
ecf4059f
JG
994
995 if (fi->prev && fi->prev->frame)
996 frame_addr = fi->prev->frame;
997 else
998 frame_addr = read_memory_integer (fi->frame, 4);
999
1000 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1001 All fpr's from saved_fpr to fp31 are saved right underneath caller
1002 stack pointer, starting from fp31 first. */
1003
1004 if (fdatap->saved_fpr >= 0) {
1005 for (ii=31; ii >= fdatap->saved_fpr; --ii)
1006 fi->cache_fsr->regs [FP0_REGNUM + ii] = frame_addr - ((32 - ii) * 8);
1007 frame_addr -= (32 - fdatap->saved_fpr) * 8;
1008 }
1009
1010 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1011 All gpr's from saved_gpr to gpr31 are saved right under saved fprs,
1012 starting from r31 first. */
1013
1014 if (fdatap->saved_gpr >= 0)
1015 for (ii=31; ii >= fdatap->saved_gpr; --ii)
1016 fi->cache_fsr->regs [ii] = frame_addr - ((32 - ii) * 4);
1017}
1018
1019/* Return the address of a frame. This is the inital %sp value when the frame
1020 was first allocated. For functions calling alloca(), it might be saved in
1021 an alloca register. */
1022
1023CORE_ADDR
1024frame_initial_stack_address (fi)
1025 struct frame_info *fi;
1026{
1027 CORE_ADDR tmpaddr;
1028 struct aix_framedata fdata;
1029 struct frame_info *callee_fi;
1030
1031 /* if the initial stack pointer (frame address) of this frame is known,
1032 just return it. */
1033
1034 if (fi->initial_sp)
1035 return fi->initial_sp;
1036
1037 /* find out if this function is using an alloca register.. */
1038
1039 function_frame_info (get_pc_function_start (fi->pc), &fdata);
1040
1041 /* if saved registers of this frame are not known yet, read and cache them. */
1042
1043 if (!fi->cache_fsr)
1044 frame_get_cache_fsr (fi, &fdata);
1045
1046 /* If no alloca register used, then fi->frame is the value of the %sp for
1047 this frame, and it is good enough. */
1048
1049 if (fdata.alloca_reg < 0) {
1050 fi->initial_sp = fi->frame;
1051 return fi->initial_sp;
1052 }
1053
1054 /* This function has an alloca register. If this is the top-most frame
1055 (with the lowest address), the value in alloca register is good. */
1056
1057 if (!fi->next)
1058 return fi->initial_sp = read_register (fdata.alloca_reg);
1059
1060 /* Otherwise, this is a caller frame. Callee has usually already saved
1061 registers, but there are exceptions (such as when the callee
1062 has no parameters). Find the address in which caller's alloca
1063 register is saved. */
1064
1065 for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
1066
1067 if (!callee_fi->cache_fsr)
cdb1cc92 1068 frame_get_cache_fsr (callee_fi, NULL);
ecf4059f
JG
1069
1070 /* this is the address in which alloca register is saved. */
1071
1072 tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg];
1073 if (tmpaddr) {
1074 fi->initial_sp = read_memory_integer (tmpaddr, 4);
1075 return fi->initial_sp;
1076 }
1077
1078 /* Go look into deeper levels of the frame chain to see if any one of
1079 the callees has saved alloca register. */
1080 }
1081
1082 /* If alloca register was not saved, by the callee (or any of its callees)
1083 then the value in the register is still good. */
1084
1085 return fi->initial_sp = read_register (fdata.alloca_reg);
1086}
1087
f3649227
JK
1088FRAME_ADDR
1089rs6000_frame_chain (thisframe)
1090 struct frame_info *thisframe;
1091{
1092 FRAME_ADDR fp;
1093 if (inside_entry_file ((thisframe)->pc))
1094 return 0;
cee86be3 1095 if (thisframe->signal_handler_caller)
f3649227 1096 {
f3649227
JK
1097 /* This was determined by experimentation on AIX 3.2. Perhaps
1098 it corresponds to some offset in /usr/include/sys/user.h or
1099 something like that. Using some system include file would
1100 have the advantage of probably being more robust in the face
1101 of OS upgrades, but the disadvantage of being wrong for
1102 cross-debugging. */
1103
1104#define SIG_FRAME_FP_OFFSET 284
1105 fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4);
1106 }
cee86be3
JK
1107 else
1108 fp = read_memory_integer ((thisframe)->frame, 4);
1109
f3649227
JK
1110 return fp;
1111}
ecf4059f
JG
1112\f
1113/* Keep an array of load segment information and their TOC table addresses.
1114 This info will be useful when calling a shared library function by hand. */
1115
1116struct loadinfo {
1117 CORE_ADDR textorg, dataorg;
1118 unsigned long toc_offset;
1119};
1120
1121#define LOADINFOLEN 10
1122
ecf4059f
JG
1123static struct loadinfo *loadinfo = NULL;
1124static int loadinfolen = 0;
1125static int loadinfotocindex = 0;
3c02636b 1126static int loadinfotextindex = 0;
ecf4059f
JG
1127
1128
1129void
1130xcoff_init_loadinfo ()
1131{
1132 loadinfotocindex = 0;
1133 loadinfotextindex = 0;
1134
1135 if (loadinfolen == 0) {
1136 loadinfo = (struct loadinfo *)
1137 xmalloc (sizeof (struct loadinfo) * LOADINFOLEN);
1138 loadinfolen = LOADINFOLEN;
1139 }
1140}
1141
1142
1143/* FIXME -- this is never called! */
1144void
1145free_loadinfo ()
1146{
1147 if (loadinfo)
1148 free (loadinfo);
1149 loadinfo = NULL;
1150 loadinfolen = 0;
1151 loadinfotocindex = 0;
1152 loadinfotextindex = 0;
1153}
1154
1155/* this is called from xcoffread.c */
1156
1157void
1158xcoff_add_toc_to_loadinfo (unsigned long tocoff)
1159{
1160 while (loadinfotocindex >= loadinfolen) {
1161 loadinfolen += LOADINFOLEN;
1162 loadinfo = (struct loadinfo *)
1163 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1164 }
1165 loadinfo [loadinfotocindex++].toc_offset = tocoff;
1166}
1167
2aefe6e4 1168void
ecf4059f
JG
1169add_text_to_loadinfo (textaddr, dataaddr)
1170 CORE_ADDR textaddr;
1171 CORE_ADDR dataaddr;
1172{
1173 while (loadinfotextindex >= loadinfolen) {
1174 loadinfolen += LOADINFOLEN;
1175 loadinfo = (struct loadinfo *)
1176 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1177 }
1178 loadinfo [loadinfotextindex].textorg = textaddr;
1179 loadinfo [loadinfotextindex].dataorg = dataaddr;
1180 ++loadinfotextindex;
1181}
1182
1183
1184/* FIXME: This assumes that the "textorg" and "dataorg" elements
1185 of a member of this array are correlated with the "toc_offset"
1186 element of the same member. But they are sequentially assigned in wildly
1187 different places, and probably there is no correlation. FIXME! */
1188
1189static CORE_ADDR
1190find_toc_address (pc)
1191 CORE_ADDR pc;
1192{
1193 int ii, toc_entry, tocbase = 0;
1194
1195 for (ii=0; ii < loadinfotextindex; ++ii)
1196 if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) {
1197 toc_entry = ii;
1198 tocbase = loadinfo[ii].textorg;
1199 }
1200
1201 return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset;
1202}
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