* sparc-tdep.c (decode_asi): New function.
[deliverable/binutils-gdb.git] / gdb / rs6000-tdep.c
CommitLineData
41abdfbd 1/* Target-dependent code for GDB, the GNU debugger.
18b46e7c 2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995
07aa9fdc 3 Free Software Foundation, Inc.
41abdfbd
JG
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
20
41abdfbd 21#include "defs.h"
41abdfbd
JG
22#include "frame.h"
23#include "inferior.h"
24#include "symtab.h"
25#include "target.h"
030fb5cb 26#include "gdbcore.h"
41abdfbd 27
2aefe6e4
JK
28#include "xcoffsolib.h"
29
41abdfbd 30#include <a.out.h>
d6434f39
JG
31
32extern struct obstack frame_cache_obstack;
33
41abdfbd 34extern int errno;
41abdfbd
JG
35
36/* Nonzero if we just simulated a single step break. */
37int one_stepped;
38
41abdfbd
JG
39/* Breakpoint shadows for the single step instructions will be kept here. */
40
41static struct sstep_breaks {
030fb5cb
JK
42 /* Address, or 0 if this is not in use. */
43 CORE_ADDR address;
44 /* Shadow contents. */
45 char data[4];
41abdfbd
JG
46} stepBreaks[2];
47
ecf4059f
JG
48/* Static function prototypes */
49
ecf4059f
JG
50static CORE_ADDR
51find_toc_address PARAMS ((CORE_ADDR pc));
52
53static CORE_ADDR
54branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety));
55
56static void
57frame_get_cache_fsr PARAMS ((struct frame_info *fi,
58 struct aix_framedata *fdatap));
41abdfbd
JG
59
60/*
61 * Calculate the destination of a branch/jump. Return -1 if not a branch.
62 */
ecf4059f 63static CORE_ADDR
41abdfbd 64branch_dest (opcode, instr, pc, safety)
ecf4059f
JG
65 int opcode;
66 int instr;
67 CORE_ADDR pc;
68 CORE_ADDR safety;
41abdfbd
JG
69{
70 register long offset;
ecf4059f 71 CORE_ADDR dest;
41abdfbd
JG
72 int immediate;
73 int absolute;
74 int ext_op;
75
76 absolute = (int) ((instr >> 1) & 1);
77
78 switch (opcode) {
79 case 18 :
ecf4059f 80 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
dc59e982
MM
81 if (absolute)
82 dest = immediate;
83 else
84 dest = pc + immediate;
85 break;
41abdfbd
JG
86
87 case 16 :
dc59e982 88 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
41abdfbd
JG
89 if (absolute)
90 dest = immediate;
91 else
92 dest = pc + immediate;
93 break;
94
95 case 19 :
96 ext_op = (instr>>1) & 0x3ff;
97
98 if (ext_op == 16) /* br conditional register */
99 dest = read_register (LR_REGNUM) & ~3;
100
101 else if (ext_op == 528) /* br cond to count reg */
9aa31e91
JK
102 {
103 dest = read_register (CTR_REGNUM) & ~3;
104
105 /* If we are about to execute a system call, dest is something
106 like 0x22fc or 0x3b00. Upon completion the system call
107 will return to the address in the link register. */
108 if (dest < TEXT_SEGMENT_BASE)
109 dest = read_register (LR_REGNUM) & ~3;
110 }
41abdfbd
JG
111 else return -1;
112 break;
113
114 default: return -1;
115 }
818de002 116 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
41abdfbd
JG
117}
118
119
120
121/* AIX does not support PT_STEP. Simulate it. */
122
997cc2c0 123void
41abdfbd 124single_step (signal)
997cc2c0 125 int signal;
41abdfbd
JG
126{
127#define INSNLEN(OPCODE) 4
128
129 static char breakp[] = BREAKPOINT;
030fb5cb
JK
130 int ii, insn;
131 CORE_ADDR loc;
132 CORE_ADDR breaks[2];
133 int opcode;
41abdfbd
JG
134
135 if (!one_stepped) {
41abdfbd
JG
136 loc = read_pc ();
137
b112f2ae 138 insn = read_memory_integer (loc, 4);
41abdfbd
JG
139
140 breaks[0] = loc + INSNLEN(insn);
141 opcode = insn >> 26;
142 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
143
818de002
PB
144 /* Don't put two breakpoints on the same address. */
145 if (breaks[1] == breaks[0])
146 breaks[1] = -1;
147
030fb5cb 148 stepBreaks[1].address = 0;
41abdfbd
JG
149
150 for (ii=0; ii < 2; ++ii) {
151
152 /* ignore invalid breakpoint. */
153 if ( breaks[ii] == -1)
154 continue;
155
030fb5cb 156 read_memory (breaks[ii], stepBreaks[ii].data, 4);
41abdfbd 157
030fb5cb 158 write_memory (breaks[ii], breakp, 4);
41abdfbd
JG
159 stepBreaks[ii].address = breaks[ii];
160 }
161
162 one_stepped = 1;
997cc2c0 163 } else {
41abdfbd
JG
164
165 /* remove step breakpoints. */
166 for (ii=0; ii < 2; ++ii)
030fb5cb 167 if (stepBreaks[ii].address != 0)
41abdfbd 168 write_memory
030fb5cb 169 (stepBreaks[ii].address, stepBreaks[ii].data, 4);
41abdfbd
JG
170
171 one_stepped = 0;
172 }
997cc2c0 173 errno = 0; /* FIXME, don't ignore errors! */
030fb5cb 174 /* What errors? {read,write}_memory call error(). */
41abdfbd 175}
41abdfbd
JG
176
177
178/* return pc value after skipping a function prologue. */
179
180skip_prologue (pc)
ecf4059f 181CORE_ADDR pc;
41abdfbd 182{
34df79fc 183 char buf[4];
41abdfbd 184 unsigned int tmp;
34df79fc 185 unsigned long op;
41abdfbd 186
34df79fc 187 if (target_read_memory (pc, buf, 4))
41abdfbd 188 return pc; /* Can't access it -- assume no prologue. */
34df79fc 189 op = extract_unsigned_integer (buf, 4);
41abdfbd
JG
190
191 /* Assume that subsequent fetches can fail with low probability. */
192
193 if (op == 0x7c0802a6) { /* mflr r0 */
194 pc += 4;
195 op = read_memory_integer (pc, 4);
196 }
41abdfbd
JG
197
198 if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */
199 pc += 4;
200 op = read_memory_integer (pc, 4);
201 }
202
203 if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
204 pc += 4;
205 op = read_memory_integer (pc, 4);
1eeba686
PB
206
207 /* At this point, make sure this is not a trampoline function
208 (a function that simply calls another functions, and nothing else).
209 If the next is not a nop, this branch was part of the function
210 prologue. */
211
212 if (op == 0x4def7b82 || /* crorc 15, 15, 15 */
213 op == 0x0)
214 return pc - 4; /* don't skip over this branch */
41abdfbd
JG
215 }
216
cdb1cc92
ILT
217 if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
218 pc += 4; /* store floating register double */
219 op = read_memory_integer (pc, 4);
220 }
221
41abdfbd
JG
222 if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */
223 pc += 4;
224 op = read_memory_integer (pc, 4);
225 }
226
227 while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */
228 (tmp == 0x9421) || /* stu r1, NUM(r1) */
cdb1cc92 229 (tmp == 0x93e1)) /* st r31,NUM(r1) */
41abdfbd
JG
230 {
231 pc += 4;
232 op = read_memory_integer (pc, 4);
233 }
234
235 while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */
236 pc += 4; /* l r30, ... */
237 op = read_memory_integer (pc, 4);
238 }
239
507e4004 240 /* store parameters into stack */
818de002
PB
241 while(
242 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
243 (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */
244 (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */
245 (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */
246 {
247 pc += 4; /* store fpr double */
248 op = read_memory_integer (pc, 4);
249 }
41abdfbd 250
d2985684
PS
251 if (op == 0x603f0000 /* oril r31, r1, 0x0 */
252 || op == 0x7c3f0b78) { /* mr r31, r1 */
41abdfbd
JG
253 pc += 4; /* this happens if r31 is used as */
254 op = read_memory_integer (pc, 4); /* frame ptr. (gcc does that) */
255
818de002
PB
256 tmp = 0;
257 while ((op >> 16) == (0x907f + tmp)) { /* st r3, NUM(r31) */
258 pc += 4; /* st r4, NUM(r31), ... */
41abdfbd 259 op = read_memory_integer (pc, 4);
818de002 260 tmp += 0x20;
41abdfbd
JG
261 }
262 }
507e4004
PB
263#if 0
264/* I have problems with skipping over __main() that I need to address
265 * sometime. Previously, I used to use misc_function_vector which
266 * didn't work as well as I wanted to be. -MGO */
267
268 /* If the first thing after skipping a prolog is a branch to a function,
269 this might be a call to an initializer in main(), introduced by gcc2.
270 We'd like to skip over it as well. Fortunately, xlc does some extra
271 work before calling a function right after a prologue, thus we can
272 single out such gcc2 behaviour. */
273
274
275 if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */
276 op = read_memory_integer (pc+4, 4);
277
278 if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */
279
280 /* check and see if we are in main. If so, skip over this initializer
281 function as well. */
282
283 tmp = find_pc_misc_function (pc);
2e4964ad 284 if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main"))
507e4004
PB
285 return pc + 8;
286 }
287 }
288#endif /* 0 */
289
41abdfbd
JG
290 return pc;
291}
292
818de002 293
41abdfbd
JG
294/*************************************************************************
295 Support for creating pushind a dummy frame into the stack, and popping
296 frames, etc.
297*************************************************************************/
298
818de002
PB
299/* The total size of dummy frame is 436, which is;
300
301 32 gpr's - 128 bytes
302 32 fpr's - 256 "
303 7 the rest - 28 "
304 and 24 extra bytes for the callee's link area. The last 24 bytes
305 for the link area might not be necessary, since it will be taken
306 care of by push_arguments(). */
307
308#define DUMMY_FRAME_SIZE 436
309
41abdfbd
JG
310#define DUMMY_FRAME_ADDR_SIZE 10
311
312/* Make sure you initialize these in somewhere, in case gdb gives up what it
818de002 313 was debugging and starts debugging something else. FIXMEibm */
41abdfbd
JG
314
315static int dummy_frame_count = 0;
316static int dummy_frame_size = 0;
317static CORE_ADDR *dummy_frame_addr = 0;
318
319extern int stop_stack_dummy;
320
321/* push a dummy frame into stack, save all register. Currently we are saving
322 only gpr's and fpr's, which is not good enough! FIXMEmgo */
323
ecf4059f 324void
41abdfbd
JG
325push_dummy_frame ()
326{
359a097f
JK
327 /* stack pointer. */
328 CORE_ADDR sp;
b112f2ae
JK
329 /* Same thing, target byte order. */
330 char sp_targ[4];
359a097f
JK
331
332 /* link register. */
333 CORE_ADDR pc;
334 /* Same thing, target byte order. */
335 char pc_targ[4];
336
41abdfbd
JG
337 int ii;
338
5f1c39ef 339 target_fetch_registers (-1);
6c6afbb9 340
41abdfbd
JG
341 if (dummy_frame_count >= dummy_frame_size) {
342 dummy_frame_size += DUMMY_FRAME_ADDR_SIZE;
343 if (dummy_frame_addr)
344 dummy_frame_addr = (CORE_ADDR*) xrealloc
345 (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size));
346 else
347 dummy_frame_addr = (CORE_ADDR*)
348 xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size));
349 }
350
351 sp = read_register(SP_REGNUM);
359a097f 352 pc = read_register(PC_REGNUM);
b112f2ae 353 store_address (pc, 4, pc_targ);
41abdfbd
JG
354
355 dummy_frame_addr [dummy_frame_count++] = sp;
356
357 /* Be careful! If the stack pointer is not decremented first, then kernel
6c6afbb9 358 thinks he is free to use the space underneath it. And kernel actually
41abdfbd
JG
359 uses that area for IPC purposes when executing ptrace(2) calls. So
360 before writing register values into the new frame, decrement and update
361 %sp first in order to secure your frame. */
362
818de002 363 write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE);
41abdfbd 364
41abdfbd
JG
365 /* gdb relies on the state of current_frame. We'd better update it,
366 otherwise things like do_registers_info() wouldn't work properly! */
367
368 flush_cached_frames ();
41abdfbd
JG
369
370 /* save program counter in link register's space. */
359a097f 371 write_memory (sp+8, pc_targ, 4);
41abdfbd 372
6c6afbb9 373 /* save all floating point and general purpose registers here. */
41abdfbd
JG
374
375 /* fpr's, f0..f31 */
376 for (ii = 0; ii < 32; ++ii)
377 write_memory (sp-8-(ii*8), &registers[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8);
378
379 /* gpr's r0..r31 */
380 for (ii=1; ii <=32; ++ii)
381 write_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
382
818de002
PB
383 /* so far, 32*2 + 32 words = 384 bytes have been written.
384 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */
385
386 for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) {
387 write_memory (sp-384-(ii*4),
388 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
389 }
390
391 /* Save sp or so called back chain right here. */
b112f2ae
JK
392 store_address (sp_targ, 4, sp);
393 write_memory (sp-DUMMY_FRAME_SIZE, sp_targ, 4);
818de002 394 sp -= DUMMY_FRAME_SIZE;
41abdfbd
JG
395
396 /* And finally, this is the back chain. */
359a097f 397 write_memory (sp+8, pc_targ, 4);
41abdfbd
JG
398}
399
400
401/* Pop a dummy frame.
402
403 In rs6000 when we push a dummy frame, we save all of the registers. This
404 is usually done before user calls a function explicitly.
405
818de002
PB
406 After a dummy frame is pushed, some instructions are copied into stack,
407 and stack pointer is decremented even more. Since we don't have a frame
408 pointer to get back to the parent frame of the dummy, we start having
409 trouble poping it. Therefore, we keep a dummy frame stack, keeping
410 addresses of dummy frames as such. When poping happens and when we
411 detect that was a dummy frame, we pop it back to its parent by using
412 dummy frame stack (`dummy_frame_addr' array).
ecf4059f
JG
413
414FIXME: This whole concept is broken. You should be able to detect
415a dummy stack frame *on the user's stack itself*. When you do,
416then you know the format of that stack frame -- including its
417saved SP register! There should *not* be a separate stack in the
d6434f39 418GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92
41abdfbd
JG
419 */
420
421pop_dummy_frame ()
422{
423 CORE_ADDR sp, pc;
424 int ii;
425 sp = dummy_frame_addr [--dummy_frame_count];
426
427 /* restore all fpr's. */
428 for (ii = 1; ii <= 32; ++ii)
429 read_memory (sp-(ii*8), &registers[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8);
430
431 /* restore all gpr's */
432 for (ii=1; ii <= 32; ++ii) {
433 read_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
434 }
435
818de002
PB
436 /* restore the rest of the registers. */
437 for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii)
438 read_memory (sp-384-(ii*4),
439 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
440
441 read_memory (sp-(DUMMY_FRAME_SIZE-8),
442 &registers [REGISTER_BYTE(PC_REGNUM)], 4);
41abdfbd
JG
443
444 /* when a dummy frame was being pushed, we had to decrement %sp first, in
445 order to secure astack space. Thus, saved %sp (or %r1) value, is not the
446 one we should restore. Change it with the one we need. */
447
448 *(int*)&registers [REGISTER_BYTE(FP_REGNUM)] = sp;
449
450 /* Now we can restore all registers. */
451
5f1c39ef 452 target_store_registers (-1);
41abdfbd
JG
453 pc = read_pc ();
454 flush_cached_frames ();
41abdfbd
JG
455}
456
457
458/* pop the innermost frame, go back to the caller. */
459
ecf4059f 460void
41abdfbd
JG
461pop_frame ()
462{
359a097f 463 CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */
6c6afbb9 464 struct aix_framedata fdata;
669caa9c 465 struct frame_info *frame = get_current_frame ();
41abdfbd 466 int addr, ii;
41abdfbd
JG
467
468 pc = read_pc ();
669caa9c 469 sp = FRAME_FP (frame);
41abdfbd
JG
470
471 if (stop_stack_dummy && dummy_frame_count) {
472 pop_dummy_frame ();
473 return;
474 }
475
07aa9fdc
PS
476 /* Make sure that all registers are valid. */
477 read_register_bytes (0, NULL, REGISTER_BYTES);
478
41abdfbd
JG
479 /* figure out previous %pc value. If the function is frameless, it is
480 still in the link register, otherwise walk the frames and retrieve the
481 saved %pc value in the previous frame. */
482
34a1a3bf 483 addr = get_pc_function_start (frame->pc) + FUNCTION_START_OFFSET;
6c6afbb9 484 function_frame_info (addr, &fdata);
41abdfbd 485
6c6afbb9 486 if (fdata.frameless)
07aa9fdc
PS
487 prev_sp = sp;
488 else
489 prev_sp = read_memory_integer (sp, 4);
490 if (fdata.nosavedpc)
41abdfbd
JG
491 lr = read_register (LR_REGNUM);
492 else
359a097f 493 lr = read_memory_integer (prev_sp+8, 4);
41abdfbd
JG
494
495 /* reset %pc value. */
496 write_register (PC_REGNUM, lr);
497
498 /* reset register values if any was saved earlier. */
6c6afbb9 499 addr = prev_sp - fdata.offset;
41abdfbd 500
6c6afbb9 501 if (fdata.saved_gpr != -1)
669caa9c 502 for (ii = fdata.saved_gpr; ii <= 31; ++ii) {
41abdfbd 503 read_memory (addr, &registers [REGISTER_BYTE (ii)], 4);
cdb1cc92 504 addr += 4;
41abdfbd
JG
505 }
506
6c6afbb9 507 if (fdata.saved_fpr != -1)
669caa9c 508 for (ii = fdata.saved_fpr; ii <= 31; ++ii) {
41abdfbd
JG
509 read_memory (addr, &registers [REGISTER_BYTE (ii+FP0_REGNUM)], 8);
510 addr += 8;
511 }
512
513 write_register (SP_REGNUM, prev_sp);
5f1c39ef 514 target_store_registers (-1);
41abdfbd 515 flush_cached_frames ();
41abdfbd
JG
516}
517
41abdfbd
JG
518/* fixup the call sequence of a dummy function, with the real function address.
519 its argumets will be passed by gdb. */
520
ecf4059f 521void
41abdfbd
JG
522fix_call_dummy(dummyname, pc, fun, nargs, type)
523 char *dummyname;
ecf4059f
JG
524 CORE_ADDR pc;
525 CORE_ADDR fun;
41abdfbd
JG
526 int nargs; /* not used */
527 int type; /* not used */
41abdfbd
JG
528{
529#define TOC_ADDR_OFFSET 20
530#define TARGET_ADDR_OFFSET 28
531
532 int ii;
ecf4059f
JG
533 CORE_ADDR target_addr;
534 CORE_ADDR tocvalue;
41abdfbd
JG
535
536 target_addr = fun;
537 tocvalue = find_toc_address (target_addr);
538
539 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET);
540 ii = (ii & 0xffff0000) | (tocvalue >> 16);
541 *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii;
542
543 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4);
544 ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff);
545 *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii;
546
547 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET);
548 ii = (ii & 0xffff0000) | (target_addr >> 16);
549 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii;
550
551 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4);
552 ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff);
553 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii;
554}
555
556
41abdfbd 557/* return information about a function frame.
6c6afbb9 558 in struct aix_frameinfo fdata:
cdb1cc92
ILT
559 - frameless is TRUE, if function does not have a frame.
560 - nosavedpc is TRUE, if function does not save %pc value in its frame.
41abdfbd
JG
561 - offset is the number of bytes used in the frame to save registers.
562 - saved_gpr is the number of the first saved gpr.
563 - saved_fpr is the number of the first saved fpr.
6c6afbb9
PB
564 - alloca_reg is the number of the register used for alloca() handling.
565 Otherwise -1.
41abdfbd 566 */
ecf4059f 567void
6c6afbb9 568function_frame_info (pc, fdata)
d6434f39 569 CORE_ADDR pc;
6c6afbb9 570 struct aix_framedata *fdata;
41abdfbd
JG
571{
572 unsigned int tmp;
573 register unsigned int op;
9ed8604f 574 char buf[4];
41abdfbd 575
6c6afbb9
PB
576 fdata->offset = 0;
577 fdata->saved_gpr = fdata->saved_fpr = fdata->alloca_reg = -1;
cdb1cc92 578 fdata->frameless = 1;
41abdfbd 579
9ed8604f
PS
580 /* Do not error out if we can't access the instructions. */
581 if (target_read_memory (pc, buf, 4))
582 return;
583 op = extract_unsigned_integer (buf, 4);
41abdfbd
JG
584 if (op == 0x7c0802a6) { /* mflr r0 */
585 pc += 4;
586 op = read_memory_integer (pc, 4);
cdb1cc92 587 fdata->nosavedpc = 0;
6c6afbb9 588 fdata->frameless = 0;
41abdfbd 589 }
cdb1cc92
ILT
590 else /* else, pc is not saved */
591 fdata->nosavedpc = 1;
41abdfbd
JG
592
593 if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */
594 pc += 4;
595 op = read_memory_integer (pc, 4);
cdb1cc92 596 fdata->frameless = 0;
41abdfbd
JG
597 }
598
599 if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
600 pc += 4;
601 op = read_memory_integer (pc, 4);
1eeba686
PB
602 /* At this point, make sure this is not a trampoline function
603 (a function that simply calls another functions, and nothing else).
604 If the next is not a nop, this branch was part of the function
605 prologue. */
606
607 if (op == 0x4def7b82 || /* crorc 15, 15, 15 */
608 op == 0x0)
609 return; /* prologue is over */
cdb1cc92 610 fdata->frameless = 0;
41abdfbd
JG
611 }
612
613 if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
614 pc += 4; /* store floating register double */
615 op = read_memory_integer (pc, 4);
cdb1cc92 616 fdata->frameless = 0;
41abdfbd
JG
617 }
618
619 if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */
620 int tmp2;
6c6afbb9 621 fdata->saved_gpr = (op >> 21) & 0x1f;
41abdfbd
JG
622 tmp2 = op & 0xffff;
623 if (tmp2 > 0x7fff)
cdb1cc92 624 tmp2 = (~0 &~ 0xffff) | tmp2;
41abdfbd
JG
625
626 if (tmp2 < 0) {
627 tmp2 = tmp2 * -1;
6c6afbb9
PB
628 fdata->saved_fpr = (tmp2 - ((32 - fdata->saved_gpr) * 4)) / 8;
629 if ( fdata->saved_fpr > 0)
630 fdata->saved_fpr = 32 - fdata->saved_fpr;
41abdfbd 631 else
6c6afbb9 632 fdata->saved_fpr = -1;
41abdfbd 633 }
6c6afbb9
PB
634 fdata->offset = tmp2;
635 pc += 4;
636 op = read_memory_integer (pc, 4);
cdb1cc92 637 fdata->frameless = 0;
41abdfbd 638 }
6c6afbb9
PB
639
640 while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */
641 (tmp == 0x9421) || /* stu r1, NUM(r1) */
cdb1cc92 642 (tmp == 0x93e1)) /* st r31, NUM(r1) */
6c6afbb9 643 {
cdb1cc92
ILT
644 int tmp2;
645
6c6afbb9
PB
646 /* gcc takes a short cut and uses this instruction to save r31 only. */
647
cdb1cc92 648 if (tmp == 0x93e1) {
6c6afbb9
PB
649 if (fdata->offset)
650/* fatal ("Unrecognized prolog."); */
199b2450 651 printf_unfiltered ("Unrecognized prolog!\n");
6c6afbb9
PB
652
653 fdata->saved_gpr = 31;
cdb1cc92
ILT
654 tmp2 = op & 0xffff;
655 if (tmp2 > 0x7fff) {
656 tmp2 = - ((~0 &~ 0xffff) | tmp2);
657 fdata->saved_fpr = (tmp2 - ((32 - 31) * 4)) / 8;
658 if ( fdata->saved_fpr > 0)
659 fdata->saved_fpr = 32 - fdata->saved_fpr;
660 else
661 fdata->saved_fpr = -1;
662 }
663 fdata->offset = tmp2;
6c6afbb9
PB
664 }
665 pc += 4;
666 op = read_memory_integer (pc, 4);
cdb1cc92 667 fdata->frameless = 0;
6c6afbb9
PB
668 }
669
670 while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */
671 pc += 4; /* l r30, ... */
672 op = read_memory_integer (pc, 4);
cdb1cc92 673 fdata->frameless = 0;
6c6afbb9
PB
674 }
675
676 /* store parameters into stack */
677 while(
678 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
679 (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */
680 (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */
681 (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */
682 {
683 pc += 4; /* store fpr double */
684 op = read_memory_integer (pc, 4);
cdb1cc92 685 fdata->frameless = 0;
6c6afbb9
PB
686 }
687
07aa9fdc
PS
688 if (op == 0x603f0000 /* oril r31, r1, 0x0 */
689 || op == 0x7c3f0b78) /* mr r31, r1 */
690 {
691 fdata->alloca_reg = 31;
692 fdata->frameless = 0;
693 }
41abdfbd
JG
694}
695
696
697/* Pass the arguments in either registers, or in the stack. In RS6000, the first
698 eight words of the argument list (that might be less than eight parameters if
699 some parameters occupy more than one word) are passed in r3..r11 registers.
700 float and double parameters are passed in fpr's, in addition to that. Rest of
701 the parameters if any are passed in user stack. There might be cases in which
702 half of the parameter is copied into registers, the other half is pushed into
703 stack.
704
705 If the function is returning a structure, then the return address is passed
706 in r3, then the first 7 words of the parametes can be passed in registers,
707 starting from r4. */
708
709CORE_ADDR
710push_arguments (nargs, args, sp, struct_return, struct_addr)
711 int nargs;
17221e41 712 value_ptr *args;
41abdfbd
JG
713 CORE_ADDR sp;
714 int struct_return;
715 CORE_ADDR struct_addr;
716{
717 int ii, len;
718 int argno; /* current argument number */
719 int argbytes; /* current argument byte */
720 char tmp_buffer [50];
17221e41 721 value_ptr arg;
41abdfbd
JG
722 int f_argno = 0; /* current floating point argno */
723
724 CORE_ADDR saved_sp, pc;
725
726 if ( dummy_frame_count <= 0)
199b2450 727 printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n");
41abdfbd
JG
728
729 /* The first eight words of ther arguments are passed in registers. Copy
730 them appropriately.
731
732 If the function is returning a `struct', then the first word (which
733 will be passed in r3) is used for struct return address. In that
734 case we should advance one word and start from r4 register to copy
735 parameters. */
736
737 ii = struct_return ? 1 : 0;
738
739 for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) {
740
5222ca60 741 arg = args[argno];
41abdfbd
JG
742 len = TYPE_LENGTH (VALUE_TYPE (arg));
743
744 if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT) {
745
746 /* floating point arguments are passed in fpr's, as well as gpr's.
747 There are 13 fpr's reserved for passing parameters. At this point
748 there is no way we would run out of them. */
749
750 if (len > 8)
199b2450 751 printf_unfiltered (
41abdfbd
JG
752"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
753
ade40d31
RP
754 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
755 len);
41abdfbd
JG
756 ++f_argno;
757 }
758
759 if (len > 4) {
760
761 /* Argument takes more than one register. */
762 while (argbytes < len) {
763
764 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31
RP
765 memcpy (&registers[REGISTER_BYTE(ii+3)],
766 ((char*)VALUE_CONTENTS (arg))+argbytes,
41abdfbd
JG
767 (len - argbytes) > 4 ? 4 : len - argbytes);
768 ++ii, argbytes += 4;
769
770 if (ii >= 8)
771 goto ran_out_of_registers_for_arguments;
772 }
773 argbytes = 0;
774 --ii;
775 }
776 else { /* Argument can fit in one register. No problem. */
777 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31 778 memcpy (&registers[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len);
41abdfbd
JG
779 }
780 ++argno;
781 }
782
783ran_out_of_registers_for_arguments:
784
785 /* location for 8 parameters are always reserved. */
786 sp -= 4 * 8;
787
788 /* another six words for back chain, TOC register, link register, etc. */
789 sp -= 24;
790
791 /* if there are more arguments, allocate space for them in
792 the stack, then push them starting from the ninth one. */
793
794 if ((argno < nargs) || argbytes) {
795 int space = 0, jj;
17221e41 796 value_ptr val;
41abdfbd
JG
797
798 if (argbytes) {
799 space += ((len - argbytes + 3) & -4);
800 jj = argno + 1;
801 }
802 else
803 jj = argno;
804
805 for (; jj < nargs; ++jj) {
5222ca60 806 val = args[jj];
41abdfbd
JG
807 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
808 }
809
810 /* add location required for the rest of the parameters */
811 space = (space + 7) & -8;
812 sp -= space;
813
814 /* This is another instance we need to be concerned about securing our
815 stack space. If we write anything underneath %sp (r1), we might conflict
816 with the kernel who thinks he is free to use this area. So, update %sp
817 first before doing anything else. */
818
819 write_register (SP_REGNUM, sp);
820
41abdfbd
JG
821 /* if the last argument copied into the registers didn't fit there
822 completely, push the rest of it into stack. */
823
824 if (argbytes) {
825 write_memory (
826 sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes);
827 ++argno;
828 ii += ((len - argbytes + 3) & -4) / 4;
829 }
830
831 /* push the rest of the arguments into stack. */
832 for (; argno < nargs; ++argno) {
833
5222ca60 834 arg = args[argno];
41abdfbd
JG
835 len = TYPE_LENGTH (VALUE_TYPE (arg));
836
837
838 /* float types should be passed in fpr's, as well as in the stack. */
839 if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT && f_argno < 13) {
840
841 if (len > 8)
199b2450 842 printf_unfiltered (
41abdfbd
JG
843"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
844
ade40d31
RP
845 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
846 len);
41abdfbd
JG
847 ++f_argno;
848 }
849
359a097f 850 write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len);
41abdfbd
JG
851 ii += ((len + 3) & -4) / 4;
852 }
853 }
6c6afbb9 854 else
41abdfbd
JG
855 /* Secure stack areas first, before doing anything else. */
856 write_register (SP_REGNUM, sp);
857
41abdfbd
JG
858 saved_sp = dummy_frame_addr [dummy_frame_count - 1];
859 read_memory (saved_sp, tmp_buffer, 24);
860 write_memory (sp, tmp_buffer, 24);
861
b112f2ae
JK
862 /* set back chain properly */
863 store_address (tmp_buffer, 4, saved_sp);
864 write_memory (sp, tmp_buffer, 4);
41abdfbd 865
5f1c39ef 866 target_store_registers (-1);
41abdfbd
JG
867 return sp;
868}
869
870/* a given return value in `regbuf' with a type `valtype', extract and copy its
871 value into `valbuf' */
872
ecf4059f 873void
41abdfbd
JG
874extract_return_value (valtype, regbuf, valbuf)
875 struct type *valtype;
876 char regbuf[REGISTER_BYTES];
877 char *valbuf;
878{
879
880 if (TYPE_CODE (valtype) == TYPE_CODE_FLT) {
881
882 double dd; float ff;
883 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
884 We need to truncate the return value into float size (4 byte) if
885 necessary. */
886
887 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
ade40d31 888 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)],
41abdfbd
JG
889 TYPE_LENGTH (valtype));
890 else { /* float */
ade40d31 891 memcpy (&dd, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
41abdfbd 892 ff = (float)dd;
ade40d31 893 memcpy (valbuf, &ff, sizeof(float));
41abdfbd
JG
894 }
895 }
896 else
897 /* return value is copied starting from r3. */
ade40d31 898 memcpy (valbuf, &regbuf[REGISTER_BYTE (3)], TYPE_LENGTH (valtype));
41abdfbd
JG
899}
900
901
ecf4059f
JG
902/* keep structure return address in this variable.
903 FIXME: This is a horrid kludge which should not be allowed to continue
904 living. This only allows a single nested call to a structure-returning
905 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
41abdfbd
JG
906
907CORE_ADDR rs6000_struct_return_address;
908
909
c2e4669f
JG
910/* Indirect function calls use a piece of trampoline code to do context
911 switching, i.e. to set the new TOC table. Skip such code if we are on
912 its first instruction (as when we have single-stepped to here).
07aa9fdc
PS
913 Also skip shared library trampoline code (which is different from
914 indirect function call trampolines).
c2e4669f
JG
915 Result is desired PC to step until, or NULL if we are not in
916 trampoline code. */
41abdfbd 917
ecf4059f 918CORE_ADDR
41abdfbd 919skip_trampoline_code (pc)
ecf4059f 920CORE_ADDR pc;
41abdfbd
JG
921{
922 register unsigned int ii, op;
07aa9fdc 923 CORE_ADDR solib_target_pc;
41abdfbd
JG
924
925 static unsigned trampoline_code[] = {
926 0x800b0000, /* l r0,0x0(r11) */
927 0x90410014, /* st r2,0x14(r1) */
928 0x7c0903a6, /* mtctr r0 */
929 0x804b0004, /* l r2,0x4(r11) */
930 0x816b0008, /* l r11,0x8(r11) */
931 0x4e800420, /* bctr */
932 0x4e800020, /* br */
933 0
934 };
935
07aa9fdc
PS
936 /* If pc is in a shared library trampoline, return its target. */
937 solib_target_pc = find_solib_trampoline_target (pc);
938 if (solib_target_pc)
939 return solib_target_pc;
940
41abdfbd
JG
941 for (ii=0; trampoline_code[ii]; ++ii) {
942 op = read_memory_integer (pc + (ii*4), 4);
943 if (op != trampoline_code [ii])
359a097f 944 return 0;
41abdfbd
JG
945 }
946 ii = read_register (11); /* r11 holds destination addr */
947 pc = read_memory_integer (ii, 4); /* (r11) value */
948 return pc;
949}
950
ecf4059f
JG
951
952/* Determines whether the function FI has a frame on the stack or not.
cdb1cc92
ILT
953 Called from the FRAMELESS_FUNCTION_INVOCATION macro in tm.h with a
954 second argument of 0, and from the FRAME_SAVED_PC macro with a
955 second argument of 1. */
ecf4059f
JG
956
957int
cdb1cc92 958frameless_function_invocation (fi, pcsaved)
ecf4059f 959struct frame_info *fi;
cdb1cc92 960int pcsaved;
ecf4059f
JG
961{
962 CORE_ADDR func_start;
963 struct aix_framedata fdata;
964
b0e932ad
JK
965 if (fi->next != NULL)
966 /* Don't even think about framelessness except on the innermost frame. */
3f528883
JK
967 /* FIXME: Can also be frameless if fi->next->signal_handler_caller (if
968 a signal happens while executing in a frameless function). */
b0e932ad
JK
969 return 0;
970
ecf4059f
JG
971 func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
972
973 /* If we failed to find the start of the function, it is a mistake
974 to inspect the instructions. */
975
976 if (!func_start)
977 return 0;
978
979 function_frame_info (func_start, &fdata);
cdb1cc92 980 return pcsaved ? fdata.nosavedpc : fdata.frameless;
ecf4059f
JG
981}
982
983
984/* If saved registers of frame FI are not known yet, read and cache them.
985 &FDATAP contains aix_framedata; TDATAP can be NULL,
986 in which case the framedata are read. */
987
988static void
989frame_get_cache_fsr (fi, fdatap)
990 struct frame_info *fi;
991 struct aix_framedata *fdatap;
992{
993 int ii;
994 CORE_ADDR frame_addr;
995 struct aix_framedata work_fdata;
996
997 if (fi->cache_fsr)
998 return;
999
1000 if (fdatap == NULL) {
1001 fdatap = &work_fdata;
1002 function_frame_info (get_pc_function_start (fi->pc), fdatap);
1003 }
1004
1005 fi->cache_fsr = (struct frame_saved_regs *)
1006 obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs));
4ed97c9a 1007 memset (fi->cache_fsr, '\0', sizeof (struct frame_saved_regs));
ecf4059f
JG
1008
1009 if (fi->prev && fi->prev->frame)
1010 frame_addr = fi->prev->frame;
1011 else
1012 frame_addr = read_memory_integer (fi->frame, 4);
1013
1014 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1015 All fpr's from saved_fpr to fp31 are saved right underneath caller
1016 stack pointer, starting from fp31 first. */
1017
1018 if (fdatap->saved_fpr >= 0) {
1019 for (ii=31; ii >= fdatap->saved_fpr; --ii)
1020 fi->cache_fsr->regs [FP0_REGNUM + ii] = frame_addr - ((32 - ii) * 8);
1021 frame_addr -= (32 - fdatap->saved_fpr) * 8;
1022 }
1023
1024 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1025 All gpr's from saved_gpr to gpr31 are saved right under saved fprs,
1026 starting from r31 first. */
1027
1028 if (fdatap->saved_gpr >= 0)
1029 for (ii=31; ii >= fdatap->saved_gpr; --ii)
1030 fi->cache_fsr->regs [ii] = frame_addr - ((32 - ii) * 4);
1031}
1032
1033/* Return the address of a frame. This is the inital %sp value when the frame
1034 was first allocated. For functions calling alloca(), it might be saved in
1035 an alloca register. */
1036
1037CORE_ADDR
1038frame_initial_stack_address (fi)
1039 struct frame_info *fi;
1040{
1041 CORE_ADDR tmpaddr;
1042 struct aix_framedata fdata;
1043 struct frame_info *callee_fi;
1044
1045 /* if the initial stack pointer (frame address) of this frame is known,
1046 just return it. */
1047
1048 if (fi->initial_sp)
1049 return fi->initial_sp;
1050
1051 /* find out if this function is using an alloca register.. */
1052
1053 function_frame_info (get_pc_function_start (fi->pc), &fdata);
1054
1055 /* if saved registers of this frame are not known yet, read and cache them. */
1056
1057 if (!fi->cache_fsr)
1058 frame_get_cache_fsr (fi, &fdata);
1059
1060 /* If no alloca register used, then fi->frame is the value of the %sp for
1061 this frame, and it is good enough. */
1062
1063 if (fdata.alloca_reg < 0) {
1064 fi->initial_sp = fi->frame;
1065 return fi->initial_sp;
1066 }
1067
1068 /* This function has an alloca register. If this is the top-most frame
1069 (with the lowest address), the value in alloca register is good. */
1070
1071 if (!fi->next)
1072 return fi->initial_sp = read_register (fdata.alloca_reg);
1073
1074 /* Otherwise, this is a caller frame. Callee has usually already saved
1075 registers, but there are exceptions (such as when the callee
1076 has no parameters). Find the address in which caller's alloca
1077 register is saved. */
1078
1079 for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
1080
1081 if (!callee_fi->cache_fsr)
cdb1cc92 1082 frame_get_cache_fsr (callee_fi, NULL);
ecf4059f
JG
1083
1084 /* this is the address in which alloca register is saved. */
1085
1086 tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg];
1087 if (tmpaddr) {
1088 fi->initial_sp = read_memory_integer (tmpaddr, 4);
1089 return fi->initial_sp;
1090 }
1091
1092 /* Go look into deeper levels of the frame chain to see if any one of
1093 the callees has saved alloca register. */
1094 }
1095
1096 /* If alloca register was not saved, by the callee (or any of its callees)
1097 then the value in the register is still good. */
1098
1099 return fi->initial_sp = read_register (fdata.alloca_reg);
1100}
1101
669caa9c 1102CORE_ADDR
f3649227
JK
1103rs6000_frame_chain (thisframe)
1104 struct frame_info *thisframe;
1105{
669caa9c 1106 CORE_ADDR fp;
f3649227
JK
1107 if (inside_entry_file ((thisframe)->pc))
1108 return 0;
cee86be3 1109 if (thisframe->signal_handler_caller)
9ed8604f 1110 fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4);
cee86be3
JK
1111 else
1112 fp = read_memory_integer ((thisframe)->frame, 4);
1113
f3649227
JK
1114 return fp;
1115}
ecf4059f
JG
1116\f
1117/* Keep an array of load segment information and their TOC table addresses.
1118 This info will be useful when calling a shared library function by hand. */
1119
1120struct loadinfo {
1121 CORE_ADDR textorg, dataorg;
1122 unsigned long toc_offset;
1123};
1124
1125#define LOADINFOLEN 10
1126
ecf4059f
JG
1127static struct loadinfo *loadinfo = NULL;
1128static int loadinfolen = 0;
1129static int loadinfotocindex = 0;
3c02636b 1130static int loadinfotextindex = 0;
ecf4059f
JG
1131
1132
1133void
1134xcoff_init_loadinfo ()
1135{
1136 loadinfotocindex = 0;
1137 loadinfotextindex = 0;
1138
1139 if (loadinfolen == 0) {
1140 loadinfo = (struct loadinfo *)
1141 xmalloc (sizeof (struct loadinfo) * LOADINFOLEN);
1142 loadinfolen = LOADINFOLEN;
1143 }
1144}
1145
1146
1147/* FIXME -- this is never called! */
1148void
1149free_loadinfo ()
1150{
1151 if (loadinfo)
1152 free (loadinfo);
1153 loadinfo = NULL;
1154 loadinfolen = 0;
1155 loadinfotocindex = 0;
1156 loadinfotextindex = 0;
1157}
1158
1159/* this is called from xcoffread.c */
1160
1161void
1162xcoff_add_toc_to_loadinfo (unsigned long tocoff)
1163{
1164 while (loadinfotocindex >= loadinfolen) {
1165 loadinfolen += LOADINFOLEN;
1166 loadinfo = (struct loadinfo *)
1167 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1168 }
1169 loadinfo [loadinfotocindex++].toc_offset = tocoff;
1170}
1171
2aefe6e4 1172void
ecf4059f
JG
1173add_text_to_loadinfo (textaddr, dataaddr)
1174 CORE_ADDR textaddr;
1175 CORE_ADDR dataaddr;
1176{
1177 while (loadinfotextindex >= loadinfolen) {
1178 loadinfolen += LOADINFOLEN;
1179 loadinfo = (struct loadinfo *)
1180 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1181 }
1182 loadinfo [loadinfotextindex].textorg = textaddr;
1183 loadinfo [loadinfotextindex].dataorg = dataaddr;
1184 ++loadinfotextindex;
1185}
1186
1187
1188/* FIXME: This assumes that the "textorg" and "dataorg" elements
1189 of a member of this array are correlated with the "toc_offset"
1190 element of the same member. But they are sequentially assigned in wildly
1191 different places, and probably there is no correlation. FIXME! */
1192
1193static CORE_ADDR
1194find_toc_address (pc)
1195 CORE_ADDR pc;
1196{
1197 int ii, toc_entry, tocbase = 0;
1198
1199 for (ii=0; ii < loadinfotextindex; ++ii)
1200 if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) {
1201 toc_entry = ii;
1202 tocbase = loadinfo[ii].textorg;
1203 }
1204
1205 return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset;
1206}
18b46e7c
SS
1207
1208void
1209_initialize_rs6000_tdep ()
1210{
1211 /* FIXME, this should not be decided via ifdef. */
1212#ifdef GDB_TARGET_POWERPC
1213 tm_print_insn = print_insn_big_powerpc;
1214#else
1215 tm_print_insn = print_insn_rs6000;
1216#endif
1217}
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