* gdb.disasm/hppa.exp (all_fpu_comparison_tests): Only
[deliverable/binutils-gdb.git] / gdb / rs6000-tdep.c
CommitLineData
41abdfbd 1/* Target-dependent code for GDB, the GNU debugger.
18b46e7c 2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995
07aa9fdc 3 Free Software Foundation, Inc.
41abdfbd
JG
4
5This file is part of GDB.
6
7This program is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2 of the License, or
10(at your option) any later version.
11
12This program is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with this program; if not, write to the Free Software
19Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
20
41abdfbd 21#include "defs.h"
41abdfbd
JG
22#include "frame.h"
23#include "inferior.h"
24#include "symtab.h"
25#include "target.h"
030fb5cb 26#include "gdbcore.h"
41abdfbd 27
2aefe6e4
JK
28#include "xcoffsolib.h"
29
41abdfbd 30#include <a.out.h>
d6434f39
JG
31
32extern struct obstack frame_cache_obstack;
33
41abdfbd 34extern int errno;
41abdfbd
JG
35
36/* Nonzero if we just simulated a single step break. */
37int one_stepped;
38
41abdfbd
JG
39/* Breakpoint shadows for the single step instructions will be kept here. */
40
41static struct sstep_breaks {
030fb5cb
JK
42 /* Address, or 0 if this is not in use. */
43 CORE_ADDR address;
44 /* Shadow contents. */
45 char data[4];
41abdfbd
JG
46} stepBreaks[2];
47
ecf4059f
JG
48/* Static function prototypes */
49
ecf4059f
JG
50static CORE_ADDR
51find_toc_address PARAMS ((CORE_ADDR pc));
52
53static CORE_ADDR
54branch_dest PARAMS ((int opcode, int instr, CORE_ADDR pc, CORE_ADDR safety));
55
56static void
57frame_get_cache_fsr PARAMS ((struct frame_info *fi,
58 struct aix_framedata *fdatap));
41abdfbd
JG
59
60/*
61 * Calculate the destination of a branch/jump. Return -1 if not a branch.
62 */
ecf4059f 63static CORE_ADDR
41abdfbd 64branch_dest (opcode, instr, pc, safety)
ecf4059f
JG
65 int opcode;
66 int instr;
67 CORE_ADDR pc;
68 CORE_ADDR safety;
41abdfbd
JG
69{
70 register long offset;
ecf4059f 71 CORE_ADDR dest;
41abdfbd
JG
72 int immediate;
73 int absolute;
74 int ext_op;
75
76 absolute = (int) ((instr >> 1) & 1);
77
78 switch (opcode) {
79 case 18 :
ecf4059f 80 immediate = ((instr & ~3) << 6) >> 6; /* br unconditional */
dc59e982
MM
81 if (absolute)
82 dest = immediate;
83 else
84 dest = pc + immediate;
85 break;
41abdfbd
JG
86
87 case 16 :
dc59e982 88 immediate = ((instr & ~3) << 16) >> 16; /* br conditional */
41abdfbd
JG
89 if (absolute)
90 dest = immediate;
91 else
92 dest = pc + immediate;
93 break;
94
95 case 19 :
96 ext_op = (instr>>1) & 0x3ff;
97
98 if (ext_op == 16) /* br conditional register */
99 dest = read_register (LR_REGNUM) & ~3;
100
101 else if (ext_op == 528) /* br cond to count reg */
9aa31e91
JK
102 {
103 dest = read_register (CTR_REGNUM) & ~3;
104
105 /* If we are about to execute a system call, dest is something
106 like 0x22fc or 0x3b00. Upon completion the system call
107 will return to the address in the link register. */
108 if (dest < TEXT_SEGMENT_BASE)
109 dest = read_register (LR_REGNUM) & ~3;
110 }
41abdfbd
JG
111 else return -1;
112 break;
113
114 default: return -1;
115 }
818de002 116 return (dest < TEXT_SEGMENT_BASE) ? safety : dest;
41abdfbd
JG
117}
118
119
120
121/* AIX does not support PT_STEP. Simulate it. */
122
997cc2c0 123void
41abdfbd 124single_step (signal)
997cc2c0 125 int signal;
41abdfbd
JG
126{
127#define INSNLEN(OPCODE) 4
128
129 static char breakp[] = BREAKPOINT;
030fb5cb
JK
130 int ii, insn;
131 CORE_ADDR loc;
132 CORE_ADDR breaks[2];
133 int opcode;
41abdfbd
JG
134
135 if (!one_stepped) {
41abdfbd
JG
136 loc = read_pc ();
137
359a097f 138 read_memory (loc, (char *) &insn, 4);
41abdfbd
JG
139
140 breaks[0] = loc + INSNLEN(insn);
141 opcode = insn >> 26;
142 breaks[1] = branch_dest (opcode, insn, loc, breaks[0]);
143
818de002
PB
144 /* Don't put two breakpoints on the same address. */
145 if (breaks[1] == breaks[0])
146 breaks[1] = -1;
147
030fb5cb 148 stepBreaks[1].address = 0;
41abdfbd
JG
149
150 for (ii=0; ii < 2; ++ii) {
151
152 /* ignore invalid breakpoint. */
153 if ( breaks[ii] == -1)
154 continue;
155
030fb5cb 156 read_memory (breaks[ii], stepBreaks[ii].data, 4);
41abdfbd 157
030fb5cb 158 write_memory (breaks[ii], breakp, 4);
41abdfbd
JG
159 stepBreaks[ii].address = breaks[ii];
160 }
161
162 one_stepped = 1;
997cc2c0 163 } else {
41abdfbd
JG
164
165 /* remove step breakpoints. */
166 for (ii=0; ii < 2; ++ii)
030fb5cb 167 if (stepBreaks[ii].address != 0)
41abdfbd 168 write_memory
030fb5cb 169 (stepBreaks[ii].address, stepBreaks[ii].data, 4);
41abdfbd
JG
170
171 one_stepped = 0;
172 }
997cc2c0 173 errno = 0; /* FIXME, don't ignore errors! */
030fb5cb 174 /* What errors? {read,write}_memory call error(). */
41abdfbd 175}
41abdfbd
JG
176
177
178/* return pc value after skipping a function prologue. */
179
180skip_prologue (pc)
ecf4059f 181CORE_ADDR pc;
41abdfbd 182{
34df79fc 183 char buf[4];
41abdfbd 184 unsigned int tmp;
34df79fc 185 unsigned long op;
41abdfbd 186
34df79fc 187 if (target_read_memory (pc, buf, 4))
41abdfbd 188 return pc; /* Can't access it -- assume no prologue. */
34df79fc 189 op = extract_unsigned_integer (buf, 4);
41abdfbd
JG
190
191 /* Assume that subsequent fetches can fail with low probability. */
192
193 if (op == 0x7c0802a6) { /* mflr r0 */
194 pc += 4;
195 op = read_memory_integer (pc, 4);
196 }
41abdfbd
JG
197
198 if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */
199 pc += 4;
200 op = read_memory_integer (pc, 4);
201 }
202
203 if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
204 pc += 4;
205 op = read_memory_integer (pc, 4);
1eeba686
PB
206
207 /* At this point, make sure this is not a trampoline function
208 (a function that simply calls another functions, and nothing else).
209 If the next is not a nop, this branch was part of the function
210 prologue. */
211
212 if (op == 0x4def7b82 || /* crorc 15, 15, 15 */
213 op == 0x0)
214 return pc - 4; /* don't skip over this branch */
41abdfbd
JG
215 }
216
cdb1cc92
ILT
217 if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
218 pc += 4; /* store floating register double */
219 op = read_memory_integer (pc, 4);
220 }
221
41abdfbd
JG
222 if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */
223 pc += 4;
224 op = read_memory_integer (pc, 4);
225 }
226
227 while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */
228 (tmp == 0x9421) || /* stu r1, NUM(r1) */
cdb1cc92 229 (tmp == 0x93e1)) /* st r31,NUM(r1) */
41abdfbd
JG
230 {
231 pc += 4;
232 op = read_memory_integer (pc, 4);
233 }
234
235 while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */
236 pc += 4; /* l r30, ... */
237 op = read_memory_integer (pc, 4);
238 }
239
507e4004 240 /* store parameters into stack */
818de002
PB
241 while(
242 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
243 (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */
244 (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */
245 (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */
246 {
247 pc += 4; /* store fpr double */
248 op = read_memory_integer (pc, 4);
249 }
41abdfbd 250
d2985684
PS
251 if (op == 0x603f0000 /* oril r31, r1, 0x0 */
252 || op == 0x7c3f0b78) { /* mr r31, r1 */
41abdfbd
JG
253 pc += 4; /* this happens if r31 is used as */
254 op = read_memory_integer (pc, 4); /* frame ptr. (gcc does that) */
255
818de002
PB
256 tmp = 0;
257 while ((op >> 16) == (0x907f + tmp)) { /* st r3, NUM(r31) */
258 pc += 4; /* st r4, NUM(r31), ... */
41abdfbd 259 op = read_memory_integer (pc, 4);
818de002 260 tmp += 0x20;
41abdfbd
JG
261 }
262 }
507e4004
PB
263#if 0
264/* I have problems with skipping over __main() that I need to address
265 * sometime. Previously, I used to use misc_function_vector which
266 * didn't work as well as I wanted to be. -MGO */
267
268 /* If the first thing after skipping a prolog is a branch to a function,
269 this might be a call to an initializer in main(), introduced by gcc2.
270 We'd like to skip over it as well. Fortunately, xlc does some extra
271 work before calling a function right after a prologue, thus we can
272 single out such gcc2 behaviour. */
273
274
275 if ((op & 0xfc000001) == 0x48000001) { /* bl foo, an initializer function? */
276 op = read_memory_integer (pc+4, 4);
277
278 if (op == 0x4def7b82) { /* cror 0xf, 0xf, 0xf (nop) */
279
280 /* check and see if we are in main. If so, skip over this initializer
281 function as well. */
282
283 tmp = find_pc_misc_function (pc);
2e4964ad 284 if (tmp >= 0 && STREQ (misc_function_vector [tmp].name, "main"))
507e4004
PB
285 return pc + 8;
286 }
287 }
288#endif /* 0 */
289
41abdfbd
JG
290 return pc;
291}
292
818de002 293
41abdfbd
JG
294/*************************************************************************
295 Support for creating pushind a dummy frame into the stack, and popping
296 frames, etc.
297*************************************************************************/
298
818de002
PB
299/* The total size of dummy frame is 436, which is;
300
301 32 gpr's - 128 bytes
302 32 fpr's - 256 "
303 7 the rest - 28 "
304 and 24 extra bytes for the callee's link area. The last 24 bytes
305 for the link area might not be necessary, since it will be taken
306 care of by push_arguments(). */
307
308#define DUMMY_FRAME_SIZE 436
309
41abdfbd
JG
310#define DUMMY_FRAME_ADDR_SIZE 10
311
312/* Make sure you initialize these in somewhere, in case gdb gives up what it
818de002 313 was debugging and starts debugging something else. FIXMEibm */
41abdfbd
JG
314
315static int dummy_frame_count = 0;
316static int dummy_frame_size = 0;
317static CORE_ADDR *dummy_frame_addr = 0;
318
319extern int stop_stack_dummy;
320
321/* push a dummy frame into stack, save all register. Currently we are saving
322 only gpr's and fpr's, which is not good enough! FIXMEmgo */
323
ecf4059f 324void
41abdfbd
JG
325push_dummy_frame ()
326{
359a097f
JK
327 /* stack pointer. */
328 CORE_ADDR sp;
329
330 /* link register. */
331 CORE_ADDR pc;
332 /* Same thing, target byte order. */
333 char pc_targ[4];
334
41abdfbd
JG
335 int ii;
336
5f1c39ef 337 target_fetch_registers (-1);
6c6afbb9 338
41abdfbd
JG
339 if (dummy_frame_count >= dummy_frame_size) {
340 dummy_frame_size += DUMMY_FRAME_ADDR_SIZE;
341 if (dummy_frame_addr)
342 dummy_frame_addr = (CORE_ADDR*) xrealloc
343 (dummy_frame_addr, sizeof(CORE_ADDR) * (dummy_frame_size));
344 else
345 dummy_frame_addr = (CORE_ADDR*)
346 xmalloc (sizeof(CORE_ADDR) * (dummy_frame_size));
347 }
348
349 sp = read_register(SP_REGNUM);
359a097f
JK
350 pc = read_register(PC_REGNUM);
351 memcpy (pc_targ, (char *) &pc, 4);
41abdfbd
JG
352
353 dummy_frame_addr [dummy_frame_count++] = sp;
354
355 /* Be careful! If the stack pointer is not decremented first, then kernel
6c6afbb9 356 thinks he is free to use the space underneath it. And kernel actually
41abdfbd
JG
357 uses that area for IPC purposes when executing ptrace(2) calls. So
358 before writing register values into the new frame, decrement and update
359 %sp first in order to secure your frame. */
360
818de002 361 write_register (SP_REGNUM, sp-DUMMY_FRAME_SIZE);
41abdfbd 362
41abdfbd
JG
363 /* gdb relies on the state of current_frame. We'd better update it,
364 otherwise things like do_registers_info() wouldn't work properly! */
365
366 flush_cached_frames ();
41abdfbd
JG
367
368 /* save program counter in link register's space. */
359a097f 369 write_memory (sp+8, pc_targ, 4);
41abdfbd 370
6c6afbb9 371 /* save all floating point and general purpose registers here. */
41abdfbd
JG
372
373 /* fpr's, f0..f31 */
374 for (ii = 0; ii < 32; ++ii)
375 write_memory (sp-8-(ii*8), &registers[REGISTER_BYTE (31-ii+FP0_REGNUM)], 8);
376
377 /* gpr's r0..r31 */
378 for (ii=1; ii <=32; ++ii)
379 write_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
380
818de002
PB
381 /* so far, 32*2 + 32 words = 384 bytes have been written.
382 7 extra registers in our register set: pc, ps, cnd, lr, cnt, xer, mq */
383
384 for (ii=1; ii <= (LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii) {
385 write_memory (sp-384-(ii*4),
386 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
387 }
388
389 /* Save sp or so called back chain right here. */
8bfd30b2 390 write_memory (sp-DUMMY_FRAME_SIZE, (char *)&sp, 4);
818de002 391 sp -= DUMMY_FRAME_SIZE;
41abdfbd
JG
392
393 /* And finally, this is the back chain. */
359a097f 394 write_memory (sp+8, pc_targ, 4);
41abdfbd
JG
395}
396
397
398/* Pop a dummy frame.
399
400 In rs6000 when we push a dummy frame, we save all of the registers. This
401 is usually done before user calls a function explicitly.
402
818de002
PB
403 After a dummy frame is pushed, some instructions are copied into stack,
404 and stack pointer is decremented even more. Since we don't have a frame
405 pointer to get back to the parent frame of the dummy, we start having
406 trouble poping it. Therefore, we keep a dummy frame stack, keeping
407 addresses of dummy frames as such. When poping happens and when we
408 detect that was a dummy frame, we pop it back to its parent by using
409 dummy frame stack (`dummy_frame_addr' array).
ecf4059f
JG
410
411FIXME: This whole concept is broken. You should be able to detect
412a dummy stack frame *on the user's stack itself*. When you do,
413then you know the format of that stack frame -- including its
414saved SP register! There should *not* be a separate stack in the
d6434f39 415GDB process that keeps track of these dummy frames! -- gnu@cygnus.com Aug92
41abdfbd
JG
416 */
417
418pop_dummy_frame ()
419{
420 CORE_ADDR sp, pc;
421 int ii;
422 sp = dummy_frame_addr [--dummy_frame_count];
423
424 /* restore all fpr's. */
425 for (ii = 1; ii <= 32; ++ii)
426 read_memory (sp-(ii*8), &registers[REGISTER_BYTE (32-ii+FP0_REGNUM)], 8);
427
428 /* restore all gpr's */
429 for (ii=1; ii <= 32; ++ii) {
430 read_memory (sp-256-(ii*4), &registers[REGISTER_BYTE (32-ii)], 4);
431 }
432
818de002
PB
433 /* restore the rest of the registers. */
434 for (ii=1; ii <=(LAST_SP_REGNUM-FIRST_SP_REGNUM+1); ++ii)
435 read_memory (sp-384-(ii*4),
436 &registers[REGISTER_BYTE (FPLAST_REGNUM + ii)], 4);
437
438 read_memory (sp-(DUMMY_FRAME_SIZE-8),
439 &registers [REGISTER_BYTE(PC_REGNUM)], 4);
41abdfbd
JG
440
441 /* when a dummy frame was being pushed, we had to decrement %sp first, in
442 order to secure astack space. Thus, saved %sp (or %r1) value, is not the
443 one we should restore. Change it with the one we need. */
444
445 *(int*)&registers [REGISTER_BYTE(FP_REGNUM)] = sp;
446
447 /* Now we can restore all registers. */
448
5f1c39ef 449 target_store_registers (-1);
41abdfbd
JG
450 pc = read_pc ();
451 flush_cached_frames ();
41abdfbd
JG
452}
453
454
455/* pop the innermost frame, go back to the caller. */
456
ecf4059f 457void
41abdfbd
JG
458pop_frame ()
459{
359a097f 460 CORE_ADDR pc, lr, sp, prev_sp; /* %pc, %lr, %sp */
6c6afbb9 461 struct aix_framedata fdata;
669caa9c 462 struct frame_info *frame = get_current_frame ();
41abdfbd 463 int addr, ii;
41abdfbd
JG
464
465 pc = read_pc ();
669caa9c 466 sp = FRAME_FP (frame);
41abdfbd
JG
467
468 if (stop_stack_dummy && dummy_frame_count) {
469 pop_dummy_frame ();
470 return;
471 }
472
07aa9fdc
PS
473 /* Make sure that all registers are valid. */
474 read_register_bytes (0, NULL, REGISTER_BYTES);
475
41abdfbd
JG
476 /* figure out previous %pc value. If the function is frameless, it is
477 still in the link register, otherwise walk the frames and retrieve the
478 saved %pc value in the previous frame. */
479
34a1a3bf 480 addr = get_pc_function_start (frame->pc) + FUNCTION_START_OFFSET;
6c6afbb9 481 function_frame_info (addr, &fdata);
41abdfbd 482
6c6afbb9 483 if (fdata.frameless)
07aa9fdc
PS
484 prev_sp = sp;
485 else
486 prev_sp = read_memory_integer (sp, 4);
487 if (fdata.nosavedpc)
41abdfbd
JG
488 lr = read_register (LR_REGNUM);
489 else
359a097f 490 lr = read_memory_integer (prev_sp+8, 4);
41abdfbd
JG
491
492 /* reset %pc value. */
493 write_register (PC_REGNUM, lr);
494
495 /* reset register values if any was saved earlier. */
6c6afbb9 496 addr = prev_sp - fdata.offset;
41abdfbd 497
6c6afbb9 498 if (fdata.saved_gpr != -1)
669caa9c 499 for (ii = fdata.saved_gpr; ii <= 31; ++ii) {
41abdfbd 500 read_memory (addr, &registers [REGISTER_BYTE (ii)], 4);
cdb1cc92 501 addr += 4;
41abdfbd
JG
502 }
503
6c6afbb9 504 if (fdata.saved_fpr != -1)
669caa9c 505 for (ii = fdata.saved_fpr; ii <= 31; ++ii) {
41abdfbd
JG
506 read_memory (addr, &registers [REGISTER_BYTE (ii+FP0_REGNUM)], 8);
507 addr += 8;
508 }
509
510 write_register (SP_REGNUM, prev_sp);
5f1c39ef 511 target_store_registers (-1);
41abdfbd 512 flush_cached_frames ();
41abdfbd
JG
513}
514
41abdfbd
JG
515/* fixup the call sequence of a dummy function, with the real function address.
516 its argumets will be passed by gdb. */
517
ecf4059f 518void
41abdfbd
JG
519fix_call_dummy(dummyname, pc, fun, nargs, type)
520 char *dummyname;
ecf4059f
JG
521 CORE_ADDR pc;
522 CORE_ADDR fun;
41abdfbd
JG
523 int nargs; /* not used */
524 int type; /* not used */
41abdfbd
JG
525{
526#define TOC_ADDR_OFFSET 20
527#define TARGET_ADDR_OFFSET 28
528
529 int ii;
ecf4059f
JG
530 CORE_ADDR target_addr;
531 CORE_ADDR tocvalue;
41abdfbd
JG
532
533 target_addr = fun;
534 tocvalue = find_toc_address (target_addr);
535
536 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET);
537 ii = (ii & 0xffff0000) | (tocvalue >> 16);
538 *(int*)((char*)dummyname + TOC_ADDR_OFFSET) = ii;
539
540 ii = *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4);
541 ii = (ii & 0xffff0000) | (tocvalue & 0x0000ffff);
542 *(int*)((char*)dummyname + TOC_ADDR_OFFSET+4) = ii;
543
544 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET);
545 ii = (ii & 0xffff0000) | (target_addr >> 16);
546 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET) = ii;
547
548 ii = *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4);
549 ii = (ii & 0xffff0000) | (target_addr & 0x0000ffff);
550 *(int*)((char*)dummyname + TARGET_ADDR_OFFSET+4) = ii;
551}
552
553
41abdfbd 554/* return information about a function frame.
6c6afbb9 555 in struct aix_frameinfo fdata:
cdb1cc92
ILT
556 - frameless is TRUE, if function does not have a frame.
557 - nosavedpc is TRUE, if function does not save %pc value in its frame.
41abdfbd
JG
558 - offset is the number of bytes used in the frame to save registers.
559 - saved_gpr is the number of the first saved gpr.
560 - saved_fpr is the number of the first saved fpr.
6c6afbb9
PB
561 - alloca_reg is the number of the register used for alloca() handling.
562 Otherwise -1.
41abdfbd 563 */
ecf4059f 564void
6c6afbb9 565function_frame_info (pc, fdata)
d6434f39 566 CORE_ADDR pc;
6c6afbb9 567 struct aix_framedata *fdata;
41abdfbd
JG
568{
569 unsigned int tmp;
570 register unsigned int op;
9ed8604f 571 char buf[4];
41abdfbd 572
6c6afbb9
PB
573 fdata->offset = 0;
574 fdata->saved_gpr = fdata->saved_fpr = fdata->alloca_reg = -1;
cdb1cc92 575 fdata->frameless = 1;
41abdfbd 576
9ed8604f
PS
577 /* Do not error out if we can't access the instructions. */
578 if (target_read_memory (pc, buf, 4))
579 return;
580 op = extract_unsigned_integer (buf, 4);
41abdfbd
JG
581 if (op == 0x7c0802a6) { /* mflr r0 */
582 pc += 4;
583 op = read_memory_integer (pc, 4);
cdb1cc92 584 fdata->nosavedpc = 0;
6c6afbb9 585 fdata->frameless = 0;
41abdfbd 586 }
cdb1cc92
ILT
587 else /* else, pc is not saved */
588 fdata->nosavedpc = 1;
41abdfbd
JG
589
590 if ((op & 0xfc00003e) == 0x7c000026) { /* mfcr Rx */
591 pc += 4;
592 op = read_memory_integer (pc, 4);
cdb1cc92 593 fdata->frameless = 0;
41abdfbd
JG
594 }
595
596 if ((op & 0xfc000000) == 0x48000000) { /* bl foo, to save fprs??? */
597 pc += 4;
598 op = read_memory_integer (pc, 4);
1eeba686
PB
599 /* At this point, make sure this is not a trampoline function
600 (a function that simply calls another functions, and nothing else).
601 If the next is not a nop, this branch was part of the function
602 prologue. */
603
604 if (op == 0x4def7b82 || /* crorc 15, 15, 15 */
605 op == 0x0)
606 return; /* prologue is over */
cdb1cc92 607 fdata->frameless = 0;
41abdfbd
JG
608 }
609
610 if ((op & 0xfc1f0000) == 0xd8010000) { /* stfd Rx,NUM(r1) */
611 pc += 4; /* store floating register double */
612 op = read_memory_integer (pc, 4);
cdb1cc92 613 fdata->frameless = 0;
41abdfbd
JG
614 }
615
616 if ((op & 0xfc1f0000) == 0xbc010000) { /* stm Rx, NUM(r1) */
617 int tmp2;
6c6afbb9 618 fdata->saved_gpr = (op >> 21) & 0x1f;
41abdfbd
JG
619 tmp2 = op & 0xffff;
620 if (tmp2 > 0x7fff)
cdb1cc92 621 tmp2 = (~0 &~ 0xffff) | tmp2;
41abdfbd
JG
622
623 if (tmp2 < 0) {
624 tmp2 = tmp2 * -1;
6c6afbb9
PB
625 fdata->saved_fpr = (tmp2 - ((32 - fdata->saved_gpr) * 4)) / 8;
626 if ( fdata->saved_fpr > 0)
627 fdata->saved_fpr = 32 - fdata->saved_fpr;
41abdfbd 628 else
6c6afbb9 629 fdata->saved_fpr = -1;
41abdfbd 630 }
6c6afbb9
PB
631 fdata->offset = tmp2;
632 pc += 4;
633 op = read_memory_integer (pc, 4);
cdb1cc92 634 fdata->frameless = 0;
41abdfbd 635 }
6c6afbb9
PB
636
637 while (((tmp = op >> 16) == 0x9001) || /* st r0, NUM(r1) */
638 (tmp == 0x9421) || /* stu r1, NUM(r1) */
cdb1cc92 639 (tmp == 0x93e1)) /* st r31, NUM(r1) */
6c6afbb9 640 {
cdb1cc92
ILT
641 int tmp2;
642
6c6afbb9
PB
643 /* gcc takes a short cut and uses this instruction to save r31 only. */
644
cdb1cc92 645 if (tmp == 0x93e1) {
6c6afbb9
PB
646 if (fdata->offset)
647/* fatal ("Unrecognized prolog."); */
199b2450 648 printf_unfiltered ("Unrecognized prolog!\n");
6c6afbb9
PB
649
650 fdata->saved_gpr = 31;
cdb1cc92
ILT
651 tmp2 = op & 0xffff;
652 if (tmp2 > 0x7fff) {
653 tmp2 = - ((~0 &~ 0xffff) | tmp2);
654 fdata->saved_fpr = (tmp2 - ((32 - 31) * 4)) / 8;
655 if ( fdata->saved_fpr > 0)
656 fdata->saved_fpr = 32 - fdata->saved_fpr;
657 else
658 fdata->saved_fpr = -1;
659 }
660 fdata->offset = tmp2;
6c6afbb9
PB
661 }
662 pc += 4;
663 op = read_memory_integer (pc, 4);
cdb1cc92 664 fdata->frameless = 0;
6c6afbb9
PB
665 }
666
667 while ((tmp = (op >> 22)) == 0x20f) { /* l r31, ... or */
668 pc += 4; /* l r30, ... */
669 op = read_memory_integer (pc, 4);
cdb1cc92 670 fdata->frameless = 0;
6c6afbb9
PB
671 }
672
673 /* store parameters into stack */
674 while(
675 (op & 0xfc1f0000) == 0xd8010000 || /* stfd Rx,NUM(r1) */
676 (op & 0xfc1f0000) == 0x90010000 || /* st r?, NUM(r1) */
677 (op & 0xfc000000) == 0xfc000000 || /* frsp, fp?, .. */
678 (op & 0xd0000000) == 0xd0000000) /* stfs, fp?, .. */
679 {
680 pc += 4; /* store fpr double */
681 op = read_memory_integer (pc, 4);
cdb1cc92 682 fdata->frameless = 0;
6c6afbb9
PB
683 }
684
07aa9fdc
PS
685 if (op == 0x603f0000 /* oril r31, r1, 0x0 */
686 || op == 0x7c3f0b78) /* mr r31, r1 */
687 {
688 fdata->alloca_reg = 31;
689 fdata->frameless = 0;
690 }
41abdfbd
JG
691}
692
693
694/* Pass the arguments in either registers, or in the stack. In RS6000, the first
695 eight words of the argument list (that might be less than eight parameters if
696 some parameters occupy more than one word) are passed in r3..r11 registers.
697 float and double parameters are passed in fpr's, in addition to that. Rest of
698 the parameters if any are passed in user stack. There might be cases in which
699 half of the parameter is copied into registers, the other half is pushed into
700 stack.
701
702 If the function is returning a structure, then the return address is passed
703 in r3, then the first 7 words of the parametes can be passed in registers,
704 starting from r4. */
705
706CORE_ADDR
707push_arguments (nargs, args, sp, struct_return, struct_addr)
708 int nargs;
17221e41 709 value_ptr *args;
41abdfbd
JG
710 CORE_ADDR sp;
711 int struct_return;
712 CORE_ADDR struct_addr;
713{
714 int ii, len;
715 int argno; /* current argument number */
716 int argbytes; /* current argument byte */
717 char tmp_buffer [50];
17221e41 718 value_ptr arg;
41abdfbd
JG
719 int f_argno = 0; /* current floating point argno */
720
721 CORE_ADDR saved_sp, pc;
722
723 if ( dummy_frame_count <= 0)
199b2450 724 printf_unfiltered ("FATAL ERROR -push_arguments()! frame not found!!\n");
41abdfbd
JG
725
726 /* The first eight words of ther arguments are passed in registers. Copy
727 them appropriately.
728
729 If the function is returning a `struct', then the first word (which
730 will be passed in r3) is used for struct return address. In that
731 case we should advance one word and start from r4 register to copy
732 parameters. */
733
734 ii = struct_return ? 1 : 0;
735
736 for (argno=0, argbytes=0; argno < nargs && ii<8; ++ii) {
737
5222ca60 738 arg = args[argno];
41abdfbd
JG
739 len = TYPE_LENGTH (VALUE_TYPE (arg));
740
741 if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT) {
742
743 /* floating point arguments are passed in fpr's, as well as gpr's.
744 There are 13 fpr's reserved for passing parameters. At this point
745 there is no way we would run out of them. */
746
747 if (len > 8)
199b2450 748 printf_unfiltered (
41abdfbd
JG
749"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
750
ade40d31
RP
751 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
752 len);
41abdfbd
JG
753 ++f_argno;
754 }
755
756 if (len > 4) {
757
758 /* Argument takes more than one register. */
759 while (argbytes < len) {
760
761 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31
RP
762 memcpy (&registers[REGISTER_BYTE(ii+3)],
763 ((char*)VALUE_CONTENTS (arg))+argbytes,
41abdfbd
JG
764 (len - argbytes) > 4 ? 4 : len - argbytes);
765 ++ii, argbytes += 4;
766
767 if (ii >= 8)
768 goto ran_out_of_registers_for_arguments;
769 }
770 argbytes = 0;
771 --ii;
772 }
773 else { /* Argument can fit in one register. No problem. */
774 *(int*)&registers[REGISTER_BYTE(ii+3)] = 0;
ade40d31 775 memcpy (&registers[REGISTER_BYTE(ii+3)], VALUE_CONTENTS (arg), len);
41abdfbd
JG
776 }
777 ++argno;
778 }
779
780ran_out_of_registers_for_arguments:
781
782 /* location for 8 parameters are always reserved. */
783 sp -= 4 * 8;
784
785 /* another six words for back chain, TOC register, link register, etc. */
786 sp -= 24;
787
788 /* if there are more arguments, allocate space for them in
789 the stack, then push them starting from the ninth one. */
790
791 if ((argno < nargs) || argbytes) {
792 int space = 0, jj;
17221e41 793 value_ptr val;
41abdfbd
JG
794
795 if (argbytes) {
796 space += ((len - argbytes + 3) & -4);
797 jj = argno + 1;
798 }
799 else
800 jj = argno;
801
802 for (; jj < nargs; ++jj) {
5222ca60 803 val = args[jj];
41abdfbd
JG
804 space += ((TYPE_LENGTH (VALUE_TYPE (val))) + 3) & -4;
805 }
806
807 /* add location required for the rest of the parameters */
808 space = (space + 7) & -8;
809 sp -= space;
810
811 /* This is another instance we need to be concerned about securing our
812 stack space. If we write anything underneath %sp (r1), we might conflict
813 with the kernel who thinks he is free to use this area. So, update %sp
814 first before doing anything else. */
815
816 write_register (SP_REGNUM, sp);
817
41abdfbd
JG
818 /* if the last argument copied into the registers didn't fit there
819 completely, push the rest of it into stack. */
820
821 if (argbytes) {
822 write_memory (
823 sp+24+(ii*4), ((char*)VALUE_CONTENTS (arg))+argbytes, len - argbytes);
824 ++argno;
825 ii += ((len - argbytes + 3) & -4) / 4;
826 }
827
828 /* push the rest of the arguments into stack. */
829 for (; argno < nargs; ++argno) {
830
5222ca60 831 arg = args[argno];
41abdfbd
JG
832 len = TYPE_LENGTH (VALUE_TYPE (arg));
833
834
835 /* float types should be passed in fpr's, as well as in the stack. */
836 if (TYPE_CODE (VALUE_TYPE (arg)) == TYPE_CODE_FLT && f_argno < 13) {
837
838 if (len > 8)
199b2450 839 printf_unfiltered (
41abdfbd
JG
840"Fatal Error: a floating point parameter #%d with a size > 8 is found!\n", argno);
841
ade40d31
RP
842 memcpy (&registers[REGISTER_BYTE(FP0_REGNUM + 1 + f_argno)], VALUE_CONTENTS (arg),
843 len);
41abdfbd
JG
844 ++f_argno;
845 }
846
359a097f 847 write_memory (sp+24+(ii*4), (char *) VALUE_CONTENTS (arg), len);
41abdfbd
JG
848 ii += ((len + 3) & -4) / 4;
849 }
850 }
6c6afbb9 851 else
41abdfbd
JG
852 /* Secure stack areas first, before doing anything else. */
853 write_register (SP_REGNUM, sp);
854
41abdfbd
JG
855 saved_sp = dummy_frame_addr [dummy_frame_count - 1];
856 read_memory (saved_sp, tmp_buffer, 24);
857 write_memory (sp, tmp_buffer, 24);
858
8bfd30b2 859 write_memory (sp, (char *)&saved_sp, 4); /* set back chain properly */
41abdfbd 860
5f1c39ef 861 target_store_registers (-1);
41abdfbd
JG
862 return sp;
863}
864
865/* a given return value in `regbuf' with a type `valtype', extract and copy its
866 value into `valbuf' */
867
ecf4059f 868void
41abdfbd
JG
869extract_return_value (valtype, regbuf, valbuf)
870 struct type *valtype;
871 char regbuf[REGISTER_BYTES];
872 char *valbuf;
873{
874
875 if (TYPE_CODE (valtype) == TYPE_CODE_FLT) {
876
877 double dd; float ff;
878 /* floats and doubles are returned in fpr1. fpr's have a size of 8 bytes.
879 We need to truncate the return value into float size (4 byte) if
880 necessary. */
881
882 if (TYPE_LENGTH (valtype) > 4) /* this is a double */
ade40d31 883 memcpy (valbuf, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)],
41abdfbd
JG
884 TYPE_LENGTH (valtype));
885 else { /* float */
ade40d31 886 memcpy (&dd, &regbuf[REGISTER_BYTE (FP0_REGNUM + 1)], 8);
41abdfbd 887 ff = (float)dd;
ade40d31 888 memcpy (valbuf, &ff, sizeof(float));
41abdfbd
JG
889 }
890 }
891 else
892 /* return value is copied starting from r3. */
ade40d31 893 memcpy (valbuf, &regbuf[REGISTER_BYTE (3)], TYPE_LENGTH (valtype));
41abdfbd
JG
894}
895
896
ecf4059f
JG
897/* keep structure return address in this variable.
898 FIXME: This is a horrid kludge which should not be allowed to continue
899 living. This only allows a single nested call to a structure-returning
900 function. Come on, guys! -- gnu@cygnus.com, Aug 92 */
41abdfbd
JG
901
902CORE_ADDR rs6000_struct_return_address;
903
904
c2e4669f
JG
905/* Indirect function calls use a piece of trampoline code to do context
906 switching, i.e. to set the new TOC table. Skip such code if we are on
907 its first instruction (as when we have single-stepped to here).
07aa9fdc
PS
908 Also skip shared library trampoline code (which is different from
909 indirect function call trampolines).
c2e4669f
JG
910 Result is desired PC to step until, or NULL if we are not in
911 trampoline code. */
41abdfbd 912
ecf4059f 913CORE_ADDR
41abdfbd 914skip_trampoline_code (pc)
ecf4059f 915CORE_ADDR pc;
41abdfbd
JG
916{
917 register unsigned int ii, op;
07aa9fdc 918 CORE_ADDR solib_target_pc;
41abdfbd
JG
919
920 static unsigned trampoline_code[] = {
921 0x800b0000, /* l r0,0x0(r11) */
922 0x90410014, /* st r2,0x14(r1) */
923 0x7c0903a6, /* mtctr r0 */
924 0x804b0004, /* l r2,0x4(r11) */
925 0x816b0008, /* l r11,0x8(r11) */
926 0x4e800420, /* bctr */
927 0x4e800020, /* br */
928 0
929 };
930
07aa9fdc
PS
931 /* If pc is in a shared library trampoline, return its target. */
932 solib_target_pc = find_solib_trampoline_target (pc);
933 if (solib_target_pc)
934 return solib_target_pc;
935
41abdfbd
JG
936 for (ii=0; trampoline_code[ii]; ++ii) {
937 op = read_memory_integer (pc + (ii*4), 4);
938 if (op != trampoline_code [ii])
359a097f 939 return 0;
41abdfbd
JG
940 }
941 ii = read_register (11); /* r11 holds destination addr */
942 pc = read_memory_integer (ii, 4); /* (r11) value */
943 return pc;
944}
945
ecf4059f
JG
946
947/* Determines whether the function FI has a frame on the stack or not.
cdb1cc92
ILT
948 Called from the FRAMELESS_FUNCTION_INVOCATION macro in tm.h with a
949 second argument of 0, and from the FRAME_SAVED_PC macro with a
950 second argument of 1. */
ecf4059f
JG
951
952int
cdb1cc92 953frameless_function_invocation (fi, pcsaved)
ecf4059f 954struct frame_info *fi;
cdb1cc92 955int pcsaved;
ecf4059f
JG
956{
957 CORE_ADDR func_start;
958 struct aix_framedata fdata;
959
b0e932ad
JK
960 if (fi->next != NULL)
961 /* Don't even think about framelessness except on the innermost frame. */
3f528883
JK
962 /* FIXME: Can also be frameless if fi->next->signal_handler_caller (if
963 a signal happens while executing in a frameless function). */
b0e932ad
JK
964 return 0;
965
ecf4059f
JG
966 func_start = get_pc_function_start (fi->pc) + FUNCTION_START_OFFSET;
967
968 /* If we failed to find the start of the function, it is a mistake
969 to inspect the instructions. */
970
971 if (!func_start)
972 return 0;
973
974 function_frame_info (func_start, &fdata);
cdb1cc92 975 return pcsaved ? fdata.nosavedpc : fdata.frameless;
ecf4059f
JG
976}
977
978
979/* If saved registers of frame FI are not known yet, read and cache them.
980 &FDATAP contains aix_framedata; TDATAP can be NULL,
981 in which case the framedata are read. */
982
983static void
984frame_get_cache_fsr (fi, fdatap)
985 struct frame_info *fi;
986 struct aix_framedata *fdatap;
987{
988 int ii;
989 CORE_ADDR frame_addr;
990 struct aix_framedata work_fdata;
991
992 if (fi->cache_fsr)
993 return;
994
995 if (fdatap == NULL) {
996 fdatap = &work_fdata;
997 function_frame_info (get_pc_function_start (fi->pc), fdatap);
998 }
999
1000 fi->cache_fsr = (struct frame_saved_regs *)
1001 obstack_alloc (&frame_cache_obstack, sizeof (struct frame_saved_regs));
4ed97c9a 1002 memset (fi->cache_fsr, '\0', sizeof (struct frame_saved_regs));
ecf4059f
JG
1003
1004 if (fi->prev && fi->prev->frame)
1005 frame_addr = fi->prev->frame;
1006 else
1007 frame_addr = read_memory_integer (fi->frame, 4);
1008
1009 /* if != -1, fdatap->saved_fpr is the smallest number of saved_fpr.
1010 All fpr's from saved_fpr to fp31 are saved right underneath caller
1011 stack pointer, starting from fp31 first. */
1012
1013 if (fdatap->saved_fpr >= 0) {
1014 for (ii=31; ii >= fdatap->saved_fpr; --ii)
1015 fi->cache_fsr->regs [FP0_REGNUM + ii] = frame_addr - ((32 - ii) * 8);
1016 frame_addr -= (32 - fdatap->saved_fpr) * 8;
1017 }
1018
1019 /* if != -1, fdatap->saved_gpr is the smallest number of saved_gpr.
1020 All gpr's from saved_gpr to gpr31 are saved right under saved fprs,
1021 starting from r31 first. */
1022
1023 if (fdatap->saved_gpr >= 0)
1024 for (ii=31; ii >= fdatap->saved_gpr; --ii)
1025 fi->cache_fsr->regs [ii] = frame_addr - ((32 - ii) * 4);
1026}
1027
1028/* Return the address of a frame. This is the inital %sp value when the frame
1029 was first allocated. For functions calling alloca(), it might be saved in
1030 an alloca register. */
1031
1032CORE_ADDR
1033frame_initial_stack_address (fi)
1034 struct frame_info *fi;
1035{
1036 CORE_ADDR tmpaddr;
1037 struct aix_framedata fdata;
1038 struct frame_info *callee_fi;
1039
1040 /* if the initial stack pointer (frame address) of this frame is known,
1041 just return it. */
1042
1043 if (fi->initial_sp)
1044 return fi->initial_sp;
1045
1046 /* find out if this function is using an alloca register.. */
1047
1048 function_frame_info (get_pc_function_start (fi->pc), &fdata);
1049
1050 /* if saved registers of this frame are not known yet, read and cache them. */
1051
1052 if (!fi->cache_fsr)
1053 frame_get_cache_fsr (fi, &fdata);
1054
1055 /* If no alloca register used, then fi->frame is the value of the %sp for
1056 this frame, and it is good enough. */
1057
1058 if (fdata.alloca_reg < 0) {
1059 fi->initial_sp = fi->frame;
1060 return fi->initial_sp;
1061 }
1062
1063 /* This function has an alloca register. If this is the top-most frame
1064 (with the lowest address), the value in alloca register is good. */
1065
1066 if (!fi->next)
1067 return fi->initial_sp = read_register (fdata.alloca_reg);
1068
1069 /* Otherwise, this is a caller frame. Callee has usually already saved
1070 registers, but there are exceptions (such as when the callee
1071 has no parameters). Find the address in which caller's alloca
1072 register is saved. */
1073
1074 for (callee_fi = fi->next; callee_fi; callee_fi = callee_fi->next) {
1075
1076 if (!callee_fi->cache_fsr)
cdb1cc92 1077 frame_get_cache_fsr (callee_fi, NULL);
ecf4059f
JG
1078
1079 /* this is the address in which alloca register is saved. */
1080
1081 tmpaddr = callee_fi->cache_fsr->regs [fdata.alloca_reg];
1082 if (tmpaddr) {
1083 fi->initial_sp = read_memory_integer (tmpaddr, 4);
1084 return fi->initial_sp;
1085 }
1086
1087 /* Go look into deeper levels of the frame chain to see if any one of
1088 the callees has saved alloca register. */
1089 }
1090
1091 /* If alloca register was not saved, by the callee (or any of its callees)
1092 then the value in the register is still good. */
1093
1094 return fi->initial_sp = read_register (fdata.alloca_reg);
1095}
1096
669caa9c 1097CORE_ADDR
f3649227
JK
1098rs6000_frame_chain (thisframe)
1099 struct frame_info *thisframe;
1100{
669caa9c 1101 CORE_ADDR fp;
f3649227
JK
1102 if (inside_entry_file ((thisframe)->pc))
1103 return 0;
cee86be3 1104 if (thisframe->signal_handler_caller)
9ed8604f 1105 fp = read_memory_integer (thisframe->frame + SIG_FRAME_FP_OFFSET, 4);
cee86be3
JK
1106 else
1107 fp = read_memory_integer ((thisframe)->frame, 4);
1108
f3649227
JK
1109 return fp;
1110}
ecf4059f
JG
1111\f
1112/* Keep an array of load segment information and their TOC table addresses.
1113 This info will be useful when calling a shared library function by hand. */
1114
1115struct loadinfo {
1116 CORE_ADDR textorg, dataorg;
1117 unsigned long toc_offset;
1118};
1119
1120#define LOADINFOLEN 10
1121
ecf4059f
JG
1122static struct loadinfo *loadinfo = NULL;
1123static int loadinfolen = 0;
1124static int loadinfotocindex = 0;
3c02636b 1125static int loadinfotextindex = 0;
ecf4059f
JG
1126
1127
1128void
1129xcoff_init_loadinfo ()
1130{
1131 loadinfotocindex = 0;
1132 loadinfotextindex = 0;
1133
1134 if (loadinfolen == 0) {
1135 loadinfo = (struct loadinfo *)
1136 xmalloc (sizeof (struct loadinfo) * LOADINFOLEN);
1137 loadinfolen = LOADINFOLEN;
1138 }
1139}
1140
1141
1142/* FIXME -- this is never called! */
1143void
1144free_loadinfo ()
1145{
1146 if (loadinfo)
1147 free (loadinfo);
1148 loadinfo = NULL;
1149 loadinfolen = 0;
1150 loadinfotocindex = 0;
1151 loadinfotextindex = 0;
1152}
1153
1154/* this is called from xcoffread.c */
1155
1156void
1157xcoff_add_toc_to_loadinfo (unsigned long tocoff)
1158{
1159 while (loadinfotocindex >= loadinfolen) {
1160 loadinfolen += LOADINFOLEN;
1161 loadinfo = (struct loadinfo *)
1162 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1163 }
1164 loadinfo [loadinfotocindex++].toc_offset = tocoff;
1165}
1166
2aefe6e4 1167void
ecf4059f
JG
1168add_text_to_loadinfo (textaddr, dataaddr)
1169 CORE_ADDR textaddr;
1170 CORE_ADDR dataaddr;
1171{
1172 while (loadinfotextindex >= loadinfolen) {
1173 loadinfolen += LOADINFOLEN;
1174 loadinfo = (struct loadinfo *)
1175 xrealloc (loadinfo, sizeof(struct loadinfo) * loadinfolen);
1176 }
1177 loadinfo [loadinfotextindex].textorg = textaddr;
1178 loadinfo [loadinfotextindex].dataorg = dataaddr;
1179 ++loadinfotextindex;
1180}
1181
1182
1183/* FIXME: This assumes that the "textorg" and "dataorg" elements
1184 of a member of this array are correlated with the "toc_offset"
1185 element of the same member. But they are sequentially assigned in wildly
1186 different places, and probably there is no correlation. FIXME! */
1187
1188static CORE_ADDR
1189find_toc_address (pc)
1190 CORE_ADDR pc;
1191{
1192 int ii, toc_entry, tocbase = 0;
1193
1194 for (ii=0; ii < loadinfotextindex; ++ii)
1195 if (pc > loadinfo[ii].textorg && loadinfo[ii].textorg > tocbase) {
1196 toc_entry = ii;
1197 tocbase = loadinfo[ii].textorg;
1198 }
1199
1200 return loadinfo[toc_entry].dataorg + loadinfo[toc_entry].toc_offset;
1201}
18b46e7c
SS
1202
1203void
1204_initialize_rs6000_tdep ()
1205{
1206 /* FIXME, this should not be decided via ifdef. */
1207#ifdef GDB_TARGET_POWERPC
1208 tm_print_insn = print_insn_big_powerpc;
1209#else
1210 tm_print_insn = print_insn_rs6000;
1211#endif
1212}
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