Add virtual destructor to tui_layout_base
[deliverable/binutils-gdb.git] / gdb / rx-tdep.c
CommitLineData
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1/* Target-dependent code for the Renesas RX for GDB, the GNU debugger.
2
42a4f53d 3 Copyright (C) 2008-2019 Free Software Foundation, Inc.
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4
5 Contributed by Red Hat, Inc.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22#include "defs.h"
23#include "arch-utils.h"
24#include "prologue-value.h"
25#include "target.h"
26#include "regcache.h"
27#include "opcode/rx.h"
28#include "dis-asm.h"
29#include "gdbtypes.h"
30#include "frame.h"
31#include "frame-unwind.h"
32#include "frame-base.h"
33#include "value.h"
34#include "gdbcore.h"
35#include "dwarf2-frame.h"
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36#include "remote.h"
37#include "target-descriptions.h"
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38
39#include "elf/rx.h"
40#include "elf-bfd.h"
325fac50 41#include <algorithm>
baa835b4 42
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43#include "features/rx.c"
44
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45/* Certain important register numbers. */
46enum
47{
48 RX_SP_REGNUM = 0,
49 RX_R1_REGNUM = 1,
50 RX_R4_REGNUM = 4,
51 RX_FP_REGNUM = 6,
52 RX_R15_REGNUM = 15,
1b485e67 53 RX_USP_REGNUM = 16,
fd6e021d 54 RX_PSW_REGNUM = 18,
baa835b4 55 RX_PC_REGNUM = 19,
0561fea4 56 RX_BPSW_REGNUM = 21,
1b485e67 57 RX_BPC_REGNUM = 22,
0561fea4 58 RX_FPSW_REGNUM = 24,
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59 RX_ACC_REGNUM = 25,
60 RX_NUM_REGS = 26
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61};
62
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63/* RX frame types. */
64enum rx_frame_type {
65 RX_FRAME_TYPE_NORMAL,
66 RX_FRAME_TYPE_EXCEPTION,
67 RX_FRAME_TYPE_FAST_INTERRUPT
68};
69
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70/* Architecture specific data. */
71struct gdbarch_tdep
72{
73 /* The ELF header flags specify the multilib used. */
74 int elf_flags;
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75
76 /* Type of PSW and BPSW. */
77 struct type *rx_psw_type;
78
79 /* Type of FPSW. */
80 struct type *rx_fpsw_type;
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81};
82
83/* This structure holds the results of a prologue analysis. */
84struct rx_prologue
85{
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86 /* Frame type, either a normal frame or one of two types of exception
87 frames. */
88 enum rx_frame_type frame_type;
89
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90 /* The offset from the frame base to the stack pointer --- always
91 zero or negative.
92
93 Calling this a "size" is a bit misleading, but given that the
94 stack grows downwards, using offsets for everything keeps one
95 from going completely sign-crazy: you never change anything's
96 sign for an ADD instruction; always change the second operand's
97 sign for a SUB instruction; and everything takes care of
98 itself. */
99 int frame_size;
100
101 /* Non-zero if this function has initialized the frame pointer from
102 the stack pointer, zero otherwise. */
103 int has_frame_ptr;
104
105 /* If has_frame_ptr is non-zero, this is the offset from the frame
106 base to where the frame pointer points. This is always zero or
107 negative. */
108 int frame_ptr_offset;
109
110 /* The address of the first instruction at which the frame has been
111 set up and the arguments are where the debug info says they are
112 --- as best as we can tell. */
113 CORE_ADDR prologue_end;
114
115 /* reg_offset[R] is the offset from the CFA at which register R is
116 saved, or 1 if register R has not been saved. (Real values are
117 always zero or negative.) */
118 int reg_offset[RX_NUM_REGS];
119};
120
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121/* RX register names */
122static const char *const rx_register_names[] = {
123 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
124 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
125 "usp", "isp", "psw", "pc", "intb", "bpsw","bpc","fintv",
126 "fpsw", "acc",
127};
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128
129
130/* Function for finding saved registers in a 'struct pv_area'; this
f7b7ed97 131 function is passed to pv_area::scan.
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132
133 If VALUE is a saved register, ADDR says it was saved at a constant
134 offset from the frame base, and SIZE indicates that the whole
135 register was saved, record its offset. */
136static void
137check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value)
138{
139 struct rx_prologue *result = (struct rx_prologue *) result_untyped;
140
141 if (value.kind == pvk_register
142 && value.k == 0
143 && pv_is_register (addr, RX_SP_REGNUM)
f5656ead 144 && size == register_size (target_gdbarch (), value.reg))
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145 result->reg_offset[value.reg] = addr.k;
146}
147
148/* Define a "handle" struct for fetching the next opcode. */
149struct rx_get_opcode_byte_handle
150{
151 CORE_ADDR pc;
152};
153
154/* Fetch a byte on behalf of the opcode decoder. HANDLE contains
155 the memory address of the next byte to fetch. If successful,
156 the address in the handle is updated and the byte fetched is
157 returned as the value of the function. If not successful, -1
158 is returned. */
159static int
160rx_get_opcode_byte (void *handle)
161{
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162 struct rx_get_opcode_byte_handle *opcdata
163 = (struct rx_get_opcode_byte_handle *) handle;
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164 int status;
165 gdb_byte byte;
166
a0e28e54 167 status = target_read_code (opcdata->pc, &byte, 1);
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168 if (status == 0)
169 {
170 opcdata->pc += 1;
171 return byte;
172 }
173 else
174 return -1;
175}
176
177/* Analyze a prologue starting at START_PC, going no further than
178 LIMIT_PC. Fill in RESULT as appropriate. */
1b485e67 179
baa835b4 180static void
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181rx_analyze_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc,
182 enum rx_frame_type frame_type,
183 struct rx_prologue *result)
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184{
185 CORE_ADDR pc, next_pc;
186 int rn;
187 pv_t reg[RX_NUM_REGS];
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188 CORE_ADDR after_last_frame_setup_insn = start_pc;
189
190 memset (result, 0, sizeof (*result));
191
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192 result->frame_type = frame_type;
193
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194 for (rn = 0; rn < RX_NUM_REGS; rn++)
195 {
196 reg[rn] = pv_register (rn, 0);
197 result->reg_offset[rn] = 1;
198 }
199
f7b7ed97 200 pv_area stack (RX_SP_REGNUM, gdbarch_addr_bit (target_gdbarch ()));
baa835b4 201
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202 if (frame_type == RX_FRAME_TYPE_FAST_INTERRUPT)
203 {
204 /* This code won't do anything useful at present, but this is
205 what happens for fast interrupts. */
206 reg[RX_BPSW_REGNUM] = reg[RX_PSW_REGNUM];
207 reg[RX_BPC_REGNUM] = reg[RX_PC_REGNUM];
208 }
209 else
210 {
211 /* When an exception occurs, the PSW is saved to the interrupt stack
212 first. */
213 if (frame_type == RX_FRAME_TYPE_EXCEPTION)
214 {
215 reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4);
f7b7ed97 216 stack.store (reg[RX_SP_REGNUM], 4, reg[RX_PSW_REGNUM]);
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217 }
218
219 /* The call instruction (or an exception/interrupt) has saved the return
220 address on the stack. */
221 reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4);
f7b7ed97 222 stack.store (reg[RX_SP_REGNUM], 4, reg[RX_PC_REGNUM]);
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223
224 }
225
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226
227 pc = start_pc;
228 while (pc < limit_pc)
229 {
230 int bytes_read;
231 struct rx_get_opcode_byte_handle opcode_handle;
232 RX_Opcode_Decoded opc;
233
234 opcode_handle.pc = pc;
235 bytes_read = rx_decode_opcode (pc, &opc, rx_get_opcode_byte,
236 &opcode_handle);
237 next_pc = pc + bytes_read;
238
239 if (opc.id == RXO_pushm /* pushm r1, r2 */
240 && opc.op[1].type == RX_Operand_Register
241 && opc.op[2].type == RX_Operand_Register)
242 {
243 int r1, r2;
244 int r;
245
246 r1 = opc.op[1].reg;
247 r2 = opc.op[2].reg;
248 for (r = r2; r >= r1; r--)
249 {
250 reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4);
f7b7ed97 251 stack.store (reg[RX_SP_REGNUM], 4, reg[r]);
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252 }
253 after_last_frame_setup_insn = next_pc;
254 }
255 else if (opc.id == RXO_mov /* mov.l rdst, rsrc */
256 && opc.op[0].type == RX_Operand_Register
257 && opc.op[1].type == RX_Operand_Register
258 && opc.size == RX_Long)
259 {
260 int rdst, rsrc;
261
262 rdst = opc.op[0].reg;
263 rsrc = opc.op[1].reg;
264 reg[rdst] = reg[rsrc];
265 if (rdst == RX_FP_REGNUM && rsrc == RX_SP_REGNUM)
266 after_last_frame_setup_insn = next_pc;
267 }
268 else if (opc.id == RXO_mov /* mov.l rsrc, [-SP] */
269 && opc.op[0].type == RX_Operand_Predec
270 && opc.op[0].reg == RX_SP_REGNUM
271 && opc.op[1].type == RX_Operand_Register
272 && opc.size == RX_Long)
273 {
274 int rsrc;
275
276 rsrc = opc.op[1].reg;
277 reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4);
f7b7ed97 278 stack.store (reg[RX_SP_REGNUM], 4, reg[rsrc]);
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279 after_last_frame_setup_insn = next_pc;
280 }
281 else if (opc.id == RXO_add /* add #const, rsrc, rdst */
282 && opc.op[0].type == RX_Operand_Register
283 && opc.op[1].type == RX_Operand_Immediate
284 && opc.op[2].type == RX_Operand_Register)
285 {
286 int rdst = opc.op[0].reg;
287 int addend = opc.op[1].addend;
288 int rsrc = opc.op[2].reg;
289 reg[rdst] = pv_add_constant (reg[rsrc], addend);
290 /* Negative adjustments to the stack pointer or frame pointer
291 are (most likely) part of the prologue. */
292 if ((rdst == RX_SP_REGNUM || rdst == RX_FP_REGNUM) && addend < 0)
293 after_last_frame_setup_insn = next_pc;
294 }
295 else if (opc.id == RXO_mov
296 && opc.op[0].type == RX_Operand_Indirect
297 && opc.op[1].type == RX_Operand_Register
298 && opc.size == RX_Long
299 && (opc.op[0].reg == RX_SP_REGNUM
300 || opc.op[0].reg == RX_FP_REGNUM)
301 && (RX_R1_REGNUM <= opc.op[1].reg
302 && opc.op[1].reg <= RX_R4_REGNUM))
303 {
304 /* This moves an argument register to the stack. Don't
305 record it, but allow it to be a part of the prologue. */
306 }
307 else if (opc.id == RXO_branch
308 && opc.op[0].type == RX_Operand_Immediate
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309 && next_pc < opc.op[0].addend)
310 {
311 /* When a loop appears as the first statement of a function
312 body, gcc 4.x will use a BRA instruction to branch to the
313 loop condition checking code. This BRA instruction is
314 marked as part of the prologue. We therefore set next_pc
315 to this branch target and also stop the prologue scan.
316 The instructions at and beyond the branch target should
317 no longer be associated with the prologue.
318
319 Note that we only consider forward branches here. We
320 presume that a forward branch is being used to skip over
321 a loop body.
322
323 A backwards branch is covered by the default case below.
324 If we were to encounter a backwards branch, that would
325 most likely mean that we've scanned through a loop body.
326 We definitely want to stop the prologue scan when this
327 happens and that is precisely what is done by the default
328 case below. */
329
330 after_last_frame_setup_insn = opc.op[0].addend;
331 break; /* Scan no further if we hit this case. */
332 }
333 else
334 {
335 /* Terminate the prologue scan. */
336 break;
337 }
338
339 pc = next_pc;
340 }
341
342 /* Is the frame size (offset, really) a known constant? */
343 if (pv_is_register (reg[RX_SP_REGNUM], RX_SP_REGNUM))
344 result->frame_size = reg[RX_SP_REGNUM].k;
345
346 /* Was the frame pointer initialized? */
347 if (pv_is_register (reg[RX_FP_REGNUM], RX_SP_REGNUM))
348 {
349 result->has_frame_ptr = 1;
350 result->frame_ptr_offset = reg[RX_FP_REGNUM].k;
351 }
352
353 /* Record where all the registers were saved. */
f7b7ed97 354 stack.scan (check_for_saved, (void *) result);
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355
356 result->prologue_end = after_last_frame_setup_insn;
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357}
358
359
360/* Implement the "skip_prologue" gdbarch method. */
361static CORE_ADDR
362rx_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
363{
2c02bd72 364 const char *name;
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365 CORE_ADDR func_addr, func_end;
366 struct rx_prologue p;
367
368 /* Try to find the extent of the function that contains PC. */
369 if (!find_pc_partial_function (pc, &name, &func_addr, &func_end))
370 return pc;
371
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372 /* The frame type doesn't matter here, since we only care about
373 where the prologue ends. We'll use RX_FRAME_TYPE_NORMAL. */
374 rx_analyze_prologue (pc, func_end, RX_FRAME_TYPE_NORMAL, &p);
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375 return p.prologue_end;
376}
377
378/* Given a frame described by THIS_FRAME, decode the prologue of its
379 associated function if there is not cache entry as specified by
380 THIS_PROLOGUE_CACHE. Save the decoded prologue in the cache and
381 return that struct as the value of this function. */
1b485e67 382
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383static struct rx_prologue *
384rx_analyze_frame_prologue (struct frame_info *this_frame,
1b485e67 385 enum rx_frame_type frame_type,
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386 void **this_prologue_cache)
387{
388 if (!*this_prologue_cache)
389 {
390 CORE_ADDR func_start, stop_addr;
391
392 *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct rx_prologue);
393
394 func_start = get_frame_func (this_frame);
395 stop_addr = get_frame_pc (this_frame);
396
397 /* If we couldn't find any function containing the PC, then
398 just initialize the prologue cache, but don't do anything. */
399 if (!func_start)
400 stop_addr = func_start;
401
1b485e67 402 rx_analyze_prologue (func_start, stop_addr, frame_type,
19ba03f4 403 (struct rx_prologue *) *this_prologue_cache);
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404 }
405
19ba03f4 406 return (struct rx_prologue *) *this_prologue_cache;
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407}
408
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409/* Determine type of frame by scanning the function for a return
410 instruction. */
411
412static enum rx_frame_type
413rx_frame_type (struct frame_info *this_frame, void **this_cache)
414{
415 const char *name;
416 CORE_ADDR pc, start_pc, lim_pc;
417 int bytes_read;
418 struct rx_get_opcode_byte_handle opcode_handle;
419 RX_Opcode_Decoded opc;
420
421 gdb_assert (this_cache != NULL);
422
423 /* If we have a cached value, return it. */
424
425 if (*this_cache != NULL)
426 {
19ba03f4 427 struct rx_prologue *p = (struct rx_prologue *) *this_cache;
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428
429 return p->frame_type;
430 }
431
432 /* No cached value; scan the function. The frame type is cached in
433 rx_analyze_prologue / rx_analyze_frame_prologue. */
434
435 pc = get_frame_pc (this_frame);
436
437 /* Attempt to find the last address in the function. If it cannot
438 be determined, set the limit to be a short ways past the frame's
439 pc. */
440 if (!find_pc_partial_function (pc, &name, &start_pc, &lim_pc))
441 lim_pc = pc + 20;
442
443 while (pc < lim_pc)
444 {
445 opcode_handle.pc = pc;
446 bytes_read = rx_decode_opcode (pc, &opc, rx_get_opcode_byte,
447 &opcode_handle);
448
449 if (bytes_read <= 0 || opc.id == RXO_rts)
450 return RX_FRAME_TYPE_NORMAL;
451 else if (opc.id == RXO_rtfi)
452 return RX_FRAME_TYPE_FAST_INTERRUPT;
453 else if (opc.id == RXO_rte)
454 return RX_FRAME_TYPE_EXCEPTION;
455
456 pc += bytes_read;
457 }
458
459 return RX_FRAME_TYPE_NORMAL;
460}
461
462
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463/* Given the next frame and a prologue cache, return this frame's
464 base. */
1b485e67 465
baa835b4 466static CORE_ADDR
1b485e67 467rx_frame_base (struct frame_info *this_frame, void **this_cache)
baa835b4 468{
1b485e67 469 enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache);
baa835b4 470 struct rx_prologue *p
1b485e67 471 = rx_analyze_frame_prologue (this_frame, frame_type, this_cache);
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472
473 /* In functions that use alloca, the distance between the stack
474 pointer and the frame base varies dynamically, so we can't use
475 the SP plus static information like prologue analysis to find the
476 frame base. However, such functions must have a frame pointer,
477 to be able to restore the SP on exit. So whenever we do have a
478 frame pointer, use that to find the base. */
479 if (p->has_frame_ptr)
480 {
481 CORE_ADDR fp = get_frame_register_unsigned (this_frame, RX_FP_REGNUM);
482 return fp - p->frame_ptr_offset;
483 }
484 else
485 {
486 CORE_ADDR sp = get_frame_register_unsigned (this_frame, RX_SP_REGNUM);
487 return sp - p->frame_size;
488 }
489}
490
491/* Implement the "frame_this_id" method for unwinding frames. */
1b485e67 492
baa835b4 493static void
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494rx_frame_this_id (struct frame_info *this_frame, void **this_cache,
495 struct frame_id *this_id)
baa835b4 496{
1b485e67 497 *this_id = frame_id_build (rx_frame_base (this_frame, this_cache),
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498 get_frame_func (this_frame));
499}
500
501/* Implement the "frame_prev_register" method for unwinding frames. */
1b485e67 502
baa835b4 503static struct value *
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504rx_frame_prev_register (struct frame_info *this_frame, void **this_cache,
505 int regnum)
baa835b4 506{
1b485e67 507 enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache);
baa835b4 508 struct rx_prologue *p
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509 = rx_analyze_frame_prologue (this_frame, frame_type, this_cache);
510 CORE_ADDR frame_base = rx_frame_base (this_frame, this_cache);
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511
512 if (regnum == RX_SP_REGNUM)
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513 {
514 if (frame_type == RX_FRAME_TYPE_EXCEPTION)
515 {
516 struct value *psw_val;
517 CORE_ADDR psw;
518
519 psw_val = rx_frame_prev_register (this_frame, this_cache,
520 RX_PSW_REGNUM);
521 psw = extract_unsigned_integer (value_contents_all (psw_val), 4,
522 gdbarch_byte_order (
523 get_frame_arch (this_frame)));
524
525 if ((psw & 0x20000 /* U bit */) != 0)
526 return rx_frame_prev_register (this_frame, this_cache,
527 RX_USP_REGNUM);
528
529 /* Fall through for the case where U bit is zero. */
530 }
531
532 return frame_unwind_got_constant (this_frame, regnum, frame_base);
533 }
534
535 if (frame_type == RX_FRAME_TYPE_FAST_INTERRUPT)
536 {
537 if (regnum == RX_PC_REGNUM)
538 return rx_frame_prev_register (this_frame, this_cache,
539 RX_BPC_REGNUM);
540 if (regnum == RX_PSW_REGNUM)
541 return rx_frame_prev_register (this_frame, this_cache,
542 RX_BPSW_REGNUM);
543 }
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544
545 /* If prologue analysis says we saved this register somewhere,
546 return a description of the stack slot holding it. */
1b485e67 547 if (p->reg_offset[regnum] != 1)
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548 return frame_unwind_got_memory (this_frame, regnum,
549 frame_base + p->reg_offset[regnum]);
550
551 /* Otherwise, presume we haven't changed the value of this
552 register, and get it from the next frame. */
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553 return frame_unwind_got_register (this_frame, regnum, regnum);
554}
555
556/* Return TRUE if the frame indicated by FRAME_TYPE is a normal frame. */
557
558static int
559normal_frame_p (enum rx_frame_type frame_type)
560{
561 return (frame_type == RX_FRAME_TYPE_NORMAL);
562}
563
564/* Return TRUE if the frame indicated by FRAME_TYPE is an exception
565 frame. */
566
567static int
568exception_frame_p (enum rx_frame_type frame_type)
569{
570 return (frame_type == RX_FRAME_TYPE_EXCEPTION
571 || frame_type == RX_FRAME_TYPE_FAST_INTERRUPT);
572}
573
574/* Common code used by both normal and exception frame sniffers. */
575
576static int
577rx_frame_sniffer_common (const struct frame_unwind *self,
578 struct frame_info *this_frame,
579 void **this_cache,
580 int (*sniff_p)(enum rx_frame_type) )
581{
582 gdb_assert (this_cache != NULL);
583
584 if (*this_cache == NULL)
585 {
586 enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache);
587
588 if (sniff_p (frame_type))
589 {
590 /* The call below will fill in the cache, including the frame
591 type. */
592 (void) rx_analyze_frame_prologue (this_frame, frame_type, this_cache);
593
594 return 1;
595 }
596 else
597 return 0;
598 }
baa835b4 599 else
1b485e67 600 {
19ba03f4 601 struct rx_prologue *p = (struct rx_prologue *) *this_cache;
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602
603 return sniff_p (p->frame_type);
604 }
605}
606
607/* Frame sniffer for normal (non-exception) frames. */
608
609static int
610rx_frame_sniffer (const struct frame_unwind *self,
611 struct frame_info *this_frame,
612 void **this_cache)
613{
614 return rx_frame_sniffer_common (self, this_frame, this_cache,
615 normal_frame_p);
616}
617
618/* Frame sniffer for exception frames. */
619
620static int
621rx_exception_sniffer (const struct frame_unwind *self,
622 struct frame_info *this_frame,
623 void **this_cache)
624{
625 return rx_frame_sniffer_common (self, this_frame, this_cache,
626 exception_frame_p);
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627}
628
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629/* Data structure for normal code using instruction-based prologue
630 analyzer. */
631
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632static const struct frame_unwind rx_frame_unwind = {
633 NORMAL_FRAME,
e0f68161 634 default_frame_unwind_stop_reason,
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635 rx_frame_this_id,
636 rx_frame_prev_register,
637 NULL,
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638 rx_frame_sniffer
639};
640
641/* Data structure for exception code using instruction-based prologue
642 analyzer. */
643
644static const struct frame_unwind rx_exception_unwind = {
645 /* SIGTRAMP_FRAME could be used here, but backtraces are less informative. */
646 NORMAL_FRAME,
647 default_frame_unwind_stop_reason,
648 rx_frame_this_id,
649 rx_frame_prev_register,
650 NULL,
651 rx_exception_sniffer
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652};
653
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654/* Implement the "push_dummy_call" gdbarch method. */
655static CORE_ADDR
656rx_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
657 struct regcache *regcache, CORE_ADDR bp_addr, int nargs,
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658 struct value **args, CORE_ADDR sp,
659 function_call_return_method return_method,
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660 CORE_ADDR struct_addr)
661{
662 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
663 int write_pass;
664 int sp_off = 0;
665 CORE_ADDR cfa;
666 int num_register_candidate_args;
667
668 struct type *func_type = value_type (function);
669
670 /* Dereference function pointer types. */
671 while (TYPE_CODE (func_type) == TYPE_CODE_PTR)
672 func_type = TYPE_TARGET_TYPE (func_type);
673
674 /* The end result had better be a function or a method. */
675 gdb_assert (TYPE_CODE (func_type) == TYPE_CODE_FUNC
676 || TYPE_CODE (func_type) == TYPE_CODE_METHOD);
677
678 /* Functions with a variable number of arguments have all of their
679 variable arguments and the last non-variable argument passed
680 on the stack.
681
682 Otherwise, we can pass up to four arguments on the stack.
683
684 Once computed, we leave this value alone. I.e. we don't update
685 it in case of a struct return going in a register or an argument
686 requiring multiple registers, etc. We rely instead on the value
687 of the ``arg_reg'' variable to get these other details correct. */
688
689 if (TYPE_VARARGS (func_type))
690 num_register_candidate_args = TYPE_NFIELDS (func_type) - 1;
691 else
692 num_register_candidate_args = 4;
693
694 /* We make two passes; the first does the stack allocation,
695 the second actually stores the arguments. */
696 for (write_pass = 0; write_pass <= 1; write_pass++)
697 {
698 int i;
699 int arg_reg = RX_R1_REGNUM;
700
701 if (write_pass)
702 sp = align_down (sp - sp_off, 4);
703 sp_off = 0;
704
cf84fa6b 705 if (return_method == return_method_struct)
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706 {
707 struct type *return_type = TYPE_TARGET_TYPE (func_type);
708
709 gdb_assert (TYPE_CODE (return_type) == TYPE_CODE_STRUCT
710 || TYPE_CODE (func_type) == TYPE_CODE_UNION);
711
712 if (TYPE_LENGTH (return_type) > 16
713 || TYPE_LENGTH (return_type) % 4 != 0)
714 {
715 if (write_pass)
716 regcache_cooked_write_unsigned (regcache, RX_R15_REGNUM,
717 struct_addr);
718 }
719 }
720
721 /* Push the arguments. */
722 for (i = 0; i < nargs; i++)
723 {
724 struct value *arg = args[i];
725 const gdb_byte *arg_bits = value_contents_all (arg);
726 struct type *arg_type = check_typedef (value_type (arg));
727 ULONGEST arg_size = TYPE_LENGTH (arg_type);
728
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729 if (i == 0 && struct_addr != 0
730 && return_method != return_method_struct
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731 && TYPE_CODE (arg_type) == TYPE_CODE_PTR
732 && extract_unsigned_integer (arg_bits, 4,
733 byte_order) == struct_addr)
734 {
735 /* This argument represents the address at which C++ (and
736 possibly other languages) store their return value.
737 Put this value in R15. */
738 if (write_pass)
739 regcache_cooked_write_unsigned (regcache, RX_R15_REGNUM,
740 struct_addr);
741 }
742 else if (TYPE_CODE (arg_type) != TYPE_CODE_STRUCT
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743 && TYPE_CODE (arg_type) != TYPE_CODE_UNION
744 && arg_size <= 8)
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745 {
746 /* Argument is a scalar. */
747 if (arg_size == 8)
748 {
749 if (i < num_register_candidate_args
750 && arg_reg <= RX_R4_REGNUM - 1)
751 {
752 /* If argument registers are going to be used to pass
753 an 8 byte scalar, the ABI specifies that two registers
754 must be available. */
755 if (write_pass)
756 {
757 regcache_cooked_write_unsigned (regcache, arg_reg,
758 extract_unsigned_integer
759 (arg_bits, 4,
760 byte_order));
761 regcache_cooked_write_unsigned (regcache,
762 arg_reg + 1,
763 extract_unsigned_integer
764 (arg_bits + 4, 4,
765 byte_order));
766 }
767 arg_reg += 2;
768 }
769 else
770 {
771 sp_off = align_up (sp_off, 4);
772 /* Otherwise, pass the 8 byte scalar on the stack. */
773 if (write_pass)
774 write_memory (sp + sp_off, arg_bits, 8);
775 sp_off += 8;
776 }
777 }
778 else
779 {
780 ULONGEST u;
781
782 gdb_assert (arg_size <= 4);
783
784 u =
785 extract_unsigned_integer (arg_bits, arg_size, byte_order);
786
787 if (i < num_register_candidate_args
788 && arg_reg <= RX_R4_REGNUM)
789 {
790 if (write_pass)
791 regcache_cooked_write_unsigned (regcache, arg_reg, u);
792 arg_reg += 1;
793 }
794 else
795 {
796 int p_arg_size = 4;
797
798 if (TYPE_PROTOTYPED (func_type)
799 && i < TYPE_NFIELDS (func_type))
800 {
801 struct type *p_arg_type =
802 TYPE_FIELD_TYPE (func_type, i);
803 p_arg_size = TYPE_LENGTH (p_arg_type);
804 }
805
806 sp_off = align_up (sp_off, p_arg_size);
807
808 if (write_pass)
809 write_memory_unsigned_integer (sp + sp_off,
810 p_arg_size, byte_order,
811 u);
812 sp_off += p_arg_size;
813 }
814 }
815 }
816 else
817 {
818 /* Argument is a struct or union. Pass as much of the struct
819 in registers, if possible. Pass the rest on the stack. */
820 while (arg_size > 0)
821 {
822 if (i < num_register_candidate_args
823 && arg_reg <= RX_R4_REGNUM
824 && arg_size <= 4 * (RX_R4_REGNUM - arg_reg + 1)
825 && arg_size % 4 == 0)
826 {
325fac50 827 int len = std::min (arg_size, (ULONGEST) 4);
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828
829 if (write_pass)
830 regcache_cooked_write_unsigned (regcache, arg_reg,
831 extract_unsigned_integer
832 (arg_bits, len,
833 byte_order));
834 arg_bits += len;
835 arg_size -= len;
836 arg_reg++;
837 }
838 else
839 {
840 sp_off = align_up (sp_off, 4);
841 if (write_pass)
842 write_memory (sp + sp_off, arg_bits, arg_size);
843 sp_off += align_up (arg_size, 4);
844 arg_size = 0;
845 }
846 }
847 }
848 }
849 }
850
851 /* Keep track of the stack address prior to pushing the return address.
852 This is the value that we'll return. */
853 cfa = sp;
854
855 /* Push the return address. */
856 sp = sp - 4;
857 write_memory_unsigned_integer (sp, 4, byte_order, bp_addr);
858
859 /* Update the stack pointer. */
860 regcache_cooked_write_unsigned (regcache, RX_SP_REGNUM, sp);
861
862 return cfa;
863}
864
865/* Implement the "return_value" gdbarch method. */
866static enum return_value_convention
867rx_return_value (struct gdbarch *gdbarch,
6a3a010b 868 struct value *function,
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869 struct type *valtype,
870 struct regcache *regcache,
871 gdb_byte *readbuf, const gdb_byte *writebuf)
872{
873 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
874 ULONGEST valtype_len = TYPE_LENGTH (valtype);
875
876 if (TYPE_LENGTH (valtype) > 16
877 || ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT
878 || TYPE_CODE (valtype) == TYPE_CODE_UNION)
879 && TYPE_LENGTH (valtype) % 4 != 0))
880 return RETURN_VALUE_STRUCT_CONVENTION;
881
882 if (readbuf)
883 {
884 ULONGEST u;
885 int argreg = RX_R1_REGNUM;
886 int offset = 0;
887
888 while (valtype_len > 0)
889 {
325fac50 890 int len = std::min (valtype_len, (ULONGEST) 4);
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891
892 regcache_cooked_read_unsigned (regcache, argreg, &u);
893 store_unsigned_integer (readbuf + offset, len, byte_order, u);
894 valtype_len -= len;
895 offset += len;
896 argreg++;
897 }
898 }
899
900 if (writebuf)
901 {
902 ULONGEST u;
903 int argreg = RX_R1_REGNUM;
904 int offset = 0;
905
906 while (valtype_len > 0)
907 {
325fac50 908 int len = std::min (valtype_len, (ULONGEST) 4);
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909
910 u = extract_unsigned_integer (writebuf + offset, len, byte_order);
911 regcache_cooked_write_unsigned (regcache, argreg, u);
912 valtype_len -= len;
913 offset += len;
914 argreg++;
915 }
916 }
917
918 return RETURN_VALUE_REGISTER_CONVENTION;
919}
920
04180708 921constexpr gdb_byte rx_break_insn[] = { 0x00 };
598cc9dc 922
04180708 923typedef BP_MANIPULATION (rx_break_insn) rx_breakpoint;
baa835b4 924
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925/* Implement the dwarf_reg_to_regnum" gdbarch method. */
926
927static int
928rx_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
929{
930 if (0 <= reg && reg <= 15)
931 return reg;
932 else if (reg == 16)
933 return RX_PSW_REGNUM;
934 else if (reg == 17)
935 return RX_PC_REGNUM;
936 else
0fde2c53 937 return -1;
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938}
939
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940/* Allocate and initialize a gdbarch object. */
941static struct gdbarch *
942rx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
943{
944 struct gdbarch *gdbarch;
945 struct gdbarch_tdep *tdep;
946 int elf_flags;
e3ec872f
YS
947 struct tdesc_arch_data *tdesc_data = NULL;
948 const struct target_desc *tdesc = info.target_desc;
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949
950 /* Extract the elf_flags if available. */
951 if (info.abfd != NULL
952 && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
953 elf_flags = elf_elfheader (info.abfd)->e_flags;
954 else
955 elf_flags = 0;
956
957
958 /* Try to find the architecture in the list of already defined
959 architectures. */
960 for (arches = gdbarch_list_lookup_by_info (arches, &info);
961 arches != NULL;
962 arches = gdbarch_list_lookup_by_info (arches->next, &info))
963 {
964 if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags)
965 continue;
966
967 return arches->gdbarch;
968 }
969
e3ec872f
YS
970 if (tdesc == NULL)
971 tdesc = tdesc_rx;
972
973 /* Check any target description for validity. */
974 if (tdesc_has_registers (tdesc))
975 {
976 const struct tdesc_feature *feature;
977 bool valid_p = true;
978
979 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.rx.core");
980
981 if (feature != NULL)
982 {
983 tdesc_data = tdesc_data_alloc ();
984 for (int i = 0; i < RX_NUM_REGS; i++)
985 valid_p &= tdesc_numbered_register (feature, tdesc_data, i,
986 rx_register_names[i]);
987 }
988
989 if (!valid_p)
990 {
991 tdesc_data_cleanup (tdesc_data);
992 return NULL;
993 }
994 }
995
996 gdb_assert(tdesc_data != NULL);
997
e6ddc3bf 998 tdep = XCNEW (struct gdbarch_tdep);
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999 gdbarch = gdbarch_alloc (&info, tdep);
1000 tdep->elf_flags = elf_flags;
1001
1002 set_gdbarch_num_regs (gdbarch, RX_NUM_REGS);
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1003 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
1004
baa835b4 1005 set_gdbarch_num_pseudo_regs (gdbarch, 0);
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1006 set_gdbarch_pc_regnum (gdbarch, RX_PC_REGNUM);
1007 set_gdbarch_sp_regnum (gdbarch, RX_SP_REGNUM);
1008 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
1009 set_gdbarch_decr_pc_after_break (gdbarch, 1);
04180708
YQ
1010 set_gdbarch_breakpoint_kind_from_pc (gdbarch, rx_breakpoint::kind_from_pc);
1011 set_gdbarch_sw_breakpoint_from_kind (gdbarch, rx_breakpoint::bp_from_kind);
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1012 set_gdbarch_skip_prologue (gdbarch, rx_skip_prologue);
1013
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1014 /* Target builtin data types. */
1015 set_gdbarch_char_signed (gdbarch, 0);
1016 set_gdbarch_short_bit (gdbarch, 16);
1017 set_gdbarch_int_bit (gdbarch, 32);
1018 set_gdbarch_long_bit (gdbarch, 32);
1019 set_gdbarch_long_long_bit (gdbarch, 64);
1020 set_gdbarch_ptr_bit (gdbarch, 32);
1021 set_gdbarch_float_bit (gdbarch, 32);
1022 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
e3ec872f 1023
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1024 if (elf_flags & E_FLAG_RX_64BIT_DOUBLES)
1025 {
1026 set_gdbarch_double_bit (gdbarch, 64);
1027 set_gdbarch_long_double_bit (gdbarch, 64);
1028 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
1029 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double);
1030 }
1031 else
1032 {
1033 set_gdbarch_double_bit (gdbarch, 32);
1034 set_gdbarch_long_double_bit (gdbarch, 32);
1035 set_gdbarch_double_format (gdbarch, floatformats_ieee_single);
1036 set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single);
1037 }
1038
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1039 /* DWARF register mapping. */
1040 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, rx_dwarf_reg_to_regnum);
1041
baa835b4 1042 /* Frame unwinding. */
1b485e67 1043 frame_unwind_append_unwinder (gdbarch, &rx_exception_unwind);
baa835b4 1044 dwarf2_append_unwinders (gdbarch);
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1045 frame_unwind_append_unwinder (gdbarch, &rx_frame_unwind);
1046
47c47d69
AB
1047 /* Methods setting up a dummy call, and extracting the return value from
1048 a call. */
baa835b4
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1049 set_gdbarch_push_dummy_call (gdbarch, rx_push_dummy_call);
1050 set_gdbarch_return_value (gdbarch, rx_return_value);
1051
1052 /* Virtual tables. */
1053 set_gdbarch_vbit_in_delta (gdbarch, 1);
1054
1055 return gdbarch;
1056}
1057
1058/* Register the above initialization routine. */
693be288 1059
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1060void
1061_initialize_rx_tdep (void)
1062{
1063 register_gdbarch_init (bfd_arch_rx, rx_gdbarch_init);
e3ec872f 1064 initialize_tdesc_rx ();
baa835b4 1065}
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