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1 | /* Target-dependent code for the Renesas RX for GDB, the GNU debugger. |
2 | ||
61baf725 | 3 | Copyright (C) 2008-2017 Free Software Foundation, Inc. |
baa835b4 KB |
4 | |
5 | Contributed by Red Hat, Inc. | |
6 | ||
7 | This file is part of GDB. | |
8 | ||
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 3 of the License, or | |
12 | (at your option) any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ | |
21 | ||
22 | #include "defs.h" | |
23 | #include "arch-utils.h" | |
24 | #include "prologue-value.h" | |
25 | #include "target.h" | |
26 | #include "regcache.h" | |
27 | #include "opcode/rx.h" | |
28 | #include "dis-asm.h" | |
29 | #include "gdbtypes.h" | |
30 | #include "frame.h" | |
31 | #include "frame-unwind.h" | |
32 | #include "frame-base.h" | |
33 | #include "value.h" | |
34 | #include "gdbcore.h" | |
35 | #include "dwarf2-frame.h" | |
36 | ||
37 | #include "elf/rx.h" | |
38 | #include "elf-bfd.h" | |
325fac50 | 39 | #include <algorithm> |
baa835b4 KB |
40 | |
41 | /* Certain important register numbers. */ | |
42 | enum | |
43 | { | |
44 | RX_SP_REGNUM = 0, | |
45 | RX_R1_REGNUM = 1, | |
46 | RX_R4_REGNUM = 4, | |
47 | RX_FP_REGNUM = 6, | |
48 | RX_R15_REGNUM = 15, | |
1b485e67 | 49 | RX_USP_REGNUM = 16, |
fd6e021d | 50 | RX_PSW_REGNUM = 18, |
baa835b4 | 51 | RX_PC_REGNUM = 19, |
0561fea4 | 52 | RX_BPSW_REGNUM = 21, |
1b485e67 | 53 | RX_BPC_REGNUM = 22, |
0561fea4 | 54 | RX_FPSW_REGNUM = 24, |
fd60dc69 KB |
55 | RX_ACC_REGNUM = 25, |
56 | RX_NUM_REGS = 26 | |
baa835b4 KB |
57 | }; |
58 | ||
1b485e67 KB |
59 | /* RX frame types. */ |
60 | enum rx_frame_type { | |
61 | RX_FRAME_TYPE_NORMAL, | |
62 | RX_FRAME_TYPE_EXCEPTION, | |
63 | RX_FRAME_TYPE_FAST_INTERRUPT | |
64 | }; | |
65 | ||
baa835b4 KB |
66 | /* Architecture specific data. */ |
67 | struct gdbarch_tdep | |
68 | { | |
69 | /* The ELF header flags specify the multilib used. */ | |
70 | int elf_flags; | |
0561fea4 KB |
71 | |
72 | /* Type of PSW and BPSW. */ | |
73 | struct type *rx_psw_type; | |
74 | ||
75 | /* Type of FPSW. */ | |
76 | struct type *rx_fpsw_type; | |
baa835b4 KB |
77 | }; |
78 | ||
79 | /* This structure holds the results of a prologue analysis. */ | |
80 | struct rx_prologue | |
81 | { | |
1b485e67 KB |
82 | /* Frame type, either a normal frame or one of two types of exception |
83 | frames. */ | |
84 | enum rx_frame_type frame_type; | |
85 | ||
baa835b4 KB |
86 | /* The offset from the frame base to the stack pointer --- always |
87 | zero or negative. | |
88 | ||
89 | Calling this a "size" is a bit misleading, but given that the | |
90 | stack grows downwards, using offsets for everything keeps one | |
91 | from going completely sign-crazy: you never change anything's | |
92 | sign for an ADD instruction; always change the second operand's | |
93 | sign for a SUB instruction; and everything takes care of | |
94 | itself. */ | |
95 | int frame_size; | |
96 | ||
97 | /* Non-zero if this function has initialized the frame pointer from | |
98 | the stack pointer, zero otherwise. */ | |
99 | int has_frame_ptr; | |
100 | ||
101 | /* If has_frame_ptr is non-zero, this is the offset from the frame | |
102 | base to where the frame pointer points. This is always zero or | |
103 | negative. */ | |
104 | int frame_ptr_offset; | |
105 | ||
106 | /* The address of the first instruction at which the frame has been | |
107 | set up and the arguments are where the debug info says they are | |
108 | --- as best as we can tell. */ | |
109 | CORE_ADDR prologue_end; | |
110 | ||
111 | /* reg_offset[R] is the offset from the CFA at which register R is | |
112 | saved, or 1 if register R has not been saved. (Real values are | |
113 | always zero or negative.) */ | |
114 | int reg_offset[RX_NUM_REGS]; | |
115 | }; | |
116 | ||
117 | /* Implement the "register_name" gdbarch method. */ | |
118 | static const char * | |
119 | rx_register_name (struct gdbarch *gdbarch, int regnr) | |
120 | { | |
121 | static const char *const reg_names[] = { | |
122 | "r0", | |
123 | "r1", | |
124 | "r2", | |
125 | "r3", | |
126 | "r4", | |
127 | "r5", | |
128 | "r6", | |
129 | "r7", | |
130 | "r8", | |
131 | "r9", | |
132 | "r10", | |
133 | "r11", | |
134 | "r12", | |
135 | "r13", | |
136 | "r14", | |
137 | "r15", | |
baa835b4 | 138 | "usp", |
fd60dc69 | 139 | "isp", |
baa835b4 | 140 | "psw", |
fd60dc69 KB |
141 | "pc", |
142 | "intb", | |
baa835b4 | 143 | "bpsw", |
fd60dc69 KB |
144 | "bpc", |
145 | "fintv", | |
146 | "fpsw", | |
147 | "acc" | |
baa835b4 KB |
148 | }; |
149 | ||
150 | return reg_names[regnr]; | |
151 | } | |
152 | ||
a28aa6ed YQ |
153 | /* Construct the flags type for PSW and BPSW. */ |
154 | ||
155 | static struct type * | |
156 | rx_psw_type (struct gdbarch *gdbarch) | |
157 | { | |
158 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
159 | ||
160 | if (tdep->rx_psw_type == NULL) | |
161 | { | |
77b7c781 | 162 | tdep->rx_psw_type = arch_flags_type (gdbarch, "rx_psw_type", 32); |
a28aa6ed YQ |
163 | append_flags_type_flag (tdep->rx_psw_type, 0, "C"); |
164 | append_flags_type_flag (tdep->rx_psw_type, 1, "Z"); | |
165 | append_flags_type_flag (tdep->rx_psw_type, 2, "S"); | |
166 | append_flags_type_flag (tdep->rx_psw_type, 3, "O"); | |
167 | append_flags_type_flag (tdep->rx_psw_type, 16, "I"); | |
168 | append_flags_type_flag (tdep->rx_psw_type, 17, "U"); | |
169 | append_flags_type_flag (tdep->rx_psw_type, 20, "PM"); | |
170 | append_flags_type_flag (tdep->rx_psw_type, 24, "IPL0"); | |
171 | append_flags_type_flag (tdep->rx_psw_type, 25, "IPL1"); | |
172 | append_flags_type_flag (tdep->rx_psw_type, 26, "IPL2"); | |
173 | append_flags_type_flag (tdep->rx_psw_type, 27, "IPL3"); | |
174 | } | |
175 | return tdep->rx_psw_type; | |
176 | } | |
177 | ||
178 | /* Construct flags type for FPSW. */ | |
179 | ||
180 | static struct type * | |
181 | rx_fpsw_type (struct gdbarch *gdbarch) | |
182 | { | |
183 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
184 | ||
ad3d022a | 185 | if (tdep->rx_fpsw_type == NULL) |
a28aa6ed | 186 | { |
77b7c781 | 187 | tdep->rx_fpsw_type = arch_flags_type (gdbarch, "rx_fpsw_type", 32); |
a28aa6ed YQ |
188 | append_flags_type_flag (tdep->rx_fpsw_type, 0, "RM0"); |
189 | append_flags_type_flag (tdep->rx_fpsw_type, 1, "RM1"); | |
190 | append_flags_type_flag (tdep->rx_fpsw_type, 2, "CV"); | |
191 | append_flags_type_flag (tdep->rx_fpsw_type, 3, "CO"); | |
192 | append_flags_type_flag (tdep->rx_fpsw_type, 4, "CZ"); | |
193 | append_flags_type_flag (tdep->rx_fpsw_type, 5, "CU"); | |
194 | append_flags_type_flag (tdep->rx_fpsw_type, 6, "CX"); | |
195 | append_flags_type_flag (tdep->rx_fpsw_type, 7, "CE"); | |
196 | append_flags_type_flag (tdep->rx_fpsw_type, 8, "DN"); | |
197 | append_flags_type_flag (tdep->rx_fpsw_type, 10, "EV"); | |
198 | append_flags_type_flag (tdep->rx_fpsw_type, 11, "EO"); | |
199 | append_flags_type_flag (tdep->rx_fpsw_type, 12, "EZ"); | |
200 | append_flags_type_flag (tdep->rx_fpsw_type, 13, "EU"); | |
201 | append_flags_type_flag (tdep->rx_fpsw_type, 14, "EX"); | |
202 | append_flags_type_flag (tdep->rx_fpsw_type, 26, "FV"); | |
203 | append_flags_type_flag (tdep->rx_fpsw_type, 27, "FO"); | |
204 | append_flags_type_flag (tdep->rx_fpsw_type, 28, "FZ"); | |
205 | append_flags_type_flag (tdep->rx_fpsw_type, 29, "FU"); | |
206 | append_flags_type_flag (tdep->rx_fpsw_type, 30, "FX"); | |
207 | append_flags_type_flag (tdep->rx_fpsw_type, 31, "FS"); | |
208 | } | |
209 | ||
210 | return tdep->rx_fpsw_type; | |
211 | } | |
212 | ||
baa835b4 KB |
213 | /* Implement the "register_type" gdbarch method. */ |
214 | static struct type * | |
215 | rx_register_type (struct gdbarch *gdbarch, int reg_nr) | |
216 | { | |
0561fea4 KB |
217 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
218 | ||
baa835b4 KB |
219 | if (reg_nr == RX_PC_REGNUM) |
220 | return builtin_type (gdbarch)->builtin_func_ptr; | |
0561fea4 | 221 | else if (reg_nr == RX_PSW_REGNUM || reg_nr == RX_BPSW_REGNUM) |
a28aa6ed | 222 | return rx_psw_type (gdbarch); |
0561fea4 | 223 | else if (reg_nr == RX_FPSW_REGNUM) |
a28aa6ed | 224 | return rx_fpsw_type (gdbarch); |
fd60dc69 KB |
225 | else if (reg_nr == RX_ACC_REGNUM) |
226 | return builtin_type (gdbarch)->builtin_unsigned_long_long; | |
baa835b4 KB |
227 | else |
228 | return builtin_type (gdbarch)->builtin_unsigned_long; | |
229 | } | |
230 | ||
231 | ||
232 | /* Function for finding saved registers in a 'struct pv_area'; this | |
f7b7ed97 | 233 | function is passed to pv_area::scan. |
baa835b4 KB |
234 | |
235 | If VALUE is a saved register, ADDR says it was saved at a constant | |
236 | offset from the frame base, and SIZE indicates that the whole | |
237 | register was saved, record its offset. */ | |
238 | static void | |
239 | check_for_saved (void *result_untyped, pv_t addr, CORE_ADDR size, pv_t value) | |
240 | { | |
241 | struct rx_prologue *result = (struct rx_prologue *) result_untyped; | |
242 | ||
243 | if (value.kind == pvk_register | |
244 | && value.k == 0 | |
245 | && pv_is_register (addr, RX_SP_REGNUM) | |
f5656ead | 246 | && size == register_size (target_gdbarch (), value.reg)) |
baa835b4 KB |
247 | result->reg_offset[value.reg] = addr.k; |
248 | } | |
249 | ||
250 | /* Define a "handle" struct for fetching the next opcode. */ | |
251 | struct rx_get_opcode_byte_handle | |
252 | { | |
253 | CORE_ADDR pc; | |
254 | }; | |
255 | ||
256 | /* Fetch a byte on behalf of the opcode decoder. HANDLE contains | |
257 | the memory address of the next byte to fetch. If successful, | |
258 | the address in the handle is updated and the byte fetched is | |
259 | returned as the value of the function. If not successful, -1 | |
260 | is returned. */ | |
261 | static int | |
262 | rx_get_opcode_byte (void *handle) | |
263 | { | |
19ba03f4 SM |
264 | struct rx_get_opcode_byte_handle *opcdata |
265 | = (struct rx_get_opcode_byte_handle *) handle; | |
baa835b4 KB |
266 | int status; |
267 | gdb_byte byte; | |
268 | ||
a0e28e54 | 269 | status = target_read_code (opcdata->pc, &byte, 1); |
baa835b4 KB |
270 | if (status == 0) |
271 | { | |
272 | opcdata->pc += 1; | |
273 | return byte; | |
274 | } | |
275 | else | |
276 | return -1; | |
277 | } | |
278 | ||
279 | /* Analyze a prologue starting at START_PC, going no further than | |
280 | LIMIT_PC. Fill in RESULT as appropriate. */ | |
1b485e67 | 281 | |
baa835b4 | 282 | static void |
1b485e67 KB |
283 | rx_analyze_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc, |
284 | enum rx_frame_type frame_type, | |
285 | struct rx_prologue *result) | |
baa835b4 KB |
286 | { |
287 | CORE_ADDR pc, next_pc; | |
288 | int rn; | |
289 | pv_t reg[RX_NUM_REGS]; | |
baa835b4 KB |
290 | CORE_ADDR after_last_frame_setup_insn = start_pc; |
291 | ||
292 | memset (result, 0, sizeof (*result)); | |
293 | ||
1b485e67 KB |
294 | result->frame_type = frame_type; |
295 | ||
baa835b4 KB |
296 | for (rn = 0; rn < RX_NUM_REGS; rn++) |
297 | { | |
298 | reg[rn] = pv_register (rn, 0); | |
299 | result->reg_offset[rn] = 1; | |
300 | } | |
301 | ||
f7b7ed97 | 302 | pv_area stack (RX_SP_REGNUM, gdbarch_addr_bit (target_gdbarch ())); |
baa835b4 | 303 | |
1b485e67 KB |
304 | if (frame_type == RX_FRAME_TYPE_FAST_INTERRUPT) |
305 | { | |
306 | /* This code won't do anything useful at present, but this is | |
307 | what happens for fast interrupts. */ | |
308 | reg[RX_BPSW_REGNUM] = reg[RX_PSW_REGNUM]; | |
309 | reg[RX_BPC_REGNUM] = reg[RX_PC_REGNUM]; | |
310 | } | |
311 | else | |
312 | { | |
313 | /* When an exception occurs, the PSW is saved to the interrupt stack | |
314 | first. */ | |
315 | if (frame_type == RX_FRAME_TYPE_EXCEPTION) | |
316 | { | |
317 | reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4); | |
f7b7ed97 | 318 | stack.store (reg[RX_SP_REGNUM], 4, reg[RX_PSW_REGNUM]); |
1b485e67 KB |
319 | } |
320 | ||
321 | /* The call instruction (or an exception/interrupt) has saved the return | |
322 | address on the stack. */ | |
323 | reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4); | |
f7b7ed97 | 324 | stack.store (reg[RX_SP_REGNUM], 4, reg[RX_PC_REGNUM]); |
1b485e67 KB |
325 | |
326 | } | |
327 | ||
baa835b4 KB |
328 | |
329 | pc = start_pc; | |
330 | while (pc < limit_pc) | |
331 | { | |
332 | int bytes_read; | |
333 | struct rx_get_opcode_byte_handle opcode_handle; | |
334 | RX_Opcode_Decoded opc; | |
335 | ||
336 | opcode_handle.pc = pc; | |
337 | bytes_read = rx_decode_opcode (pc, &opc, rx_get_opcode_byte, | |
338 | &opcode_handle); | |
339 | next_pc = pc + bytes_read; | |
340 | ||
341 | if (opc.id == RXO_pushm /* pushm r1, r2 */ | |
342 | && opc.op[1].type == RX_Operand_Register | |
343 | && opc.op[2].type == RX_Operand_Register) | |
344 | { | |
345 | int r1, r2; | |
346 | int r; | |
347 | ||
348 | r1 = opc.op[1].reg; | |
349 | r2 = opc.op[2].reg; | |
350 | for (r = r2; r >= r1; r--) | |
351 | { | |
352 | reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4); | |
f7b7ed97 | 353 | stack.store (reg[RX_SP_REGNUM], 4, reg[r]); |
baa835b4 KB |
354 | } |
355 | after_last_frame_setup_insn = next_pc; | |
356 | } | |
357 | else if (opc.id == RXO_mov /* mov.l rdst, rsrc */ | |
358 | && opc.op[0].type == RX_Operand_Register | |
359 | && opc.op[1].type == RX_Operand_Register | |
360 | && opc.size == RX_Long) | |
361 | { | |
362 | int rdst, rsrc; | |
363 | ||
364 | rdst = opc.op[0].reg; | |
365 | rsrc = opc.op[1].reg; | |
366 | reg[rdst] = reg[rsrc]; | |
367 | if (rdst == RX_FP_REGNUM && rsrc == RX_SP_REGNUM) | |
368 | after_last_frame_setup_insn = next_pc; | |
369 | } | |
370 | else if (opc.id == RXO_mov /* mov.l rsrc, [-SP] */ | |
371 | && opc.op[0].type == RX_Operand_Predec | |
372 | && opc.op[0].reg == RX_SP_REGNUM | |
373 | && opc.op[1].type == RX_Operand_Register | |
374 | && opc.size == RX_Long) | |
375 | { | |
376 | int rsrc; | |
377 | ||
378 | rsrc = opc.op[1].reg; | |
379 | reg[RX_SP_REGNUM] = pv_add_constant (reg[RX_SP_REGNUM], -4); | |
f7b7ed97 | 380 | stack.store (reg[RX_SP_REGNUM], 4, reg[rsrc]); |
baa835b4 KB |
381 | after_last_frame_setup_insn = next_pc; |
382 | } | |
383 | else if (opc.id == RXO_add /* add #const, rsrc, rdst */ | |
384 | && opc.op[0].type == RX_Operand_Register | |
385 | && opc.op[1].type == RX_Operand_Immediate | |
386 | && opc.op[2].type == RX_Operand_Register) | |
387 | { | |
388 | int rdst = opc.op[0].reg; | |
389 | int addend = opc.op[1].addend; | |
390 | int rsrc = opc.op[2].reg; | |
391 | reg[rdst] = pv_add_constant (reg[rsrc], addend); | |
392 | /* Negative adjustments to the stack pointer or frame pointer | |
393 | are (most likely) part of the prologue. */ | |
394 | if ((rdst == RX_SP_REGNUM || rdst == RX_FP_REGNUM) && addend < 0) | |
395 | after_last_frame_setup_insn = next_pc; | |
396 | } | |
397 | else if (opc.id == RXO_mov | |
398 | && opc.op[0].type == RX_Operand_Indirect | |
399 | && opc.op[1].type == RX_Operand_Register | |
400 | && opc.size == RX_Long | |
401 | && (opc.op[0].reg == RX_SP_REGNUM | |
402 | || opc.op[0].reg == RX_FP_REGNUM) | |
403 | && (RX_R1_REGNUM <= opc.op[1].reg | |
404 | && opc.op[1].reg <= RX_R4_REGNUM)) | |
405 | { | |
406 | /* This moves an argument register to the stack. Don't | |
407 | record it, but allow it to be a part of the prologue. */ | |
408 | } | |
409 | else if (opc.id == RXO_branch | |
410 | && opc.op[0].type == RX_Operand_Immediate | |
baa835b4 KB |
411 | && next_pc < opc.op[0].addend) |
412 | { | |
413 | /* When a loop appears as the first statement of a function | |
414 | body, gcc 4.x will use a BRA instruction to branch to the | |
415 | loop condition checking code. This BRA instruction is | |
416 | marked as part of the prologue. We therefore set next_pc | |
417 | to this branch target and also stop the prologue scan. | |
418 | The instructions at and beyond the branch target should | |
419 | no longer be associated with the prologue. | |
420 | ||
421 | Note that we only consider forward branches here. We | |
422 | presume that a forward branch is being used to skip over | |
423 | a loop body. | |
424 | ||
425 | A backwards branch is covered by the default case below. | |
426 | If we were to encounter a backwards branch, that would | |
427 | most likely mean that we've scanned through a loop body. | |
428 | We definitely want to stop the prologue scan when this | |
429 | happens and that is precisely what is done by the default | |
430 | case below. */ | |
431 | ||
432 | after_last_frame_setup_insn = opc.op[0].addend; | |
433 | break; /* Scan no further if we hit this case. */ | |
434 | } | |
435 | else | |
436 | { | |
437 | /* Terminate the prologue scan. */ | |
438 | break; | |
439 | } | |
440 | ||
441 | pc = next_pc; | |
442 | } | |
443 | ||
444 | /* Is the frame size (offset, really) a known constant? */ | |
445 | if (pv_is_register (reg[RX_SP_REGNUM], RX_SP_REGNUM)) | |
446 | result->frame_size = reg[RX_SP_REGNUM].k; | |
447 | ||
448 | /* Was the frame pointer initialized? */ | |
449 | if (pv_is_register (reg[RX_FP_REGNUM], RX_SP_REGNUM)) | |
450 | { | |
451 | result->has_frame_ptr = 1; | |
452 | result->frame_ptr_offset = reg[RX_FP_REGNUM].k; | |
453 | } | |
454 | ||
455 | /* Record where all the registers were saved. */ | |
f7b7ed97 | 456 | stack.scan (check_for_saved, (void *) result); |
baa835b4 KB |
457 | |
458 | result->prologue_end = after_last_frame_setup_insn; | |
baa835b4 KB |
459 | } |
460 | ||
461 | ||
462 | /* Implement the "skip_prologue" gdbarch method. */ | |
463 | static CORE_ADDR | |
464 | rx_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) | |
465 | { | |
2c02bd72 | 466 | const char *name; |
baa835b4 KB |
467 | CORE_ADDR func_addr, func_end; |
468 | struct rx_prologue p; | |
469 | ||
470 | /* Try to find the extent of the function that contains PC. */ | |
471 | if (!find_pc_partial_function (pc, &name, &func_addr, &func_end)) | |
472 | return pc; | |
473 | ||
1b485e67 KB |
474 | /* The frame type doesn't matter here, since we only care about |
475 | where the prologue ends. We'll use RX_FRAME_TYPE_NORMAL. */ | |
476 | rx_analyze_prologue (pc, func_end, RX_FRAME_TYPE_NORMAL, &p); | |
baa835b4 KB |
477 | return p.prologue_end; |
478 | } | |
479 | ||
480 | /* Given a frame described by THIS_FRAME, decode the prologue of its | |
481 | associated function if there is not cache entry as specified by | |
482 | THIS_PROLOGUE_CACHE. Save the decoded prologue in the cache and | |
483 | return that struct as the value of this function. */ | |
1b485e67 | 484 | |
baa835b4 KB |
485 | static struct rx_prologue * |
486 | rx_analyze_frame_prologue (struct frame_info *this_frame, | |
1b485e67 | 487 | enum rx_frame_type frame_type, |
baa835b4 KB |
488 | void **this_prologue_cache) |
489 | { | |
490 | if (!*this_prologue_cache) | |
491 | { | |
492 | CORE_ADDR func_start, stop_addr; | |
493 | ||
494 | *this_prologue_cache = FRAME_OBSTACK_ZALLOC (struct rx_prologue); | |
495 | ||
496 | func_start = get_frame_func (this_frame); | |
497 | stop_addr = get_frame_pc (this_frame); | |
498 | ||
499 | /* If we couldn't find any function containing the PC, then | |
500 | just initialize the prologue cache, but don't do anything. */ | |
501 | if (!func_start) | |
502 | stop_addr = func_start; | |
503 | ||
1b485e67 | 504 | rx_analyze_prologue (func_start, stop_addr, frame_type, |
19ba03f4 | 505 | (struct rx_prologue *) *this_prologue_cache); |
baa835b4 KB |
506 | } |
507 | ||
19ba03f4 | 508 | return (struct rx_prologue *) *this_prologue_cache; |
baa835b4 KB |
509 | } |
510 | ||
1b485e67 KB |
511 | /* Determine type of frame by scanning the function for a return |
512 | instruction. */ | |
513 | ||
514 | static enum rx_frame_type | |
515 | rx_frame_type (struct frame_info *this_frame, void **this_cache) | |
516 | { | |
517 | const char *name; | |
518 | CORE_ADDR pc, start_pc, lim_pc; | |
519 | int bytes_read; | |
520 | struct rx_get_opcode_byte_handle opcode_handle; | |
521 | RX_Opcode_Decoded opc; | |
522 | ||
523 | gdb_assert (this_cache != NULL); | |
524 | ||
525 | /* If we have a cached value, return it. */ | |
526 | ||
527 | if (*this_cache != NULL) | |
528 | { | |
19ba03f4 | 529 | struct rx_prologue *p = (struct rx_prologue *) *this_cache; |
1b485e67 KB |
530 | |
531 | return p->frame_type; | |
532 | } | |
533 | ||
534 | /* No cached value; scan the function. The frame type is cached in | |
535 | rx_analyze_prologue / rx_analyze_frame_prologue. */ | |
536 | ||
537 | pc = get_frame_pc (this_frame); | |
538 | ||
539 | /* Attempt to find the last address in the function. If it cannot | |
540 | be determined, set the limit to be a short ways past the frame's | |
541 | pc. */ | |
542 | if (!find_pc_partial_function (pc, &name, &start_pc, &lim_pc)) | |
543 | lim_pc = pc + 20; | |
544 | ||
545 | while (pc < lim_pc) | |
546 | { | |
547 | opcode_handle.pc = pc; | |
548 | bytes_read = rx_decode_opcode (pc, &opc, rx_get_opcode_byte, | |
549 | &opcode_handle); | |
550 | ||
551 | if (bytes_read <= 0 || opc.id == RXO_rts) | |
552 | return RX_FRAME_TYPE_NORMAL; | |
553 | else if (opc.id == RXO_rtfi) | |
554 | return RX_FRAME_TYPE_FAST_INTERRUPT; | |
555 | else if (opc.id == RXO_rte) | |
556 | return RX_FRAME_TYPE_EXCEPTION; | |
557 | ||
558 | pc += bytes_read; | |
559 | } | |
560 | ||
561 | return RX_FRAME_TYPE_NORMAL; | |
562 | } | |
563 | ||
564 | ||
baa835b4 KB |
565 | /* Given the next frame and a prologue cache, return this frame's |
566 | base. */ | |
1b485e67 | 567 | |
baa835b4 | 568 | static CORE_ADDR |
1b485e67 | 569 | rx_frame_base (struct frame_info *this_frame, void **this_cache) |
baa835b4 | 570 | { |
1b485e67 | 571 | enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache); |
baa835b4 | 572 | struct rx_prologue *p |
1b485e67 | 573 | = rx_analyze_frame_prologue (this_frame, frame_type, this_cache); |
baa835b4 KB |
574 | |
575 | /* In functions that use alloca, the distance between the stack | |
576 | pointer and the frame base varies dynamically, so we can't use | |
577 | the SP plus static information like prologue analysis to find the | |
578 | frame base. However, such functions must have a frame pointer, | |
579 | to be able to restore the SP on exit. So whenever we do have a | |
580 | frame pointer, use that to find the base. */ | |
581 | if (p->has_frame_ptr) | |
582 | { | |
583 | CORE_ADDR fp = get_frame_register_unsigned (this_frame, RX_FP_REGNUM); | |
584 | return fp - p->frame_ptr_offset; | |
585 | } | |
586 | else | |
587 | { | |
588 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, RX_SP_REGNUM); | |
589 | return sp - p->frame_size; | |
590 | } | |
591 | } | |
592 | ||
593 | /* Implement the "frame_this_id" method for unwinding frames. */ | |
1b485e67 | 594 | |
baa835b4 | 595 | static void |
1b485e67 KB |
596 | rx_frame_this_id (struct frame_info *this_frame, void **this_cache, |
597 | struct frame_id *this_id) | |
baa835b4 | 598 | { |
1b485e67 | 599 | *this_id = frame_id_build (rx_frame_base (this_frame, this_cache), |
baa835b4 KB |
600 | get_frame_func (this_frame)); |
601 | } | |
602 | ||
603 | /* Implement the "frame_prev_register" method for unwinding frames. */ | |
1b485e67 | 604 | |
baa835b4 | 605 | static struct value * |
1b485e67 KB |
606 | rx_frame_prev_register (struct frame_info *this_frame, void **this_cache, |
607 | int regnum) | |
baa835b4 | 608 | { |
1b485e67 | 609 | enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache); |
baa835b4 | 610 | struct rx_prologue *p |
1b485e67 KB |
611 | = rx_analyze_frame_prologue (this_frame, frame_type, this_cache); |
612 | CORE_ADDR frame_base = rx_frame_base (this_frame, this_cache); | |
baa835b4 KB |
613 | |
614 | if (regnum == RX_SP_REGNUM) | |
1b485e67 KB |
615 | { |
616 | if (frame_type == RX_FRAME_TYPE_EXCEPTION) | |
617 | { | |
618 | struct value *psw_val; | |
619 | CORE_ADDR psw; | |
620 | ||
621 | psw_val = rx_frame_prev_register (this_frame, this_cache, | |
622 | RX_PSW_REGNUM); | |
623 | psw = extract_unsigned_integer (value_contents_all (psw_val), 4, | |
624 | gdbarch_byte_order ( | |
625 | get_frame_arch (this_frame))); | |
626 | ||
627 | if ((psw & 0x20000 /* U bit */) != 0) | |
628 | return rx_frame_prev_register (this_frame, this_cache, | |
629 | RX_USP_REGNUM); | |
630 | ||
631 | /* Fall through for the case where U bit is zero. */ | |
632 | } | |
633 | ||
634 | return frame_unwind_got_constant (this_frame, regnum, frame_base); | |
635 | } | |
636 | ||
637 | if (frame_type == RX_FRAME_TYPE_FAST_INTERRUPT) | |
638 | { | |
639 | if (regnum == RX_PC_REGNUM) | |
640 | return rx_frame_prev_register (this_frame, this_cache, | |
641 | RX_BPC_REGNUM); | |
642 | if (regnum == RX_PSW_REGNUM) | |
643 | return rx_frame_prev_register (this_frame, this_cache, | |
644 | RX_BPSW_REGNUM); | |
645 | } | |
baa835b4 KB |
646 | |
647 | /* If prologue analysis says we saved this register somewhere, | |
648 | return a description of the stack slot holding it. */ | |
1b485e67 | 649 | if (p->reg_offset[regnum] != 1) |
baa835b4 KB |
650 | return frame_unwind_got_memory (this_frame, regnum, |
651 | frame_base + p->reg_offset[regnum]); | |
652 | ||
653 | /* Otherwise, presume we haven't changed the value of this | |
654 | register, and get it from the next frame. */ | |
1b485e67 KB |
655 | return frame_unwind_got_register (this_frame, regnum, regnum); |
656 | } | |
657 | ||
658 | /* Return TRUE if the frame indicated by FRAME_TYPE is a normal frame. */ | |
659 | ||
660 | static int | |
661 | normal_frame_p (enum rx_frame_type frame_type) | |
662 | { | |
663 | return (frame_type == RX_FRAME_TYPE_NORMAL); | |
664 | } | |
665 | ||
666 | /* Return TRUE if the frame indicated by FRAME_TYPE is an exception | |
667 | frame. */ | |
668 | ||
669 | static int | |
670 | exception_frame_p (enum rx_frame_type frame_type) | |
671 | { | |
672 | return (frame_type == RX_FRAME_TYPE_EXCEPTION | |
673 | || frame_type == RX_FRAME_TYPE_FAST_INTERRUPT); | |
674 | } | |
675 | ||
676 | /* Common code used by both normal and exception frame sniffers. */ | |
677 | ||
678 | static int | |
679 | rx_frame_sniffer_common (const struct frame_unwind *self, | |
680 | struct frame_info *this_frame, | |
681 | void **this_cache, | |
682 | int (*sniff_p)(enum rx_frame_type) ) | |
683 | { | |
684 | gdb_assert (this_cache != NULL); | |
685 | ||
686 | if (*this_cache == NULL) | |
687 | { | |
688 | enum rx_frame_type frame_type = rx_frame_type (this_frame, this_cache); | |
689 | ||
690 | if (sniff_p (frame_type)) | |
691 | { | |
692 | /* The call below will fill in the cache, including the frame | |
693 | type. */ | |
694 | (void) rx_analyze_frame_prologue (this_frame, frame_type, this_cache); | |
695 | ||
696 | return 1; | |
697 | } | |
698 | else | |
699 | return 0; | |
700 | } | |
baa835b4 | 701 | else |
1b485e67 | 702 | { |
19ba03f4 | 703 | struct rx_prologue *p = (struct rx_prologue *) *this_cache; |
1b485e67 KB |
704 | |
705 | return sniff_p (p->frame_type); | |
706 | } | |
707 | } | |
708 | ||
709 | /* Frame sniffer for normal (non-exception) frames. */ | |
710 | ||
711 | static int | |
712 | rx_frame_sniffer (const struct frame_unwind *self, | |
713 | struct frame_info *this_frame, | |
714 | void **this_cache) | |
715 | { | |
716 | return rx_frame_sniffer_common (self, this_frame, this_cache, | |
717 | normal_frame_p); | |
718 | } | |
719 | ||
720 | /* Frame sniffer for exception frames. */ | |
721 | ||
722 | static int | |
723 | rx_exception_sniffer (const struct frame_unwind *self, | |
724 | struct frame_info *this_frame, | |
725 | void **this_cache) | |
726 | { | |
727 | return rx_frame_sniffer_common (self, this_frame, this_cache, | |
728 | exception_frame_p); | |
baa835b4 KB |
729 | } |
730 | ||
1b485e67 KB |
731 | /* Data structure for normal code using instruction-based prologue |
732 | analyzer. */ | |
733 | ||
baa835b4 KB |
734 | static const struct frame_unwind rx_frame_unwind = { |
735 | NORMAL_FRAME, | |
e0f68161 | 736 | default_frame_unwind_stop_reason, |
baa835b4 KB |
737 | rx_frame_this_id, |
738 | rx_frame_prev_register, | |
739 | NULL, | |
1b485e67 KB |
740 | rx_frame_sniffer |
741 | }; | |
742 | ||
743 | /* Data structure for exception code using instruction-based prologue | |
744 | analyzer. */ | |
745 | ||
746 | static const struct frame_unwind rx_exception_unwind = { | |
747 | /* SIGTRAMP_FRAME could be used here, but backtraces are less informative. */ | |
748 | NORMAL_FRAME, | |
749 | default_frame_unwind_stop_reason, | |
750 | rx_frame_this_id, | |
751 | rx_frame_prev_register, | |
752 | NULL, | |
753 | rx_exception_sniffer | |
baa835b4 KB |
754 | }; |
755 | ||
756 | /* Implement the "unwind_pc" gdbarch method. */ | |
757 | static CORE_ADDR | |
758 | rx_unwind_pc (struct gdbarch *gdbarch, struct frame_info *this_frame) | |
759 | { | |
760 | ULONGEST pc; | |
761 | ||
762 | pc = frame_unwind_register_unsigned (this_frame, RX_PC_REGNUM); | |
763 | return pc; | |
764 | } | |
765 | ||
766 | /* Implement the "unwind_sp" gdbarch method. */ | |
767 | static CORE_ADDR | |
768 | rx_unwind_sp (struct gdbarch *gdbarch, struct frame_info *this_frame) | |
769 | { | |
770 | ULONGEST sp; | |
771 | ||
772 | sp = frame_unwind_register_unsigned (this_frame, RX_SP_REGNUM); | |
773 | return sp; | |
774 | } | |
775 | ||
776 | /* Implement the "dummy_id" gdbarch method. */ | |
777 | static struct frame_id | |
778 | rx_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) | |
779 | { | |
780 | return | |
781 | frame_id_build (get_frame_register_unsigned (this_frame, RX_SP_REGNUM), | |
782 | get_frame_pc (this_frame)); | |
783 | } | |
784 | ||
785 | /* Implement the "push_dummy_call" gdbarch method. */ | |
786 | static CORE_ADDR | |
787 | rx_push_dummy_call (struct gdbarch *gdbarch, struct value *function, | |
788 | struct regcache *regcache, CORE_ADDR bp_addr, int nargs, | |
789 | struct value **args, CORE_ADDR sp, int struct_return, | |
790 | CORE_ADDR struct_addr) | |
791 | { | |
792 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
793 | int write_pass; | |
794 | int sp_off = 0; | |
795 | CORE_ADDR cfa; | |
796 | int num_register_candidate_args; | |
797 | ||
798 | struct type *func_type = value_type (function); | |
799 | ||
800 | /* Dereference function pointer types. */ | |
801 | while (TYPE_CODE (func_type) == TYPE_CODE_PTR) | |
802 | func_type = TYPE_TARGET_TYPE (func_type); | |
803 | ||
804 | /* The end result had better be a function or a method. */ | |
805 | gdb_assert (TYPE_CODE (func_type) == TYPE_CODE_FUNC | |
806 | || TYPE_CODE (func_type) == TYPE_CODE_METHOD); | |
807 | ||
808 | /* Functions with a variable number of arguments have all of their | |
809 | variable arguments and the last non-variable argument passed | |
810 | on the stack. | |
811 | ||
812 | Otherwise, we can pass up to four arguments on the stack. | |
813 | ||
814 | Once computed, we leave this value alone. I.e. we don't update | |
815 | it in case of a struct return going in a register or an argument | |
816 | requiring multiple registers, etc. We rely instead on the value | |
817 | of the ``arg_reg'' variable to get these other details correct. */ | |
818 | ||
819 | if (TYPE_VARARGS (func_type)) | |
820 | num_register_candidate_args = TYPE_NFIELDS (func_type) - 1; | |
821 | else | |
822 | num_register_candidate_args = 4; | |
823 | ||
824 | /* We make two passes; the first does the stack allocation, | |
825 | the second actually stores the arguments. */ | |
826 | for (write_pass = 0; write_pass <= 1; write_pass++) | |
827 | { | |
828 | int i; | |
829 | int arg_reg = RX_R1_REGNUM; | |
830 | ||
831 | if (write_pass) | |
832 | sp = align_down (sp - sp_off, 4); | |
833 | sp_off = 0; | |
834 | ||
835 | if (struct_return) | |
836 | { | |
837 | struct type *return_type = TYPE_TARGET_TYPE (func_type); | |
838 | ||
839 | gdb_assert (TYPE_CODE (return_type) == TYPE_CODE_STRUCT | |
840 | || TYPE_CODE (func_type) == TYPE_CODE_UNION); | |
841 | ||
842 | if (TYPE_LENGTH (return_type) > 16 | |
843 | || TYPE_LENGTH (return_type) % 4 != 0) | |
844 | { | |
845 | if (write_pass) | |
846 | regcache_cooked_write_unsigned (regcache, RX_R15_REGNUM, | |
847 | struct_addr); | |
848 | } | |
849 | } | |
850 | ||
851 | /* Push the arguments. */ | |
852 | for (i = 0; i < nargs; i++) | |
853 | { | |
854 | struct value *arg = args[i]; | |
855 | const gdb_byte *arg_bits = value_contents_all (arg); | |
856 | struct type *arg_type = check_typedef (value_type (arg)); | |
857 | ULONGEST arg_size = TYPE_LENGTH (arg_type); | |
858 | ||
859 | if (i == 0 && struct_addr != 0 && !struct_return | |
860 | && TYPE_CODE (arg_type) == TYPE_CODE_PTR | |
861 | && extract_unsigned_integer (arg_bits, 4, | |
862 | byte_order) == struct_addr) | |
863 | { | |
864 | /* This argument represents the address at which C++ (and | |
865 | possibly other languages) store their return value. | |
866 | Put this value in R15. */ | |
867 | if (write_pass) | |
868 | regcache_cooked_write_unsigned (regcache, RX_R15_REGNUM, | |
869 | struct_addr); | |
870 | } | |
871 | else if (TYPE_CODE (arg_type) != TYPE_CODE_STRUCT | |
94715c17 KB |
872 | && TYPE_CODE (arg_type) != TYPE_CODE_UNION |
873 | && arg_size <= 8) | |
baa835b4 KB |
874 | { |
875 | /* Argument is a scalar. */ | |
876 | if (arg_size == 8) | |
877 | { | |
878 | if (i < num_register_candidate_args | |
879 | && arg_reg <= RX_R4_REGNUM - 1) | |
880 | { | |
881 | /* If argument registers are going to be used to pass | |
882 | an 8 byte scalar, the ABI specifies that two registers | |
883 | must be available. */ | |
884 | if (write_pass) | |
885 | { | |
886 | regcache_cooked_write_unsigned (regcache, arg_reg, | |
887 | extract_unsigned_integer | |
888 | (arg_bits, 4, | |
889 | byte_order)); | |
890 | regcache_cooked_write_unsigned (regcache, | |
891 | arg_reg + 1, | |
892 | extract_unsigned_integer | |
893 | (arg_bits + 4, 4, | |
894 | byte_order)); | |
895 | } | |
896 | arg_reg += 2; | |
897 | } | |
898 | else | |
899 | { | |
900 | sp_off = align_up (sp_off, 4); | |
901 | /* Otherwise, pass the 8 byte scalar on the stack. */ | |
902 | if (write_pass) | |
903 | write_memory (sp + sp_off, arg_bits, 8); | |
904 | sp_off += 8; | |
905 | } | |
906 | } | |
907 | else | |
908 | { | |
909 | ULONGEST u; | |
910 | ||
911 | gdb_assert (arg_size <= 4); | |
912 | ||
913 | u = | |
914 | extract_unsigned_integer (arg_bits, arg_size, byte_order); | |
915 | ||
916 | if (i < num_register_candidate_args | |
917 | && arg_reg <= RX_R4_REGNUM) | |
918 | { | |
919 | if (write_pass) | |
920 | regcache_cooked_write_unsigned (regcache, arg_reg, u); | |
921 | arg_reg += 1; | |
922 | } | |
923 | else | |
924 | { | |
925 | int p_arg_size = 4; | |
926 | ||
927 | if (TYPE_PROTOTYPED (func_type) | |
928 | && i < TYPE_NFIELDS (func_type)) | |
929 | { | |
930 | struct type *p_arg_type = | |
931 | TYPE_FIELD_TYPE (func_type, i); | |
932 | p_arg_size = TYPE_LENGTH (p_arg_type); | |
933 | } | |
934 | ||
935 | sp_off = align_up (sp_off, p_arg_size); | |
936 | ||
937 | if (write_pass) | |
938 | write_memory_unsigned_integer (sp + sp_off, | |
939 | p_arg_size, byte_order, | |
940 | u); | |
941 | sp_off += p_arg_size; | |
942 | } | |
943 | } | |
944 | } | |
945 | else | |
946 | { | |
947 | /* Argument is a struct or union. Pass as much of the struct | |
948 | in registers, if possible. Pass the rest on the stack. */ | |
949 | while (arg_size > 0) | |
950 | { | |
951 | if (i < num_register_candidate_args | |
952 | && arg_reg <= RX_R4_REGNUM | |
953 | && arg_size <= 4 * (RX_R4_REGNUM - arg_reg + 1) | |
954 | && arg_size % 4 == 0) | |
955 | { | |
325fac50 | 956 | int len = std::min (arg_size, (ULONGEST) 4); |
baa835b4 KB |
957 | |
958 | if (write_pass) | |
959 | regcache_cooked_write_unsigned (regcache, arg_reg, | |
960 | extract_unsigned_integer | |
961 | (arg_bits, len, | |
962 | byte_order)); | |
963 | arg_bits += len; | |
964 | arg_size -= len; | |
965 | arg_reg++; | |
966 | } | |
967 | else | |
968 | { | |
969 | sp_off = align_up (sp_off, 4); | |
970 | if (write_pass) | |
971 | write_memory (sp + sp_off, arg_bits, arg_size); | |
972 | sp_off += align_up (arg_size, 4); | |
973 | arg_size = 0; | |
974 | } | |
975 | } | |
976 | } | |
977 | } | |
978 | } | |
979 | ||
980 | /* Keep track of the stack address prior to pushing the return address. | |
981 | This is the value that we'll return. */ | |
982 | cfa = sp; | |
983 | ||
984 | /* Push the return address. */ | |
985 | sp = sp - 4; | |
986 | write_memory_unsigned_integer (sp, 4, byte_order, bp_addr); | |
987 | ||
988 | /* Update the stack pointer. */ | |
989 | regcache_cooked_write_unsigned (regcache, RX_SP_REGNUM, sp); | |
990 | ||
991 | return cfa; | |
992 | } | |
993 | ||
994 | /* Implement the "return_value" gdbarch method. */ | |
995 | static enum return_value_convention | |
996 | rx_return_value (struct gdbarch *gdbarch, | |
6a3a010b | 997 | struct value *function, |
baa835b4 KB |
998 | struct type *valtype, |
999 | struct regcache *regcache, | |
1000 | gdb_byte *readbuf, const gdb_byte *writebuf) | |
1001 | { | |
1002 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
1003 | ULONGEST valtype_len = TYPE_LENGTH (valtype); | |
1004 | ||
1005 | if (TYPE_LENGTH (valtype) > 16 | |
1006 | || ((TYPE_CODE (valtype) == TYPE_CODE_STRUCT | |
1007 | || TYPE_CODE (valtype) == TYPE_CODE_UNION) | |
1008 | && TYPE_LENGTH (valtype) % 4 != 0)) | |
1009 | return RETURN_VALUE_STRUCT_CONVENTION; | |
1010 | ||
1011 | if (readbuf) | |
1012 | { | |
1013 | ULONGEST u; | |
1014 | int argreg = RX_R1_REGNUM; | |
1015 | int offset = 0; | |
1016 | ||
1017 | while (valtype_len > 0) | |
1018 | { | |
325fac50 | 1019 | int len = std::min (valtype_len, (ULONGEST) 4); |
baa835b4 KB |
1020 | |
1021 | regcache_cooked_read_unsigned (regcache, argreg, &u); | |
1022 | store_unsigned_integer (readbuf + offset, len, byte_order, u); | |
1023 | valtype_len -= len; | |
1024 | offset += len; | |
1025 | argreg++; | |
1026 | } | |
1027 | } | |
1028 | ||
1029 | if (writebuf) | |
1030 | { | |
1031 | ULONGEST u; | |
1032 | int argreg = RX_R1_REGNUM; | |
1033 | int offset = 0; | |
1034 | ||
1035 | while (valtype_len > 0) | |
1036 | { | |
325fac50 | 1037 | int len = std::min (valtype_len, (ULONGEST) 4); |
baa835b4 KB |
1038 | |
1039 | u = extract_unsigned_integer (writebuf + offset, len, byte_order); | |
1040 | regcache_cooked_write_unsigned (regcache, argreg, u); | |
1041 | valtype_len -= len; | |
1042 | offset += len; | |
1043 | argreg++; | |
1044 | } | |
1045 | } | |
1046 | ||
1047 | return RETURN_VALUE_REGISTER_CONVENTION; | |
1048 | } | |
1049 | ||
04180708 | 1050 | constexpr gdb_byte rx_break_insn[] = { 0x00 }; |
598cc9dc | 1051 | |
04180708 | 1052 | typedef BP_MANIPULATION (rx_break_insn) rx_breakpoint; |
baa835b4 | 1053 | |
fd6e021d KB |
1054 | /* Implement the dwarf_reg_to_regnum" gdbarch method. */ |
1055 | ||
1056 | static int | |
1057 | rx_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) | |
1058 | { | |
1059 | if (0 <= reg && reg <= 15) | |
1060 | return reg; | |
1061 | else if (reg == 16) | |
1062 | return RX_PSW_REGNUM; | |
1063 | else if (reg == 17) | |
1064 | return RX_PC_REGNUM; | |
1065 | else | |
0fde2c53 | 1066 | return -1; |
fd6e021d KB |
1067 | } |
1068 | ||
baa835b4 KB |
1069 | /* Allocate and initialize a gdbarch object. */ |
1070 | static struct gdbarch * | |
1071 | rx_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | |
1072 | { | |
1073 | struct gdbarch *gdbarch; | |
1074 | struct gdbarch_tdep *tdep; | |
1075 | int elf_flags; | |
1076 | ||
1077 | /* Extract the elf_flags if available. */ | |
1078 | if (info.abfd != NULL | |
1079 | && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour) | |
1080 | elf_flags = elf_elfheader (info.abfd)->e_flags; | |
1081 | else | |
1082 | elf_flags = 0; | |
1083 | ||
1084 | ||
1085 | /* Try to find the architecture in the list of already defined | |
1086 | architectures. */ | |
1087 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
1088 | arches != NULL; | |
1089 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
1090 | { | |
1091 | if (gdbarch_tdep (arches->gdbarch)->elf_flags != elf_flags) | |
1092 | continue; | |
1093 | ||
1094 | return arches->gdbarch; | |
1095 | } | |
1096 | ||
1097 | /* None found, create a new architecture from the information | |
1098 | provided. */ | |
e6ddc3bf | 1099 | tdep = XCNEW (struct gdbarch_tdep); |
baa835b4 KB |
1100 | gdbarch = gdbarch_alloc (&info, tdep); |
1101 | tdep->elf_flags = elf_flags; | |
1102 | ||
1103 | set_gdbarch_num_regs (gdbarch, RX_NUM_REGS); | |
1104 | set_gdbarch_num_pseudo_regs (gdbarch, 0); | |
1105 | set_gdbarch_register_name (gdbarch, rx_register_name); | |
1106 | set_gdbarch_register_type (gdbarch, rx_register_type); | |
1107 | set_gdbarch_pc_regnum (gdbarch, RX_PC_REGNUM); | |
1108 | set_gdbarch_sp_regnum (gdbarch, RX_SP_REGNUM); | |
1109 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
1110 | set_gdbarch_decr_pc_after_break (gdbarch, 1); | |
04180708 YQ |
1111 | set_gdbarch_breakpoint_kind_from_pc (gdbarch, rx_breakpoint::kind_from_pc); |
1112 | set_gdbarch_sw_breakpoint_from_kind (gdbarch, rx_breakpoint::bp_from_kind); | |
baa835b4 KB |
1113 | set_gdbarch_skip_prologue (gdbarch, rx_skip_prologue); |
1114 | ||
baa835b4 KB |
1115 | set_gdbarch_unwind_pc (gdbarch, rx_unwind_pc); |
1116 | set_gdbarch_unwind_sp (gdbarch, rx_unwind_sp); | |
1117 | ||
1118 | /* Target builtin data types. */ | |
1119 | set_gdbarch_char_signed (gdbarch, 0); | |
1120 | set_gdbarch_short_bit (gdbarch, 16); | |
1121 | set_gdbarch_int_bit (gdbarch, 32); | |
1122 | set_gdbarch_long_bit (gdbarch, 32); | |
1123 | set_gdbarch_long_long_bit (gdbarch, 64); | |
1124 | set_gdbarch_ptr_bit (gdbarch, 32); | |
1125 | set_gdbarch_float_bit (gdbarch, 32); | |
1126 | set_gdbarch_float_format (gdbarch, floatformats_ieee_single); | |
1127 | if (elf_flags & E_FLAG_RX_64BIT_DOUBLES) | |
1128 | { | |
1129 | set_gdbarch_double_bit (gdbarch, 64); | |
1130 | set_gdbarch_long_double_bit (gdbarch, 64); | |
1131 | set_gdbarch_double_format (gdbarch, floatformats_ieee_double); | |
1132 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_double); | |
1133 | } | |
1134 | else | |
1135 | { | |
1136 | set_gdbarch_double_bit (gdbarch, 32); | |
1137 | set_gdbarch_long_double_bit (gdbarch, 32); | |
1138 | set_gdbarch_double_format (gdbarch, floatformats_ieee_single); | |
1139 | set_gdbarch_long_double_format (gdbarch, floatformats_ieee_single); | |
1140 | } | |
1141 | ||
fd6e021d KB |
1142 | /* DWARF register mapping. */ |
1143 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, rx_dwarf_reg_to_regnum); | |
1144 | ||
baa835b4 | 1145 | /* Frame unwinding. */ |
1b485e67 | 1146 | frame_unwind_append_unwinder (gdbarch, &rx_exception_unwind); |
baa835b4 | 1147 | dwarf2_append_unwinders (gdbarch); |
baa835b4 KB |
1148 | frame_unwind_append_unwinder (gdbarch, &rx_frame_unwind); |
1149 | ||
1150 | /* Methods for saving / extracting a dummy frame's ID. | |
1151 | The ID's stack address must match the SP value returned by | |
1152 | PUSH_DUMMY_CALL, and saved by generic_save_dummy_frame_tos. */ | |
1153 | set_gdbarch_dummy_id (gdbarch, rx_dummy_id); | |
1154 | set_gdbarch_push_dummy_call (gdbarch, rx_push_dummy_call); | |
1155 | set_gdbarch_return_value (gdbarch, rx_return_value); | |
1156 | ||
1157 | /* Virtual tables. */ | |
1158 | set_gdbarch_vbit_in_delta (gdbarch, 1); | |
1159 | ||
1160 | return gdbarch; | |
1161 | } | |
1162 | ||
1163 | /* Register the above initialization routine. */ | |
693be288 | 1164 | |
baa835b4 KB |
1165 | void |
1166 | _initialize_rx_tdep (void) | |
1167 | { | |
1168 | register_gdbarch_init (bfd_arch_rx, rx_gdbarch_init); | |
1169 | } |