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5769d3cd | 1 | /* Target-dependent code for GDB, the GNU debugger. |
ca557f44 | 2 | |
ecd75fc8 | 3 | Copyright (C) 2001-2014 Free Software Foundation, Inc. |
ca557f44 | 4 | |
5769d3cd AC |
5 | Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com) |
6 | for IBM Deutschland Entwicklung GmbH, IBM Corporation. | |
7 | ||
8 | This file is part of GDB. | |
9 | ||
10 | This program is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
a9762ec7 | 12 | the Free Software Foundation; either version 3 of the License, or |
5769d3cd AC |
13 | (at your option) any later version. |
14 | ||
15 | This program is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
a9762ec7 | 21 | along with this program. If not, see <http://www.gnu.org/licenses/>. */ |
5769d3cd | 22 | |
d0f54f9d | 23 | #include "defs.h" |
5769d3cd AC |
24 | #include "arch-utils.h" |
25 | #include "frame.h" | |
26 | #include "inferior.h" | |
45741a9c | 27 | #include "infrun.h" |
5769d3cd AC |
28 | #include "symtab.h" |
29 | #include "target.h" | |
30 | #include "gdbcore.h" | |
31 | #include "gdbcmd.h" | |
5769d3cd | 32 | #include "objfiles.h" |
5769d3cd AC |
33 | #include "floatformat.h" |
34 | #include "regcache.h" | |
a8c99f38 JB |
35 | #include "trad-frame.h" |
36 | #include "frame-base.h" | |
37 | #include "frame-unwind.h" | |
a431654a | 38 | #include "dwarf2-frame.h" |
d0f54f9d JB |
39 | #include "reggroups.h" |
40 | #include "regset.h" | |
fd0407d6 | 41 | #include "value.h" |
a89aa300 | 42 | #include "dis-asm.h" |
76a9d10f | 43 | #include "solib-svr4.h" |
3fc46200 | 44 | #include "prologue-value.h" |
70728992 | 45 | #include "linux-tdep.h" |
0e5fae36 | 46 | #include "s390-linux-tdep.h" |
4ac33720 | 47 | #include "auxv.h" |
237b092b | 48 | #include "xml-syscall.h" |
5769d3cd | 49 | |
55aa24fb SDJ |
50 | #include "stap-probe.h" |
51 | #include "ax.h" | |
52 | #include "ax-gdb.h" | |
53 | #include "user-regs.h" | |
54 | #include "cli/cli-utils.h" | |
55 | #include <ctype.h> | |
04a83fee | 56 | #include "elf/common.h" |
55aa24fb | 57 | |
7803799a | 58 | #include "features/s390-linux32.c" |
c642a434 UW |
59 | #include "features/s390-linux32v1.c" |
60 | #include "features/s390-linux32v2.c" | |
7803799a | 61 | #include "features/s390-linux64.c" |
c642a434 UW |
62 | #include "features/s390-linux64v1.c" |
63 | #include "features/s390-linux64v2.c" | |
4ac33720 | 64 | #include "features/s390-te-linux64.c" |
7803799a | 65 | #include "features/s390x-linux64.c" |
c642a434 UW |
66 | #include "features/s390x-linux64v1.c" |
67 | #include "features/s390x-linux64v2.c" | |
4ac33720 | 68 | #include "features/s390x-te-linux64.c" |
7803799a | 69 | |
237b092b AA |
70 | #define XML_SYSCALL_FILENAME_S390 "syscalls/s390-linux.xml" |
71 | #define XML_SYSCALL_FILENAME_S390X "syscalls/s390x-linux.xml" | |
72 | ||
d0f54f9d JB |
73 | /* The tdep structure. */ |
74 | ||
75 | struct gdbarch_tdep | |
5769d3cd | 76 | { |
b0cf273e JB |
77 | /* ABI version. */ |
78 | enum { ABI_LINUX_S390, ABI_LINUX_ZSERIES } abi; | |
79 | ||
7803799a UW |
80 | /* Pseudo register numbers. */ |
81 | int gpr_full_regnum; | |
82 | int pc_regnum; | |
83 | int cc_regnum; | |
84 | ||
5aa82d05 AA |
85 | int have_linux_v1; |
86 | int have_linux_v2; | |
87 | int have_tdb; | |
d0f54f9d JB |
88 | }; |
89 | ||
90 | ||
7803799a UW |
91 | /* ABI call-saved register information. */ |
92 | ||
93 | static int | |
94 | s390_register_call_saved (struct gdbarch *gdbarch, int regnum) | |
d0f54f9d | 95 | { |
7803799a UW |
96 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
97 | ||
98 | switch (tdep->abi) | |
6707b003 | 99 | { |
7803799a UW |
100 | case ABI_LINUX_S390: |
101 | if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) | |
102 | || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM | |
103 | || regnum == S390_A0_REGNUM) | |
104 | return 1; | |
6707b003 | 105 | |
7803799a UW |
106 | break; |
107 | ||
108 | case ABI_LINUX_ZSERIES: | |
109 | if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM) | |
110 | || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM) | |
111 | || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM)) | |
112 | return 1; | |
113 | ||
114 | break; | |
115 | } | |
116 | ||
117 | return 0; | |
5769d3cd AC |
118 | } |
119 | ||
c642a434 UW |
120 | static int |
121 | s390_cannot_store_register (struct gdbarch *gdbarch, int regnum) | |
122 | { | |
123 | /* The last-break address is read-only. */ | |
124 | return regnum == S390_LAST_BREAK_REGNUM; | |
125 | } | |
126 | ||
127 | static void | |
128 | s390_write_pc (struct regcache *regcache, CORE_ADDR pc) | |
129 | { | |
130 | struct gdbarch *gdbarch = get_regcache_arch (regcache); | |
131 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
132 | ||
133 | regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc); | |
134 | ||
135 | /* Set special SYSTEM_CALL register to 0 to prevent the kernel from | |
136 | messing with the PC we just installed, if we happen to be within | |
137 | an interrupted system call that the kernel wants to restart. | |
138 | ||
139 | Note that after we return from the dummy call, the SYSTEM_CALL and | |
140 | ORIG_R2 registers will be automatically restored, and the kernel | |
141 | continues to restart the system call at this point. */ | |
142 | if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0) | |
143 | regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0); | |
144 | } | |
145 | ||
7803799a | 146 | |
d0f54f9d JB |
147 | /* DWARF Register Mapping. */ |
148 | ||
2ccd1468 | 149 | static const short s390_dwarf_regmap[] = |
d0f54f9d JB |
150 | { |
151 | /* General Purpose Registers. */ | |
152 | S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM, | |
153 | S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM, | |
154 | S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM, | |
155 | S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM, | |
156 | ||
157 | /* Floating Point Registers. */ | |
158 | S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM, | |
159 | S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM, | |
160 | S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM, | |
161 | S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM, | |
162 | ||
163 | /* Control Registers (not mapped). */ | |
34201ae3 UW |
164 | -1, -1, -1, -1, -1, -1, -1, -1, |
165 | -1, -1, -1, -1, -1, -1, -1, -1, | |
d0f54f9d JB |
166 | |
167 | /* Access Registers. */ | |
168 | S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM, | |
169 | S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM, | |
170 | S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM, | |
171 | S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM, | |
172 | ||
173 | /* Program Status Word. */ | |
174 | S390_PSWM_REGNUM, | |
7803799a UW |
175 | S390_PSWA_REGNUM, |
176 | ||
177 | /* GPR Lower Half Access. */ | |
178 | S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM, | |
179 | S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM, | |
180 | S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM, | |
181 | S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM, | |
c642a434 | 182 | |
94eae614 | 183 | /* GNU/Linux-specific registers (not mapped). */ |
c642a434 | 184 | -1, -1, -1, |
d0f54f9d JB |
185 | }; |
186 | ||
187 | /* Convert DWARF register number REG to the appropriate register | |
188 | number used by GDB. */ | |
a78f21af | 189 | static int |
d3f73121 | 190 | s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg) |
d0f54f9d | 191 | { |
7803799a UW |
192 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
193 | ||
194 | /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit | |
195 | GPRs. Note that call frame information still refers to the 32-bit | |
196 | lower halves, because s390_adjust_frame_regnum uses register numbers | |
197 | 66 .. 81 to access GPRs. */ | |
198 | if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16) | |
199 | return tdep->gpr_full_regnum + reg; | |
d0f54f9d | 200 | |
16aff9a6 | 201 | if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap)) |
7803799a | 202 | return s390_dwarf_regmap[reg]; |
d0f54f9d | 203 | |
7803799a UW |
204 | warning (_("Unmapped DWARF Register #%d encountered."), reg); |
205 | return -1; | |
206 | } | |
d0f54f9d | 207 | |
7803799a UW |
208 | /* Translate a .eh_frame register to DWARF register, or adjust a |
209 | .debug_frame register. */ | |
210 | static int | |
211 | s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p) | |
212 | { | |
213 | /* See s390_dwarf_reg_to_regnum for comments. */ | |
214 | return (num >= 0 && num < 16)? num + 66 : num; | |
d0f54f9d JB |
215 | } |
216 | ||
d0f54f9d | 217 | |
7803799a UW |
218 | /* Pseudo registers. */ |
219 | ||
2ccd1468 UW |
220 | static int |
221 | regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum) | |
222 | { | |
223 | return (tdep->gpr_full_regnum != -1 | |
224 | && regnum >= tdep->gpr_full_regnum | |
225 | && regnum <= tdep->gpr_full_regnum + 15); | |
226 | } | |
227 | ||
7803799a UW |
228 | static const char * |
229 | s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum) | |
d0f54f9d | 230 | { |
7803799a | 231 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
d0f54f9d | 232 | |
7803799a UW |
233 | if (regnum == tdep->pc_regnum) |
234 | return "pc"; | |
d0f54f9d | 235 | |
7803799a UW |
236 | if (regnum == tdep->cc_regnum) |
237 | return "cc"; | |
d0f54f9d | 238 | |
2ccd1468 | 239 | if (regnum_is_gpr_full (tdep, regnum)) |
7803799a UW |
240 | { |
241 | static const char *full_name[] = { | |
242 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
243 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" | |
244 | }; | |
245 | return full_name[regnum - tdep->gpr_full_regnum]; | |
d0f54f9d | 246 | } |
7803799a UW |
247 | |
248 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
d0f54f9d JB |
249 | } |
250 | ||
7803799a UW |
251 | static struct type * |
252 | s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum) | |
5769d3cd | 253 | { |
7803799a | 254 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
d0f54f9d | 255 | |
7803799a UW |
256 | if (regnum == tdep->pc_regnum) |
257 | return builtin_type (gdbarch)->builtin_func_ptr; | |
d0f54f9d | 258 | |
7803799a UW |
259 | if (regnum == tdep->cc_regnum) |
260 | return builtin_type (gdbarch)->builtin_int; | |
d0f54f9d | 261 | |
2ccd1468 | 262 | if (regnum_is_gpr_full (tdep, regnum)) |
7803799a UW |
263 | return builtin_type (gdbarch)->builtin_uint64; |
264 | ||
265 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
5769d3cd AC |
266 | } |
267 | ||
05d1431c | 268 | static enum register_status |
7803799a UW |
269 | s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache, |
270 | int regnum, gdb_byte *buf) | |
d0f54f9d | 271 | { |
7803799a | 272 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
e17a4113 | 273 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
7803799a | 274 | int regsize = register_size (gdbarch, regnum); |
d0f54f9d JB |
275 | ULONGEST val; |
276 | ||
7803799a | 277 | if (regnum == tdep->pc_regnum) |
d0f54f9d | 278 | { |
05d1431c PA |
279 | enum register_status status; |
280 | ||
281 | status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val); | |
282 | if (status == REG_VALID) | |
283 | { | |
284 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
285 | val &= 0x7fffffff; | |
286 | store_unsigned_integer (buf, regsize, byte_order, val); | |
287 | } | |
288 | return status; | |
7803799a | 289 | } |
d0f54f9d | 290 | |
7803799a UW |
291 | if (regnum == tdep->cc_regnum) |
292 | { | |
05d1431c PA |
293 | enum register_status status; |
294 | ||
295 | status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val); | |
296 | if (status == REG_VALID) | |
297 | { | |
298 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
299 | val = (val >> 12) & 3; | |
300 | else | |
301 | val = (val >> 44) & 3; | |
302 | store_unsigned_integer (buf, regsize, byte_order, val); | |
303 | } | |
304 | return status; | |
7803799a | 305 | } |
d0f54f9d | 306 | |
2ccd1468 | 307 | if (regnum_is_gpr_full (tdep, regnum)) |
7803799a | 308 | { |
05d1431c | 309 | enum register_status status; |
7803799a | 310 | ULONGEST val_upper; |
05d1431c | 311 | |
7803799a UW |
312 | regnum -= tdep->gpr_full_regnum; |
313 | ||
05d1431c PA |
314 | status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val); |
315 | if (status == REG_VALID) | |
316 | status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum, | |
317 | &val_upper); | |
318 | if (status == REG_VALID) | |
319 | { | |
320 | val |= val_upper << 32; | |
321 | store_unsigned_integer (buf, regsize, byte_order, val); | |
322 | } | |
323 | return status; | |
d0f54f9d | 324 | } |
7803799a UW |
325 | |
326 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
d0f54f9d JB |
327 | } |
328 | ||
329 | static void | |
7803799a UW |
330 | s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache, |
331 | int regnum, const gdb_byte *buf) | |
d0f54f9d | 332 | { |
7803799a | 333 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
e17a4113 | 334 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
7803799a | 335 | int regsize = register_size (gdbarch, regnum); |
d0f54f9d JB |
336 | ULONGEST val, psw; |
337 | ||
7803799a | 338 | if (regnum == tdep->pc_regnum) |
d0f54f9d | 339 | { |
7803799a UW |
340 | val = extract_unsigned_integer (buf, regsize, byte_order); |
341 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
342 | { | |
343 | regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw); | |
344 | val = (psw & 0x80000000) | (val & 0x7fffffff); | |
345 | } | |
346 | regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val); | |
347 | return; | |
348 | } | |
d0f54f9d | 349 | |
7803799a UW |
350 | if (regnum == tdep->cc_regnum) |
351 | { | |
352 | val = extract_unsigned_integer (buf, regsize, byte_order); | |
d0f54f9d | 353 | regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw); |
7803799a UW |
354 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) |
355 | val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12); | |
356 | else | |
357 | val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44); | |
358 | regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val); | |
359 | return; | |
360 | } | |
d0f54f9d | 361 | |
2ccd1468 | 362 | if (regnum_is_gpr_full (tdep, regnum)) |
7803799a UW |
363 | { |
364 | regnum -= tdep->gpr_full_regnum; | |
365 | val = extract_unsigned_integer (buf, regsize, byte_order); | |
366 | regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum, | |
367 | val & 0xffffffff); | |
368 | regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum, | |
369 | val >> 32); | |
370 | return; | |
d0f54f9d | 371 | } |
7803799a UW |
372 | |
373 | internal_error (__FILE__, __LINE__, _("invalid regnum")); | |
d0f54f9d JB |
374 | } |
375 | ||
376 | /* 'float' values are stored in the upper half of floating-point | |
377 | registers, even though we are otherwise a big-endian platform. */ | |
378 | ||
9acbedc0 | 379 | static struct value * |
2ed3c037 UW |
380 | s390_value_from_register (struct gdbarch *gdbarch, struct type *type, |
381 | int regnum, struct frame_id frame_id) | |
d0f54f9d | 382 | { |
2ed3c037 UW |
383 | struct value *value = default_value_from_register (gdbarch, type, |
384 | regnum, frame_id); | |
744a8059 SP |
385 | check_typedef (type); |
386 | ||
387 | if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM | |
388 | && TYPE_LENGTH (type) < 8) | |
9acbedc0 | 389 | set_value_offset (value, 0); |
d0f54f9d | 390 | |
9acbedc0 | 391 | return value; |
d0f54f9d JB |
392 | } |
393 | ||
394 | /* Register groups. */ | |
395 | ||
a78f21af | 396 | static int |
7803799a UW |
397 | s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum, |
398 | struct reggroup *group) | |
d0f54f9d JB |
399 | { |
400 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
401 | ||
d6db1fab UW |
402 | /* We usually save/restore the whole PSW, which includes PC and CC. |
403 | However, some older gdbservers may not support saving/restoring | |
404 | the whole PSW yet, and will return an XML register description | |
405 | excluding those from the save/restore register groups. In those | |
406 | cases, we still need to explicitly save/restore PC and CC in order | |
407 | to push or pop frames. Since this doesn't hurt anything if we | |
408 | already save/restore the whole PSW (it's just redundant), we add | |
409 | PC and CC at this point unconditionally. */ | |
d0f54f9d | 410 | if (group == save_reggroup || group == restore_reggroup) |
7803799a | 411 | return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum; |
d0f54f9d JB |
412 | |
413 | return default_register_reggroup_p (gdbarch, regnum, group); | |
414 | } | |
415 | ||
416 | ||
2ccd1468 | 417 | /* Maps for register sets. */ |
d0f54f9d | 418 | |
99b7da5d | 419 | static const struct regcache_map_entry s390_gregmap[] = |
2ccd1468 | 420 | { |
99b7da5d AA |
421 | { 1, S390_PSWM_REGNUM }, |
422 | { 1, S390_PSWA_REGNUM }, | |
423 | { 16, S390_R0_REGNUM }, | |
424 | { 16, S390_A0_REGNUM }, | |
425 | { 1, S390_ORIG_R2_REGNUM }, | |
426 | { 0 } | |
2ccd1468 | 427 | }; |
d0f54f9d | 428 | |
99b7da5d | 429 | static const struct regcache_map_entry s390_fpregmap[] = |
2ccd1468 | 430 | { |
99b7da5d AA |
431 | { 1, S390_FPC_REGNUM, 8 }, |
432 | { 16, S390_F0_REGNUM, 8 }, | |
433 | { 0 } | |
2ccd1468 | 434 | }; |
d0f54f9d | 435 | |
99b7da5d | 436 | static const struct regcache_map_entry s390_regmap_upper[] = |
2ccd1468 | 437 | { |
99b7da5d AA |
438 | { 16, S390_R0_UPPER_REGNUM, 4 }, |
439 | { 0 } | |
2ccd1468 | 440 | }; |
7803799a | 441 | |
99b7da5d | 442 | static const struct regcache_map_entry s390_regmap_last_break[] = |
2ccd1468 | 443 | { |
99b7da5d AA |
444 | { 1, REGCACHE_MAP_SKIP, 4 }, |
445 | { 1, S390_LAST_BREAK_REGNUM, 4 }, | |
446 | { 0 } | |
2ccd1468 | 447 | }; |
c642a434 | 448 | |
99b7da5d | 449 | static const struct regcache_map_entry s390x_regmap_last_break[] = |
2ccd1468 | 450 | { |
99b7da5d AA |
451 | { 1, S390_LAST_BREAK_REGNUM, 8 }, |
452 | { 0 } | |
2ccd1468 UW |
453 | }; |
454 | ||
99b7da5d | 455 | static const struct regcache_map_entry s390_regmap_system_call[] = |
2ccd1468 | 456 | { |
99b7da5d AA |
457 | { 1, S390_SYSTEM_CALL_REGNUM, 4 }, |
458 | { 0 } | |
2ccd1468 UW |
459 | }; |
460 | ||
99b7da5d | 461 | static const struct regcache_map_entry s390_regmap_tdb[] = |
2ccd1468 | 462 | { |
99b7da5d AA |
463 | { 1, S390_TDB_DWORD0_REGNUM, 8 }, |
464 | { 1, S390_TDB_ABORT_CODE_REGNUM, 8 }, | |
465 | { 1, S390_TDB_CONFLICT_TOKEN_REGNUM, 8 }, | |
466 | { 1, S390_TDB_ATIA_REGNUM, 8 }, | |
467 | { 12, REGCACHE_MAP_SKIP, 8 }, | |
468 | { 16, S390_TDB_R0_REGNUM, 8 }, | |
469 | { 0 } | |
2ccd1468 | 470 | }; |
c642a434 | 471 | |
4ac33720 | 472 | |
99b7da5d AA |
473 | /* Supply the TDB regset. Like regcache_supply_regset, but invalidate |
474 | the TDB registers unless the TDB format field is valid. */ | |
4ac33720 UW |
475 | |
476 | static void | |
477 | s390_supply_tdb_regset (const struct regset *regset, struct regcache *regcache, | |
478 | int regnum, const void *regs, size_t len) | |
479 | { | |
480 | ULONGEST tdw; | |
481 | enum register_status ret; | |
482 | int i; | |
483 | ||
99b7da5d | 484 | regcache_supply_regset (regset, regcache, regnum, regs, len); |
4ac33720 UW |
485 | ret = regcache_cooked_read_unsigned (regcache, S390_TDB_DWORD0_REGNUM, &tdw); |
486 | if (ret != REG_VALID || (tdw >> 56) != 1) | |
99b7da5d | 487 | regcache_supply_regset (regset, regcache, regnum, NULL, len); |
d0f54f9d JB |
488 | } |
489 | ||
99b7da5d AA |
490 | const struct regset s390_gregset = { |
491 | s390_gregmap, | |
492 | regcache_supply_regset, | |
493 | regcache_collect_regset | |
d0f54f9d JB |
494 | }; |
495 | ||
99b7da5d AA |
496 | const struct regset s390_fpregset = { |
497 | s390_fpregmap, | |
498 | regcache_supply_regset, | |
499 | regcache_collect_regset | |
d0f54f9d JB |
500 | }; |
501 | ||
7803799a | 502 | static const struct regset s390_upper_regset = { |
34201ae3 | 503 | s390_regmap_upper, |
99b7da5d AA |
504 | regcache_supply_regset, |
505 | regcache_collect_regset | |
7803799a UW |
506 | }; |
507 | ||
99b7da5d | 508 | const struct regset s390_last_break_regset = { |
c642a434 | 509 | s390_regmap_last_break, |
99b7da5d AA |
510 | regcache_supply_regset, |
511 | regcache_collect_regset | |
c642a434 UW |
512 | }; |
513 | ||
99b7da5d | 514 | const struct regset s390x_last_break_regset = { |
c642a434 | 515 | s390x_regmap_last_break, |
99b7da5d AA |
516 | regcache_supply_regset, |
517 | regcache_collect_regset | |
c642a434 UW |
518 | }; |
519 | ||
99b7da5d | 520 | const struct regset s390_system_call_regset = { |
c642a434 | 521 | s390_regmap_system_call, |
99b7da5d AA |
522 | regcache_supply_regset, |
523 | regcache_collect_regset | |
c642a434 UW |
524 | }; |
525 | ||
99b7da5d | 526 | const struct regset s390_tdb_regset = { |
4ac33720 UW |
527 | s390_regmap_tdb, |
528 | s390_supply_tdb_regset, | |
99b7da5d | 529 | regcache_collect_regset |
4ac33720 UW |
530 | }; |
531 | ||
5aa82d05 AA |
532 | /* Iterate over supported core file register note sections. */ |
533 | ||
534 | static void | |
535 | s390_iterate_over_regset_sections (struct gdbarch *gdbarch, | |
536 | iterate_over_regset_sections_cb *cb, | |
537 | void *cb_data, | |
538 | const struct regcache *regcache) | |
539 | { | |
540 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
8f0435f7 AA |
541 | const int gregset_size = (tdep->abi == ABI_LINUX_S390 ? |
542 | s390_sizeof_gregset : s390x_sizeof_gregset); | |
5aa82d05 | 543 | |
8f0435f7 AA |
544 | cb (".reg", gregset_size, &s390_gregset, NULL, cb_data); |
545 | cb (".reg2", s390_sizeof_fpregset, &s390_fpregset, NULL, cb_data); | |
5aa82d05 AA |
546 | |
547 | if (tdep->abi == ABI_LINUX_S390 && tdep->gpr_full_regnum != -1) | |
8f0435f7 AA |
548 | cb (".reg-s390-high-gprs", 16 * 4, &s390_upper_regset, |
549 | "s390 GPR upper halves", cb_data); | |
5aa82d05 AA |
550 | |
551 | if (tdep->have_linux_v1) | |
8f0435f7 AA |
552 | cb (".reg-s390-last-break", 8, |
553 | (gdbarch_ptr_bit (gdbarch) == 32 | |
554 | ? &s390_last_break_regset : &s390x_last_break_regset), | |
555 | "s930 last-break address", cb_data); | |
5aa82d05 AA |
556 | |
557 | if (tdep->have_linux_v2) | |
8f0435f7 AA |
558 | cb (".reg-s390-system-call", 4, &s390_system_call_regset, |
559 | "s390 system-call", cb_data); | |
5aa82d05 AA |
560 | |
561 | /* If regcache is set, we are in "write" (gcore) mode. In this | |
562 | case, don't iterate over the TDB unless its registers are | |
563 | available. */ | |
564 | if (tdep->have_tdb | |
565 | && (regcache == NULL | |
566 | || REG_VALID == regcache_register_status (regcache, | |
567 | S390_TDB_DWORD0_REGNUM))) | |
8f0435f7 AA |
568 | cb (".reg-s390-tdb", s390_sizeof_tdbregset, &s390_tdb_regset, |
569 | "s390 TDB", cb_data); | |
5aa82d05 AA |
570 | } |
571 | ||
7803799a UW |
572 | static const struct target_desc * |
573 | s390_core_read_description (struct gdbarch *gdbarch, | |
574 | struct target_ops *target, bfd *abfd) | |
575 | { | |
576 | asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs"); | |
c642a434 UW |
577 | asection *v1 = bfd_get_section_by_name (abfd, ".reg-s390-last-break"); |
578 | asection *v2 = bfd_get_section_by_name (abfd, ".reg-s390-system-call"); | |
7803799a | 579 | asection *section = bfd_get_section_by_name (abfd, ".reg"); |
04a83fee | 580 | CORE_ADDR hwcap = 0; |
4ac33720 UW |
581 | |
582 | target_auxv_search (target, AT_HWCAP, &hwcap); | |
7803799a UW |
583 | if (!section) |
584 | return NULL; | |
585 | ||
586 | switch (bfd_section_size (abfd, section)) | |
587 | { | |
588 | case s390_sizeof_gregset: | |
c642a434 | 589 | if (high_gprs) |
4ac33720 UW |
590 | return ((hwcap & HWCAP_S390_TE) ? tdesc_s390_te_linux64 : |
591 | v2? tdesc_s390_linux64v2 : | |
c642a434 UW |
592 | v1? tdesc_s390_linux64v1 : tdesc_s390_linux64); |
593 | else | |
594 | return (v2? tdesc_s390_linux32v2 : | |
595 | v1? tdesc_s390_linux32v1 : tdesc_s390_linux32); | |
7803799a UW |
596 | |
597 | case s390x_sizeof_gregset: | |
4ac33720 UW |
598 | return ((hwcap & HWCAP_S390_TE) ? tdesc_s390x_te_linux64 : |
599 | v2? tdesc_s390x_linux64v2 : | |
c642a434 | 600 | v1? tdesc_s390x_linux64v1 : tdesc_s390x_linux64); |
7803799a UW |
601 | |
602 | default: | |
603 | return NULL; | |
604 | } | |
605 | } | |
606 | ||
d0f54f9d | 607 | |
4bc8c588 JB |
608 | /* Decoding S/390 instructions. */ |
609 | ||
610 | /* Named opcode values for the S/390 instructions we recognize. Some | |
611 | instructions have their opcode split across two fields; those are the | |
612 | op1_* and op2_* enums. */ | |
613 | enum | |
614 | { | |
a8c99f38 JB |
615 | op1_lhi = 0xa7, op2_lhi = 0x08, |
616 | op1_lghi = 0xa7, op2_lghi = 0x09, | |
00ce08ef | 617 | op1_lgfi = 0xc0, op2_lgfi = 0x01, |
4bc8c588 | 618 | op_lr = 0x18, |
a8c99f38 JB |
619 | op_lgr = 0xb904, |
620 | op_l = 0x58, | |
621 | op1_ly = 0xe3, op2_ly = 0x58, | |
622 | op1_lg = 0xe3, op2_lg = 0x04, | |
623 | op_lm = 0x98, | |
624 | op1_lmy = 0xeb, op2_lmy = 0x98, | |
625 | op1_lmg = 0xeb, op2_lmg = 0x04, | |
4bc8c588 | 626 | op_st = 0x50, |
a8c99f38 | 627 | op1_sty = 0xe3, op2_sty = 0x50, |
4bc8c588 | 628 | op1_stg = 0xe3, op2_stg = 0x24, |
a8c99f38 | 629 | op_std = 0x60, |
4bc8c588 | 630 | op_stm = 0x90, |
a8c99f38 | 631 | op1_stmy = 0xeb, op2_stmy = 0x90, |
4bc8c588 | 632 | op1_stmg = 0xeb, op2_stmg = 0x24, |
a8c99f38 JB |
633 | op1_aghi = 0xa7, op2_aghi = 0x0b, |
634 | op1_ahi = 0xa7, op2_ahi = 0x0a, | |
00ce08ef UW |
635 | op1_agfi = 0xc2, op2_agfi = 0x08, |
636 | op1_afi = 0xc2, op2_afi = 0x09, | |
637 | op1_algfi= 0xc2, op2_algfi= 0x0a, | |
638 | op1_alfi = 0xc2, op2_alfi = 0x0b, | |
a8c99f38 JB |
639 | op_ar = 0x1a, |
640 | op_agr = 0xb908, | |
641 | op_a = 0x5a, | |
642 | op1_ay = 0xe3, op2_ay = 0x5a, | |
643 | op1_ag = 0xe3, op2_ag = 0x08, | |
00ce08ef UW |
644 | op1_slgfi= 0xc2, op2_slgfi= 0x04, |
645 | op1_slfi = 0xc2, op2_slfi = 0x05, | |
a8c99f38 JB |
646 | op_sr = 0x1b, |
647 | op_sgr = 0xb909, | |
648 | op_s = 0x5b, | |
649 | op1_sy = 0xe3, op2_sy = 0x5b, | |
650 | op1_sg = 0xe3, op2_sg = 0x09, | |
651 | op_nr = 0x14, | |
652 | op_ngr = 0xb980, | |
653 | op_la = 0x41, | |
654 | op1_lay = 0xe3, op2_lay = 0x71, | |
655 | op1_larl = 0xc0, op2_larl = 0x00, | |
656 | op_basr = 0x0d, | |
657 | op_bas = 0x4d, | |
658 | op_bcr = 0x07, | |
659 | op_bc = 0x0d, | |
1db4e8a0 UW |
660 | op_bctr = 0x06, |
661 | op_bctgr = 0xb946, | |
662 | op_bct = 0x46, | |
663 | op1_bctg = 0xe3, op2_bctg = 0x46, | |
664 | op_bxh = 0x86, | |
665 | op1_bxhg = 0xeb, op2_bxhg = 0x44, | |
666 | op_bxle = 0x87, | |
667 | op1_bxleg= 0xeb, op2_bxleg= 0x45, | |
a8c99f38 JB |
668 | op1_bras = 0xa7, op2_bras = 0x05, |
669 | op1_brasl= 0xc0, op2_brasl= 0x05, | |
670 | op1_brc = 0xa7, op2_brc = 0x04, | |
671 | op1_brcl = 0xc0, op2_brcl = 0x04, | |
1db4e8a0 UW |
672 | op1_brct = 0xa7, op2_brct = 0x06, |
673 | op1_brctg= 0xa7, op2_brctg= 0x07, | |
674 | op_brxh = 0x84, | |
675 | op1_brxhg= 0xec, op2_brxhg= 0x44, | |
676 | op_brxle = 0x85, | |
677 | op1_brxlg= 0xec, op2_brxlg= 0x45, | |
237b092b | 678 | op_svc = 0x0a, |
4bc8c588 JB |
679 | }; |
680 | ||
681 | ||
a8c99f38 JB |
682 | /* Read a single instruction from address AT. */ |
683 | ||
684 | #define S390_MAX_INSTR_SIZE 6 | |
685 | static int | |
686 | s390_readinstruction (bfd_byte instr[], CORE_ADDR at) | |
687 | { | |
688 | static int s390_instrlen[] = { 2, 4, 4, 6 }; | |
689 | int instrlen; | |
690 | ||
8defab1a | 691 | if (target_read_memory (at, &instr[0], 2)) |
a8c99f38 JB |
692 | return -1; |
693 | instrlen = s390_instrlen[instr[0] >> 6]; | |
694 | if (instrlen > 2) | |
695 | { | |
8defab1a | 696 | if (target_read_memory (at + 2, &instr[2], instrlen - 2)) |
34201ae3 | 697 | return -1; |
a8c99f38 JB |
698 | } |
699 | return instrlen; | |
700 | } | |
701 | ||
702 | ||
4bc8c588 JB |
703 | /* The functions below are for recognizing and decoding S/390 |
704 | instructions of various formats. Each of them checks whether INSN | |
705 | is an instruction of the given format, with the specified opcodes. | |
706 | If it is, it sets the remaining arguments to the values of the | |
707 | instruction's fields, and returns a non-zero value; otherwise, it | |
708 | returns zero. | |
709 | ||
710 | These functions' arguments appear in the order they appear in the | |
711 | instruction, not in the machine-language form. So, opcodes always | |
712 | come first, even though they're sometimes scattered around the | |
713 | instructions. And displacements appear before base and extension | |
714 | registers, as they do in the assembly syntax, not at the end, as | |
715 | they do in the machine language. */ | |
a78f21af | 716 | static int |
4bc8c588 JB |
717 | is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2) |
718 | { | |
719 | if (insn[0] == op1 && (insn[1] & 0xf) == op2) | |
720 | { | |
721 | *r1 = (insn[1] >> 4) & 0xf; | |
722 | /* i2 is a 16-bit signed quantity. */ | |
723 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; | |
724 | return 1; | |
725 | } | |
726 | else | |
727 | return 0; | |
728 | } | |
8ac0e65a | 729 | |
5769d3cd | 730 | |
4bc8c588 JB |
731 | static int |
732 | is_ril (bfd_byte *insn, int op1, int op2, | |
34201ae3 | 733 | unsigned int *r1, int *i2) |
4bc8c588 JB |
734 | { |
735 | if (insn[0] == op1 && (insn[1] & 0xf) == op2) | |
736 | { | |
737 | *r1 = (insn[1] >> 4) & 0xf; | |
738 | /* i2 is a signed quantity. If the host 'int' is 32 bits long, | |
34201ae3 UW |
739 | no sign extension is necessary, but we don't want to assume |
740 | that. */ | |
4bc8c588 | 741 | *i2 = (((insn[2] << 24) |
34201ae3 UW |
742 | | (insn[3] << 16) |
743 | | (insn[4] << 8) | |
744 | | (insn[5])) ^ 0x80000000) - 0x80000000; | |
4bc8c588 JB |
745 | return 1; |
746 | } | |
747 | else | |
748 | return 0; | |
749 | } | |
750 | ||
751 | ||
752 | static int | |
753 | is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) | |
754 | { | |
755 | if (insn[0] == op) | |
756 | { | |
757 | *r1 = (insn[1] >> 4) & 0xf; | |
758 | *r2 = insn[1] & 0xf; | |
759 | return 1; | |
760 | } | |
761 | else | |
762 | return 0; | |
763 | } | |
764 | ||
765 | ||
766 | static int | |
767 | is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2) | |
768 | { | |
769 | if (((insn[0] << 8) | insn[1]) == op) | |
770 | { | |
771 | /* Yes, insn[3]. insn[2] is unused in RRE format. */ | |
772 | *r1 = (insn[3] >> 4) & 0xf; | |
773 | *r2 = insn[3] & 0xf; | |
774 | return 1; | |
775 | } | |
776 | else | |
777 | return 0; | |
778 | } | |
779 | ||
780 | ||
781 | static int | |
782 | is_rs (bfd_byte *insn, int op, | |
eb1bd1fb | 783 | unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2) |
4bc8c588 JB |
784 | { |
785 | if (insn[0] == op) | |
786 | { | |
787 | *r1 = (insn[1] >> 4) & 0xf; | |
788 | *r3 = insn[1] & 0xf; | |
789 | *b2 = (insn[2] >> 4) & 0xf; | |
790 | *d2 = ((insn[2] & 0xf) << 8) | insn[3]; | |
791 | return 1; | |
792 | } | |
793 | else | |
794 | return 0; | |
795 | } | |
796 | ||
797 | ||
798 | static int | |
a8c99f38 | 799 | is_rsy (bfd_byte *insn, int op1, int op2, |
34201ae3 | 800 | unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2) |
4bc8c588 JB |
801 | { |
802 | if (insn[0] == op1 | |
4bc8c588 JB |
803 | && insn[5] == op2) |
804 | { | |
805 | *r1 = (insn[1] >> 4) & 0xf; | |
806 | *r3 = insn[1] & 0xf; | |
807 | *b2 = (insn[2] >> 4) & 0xf; | |
a8c99f38 | 808 | /* The 'long displacement' is a 20-bit signed integer. */ |
34201ae3 | 809 | *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) |
a8c99f38 | 810 | ^ 0x80000) - 0x80000; |
4bc8c588 JB |
811 | return 1; |
812 | } | |
813 | else | |
814 | return 0; | |
815 | } | |
816 | ||
817 | ||
1db4e8a0 UW |
818 | static int |
819 | is_rsi (bfd_byte *insn, int op, | |
34201ae3 | 820 | unsigned int *r1, unsigned int *r3, int *i2) |
1db4e8a0 UW |
821 | { |
822 | if (insn[0] == op) | |
823 | { | |
824 | *r1 = (insn[1] >> 4) & 0xf; | |
825 | *r3 = insn[1] & 0xf; | |
826 | /* i2 is a 16-bit signed quantity. */ | |
827 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; | |
828 | return 1; | |
829 | } | |
830 | else | |
831 | return 0; | |
832 | } | |
833 | ||
834 | ||
835 | static int | |
836 | is_rie (bfd_byte *insn, int op1, int op2, | |
34201ae3 | 837 | unsigned int *r1, unsigned int *r3, int *i2) |
1db4e8a0 UW |
838 | { |
839 | if (insn[0] == op1 | |
840 | && insn[5] == op2) | |
841 | { | |
842 | *r1 = (insn[1] >> 4) & 0xf; | |
843 | *r3 = insn[1] & 0xf; | |
844 | /* i2 is a 16-bit signed quantity. */ | |
845 | *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000; | |
846 | return 1; | |
847 | } | |
848 | else | |
849 | return 0; | |
850 | } | |
851 | ||
852 | ||
4bc8c588 JB |
853 | static int |
854 | is_rx (bfd_byte *insn, int op, | |
eb1bd1fb | 855 | unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2) |
4bc8c588 JB |
856 | { |
857 | if (insn[0] == op) | |
858 | { | |
859 | *r1 = (insn[1] >> 4) & 0xf; | |
860 | *x2 = insn[1] & 0xf; | |
861 | *b2 = (insn[2] >> 4) & 0xf; | |
862 | *d2 = ((insn[2] & 0xf) << 8) | insn[3]; | |
863 | return 1; | |
864 | } | |
865 | else | |
866 | return 0; | |
867 | } | |
868 | ||
869 | ||
870 | static int | |
a8c99f38 | 871 | is_rxy (bfd_byte *insn, int op1, int op2, |
34201ae3 | 872 | unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2) |
4bc8c588 JB |
873 | { |
874 | if (insn[0] == op1 | |
4bc8c588 JB |
875 | && insn[5] == op2) |
876 | { | |
877 | *r1 = (insn[1] >> 4) & 0xf; | |
878 | *x2 = insn[1] & 0xf; | |
879 | *b2 = (insn[2] >> 4) & 0xf; | |
a8c99f38 | 880 | /* The 'long displacement' is a 20-bit signed integer. */ |
34201ae3 | 881 | *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12)) |
a8c99f38 | 882 | ^ 0x80000) - 0x80000; |
4bc8c588 JB |
883 | return 1; |
884 | } | |
885 | else | |
886 | return 0; | |
887 | } | |
888 | ||
889 | ||
3fc46200 | 890 | /* Prologue analysis. */ |
4bc8c588 | 891 | |
d0f54f9d JB |
892 | #define S390_NUM_GPRS 16 |
893 | #define S390_NUM_FPRS 16 | |
4bc8c588 | 894 | |
a8c99f38 JB |
895 | struct s390_prologue_data { |
896 | ||
ee1b3323 UW |
897 | /* The stack. */ |
898 | struct pv_area *stack; | |
899 | ||
e17a4113 | 900 | /* The size and byte-order of a GPR or FPR. */ |
a8c99f38 JB |
901 | int gpr_size; |
902 | int fpr_size; | |
e17a4113 | 903 | enum bfd_endian byte_order; |
a8c99f38 JB |
904 | |
905 | /* The general-purpose registers. */ | |
3fc46200 | 906 | pv_t gpr[S390_NUM_GPRS]; |
a8c99f38 JB |
907 | |
908 | /* The floating-point registers. */ | |
3fc46200 | 909 | pv_t fpr[S390_NUM_FPRS]; |
a8c99f38 | 910 | |
121d8485 UW |
911 | /* The offset relative to the CFA where the incoming GPR N was saved |
912 | by the function prologue. 0 if not saved or unknown. */ | |
913 | int gpr_slot[S390_NUM_GPRS]; | |
4bc8c588 | 914 | |
121d8485 UW |
915 | /* Likewise for FPRs. */ |
916 | int fpr_slot[S390_NUM_FPRS]; | |
4bc8c588 | 917 | |
121d8485 UW |
918 | /* Nonzero if the backchain was saved. This is assumed to be the |
919 | case when the incoming SP is saved at the current SP location. */ | |
920 | int back_chain_saved_p; | |
921 | }; | |
4bc8c588 | 922 | |
3fc46200 UW |
923 | /* Return the effective address for an X-style instruction, like: |
924 | ||
34201ae3 | 925 | L R1, D2(X2, B2) |
3fc46200 UW |
926 | |
927 | Here, X2 and B2 are registers, and D2 is a signed 20-bit | |
928 | constant; the effective address is the sum of all three. If either | |
929 | X2 or B2 are zero, then it doesn't contribute to the sum --- this | |
930 | means that r0 can't be used as either X2 or B2. */ | |
931 | static pv_t | |
932 | s390_addr (struct s390_prologue_data *data, | |
933 | int d2, unsigned int x2, unsigned int b2) | |
934 | { | |
935 | pv_t result; | |
936 | ||
937 | result = pv_constant (d2); | |
938 | if (x2) | |
939 | result = pv_add (result, data->gpr[x2]); | |
940 | if (b2) | |
941 | result = pv_add (result, data->gpr[b2]); | |
942 | ||
943 | return result; | |
944 | } | |
945 | ||
946 | /* Do a SIZE-byte store of VALUE to D2(X2,B2). */ | |
a8c99f38 | 947 | static void |
3fc46200 UW |
948 | s390_store (struct s390_prologue_data *data, |
949 | int d2, unsigned int x2, unsigned int b2, CORE_ADDR size, | |
950 | pv_t value) | |
4bc8c588 | 951 | { |
3fc46200 | 952 | pv_t addr = s390_addr (data, d2, x2, b2); |
ee1b3323 | 953 | pv_t offset; |
121d8485 UW |
954 | |
955 | /* Check whether we are storing the backchain. */ | |
3fc46200 | 956 | offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr); |
121d8485 | 957 | |
3fc46200 | 958 | if (pv_is_constant (offset) && offset.k == 0) |
121d8485 | 959 | if (size == data->gpr_size |
3fc46200 | 960 | && pv_is_register_k (value, S390_SP_REGNUM, 0)) |
121d8485 UW |
961 | { |
962 | data->back_chain_saved_p = 1; | |
963 | return; | |
964 | } | |
965 | ||
966 | ||
967 | /* Check whether we are storing a register into the stack. */ | |
ee1b3323 UW |
968 | if (!pv_area_store_would_trash (data->stack, addr)) |
969 | pv_area_store (data->stack, addr, size, value); | |
4bc8c588 | 970 | |
a8c99f38 | 971 | |
121d8485 UW |
972 | /* Note: If this is some store we cannot identify, you might think we |
973 | should forget our cached values, as any of those might have been hit. | |
974 | ||
975 | However, we make the assumption that the register save areas are only | |
976 | ever stored to once in any given function, and we do recognize these | |
977 | stores. Thus every store we cannot recognize does not hit our data. */ | |
4bc8c588 | 978 | } |
4bc8c588 | 979 | |
3fc46200 UW |
980 | /* Do a SIZE-byte load from D2(X2,B2). */ |
981 | static pv_t | |
982 | s390_load (struct s390_prologue_data *data, | |
983 | int d2, unsigned int x2, unsigned int b2, CORE_ADDR size) | |
34201ae3 | 984 | |
4bc8c588 | 985 | { |
3fc46200 | 986 | pv_t addr = s390_addr (data, d2, x2, b2); |
4bc8c588 | 987 | |
a8c99f38 JB |
988 | /* If it's a load from an in-line constant pool, then we can |
989 | simulate that, under the assumption that the code isn't | |
990 | going to change between the time the processor actually | |
991 | executed it creating the current frame, and the time when | |
992 | we're analyzing the code to unwind past that frame. */ | |
3fc46200 | 993 | if (pv_is_constant (addr)) |
4bc8c588 | 994 | { |
0542c86d | 995 | struct target_section *secp; |
3fc46200 | 996 | secp = target_section_by_addr (¤t_target, addr.k); |
a8c99f38 | 997 | if (secp != NULL |
34201ae3 | 998 | && (bfd_get_section_flags (secp->the_bfd_section->owner, |
57e6060e | 999 | secp->the_bfd_section) |
34201ae3 UW |
1000 | & SEC_READONLY)) |
1001 | return pv_constant (read_memory_integer (addr.k, size, | |
e17a4113 | 1002 | data->byte_order)); |
a8c99f38 | 1003 | } |
7666f43c | 1004 | |
121d8485 | 1005 | /* Check whether we are accessing one of our save slots. */ |
ee1b3323 UW |
1006 | return pv_area_fetch (data->stack, addr, size); |
1007 | } | |
121d8485 | 1008 | |
ee1b3323 UW |
1009 | /* Function for finding saved registers in a 'struct pv_area'; we pass |
1010 | this to pv_area_scan. | |
121d8485 | 1011 | |
ee1b3323 UW |
1012 | If VALUE is a saved register, ADDR says it was saved at a constant |
1013 | offset from the frame base, and SIZE indicates that the whole | |
1014 | register was saved, record its offset in the reg_offset table in | |
1015 | PROLOGUE_UNTYPED. */ | |
1016 | static void | |
c378eb4e MS |
1017 | s390_check_for_saved (void *data_untyped, pv_t addr, |
1018 | CORE_ADDR size, pv_t value) | |
ee1b3323 UW |
1019 | { |
1020 | struct s390_prologue_data *data = data_untyped; | |
1021 | int i, offset; | |
1022 | ||
1023 | if (!pv_is_register (addr, S390_SP_REGNUM)) | |
1024 | return; | |
1025 | ||
1026 | offset = 16 * data->gpr_size + 32 - addr.k; | |
4bc8c588 | 1027 | |
ee1b3323 UW |
1028 | /* If we are storing the original value of a register, we want to |
1029 | record the CFA offset. If the same register is stored multiple | |
1030 | times, the stack slot with the highest address counts. */ | |
34201ae3 | 1031 | |
ee1b3323 UW |
1032 | for (i = 0; i < S390_NUM_GPRS; i++) |
1033 | if (size == data->gpr_size | |
1034 | && pv_is_register_k (value, S390_R0_REGNUM + i, 0)) | |
1035 | if (data->gpr_slot[i] == 0 | |
1036 | || data->gpr_slot[i] > offset) | |
1037 | { | |
1038 | data->gpr_slot[i] = offset; | |
1039 | return; | |
1040 | } | |
1041 | ||
1042 | for (i = 0; i < S390_NUM_FPRS; i++) | |
1043 | if (size == data->fpr_size | |
1044 | && pv_is_register_k (value, S390_F0_REGNUM + i, 0)) | |
1045 | if (data->fpr_slot[i] == 0 | |
1046 | || data->fpr_slot[i] > offset) | |
1047 | { | |
1048 | data->fpr_slot[i] = offset; | |
1049 | return; | |
1050 | } | |
a8c99f38 | 1051 | } |
4bc8c588 | 1052 | |
a8c99f38 JB |
1053 | /* Analyze the prologue of the function starting at START_PC, |
1054 | continuing at most until CURRENT_PC. Initialize DATA to | |
1055 | hold all information we find out about the state of the registers | |
1056 | and stack slots. Return the address of the instruction after | |
1057 | the last one that changed the SP, FP, or back chain; or zero | |
1058 | on error. */ | |
1059 | static CORE_ADDR | |
1060 | s390_analyze_prologue (struct gdbarch *gdbarch, | |
1061 | CORE_ADDR start_pc, | |
1062 | CORE_ADDR current_pc, | |
1063 | struct s390_prologue_data *data) | |
4bc8c588 | 1064 | { |
a8c99f38 JB |
1065 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
1066 | ||
4bc8c588 | 1067 | /* Our return value: |
a8c99f38 | 1068 | The address of the instruction after the last one that changed |
34201ae3 | 1069 | the SP, FP, or back chain; zero if we got an error trying to |
a8c99f38 JB |
1070 | read memory. */ |
1071 | CORE_ADDR result = start_pc; | |
4bc8c588 | 1072 | |
4bc8c588 JB |
1073 | /* The current PC for our abstract interpretation. */ |
1074 | CORE_ADDR pc; | |
1075 | ||
1076 | /* The address of the next instruction after that. */ | |
1077 | CORE_ADDR next_pc; | |
34201ae3 | 1078 | |
4bc8c588 JB |
1079 | /* Set up everything's initial value. */ |
1080 | { | |
1081 | int i; | |
1082 | ||
55f960e1 | 1083 | data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch)); |
ee1b3323 | 1084 | |
a8c99f38 JB |
1085 | /* For the purpose of prologue tracking, we consider the GPR size to |
1086 | be equal to the ABI word size, even if it is actually larger | |
1087 | (i.e. when running a 32-bit binary under a 64-bit kernel). */ | |
1088 | data->gpr_size = word_size; | |
1089 | data->fpr_size = 8; | |
e17a4113 | 1090 | data->byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 | 1091 | |
4bc8c588 | 1092 | for (i = 0; i < S390_NUM_GPRS; i++) |
3fc46200 | 1093 | data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0); |
4bc8c588 JB |
1094 | |
1095 | for (i = 0; i < S390_NUM_FPRS; i++) | |
3fc46200 | 1096 | data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0); |
4bc8c588 | 1097 | |
121d8485 UW |
1098 | for (i = 0; i < S390_NUM_GPRS; i++) |
1099 | data->gpr_slot[i] = 0; | |
1100 | ||
1101 | for (i = 0; i < S390_NUM_FPRS; i++) | |
1102 | data->fpr_slot[i] = 0; | |
4bc8c588 | 1103 | |
121d8485 | 1104 | data->back_chain_saved_p = 0; |
4bc8c588 JB |
1105 | } |
1106 | ||
a8c99f38 JB |
1107 | /* Start interpreting instructions, until we hit the frame's |
1108 | current PC or the first branch instruction. */ | |
1109 | for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc) | |
5769d3cd | 1110 | { |
4bc8c588 | 1111 | bfd_byte insn[S390_MAX_INSTR_SIZE]; |
a788de9b | 1112 | int insn_len = s390_readinstruction (insn, pc); |
4bc8c588 | 1113 | |
3fc46200 UW |
1114 | bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 }; |
1115 | bfd_byte *insn32 = word_size == 4 ? insn : dummy; | |
1116 | bfd_byte *insn64 = word_size == 8 ? insn : dummy; | |
1117 | ||
4bc8c588 | 1118 | /* Fields for various kinds of instructions. */ |
a8c99f38 JB |
1119 | unsigned int b2, r1, r2, x2, r3; |
1120 | int i2, d2; | |
4bc8c588 | 1121 | |
121d8485 | 1122 | /* The values of SP and FP before this instruction, |
34201ae3 | 1123 | for detecting instructions that change them. */ |
3fc46200 | 1124 | pv_t pre_insn_sp, pre_insn_fp; |
121d8485 UW |
1125 | /* Likewise for the flag whether the back chain was saved. */ |
1126 | int pre_insn_back_chain_saved_p; | |
4bc8c588 JB |
1127 | |
1128 | /* If we got an error trying to read the instruction, report it. */ | |
1129 | if (insn_len < 0) | |
34201ae3 UW |
1130 | { |
1131 | result = 0; | |
1132 | break; | |
1133 | } | |
4bc8c588 JB |
1134 | |
1135 | next_pc = pc + insn_len; | |
1136 | ||
a8c99f38 JB |
1137 | pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
1138 | pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; | |
121d8485 | 1139 | pre_insn_back_chain_saved_p = data->back_chain_saved_p; |
4bc8c588 | 1140 | |
4bc8c588 | 1141 | |
3fc46200 UW |
1142 | /* LHI r1, i2 --- load halfword immediate. */ |
1143 | /* LGHI r1, i2 --- load halfword immediate (64-bit version). */ | |
1144 | /* LGFI r1, i2 --- load fullword immediate. */ | |
1145 | if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2) | |
34201ae3 UW |
1146 | || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2) |
1147 | || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2)) | |
3fc46200 UW |
1148 | data->gpr[r1] = pv_constant (i2); |
1149 | ||
1150 | /* LR r1, r2 --- load from register. */ | |
1151 | /* LGR r1, r2 --- load from register (64-bit version). */ | |
1152 | else if (is_rr (insn32, op_lr, &r1, &r2) | |
1153 | || is_rre (insn64, op_lgr, &r1, &r2)) | |
1154 | data->gpr[r1] = data->gpr[r2]; | |
1155 | ||
1156 | /* L r1, d2(x2, b2) --- load. */ | |
1157 | /* LY r1, d2(x2, b2) --- load (long-displacement version). */ | |
1158 | /* LG r1, d2(x2, b2) --- load (64-bit version). */ | |
1159 | else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2) | |
1160 | || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2) | |
1161 | || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2)) | |
1162 | data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size); | |
1163 | ||
1164 | /* ST r1, d2(x2, b2) --- store. */ | |
1165 | /* STY r1, d2(x2, b2) --- store (long-displacement version). */ | |
1166 | /* STG r1, d2(x2, b2) --- store (64-bit version). */ | |
1167 | else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2) | |
1168 | || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2) | |
1169 | || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2)) | |
1170 | s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]); | |
1171 | ||
1172 | /* STD r1, d2(x2,b2) --- store floating-point register. */ | |
4bc8c588 | 1173 | else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2)) |
3fc46200 UW |
1174 | s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]); |
1175 | ||
1176 | /* STM r1, r3, d2(b2) --- store multiple. */ | |
c378eb4e MS |
1177 | /* STMY r1, r3, d2(b2) --- store multiple (long-displacement |
1178 | version). */ | |
3fc46200 UW |
1179 | /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */ |
1180 | else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2) | |
1181 | || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2) | |
1182 | || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2)) | |
34201ae3 UW |
1183 | { |
1184 | for (; r1 <= r3; r1++, d2 += data->gpr_size) | |
3fc46200 | 1185 | s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]); |
34201ae3 | 1186 | } |
4bc8c588 | 1187 | |
3fc46200 UW |
1188 | /* AHI r1, i2 --- add halfword immediate. */ |
1189 | /* AGHI r1, i2 --- add halfword immediate (64-bit version). */ | |
1190 | /* AFI r1, i2 --- add fullword immediate. */ | |
1191 | /* AGFI r1, i2 --- add fullword immediate (64-bit version). */ | |
1192 | else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2) | |
1193 | || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2) | |
1194 | || is_ril (insn32, op1_afi, op2_afi, &r1, &i2) | |
1195 | || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2)) | |
1196 | data->gpr[r1] = pv_add_constant (data->gpr[r1], i2); | |
1197 | ||
1198 | /* ALFI r1, i2 --- add logical immediate. */ | |
1199 | /* ALGFI r1, i2 --- add logical immediate (64-bit version). */ | |
1200 | else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2) | |
1201 | || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2)) | |
1202 | data->gpr[r1] = pv_add_constant (data->gpr[r1], | |
1203 | (CORE_ADDR)i2 & 0xffffffff); | |
1204 | ||
1205 | /* AR r1, r2 -- add register. */ | |
1206 | /* AGR r1, r2 -- add register (64-bit version). */ | |
1207 | else if (is_rr (insn32, op_ar, &r1, &r2) | |
1208 | || is_rre (insn64, op_agr, &r1, &r2)) | |
1209 | data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]); | |
1210 | ||
1211 | /* A r1, d2(x2, b2) -- add. */ | |
1212 | /* AY r1, d2(x2, b2) -- add (long-displacement version). */ | |
1213 | /* AG r1, d2(x2, b2) -- add (64-bit version). */ | |
1214 | else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2) | |
1215 | || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2) | |
1216 | || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2)) | |
1217 | data->gpr[r1] = pv_add (data->gpr[r1], | |
1218 | s390_load (data, d2, x2, b2, data->gpr_size)); | |
1219 | ||
1220 | /* SLFI r1, i2 --- subtract logical immediate. */ | |
1221 | /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */ | |
1222 | else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2) | |
1223 | || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2)) | |
1224 | data->gpr[r1] = pv_add_constant (data->gpr[r1], | |
1225 | -((CORE_ADDR)i2 & 0xffffffff)); | |
1226 | ||
1227 | /* SR r1, r2 -- subtract register. */ | |
1228 | /* SGR r1, r2 -- subtract register (64-bit version). */ | |
1229 | else if (is_rr (insn32, op_sr, &r1, &r2) | |
1230 | || is_rre (insn64, op_sgr, &r1, &r2)) | |
1231 | data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]); | |
1232 | ||
1233 | /* S r1, d2(x2, b2) -- subtract. */ | |
1234 | /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */ | |
1235 | /* SG r1, d2(x2, b2) -- subtract (64-bit version). */ | |
1236 | else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2) | |
1237 | || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2) | |
1238 | || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2)) | |
1239 | data->gpr[r1] = pv_subtract (data->gpr[r1], | |
1240 | s390_load (data, d2, x2, b2, data->gpr_size)); | |
1241 | ||
1242 | /* LA r1, d2(x2, b2) --- load address. */ | |
1243 | /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */ | |
1244 | else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2) | |
34201ae3 | 1245 | || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2)) |
3fc46200 UW |
1246 | data->gpr[r1] = s390_addr (data, d2, x2, b2); |
1247 | ||
1248 | /* LARL r1, i2 --- load address relative long. */ | |
a8c99f38 | 1249 | else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2)) |
3fc46200 | 1250 | data->gpr[r1] = pv_constant (pc + i2 * 2); |
a8c99f38 | 1251 | |
3fc46200 | 1252 | /* BASR r1, 0 --- branch and save. |
34201ae3 | 1253 | Since r2 is zero, this saves the PC in r1, but doesn't branch. */ |
a8c99f38 | 1254 | else if (is_rr (insn, op_basr, &r1, &r2) |
34201ae3 | 1255 | && r2 == 0) |
3fc46200 | 1256 | data->gpr[r1] = pv_constant (next_pc); |
a8c99f38 | 1257 | |
3fc46200 | 1258 | /* BRAS r1, i2 --- branch relative and save. */ |
a8c99f38 | 1259 | else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)) |
34201ae3 UW |
1260 | { |
1261 | data->gpr[r1] = pv_constant (next_pc); | |
1262 | next_pc = pc + i2 * 2; | |
4bc8c588 | 1263 | |
34201ae3 UW |
1264 | /* We'd better not interpret any backward branches. We'll |
1265 | never terminate. */ | |
1266 | if (next_pc <= pc) | |
1267 | break; | |
1268 | } | |
4bc8c588 | 1269 | |
a8c99f38 JB |
1270 | /* Terminate search when hitting any other branch instruction. */ |
1271 | else if (is_rr (insn, op_basr, &r1, &r2) | |
1272 | || is_rx (insn, op_bas, &r1, &d2, &x2, &b2) | |
1273 | || is_rr (insn, op_bcr, &r1, &r2) | |
1274 | || is_rx (insn, op_bc, &r1, &d2, &x2, &b2) | |
1275 | || is_ri (insn, op1_brc, op2_brc, &r1, &i2) | |
1276 | || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2) | |
1277 | || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2)) | |
1278 | break; | |
1279 | ||
4bc8c588 | 1280 | else |
d4fb63e1 TT |
1281 | { |
1282 | /* An instruction we don't know how to simulate. The only | |
1283 | safe thing to do would be to set every value we're tracking | |
1284 | to 'unknown'. Instead, we'll be optimistic: we assume that | |
1285 | we *can* interpret every instruction that the compiler uses | |
1286 | to manipulate any of the data we're interested in here -- | |
1287 | then we can just ignore anything else. */ | |
1288 | } | |
4bc8c588 JB |
1289 | |
1290 | /* Record the address after the last instruction that changed | |
34201ae3 UW |
1291 | the FP, SP, or backlink. Ignore instructions that changed |
1292 | them back to their original values --- those are probably | |
1293 | restore instructions. (The back chain is never restored, | |
1294 | just popped.) */ | |
4bc8c588 | 1295 | { |
34201ae3 UW |
1296 | pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
1297 | pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; | |
1298 | ||
1299 | if ((! pv_is_identical (pre_insn_sp, sp) | |
1300 | && ! pv_is_register_k (sp, S390_SP_REGNUM, 0) | |
3fc46200 | 1301 | && sp.kind != pvk_unknown) |
34201ae3 UW |
1302 | || (! pv_is_identical (pre_insn_fp, fp) |
1303 | && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0) | |
3fc46200 | 1304 | && fp.kind != pvk_unknown) |
34201ae3 UW |
1305 | || pre_insn_back_chain_saved_p != data->back_chain_saved_p) |
1306 | result = next_pc; | |
4bc8c588 | 1307 | } |
5769d3cd | 1308 | } |
4bc8c588 | 1309 | |
ee1b3323 UW |
1310 | /* Record where all the registers were saved. */ |
1311 | pv_area_scan (data->stack, s390_check_for_saved, data); | |
1312 | ||
1313 | free_pv_area (data->stack); | |
1314 | data->stack = NULL; | |
1315 | ||
4bc8c588 | 1316 | return result; |
5769d3cd AC |
1317 | } |
1318 | ||
34201ae3 | 1319 | /* Advance PC across any function entry prologue instructions to reach |
a8c99f38 JB |
1320 | some "real" code. */ |
1321 | static CORE_ADDR | |
6093d2eb | 1322 | s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc) |
a8c99f38 JB |
1323 | { |
1324 | struct s390_prologue_data data; | |
1325 | CORE_ADDR skip_pc; | |
6093d2eb | 1326 | skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data); |
a8c99f38 JB |
1327 | return skip_pc ? skip_pc : pc; |
1328 | } | |
1329 | ||
d0f54f9d JB |
1330 | /* Return true if we are in the functin's epilogue, i.e. after the |
1331 | instruction that destroyed the function's stack frame. */ | |
1332 | static int | |
1333 | s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc) | |
1334 | { | |
1335 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; | |
1336 | ||
1337 | /* In frameless functions, there's not frame to destroy and thus | |
1338 | we don't care about the epilogue. | |
1339 | ||
1340 | In functions with frame, the epilogue sequence is a pair of | |
1341 | a LM-type instruction that restores (amongst others) the | |
1342 | return register %r14 and the stack pointer %r15, followed | |
1343 | by a branch 'br %r14' --or equivalent-- that effects the | |
1344 | actual return. | |
1345 | ||
1346 | In that situation, this function needs to return 'true' in | |
1347 | exactly one case: when pc points to that branch instruction. | |
1348 | ||
1349 | Thus we try to disassemble the one instructions immediately | |
177b42fe | 1350 | preceding pc and check whether it is an LM-type instruction |
d0f54f9d JB |
1351 | modifying the stack pointer. |
1352 | ||
1353 | Note that disassembling backwards is not reliable, so there | |
1354 | is a slight chance of false positives here ... */ | |
1355 | ||
1356 | bfd_byte insn[6]; | |
1357 | unsigned int r1, r3, b2; | |
1358 | int d2; | |
1359 | ||
1360 | if (word_size == 4 | |
8defab1a | 1361 | && !target_read_memory (pc - 4, insn, 4) |
d0f54f9d JB |
1362 | && is_rs (insn, op_lm, &r1, &r3, &d2, &b2) |
1363 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) | |
1364 | return 1; | |
1365 | ||
a8c99f38 | 1366 | if (word_size == 4 |
8defab1a | 1367 | && !target_read_memory (pc - 6, insn, 6) |
a8c99f38 JB |
1368 | && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2) |
1369 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) | |
1370 | return 1; | |
1371 | ||
d0f54f9d | 1372 | if (word_size == 8 |
8defab1a | 1373 | && !target_read_memory (pc - 6, insn, 6) |
a8c99f38 | 1374 | && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2) |
d0f54f9d JB |
1375 | && r3 == S390_SP_REGNUM - S390_R0_REGNUM) |
1376 | return 1; | |
1377 | ||
1378 | return 0; | |
1379 | } | |
5769d3cd | 1380 | |
1db4e8a0 UW |
1381 | /* Displaced stepping. */ |
1382 | ||
1383 | /* Fix up the state of registers and memory after having single-stepped | |
1384 | a displaced instruction. */ | |
1385 | static void | |
1386 | s390_displaced_step_fixup (struct gdbarch *gdbarch, | |
1387 | struct displaced_step_closure *closure, | |
1388 | CORE_ADDR from, CORE_ADDR to, | |
1389 | struct regcache *regs) | |
1390 | { | |
1391 | /* Since we use simple_displaced_step_copy_insn, our closure is a | |
1392 | copy of the instruction. */ | |
1393 | gdb_byte *insn = (gdb_byte *) closure; | |
1394 | static int s390_instrlen[] = { 2, 4, 4, 6 }; | |
1395 | int insnlen = s390_instrlen[insn[0] >> 6]; | |
1396 | ||
1397 | /* Fields for various kinds of instructions. */ | |
1398 | unsigned int b2, r1, r2, x2, r3; | |
1399 | int i2, d2; | |
1400 | ||
1401 | /* Get current PC and addressing mode bit. */ | |
1402 | CORE_ADDR pc = regcache_read_pc (regs); | |
beaabab2 | 1403 | ULONGEST amode = 0; |
1db4e8a0 UW |
1404 | |
1405 | if (register_size (gdbarch, S390_PSWA_REGNUM) == 4) | |
1406 | { | |
1407 | regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode); | |
1408 | amode &= 0x80000000; | |
1409 | } | |
1410 | ||
1411 | if (debug_displaced) | |
1412 | fprintf_unfiltered (gdb_stdlog, | |
0161e4b9 | 1413 | "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n", |
1db4e8a0 | 1414 | paddress (gdbarch, from), paddress (gdbarch, to), |
0161e4b9 | 1415 | paddress (gdbarch, pc), insnlen, (int) amode); |
1db4e8a0 UW |
1416 | |
1417 | /* Handle absolute branch and save instructions. */ | |
1418 | if (is_rr (insn, op_basr, &r1, &r2) | |
1419 | || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)) | |
1420 | { | |
1421 | /* Recompute saved return address in R1. */ | |
1422 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, | |
1423 | amode | (from + insnlen)); | |
1424 | } | |
1425 | ||
1426 | /* Handle absolute branch instructions. */ | |
1427 | else if (is_rr (insn, op_bcr, &r1, &r2) | |
1428 | || is_rx (insn, op_bc, &r1, &d2, &x2, &b2) | |
1429 | || is_rr (insn, op_bctr, &r1, &r2) | |
1430 | || is_rre (insn, op_bctgr, &r1, &r2) | |
1431 | || is_rx (insn, op_bct, &r1, &d2, &x2, &b2) | |
1432 | || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2) | |
1433 | || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2) | |
1434 | || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2) | |
1435 | || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2) | |
1436 | || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2)) | |
1437 | { | |
1438 | /* Update PC iff branch was *not* taken. */ | |
1439 | if (pc == to + insnlen) | |
1440 | regcache_write_pc (regs, from + insnlen); | |
1441 | } | |
1442 | ||
1443 | /* Handle PC-relative branch and save instructions. */ | |
1444 | else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2) | |
34201ae3 | 1445 | || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2)) |
1db4e8a0 UW |
1446 | { |
1447 | /* Update PC. */ | |
1448 | regcache_write_pc (regs, pc - to + from); | |
1449 | /* Recompute saved return address in R1. */ | |
1450 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, | |
1451 | amode | (from + insnlen)); | |
1452 | } | |
1453 | ||
1454 | /* Handle PC-relative branch instructions. */ | |
1455 | else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2) | |
1456 | || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2) | |
1457 | || is_ri (insn, op1_brct, op2_brct, &r1, &i2) | |
1458 | || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2) | |
1459 | || is_rsi (insn, op_brxh, &r1, &r3, &i2) | |
1460 | || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2) | |
1461 | || is_rsi (insn, op_brxle, &r1, &r3, &i2) | |
1462 | || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2)) | |
1463 | { | |
1464 | /* Update PC. */ | |
1465 | regcache_write_pc (regs, pc - to + from); | |
1466 | } | |
1467 | ||
1468 | /* Handle LOAD ADDRESS RELATIVE LONG. */ | |
1469 | else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2)) | |
1470 | { | |
0161e4b9 UW |
1471 | /* Update PC. */ |
1472 | regcache_write_pc (regs, from + insnlen); | |
34201ae3 | 1473 | /* Recompute output address in R1. */ |
1db4e8a0 | 1474 | regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1, |
0161e4b9 | 1475 | amode | (from + i2 * 2)); |
1db4e8a0 UW |
1476 | } |
1477 | ||
1478 | /* If we executed a breakpoint instruction, point PC right back at it. */ | |
1479 | else if (insn[0] == 0x0 && insn[1] == 0x1) | |
1480 | regcache_write_pc (regs, from); | |
1481 | ||
1482 | /* For any other insn, PC points right after the original instruction. */ | |
1483 | else | |
1484 | regcache_write_pc (regs, from + insnlen); | |
0161e4b9 UW |
1485 | |
1486 | if (debug_displaced) | |
1487 | fprintf_unfiltered (gdb_stdlog, | |
1488 | "displaced: (s390) pc is now %s\n", | |
1489 | paddress (gdbarch, regcache_read_pc (regs))); | |
1db4e8a0 | 1490 | } |
a8c99f38 | 1491 | |
d6db1fab UW |
1492 | |
1493 | /* Helper routine to unwind pseudo registers. */ | |
1494 | ||
1495 | static struct value * | |
1496 | s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum) | |
1497 | { | |
1498 | struct gdbarch *gdbarch = get_frame_arch (this_frame); | |
1499 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
1500 | struct type *type = register_type (gdbarch, regnum); | |
1501 | ||
1502 | /* Unwind PC via PSW address. */ | |
1503 | if (regnum == tdep->pc_regnum) | |
1504 | { | |
1505 | struct value *val; | |
1506 | ||
1507 | val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM); | |
1508 | if (!value_optimized_out (val)) | |
1509 | { | |
1510 | LONGEST pswa = value_as_long (val); | |
1511 | ||
1512 | if (TYPE_LENGTH (type) == 4) | |
1513 | return value_from_pointer (type, pswa & 0x7fffffff); | |
1514 | else | |
1515 | return value_from_pointer (type, pswa); | |
1516 | } | |
1517 | } | |
1518 | ||
1519 | /* Unwind CC via PSW mask. */ | |
1520 | if (regnum == tdep->cc_regnum) | |
1521 | { | |
1522 | struct value *val; | |
1523 | ||
1524 | val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM); | |
1525 | if (!value_optimized_out (val)) | |
1526 | { | |
1527 | LONGEST pswm = value_as_long (val); | |
1528 | ||
1529 | if (TYPE_LENGTH (type) == 4) | |
1530 | return value_from_longest (type, (pswm >> 12) & 3); | |
1531 | else | |
1532 | return value_from_longest (type, (pswm >> 44) & 3); | |
1533 | } | |
1534 | } | |
1535 | ||
1536 | /* Unwind full GPRs to show at least the lower halves (as the | |
1537 | upper halves are undefined). */ | |
2ccd1468 | 1538 | if (regnum_is_gpr_full (tdep, regnum)) |
d6db1fab UW |
1539 | { |
1540 | int reg = regnum - tdep->gpr_full_regnum; | |
1541 | struct value *val; | |
1542 | ||
1543 | val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg); | |
1544 | if (!value_optimized_out (val)) | |
1545 | return value_cast (type, val); | |
1546 | } | |
1547 | ||
1548 | return allocate_optimized_out_value (type); | |
1549 | } | |
1550 | ||
1551 | static struct value * | |
1552 | s390_trad_frame_prev_register (struct frame_info *this_frame, | |
1553 | struct trad_frame_saved_reg saved_regs[], | |
1554 | int regnum) | |
1555 | { | |
1556 | if (regnum < S390_NUM_REGS) | |
1557 | return trad_frame_get_prev_register (this_frame, saved_regs, regnum); | |
1558 | else | |
1559 | return s390_unwind_pseudo_register (this_frame, regnum); | |
1560 | } | |
1561 | ||
1562 | ||
a8c99f38 JB |
1563 | /* Normal stack frames. */ |
1564 | ||
1565 | struct s390_unwind_cache { | |
1566 | ||
1567 | CORE_ADDR func; | |
1568 | CORE_ADDR frame_base; | |
1569 | CORE_ADDR local_base; | |
1570 | ||
1571 | struct trad_frame_saved_reg *saved_regs; | |
1572 | }; | |
1573 | ||
a78f21af | 1574 | static int |
f089c433 | 1575 | s390_prologue_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 1576 | struct s390_unwind_cache *info) |
5769d3cd | 1577 | { |
f089c433 | 1578 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8c99f38 JB |
1579 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
1580 | struct s390_prologue_data data; | |
3fc46200 UW |
1581 | pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM]; |
1582 | pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; | |
121d8485 UW |
1583 | int i; |
1584 | CORE_ADDR cfa; | |
a8c99f38 JB |
1585 | CORE_ADDR func; |
1586 | CORE_ADDR result; | |
1587 | ULONGEST reg; | |
1588 | CORE_ADDR prev_sp; | |
1589 | int frame_pointer; | |
1590 | int size; | |
edb3359d | 1591 | struct frame_info *next_frame; |
a8c99f38 JB |
1592 | |
1593 | /* Try to find the function start address. If we can't find it, we don't | |
1594 | bother searching for it -- with modern compilers this would be mostly | |
1595 | pointless anyway. Trust that we'll either have valid DWARF-2 CFI data | |
1596 | or else a valid backchain ... */ | |
f089c433 | 1597 | func = get_frame_func (this_frame); |
a8c99f38 JB |
1598 | if (!func) |
1599 | return 0; | |
5769d3cd | 1600 | |
a8c99f38 JB |
1601 | /* Try to analyze the prologue. */ |
1602 | result = s390_analyze_prologue (gdbarch, func, | |
f089c433 | 1603 | get_frame_pc (this_frame), &data); |
a8c99f38 | 1604 | if (!result) |
5769d3cd | 1605 | return 0; |
5769d3cd | 1606 | |
a8c99f38 | 1607 | /* If this was successful, we should have found the instruction that |
34201ae3 | 1608 | sets the stack pointer register to the previous value of the stack |
a8c99f38 | 1609 | pointer minus the frame size. */ |
3fc46200 | 1610 | if (!pv_is_register (*sp, S390_SP_REGNUM)) |
5769d3cd | 1611 | return 0; |
a8c99f38 | 1612 | |
34201ae3 | 1613 | /* A frame size of zero at this point can mean either a real |
a8c99f38 | 1614 | frameless function, or else a failure to find the prologue. |
34201ae3 | 1615 | Perform some sanity checks to verify we really have a |
a8c99f38 JB |
1616 | frameless function. */ |
1617 | if (sp->k == 0) | |
5769d3cd | 1618 | { |
34201ae3 UW |
1619 | /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame |
1620 | size zero. This is only possible if the next frame is a sentinel | |
a8c99f38 | 1621 | frame, a dummy frame, or a signal trampoline frame. */ |
0e100dab AC |
1622 | /* FIXME: cagney/2004-05-01: This sanity check shouldn't be |
1623 | needed, instead the code should simpliy rely on its | |
1624 | analysis. */ | |
edb3359d DJ |
1625 | next_frame = get_next_frame (this_frame); |
1626 | while (next_frame && get_frame_type (next_frame) == INLINE_FRAME) | |
1627 | next_frame = get_next_frame (next_frame); | |
1628 | if (next_frame | |
f089c433 | 1629 | && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME) |
5769d3cd | 1630 | return 0; |
5769d3cd | 1631 | |
a8c99f38 JB |
1632 | /* If we really have a frameless function, %r14 must be valid |
1633 | -- in particular, it must point to a different function. */ | |
f089c433 | 1634 | reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM); |
a8c99f38 JB |
1635 | reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1; |
1636 | if (get_pc_function_start (reg) == func) | |
5769d3cd | 1637 | { |
a8c99f38 JB |
1638 | /* However, there is one case where it *is* valid for %r14 |
1639 | to point to the same function -- if this is a recursive | |
1640 | call, and we have stopped in the prologue *before* the | |
1641 | stack frame was allocated. | |
1642 | ||
1643 | Recognize this case by looking ahead a bit ... */ | |
5769d3cd | 1644 | |
a8c99f38 | 1645 | struct s390_prologue_data data2; |
3fc46200 | 1646 | pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM]; |
a8c99f38 JB |
1647 | |
1648 | if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2) | |
34201ae3 UW |
1649 | && pv_is_register (*sp, S390_SP_REGNUM) |
1650 | && sp->k != 0)) | |
a8c99f38 | 1651 | return 0; |
5769d3cd | 1652 | } |
5769d3cd | 1653 | } |
5769d3cd AC |
1654 | |
1655 | ||
a8c99f38 JB |
1656 | /* OK, we've found valid prologue data. */ |
1657 | size = -sp->k; | |
5769d3cd | 1658 | |
a8c99f38 JB |
1659 | /* If the frame pointer originally also holds the same value |
1660 | as the stack pointer, we're probably using it. If it holds | |
1661 | some other value -- even a constant offset -- it is most | |
1662 | likely used as temp register. */ | |
3fc46200 | 1663 | if (pv_is_identical (*sp, *fp)) |
a8c99f38 JB |
1664 | frame_pointer = S390_FRAME_REGNUM; |
1665 | else | |
1666 | frame_pointer = S390_SP_REGNUM; | |
1667 | ||
34201ae3 UW |
1668 | /* If we've detected a function with stack frame, we'll still have to |
1669 | treat it as frameless if we're currently within the function epilog | |
c378eb4e | 1670 | code at a point where the frame pointer has already been restored. |
a8c99f38 | 1671 | This can only happen in an innermost frame. */ |
0e100dab AC |
1672 | /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed, |
1673 | instead the code should simpliy rely on its analysis. */ | |
edb3359d DJ |
1674 | next_frame = get_next_frame (this_frame); |
1675 | while (next_frame && get_frame_type (next_frame) == INLINE_FRAME) | |
1676 | next_frame = get_next_frame (next_frame); | |
f089c433 | 1677 | if (size > 0 |
edb3359d | 1678 | && (next_frame == NULL |
f089c433 | 1679 | || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME)) |
5769d3cd | 1680 | { |
a8c99f38 JB |
1681 | /* See the comment in s390_in_function_epilogue_p on why this is |
1682 | not completely reliable ... */ | |
f089c433 | 1683 | if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame))) |
5769d3cd | 1684 | { |
a8c99f38 JB |
1685 | memset (&data, 0, sizeof (data)); |
1686 | size = 0; | |
1687 | frame_pointer = S390_SP_REGNUM; | |
5769d3cd | 1688 | } |
5769d3cd | 1689 | } |
5769d3cd | 1690 | |
a8c99f38 JB |
1691 | /* Once we know the frame register and the frame size, we can unwind |
1692 | the current value of the frame register from the next frame, and | |
34201ae3 | 1693 | add back the frame size to arrive that the previous frame's |
a8c99f38 | 1694 | stack pointer value. */ |
f089c433 | 1695 | prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size; |
121d8485 | 1696 | cfa = prev_sp + 16*word_size + 32; |
5769d3cd | 1697 | |
7803799a UW |
1698 | /* Set up ABI call-saved/call-clobbered registers. */ |
1699 | for (i = 0; i < S390_NUM_REGS; i++) | |
1700 | if (!s390_register_call_saved (gdbarch, i)) | |
1701 | trad_frame_set_unknown (info->saved_regs, i); | |
1702 | ||
1703 | /* CC is always call-clobbered. */ | |
d6db1fab | 1704 | trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM); |
7803799a | 1705 | |
121d8485 UW |
1706 | /* Record the addresses of all register spill slots the prologue parser |
1707 | has recognized. Consider only registers defined as call-saved by the | |
1708 | ABI; for call-clobbered registers the parser may have recognized | |
1709 | spurious stores. */ | |
5769d3cd | 1710 | |
7803799a UW |
1711 | for (i = 0; i < 16; i++) |
1712 | if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i) | |
1713 | && data.gpr_slot[i] != 0) | |
121d8485 | 1714 | info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i]; |
a8c99f38 | 1715 | |
7803799a UW |
1716 | for (i = 0; i < 16; i++) |
1717 | if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i) | |
1718 | && data.fpr_slot[i] != 0) | |
1719 | info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i]; | |
a8c99f38 JB |
1720 | |
1721 | /* Function return will set PC to %r14. */ | |
d6db1fab | 1722 | info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM]; |
a8c99f38 JB |
1723 | |
1724 | /* In frameless functions, we unwind simply by moving the return | |
1725 | address to the PC. However, if we actually stored to the | |
1726 | save area, use that -- we might only think the function frameless | |
1727 | because we're in the middle of the prologue ... */ | |
1728 | if (size == 0 | |
d6db1fab | 1729 | && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM)) |
a8c99f38 | 1730 | { |
d6db1fab | 1731 | info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM; |
5769d3cd | 1732 | } |
a8c99f38 JB |
1733 | |
1734 | /* Another sanity check: unless this is a frameless function, | |
1735 | we should have found spill slots for SP and PC. | |
1736 | If not, we cannot unwind further -- this happens e.g. in | |
1737 | libc's thread_start routine. */ | |
1738 | if (size > 0) | |
5769d3cd | 1739 | { |
a8c99f38 | 1740 | if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM) |
d6db1fab | 1741 | || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM)) |
a8c99f38 | 1742 | prev_sp = -1; |
5769d3cd | 1743 | } |
a8c99f38 JB |
1744 | |
1745 | /* We use the current value of the frame register as local_base, | |
1746 | and the top of the register save area as frame_base. */ | |
1747 | if (prev_sp != -1) | |
1748 | { | |
1749 | info->frame_base = prev_sp + 16*word_size + 32; | |
1750 | info->local_base = prev_sp - size; | |
1751 | } | |
1752 | ||
1753 | info->func = func; | |
1754 | return 1; | |
5769d3cd AC |
1755 | } |
1756 | ||
a78f21af | 1757 | static void |
f089c433 | 1758 | s390_backchain_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 1759 | struct s390_unwind_cache *info) |
5769d3cd | 1760 | { |
f089c433 | 1761 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8c99f38 | 1762 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
e17a4113 | 1763 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 JB |
1764 | CORE_ADDR backchain; |
1765 | ULONGEST reg; | |
1766 | LONGEST sp; | |
7803799a UW |
1767 | int i; |
1768 | ||
1769 | /* Set up ABI call-saved/call-clobbered registers. */ | |
1770 | for (i = 0; i < S390_NUM_REGS; i++) | |
1771 | if (!s390_register_call_saved (gdbarch, i)) | |
1772 | trad_frame_set_unknown (info->saved_regs, i); | |
1773 | ||
1774 | /* CC is always call-clobbered. */ | |
d6db1fab | 1775 | trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM); |
a8c99f38 JB |
1776 | |
1777 | /* Get the backchain. */ | |
f089c433 | 1778 | reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
e17a4113 | 1779 | backchain = read_memory_unsigned_integer (reg, word_size, byte_order); |
a8c99f38 JB |
1780 | |
1781 | /* A zero backchain terminates the frame chain. As additional | |
1782 | sanity check, let's verify that the spill slot for SP in the | |
1783 | save area pointed to by the backchain in fact links back to | |
1784 | the save area. */ | |
1785 | if (backchain != 0 | |
e17a4113 UW |
1786 | && safe_read_memory_integer (backchain + 15*word_size, |
1787 | word_size, byte_order, &sp) | |
a8c99f38 JB |
1788 | && (CORE_ADDR)sp == backchain) |
1789 | { | |
1790 | /* We don't know which registers were saved, but it will have | |
34201ae3 UW |
1791 | to be at least %r14 and %r15. This will allow us to continue |
1792 | unwinding, but other prev-frame registers may be incorrect ... */ | |
a8c99f38 JB |
1793 | info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size; |
1794 | info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size; | |
1795 | ||
1796 | /* Function return will set PC to %r14. */ | |
d6db1fab | 1797 | info->saved_regs[S390_PSWA_REGNUM] |
7803799a | 1798 | = info->saved_regs[S390_RETADDR_REGNUM]; |
a8c99f38 JB |
1799 | |
1800 | /* We use the current value of the frame register as local_base, | |
34201ae3 | 1801 | and the top of the register save area as frame_base. */ |
a8c99f38 JB |
1802 | info->frame_base = backchain + 16*word_size + 32; |
1803 | info->local_base = reg; | |
1804 | } | |
1805 | ||
f089c433 | 1806 | info->func = get_frame_pc (this_frame); |
5769d3cd AC |
1807 | } |
1808 | ||
a8c99f38 | 1809 | static struct s390_unwind_cache * |
f089c433 | 1810 | s390_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 JB |
1811 | void **this_prologue_cache) |
1812 | { | |
62261490 | 1813 | volatile struct gdb_exception ex; |
a8c99f38 | 1814 | struct s390_unwind_cache *info; |
62261490 | 1815 | |
a8c99f38 JB |
1816 | if (*this_prologue_cache) |
1817 | return *this_prologue_cache; | |
1818 | ||
1819 | info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache); | |
1820 | *this_prologue_cache = info; | |
f089c433 | 1821 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 JB |
1822 | info->func = -1; |
1823 | info->frame_base = -1; | |
1824 | info->local_base = -1; | |
1825 | ||
62261490 PA |
1826 | TRY_CATCH (ex, RETURN_MASK_ERROR) |
1827 | { | |
1828 | /* Try to use prologue analysis to fill the unwind cache. | |
1829 | If this fails, fall back to reading the stack backchain. */ | |
1830 | if (!s390_prologue_frame_unwind_cache (this_frame, info)) | |
1831 | s390_backchain_frame_unwind_cache (this_frame, info); | |
1832 | } | |
1833 | if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR) | |
1834 | throw_exception (ex); | |
a8c99f38 JB |
1835 | |
1836 | return info; | |
1837 | } | |
5769d3cd | 1838 | |
a78f21af | 1839 | static void |
f089c433 | 1840 | s390_frame_this_id (struct frame_info *this_frame, |
a8c99f38 JB |
1841 | void **this_prologue_cache, |
1842 | struct frame_id *this_id) | |
5769d3cd | 1843 | { |
a8c99f38 | 1844 | struct s390_unwind_cache *info |
f089c433 | 1845 | = s390_frame_unwind_cache (this_frame, this_prologue_cache); |
5769d3cd | 1846 | |
a8c99f38 JB |
1847 | if (info->frame_base == -1) |
1848 | return; | |
5769d3cd | 1849 | |
a8c99f38 | 1850 | *this_id = frame_id_build (info->frame_base, info->func); |
5769d3cd AC |
1851 | } |
1852 | ||
f089c433 UW |
1853 | static struct value * |
1854 | s390_frame_prev_register (struct frame_info *this_frame, | |
1855 | void **this_prologue_cache, int regnum) | |
a8c99f38 | 1856 | { |
7803799a | 1857 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8c99f38 | 1858 | struct s390_unwind_cache *info |
f089c433 | 1859 | = s390_frame_unwind_cache (this_frame, this_prologue_cache); |
7803799a | 1860 | |
d6db1fab | 1861 | return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum); |
a8c99f38 JB |
1862 | } |
1863 | ||
1864 | static const struct frame_unwind s390_frame_unwind = { | |
1865 | NORMAL_FRAME, | |
8fbca658 | 1866 | default_frame_unwind_stop_reason, |
a8c99f38 | 1867 | s390_frame_this_id, |
f089c433 UW |
1868 | s390_frame_prev_register, |
1869 | NULL, | |
1870 | default_frame_sniffer | |
a8c99f38 JB |
1871 | }; |
1872 | ||
5769d3cd | 1873 | |
8e645ae7 AC |
1874 | /* Code stubs and their stack frames. For things like PLTs and NULL |
1875 | function calls (where there is no true frame and the return address | |
1876 | is in the RETADDR register). */ | |
a8c99f38 | 1877 | |
8e645ae7 AC |
1878 | struct s390_stub_unwind_cache |
1879 | { | |
a8c99f38 JB |
1880 | CORE_ADDR frame_base; |
1881 | struct trad_frame_saved_reg *saved_regs; | |
1882 | }; | |
1883 | ||
8e645ae7 | 1884 | static struct s390_stub_unwind_cache * |
f089c433 | 1885 | s390_stub_frame_unwind_cache (struct frame_info *this_frame, |
8e645ae7 | 1886 | void **this_prologue_cache) |
5769d3cd | 1887 | { |
f089c433 | 1888 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
a8c99f38 | 1889 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
8e645ae7 | 1890 | struct s390_stub_unwind_cache *info; |
a8c99f38 | 1891 | ULONGEST reg; |
5c3cf190 | 1892 | |
a8c99f38 JB |
1893 | if (*this_prologue_cache) |
1894 | return *this_prologue_cache; | |
5c3cf190 | 1895 | |
8e645ae7 | 1896 | info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache); |
a8c99f38 | 1897 | *this_prologue_cache = info; |
f089c433 | 1898 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 JB |
1899 | |
1900 | /* The return address is in register %r14. */ | |
d6db1fab | 1901 | info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM; |
a8c99f38 JB |
1902 | |
1903 | /* Retrieve stack pointer and determine our frame base. */ | |
f089c433 | 1904 | reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
a8c99f38 JB |
1905 | info->frame_base = reg + 16*word_size + 32; |
1906 | ||
1907 | return info; | |
5769d3cd AC |
1908 | } |
1909 | ||
a8c99f38 | 1910 | static void |
f089c433 | 1911 | s390_stub_frame_this_id (struct frame_info *this_frame, |
8e645ae7 AC |
1912 | void **this_prologue_cache, |
1913 | struct frame_id *this_id) | |
5769d3cd | 1914 | { |
8e645ae7 | 1915 | struct s390_stub_unwind_cache *info |
f089c433 UW |
1916 | = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache); |
1917 | *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame)); | |
a8c99f38 | 1918 | } |
5769d3cd | 1919 | |
f089c433 UW |
1920 | static struct value * |
1921 | s390_stub_frame_prev_register (struct frame_info *this_frame, | |
1922 | void **this_prologue_cache, int regnum) | |
8e645ae7 AC |
1923 | { |
1924 | struct s390_stub_unwind_cache *info | |
f089c433 | 1925 | = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache); |
d6db1fab | 1926 | return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum); |
a8c99f38 JB |
1927 | } |
1928 | ||
f089c433 UW |
1929 | static int |
1930 | s390_stub_frame_sniffer (const struct frame_unwind *self, | |
1931 | struct frame_info *this_frame, | |
1932 | void **this_prologue_cache) | |
a8c99f38 | 1933 | { |
93d42b30 | 1934 | CORE_ADDR addr_in_block; |
8e645ae7 AC |
1935 | bfd_byte insn[S390_MAX_INSTR_SIZE]; |
1936 | ||
1937 | /* If the current PC points to non-readable memory, we assume we | |
1938 | have trapped due to an invalid function pointer call. We handle | |
1939 | the non-existing current function like a PLT stub. */ | |
f089c433 | 1940 | addr_in_block = get_frame_address_in_block (this_frame); |
3e5d3a5a | 1941 | if (in_plt_section (addr_in_block) |
f089c433 UW |
1942 | || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0) |
1943 | return 1; | |
1944 | return 0; | |
a8c99f38 | 1945 | } |
5769d3cd | 1946 | |
f089c433 UW |
1947 | static const struct frame_unwind s390_stub_frame_unwind = { |
1948 | NORMAL_FRAME, | |
8fbca658 | 1949 | default_frame_unwind_stop_reason, |
f089c433 UW |
1950 | s390_stub_frame_this_id, |
1951 | s390_stub_frame_prev_register, | |
1952 | NULL, | |
1953 | s390_stub_frame_sniffer | |
1954 | }; | |
1955 | ||
5769d3cd | 1956 | |
a8c99f38 | 1957 | /* Signal trampoline stack frames. */ |
5769d3cd | 1958 | |
a8c99f38 JB |
1959 | struct s390_sigtramp_unwind_cache { |
1960 | CORE_ADDR frame_base; | |
1961 | struct trad_frame_saved_reg *saved_regs; | |
1962 | }; | |
5769d3cd | 1963 | |
a8c99f38 | 1964 | static struct s390_sigtramp_unwind_cache * |
f089c433 | 1965 | s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame, |
a8c99f38 | 1966 | void **this_prologue_cache) |
5769d3cd | 1967 | { |
f089c433 | 1968 | struct gdbarch *gdbarch = get_frame_arch (this_frame); |
7803799a | 1969 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 | 1970 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
e17a4113 | 1971 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
a8c99f38 JB |
1972 | struct s390_sigtramp_unwind_cache *info; |
1973 | ULONGEST this_sp, prev_sp; | |
7803799a | 1974 | CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off; |
a8c99f38 JB |
1975 | int i; |
1976 | ||
1977 | if (*this_prologue_cache) | |
1978 | return *this_prologue_cache; | |
5769d3cd | 1979 | |
a8c99f38 JB |
1980 | info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache); |
1981 | *this_prologue_cache = info; | |
f089c433 | 1982 | info->saved_regs = trad_frame_alloc_saved_regs (this_frame); |
a8c99f38 | 1983 | |
f089c433 UW |
1984 | this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
1985 | next_ra = get_frame_pc (this_frame); | |
a8c99f38 JB |
1986 | next_cfa = this_sp + 16*word_size + 32; |
1987 | ||
1988 | /* New-style RT frame: | |
1989 | retcode + alignment (8 bytes) | |
1990 | siginfo (128 bytes) | |
c378eb4e | 1991 | ucontext (contains sigregs at offset 5 words). */ |
a8c99f38 JB |
1992 | if (next_ra == next_cfa) |
1993 | { | |
f0f63663 | 1994 | sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8); |
7803799a UW |
1995 | /* sigregs are followed by uc_sigmask (8 bytes), then by the |
1996 | upper GPR halves if present. */ | |
1997 | sigreg_high_off = 8; | |
a8c99f38 JB |
1998 | } |
1999 | ||
2000 | /* Old-style RT frame and all non-RT frames: | |
2001 | old signal mask (8 bytes) | |
c378eb4e | 2002 | pointer to sigregs. */ |
5769d3cd AC |
2003 | else |
2004 | { | |
e17a4113 UW |
2005 | sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8, |
2006 | word_size, byte_order); | |
7803799a UW |
2007 | /* sigregs are followed by signo (4 bytes), then by the |
2008 | upper GPR halves if present. */ | |
2009 | sigreg_high_off = 4; | |
a8c99f38 | 2010 | } |
5769d3cd | 2011 | |
a8c99f38 | 2012 | /* The sigregs structure looks like this: |
34201ae3 UW |
2013 | long psw_mask; |
2014 | long psw_addr; | |
2015 | long gprs[16]; | |
2016 | int acrs[16]; | |
2017 | int fpc; | |
2018 | int __pad; | |
2019 | double fprs[16]; */ | |
5769d3cd | 2020 | |
7803799a UW |
2021 | /* PSW mask and address. */ |
2022 | info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr; | |
a8c99f38 | 2023 | sigreg_ptr += word_size; |
7803799a | 2024 | info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr; |
a8c99f38 JB |
2025 | sigreg_ptr += word_size; |
2026 | ||
2027 | /* Then the GPRs. */ | |
2028 | for (i = 0; i < 16; i++) | |
2029 | { | |
2030 | info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr; | |
2031 | sigreg_ptr += word_size; | |
2032 | } | |
2033 | ||
2034 | /* Then the ACRs. */ | |
2035 | for (i = 0; i < 16; i++) | |
2036 | { | |
2037 | info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr; | |
2038 | sigreg_ptr += 4; | |
5769d3cd | 2039 | } |
5769d3cd | 2040 | |
a8c99f38 JB |
2041 | /* The floating-point control word. */ |
2042 | info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr; | |
2043 | sigreg_ptr += 8; | |
5769d3cd | 2044 | |
a8c99f38 JB |
2045 | /* And finally the FPRs. */ |
2046 | for (i = 0; i < 16; i++) | |
2047 | { | |
2048 | info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr; | |
2049 | sigreg_ptr += 8; | |
2050 | } | |
2051 | ||
7803799a UW |
2052 | /* If we have them, the GPR upper halves are appended at the end. */ |
2053 | sigreg_ptr += sigreg_high_off; | |
2054 | if (tdep->gpr_full_regnum != -1) | |
2055 | for (i = 0; i < 16; i++) | |
2056 | { | |
34201ae3 | 2057 | info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr; |
7803799a UW |
2058 | sigreg_ptr += 4; |
2059 | } | |
2060 | ||
a8c99f38 JB |
2061 | /* Restore the previous frame's SP. */ |
2062 | prev_sp = read_memory_unsigned_integer ( | |
2063 | info->saved_regs[S390_SP_REGNUM].addr, | |
e17a4113 | 2064 | word_size, byte_order); |
5769d3cd | 2065 | |
a8c99f38 JB |
2066 | /* Determine our frame base. */ |
2067 | info->frame_base = prev_sp + 16*word_size + 32; | |
5769d3cd | 2068 | |
a8c99f38 | 2069 | return info; |
5769d3cd AC |
2070 | } |
2071 | ||
a8c99f38 | 2072 | static void |
f089c433 | 2073 | s390_sigtramp_frame_this_id (struct frame_info *this_frame, |
a8c99f38 JB |
2074 | void **this_prologue_cache, |
2075 | struct frame_id *this_id) | |
5769d3cd | 2076 | { |
a8c99f38 | 2077 | struct s390_sigtramp_unwind_cache *info |
f089c433 UW |
2078 | = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); |
2079 | *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame)); | |
5769d3cd AC |
2080 | } |
2081 | ||
f089c433 UW |
2082 | static struct value * |
2083 | s390_sigtramp_frame_prev_register (struct frame_info *this_frame, | |
2084 | void **this_prologue_cache, int regnum) | |
a8c99f38 JB |
2085 | { |
2086 | struct s390_sigtramp_unwind_cache *info | |
f089c433 | 2087 | = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache); |
d6db1fab | 2088 | return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum); |
a8c99f38 JB |
2089 | } |
2090 | ||
f089c433 UW |
2091 | static int |
2092 | s390_sigtramp_frame_sniffer (const struct frame_unwind *self, | |
2093 | struct frame_info *this_frame, | |
2094 | void **this_prologue_cache) | |
5769d3cd | 2095 | { |
f089c433 | 2096 | CORE_ADDR pc = get_frame_pc (this_frame); |
a8c99f38 | 2097 | bfd_byte sigreturn[2]; |
4c8287ac | 2098 | |
8defab1a | 2099 | if (target_read_memory (pc, sigreturn, 2)) |
f089c433 | 2100 | return 0; |
4c8287ac | 2101 | |
237b092b | 2102 | if (sigreturn[0] != op_svc) |
f089c433 | 2103 | return 0; |
5769d3cd | 2104 | |
a8c99f38 JB |
2105 | if (sigreturn[1] != 119 /* sigreturn */ |
2106 | && sigreturn[1] != 173 /* rt_sigreturn */) | |
f089c433 | 2107 | return 0; |
34201ae3 | 2108 | |
f089c433 | 2109 | return 1; |
5769d3cd AC |
2110 | } |
2111 | ||
f089c433 UW |
2112 | static const struct frame_unwind s390_sigtramp_frame_unwind = { |
2113 | SIGTRAMP_FRAME, | |
8fbca658 | 2114 | default_frame_unwind_stop_reason, |
f089c433 UW |
2115 | s390_sigtramp_frame_this_id, |
2116 | s390_sigtramp_frame_prev_register, | |
2117 | NULL, | |
2118 | s390_sigtramp_frame_sniffer | |
2119 | }; | |
2120 | ||
237b092b AA |
2121 | /* Retrieve the syscall number at a ptrace syscall-stop. Return -1 |
2122 | upon error. */ | |
2123 | ||
2124 | static LONGEST | |
2125 | s390_linux_get_syscall_number (struct gdbarch *gdbarch, | |
2126 | ptid_t ptid) | |
2127 | { | |
2128 | struct regcache *regs = get_thread_regcache (ptid); | |
2129 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
2130 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); | |
2131 | ULONGEST pc; | |
2132 | ULONGEST svc_number = -1; | |
2133 | unsigned opcode; | |
2134 | ||
2135 | /* Assume that the PC points after the 2-byte SVC instruction. We | |
2136 | don't currently support SVC via EXECUTE. */ | |
2137 | regcache_cooked_read_unsigned (regs, tdep->pc_regnum, &pc); | |
2138 | pc -= 2; | |
2139 | opcode = read_memory_unsigned_integer ((CORE_ADDR) pc, 1, byte_order); | |
2140 | if (opcode != op_svc) | |
2141 | return -1; | |
2142 | ||
2143 | svc_number = read_memory_unsigned_integer ((CORE_ADDR) pc + 1, 1, | |
2144 | byte_order); | |
2145 | if (svc_number == 0) | |
2146 | regcache_cooked_read_unsigned (regs, S390_R1_REGNUM, &svc_number); | |
2147 | ||
2148 | return svc_number; | |
2149 | } | |
2150 | ||
4c8287ac | 2151 | |
a8c99f38 JB |
2152 | /* Frame base handling. */ |
2153 | ||
2154 | static CORE_ADDR | |
f089c433 | 2155 | s390_frame_base_address (struct frame_info *this_frame, void **this_cache) |
4c8287ac | 2156 | { |
a8c99f38 | 2157 | struct s390_unwind_cache *info |
f089c433 | 2158 | = s390_frame_unwind_cache (this_frame, this_cache); |
a8c99f38 JB |
2159 | return info->frame_base; |
2160 | } | |
2161 | ||
2162 | static CORE_ADDR | |
f089c433 | 2163 | s390_local_base_address (struct frame_info *this_frame, void **this_cache) |
a8c99f38 JB |
2164 | { |
2165 | struct s390_unwind_cache *info | |
f089c433 | 2166 | = s390_frame_unwind_cache (this_frame, this_cache); |
a8c99f38 JB |
2167 | return info->local_base; |
2168 | } | |
2169 | ||
2170 | static const struct frame_base s390_frame_base = { | |
2171 | &s390_frame_unwind, | |
2172 | s390_frame_base_address, | |
2173 | s390_local_base_address, | |
2174 | s390_local_base_address | |
2175 | }; | |
2176 | ||
2177 | static CORE_ADDR | |
2178 | s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
2179 | { | |
7803799a | 2180 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
a8c99f38 | 2181 | ULONGEST pc; |
7803799a | 2182 | pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum); |
a8c99f38 JB |
2183 | return gdbarch_addr_bits_remove (gdbarch, pc); |
2184 | } | |
2185 | ||
2186 | static CORE_ADDR | |
2187 | s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame) | |
2188 | { | |
2189 | ULONGEST sp; | |
2190 | sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM); | |
2191 | return gdbarch_addr_bits_remove (gdbarch, sp); | |
4c8287ac JB |
2192 | } |
2193 | ||
2194 | ||
a431654a AC |
2195 | /* DWARF-2 frame support. */ |
2196 | ||
7803799a UW |
2197 | static struct value * |
2198 | s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache, | |
2199 | int regnum) | |
2200 | { | |
d6db1fab | 2201 | return s390_unwind_pseudo_register (this_frame, regnum); |
7803799a UW |
2202 | } |
2203 | ||
a431654a AC |
2204 | static void |
2205 | s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum, | |
34201ae3 | 2206 | struct dwarf2_frame_state_reg *reg, |
4a4e5149 | 2207 | struct frame_info *this_frame) |
a431654a AC |
2208 | { |
2209 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); | |
2210 | ||
d6db1fab UW |
2211 | /* The condition code (and thus PSW mask) is call-clobbered. */ |
2212 | if (regnum == S390_PSWM_REGNUM) | |
2213 | reg->how = DWARF2_FRAME_REG_UNDEFINED; | |
2214 | ||
2215 | /* The PSW address unwinds to the return address. */ | |
2216 | else if (regnum == S390_PSWA_REGNUM) | |
2217 | reg->how = DWARF2_FRAME_REG_RA; | |
2218 | ||
7803799a UW |
2219 | /* Fixed registers are call-saved or call-clobbered |
2220 | depending on the ABI in use. */ | |
d6db1fab | 2221 | else if (regnum < S390_NUM_REGS) |
a431654a | 2222 | { |
7803799a | 2223 | if (s390_register_call_saved (gdbarch, regnum)) |
a431654a | 2224 | reg->how = DWARF2_FRAME_REG_SAME_VALUE; |
7803799a | 2225 | else |
a431654a | 2226 | reg->how = DWARF2_FRAME_REG_UNDEFINED; |
7803799a | 2227 | } |
a431654a | 2228 | |
d6db1fab UW |
2229 | /* We install a special function to unwind pseudos. */ |
2230 | else | |
7803799a UW |
2231 | { |
2232 | reg->how = DWARF2_FRAME_REG_FN; | |
2233 | reg->loc.fn = s390_dwarf2_prev_register; | |
a431654a AC |
2234 | } |
2235 | } | |
2236 | ||
2237 | ||
b0cf273e JB |
2238 | /* Dummy function calls. */ |
2239 | ||
78f8b424 JB |
2240 | /* Return non-zero if TYPE is an integer-like type, zero otherwise. |
2241 | "Integer-like" types are those that should be passed the way | |
2242 | integers are: integers, enums, ranges, characters, and booleans. */ | |
2243 | static int | |
2244 | is_integer_like (struct type *type) | |
2245 | { | |
2246 | enum type_code code = TYPE_CODE (type); | |
2247 | ||
2248 | return (code == TYPE_CODE_INT | |
34201ae3 UW |
2249 | || code == TYPE_CODE_ENUM |
2250 | || code == TYPE_CODE_RANGE | |
2251 | || code == TYPE_CODE_CHAR | |
2252 | || code == TYPE_CODE_BOOL); | |
78f8b424 JB |
2253 | } |
2254 | ||
78f8b424 JB |
2255 | /* Return non-zero if TYPE is a pointer-like type, zero otherwise. |
2256 | "Pointer-like" types are those that should be passed the way | |
2257 | pointers are: pointers and references. */ | |
2258 | static int | |
2259 | is_pointer_like (struct type *type) | |
2260 | { | |
2261 | enum type_code code = TYPE_CODE (type); | |
2262 | ||
2263 | return (code == TYPE_CODE_PTR | |
34201ae3 | 2264 | || code == TYPE_CODE_REF); |
78f8b424 JB |
2265 | } |
2266 | ||
2267 | ||
20a940cc JB |
2268 | /* Return non-zero if TYPE is a `float singleton' or `double |
2269 | singleton', zero otherwise. | |
2270 | ||
2271 | A `T singleton' is a struct type with one member, whose type is | |
2272 | either T or a `T singleton'. So, the following are all float | |
2273 | singletons: | |
2274 | ||
2275 | struct { float x }; | |
2276 | struct { struct { float x; } x; }; | |
2277 | struct { struct { struct { float x; } x; } x; }; | |
2278 | ||
2279 | ... and so on. | |
2280 | ||
b0cf273e JB |
2281 | All such structures are passed as if they were floats or doubles, |
2282 | as the (revised) ABI says. */ | |
20a940cc JB |
2283 | static int |
2284 | is_float_singleton (struct type *type) | |
2285 | { | |
b0cf273e JB |
2286 | if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1) |
2287 | { | |
2288 | struct type *singleton_type = TYPE_FIELD_TYPE (type, 0); | |
2289 | CHECK_TYPEDEF (singleton_type); | |
2290 | ||
2291 | return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT | |
a16b8bcd | 2292 | || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT |
b0cf273e JB |
2293 | || is_float_singleton (singleton_type)); |
2294 | } | |
2295 | ||
2296 | return 0; | |
20a940cc JB |
2297 | } |
2298 | ||
2299 | ||
2300 | /* Return non-zero if TYPE is a struct-like type, zero otherwise. | |
2301 | "Struct-like" types are those that should be passed as structs are: | |
2302 | structs and unions. | |
2303 | ||
2304 | As an odd quirk, not mentioned in the ABI, GCC passes float and | |
2305 | double singletons as if they were a plain float, double, etc. (The | |
2306 | corresponding union types are handled normally.) So we exclude | |
2307 | those types here. *shrug* */ | |
2308 | static int | |
2309 | is_struct_like (struct type *type) | |
2310 | { | |
2311 | enum type_code code = TYPE_CODE (type); | |
2312 | ||
2313 | return (code == TYPE_CODE_UNION | |
34201ae3 | 2314 | || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type))); |
20a940cc JB |
2315 | } |
2316 | ||
2317 | ||
2318 | /* Return non-zero if TYPE is a float-like type, zero otherwise. | |
2319 | "Float-like" types are those that should be passed as | |
2320 | floating-point values are. | |
2321 | ||
2322 | You'd think this would just be floats, doubles, long doubles, etc. | |
2323 | But as an odd quirk, not mentioned in the ABI, GCC passes float and | |
2324 | double singletons as if they were a plain float, double, etc. (The | |
4d819d0e | 2325 | corresponding union types are handled normally.) So we include |
20a940cc JB |
2326 | those types here. *shrug* */ |
2327 | static int | |
2328 | is_float_like (struct type *type) | |
2329 | { | |
2330 | return (TYPE_CODE (type) == TYPE_CODE_FLT | |
a16b8bcd | 2331 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT |
34201ae3 | 2332 | || is_float_singleton (type)); |
20a940cc JB |
2333 | } |
2334 | ||
2335 | ||
78f8b424 | 2336 | static int |
b0cf273e | 2337 | is_power_of_two (unsigned int n) |
78f8b424 | 2338 | { |
b0cf273e | 2339 | return ((n & (n - 1)) == 0); |
78f8b424 JB |
2340 | } |
2341 | ||
b0cf273e JB |
2342 | /* Return non-zero if TYPE should be passed as a pointer to a copy, |
2343 | zero otherwise. */ | |
4d819d0e | 2344 | static int |
b0cf273e | 2345 | s390_function_arg_pass_by_reference (struct type *type) |
4d819d0e | 2346 | { |
354ecfd5 | 2347 | if (TYPE_LENGTH (type) > 8) |
b0cf273e | 2348 | return 1; |
4d819d0e | 2349 | |
56b9d9ac UW |
2350 | return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type))) |
2351 | || TYPE_CODE (type) == TYPE_CODE_COMPLEX | |
2352 | || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type)); | |
4d819d0e JB |
2353 | } |
2354 | ||
b0cf273e JB |
2355 | /* Return non-zero if TYPE should be passed in a float register |
2356 | if possible. */ | |
78f8b424 | 2357 | static int |
b0cf273e | 2358 | s390_function_arg_float (struct type *type) |
78f8b424 | 2359 | { |
354ecfd5 | 2360 | if (TYPE_LENGTH (type) > 8) |
b0cf273e | 2361 | return 0; |
78f8b424 | 2362 | |
b0cf273e | 2363 | return is_float_like (type); |
4d819d0e JB |
2364 | } |
2365 | ||
b0cf273e JB |
2366 | /* Return non-zero if TYPE should be passed in an integer register |
2367 | (or a pair of integer registers) if possible. */ | |
78f8b424 | 2368 | static int |
b0cf273e | 2369 | s390_function_arg_integer (struct type *type) |
78f8b424 | 2370 | { |
354ecfd5 | 2371 | if (TYPE_LENGTH (type) > 8) |
b0cf273e | 2372 | return 0; |
78f8b424 | 2373 | |
b0cf273e JB |
2374 | return is_integer_like (type) |
2375 | || is_pointer_like (type) | |
354ecfd5 | 2376 | || (is_struct_like (type) && is_power_of_two (TYPE_LENGTH (type))); |
78f8b424 JB |
2377 | } |
2378 | ||
78f8b424 JB |
2379 | /* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full |
2380 | word as required for the ABI. */ | |
2381 | static LONGEST | |
e17a4113 | 2382 | extend_simple_arg (struct gdbarch *gdbarch, struct value *arg) |
78f8b424 | 2383 | { |
e17a4113 | 2384 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
56b9d9ac | 2385 | struct type *type = check_typedef (value_type (arg)); |
78f8b424 JB |
2386 | |
2387 | /* Even structs get passed in the least significant bits of the | |
2388 | register / memory word. It's not really right to extract them as | |
2389 | an integer, but it does take care of the extension. */ | |
2390 | if (TYPE_UNSIGNED (type)) | |
0fd88904 | 2391 | return extract_unsigned_integer (value_contents (arg), |
34201ae3 | 2392 | TYPE_LENGTH (type), byte_order); |
78f8b424 | 2393 | else |
0fd88904 | 2394 | return extract_signed_integer (value_contents (arg), |
34201ae3 | 2395 | TYPE_LENGTH (type), byte_order); |
78f8b424 JB |
2396 | } |
2397 | ||
2398 | ||
78f8b424 JB |
2399 | /* Return the alignment required by TYPE. */ |
2400 | static int | |
2401 | alignment_of (struct type *type) | |
2402 | { | |
2403 | int alignment; | |
2404 | ||
2405 | if (is_integer_like (type) | |
2406 | || is_pointer_like (type) | |
a16b8bcd UW |
2407 | || TYPE_CODE (type) == TYPE_CODE_FLT |
2408 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) | |
78f8b424 JB |
2409 | alignment = TYPE_LENGTH (type); |
2410 | else if (TYPE_CODE (type) == TYPE_CODE_STRUCT | |
34201ae3 | 2411 | || TYPE_CODE (type) == TYPE_CODE_UNION) |
78f8b424 JB |
2412 | { |
2413 | int i; | |
2414 | ||
2415 | alignment = 1; | |
2416 | for (i = 0; i < TYPE_NFIELDS (type); i++) | |
34201ae3 UW |
2417 | { |
2418 | int field_alignment | |
56b9d9ac | 2419 | = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i))); |
78f8b424 | 2420 | |
34201ae3 UW |
2421 | if (field_alignment > alignment) |
2422 | alignment = field_alignment; | |
2423 | } | |
78f8b424 JB |
2424 | } |
2425 | else | |
2426 | alignment = 1; | |
2427 | ||
2428 | /* Check that everything we ever return is a power of two. Lots of | |
2429 | code doesn't want to deal with aligning things to arbitrary | |
2430 | boundaries. */ | |
2431 | gdb_assert ((alignment & (alignment - 1)) == 0); | |
2432 | ||
2433 | return alignment; | |
2434 | } | |
2435 | ||
2436 | ||
2437 | /* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in | |
ca557f44 AC |
2438 | place to be passed to a function, as specified by the "GNU/Linux |
2439 | for S/390 ELF Application Binary Interface Supplement". | |
78f8b424 JB |
2440 | |
2441 | SP is the current stack pointer. We must put arguments, links, | |
2442 | padding, etc. whereever they belong, and return the new stack | |
2443 | pointer value. | |
34201ae3 | 2444 | |
78f8b424 JB |
2445 | If STRUCT_RETURN is non-zero, then the function we're calling is |
2446 | going to return a structure by value; STRUCT_ADDR is the address of | |
2447 | a block we've allocated for it on the stack. | |
2448 | ||
2449 | Our caller has taken care of any type promotions needed to satisfy | |
2450 | prototypes or the old K&R argument-passing rules. */ | |
a78f21af | 2451 | static CORE_ADDR |
7d9b040b | 2452 | s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function, |
b0cf273e JB |
2453 | struct regcache *regcache, CORE_ADDR bp_addr, |
2454 | int nargs, struct value **args, CORE_ADDR sp, | |
2455 | int struct_return, CORE_ADDR struct_addr) | |
5769d3cd | 2456 | { |
b0cf273e JB |
2457 | struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch); |
2458 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; | |
e17a4113 | 2459 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
78f8b424 | 2460 | int i; |
5769d3cd | 2461 | |
78f8b424 JB |
2462 | /* If the i'th argument is passed as a reference to a copy, then |
2463 | copy_addr[i] is the address of the copy we made. */ | |
2464 | CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR)); | |
5769d3cd | 2465 | |
c0cc4c83 | 2466 | /* Reserve space for the reference-to-copy area. */ |
78f8b424 JB |
2467 | for (i = 0; i < nargs; i++) |
2468 | { | |
2469 | struct value *arg = args[i]; | |
56b9d9ac | 2470 | struct type *type = check_typedef (value_type (arg)); |
5769d3cd | 2471 | |
b0cf273e | 2472 | if (s390_function_arg_pass_by_reference (type)) |
34201ae3 UW |
2473 | { |
2474 | sp -= TYPE_LENGTH (type); | |
2475 | sp = align_down (sp, alignment_of (type)); | |
2476 | copy_addr[i] = sp; | |
2477 | } | |
5769d3cd | 2478 | } |
5769d3cd | 2479 | |
78f8b424 JB |
2480 | /* Reserve space for the parameter area. As a conservative |
2481 | simplification, we assume that everything will be passed on the | |
34201ae3 | 2482 | stack. Since every argument larger than 8 bytes will be |
b0cf273e JB |
2483 | passed by reference, we use this simple upper bound. */ |
2484 | sp -= nargs * 8; | |
78f8b424 | 2485 | |
78f8b424 JB |
2486 | /* After all that, make sure it's still aligned on an eight-byte |
2487 | boundary. */ | |
5b03f266 | 2488 | sp = align_down (sp, 8); |
78f8b424 | 2489 | |
c0cc4c83 UW |
2490 | /* Allocate the standard frame areas: the register save area, the |
2491 | word reserved for the compiler (which seems kind of meaningless), | |
2492 | and the back chain pointer. */ | |
2493 | sp -= 16*word_size + 32; | |
2494 | ||
2495 | /* Now we have the final SP value. Make sure we didn't underflow; | |
2496 | on 31-bit, this would result in addresses with the high bit set, | |
2497 | which causes confusion elsewhere. Note that if we error out | |
2498 | here, stack and registers remain untouched. */ | |
2499 | if (gdbarch_addr_bits_remove (gdbarch, sp) != sp) | |
2500 | error (_("Stack overflow")); | |
2501 | ||
2502 | ||
78f8b424 JB |
2503 | /* Finally, place the actual parameters, working from SP towards |
2504 | higher addresses. The code above is supposed to reserve enough | |
2505 | space for this. */ | |
2506 | { | |
2507 | int fr = 0; | |
2508 | int gr = 2; | |
c0cc4c83 | 2509 | CORE_ADDR starg = sp + 16*word_size + 32; |
78f8b424 | 2510 | |
b0cf273e | 2511 | /* A struct is returned using general register 2. */ |
4d819d0e | 2512 | if (struct_return) |
b0cf273e JB |
2513 | { |
2514 | regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr, | |
34201ae3 | 2515 | struct_addr); |
b0cf273e JB |
2516 | gr++; |
2517 | } | |
4d819d0e | 2518 | |
78f8b424 JB |
2519 | for (i = 0; i < nargs; i++) |
2520 | { | |
34201ae3 UW |
2521 | struct value *arg = args[i]; |
2522 | struct type *type = check_typedef (value_type (arg)); | |
2523 | unsigned length = TYPE_LENGTH (type); | |
b0cf273e JB |
2524 | |
2525 | if (s390_function_arg_pass_by_reference (type)) | |
2526 | { | |
c0cc4c83 UW |
2527 | /* Actually copy the argument contents to the stack slot |
2528 | that was reserved above. */ | |
2529 | write_memory (copy_addr[i], value_contents (arg), length); | |
2530 | ||
b0cf273e JB |
2531 | if (gr <= 6) |
2532 | { | |
2533 | regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr, | |
34201ae3 | 2534 | copy_addr[i]); |
b0cf273e JB |
2535 | gr++; |
2536 | } | |
2537 | else | |
2538 | { | |
e17a4113 UW |
2539 | write_memory_unsigned_integer (starg, word_size, byte_order, |
2540 | copy_addr[i]); | |
b0cf273e JB |
2541 | starg += word_size; |
2542 | } | |
2543 | } | |
2544 | else if (s390_function_arg_float (type)) | |
2545 | { | |
2546 | /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments, | |
2547 | the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */ | |
2548 | if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6)) | |
2549 | { | |
2550 | /* When we store a single-precision value in an FP register, | |
2551 | it occupies the leftmost bits. */ | |
2552 | regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr, | |
0fd88904 | 2553 | 0, length, value_contents (arg)); |
b0cf273e JB |
2554 | fr += 2; |
2555 | } | |
2556 | else | |
2557 | { | |
2558 | /* When we store a single-precision value in a stack slot, | |
2559 | it occupies the rightmost bits. */ | |
2560 | starg = align_up (starg + length, word_size); | |
34201ae3 | 2561 | write_memory (starg - length, value_contents (arg), length); |
b0cf273e JB |
2562 | } |
2563 | } | |
2564 | else if (s390_function_arg_integer (type) && length <= word_size) | |
2565 | { | |
2566 | if (gr <= 6) | |
2567 | { | |
2568 | /* Integer arguments are always extended to word size. */ | |
2569 | regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr, | |
c378eb4e MS |
2570 | extend_simple_arg (gdbarch, |
2571 | arg)); | |
b0cf273e JB |
2572 | gr++; |
2573 | } | |
2574 | else | |
2575 | { | |
2576 | /* Integer arguments are always extended to word size. */ | |
e17a4113 | 2577 | write_memory_signed_integer (starg, word_size, byte_order, |
34201ae3 UW |
2578 | extend_simple_arg (gdbarch, arg)); |
2579 | starg += word_size; | |
b0cf273e JB |
2580 | } |
2581 | } | |
2582 | else if (s390_function_arg_integer (type) && length == 2*word_size) | |
2583 | { | |
2584 | if (gr <= 5) | |
2585 | { | |
2586 | regcache_cooked_write (regcache, S390_R0_REGNUM + gr, | |
0fd88904 | 2587 | value_contents (arg)); |
b0cf273e | 2588 | regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1, |
0fd88904 | 2589 | value_contents (arg) + word_size); |
b0cf273e JB |
2590 | gr += 2; |
2591 | } | |
2592 | else | |
2593 | { | |
2594 | /* If we skipped r6 because we couldn't fit a DOUBLE_ARG | |
2595 | in it, then don't go back and use it again later. */ | |
2596 | gr = 7; | |
2597 | ||
0fd88904 | 2598 | write_memory (starg, value_contents (arg), length); |
b0cf273e JB |
2599 | starg += length; |
2600 | } | |
2601 | } | |
2602 | else | |
e2e0b3e5 | 2603 | internal_error (__FILE__, __LINE__, _("unknown argument type")); |
78f8b424 JB |
2604 | } |
2605 | } | |
2606 | ||
8de7d199 UW |
2607 | /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */ |
2608 | if (word_size == 4) | |
2609 | { | |
2610 | ULONGEST pswa; | |
2611 | regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa); | |
2612 | bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000); | |
2613 | } | |
b0cf273e | 2614 | regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr); |
8de7d199 | 2615 | |
b0cf273e JB |
2616 | /* Store updated stack pointer. */ |
2617 | regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp); | |
78f8b424 | 2618 | |
a8c99f38 | 2619 | /* We need to return the 'stack part' of the frame ID, |
121d8485 UW |
2620 | which is actually the top of the register save area. */ |
2621 | return sp + 16*word_size + 32; | |
5769d3cd AC |
2622 | } |
2623 | ||
f089c433 | 2624 | /* Assuming THIS_FRAME is a dummy, return the frame ID of that |
b0cf273e JB |
2625 | dummy frame. The frame ID's base needs to match the TOS value |
2626 | returned by push_dummy_call, and the PC match the dummy frame's | |
2627 | breakpoint. */ | |
2628 | static struct frame_id | |
f089c433 | 2629 | s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame) |
b0cf273e | 2630 | { |
a8c99f38 | 2631 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
f089c433 UW |
2632 | CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM); |
2633 | sp = gdbarch_addr_bits_remove (gdbarch, sp); | |
a8c99f38 | 2634 | |
121d8485 | 2635 | return frame_id_build (sp + 16*word_size + 32, |
34201ae3 | 2636 | get_frame_pc (this_frame)); |
b0cf273e | 2637 | } |
c8f9d51c | 2638 | |
4074e13c JB |
2639 | static CORE_ADDR |
2640 | s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr) | |
2641 | { | |
2642 | /* Both the 32- and 64-bit ABI's say that the stack pointer should | |
2643 | always be aligned on an eight-byte boundary. */ | |
2644 | return (addr & -8); | |
2645 | } | |
2646 | ||
2647 | ||
b0cf273e JB |
2648 | /* Function return value access. */ |
2649 | ||
2650 | static enum return_value_convention | |
2651 | s390_return_value_convention (struct gdbarch *gdbarch, struct type *type) | |
c8f9d51c | 2652 | { |
354ecfd5 | 2653 | if (TYPE_LENGTH (type) > 8) |
b0cf273e JB |
2654 | return RETURN_VALUE_STRUCT_CONVENTION; |
2655 | ||
2656 | switch (TYPE_CODE (type)) | |
2657 | { | |
2658 | case TYPE_CODE_STRUCT: | |
2659 | case TYPE_CODE_UNION: | |
2660 | case TYPE_CODE_ARRAY: | |
56b9d9ac | 2661 | case TYPE_CODE_COMPLEX: |
b0cf273e | 2662 | return RETURN_VALUE_STRUCT_CONVENTION; |
c8f9d51c | 2663 | |
b0cf273e JB |
2664 | default: |
2665 | return RETURN_VALUE_REGISTER_CONVENTION; | |
2666 | } | |
c8f9d51c JB |
2667 | } |
2668 | ||
b0cf273e | 2669 | static enum return_value_convention |
6a3a010b | 2670 | s390_return_value (struct gdbarch *gdbarch, struct value *function, |
c055b101 CV |
2671 | struct type *type, struct regcache *regcache, |
2672 | gdb_byte *out, const gdb_byte *in) | |
5769d3cd | 2673 | { |
e17a4113 | 2674 | enum bfd_endian byte_order = gdbarch_byte_order (gdbarch); |
b0cf273e | 2675 | int word_size = gdbarch_ptr_bit (gdbarch) / 8; |
56b9d9ac UW |
2676 | enum return_value_convention rvc; |
2677 | int length; | |
2678 | ||
2679 | type = check_typedef (type); | |
2680 | rvc = s390_return_value_convention (gdbarch, type); | |
2681 | length = TYPE_LENGTH (type); | |
2682 | ||
b0cf273e JB |
2683 | if (in) |
2684 | { | |
2685 | switch (rvc) | |
2686 | { | |
2687 | case RETURN_VALUE_REGISTER_CONVENTION: | |
a16b8bcd UW |
2688 | if (TYPE_CODE (type) == TYPE_CODE_FLT |
2689 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) | |
b0cf273e JB |
2690 | { |
2691 | /* When we store a single-precision value in an FP register, | |
2692 | it occupies the leftmost bits. */ | |
34201ae3 | 2693 | regcache_cooked_write_part (regcache, S390_F0_REGNUM, |
b0cf273e JB |
2694 | 0, length, in); |
2695 | } | |
2696 | else if (length <= word_size) | |
2697 | { | |
2698 | /* Integer arguments are always extended to word size. */ | |
2699 | if (TYPE_UNSIGNED (type)) | |
2700 | regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM, | |
e17a4113 | 2701 | extract_unsigned_integer (in, length, byte_order)); |
b0cf273e JB |
2702 | else |
2703 | regcache_cooked_write_signed (regcache, S390_R2_REGNUM, | |
e17a4113 | 2704 | extract_signed_integer (in, length, byte_order)); |
b0cf273e JB |
2705 | } |
2706 | else if (length == 2*word_size) | |
2707 | { | |
2708 | regcache_cooked_write (regcache, S390_R2_REGNUM, in); | |
43af2100 | 2709 | regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size); |
b0cf273e JB |
2710 | } |
2711 | else | |
e2e0b3e5 | 2712 | internal_error (__FILE__, __LINE__, _("invalid return type")); |
b0cf273e JB |
2713 | break; |
2714 | ||
2715 | case RETURN_VALUE_STRUCT_CONVENTION: | |
8a3fe4f8 | 2716 | error (_("Cannot set function return value.")); |
b0cf273e JB |
2717 | break; |
2718 | } | |
2719 | } | |
2720 | else if (out) | |
2721 | { | |
2722 | switch (rvc) | |
2723 | { | |
2724 | case RETURN_VALUE_REGISTER_CONVENTION: | |
a16b8bcd UW |
2725 | if (TYPE_CODE (type) == TYPE_CODE_FLT |
2726 | || TYPE_CODE (type) == TYPE_CODE_DECFLOAT) | |
b0cf273e JB |
2727 | { |
2728 | /* When we store a single-precision value in an FP register, | |
2729 | it occupies the leftmost bits. */ | |
34201ae3 | 2730 | regcache_cooked_read_part (regcache, S390_F0_REGNUM, |
b0cf273e JB |
2731 | 0, length, out); |
2732 | } | |
2733 | else if (length <= word_size) | |
2734 | { | |
2735 | /* Integer arguments occupy the rightmost bits. */ | |
34201ae3 | 2736 | regcache_cooked_read_part (regcache, S390_R2_REGNUM, |
b0cf273e JB |
2737 | word_size - length, length, out); |
2738 | } | |
2739 | else if (length == 2*word_size) | |
2740 | { | |
2741 | regcache_cooked_read (regcache, S390_R2_REGNUM, out); | |
43af2100 | 2742 | regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size); |
b0cf273e JB |
2743 | } |
2744 | else | |
e2e0b3e5 | 2745 | internal_error (__FILE__, __LINE__, _("invalid return type")); |
b0cf273e | 2746 | break; |
5769d3cd | 2747 | |
b0cf273e | 2748 | case RETURN_VALUE_STRUCT_CONVENTION: |
8a3fe4f8 | 2749 | error (_("Function return value unknown.")); |
b0cf273e JB |
2750 | break; |
2751 | } | |
2752 | } | |
2753 | ||
2754 | return rvc; | |
2755 | } | |
5769d3cd AC |
2756 | |
2757 | ||
a8c99f38 JB |
2758 | /* Breakpoints. */ |
2759 | ||
43af2100 | 2760 | static const gdb_byte * |
c378eb4e MS |
2761 | s390_breakpoint_from_pc (struct gdbarch *gdbarch, |
2762 | CORE_ADDR *pcptr, int *lenptr) | |
5769d3cd | 2763 | { |
43af2100 | 2764 | static const gdb_byte breakpoint[] = { 0x0, 0x1 }; |
5769d3cd AC |
2765 | |
2766 | *lenptr = sizeof (breakpoint); | |
2767 | return breakpoint; | |
2768 | } | |
2769 | ||
5769d3cd | 2770 | |
a8c99f38 | 2771 | /* Address handling. */ |
5769d3cd AC |
2772 | |
2773 | static CORE_ADDR | |
24568a2c | 2774 | s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr) |
5769d3cd | 2775 | { |
a8c99f38 | 2776 | return addr & 0x7fffffff; |
5769d3cd AC |
2777 | } |
2778 | ||
ffc65945 KB |
2779 | static int |
2780 | s390_address_class_type_flags (int byte_size, int dwarf2_addr_class) | |
2781 | { | |
2782 | if (byte_size == 4) | |
119ac181 | 2783 | return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; |
ffc65945 KB |
2784 | else |
2785 | return 0; | |
2786 | } | |
2787 | ||
2788 | static const char * | |
2789 | s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags) | |
2790 | { | |
119ac181 | 2791 | if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1) |
ffc65945 KB |
2792 | return "mode32"; |
2793 | else | |
2794 | return NULL; | |
2795 | } | |
2796 | ||
a78f21af | 2797 | static int |
c378eb4e MS |
2798 | s390_address_class_name_to_type_flags (struct gdbarch *gdbarch, |
2799 | const char *name, | |
ffc65945 KB |
2800 | int *type_flags_ptr) |
2801 | { | |
2802 | if (strcmp (name, "mode32") == 0) | |
2803 | { | |
119ac181 | 2804 | *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1; |
ffc65945 KB |
2805 | return 1; |
2806 | } | |
2807 | else | |
2808 | return 0; | |
2809 | } | |
2810 | ||
55aa24fb SDJ |
2811 | /* Implementation of `gdbarch_stap_is_single_operand', as defined in |
2812 | gdbarch.h. */ | |
2813 | ||
2814 | static int | |
2815 | s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s) | |
2816 | { | |
2817 | return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement | |
2818 | or indirection. */ | |
2819 | || *s == '%' /* Register access. */ | |
2820 | || isdigit (*s)); /* Literal number. */ | |
2821 | } | |
2822 | ||
a8c99f38 JB |
2823 | /* Set up gdbarch struct. */ |
2824 | ||
a78f21af | 2825 | static struct gdbarch * |
5769d3cd AC |
2826 | s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) |
2827 | { | |
7803799a UW |
2828 | const struct target_desc *tdesc = info.target_desc; |
2829 | struct tdesc_arch_data *tdesc_data = NULL; | |
5769d3cd AC |
2830 | struct gdbarch *gdbarch; |
2831 | struct gdbarch_tdep *tdep; | |
7803799a UW |
2832 | int tdep_abi; |
2833 | int have_upper = 0; | |
c642a434 UW |
2834 | int have_linux_v1 = 0; |
2835 | int have_linux_v2 = 0; | |
5aa82d05 | 2836 | int have_tdb = 0; |
7803799a | 2837 | int first_pseudo_reg, last_pseudo_reg; |
05c0465e SDJ |
2838 | static const char *const stap_register_prefixes[] = { "%", NULL }; |
2839 | static const char *const stap_register_indirection_prefixes[] = { "(", | |
2840 | NULL }; | |
2841 | static const char *const stap_register_indirection_suffixes[] = { ")", | |
2842 | NULL }; | |
7803799a UW |
2843 | |
2844 | /* Default ABI and register size. */ | |
2845 | switch (info.bfd_arch_info->mach) | |
2846 | { | |
2847 | case bfd_mach_s390_31: | |
2848 | tdep_abi = ABI_LINUX_S390; | |
2849 | break; | |
2850 | ||
2851 | case bfd_mach_s390_64: | |
2852 | tdep_abi = ABI_LINUX_ZSERIES; | |
2853 | break; | |
2854 | ||
2855 | default: | |
2856 | return NULL; | |
2857 | } | |
2858 | ||
2859 | /* Use default target description if none provided by the target. */ | |
2860 | if (!tdesc_has_registers (tdesc)) | |
2861 | { | |
2862 | if (tdep_abi == ABI_LINUX_S390) | |
2863 | tdesc = tdesc_s390_linux32; | |
2864 | else | |
2865 | tdesc = tdesc_s390x_linux64; | |
2866 | } | |
2867 | ||
2868 | /* Check any target description for validity. */ | |
2869 | if (tdesc_has_registers (tdesc)) | |
2870 | { | |
2871 | static const char *const gprs[] = { | |
2872 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
2873 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" | |
2874 | }; | |
2875 | static const char *const fprs[] = { | |
2876 | "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", | |
2877 | "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15" | |
2878 | }; | |
2879 | static const char *const acrs[] = { | |
2880 | "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7", | |
2881 | "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15" | |
2882 | }; | |
2883 | static const char *const gprs_lower[] = { | |
2884 | "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l", | |
2885 | "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l" | |
2886 | }; | |
2887 | static const char *const gprs_upper[] = { | |
2888 | "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h", | |
2889 | "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h" | |
2890 | }; | |
4ac33720 UW |
2891 | static const char *const tdb_regs[] = { |
2892 | "tdb0", "tac", "tct", "atia", | |
2893 | "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7", | |
2894 | "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15" | |
2895 | }; | |
7803799a UW |
2896 | const struct tdesc_feature *feature; |
2897 | int i, valid_p = 1; | |
2898 | ||
2899 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core"); | |
2900 | if (feature == NULL) | |
2901 | return NULL; | |
2902 | ||
2903 | tdesc_data = tdesc_data_alloc (); | |
2904 | ||
2905 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2906 | S390_PSWM_REGNUM, "pswm"); | |
2907 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2908 | S390_PSWA_REGNUM, "pswa"); | |
2909 | ||
2910 | if (tdesc_unnumbered_register (feature, "r0")) | |
2911 | { | |
2912 | for (i = 0; i < 16; i++) | |
2913 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2914 | S390_R0_REGNUM + i, gprs[i]); | |
2915 | } | |
2916 | else | |
2917 | { | |
2918 | have_upper = 1; | |
2919 | ||
2920 | for (i = 0; i < 16; i++) | |
2921 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2922 | S390_R0_REGNUM + i, | |
2923 | gprs_lower[i]); | |
2924 | for (i = 0; i < 16; i++) | |
2925 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2926 | S390_R0_UPPER_REGNUM + i, | |
2927 | gprs_upper[i]); | |
2928 | } | |
2929 | ||
2930 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr"); | |
2931 | if (feature == NULL) | |
2932 | { | |
2933 | tdesc_data_cleanup (tdesc_data); | |
2934 | return NULL; | |
2935 | } | |
2936 | ||
2937 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2938 | S390_FPC_REGNUM, "fpc"); | |
2939 | for (i = 0; i < 16; i++) | |
2940 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2941 | S390_F0_REGNUM + i, fprs[i]); | |
5769d3cd | 2942 | |
7803799a UW |
2943 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr"); |
2944 | if (feature == NULL) | |
2945 | { | |
2946 | tdesc_data_cleanup (tdesc_data); | |
2947 | return NULL; | |
2948 | } | |
2949 | ||
2950 | for (i = 0; i < 16; i++) | |
2951 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2952 | S390_A0_REGNUM + i, acrs[i]); | |
2953 | ||
94eae614 | 2954 | /* Optional GNU/Linux-specific "registers". */ |
c642a434 UW |
2955 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux"); |
2956 | if (feature) | |
2957 | { | |
2958 | tdesc_numbered_register (feature, tdesc_data, | |
2959 | S390_ORIG_R2_REGNUM, "orig_r2"); | |
2960 | ||
2961 | if (tdesc_numbered_register (feature, tdesc_data, | |
2962 | S390_LAST_BREAK_REGNUM, "last_break")) | |
2963 | have_linux_v1 = 1; | |
2964 | ||
2965 | if (tdesc_numbered_register (feature, tdesc_data, | |
2966 | S390_SYSTEM_CALL_REGNUM, "system_call")) | |
2967 | have_linux_v2 = 1; | |
2968 | ||
2969 | if (have_linux_v2 > have_linux_v1) | |
2970 | valid_p = 0; | |
2971 | } | |
2972 | ||
4ac33720 UW |
2973 | /* Transaction diagnostic block. */ |
2974 | feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb"); | |
2975 | if (feature) | |
2976 | { | |
2977 | for (i = 0; i < ARRAY_SIZE (tdb_regs); i++) | |
2978 | valid_p &= tdesc_numbered_register (feature, tdesc_data, | |
2979 | S390_TDB_DWORD0_REGNUM + i, | |
2980 | tdb_regs[i]); | |
5aa82d05 | 2981 | have_tdb = 1; |
4ac33720 UW |
2982 | } |
2983 | ||
7803799a UW |
2984 | if (!valid_p) |
2985 | { | |
2986 | tdesc_data_cleanup (tdesc_data); | |
2987 | return NULL; | |
2988 | } | |
2989 | } | |
5769d3cd | 2990 | |
7803799a UW |
2991 | /* Find a candidate among extant architectures. */ |
2992 | for (arches = gdbarch_list_lookup_by_info (arches, &info); | |
2993 | arches != NULL; | |
2994 | arches = gdbarch_list_lookup_by_info (arches->next, &info)) | |
2995 | { | |
2996 | tdep = gdbarch_tdep (arches->gdbarch); | |
2997 | if (!tdep) | |
2998 | continue; | |
2999 | if (tdep->abi != tdep_abi) | |
3000 | continue; | |
3001 | if ((tdep->gpr_full_regnum != -1) != have_upper) | |
3002 | continue; | |
3003 | if (tdesc_data != NULL) | |
3004 | tdesc_data_cleanup (tdesc_data); | |
3005 | return arches->gdbarch; | |
3006 | } | |
5769d3cd | 3007 | |
7803799a | 3008 | /* Otherwise create a new gdbarch for the specified machine type. */ |
fc270c35 | 3009 | tdep = XCNEW (struct gdbarch_tdep); |
7803799a | 3010 | tdep->abi = tdep_abi; |
5aa82d05 AA |
3011 | tdep->have_linux_v1 = have_linux_v1; |
3012 | tdep->have_linux_v2 = have_linux_v2; | |
3013 | tdep->have_tdb = have_tdb; | |
d0f54f9d | 3014 | gdbarch = gdbarch_alloc (&info, tdep); |
5769d3cd AC |
3015 | |
3016 | set_gdbarch_believe_pcc_promotion (gdbarch, 0); | |
4e409299 | 3017 | set_gdbarch_char_signed (gdbarch, 0); |
5769d3cd | 3018 | |
1de90795 UW |
3019 | /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles. |
3020 | We can safely let them default to 128-bit, since the debug info | |
3021 | will give the size of type actually used in each case. */ | |
3022 | set_gdbarch_long_double_bit (gdbarch, 128); | |
3023 | set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad); | |
3024 | ||
aaab4dba | 3025 | /* Amount PC must be decremented by after a breakpoint. This is |
3b3b875c | 3026 | often the number of bytes returned by gdbarch_breakpoint_from_pc but not |
aaab4dba | 3027 | always. */ |
5769d3cd | 3028 | set_gdbarch_decr_pc_after_break (gdbarch, 2); |
5769d3cd AC |
3029 | /* Stack grows downward. */ |
3030 | set_gdbarch_inner_than (gdbarch, core_addr_lessthan); | |
5769d3cd AC |
3031 | set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc); |
3032 | set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue); | |
d0f54f9d | 3033 | set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p); |
a8c99f38 | 3034 | |
7803799a | 3035 | set_gdbarch_num_regs (gdbarch, S390_NUM_REGS); |
5769d3cd | 3036 | set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM); |
d0f54f9d | 3037 | set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM); |
d0f54f9d | 3038 | set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); |
d0f54f9d | 3039 | set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum); |
9acbedc0 | 3040 | set_gdbarch_value_from_register (gdbarch, s390_value_from_register); |
7803799a | 3041 | set_gdbarch_core_read_description (gdbarch, s390_core_read_description); |
5aa82d05 AA |
3042 | set_gdbarch_iterate_over_regset_sections (gdbarch, |
3043 | s390_iterate_over_regset_sections); | |
c642a434 UW |
3044 | set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register); |
3045 | set_gdbarch_write_pc (gdbarch, s390_write_pc); | |
7803799a UW |
3046 | set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read); |
3047 | set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write); | |
3048 | set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name); | |
3049 | set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type); | |
3050 | set_tdesc_pseudo_register_reggroup_p (gdbarch, | |
34201ae3 | 3051 | s390_pseudo_register_reggroup_p); |
7803799a UW |
3052 | tdesc_use_registers (gdbarch, tdesc, tdesc_data); |
3053 | ||
3054 | /* Assign pseudo register numbers. */ | |
3055 | first_pseudo_reg = gdbarch_num_regs (gdbarch); | |
3056 | last_pseudo_reg = first_pseudo_reg; | |
3057 | tdep->gpr_full_regnum = -1; | |
3058 | if (have_upper) | |
3059 | { | |
3060 | tdep->gpr_full_regnum = last_pseudo_reg; | |
3061 | last_pseudo_reg += 16; | |
3062 | } | |
3063 | tdep->pc_regnum = last_pseudo_reg++; | |
3064 | tdep->cc_regnum = last_pseudo_reg++; | |
3065 | set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum); | |
3066 | set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg); | |
5769d3cd | 3067 | |
b0cf273e JB |
3068 | /* Inferior function calls. */ |
3069 | set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call); | |
f089c433 | 3070 | set_gdbarch_dummy_id (gdbarch, s390_dummy_id); |
4074e13c | 3071 | set_gdbarch_frame_align (gdbarch, s390_frame_align); |
b0cf273e | 3072 | set_gdbarch_return_value (gdbarch, s390_return_value); |
5769d3cd | 3073 | |
237b092b AA |
3074 | /* Syscall handling. */ |
3075 | set_gdbarch_get_syscall_number (gdbarch, s390_linux_get_syscall_number); | |
3076 | ||
a8c99f38 | 3077 | /* Frame handling. */ |
a431654a | 3078 | dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg); |
7803799a | 3079 | dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum); |
f089c433 | 3080 | dwarf2_append_unwinders (gdbarch); |
a431654a | 3081 | frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer); |
f089c433 UW |
3082 | frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind); |
3083 | frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind); | |
3084 | frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind); | |
a8c99f38 JB |
3085 | frame_base_set_default (gdbarch, &s390_frame_base); |
3086 | set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc); | |
3087 | set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp); | |
3088 | ||
1db4e8a0 UW |
3089 | /* Displaced stepping. */ |
3090 | set_gdbarch_displaced_step_copy_insn (gdbarch, | |
34201ae3 | 3091 | simple_displaced_step_copy_insn); |
1db4e8a0 UW |
3092 | set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup); |
3093 | set_gdbarch_displaced_step_free_closure (gdbarch, | |
34201ae3 | 3094 | simple_displaced_step_free_closure); |
1db4e8a0 | 3095 | set_gdbarch_displaced_step_location (gdbarch, |
34201ae3 | 3096 | displaced_step_at_entry_point); |
1db4e8a0 UW |
3097 | set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE); |
3098 | ||
70728992 PA |
3099 | /* Note that GNU/Linux is the only OS supported on this |
3100 | platform. */ | |
3101 | linux_init_abi (info, gdbarch); | |
3102 | ||
7803799a | 3103 | switch (tdep->abi) |
5769d3cd | 3104 | { |
7803799a | 3105 | case ABI_LINUX_S390: |
5769d3cd | 3106 | set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove); |
76a9d10f MK |
3107 | set_solib_svr4_fetch_link_map_offsets |
3108 | (gdbarch, svr4_ilp32_fetch_link_map_offsets); | |
c642a434 | 3109 | |
237b092b | 3110 | set_xml_syscall_file_name (XML_SYSCALL_FILENAME_S390); |
5769d3cd | 3111 | break; |
b0cf273e | 3112 | |
7803799a | 3113 | case ABI_LINUX_ZSERIES: |
5769d3cd AC |
3114 | set_gdbarch_long_bit (gdbarch, 64); |
3115 | set_gdbarch_long_long_bit (gdbarch, 64); | |
3116 | set_gdbarch_ptr_bit (gdbarch, 64); | |
76a9d10f MK |
3117 | set_solib_svr4_fetch_link_map_offsets |
3118 | (gdbarch, svr4_lp64_fetch_link_map_offsets); | |
ffc65945 | 3119 | set_gdbarch_address_class_type_flags (gdbarch, |
34201ae3 | 3120 | s390_address_class_type_flags); |
ffc65945 | 3121 | set_gdbarch_address_class_type_flags_to_name (gdbarch, |
34201ae3 | 3122 | s390_address_class_type_flags_to_name); |
ffc65945 | 3123 | set_gdbarch_address_class_name_to_type_flags (gdbarch, |
34201ae3 | 3124 | s390_address_class_name_to_type_flags); |
237b092b | 3125 | set_xml_syscall_file_name (XML_SYSCALL_FILENAME_S390); |
5769d3cd AC |
3126 | break; |
3127 | } | |
3128 | ||
36482093 AC |
3129 | set_gdbarch_print_insn (gdbarch, print_insn_s390); |
3130 | ||
982e9687 UW |
3131 | set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target); |
3132 | ||
b2756930 KB |
3133 | /* Enable TLS support. */ |
3134 | set_gdbarch_fetch_tls_load_module_address (gdbarch, | |
34201ae3 | 3135 | svr4_fetch_objfile_link_map); |
b2756930 | 3136 | |
1dd635ac UW |
3137 | set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type); |
3138 | ||
55aa24fb | 3139 | /* SystemTap functions. */ |
05c0465e SDJ |
3140 | set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes); |
3141 | set_gdbarch_stap_register_indirection_prefixes (gdbarch, | |
3142 | stap_register_indirection_prefixes); | |
3143 | set_gdbarch_stap_register_indirection_suffixes (gdbarch, | |
3144 | stap_register_indirection_suffixes); | |
55aa24fb SDJ |
3145 | set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand); |
3146 | ||
5769d3cd AC |
3147 | return gdbarch; |
3148 | } | |
3149 | ||
3150 | ||
a78f21af AC |
3151 | extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */ |
3152 | ||
5769d3cd | 3153 | void |
5ae5f592 | 3154 | _initialize_s390_tdep (void) |
5769d3cd | 3155 | { |
5769d3cd AC |
3156 | /* Hook us into the gdbarch mechanism. */ |
3157 | register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init); | |
7803799a | 3158 | |
94eae614 | 3159 | /* Initialize the GNU/Linux target descriptions. */ |
7803799a | 3160 | initialize_tdesc_s390_linux32 (); |
c642a434 UW |
3161 | initialize_tdesc_s390_linux32v1 (); |
3162 | initialize_tdesc_s390_linux32v2 (); | |
7803799a | 3163 | initialize_tdesc_s390_linux64 (); |
c642a434 UW |
3164 | initialize_tdesc_s390_linux64v1 (); |
3165 | initialize_tdesc_s390_linux64v2 (); | |
4ac33720 | 3166 | initialize_tdesc_s390_te_linux64 (); |
7803799a | 3167 | initialize_tdesc_s390x_linux64 (); |
c642a434 UW |
3168 | initialize_tdesc_s390x_linux64v1 (); |
3169 | initialize_tdesc_s390x_linux64v2 (); | |
4ac33720 | 3170 | initialize_tdesc_s390x_te_linux64 (); |
5769d3cd | 3171 | } |