S390: Add target descriptions for vector register sets
[deliverable/binutils-gdb.git] / gdb / s390-linux-tdep.c
CommitLineData
5769d3cd 1/* Target-dependent code for GDB, the GNU debugger.
ca557f44 2
32d0add0 3 Copyright (C) 2001-2015 Free Software Foundation, Inc.
ca557f44 4
5769d3cd
AC
5 Contributed by D.J. Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
6 for IBM Deutschland Entwicklung GmbH, IBM Corporation.
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
a9762ec7 12 the Free Software Foundation; either version 3 of the License, or
5769d3cd
AC
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
a9762ec7 21 along with this program. If not, see <http://www.gnu.org/licenses/>. */
5769d3cd 22
d0f54f9d 23#include "defs.h"
5769d3cd
AC
24#include "arch-utils.h"
25#include "frame.h"
26#include "inferior.h"
45741a9c 27#include "infrun.h"
5769d3cd
AC
28#include "symtab.h"
29#include "target.h"
30#include "gdbcore.h"
31#include "gdbcmd.h"
5769d3cd 32#include "objfiles.h"
5769d3cd
AC
33#include "floatformat.h"
34#include "regcache.h"
a8c99f38
JB
35#include "trad-frame.h"
36#include "frame-base.h"
37#include "frame-unwind.h"
a431654a 38#include "dwarf2-frame.h"
d0f54f9d
JB
39#include "reggroups.h"
40#include "regset.h"
fd0407d6 41#include "value.h"
a89aa300 42#include "dis-asm.h"
76a9d10f 43#include "solib-svr4.h"
3fc46200 44#include "prologue-value.h"
70728992 45#include "linux-tdep.h"
0e5fae36 46#include "s390-linux-tdep.h"
4ac33720 47#include "auxv.h"
237b092b 48#include "xml-syscall.h"
5769d3cd 49
55aa24fb
SDJ
50#include "stap-probe.h"
51#include "ax.h"
52#include "ax-gdb.h"
53#include "user-regs.h"
54#include "cli/cli-utils.h"
55#include <ctype.h>
04a83fee 56#include "elf/common.h"
55aa24fb 57
7803799a 58#include "features/s390-linux32.c"
c642a434
UW
59#include "features/s390-linux32v1.c"
60#include "features/s390-linux32v2.c"
7803799a 61#include "features/s390-linux64.c"
c642a434
UW
62#include "features/s390-linux64v1.c"
63#include "features/s390-linux64v2.c"
4ac33720 64#include "features/s390-te-linux64.c"
7803799a 65#include "features/s390x-linux64.c"
c642a434
UW
66#include "features/s390x-linux64v1.c"
67#include "features/s390x-linux64v2.c"
4ac33720 68#include "features/s390x-te-linux64.c"
7803799a 69
237b092b
AA
70#define XML_SYSCALL_FILENAME_S390 "syscalls/s390-linux.xml"
71#define XML_SYSCALL_FILENAME_S390X "syscalls/s390x-linux.xml"
72
52059ffd
TT
73enum s390_abi_kind
74{
75 ABI_LINUX_S390,
76 ABI_LINUX_ZSERIES
77};
78
d0f54f9d
JB
79/* The tdep structure. */
80
81struct gdbarch_tdep
5769d3cd 82{
b0cf273e 83 /* ABI version. */
52059ffd 84 enum s390_abi_kind abi;
b0cf273e 85
7803799a
UW
86 /* Pseudo register numbers. */
87 int gpr_full_regnum;
88 int pc_regnum;
89 int cc_regnum;
90
5aa82d05
AA
91 int have_linux_v1;
92 int have_linux_v2;
93 int have_tdb;
d0f54f9d
JB
94};
95
96
7803799a
UW
97/* ABI call-saved register information. */
98
99static int
100s390_register_call_saved (struct gdbarch *gdbarch, int regnum)
d0f54f9d 101{
7803799a
UW
102 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
103
104 switch (tdep->abi)
6707b003 105 {
7803799a
UW
106 case ABI_LINUX_S390:
107 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
108 || regnum == S390_F4_REGNUM || regnum == S390_F6_REGNUM
109 || regnum == S390_A0_REGNUM)
110 return 1;
6707b003 111
7803799a
UW
112 break;
113
114 case ABI_LINUX_ZSERIES:
115 if ((regnum >= S390_R6_REGNUM && regnum <= S390_R15_REGNUM)
116 || (regnum >= S390_F8_REGNUM && regnum <= S390_F15_REGNUM)
117 || (regnum >= S390_A0_REGNUM && regnum <= S390_A1_REGNUM))
118 return 1;
119
120 break;
121 }
122
123 return 0;
5769d3cd
AC
124}
125
c642a434
UW
126static int
127s390_cannot_store_register (struct gdbarch *gdbarch, int regnum)
128{
129 /* The last-break address is read-only. */
130 return regnum == S390_LAST_BREAK_REGNUM;
131}
132
133static void
134s390_write_pc (struct regcache *regcache, CORE_ADDR pc)
135{
136 struct gdbarch *gdbarch = get_regcache_arch (regcache);
137 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
138
139 regcache_cooked_write_unsigned (regcache, tdep->pc_regnum, pc);
140
141 /* Set special SYSTEM_CALL register to 0 to prevent the kernel from
142 messing with the PC we just installed, if we happen to be within
143 an interrupted system call that the kernel wants to restart.
144
145 Note that after we return from the dummy call, the SYSTEM_CALL and
146 ORIG_R2 registers will be automatically restored, and the kernel
147 continues to restart the system call at this point. */
148 if (register_size (gdbarch, S390_SYSTEM_CALL_REGNUM) > 0)
149 regcache_cooked_write_unsigned (regcache, S390_SYSTEM_CALL_REGNUM, 0);
150}
151
7803799a 152
d0f54f9d
JB
153/* DWARF Register Mapping. */
154
2ccd1468 155static const short s390_dwarf_regmap[] =
d0f54f9d
JB
156{
157 /* General Purpose Registers. */
158 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
159 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
160 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
161 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
162
163 /* Floating Point Registers. */
164 S390_F0_REGNUM, S390_F2_REGNUM, S390_F4_REGNUM, S390_F6_REGNUM,
165 S390_F1_REGNUM, S390_F3_REGNUM, S390_F5_REGNUM, S390_F7_REGNUM,
166 S390_F8_REGNUM, S390_F10_REGNUM, S390_F12_REGNUM, S390_F14_REGNUM,
167 S390_F9_REGNUM, S390_F11_REGNUM, S390_F13_REGNUM, S390_F15_REGNUM,
168
169 /* Control Registers (not mapped). */
34201ae3
UW
170 -1, -1, -1, -1, -1, -1, -1, -1,
171 -1, -1, -1, -1, -1, -1, -1, -1,
d0f54f9d
JB
172
173 /* Access Registers. */
174 S390_A0_REGNUM, S390_A1_REGNUM, S390_A2_REGNUM, S390_A3_REGNUM,
175 S390_A4_REGNUM, S390_A5_REGNUM, S390_A6_REGNUM, S390_A7_REGNUM,
176 S390_A8_REGNUM, S390_A9_REGNUM, S390_A10_REGNUM, S390_A11_REGNUM,
177 S390_A12_REGNUM, S390_A13_REGNUM, S390_A14_REGNUM, S390_A15_REGNUM,
178
179 /* Program Status Word. */
180 S390_PSWM_REGNUM,
7803799a
UW
181 S390_PSWA_REGNUM,
182
183 /* GPR Lower Half Access. */
184 S390_R0_REGNUM, S390_R1_REGNUM, S390_R2_REGNUM, S390_R3_REGNUM,
185 S390_R4_REGNUM, S390_R5_REGNUM, S390_R6_REGNUM, S390_R7_REGNUM,
186 S390_R8_REGNUM, S390_R9_REGNUM, S390_R10_REGNUM, S390_R11_REGNUM,
187 S390_R12_REGNUM, S390_R13_REGNUM, S390_R14_REGNUM, S390_R15_REGNUM,
c642a434 188
94eae614 189 /* GNU/Linux-specific registers (not mapped). */
c642a434 190 -1, -1, -1,
d0f54f9d
JB
191};
192
193/* Convert DWARF register number REG to the appropriate register
194 number used by GDB. */
a78f21af 195static int
d3f73121 196s390_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int reg)
d0f54f9d 197{
7803799a
UW
198 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
199
200 /* In a 32-on-64 debug scenario, debug info refers to the full 64-bit
201 GPRs. Note that call frame information still refers to the 32-bit
202 lower halves, because s390_adjust_frame_regnum uses register numbers
203 66 .. 81 to access GPRs. */
204 if (tdep->gpr_full_regnum != -1 && reg >= 0 && reg < 16)
205 return tdep->gpr_full_regnum + reg;
d0f54f9d 206
16aff9a6 207 if (reg >= 0 && reg < ARRAY_SIZE (s390_dwarf_regmap))
7803799a 208 return s390_dwarf_regmap[reg];
d0f54f9d 209
7803799a
UW
210 warning (_("Unmapped DWARF Register #%d encountered."), reg);
211 return -1;
212}
d0f54f9d 213
7803799a
UW
214/* Translate a .eh_frame register to DWARF register, or adjust a
215 .debug_frame register. */
216static int
217s390_adjust_frame_regnum (struct gdbarch *gdbarch, int num, int eh_frame_p)
218{
219 /* See s390_dwarf_reg_to_regnum for comments. */
220 return (num >= 0 && num < 16)? num + 66 : num;
d0f54f9d
JB
221}
222
d0f54f9d 223
7803799a
UW
224/* Pseudo registers. */
225
2ccd1468
UW
226static int
227regnum_is_gpr_full (struct gdbarch_tdep *tdep, int regnum)
228{
229 return (tdep->gpr_full_regnum != -1
230 && regnum >= tdep->gpr_full_regnum
231 && regnum <= tdep->gpr_full_regnum + 15);
232}
233
7803799a
UW
234static const char *
235s390_pseudo_register_name (struct gdbarch *gdbarch, int regnum)
d0f54f9d 236{
7803799a 237 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 238
7803799a
UW
239 if (regnum == tdep->pc_regnum)
240 return "pc";
d0f54f9d 241
7803799a
UW
242 if (regnum == tdep->cc_regnum)
243 return "cc";
d0f54f9d 244
2ccd1468 245 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
246 {
247 static const char *full_name[] = {
248 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
249 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
250 };
251 return full_name[regnum - tdep->gpr_full_regnum];
d0f54f9d 252 }
7803799a
UW
253
254 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
255}
256
7803799a
UW
257static struct type *
258s390_pseudo_register_type (struct gdbarch *gdbarch, int regnum)
5769d3cd 259{
7803799a 260 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
d0f54f9d 261
7803799a
UW
262 if (regnum == tdep->pc_regnum)
263 return builtin_type (gdbarch)->builtin_func_ptr;
d0f54f9d 264
7803799a
UW
265 if (regnum == tdep->cc_regnum)
266 return builtin_type (gdbarch)->builtin_int;
d0f54f9d 267
2ccd1468 268 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
269 return builtin_type (gdbarch)->builtin_uint64;
270
271 internal_error (__FILE__, __LINE__, _("invalid regnum"));
5769d3cd
AC
272}
273
05d1431c 274static enum register_status
7803799a
UW
275s390_pseudo_register_read (struct gdbarch *gdbarch, struct regcache *regcache,
276 int regnum, gdb_byte *buf)
d0f54f9d 277{
7803799a 278 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 279 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 280 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
281 ULONGEST val;
282
7803799a 283 if (regnum == tdep->pc_regnum)
d0f54f9d 284 {
05d1431c
PA
285 enum register_status status;
286
287 status = regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &val);
288 if (status == REG_VALID)
289 {
290 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
291 val &= 0x7fffffff;
292 store_unsigned_integer (buf, regsize, byte_order, val);
293 }
294 return status;
7803799a 295 }
d0f54f9d 296
7803799a
UW
297 if (regnum == tdep->cc_regnum)
298 {
05d1431c
PA
299 enum register_status status;
300
301 status = regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &val);
302 if (status == REG_VALID)
303 {
304 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
305 val = (val >> 12) & 3;
306 else
307 val = (val >> 44) & 3;
308 store_unsigned_integer (buf, regsize, byte_order, val);
309 }
310 return status;
7803799a 311 }
d0f54f9d 312
2ccd1468 313 if (regnum_is_gpr_full (tdep, regnum))
7803799a 314 {
05d1431c 315 enum register_status status;
7803799a 316 ULONGEST val_upper;
05d1431c 317
7803799a
UW
318 regnum -= tdep->gpr_full_regnum;
319
05d1431c
PA
320 status = regcache_raw_read_unsigned (regcache, S390_R0_REGNUM + regnum, &val);
321 if (status == REG_VALID)
322 status = regcache_raw_read_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
323 &val_upper);
324 if (status == REG_VALID)
325 {
326 val |= val_upper << 32;
327 store_unsigned_integer (buf, regsize, byte_order, val);
328 }
329 return status;
d0f54f9d 330 }
7803799a
UW
331
332 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
333}
334
335static void
7803799a
UW
336s390_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
337 int regnum, const gdb_byte *buf)
d0f54f9d 338{
7803799a 339 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
e17a4113 340 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
7803799a 341 int regsize = register_size (gdbarch, regnum);
d0f54f9d
JB
342 ULONGEST val, psw;
343
7803799a 344 if (regnum == tdep->pc_regnum)
d0f54f9d 345 {
7803799a
UW
346 val = extract_unsigned_integer (buf, regsize, byte_order);
347 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
348 {
349 regcache_raw_read_unsigned (regcache, S390_PSWA_REGNUM, &psw);
350 val = (psw & 0x80000000) | (val & 0x7fffffff);
351 }
352 regcache_raw_write_unsigned (regcache, S390_PSWA_REGNUM, val);
353 return;
354 }
d0f54f9d 355
7803799a
UW
356 if (regnum == tdep->cc_regnum)
357 {
358 val = extract_unsigned_integer (buf, regsize, byte_order);
d0f54f9d 359 regcache_raw_read_unsigned (regcache, S390_PSWM_REGNUM, &psw);
7803799a
UW
360 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
361 val = (psw & ~((ULONGEST)3 << 12)) | ((val & 3) << 12);
362 else
363 val = (psw & ~((ULONGEST)3 << 44)) | ((val & 3) << 44);
364 regcache_raw_write_unsigned (regcache, S390_PSWM_REGNUM, val);
365 return;
366 }
d0f54f9d 367
2ccd1468 368 if (regnum_is_gpr_full (tdep, regnum))
7803799a
UW
369 {
370 regnum -= tdep->gpr_full_regnum;
371 val = extract_unsigned_integer (buf, regsize, byte_order);
372 regcache_raw_write_unsigned (regcache, S390_R0_REGNUM + regnum,
373 val & 0xffffffff);
374 regcache_raw_write_unsigned (regcache, S390_R0_UPPER_REGNUM + regnum,
375 val >> 32);
376 return;
d0f54f9d 377 }
7803799a
UW
378
379 internal_error (__FILE__, __LINE__, _("invalid regnum"));
d0f54f9d
JB
380}
381
382/* 'float' values are stored in the upper half of floating-point
383 registers, even though we are otherwise a big-endian platform. */
384
9acbedc0 385static struct value *
2ed3c037
UW
386s390_value_from_register (struct gdbarch *gdbarch, struct type *type,
387 int regnum, struct frame_id frame_id)
d0f54f9d 388{
2ed3c037
UW
389 struct value *value = default_value_from_register (gdbarch, type,
390 regnum, frame_id);
744a8059
SP
391 check_typedef (type);
392
393 if (regnum >= S390_F0_REGNUM && regnum <= S390_F15_REGNUM
394 && TYPE_LENGTH (type) < 8)
9acbedc0 395 set_value_offset (value, 0);
d0f54f9d 396
9acbedc0 397 return value;
d0f54f9d
JB
398}
399
400/* Register groups. */
401
a78f21af 402static int
7803799a
UW
403s390_pseudo_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
404 struct reggroup *group)
d0f54f9d
JB
405{
406 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
407
d6db1fab
UW
408 /* We usually save/restore the whole PSW, which includes PC and CC.
409 However, some older gdbservers may not support saving/restoring
410 the whole PSW yet, and will return an XML register description
411 excluding those from the save/restore register groups. In those
412 cases, we still need to explicitly save/restore PC and CC in order
413 to push or pop frames. Since this doesn't hurt anything if we
414 already save/restore the whole PSW (it's just redundant), we add
415 PC and CC at this point unconditionally. */
d0f54f9d 416 if (group == save_reggroup || group == restore_reggroup)
7803799a 417 return regnum == tdep->pc_regnum || regnum == tdep->cc_regnum;
d0f54f9d
JB
418
419 return default_register_reggroup_p (gdbarch, regnum, group);
420}
421
422
2ccd1468 423/* Maps for register sets. */
d0f54f9d 424
99b7da5d 425static const struct regcache_map_entry s390_gregmap[] =
2ccd1468 426 {
99b7da5d
AA
427 { 1, S390_PSWM_REGNUM },
428 { 1, S390_PSWA_REGNUM },
429 { 16, S390_R0_REGNUM },
430 { 16, S390_A0_REGNUM },
431 { 1, S390_ORIG_R2_REGNUM },
432 { 0 }
2ccd1468 433 };
d0f54f9d 434
99b7da5d 435static const struct regcache_map_entry s390_fpregmap[] =
2ccd1468 436 {
99b7da5d
AA
437 { 1, S390_FPC_REGNUM, 8 },
438 { 16, S390_F0_REGNUM, 8 },
439 { 0 }
2ccd1468 440 };
d0f54f9d 441
99b7da5d 442static const struct regcache_map_entry s390_regmap_upper[] =
2ccd1468 443 {
99b7da5d
AA
444 { 16, S390_R0_UPPER_REGNUM, 4 },
445 { 0 }
2ccd1468 446 };
7803799a 447
99b7da5d 448static const struct regcache_map_entry s390_regmap_last_break[] =
2ccd1468 449 {
99b7da5d
AA
450 { 1, REGCACHE_MAP_SKIP, 4 },
451 { 1, S390_LAST_BREAK_REGNUM, 4 },
452 { 0 }
2ccd1468 453 };
c642a434 454
99b7da5d 455static const struct regcache_map_entry s390x_regmap_last_break[] =
2ccd1468 456 {
99b7da5d
AA
457 { 1, S390_LAST_BREAK_REGNUM, 8 },
458 { 0 }
2ccd1468
UW
459 };
460
99b7da5d 461static const struct regcache_map_entry s390_regmap_system_call[] =
2ccd1468 462 {
99b7da5d
AA
463 { 1, S390_SYSTEM_CALL_REGNUM, 4 },
464 { 0 }
2ccd1468
UW
465 };
466
99b7da5d 467static const struct regcache_map_entry s390_regmap_tdb[] =
2ccd1468 468 {
99b7da5d
AA
469 { 1, S390_TDB_DWORD0_REGNUM, 8 },
470 { 1, S390_TDB_ABORT_CODE_REGNUM, 8 },
471 { 1, S390_TDB_CONFLICT_TOKEN_REGNUM, 8 },
472 { 1, S390_TDB_ATIA_REGNUM, 8 },
473 { 12, REGCACHE_MAP_SKIP, 8 },
474 { 16, S390_TDB_R0_REGNUM, 8 },
475 { 0 }
2ccd1468 476 };
c642a434 477
4ac33720 478
99b7da5d
AA
479/* Supply the TDB regset. Like regcache_supply_regset, but invalidate
480 the TDB registers unless the TDB format field is valid. */
4ac33720
UW
481
482static void
483s390_supply_tdb_regset (const struct regset *regset, struct regcache *regcache,
484 int regnum, const void *regs, size_t len)
485{
486 ULONGEST tdw;
487 enum register_status ret;
488 int i;
489
99b7da5d 490 regcache_supply_regset (regset, regcache, regnum, regs, len);
4ac33720
UW
491 ret = regcache_cooked_read_unsigned (regcache, S390_TDB_DWORD0_REGNUM, &tdw);
492 if (ret != REG_VALID || (tdw >> 56) != 1)
99b7da5d 493 regcache_supply_regset (regset, regcache, regnum, NULL, len);
d0f54f9d
JB
494}
495
99b7da5d
AA
496const struct regset s390_gregset = {
497 s390_gregmap,
498 regcache_supply_regset,
499 regcache_collect_regset
d0f54f9d
JB
500};
501
99b7da5d
AA
502const struct regset s390_fpregset = {
503 s390_fpregmap,
504 regcache_supply_regset,
505 regcache_collect_regset
d0f54f9d
JB
506};
507
7803799a 508static const struct regset s390_upper_regset = {
34201ae3 509 s390_regmap_upper,
99b7da5d
AA
510 regcache_supply_regset,
511 regcache_collect_regset
7803799a
UW
512};
513
99b7da5d 514const struct regset s390_last_break_regset = {
c642a434 515 s390_regmap_last_break,
99b7da5d
AA
516 regcache_supply_regset,
517 regcache_collect_regset
c642a434
UW
518};
519
99b7da5d 520const struct regset s390x_last_break_regset = {
c642a434 521 s390x_regmap_last_break,
99b7da5d
AA
522 regcache_supply_regset,
523 regcache_collect_regset
c642a434
UW
524};
525
99b7da5d 526const struct regset s390_system_call_regset = {
c642a434 527 s390_regmap_system_call,
99b7da5d
AA
528 regcache_supply_regset,
529 regcache_collect_regset
c642a434
UW
530};
531
99b7da5d 532const struct regset s390_tdb_regset = {
4ac33720
UW
533 s390_regmap_tdb,
534 s390_supply_tdb_regset,
99b7da5d 535 regcache_collect_regset
4ac33720
UW
536};
537
5aa82d05
AA
538/* Iterate over supported core file register note sections. */
539
540static void
541s390_iterate_over_regset_sections (struct gdbarch *gdbarch,
542 iterate_over_regset_sections_cb *cb,
543 void *cb_data,
544 const struct regcache *regcache)
545{
546 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
8f0435f7
AA
547 const int gregset_size = (tdep->abi == ABI_LINUX_S390 ?
548 s390_sizeof_gregset : s390x_sizeof_gregset);
5aa82d05 549
8f0435f7
AA
550 cb (".reg", gregset_size, &s390_gregset, NULL, cb_data);
551 cb (".reg2", s390_sizeof_fpregset, &s390_fpregset, NULL, cb_data);
5aa82d05
AA
552
553 if (tdep->abi == ABI_LINUX_S390 && tdep->gpr_full_regnum != -1)
8f0435f7
AA
554 cb (".reg-s390-high-gprs", 16 * 4, &s390_upper_regset,
555 "s390 GPR upper halves", cb_data);
5aa82d05
AA
556
557 if (tdep->have_linux_v1)
8f0435f7
AA
558 cb (".reg-s390-last-break", 8,
559 (gdbarch_ptr_bit (gdbarch) == 32
560 ? &s390_last_break_regset : &s390x_last_break_regset),
561 "s930 last-break address", cb_data);
5aa82d05
AA
562
563 if (tdep->have_linux_v2)
8f0435f7
AA
564 cb (".reg-s390-system-call", 4, &s390_system_call_regset,
565 "s390 system-call", cb_data);
5aa82d05
AA
566
567 /* If regcache is set, we are in "write" (gcore) mode. In this
568 case, don't iterate over the TDB unless its registers are
569 available. */
570 if (tdep->have_tdb
571 && (regcache == NULL
572 || REG_VALID == regcache_register_status (regcache,
573 S390_TDB_DWORD0_REGNUM)))
8f0435f7
AA
574 cb (".reg-s390-tdb", s390_sizeof_tdbregset, &s390_tdb_regset,
575 "s390 TDB", cb_data);
5aa82d05
AA
576}
577
7803799a
UW
578static const struct target_desc *
579s390_core_read_description (struct gdbarch *gdbarch,
580 struct target_ops *target, bfd *abfd)
581{
582 asection *high_gprs = bfd_get_section_by_name (abfd, ".reg-s390-high-gprs");
c642a434
UW
583 asection *v1 = bfd_get_section_by_name (abfd, ".reg-s390-last-break");
584 asection *v2 = bfd_get_section_by_name (abfd, ".reg-s390-system-call");
7803799a 585 asection *section = bfd_get_section_by_name (abfd, ".reg");
04a83fee 586 CORE_ADDR hwcap = 0;
4ac33720
UW
587
588 target_auxv_search (target, AT_HWCAP, &hwcap);
7803799a
UW
589 if (!section)
590 return NULL;
591
592 switch (bfd_section_size (abfd, section))
593 {
594 case s390_sizeof_gregset:
c642a434 595 if (high_gprs)
4ac33720
UW
596 return ((hwcap & HWCAP_S390_TE) ? tdesc_s390_te_linux64 :
597 v2? tdesc_s390_linux64v2 :
c642a434
UW
598 v1? tdesc_s390_linux64v1 : tdesc_s390_linux64);
599 else
600 return (v2? tdesc_s390_linux32v2 :
601 v1? tdesc_s390_linux32v1 : tdesc_s390_linux32);
7803799a
UW
602
603 case s390x_sizeof_gregset:
4ac33720
UW
604 return ((hwcap & HWCAP_S390_TE) ? tdesc_s390x_te_linux64 :
605 v2? tdesc_s390x_linux64v2 :
c642a434 606 v1? tdesc_s390x_linux64v1 : tdesc_s390x_linux64);
7803799a
UW
607
608 default:
609 return NULL;
610 }
611}
612
d0f54f9d 613
4bc8c588
JB
614/* Decoding S/390 instructions. */
615
616/* Named opcode values for the S/390 instructions we recognize. Some
617 instructions have their opcode split across two fields; those are the
618 op1_* and op2_* enums. */
619enum
620 {
a8c99f38
JB
621 op1_lhi = 0xa7, op2_lhi = 0x08,
622 op1_lghi = 0xa7, op2_lghi = 0x09,
00ce08ef 623 op1_lgfi = 0xc0, op2_lgfi = 0x01,
4bc8c588 624 op_lr = 0x18,
a8c99f38
JB
625 op_lgr = 0xb904,
626 op_l = 0x58,
627 op1_ly = 0xe3, op2_ly = 0x58,
628 op1_lg = 0xe3, op2_lg = 0x04,
629 op_lm = 0x98,
630 op1_lmy = 0xeb, op2_lmy = 0x98,
631 op1_lmg = 0xeb, op2_lmg = 0x04,
4bc8c588 632 op_st = 0x50,
a8c99f38 633 op1_sty = 0xe3, op2_sty = 0x50,
4bc8c588 634 op1_stg = 0xe3, op2_stg = 0x24,
a8c99f38 635 op_std = 0x60,
4bc8c588 636 op_stm = 0x90,
a8c99f38 637 op1_stmy = 0xeb, op2_stmy = 0x90,
4bc8c588 638 op1_stmg = 0xeb, op2_stmg = 0x24,
a8c99f38
JB
639 op1_aghi = 0xa7, op2_aghi = 0x0b,
640 op1_ahi = 0xa7, op2_ahi = 0x0a,
00ce08ef
UW
641 op1_agfi = 0xc2, op2_agfi = 0x08,
642 op1_afi = 0xc2, op2_afi = 0x09,
643 op1_algfi= 0xc2, op2_algfi= 0x0a,
644 op1_alfi = 0xc2, op2_alfi = 0x0b,
a8c99f38
JB
645 op_ar = 0x1a,
646 op_agr = 0xb908,
647 op_a = 0x5a,
648 op1_ay = 0xe3, op2_ay = 0x5a,
649 op1_ag = 0xe3, op2_ag = 0x08,
00ce08ef
UW
650 op1_slgfi= 0xc2, op2_slgfi= 0x04,
651 op1_slfi = 0xc2, op2_slfi = 0x05,
a8c99f38
JB
652 op_sr = 0x1b,
653 op_sgr = 0xb909,
654 op_s = 0x5b,
655 op1_sy = 0xe3, op2_sy = 0x5b,
656 op1_sg = 0xe3, op2_sg = 0x09,
657 op_nr = 0x14,
658 op_ngr = 0xb980,
659 op_la = 0x41,
660 op1_lay = 0xe3, op2_lay = 0x71,
661 op1_larl = 0xc0, op2_larl = 0x00,
662 op_basr = 0x0d,
663 op_bas = 0x4d,
664 op_bcr = 0x07,
665 op_bc = 0x0d,
1db4e8a0
UW
666 op_bctr = 0x06,
667 op_bctgr = 0xb946,
668 op_bct = 0x46,
669 op1_bctg = 0xe3, op2_bctg = 0x46,
670 op_bxh = 0x86,
671 op1_bxhg = 0xeb, op2_bxhg = 0x44,
672 op_bxle = 0x87,
673 op1_bxleg= 0xeb, op2_bxleg= 0x45,
a8c99f38
JB
674 op1_bras = 0xa7, op2_bras = 0x05,
675 op1_brasl= 0xc0, op2_brasl= 0x05,
676 op1_brc = 0xa7, op2_brc = 0x04,
677 op1_brcl = 0xc0, op2_brcl = 0x04,
1db4e8a0
UW
678 op1_brct = 0xa7, op2_brct = 0x06,
679 op1_brctg= 0xa7, op2_brctg= 0x07,
680 op_brxh = 0x84,
681 op1_brxhg= 0xec, op2_brxhg= 0x44,
682 op_brxle = 0x85,
683 op1_brxlg= 0xec, op2_brxlg= 0x45,
237b092b 684 op_svc = 0x0a,
4bc8c588
JB
685 };
686
687
a8c99f38
JB
688/* Read a single instruction from address AT. */
689
690#define S390_MAX_INSTR_SIZE 6
691static int
692s390_readinstruction (bfd_byte instr[], CORE_ADDR at)
693{
694 static int s390_instrlen[] = { 2, 4, 4, 6 };
695 int instrlen;
696
8defab1a 697 if (target_read_memory (at, &instr[0], 2))
a8c99f38
JB
698 return -1;
699 instrlen = s390_instrlen[instr[0] >> 6];
700 if (instrlen > 2)
701 {
8defab1a 702 if (target_read_memory (at + 2, &instr[2], instrlen - 2))
34201ae3 703 return -1;
a8c99f38
JB
704 }
705 return instrlen;
706}
707
708
4bc8c588
JB
709/* The functions below are for recognizing and decoding S/390
710 instructions of various formats. Each of them checks whether INSN
711 is an instruction of the given format, with the specified opcodes.
712 If it is, it sets the remaining arguments to the values of the
713 instruction's fields, and returns a non-zero value; otherwise, it
714 returns zero.
715
716 These functions' arguments appear in the order they appear in the
717 instruction, not in the machine-language form. So, opcodes always
718 come first, even though they're sometimes scattered around the
719 instructions. And displacements appear before base and extension
720 registers, as they do in the assembly syntax, not at the end, as
721 they do in the machine language. */
a78f21af 722static int
4bc8c588
JB
723is_ri (bfd_byte *insn, int op1, int op2, unsigned int *r1, int *i2)
724{
725 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
726 {
727 *r1 = (insn[1] >> 4) & 0xf;
728 /* i2 is a 16-bit signed quantity. */
729 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
730 return 1;
731 }
732 else
733 return 0;
734}
8ac0e65a 735
5769d3cd 736
4bc8c588
JB
737static int
738is_ril (bfd_byte *insn, int op1, int op2,
34201ae3 739 unsigned int *r1, int *i2)
4bc8c588
JB
740{
741 if (insn[0] == op1 && (insn[1] & 0xf) == op2)
742 {
743 *r1 = (insn[1] >> 4) & 0xf;
744 /* i2 is a signed quantity. If the host 'int' is 32 bits long,
34201ae3
UW
745 no sign extension is necessary, but we don't want to assume
746 that. */
4bc8c588 747 *i2 = (((insn[2] << 24)
34201ae3
UW
748 | (insn[3] << 16)
749 | (insn[4] << 8)
750 | (insn[5])) ^ 0x80000000) - 0x80000000;
4bc8c588
JB
751 return 1;
752 }
753 else
754 return 0;
755}
756
757
758static int
759is_rr (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
760{
761 if (insn[0] == op)
762 {
763 *r1 = (insn[1] >> 4) & 0xf;
764 *r2 = insn[1] & 0xf;
765 return 1;
766 }
767 else
768 return 0;
769}
770
771
772static int
773is_rre (bfd_byte *insn, int op, unsigned int *r1, unsigned int *r2)
774{
775 if (((insn[0] << 8) | insn[1]) == op)
776 {
777 /* Yes, insn[3]. insn[2] is unused in RRE format. */
778 *r1 = (insn[3] >> 4) & 0xf;
779 *r2 = insn[3] & 0xf;
780 return 1;
781 }
782 else
783 return 0;
784}
785
786
787static int
788is_rs (bfd_byte *insn, int op,
eb1bd1fb 789 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
790{
791 if (insn[0] == op)
792 {
793 *r1 = (insn[1] >> 4) & 0xf;
794 *r3 = insn[1] & 0xf;
795 *b2 = (insn[2] >> 4) & 0xf;
796 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
797 return 1;
798 }
799 else
800 return 0;
801}
802
803
804static int
a8c99f38 805is_rsy (bfd_byte *insn, int op1, int op2,
34201ae3 806 unsigned int *r1, unsigned int *r3, int *d2, unsigned int *b2)
4bc8c588
JB
807{
808 if (insn[0] == op1
4bc8c588
JB
809 && insn[5] == op2)
810 {
811 *r1 = (insn[1] >> 4) & 0xf;
812 *r3 = insn[1] & 0xf;
813 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 814 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 815 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 816 ^ 0x80000) - 0x80000;
4bc8c588
JB
817 return 1;
818 }
819 else
820 return 0;
821}
822
823
1db4e8a0
UW
824static int
825is_rsi (bfd_byte *insn, int op,
34201ae3 826 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
827{
828 if (insn[0] == op)
829 {
830 *r1 = (insn[1] >> 4) & 0xf;
831 *r3 = insn[1] & 0xf;
832 /* i2 is a 16-bit signed quantity. */
833 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
834 return 1;
835 }
836 else
837 return 0;
838}
839
840
841static int
842is_rie (bfd_byte *insn, int op1, int op2,
34201ae3 843 unsigned int *r1, unsigned int *r3, int *i2)
1db4e8a0
UW
844{
845 if (insn[0] == op1
846 && insn[5] == op2)
847 {
848 *r1 = (insn[1] >> 4) & 0xf;
849 *r3 = insn[1] & 0xf;
850 /* i2 is a 16-bit signed quantity. */
851 *i2 = (((insn[2] << 8) | insn[3]) ^ 0x8000) - 0x8000;
852 return 1;
853 }
854 else
855 return 0;
856}
857
858
4bc8c588
JB
859static int
860is_rx (bfd_byte *insn, int op,
eb1bd1fb 861 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
862{
863 if (insn[0] == op)
864 {
865 *r1 = (insn[1] >> 4) & 0xf;
866 *x2 = insn[1] & 0xf;
867 *b2 = (insn[2] >> 4) & 0xf;
868 *d2 = ((insn[2] & 0xf) << 8) | insn[3];
869 return 1;
870 }
871 else
872 return 0;
873}
874
875
876static int
a8c99f38 877is_rxy (bfd_byte *insn, int op1, int op2,
34201ae3 878 unsigned int *r1, int *d2, unsigned int *x2, unsigned int *b2)
4bc8c588
JB
879{
880 if (insn[0] == op1
4bc8c588
JB
881 && insn[5] == op2)
882 {
883 *r1 = (insn[1] >> 4) & 0xf;
884 *x2 = insn[1] & 0xf;
885 *b2 = (insn[2] >> 4) & 0xf;
a8c99f38 886 /* The 'long displacement' is a 20-bit signed integer. */
34201ae3 887 *d2 = ((((insn[2] & 0xf) << 8) | insn[3] | (insn[4] << 12))
a8c99f38 888 ^ 0x80000) - 0x80000;
4bc8c588
JB
889 return 1;
890 }
891 else
892 return 0;
893}
894
895
3fc46200 896/* Prologue analysis. */
4bc8c588 897
d0f54f9d
JB
898#define S390_NUM_GPRS 16
899#define S390_NUM_FPRS 16
4bc8c588 900
a8c99f38
JB
901struct s390_prologue_data {
902
ee1b3323
UW
903 /* The stack. */
904 struct pv_area *stack;
905
e17a4113 906 /* The size and byte-order of a GPR or FPR. */
a8c99f38
JB
907 int gpr_size;
908 int fpr_size;
e17a4113 909 enum bfd_endian byte_order;
a8c99f38
JB
910
911 /* The general-purpose registers. */
3fc46200 912 pv_t gpr[S390_NUM_GPRS];
a8c99f38
JB
913
914 /* The floating-point registers. */
3fc46200 915 pv_t fpr[S390_NUM_FPRS];
a8c99f38 916
121d8485
UW
917 /* The offset relative to the CFA where the incoming GPR N was saved
918 by the function prologue. 0 if not saved or unknown. */
919 int gpr_slot[S390_NUM_GPRS];
4bc8c588 920
121d8485
UW
921 /* Likewise for FPRs. */
922 int fpr_slot[S390_NUM_FPRS];
4bc8c588 923
121d8485
UW
924 /* Nonzero if the backchain was saved. This is assumed to be the
925 case when the incoming SP is saved at the current SP location. */
926 int back_chain_saved_p;
927};
4bc8c588 928
3fc46200
UW
929/* Return the effective address for an X-style instruction, like:
930
34201ae3 931 L R1, D2(X2, B2)
3fc46200
UW
932
933 Here, X2 and B2 are registers, and D2 is a signed 20-bit
934 constant; the effective address is the sum of all three. If either
935 X2 or B2 are zero, then it doesn't contribute to the sum --- this
936 means that r0 can't be used as either X2 or B2. */
937static pv_t
938s390_addr (struct s390_prologue_data *data,
939 int d2, unsigned int x2, unsigned int b2)
940{
941 pv_t result;
942
943 result = pv_constant (d2);
944 if (x2)
945 result = pv_add (result, data->gpr[x2]);
946 if (b2)
947 result = pv_add (result, data->gpr[b2]);
948
949 return result;
950}
951
952/* Do a SIZE-byte store of VALUE to D2(X2,B2). */
a8c99f38 953static void
3fc46200
UW
954s390_store (struct s390_prologue_data *data,
955 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size,
956 pv_t value)
4bc8c588 957{
3fc46200 958 pv_t addr = s390_addr (data, d2, x2, b2);
ee1b3323 959 pv_t offset;
121d8485
UW
960
961 /* Check whether we are storing the backchain. */
3fc46200 962 offset = pv_subtract (data->gpr[S390_SP_REGNUM - S390_R0_REGNUM], addr);
121d8485 963
3fc46200 964 if (pv_is_constant (offset) && offset.k == 0)
121d8485 965 if (size == data->gpr_size
3fc46200 966 && pv_is_register_k (value, S390_SP_REGNUM, 0))
121d8485
UW
967 {
968 data->back_chain_saved_p = 1;
969 return;
970 }
971
972
973 /* Check whether we are storing a register into the stack. */
ee1b3323
UW
974 if (!pv_area_store_would_trash (data->stack, addr))
975 pv_area_store (data->stack, addr, size, value);
4bc8c588 976
a8c99f38 977
121d8485
UW
978 /* Note: If this is some store we cannot identify, you might think we
979 should forget our cached values, as any of those might have been hit.
980
981 However, we make the assumption that the register save areas are only
982 ever stored to once in any given function, and we do recognize these
983 stores. Thus every store we cannot recognize does not hit our data. */
4bc8c588 984}
4bc8c588 985
3fc46200
UW
986/* Do a SIZE-byte load from D2(X2,B2). */
987static pv_t
988s390_load (struct s390_prologue_data *data,
989 int d2, unsigned int x2, unsigned int b2, CORE_ADDR size)
34201ae3 990
4bc8c588 991{
3fc46200 992 pv_t addr = s390_addr (data, d2, x2, b2);
4bc8c588 993
a8c99f38
JB
994 /* If it's a load from an in-line constant pool, then we can
995 simulate that, under the assumption that the code isn't
996 going to change between the time the processor actually
997 executed it creating the current frame, and the time when
998 we're analyzing the code to unwind past that frame. */
3fc46200 999 if (pv_is_constant (addr))
4bc8c588 1000 {
0542c86d 1001 struct target_section *secp;
3fc46200 1002 secp = target_section_by_addr (&current_target, addr.k);
a8c99f38 1003 if (secp != NULL
34201ae3 1004 && (bfd_get_section_flags (secp->the_bfd_section->owner,
57e6060e 1005 secp->the_bfd_section)
34201ae3
UW
1006 & SEC_READONLY))
1007 return pv_constant (read_memory_integer (addr.k, size,
e17a4113 1008 data->byte_order));
a8c99f38 1009 }
7666f43c 1010
121d8485 1011 /* Check whether we are accessing one of our save slots. */
ee1b3323
UW
1012 return pv_area_fetch (data->stack, addr, size);
1013}
121d8485 1014
ee1b3323
UW
1015/* Function for finding saved registers in a 'struct pv_area'; we pass
1016 this to pv_area_scan.
121d8485 1017
ee1b3323
UW
1018 If VALUE is a saved register, ADDR says it was saved at a constant
1019 offset from the frame base, and SIZE indicates that the whole
1020 register was saved, record its offset in the reg_offset table in
1021 PROLOGUE_UNTYPED. */
1022static void
c378eb4e
MS
1023s390_check_for_saved (void *data_untyped, pv_t addr,
1024 CORE_ADDR size, pv_t value)
ee1b3323
UW
1025{
1026 struct s390_prologue_data *data = data_untyped;
1027 int i, offset;
1028
1029 if (!pv_is_register (addr, S390_SP_REGNUM))
1030 return;
1031
1032 offset = 16 * data->gpr_size + 32 - addr.k;
4bc8c588 1033
ee1b3323
UW
1034 /* If we are storing the original value of a register, we want to
1035 record the CFA offset. If the same register is stored multiple
1036 times, the stack slot with the highest address counts. */
34201ae3 1037
ee1b3323
UW
1038 for (i = 0; i < S390_NUM_GPRS; i++)
1039 if (size == data->gpr_size
1040 && pv_is_register_k (value, S390_R0_REGNUM + i, 0))
1041 if (data->gpr_slot[i] == 0
1042 || data->gpr_slot[i] > offset)
1043 {
1044 data->gpr_slot[i] = offset;
1045 return;
1046 }
1047
1048 for (i = 0; i < S390_NUM_FPRS; i++)
1049 if (size == data->fpr_size
1050 && pv_is_register_k (value, S390_F0_REGNUM + i, 0))
1051 if (data->fpr_slot[i] == 0
1052 || data->fpr_slot[i] > offset)
1053 {
1054 data->fpr_slot[i] = offset;
1055 return;
1056 }
a8c99f38 1057}
4bc8c588 1058
a8c99f38
JB
1059/* Analyze the prologue of the function starting at START_PC,
1060 continuing at most until CURRENT_PC. Initialize DATA to
1061 hold all information we find out about the state of the registers
1062 and stack slots. Return the address of the instruction after
1063 the last one that changed the SP, FP, or back chain; or zero
1064 on error. */
1065static CORE_ADDR
1066s390_analyze_prologue (struct gdbarch *gdbarch,
1067 CORE_ADDR start_pc,
1068 CORE_ADDR current_pc,
1069 struct s390_prologue_data *data)
4bc8c588 1070{
a8c99f38
JB
1071 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1072
4bc8c588 1073 /* Our return value:
a8c99f38 1074 The address of the instruction after the last one that changed
34201ae3 1075 the SP, FP, or back chain; zero if we got an error trying to
a8c99f38
JB
1076 read memory. */
1077 CORE_ADDR result = start_pc;
4bc8c588 1078
4bc8c588
JB
1079 /* The current PC for our abstract interpretation. */
1080 CORE_ADDR pc;
1081
1082 /* The address of the next instruction after that. */
1083 CORE_ADDR next_pc;
34201ae3 1084
4bc8c588
JB
1085 /* Set up everything's initial value. */
1086 {
1087 int i;
1088
55f960e1 1089 data->stack = make_pv_area (S390_SP_REGNUM, gdbarch_addr_bit (gdbarch));
ee1b3323 1090
a8c99f38
JB
1091 /* For the purpose of prologue tracking, we consider the GPR size to
1092 be equal to the ABI word size, even if it is actually larger
1093 (i.e. when running a 32-bit binary under a 64-bit kernel). */
1094 data->gpr_size = word_size;
1095 data->fpr_size = 8;
e17a4113 1096 data->byte_order = gdbarch_byte_order (gdbarch);
a8c99f38 1097
4bc8c588 1098 for (i = 0; i < S390_NUM_GPRS; i++)
3fc46200 1099 data->gpr[i] = pv_register (S390_R0_REGNUM + i, 0);
4bc8c588
JB
1100
1101 for (i = 0; i < S390_NUM_FPRS; i++)
3fc46200 1102 data->fpr[i] = pv_register (S390_F0_REGNUM + i, 0);
4bc8c588 1103
121d8485
UW
1104 for (i = 0; i < S390_NUM_GPRS; i++)
1105 data->gpr_slot[i] = 0;
1106
1107 for (i = 0; i < S390_NUM_FPRS; i++)
1108 data->fpr_slot[i] = 0;
4bc8c588 1109
121d8485 1110 data->back_chain_saved_p = 0;
4bc8c588
JB
1111 }
1112
a8c99f38
JB
1113 /* Start interpreting instructions, until we hit the frame's
1114 current PC or the first branch instruction. */
1115 for (pc = start_pc; pc > 0 && pc < current_pc; pc = next_pc)
5769d3cd 1116 {
4bc8c588 1117 bfd_byte insn[S390_MAX_INSTR_SIZE];
a788de9b 1118 int insn_len = s390_readinstruction (insn, pc);
4bc8c588 1119
3fc46200
UW
1120 bfd_byte dummy[S390_MAX_INSTR_SIZE] = { 0 };
1121 bfd_byte *insn32 = word_size == 4 ? insn : dummy;
1122 bfd_byte *insn64 = word_size == 8 ? insn : dummy;
1123
4bc8c588 1124 /* Fields for various kinds of instructions. */
a8c99f38
JB
1125 unsigned int b2, r1, r2, x2, r3;
1126 int i2, d2;
4bc8c588 1127
121d8485 1128 /* The values of SP and FP before this instruction,
34201ae3 1129 for detecting instructions that change them. */
3fc46200 1130 pv_t pre_insn_sp, pre_insn_fp;
121d8485
UW
1131 /* Likewise for the flag whether the back chain was saved. */
1132 int pre_insn_back_chain_saved_p;
4bc8c588
JB
1133
1134 /* If we got an error trying to read the instruction, report it. */
1135 if (insn_len < 0)
34201ae3
UW
1136 {
1137 result = 0;
1138 break;
1139 }
4bc8c588
JB
1140
1141 next_pc = pc + insn_len;
1142
a8c99f38
JB
1143 pre_insn_sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1144 pre_insn_fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
121d8485 1145 pre_insn_back_chain_saved_p = data->back_chain_saved_p;
4bc8c588 1146
4bc8c588 1147
3fc46200
UW
1148 /* LHI r1, i2 --- load halfword immediate. */
1149 /* LGHI r1, i2 --- load halfword immediate (64-bit version). */
1150 /* LGFI r1, i2 --- load fullword immediate. */
1151 if (is_ri (insn32, op1_lhi, op2_lhi, &r1, &i2)
34201ae3
UW
1152 || is_ri (insn64, op1_lghi, op2_lghi, &r1, &i2)
1153 || is_ril (insn, op1_lgfi, op2_lgfi, &r1, &i2))
3fc46200
UW
1154 data->gpr[r1] = pv_constant (i2);
1155
1156 /* LR r1, r2 --- load from register. */
1157 /* LGR r1, r2 --- load from register (64-bit version). */
1158 else if (is_rr (insn32, op_lr, &r1, &r2)
1159 || is_rre (insn64, op_lgr, &r1, &r2))
1160 data->gpr[r1] = data->gpr[r2];
1161
1162 /* L r1, d2(x2, b2) --- load. */
1163 /* LY r1, d2(x2, b2) --- load (long-displacement version). */
1164 /* LG r1, d2(x2, b2) --- load (64-bit version). */
1165 else if (is_rx (insn32, op_l, &r1, &d2, &x2, &b2)
1166 || is_rxy (insn32, op1_ly, op2_ly, &r1, &d2, &x2, &b2)
1167 || is_rxy (insn64, op1_lg, op2_lg, &r1, &d2, &x2, &b2))
1168 data->gpr[r1] = s390_load (data, d2, x2, b2, data->gpr_size);
1169
1170 /* ST r1, d2(x2, b2) --- store. */
1171 /* STY r1, d2(x2, b2) --- store (long-displacement version). */
1172 /* STG r1, d2(x2, b2) --- store (64-bit version). */
1173 else if (is_rx (insn32, op_st, &r1, &d2, &x2, &b2)
1174 || is_rxy (insn32, op1_sty, op2_sty, &r1, &d2, &x2, &b2)
1175 || is_rxy (insn64, op1_stg, op2_stg, &r1, &d2, &x2, &b2))
1176 s390_store (data, d2, x2, b2, data->gpr_size, data->gpr[r1]);
1177
1178 /* STD r1, d2(x2,b2) --- store floating-point register. */
4bc8c588 1179 else if (is_rx (insn, op_std, &r1, &d2, &x2, &b2))
3fc46200
UW
1180 s390_store (data, d2, x2, b2, data->fpr_size, data->fpr[r1]);
1181
1182 /* STM r1, r3, d2(b2) --- store multiple. */
c378eb4e
MS
1183 /* STMY r1, r3, d2(b2) --- store multiple (long-displacement
1184 version). */
3fc46200
UW
1185 /* STMG r1, r3, d2(b2) --- store multiple (64-bit version). */
1186 else if (is_rs (insn32, op_stm, &r1, &r3, &d2, &b2)
1187 || is_rsy (insn32, op1_stmy, op2_stmy, &r1, &r3, &d2, &b2)
1188 || is_rsy (insn64, op1_stmg, op2_stmg, &r1, &r3, &d2, &b2))
34201ae3
UW
1189 {
1190 for (; r1 <= r3; r1++, d2 += data->gpr_size)
3fc46200 1191 s390_store (data, d2, 0, b2, data->gpr_size, data->gpr[r1]);
34201ae3 1192 }
4bc8c588 1193
3fc46200
UW
1194 /* AHI r1, i2 --- add halfword immediate. */
1195 /* AGHI r1, i2 --- add halfword immediate (64-bit version). */
1196 /* AFI r1, i2 --- add fullword immediate. */
1197 /* AGFI r1, i2 --- add fullword immediate (64-bit version). */
1198 else if (is_ri (insn32, op1_ahi, op2_ahi, &r1, &i2)
1199 || is_ri (insn64, op1_aghi, op2_aghi, &r1, &i2)
1200 || is_ril (insn32, op1_afi, op2_afi, &r1, &i2)
1201 || is_ril (insn64, op1_agfi, op2_agfi, &r1, &i2))
1202 data->gpr[r1] = pv_add_constant (data->gpr[r1], i2);
1203
1204 /* ALFI r1, i2 --- add logical immediate. */
1205 /* ALGFI r1, i2 --- add logical immediate (64-bit version). */
1206 else if (is_ril (insn32, op1_alfi, op2_alfi, &r1, &i2)
1207 || is_ril (insn64, op1_algfi, op2_algfi, &r1, &i2))
1208 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1209 (CORE_ADDR)i2 & 0xffffffff);
1210
1211 /* AR r1, r2 -- add register. */
1212 /* AGR r1, r2 -- add register (64-bit version). */
1213 else if (is_rr (insn32, op_ar, &r1, &r2)
1214 || is_rre (insn64, op_agr, &r1, &r2))
1215 data->gpr[r1] = pv_add (data->gpr[r1], data->gpr[r2]);
1216
1217 /* A r1, d2(x2, b2) -- add. */
1218 /* AY r1, d2(x2, b2) -- add (long-displacement version). */
1219 /* AG r1, d2(x2, b2) -- add (64-bit version). */
1220 else if (is_rx (insn32, op_a, &r1, &d2, &x2, &b2)
1221 || is_rxy (insn32, op1_ay, op2_ay, &r1, &d2, &x2, &b2)
1222 || is_rxy (insn64, op1_ag, op2_ag, &r1, &d2, &x2, &b2))
1223 data->gpr[r1] = pv_add (data->gpr[r1],
1224 s390_load (data, d2, x2, b2, data->gpr_size));
1225
1226 /* SLFI r1, i2 --- subtract logical immediate. */
1227 /* SLGFI r1, i2 --- subtract logical immediate (64-bit version). */
1228 else if (is_ril (insn32, op1_slfi, op2_slfi, &r1, &i2)
1229 || is_ril (insn64, op1_slgfi, op2_slgfi, &r1, &i2))
1230 data->gpr[r1] = pv_add_constant (data->gpr[r1],
1231 -((CORE_ADDR)i2 & 0xffffffff));
1232
1233 /* SR r1, r2 -- subtract register. */
1234 /* SGR r1, r2 -- subtract register (64-bit version). */
1235 else if (is_rr (insn32, op_sr, &r1, &r2)
1236 || is_rre (insn64, op_sgr, &r1, &r2))
1237 data->gpr[r1] = pv_subtract (data->gpr[r1], data->gpr[r2]);
1238
1239 /* S r1, d2(x2, b2) -- subtract. */
1240 /* SY r1, d2(x2, b2) -- subtract (long-displacement version). */
1241 /* SG r1, d2(x2, b2) -- subtract (64-bit version). */
1242 else if (is_rx (insn32, op_s, &r1, &d2, &x2, &b2)
1243 || is_rxy (insn32, op1_sy, op2_sy, &r1, &d2, &x2, &b2)
1244 || is_rxy (insn64, op1_sg, op2_sg, &r1, &d2, &x2, &b2))
1245 data->gpr[r1] = pv_subtract (data->gpr[r1],
1246 s390_load (data, d2, x2, b2, data->gpr_size));
1247
1248 /* LA r1, d2(x2, b2) --- load address. */
1249 /* LAY r1, d2(x2, b2) --- load address (long-displacement version). */
1250 else if (is_rx (insn, op_la, &r1, &d2, &x2, &b2)
34201ae3 1251 || is_rxy (insn, op1_lay, op2_lay, &r1, &d2, &x2, &b2))
3fc46200
UW
1252 data->gpr[r1] = s390_addr (data, d2, x2, b2);
1253
1254 /* LARL r1, i2 --- load address relative long. */
a8c99f38 1255 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
3fc46200 1256 data->gpr[r1] = pv_constant (pc + i2 * 2);
a8c99f38 1257
3fc46200 1258 /* BASR r1, 0 --- branch and save.
34201ae3 1259 Since r2 is zero, this saves the PC in r1, but doesn't branch. */
a8c99f38 1260 else if (is_rr (insn, op_basr, &r1, &r2)
34201ae3 1261 && r2 == 0)
3fc46200 1262 data->gpr[r1] = pv_constant (next_pc);
a8c99f38 1263
3fc46200 1264 /* BRAS r1, i2 --- branch relative and save. */
a8c99f38 1265 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2))
34201ae3
UW
1266 {
1267 data->gpr[r1] = pv_constant (next_pc);
1268 next_pc = pc + i2 * 2;
4bc8c588 1269
34201ae3
UW
1270 /* We'd better not interpret any backward branches. We'll
1271 never terminate. */
1272 if (next_pc <= pc)
1273 break;
1274 }
4bc8c588 1275
a8c99f38
JB
1276 /* Terminate search when hitting any other branch instruction. */
1277 else if (is_rr (insn, op_basr, &r1, &r2)
1278 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2)
1279 || is_rr (insn, op_bcr, &r1, &r2)
1280 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1281 || is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1282 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1283 || is_ril (insn, op1_brasl, op2_brasl, &r2, &i2))
1284 break;
1285
4bc8c588 1286 else
d4fb63e1
TT
1287 {
1288 /* An instruction we don't know how to simulate. The only
1289 safe thing to do would be to set every value we're tracking
1290 to 'unknown'. Instead, we'll be optimistic: we assume that
1291 we *can* interpret every instruction that the compiler uses
1292 to manipulate any of the data we're interested in here --
1293 then we can just ignore anything else. */
1294 }
4bc8c588
JB
1295
1296 /* Record the address after the last instruction that changed
34201ae3
UW
1297 the FP, SP, or backlink. Ignore instructions that changed
1298 them back to their original values --- those are probably
1299 restore instructions. (The back chain is never restored,
1300 just popped.) */
4bc8c588 1301 {
34201ae3
UW
1302 pv_t sp = data->gpr[S390_SP_REGNUM - S390_R0_REGNUM];
1303 pv_t fp = data->gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1304
1305 if ((! pv_is_identical (pre_insn_sp, sp)
1306 && ! pv_is_register_k (sp, S390_SP_REGNUM, 0)
3fc46200 1307 && sp.kind != pvk_unknown)
34201ae3
UW
1308 || (! pv_is_identical (pre_insn_fp, fp)
1309 && ! pv_is_register_k (fp, S390_FRAME_REGNUM, 0)
3fc46200 1310 && fp.kind != pvk_unknown)
34201ae3
UW
1311 || pre_insn_back_chain_saved_p != data->back_chain_saved_p)
1312 result = next_pc;
4bc8c588 1313 }
5769d3cd 1314 }
4bc8c588 1315
ee1b3323
UW
1316 /* Record where all the registers were saved. */
1317 pv_area_scan (data->stack, s390_check_for_saved, data);
1318
1319 free_pv_area (data->stack);
1320 data->stack = NULL;
1321
4bc8c588 1322 return result;
5769d3cd
AC
1323}
1324
34201ae3 1325/* Advance PC across any function entry prologue instructions to reach
a8c99f38
JB
1326 some "real" code. */
1327static CORE_ADDR
6093d2eb 1328s390_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
a8c99f38
JB
1329{
1330 struct s390_prologue_data data;
1331 CORE_ADDR skip_pc;
6093d2eb 1332 skip_pc = s390_analyze_prologue (gdbarch, pc, (CORE_ADDR)-1, &data);
a8c99f38
JB
1333 return skip_pc ? skip_pc : pc;
1334}
1335
d0f54f9d
JB
1336/* Return true if we are in the functin's epilogue, i.e. after the
1337 instruction that destroyed the function's stack frame. */
1338static int
1339s390_in_function_epilogue_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1340{
1341 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1342
1343 /* In frameless functions, there's not frame to destroy and thus
1344 we don't care about the epilogue.
1345
1346 In functions with frame, the epilogue sequence is a pair of
1347 a LM-type instruction that restores (amongst others) the
1348 return register %r14 and the stack pointer %r15, followed
1349 by a branch 'br %r14' --or equivalent-- that effects the
1350 actual return.
1351
1352 In that situation, this function needs to return 'true' in
1353 exactly one case: when pc points to that branch instruction.
1354
1355 Thus we try to disassemble the one instructions immediately
177b42fe 1356 preceding pc and check whether it is an LM-type instruction
d0f54f9d
JB
1357 modifying the stack pointer.
1358
1359 Note that disassembling backwards is not reliable, so there
1360 is a slight chance of false positives here ... */
1361
1362 bfd_byte insn[6];
1363 unsigned int r1, r3, b2;
1364 int d2;
1365
1366 if (word_size == 4
8defab1a 1367 && !target_read_memory (pc - 4, insn, 4)
d0f54f9d
JB
1368 && is_rs (insn, op_lm, &r1, &r3, &d2, &b2)
1369 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1370 return 1;
1371
a8c99f38 1372 if (word_size == 4
8defab1a 1373 && !target_read_memory (pc - 6, insn, 6)
a8c99f38
JB
1374 && is_rsy (insn, op1_lmy, op2_lmy, &r1, &r3, &d2, &b2)
1375 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1376 return 1;
1377
d0f54f9d 1378 if (word_size == 8
8defab1a 1379 && !target_read_memory (pc - 6, insn, 6)
a8c99f38 1380 && is_rsy (insn, op1_lmg, op2_lmg, &r1, &r3, &d2, &b2)
d0f54f9d
JB
1381 && r3 == S390_SP_REGNUM - S390_R0_REGNUM)
1382 return 1;
1383
1384 return 0;
1385}
5769d3cd 1386
1db4e8a0
UW
1387/* Displaced stepping. */
1388
1389/* Fix up the state of registers and memory after having single-stepped
1390 a displaced instruction. */
1391static void
1392s390_displaced_step_fixup (struct gdbarch *gdbarch,
1393 struct displaced_step_closure *closure,
1394 CORE_ADDR from, CORE_ADDR to,
1395 struct regcache *regs)
1396{
1397 /* Since we use simple_displaced_step_copy_insn, our closure is a
1398 copy of the instruction. */
1399 gdb_byte *insn = (gdb_byte *) closure;
1400 static int s390_instrlen[] = { 2, 4, 4, 6 };
1401 int insnlen = s390_instrlen[insn[0] >> 6];
1402
1403 /* Fields for various kinds of instructions. */
1404 unsigned int b2, r1, r2, x2, r3;
1405 int i2, d2;
1406
1407 /* Get current PC and addressing mode bit. */
1408 CORE_ADDR pc = regcache_read_pc (regs);
beaabab2 1409 ULONGEST amode = 0;
1db4e8a0
UW
1410
1411 if (register_size (gdbarch, S390_PSWA_REGNUM) == 4)
1412 {
1413 regcache_cooked_read_unsigned (regs, S390_PSWA_REGNUM, &amode);
1414 amode &= 0x80000000;
1415 }
1416
1417 if (debug_displaced)
1418 fprintf_unfiltered (gdb_stdlog,
0161e4b9 1419 "displaced: (s390) fixup (%s, %s) pc %s len %d amode 0x%x\n",
1db4e8a0 1420 paddress (gdbarch, from), paddress (gdbarch, to),
0161e4b9 1421 paddress (gdbarch, pc), insnlen, (int) amode);
1db4e8a0
UW
1422
1423 /* Handle absolute branch and save instructions. */
1424 if (is_rr (insn, op_basr, &r1, &r2)
1425 || is_rx (insn, op_bas, &r1, &d2, &x2, &b2))
1426 {
1427 /* Recompute saved return address in R1. */
1428 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1429 amode | (from + insnlen));
1430 }
1431
1432 /* Handle absolute branch instructions. */
1433 else if (is_rr (insn, op_bcr, &r1, &r2)
1434 || is_rx (insn, op_bc, &r1, &d2, &x2, &b2)
1435 || is_rr (insn, op_bctr, &r1, &r2)
1436 || is_rre (insn, op_bctgr, &r1, &r2)
1437 || is_rx (insn, op_bct, &r1, &d2, &x2, &b2)
1438 || is_rxy (insn, op1_bctg, op2_brctg, &r1, &d2, &x2, &b2)
1439 || is_rs (insn, op_bxh, &r1, &r3, &d2, &b2)
1440 || is_rsy (insn, op1_bxhg, op2_bxhg, &r1, &r3, &d2, &b2)
1441 || is_rs (insn, op_bxle, &r1, &r3, &d2, &b2)
1442 || is_rsy (insn, op1_bxleg, op2_bxleg, &r1, &r3, &d2, &b2))
1443 {
1444 /* Update PC iff branch was *not* taken. */
1445 if (pc == to + insnlen)
1446 regcache_write_pc (regs, from + insnlen);
1447 }
1448
1449 /* Handle PC-relative branch and save instructions. */
1450 else if (is_ri (insn, op1_bras, op2_bras, &r1, &i2)
34201ae3 1451 || is_ril (insn, op1_brasl, op2_brasl, &r1, &i2))
1db4e8a0
UW
1452 {
1453 /* Update PC. */
1454 regcache_write_pc (regs, pc - to + from);
1455 /* Recompute saved return address in R1. */
1456 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
1457 amode | (from + insnlen));
1458 }
1459
1460 /* Handle PC-relative branch instructions. */
1461 else if (is_ri (insn, op1_brc, op2_brc, &r1, &i2)
1462 || is_ril (insn, op1_brcl, op2_brcl, &r1, &i2)
1463 || is_ri (insn, op1_brct, op2_brct, &r1, &i2)
1464 || is_ri (insn, op1_brctg, op2_brctg, &r1, &i2)
1465 || is_rsi (insn, op_brxh, &r1, &r3, &i2)
1466 || is_rie (insn, op1_brxhg, op2_brxhg, &r1, &r3, &i2)
1467 || is_rsi (insn, op_brxle, &r1, &r3, &i2)
1468 || is_rie (insn, op1_brxlg, op2_brxlg, &r1, &r3, &i2))
1469 {
1470 /* Update PC. */
1471 regcache_write_pc (regs, pc - to + from);
1472 }
1473
1474 /* Handle LOAD ADDRESS RELATIVE LONG. */
1475 else if (is_ril (insn, op1_larl, op2_larl, &r1, &i2))
1476 {
0161e4b9
UW
1477 /* Update PC. */
1478 regcache_write_pc (regs, from + insnlen);
34201ae3 1479 /* Recompute output address in R1. */
1db4e8a0 1480 regcache_cooked_write_unsigned (regs, S390_R0_REGNUM + r1,
0161e4b9 1481 amode | (from + i2 * 2));
1db4e8a0
UW
1482 }
1483
1484 /* If we executed a breakpoint instruction, point PC right back at it. */
1485 else if (insn[0] == 0x0 && insn[1] == 0x1)
1486 regcache_write_pc (regs, from);
1487
1488 /* For any other insn, PC points right after the original instruction. */
1489 else
1490 regcache_write_pc (regs, from + insnlen);
0161e4b9
UW
1491
1492 if (debug_displaced)
1493 fprintf_unfiltered (gdb_stdlog,
1494 "displaced: (s390) pc is now %s\n",
1495 paddress (gdbarch, regcache_read_pc (regs)));
1db4e8a0 1496}
a8c99f38 1497
d6db1fab
UW
1498
1499/* Helper routine to unwind pseudo registers. */
1500
1501static struct value *
1502s390_unwind_pseudo_register (struct frame_info *this_frame, int regnum)
1503{
1504 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1505 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
1506 struct type *type = register_type (gdbarch, regnum);
1507
1508 /* Unwind PC via PSW address. */
1509 if (regnum == tdep->pc_regnum)
1510 {
1511 struct value *val;
1512
1513 val = frame_unwind_register_value (this_frame, S390_PSWA_REGNUM);
1514 if (!value_optimized_out (val))
1515 {
1516 LONGEST pswa = value_as_long (val);
1517
1518 if (TYPE_LENGTH (type) == 4)
1519 return value_from_pointer (type, pswa & 0x7fffffff);
1520 else
1521 return value_from_pointer (type, pswa);
1522 }
1523 }
1524
1525 /* Unwind CC via PSW mask. */
1526 if (regnum == tdep->cc_regnum)
1527 {
1528 struct value *val;
1529
1530 val = frame_unwind_register_value (this_frame, S390_PSWM_REGNUM);
1531 if (!value_optimized_out (val))
1532 {
1533 LONGEST pswm = value_as_long (val);
1534
1535 if (TYPE_LENGTH (type) == 4)
1536 return value_from_longest (type, (pswm >> 12) & 3);
1537 else
1538 return value_from_longest (type, (pswm >> 44) & 3);
1539 }
1540 }
1541
1542 /* Unwind full GPRs to show at least the lower halves (as the
1543 upper halves are undefined). */
2ccd1468 1544 if (regnum_is_gpr_full (tdep, regnum))
d6db1fab
UW
1545 {
1546 int reg = regnum - tdep->gpr_full_regnum;
1547 struct value *val;
1548
1549 val = frame_unwind_register_value (this_frame, S390_R0_REGNUM + reg);
1550 if (!value_optimized_out (val))
1551 return value_cast (type, val);
1552 }
1553
1554 return allocate_optimized_out_value (type);
1555}
1556
1557static struct value *
1558s390_trad_frame_prev_register (struct frame_info *this_frame,
1559 struct trad_frame_saved_reg saved_regs[],
1560 int regnum)
1561{
1562 if (regnum < S390_NUM_REGS)
1563 return trad_frame_get_prev_register (this_frame, saved_regs, regnum);
1564 else
1565 return s390_unwind_pseudo_register (this_frame, regnum);
1566}
1567
1568
a8c99f38
JB
1569/* Normal stack frames. */
1570
1571struct s390_unwind_cache {
1572
1573 CORE_ADDR func;
1574 CORE_ADDR frame_base;
1575 CORE_ADDR local_base;
1576
1577 struct trad_frame_saved_reg *saved_regs;
1578};
1579
a78f21af 1580static int
f089c433 1581s390_prologue_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1582 struct s390_unwind_cache *info)
5769d3cd 1583{
f089c433 1584 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38
JB
1585 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
1586 struct s390_prologue_data data;
3fc46200
UW
1587 pv_t *fp = &data.gpr[S390_FRAME_REGNUM - S390_R0_REGNUM];
1588 pv_t *sp = &data.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
121d8485
UW
1589 int i;
1590 CORE_ADDR cfa;
a8c99f38
JB
1591 CORE_ADDR func;
1592 CORE_ADDR result;
1593 ULONGEST reg;
1594 CORE_ADDR prev_sp;
1595 int frame_pointer;
1596 int size;
edb3359d 1597 struct frame_info *next_frame;
a8c99f38
JB
1598
1599 /* Try to find the function start address. If we can't find it, we don't
1600 bother searching for it -- with modern compilers this would be mostly
1601 pointless anyway. Trust that we'll either have valid DWARF-2 CFI data
1602 or else a valid backchain ... */
f089c433 1603 func = get_frame_func (this_frame);
a8c99f38
JB
1604 if (!func)
1605 return 0;
5769d3cd 1606
a8c99f38
JB
1607 /* Try to analyze the prologue. */
1608 result = s390_analyze_prologue (gdbarch, func,
f089c433 1609 get_frame_pc (this_frame), &data);
a8c99f38 1610 if (!result)
5769d3cd 1611 return 0;
5769d3cd 1612
a8c99f38 1613 /* If this was successful, we should have found the instruction that
34201ae3 1614 sets the stack pointer register to the previous value of the stack
a8c99f38 1615 pointer minus the frame size. */
3fc46200 1616 if (!pv_is_register (*sp, S390_SP_REGNUM))
5769d3cd 1617 return 0;
a8c99f38 1618
34201ae3 1619 /* A frame size of zero at this point can mean either a real
a8c99f38 1620 frameless function, or else a failure to find the prologue.
34201ae3 1621 Perform some sanity checks to verify we really have a
a8c99f38
JB
1622 frameless function. */
1623 if (sp->k == 0)
5769d3cd 1624 {
34201ae3
UW
1625 /* If the next frame is a NORMAL_FRAME, this frame *cannot* have frame
1626 size zero. This is only possible if the next frame is a sentinel
a8c99f38 1627 frame, a dummy frame, or a signal trampoline frame. */
0e100dab
AC
1628 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be
1629 needed, instead the code should simpliy rely on its
1630 analysis. */
edb3359d
DJ
1631 next_frame = get_next_frame (this_frame);
1632 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1633 next_frame = get_next_frame (next_frame);
1634 if (next_frame
f089c433 1635 && get_frame_type (get_next_frame (this_frame)) == NORMAL_FRAME)
5769d3cd 1636 return 0;
5769d3cd 1637
a8c99f38
JB
1638 /* If we really have a frameless function, %r14 must be valid
1639 -- in particular, it must point to a different function. */
f089c433 1640 reg = get_frame_register_unsigned (this_frame, S390_RETADDR_REGNUM);
a8c99f38
JB
1641 reg = gdbarch_addr_bits_remove (gdbarch, reg) - 1;
1642 if (get_pc_function_start (reg) == func)
5769d3cd 1643 {
a8c99f38
JB
1644 /* However, there is one case where it *is* valid for %r14
1645 to point to the same function -- if this is a recursive
1646 call, and we have stopped in the prologue *before* the
1647 stack frame was allocated.
1648
1649 Recognize this case by looking ahead a bit ... */
5769d3cd 1650
a8c99f38 1651 struct s390_prologue_data data2;
3fc46200 1652 pv_t *sp = &data2.gpr[S390_SP_REGNUM - S390_R0_REGNUM];
a8c99f38
JB
1653
1654 if (!(s390_analyze_prologue (gdbarch, func, (CORE_ADDR)-1, &data2)
34201ae3
UW
1655 && pv_is_register (*sp, S390_SP_REGNUM)
1656 && sp->k != 0))
a8c99f38 1657 return 0;
5769d3cd 1658 }
5769d3cd 1659 }
5769d3cd
AC
1660
1661
a8c99f38
JB
1662 /* OK, we've found valid prologue data. */
1663 size = -sp->k;
5769d3cd 1664
a8c99f38
JB
1665 /* If the frame pointer originally also holds the same value
1666 as the stack pointer, we're probably using it. If it holds
1667 some other value -- even a constant offset -- it is most
1668 likely used as temp register. */
3fc46200 1669 if (pv_is_identical (*sp, *fp))
a8c99f38
JB
1670 frame_pointer = S390_FRAME_REGNUM;
1671 else
1672 frame_pointer = S390_SP_REGNUM;
1673
34201ae3
UW
1674 /* If we've detected a function with stack frame, we'll still have to
1675 treat it as frameless if we're currently within the function epilog
c378eb4e 1676 code at a point where the frame pointer has already been restored.
a8c99f38 1677 This can only happen in an innermost frame. */
0e100dab
AC
1678 /* FIXME: cagney/2004-05-01: This sanity check shouldn't be needed,
1679 instead the code should simpliy rely on its analysis. */
edb3359d
DJ
1680 next_frame = get_next_frame (this_frame);
1681 while (next_frame && get_frame_type (next_frame) == INLINE_FRAME)
1682 next_frame = get_next_frame (next_frame);
f089c433 1683 if (size > 0
edb3359d 1684 && (next_frame == NULL
f089c433 1685 || get_frame_type (get_next_frame (this_frame)) != NORMAL_FRAME))
5769d3cd 1686 {
a8c99f38
JB
1687 /* See the comment in s390_in_function_epilogue_p on why this is
1688 not completely reliable ... */
f089c433 1689 if (s390_in_function_epilogue_p (gdbarch, get_frame_pc (this_frame)))
5769d3cd 1690 {
a8c99f38
JB
1691 memset (&data, 0, sizeof (data));
1692 size = 0;
1693 frame_pointer = S390_SP_REGNUM;
5769d3cd 1694 }
5769d3cd 1695 }
5769d3cd 1696
a8c99f38
JB
1697 /* Once we know the frame register and the frame size, we can unwind
1698 the current value of the frame register from the next frame, and
34201ae3 1699 add back the frame size to arrive that the previous frame's
a8c99f38 1700 stack pointer value. */
f089c433 1701 prev_sp = get_frame_register_unsigned (this_frame, frame_pointer) + size;
121d8485 1702 cfa = prev_sp + 16*word_size + 32;
5769d3cd 1703
7803799a
UW
1704 /* Set up ABI call-saved/call-clobbered registers. */
1705 for (i = 0; i < S390_NUM_REGS; i++)
1706 if (!s390_register_call_saved (gdbarch, i))
1707 trad_frame_set_unknown (info->saved_regs, i);
1708
1709 /* CC is always call-clobbered. */
d6db1fab 1710 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
7803799a 1711
121d8485
UW
1712 /* Record the addresses of all register spill slots the prologue parser
1713 has recognized. Consider only registers defined as call-saved by the
1714 ABI; for call-clobbered registers the parser may have recognized
1715 spurious stores. */
5769d3cd 1716
7803799a
UW
1717 for (i = 0; i < 16; i++)
1718 if (s390_register_call_saved (gdbarch, S390_R0_REGNUM + i)
1719 && data.gpr_slot[i] != 0)
121d8485 1720 info->saved_regs[S390_R0_REGNUM + i].addr = cfa - data.gpr_slot[i];
a8c99f38 1721
7803799a
UW
1722 for (i = 0; i < 16; i++)
1723 if (s390_register_call_saved (gdbarch, S390_F0_REGNUM + i)
1724 && data.fpr_slot[i] != 0)
1725 info->saved_regs[S390_F0_REGNUM + i].addr = cfa - data.fpr_slot[i];
a8c99f38
JB
1726
1727 /* Function return will set PC to %r14. */
d6db1fab 1728 info->saved_regs[S390_PSWA_REGNUM] = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1729
1730 /* In frameless functions, we unwind simply by moving the return
1731 address to the PC. However, if we actually stored to the
1732 save area, use that -- we might only think the function frameless
1733 because we're in the middle of the prologue ... */
1734 if (size == 0
d6db1fab 1735 && !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1736 {
d6db1fab 1737 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
5769d3cd 1738 }
a8c99f38
JB
1739
1740 /* Another sanity check: unless this is a frameless function,
1741 we should have found spill slots for SP and PC.
1742 If not, we cannot unwind further -- this happens e.g. in
1743 libc's thread_start routine. */
1744 if (size > 0)
5769d3cd 1745 {
a8c99f38 1746 if (!trad_frame_addr_p (info->saved_regs, S390_SP_REGNUM)
d6db1fab 1747 || !trad_frame_addr_p (info->saved_regs, S390_PSWA_REGNUM))
a8c99f38 1748 prev_sp = -1;
5769d3cd 1749 }
a8c99f38
JB
1750
1751 /* We use the current value of the frame register as local_base,
1752 and the top of the register save area as frame_base. */
1753 if (prev_sp != -1)
1754 {
1755 info->frame_base = prev_sp + 16*word_size + 32;
1756 info->local_base = prev_sp - size;
1757 }
1758
1759 info->func = func;
1760 return 1;
5769d3cd
AC
1761}
1762
a78f21af 1763static void
f089c433 1764s390_backchain_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1765 struct s390_unwind_cache *info)
5769d3cd 1766{
f089c433 1767 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1768 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 1769 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
1770 CORE_ADDR backchain;
1771 ULONGEST reg;
1772 LONGEST sp;
7803799a
UW
1773 int i;
1774
1775 /* Set up ABI call-saved/call-clobbered registers. */
1776 for (i = 0; i < S390_NUM_REGS; i++)
1777 if (!s390_register_call_saved (gdbarch, i))
1778 trad_frame_set_unknown (info->saved_regs, i);
1779
1780 /* CC is always call-clobbered. */
d6db1fab 1781 trad_frame_set_unknown (info->saved_regs, S390_PSWM_REGNUM);
a8c99f38
JB
1782
1783 /* Get the backchain. */
f089c433 1784 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
e17a4113 1785 backchain = read_memory_unsigned_integer (reg, word_size, byte_order);
a8c99f38
JB
1786
1787 /* A zero backchain terminates the frame chain. As additional
1788 sanity check, let's verify that the spill slot for SP in the
1789 save area pointed to by the backchain in fact links back to
1790 the save area. */
1791 if (backchain != 0
e17a4113
UW
1792 && safe_read_memory_integer (backchain + 15*word_size,
1793 word_size, byte_order, &sp)
a8c99f38
JB
1794 && (CORE_ADDR)sp == backchain)
1795 {
1796 /* We don't know which registers were saved, but it will have
34201ae3
UW
1797 to be at least %r14 and %r15. This will allow us to continue
1798 unwinding, but other prev-frame registers may be incorrect ... */
a8c99f38
JB
1799 info->saved_regs[S390_SP_REGNUM].addr = backchain + 15*word_size;
1800 info->saved_regs[S390_RETADDR_REGNUM].addr = backchain + 14*word_size;
1801
1802 /* Function return will set PC to %r14. */
d6db1fab 1803 info->saved_regs[S390_PSWA_REGNUM]
7803799a 1804 = info->saved_regs[S390_RETADDR_REGNUM];
a8c99f38
JB
1805
1806 /* We use the current value of the frame register as local_base,
34201ae3 1807 and the top of the register save area as frame_base. */
a8c99f38
JB
1808 info->frame_base = backchain + 16*word_size + 32;
1809 info->local_base = reg;
1810 }
1811
f089c433 1812 info->func = get_frame_pc (this_frame);
5769d3cd
AC
1813}
1814
a8c99f38 1815static struct s390_unwind_cache *
f089c433 1816s390_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38
JB
1817 void **this_prologue_cache)
1818{
62261490 1819 volatile struct gdb_exception ex;
a8c99f38 1820 struct s390_unwind_cache *info;
62261490 1821
a8c99f38
JB
1822 if (*this_prologue_cache)
1823 return *this_prologue_cache;
1824
1825 info = FRAME_OBSTACK_ZALLOC (struct s390_unwind_cache);
1826 *this_prologue_cache = info;
f089c433 1827 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
1828 info->func = -1;
1829 info->frame_base = -1;
1830 info->local_base = -1;
1831
62261490
PA
1832 TRY_CATCH (ex, RETURN_MASK_ERROR)
1833 {
1834 /* Try to use prologue analysis to fill the unwind cache.
1835 If this fails, fall back to reading the stack backchain. */
1836 if (!s390_prologue_frame_unwind_cache (this_frame, info))
1837 s390_backchain_frame_unwind_cache (this_frame, info);
1838 }
1839 if (ex.reason < 0 && ex.error != NOT_AVAILABLE_ERROR)
1840 throw_exception (ex);
a8c99f38
JB
1841
1842 return info;
1843}
5769d3cd 1844
a78f21af 1845static void
f089c433 1846s390_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
1847 void **this_prologue_cache,
1848 struct frame_id *this_id)
5769d3cd 1849{
a8c99f38 1850 struct s390_unwind_cache *info
f089c433 1851 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
5769d3cd 1852
a8c99f38
JB
1853 if (info->frame_base == -1)
1854 return;
5769d3cd 1855
a8c99f38 1856 *this_id = frame_id_build (info->frame_base, info->func);
5769d3cd
AC
1857}
1858
f089c433
UW
1859static struct value *
1860s390_frame_prev_register (struct frame_info *this_frame,
1861 void **this_prologue_cache, int regnum)
a8c99f38 1862{
7803799a 1863 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1864 struct s390_unwind_cache *info
f089c433 1865 = s390_frame_unwind_cache (this_frame, this_prologue_cache);
7803799a 1866
d6db1fab 1867 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
1868}
1869
1870static const struct frame_unwind s390_frame_unwind = {
1871 NORMAL_FRAME,
8fbca658 1872 default_frame_unwind_stop_reason,
a8c99f38 1873 s390_frame_this_id,
f089c433
UW
1874 s390_frame_prev_register,
1875 NULL,
1876 default_frame_sniffer
a8c99f38
JB
1877};
1878
5769d3cd 1879
8e645ae7
AC
1880/* Code stubs and their stack frames. For things like PLTs and NULL
1881 function calls (where there is no true frame and the return address
1882 is in the RETADDR register). */
a8c99f38 1883
8e645ae7
AC
1884struct s390_stub_unwind_cache
1885{
a8c99f38
JB
1886 CORE_ADDR frame_base;
1887 struct trad_frame_saved_reg *saved_regs;
1888};
1889
8e645ae7 1890static struct s390_stub_unwind_cache *
f089c433 1891s390_stub_frame_unwind_cache (struct frame_info *this_frame,
8e645ae7 1892 void **this_prologue_cache)
5769d3cd 1893{
f089c433 1894 struct gdbarch *gdbarch = get_frame_arch (this_frame);
a8c99f38 1895 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
8e645ae7 1896 struct s390_stub_unwind_cache *info;
a8c99f38 1897 ULONGEST reg;
5c3cf190 1898
a8c99f38
JB
1899 if (*this_prologue_cache)
1900 return *this_prologue_cache;
5c3cf190 1901
8e645ae7 1902 info = FRAME_OBSTACK_ZALLOC (struct s390_stub_unwind_cache);
a8c99f38 1903 *this_prologue_cache = info;
f089c433 1904 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38
JB
1905
1906 /* The return address is in register %r14. */
d6db1fab 1907 info->saved_regs[S390_PSWA_REGNUM].realreg = S390_RETADDR_REGNUM;
a8c99f38
JB
1908
1909 /* Retrieve stack pointer and determine our frame base. */
f089c433 1910 reg = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
a8c99f38
JB
1911 info->frame_base = reg + 16*word_size + 32;
1912
1913 return info;
5769d3cd
AC
1914}
1915
a8c99f38 1916static void
f089c433 1917s390_stub_frame_this_id (struct frame_info *this_frame,
8e645ae7
AC
1918 void **this_prologue_cache,
1919 struct frame_id *this_id)
5769d3cd 1920{
8e645ae7 1921 struct s390_stub_unwind_cache *info
f089c433
UW
1922 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
1923 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
a8c99f38 1924}
5769d3cd 1925
f089c433
UW
1926static struct value *
1927s390_stub_frame_prev_register (struct frame_info *this_frame,
1928 void **this_prologue_cache, int regnum)
8e645ae7
AC
1929{
1930 struct s390_stub_unwind_cache *info
f089c433 1931 = s390_stub_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 1932 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
1933}
1934
f089c433
UW
1935static int
1936s390_stub_frame_sniffer (const struct frame_unwind *self,
1937 struct frame_info *this_frame,
1938 void **this_prologue_cache)
a8c99f38 1939{
93d42b30 1940 CORE_ADDR addr_in_block;
8e645ae7
AC
1941 bfd_byte insn[S390_MAX_INSTR_SIZE];
1942
1943 /* If the current PC points to non-readable memory, we assume we
1944 have trapped due to an invalid function pointer call. We handle
1945 the non-existing current function like a PLT stub. */
f089c433 1946 addr_in_block = get_frame_address_in_block (this_frame);
3e5d3a5a 1947 if (in_plt_section (addr_in_block)
f089c433
UW
1948 || s390_readinstruction (insn, get_frame_pc (this_frame)) < 0)
1949 return 1;
1950 return 0;
a8c99f38 1951}
5769d3cd 1952
f089c433
UW
1953static const struct frame_unwind s390_stub_frame_unwind = {
1954 NORMAL_FRAME,
8fbca658 1955 default_frame_unwind_stop_reason,
f089c433
UW
1956 s390_stub_frame_this_id,
1957 s390_stub_frame_prev_register,
1958 NULL,
1959 s390_stub_frame_sniffer
1960};
1961
5769d3cd 1962
a8c99f38 1963/* Signal trampoline stack frames. */
5769d3cd 1964
a8c99f38
JB
1965struct s390_sigtramp_unwind_cache {
1966 CORE_ADDR frame_base;
1967 struct trad_frame_saved_reg *saved_regs;
1968};
5769d3cd 1969
a8c99f38 1970static struct s390_sigtramp_unwind_cache *
f089c433 1971s390_sigtramp_frame_unwind_cache (struct frame_info *this_frame,
a8c99f38 1972 void **this_prologue_cache)
5769d3cd 1973{
f089c433 1974 struct gdbarch *gdbarch = get_frame_arch (this_frame);
7803799a 1975 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 1976 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 1977 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
a8c99f38
JB
1978 struct s390_sigtramp_unwind_cache *info;
1979 ULONGEST this_sp, prev_sp;
7803799a 1980 CORE_ADDR next_ra, next_cfa, sigreg_ptr, sigreg_high_off;
a8c99f38
JB
1981 int i;
1982
1983 if (*this_prologue_cache)
1984 return *this_prologue_cache;
5769d3cd 1985
a8c99f38
JB
1986 info = FRAME_OBSTACK_ZALLOC (struct s390_sigtramp_unwind_cache);
1987 *this_prologue_cache = info;
f089c433 1988 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
a8c99f38 1989
f089c433
UW
1990 this_sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
1991 next_ra = get_frame_pc (this_frame);
a8c99f38
JB
1992 next_cfa = this_sp + 16*word_size + 32;
1993
1994 /* New-style RT frame:
1995 retcode + alignment (8 bytes)
1996 siginfo (128 bytes)
c378eb4e 1997 ucontext (contains sigregs at offset 5 words). */
a8c99f38
JB
1998 if (next_ra == next_cfa)
1999 {
f0f63663 2000 sigreg_ptr = next_cfa + 8 + 128 + align_up (5*word_size, 8);
7803799a
UW
2001 /* sigregs are followed by uc_sigmask (8 bytes), then by the
2002 upper GPR halves if present. */
2003 sigreg_high_off = 8;
a8c99f38
JB
2004 }
2005
2006 /* Old-style RT frame and all non-RT frames:
2007 old signal mask (8 bytes)
c378eb4e 2008 pointer to sigregs. */
5769d3cd
AC
2009 else
2010 {
e17a4113
UW
2011 sigreg_ptr = read_memory_unsigned_integer (next_cfa + 8,
2012 word_size, byte_order);
7803799a
UW
2013 /* sigregs are followed by signo (4 bytes), then by the
2014 upper GPR halves if present. */
2015 sigreg_high_off = 4;
a8c99f38 2016 }
5769d3cd 2017
a8c99f38 2018 /* The sigregs structure looks like this:
34201ae3
UW
2019 long psw_mask;
2020 long psw_addr;
2021 long gprs[16];
2022 int acrs[16];
2023 int fpc;
2024 int __pad;
2025 double fprs[16]; */
5769d3cd 2026
7803799a
UW
2027 /* PSW mask and address. */
2028 info->saved_regs[S390_PSWM_REGNUM].addr = sigreg_ptr;
a8c99f38 2029 sigreg_ptr += word_size;
7803799a 2030 info->saved_regs[S390_PSWA_REGNUM].addr = sigreg_ptr;
a8c99f38
JB
2031 sigreg_ptr += word_size;
2032
2033 /* Then the GPRs. */
2034 for (i = 0; i < 16; i++)
2035 {
2036 info->saved_regs[S390_R0_REGNUM + i].addr = sigreg_ptr;
2037 sigreg_ptr += word_size;
2038 }
2039
2040 /* Then the ACRs. */
2041 for (i = 0; i < 16; i++)
2042 {
2043 info->saved_regs[S390_A0_REGNUM + i].addr = sigreg_ptr;
2044 sigreg_ptr += 4;
5769d3cd 2045 }
5769d3cd 2046
a8c99f38
JB
2047 /* The floating-point control word. */
2048 info->saved_regs[S390_FPC_REGNUM].addr = sigreg_ptr;
2049 sigreg_ptr += 8;
5769d3cd 2050
a8c99f38
JB
2051 /* And finally the FPRs. */
2052 for (i = 0; i < 16; i++)
2053 {
2054 info->saved_regs[S390_F0_REGNUM + i].addr = sigreg_ptr;
2055 sigreg_ptr += 8;
2056 }
2057
7803799a
UW
2058 /* If we have them, the GPR upper halves are appended at the end. */
2059 sigreg_ptr += sigreg_high_off;
2060 if (tdep->gpr_full_regnum != -1)
2061 for (i = 0; i < 16; i++)
2062 {
34201ae3 2063 info->saved_regs[S390_R0_UPPER_REGNUM + i].addr = sigreg_ptr;
7803799a
UW
2064 sigreg_ptr += 4;
2065 }
2066
a8c99f38
JB
2067 /* Restore the previous frame's SP. */
2068 prev_sp = read_memory_unsigned_integer (
2069 info->saved_regs[S390_SP_REGNUM].addr,
e17a4113 2070 word_size, byte_order);
5769d3cd 2071
a8c99f38
JB
2072 /* Determine our frame base. */
2073 info->frame_base = prev_sp + 16*word_size + 32;
5769d3cd 2074
a8c99f38 2075 return info;
5769d3cd
AC
2076}
2077
a8c99f38 2078static void
f089c433 2079s390_sigtramp_frame_this_id (struct frame_info *this_frame,
a8c99f38
JB
2080 void **this_prologue_cache,
2081 struct frame_id *this_id)
5769d3cd 2082{
a8c99f38 2083 struct s390_sigtramp_unwind_cache *info
f089c433
UW
2084 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
2085 *this_id = frame_id_build (info->frame_base, get_frame_pc (this_frame));
5769d3cd
AC
2086}
2087
f089c433
UW
2088static struct value *
2089s390_sigtramp_frame_prev_register (struct frame_info *this_frame,
2090 void **this_prologue_cache, int regnum)
a8c99f38
JB
2091{
2092 struct s390_sigtramp_unwind_cache *info
f089c433 2093 = s390_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
d6db1fab 2094 return s390_trad_frame_prev_register (this_frame, info->saved_regs, regnum);
a8c99f38
JB
2095}
2096
f089c433
UW
2097static int
2098s390_sigtramp_frame_sniffer (const struct frame_unwind *self,
2099 struct frame_info *this_frame,
2100 void **this_prologue_cache)
5769d3cd 2101{
f089c433 2102 CORE_ADDR pc = get_frame_pc (this_frame);
a8c99f38 2103 bfd_byte sigreturn[2];
4c8287ac 2104
8defab1a 2105 if (target_read_memory (pc, sigreturn, 2))
f089c433 2106 return 0;
4c8287ac 2107
237b092b 2108 if (sigreturn[0] != op_svc)
f089c433 2109 return 0;
5769d3cd 2110
a8c99f38
JB
2111 if (sigreturn[1] != 119 /* sigreturn */
2112 && sigreturn[1] != 173 /* rt_sigreturn */)
f089c433 2113 return 0;
34201ae3 2114
f089c433 2115 return 1;
5769d3cd
AC
2116}
2117
f089c433
UW
2118static const struct frame_unwind s390_sigtramp_frame_unwind = {
2119 SIGTRAMP_FRAME,
8fbca658 2120 default_frame_unwind_stop_reason,
f089c433
UW
2121 s390_sigtramp_frame_this_id,
2122 s390_sigtramp_frame_prev_register,
2123 NULL,
2124 s390_sigtramp_frame_sniffer
2125};
2126
237b092b
AA
2127/* Retrieve the syscall number at a ptrace syscall-stop. Return -1
2128 upon error. */
2129
2130static LONGEST
2131s390_linux_get_syscall_number (struct gdbarch *gdbarch,
2132 ptid_t ptid)
2133{
2134 struct regcache *regs = get_thread_regcache (ptid);
2135 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2136 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
2137 ULONGEST pc;
2138 ULONGEST svc_number = -1;
2139 unsigned opcode;
2140
2141 /* Assume that the PC points after the 2-byte SVC instruction. We
2142 don't currently support SVC via EXECUTE. */
2143 regcache_cooked_read_unsigned (regs, tdep->pc_regnum, &pc);
2144 pc -= 2;
2145 opcode = read_memory_unsigned_integer ((CORE_ADDR) pc, 1, byte_order);
2146 if (opcode != op_svc)
2147 return -1;
2148
2149 svc_number = read_memory_unsigned_integer ((CORE_ADDR) pc + 1, 1,
2150 byte_order);
2151 if (svc_number == 0)
2152 regcache_cooked_read_unsigned (regs, S390_R1_REGNUM, &svc_number);
2153
2154 return svc_number;
2155}
2156
4c8287ac 2157
a8c99f38
JB
2158/* Frame base handling. */
2159
2160static CORE_ADDR
f089c433 2161s390_frame_base_address (struct frame_info *this_frame, void **this_cache)
4c8287ac 2162{
a8c99f38 2163 struct s390_unwind_cache *info
f089c433 2164 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2165 return info->frame_base;
2166}
2167
2168static CORE_ADDR
f089c433 2169s390_local_base_address (struct frame_info *this_frame, void **this_cache)
a8c99f38
JB
2170{
2171 struct s390_unwind_cache *info
f089c433 2172 = s390_frame_unwind_cache (this_frame, this_cache);
a8c99f38
JB
2173 return info->local_base;
2174}
2175
2176static const struct frame_base s390_frame_base = {
2177 &s390_frame_unwind,
2178 s390_frame_base_address,
2179 s390_local_base_address,
2180 s390_local_base_address
2181};
2182
2183static CORE_ADDR
2184s390_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
2185{
7803799a 2186 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
a8c99f38 2187 ULONGEST pc;
7803799a 2188 pc = frame_unwind_register_unsigned (next_frame, tdep->pc_regnum);
a8c99f38
JB
2189 return gdbarch_addr_bits_remove (gdbarch, pc);
2190}
2191
2192static CORE_ADDR
2193s390_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
2194{
2195 ULONGEST sp;
2196 sp = frame_unwind_register_unsigned (next_frame, S390_SP_REGNUM);
2197 return gdbarch_addr_bits_remove (gdbarch, sp);
4c8287ac
JB
2198}
2199
2200
a431654a
AC
2201/* DWARF-2 frame support. */
2202
7803799a
UW
2203static struct value *
2204s390_dwarf2_prev_register (struct frame_info *this_frame, void **this_cache,
2205 int regnum)
2206{
d6db1fab 2207 return s390_unwind_pseudo_register (this_frame, regnum);
7803799a
UW
2208}
2209
a431654a
AC
2210static void
2211s390_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
34201ae3 2212 struct dwarf2_frame_state_reg *reg,
4a4e5149 2213 struct frame_info *this_frame)
a431654a
AC
2214{
2215 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2216
d6db1fab
UW
2217 /* The condition code (and thus PSW mask) is call-clobbered. */
2218 if (regnum == S390_PSWM_REGNUM)
2219 reg->how = DWARF2_FRAME_REG_UNDEFINED;
2220
2221 /* The PSW address unwinds to the return address. */
2222 else if (regnum == S390_PSWA_REGNUM)
2223 reg->how = DWARF2_FRAME_REG_RA;
2224
7803799a
UW
2225 /* Fixed registers are call-saved or call-clobbered
2226 depending on the ABI in use. */
d6db1fab 2227 else if (regnum < S390_NUM_REGS)
a431654a 2228 {
7803799a 2229 if (s390_register_call_saved (gdbarch, regnum))
a431654a 2230 reg->how = DWARF2_FRAME_REG_SAME_VALUE;
7803799a 2231 else
a431654a 2232 reg->how = DWARF2_FRAME_REG_UNDEFINED;
7803799a 2233 }
a431654a 2234
d6db1fab
UW
2235 /* We install a special function to unwind pseudos. */
2236 else
7803799a
UW
2237 {
2238 reg->how = DWARF2_FRAME_REG_FN;
2239 reg->loc.fn = s390_dwarf2_prev_register;
a431654a
AC
2240 }
2241}
2242
2243
b0cf273e
JB
2244/* Dummy function calls. */
2245
78f8b424
JB
2246/* Return non-zero if TYPE is an integer-like type, zero otherwise.
2247 "Integer-like" types are those that should be passed the way
2248 integers are: integers, enums, ranges, characters, and booleans. */
2249static int
2250is_integer_like (struct type *type)
2251{
2252 enum type_code code = TYPE_CODE (type);
2253
2254 return (code == TYPE_CODE_INT
34201ae3
UW
2255 || code == TYPE_CODE_ENUM
2256 || code == TYPE_CODE_RANGE
2257 || code == TYPE_CODE_CHAR
2258 || code == TYPE_CODE_BOOL);
78f8b424
JB
2259}
2260
78f8b424
JB
2261/* Return non-zero if TYPE is a pointer-like type, zero otherwise.
2262 "Pointer-like" types are those that should be passed the way
2263 pointers are: pointers and references. */
2264static int
2265is_pointer_like (struct type *type)
2266{
2267 enum type_code code = TYPE_CODE (type);
2268
2269 return (code == TYPE_CODE_PTR
34201ae3 2270 || code == TYPE_CODE_REF);
78f8b424
JB
2271}
2272
2273
20a940cc
JB
2274/* Return non-zero if TYPE is a `float singleton' or `double
2275 singleton', zero otherwise.
2276
2277 A `T singleton' is a struct type with one member, whose type is
2278 either T or a `T singleton'. So, the following are all float
2279 singletons:
2280
2281 struct { float x };
2282 struct { struct { float x; } x; };
2283 struct { struct { struct { float x; } x; } x; };
2284
2285 ... and so on.
2286
b0cf273e
JB
2287 All such structures are passed as if they were floats or doubles,
2288 as the (revised) ABI says. */
20a940cc
JB
2289static int
2290is_float_singleton (struct type *type)
2291{
b0cf273e
JB
2292 if (TYPE_CODE (type) == TYPE_CODE_STRUCT && TYPE_NFIELDS (type) == 1)
2293 {
2294 struct type *singleton_type = TYPE_FIELD_TYPE (type, 0);
2295 CHECK_TYPEDEF (singleton_type);
2296
2297 return (TYPE_CODE (singleton_type) == TYPE_CODE_FLT
a16b8bcd 2298 || TYPE_CODE (singleton_type) == TYPE_CODE_DECFLOAT
b0cf273e
JB
2299 || is_float_singleton (singleton_type));
2300 }
2301
2302 return 0;
20a940cc
JB
2303}
2304
2305
2306/* Return non-zero if TYPE is a struct-like type, zero otherwise.
2307 "Struct-like" types are those that should be passed as structs are:
2308 structs and unions.
2309
2310 As an odd quirk, not mentioned in the ABI, GCC passes float and
2311 double singletons as if they were a plain float, double, etc. (The
2312 corresponding union types are handled normally.) So we exclude
2313 those types here. *shrug* */
2314static int
2315is_struct_like (struct type *type)
2316{
2317 enum type_code code = TYPE_CODE (type);
2318
2319 return (code == TYPE_CODE_UNION
34201ae3 2320 || (code == TYPE_CODE_STRUCT && ! is_float_singleton (type)));
20a940cc
JB
2321}
2322
2323
2324/* Return non-zero if TYPE is a float-like type, zero otherwise.
2325 "Float-like" types are those that should be passed as
2326 floating-point values are.
2327
2328 You'd think this would just be floats, doubles, long doubles, etc.
2329 But as an odd quirk, not mentioned in the ABI, GCC passes float and
2330 double singletons as if they were a plain float, double, etc. (The
4d819d0e 2331 corresponding union types are handled normally.) So we include
20a940cc
JB
2332 those types here. *shrug* */
2333static int
2334is_float_like (struct type *type)
2335{
2336 return (TYPE_CODE (type) == TYPE_CODE_FLT
a16b8bcd 2337 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT
34201ae3 2338 || is_float_singleton (type));
20a940cc
JB
2339}
2340
2341
78f8b424 2342static int
b0cf273e 2343is_power_of_two (unsigned int n)
78f8b424 2344{
b0cf273e 2345 return ((n & (n - 1)) == 0);
78f8b424
JB
2346}
2347
b0cf273e
JB
2348/* Return non-zero if TYPE should be passed as a pointer to a copy,
2349 zero otherwise. */
4d819d0e 2350static int
b0cf273e 2351s390_function_arg_pass_by_reference (struct type *type)
4d819d0e 2352{
354ecfd5 2353 if (TYPE_LENGTH (type) > 8)
b0cf273e 2354 return 1;
4d819d0e 2355
56b9d9ac
UW
2356 return (is_struct_like (type) && !is_power_of_two (TYPE_LENGTH (type)))
2357 || TYPE_CODE (type) == TYPE_CODE_COMPLEX
2358 || (TYPE_CODE (type) == TYPE_CODE_ARRAY && TYPE_VECTOR (type));
4d819d0e
JB
2359}
2360
b0cf273e
JB
2361/* Return non-zero if TYPE should be passed in a float register
2362 if possible. */
78f8b424 2363static int
b0cf273e 2364s390_function_arg_float (struct type *type)
78f8b424 2365{
354ecfd5 2366 if (TYPE_LENGTH (type) > 8)
b0cf273e 2367 return 0;
78f8b424 2368
b0cf273e 2369 return is_float_like (type);
4d819d0e
JB
2370}
2371
b0cf273e
JB
2372/* Return non-zero if TYPE should be passed in an integer register
2373 (or a pair of integer registers) if possible. */
78f8b424 2374static int
b0cf273e 2375s390_function_arg_integer (struct type *type)
78f8b424 2376{
354ecfd5 2377 if (TYPE_LENGTH (type) > 8)
b0cf273e 2378 return 0;
78f8b424 2379
b0cf273e
JB
2380 return is_integer_like (type)
2381 || is_pointer_like (type)
354ecfd5 2382 || (is_struct_like (type) && is_power_of_two (TYPE_LENGTH (type)));
78f8b424
JB
2383}
2384
78f8b424
JB
2385/* Return ARG, a `SIMPLE_ARG', sign-extended or zero-extended to a full
2386 word as required for the ABI. */
2387static LONGEST
e17a4113 2388extend_simple_arg (struct gdbarch *gdbarch, struct value *arg)
78f8b424 2389{
e17a4113 2390 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
56b9d9ac 2391 struct type *type = check_typedef (value_type (arg));
78f8b424
JB
2392
2393 /* Even structs get passed in the least significant bits of the
2394 register / memory word. It's not really right to extract them as
2395 an integer, but it does take care of the extension. */
2396 if (TYPE_UNSIGNED (type))
0fd88904 2397 return extract_unsigned_integer (value_contents (arg),
34201ae3 2398 TYPE_LENGTH (type), byte_order);
78f8b424 2399 else
0fd88904 2400 return extract_signed_integer (value_contents (arg),
34201ae3 2401 TYPE_LENGTH (type), byte_order);
78f8b424
JB
2402}
2403
2404
78f8b424
JB
2405/* Return the alignment required by TYPE. */
2406static int
2407alignment_of (struct type *type)
2408{
2409 int alignment;
2410
2411 if (is_integer_like (type)
2412 || is_pointer_like (type)
a16b8bcd
UW
2413 || TYPE_CODE (type) == TYPE_CODE_FLT
2414 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
78f8b424
JB
2415 alignment = TYPE_LENGTH (type);
2416 else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
34201ae3 2417 || TYPE_CODE (type) == TYPE_CODE_UNION)
78f8b424
JB
2418 {
2419 int i;
2420
2421 alignment = 1;
2422 for (i = 0; i < TYPE_NFIELDS (type); i++)
34201ae3
UW
2423 {
2424 int field_alignment
56b9d9ac 2425 = alignment_of (check_typedef (TYPE_FIELD_TYPE (type, i)));
78f8b424 2426
34201ae3
UW
2427 if (field_alignment > alignment)
2428 alignment = field_alignment;
2429 }
78f8b424
JB
2430 }
2431 else
2432 alignment = 1;
2433
2434 /* Check that everything we ever return is a power of two. Lots of
2435 code doesn't want to deal with aligning things to arbitrary
2436 boundaries. */
2437 gdb_assert ((alignment & (alignment - 1)) == 0);
2438
2439 return alignment;
2440}
2441
2442
2443/* Put the actual parameter values pointed to by ARGS[0..NARGS-1] in
ca557f44
AC
2444 place to be passed to a function, as specified by the "GNU/Linux
2445 for S/390 ELF Application Binary Interface Supplement".
78f8b424
JB
2446
2447 SP is the current stack pointer. We must put arguments, links,
2448 padding, etc. whereever they belong, and return the new stack
2449 pointer value.
34201ae3 2450
78f8b424
JB
2451 If STRUCT_RETURN is non-zero, then the function we're calling is
2452 going to return a structure by value; STRUCT_ADDR is the address of
2453 a block we've allocated for it on the stack.
2454
2455 Our caller has taken care of any type promotions needed to satisfy
2456 prototypes or the old K&R argument-passing rules. */
a78f21af 2457static CORE_ADDR
7d9b040b 2458s390_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
b0cf273e
JB
2459 struct regcache *regcache, CORE_ADDR bp_addr,
2460 int nargs, struct value **args, CORE_ADDR sp,
2461 int struct_return, CORE_ADDR struct_addr)
5769d3cd 2462{
b0cf273e
JB
2463 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
2464 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
e17a4113 2465 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
78f8b424 2466 int i;
5769d3cd 2467
78f8b424
JB
2468 /* If the i'th argument is passed as a reference to a copy, then
2469 copy_addr[i] is the address of the copy we made. */
2470 CORE_ADDR *copy_addr = alloca (nargs * sizeof (CORE_ADDR));
5769d3cd 2471
c0cc4c83 2472 /* Reserve space for the reference-to-copy area. */
78f8b424
JB
2473 for (i = 0; i < nargs; i++)
2474 {
2475 struct value *arg = args[i];
56b9d9ac 2476 struct type *type = check_typedef (value_type (arg));
5769d3cd 2477
b0cf273e 2478 if (s390_function_arg_pass_by_reference (type))
34201ae3
UW
2479 {
2480 sp -= TYPE_LENGTH (type);
2481 sp = align_down (sp, alignment_of (type));
2482 copy_addr[i] = sp;
2483 }
5769d3cd 2484 }
5769d3cd 2485
78f8b424
JB
2486 /* Reserve space for the parameter area. As a conservative
2487 simplification, we assume that everything will be passed on the
34201ae3 2488 stack. Since every argument larger than 8 bytes will be
b0cf273e
JB
2489 passed by reference, we use this simple upper bound. */
2490 sp -= nargs * 8;
78f8b424 2491
78f8b424
JB
2492 /* After all that, make sure it's still aligned on an eight-byte
2493 boundary. */
5b03f266 2494 sp = align_down (sp, 8);
78f8b424 2495
c0cc4c83
UW
2496 /* Allocate the standard frame areas: the register save area, the
2497 word reserved for the compiler (which seems kind of meaningless),
2498 and the back chain pointer. */
2499 sp -= 16*word_size + 32;
2500
2501 /* Now we have the final SP value. Make sure we didn't underflow;
2502 on 31-bit, this would result in addresses with the high bit set,
2503 which causes confusion elsewhere. Note that if we error out
2504 here, stack and registers remain untouched. */
2505 if (gdbarch_addr_bits_remove (gdbarch, sp) != sp)
2506 error (_("Stack overflow"));
2507
2508
78f8b424
JB
2509 /* Finally, place the actual parameters, working from SP towards
2510 higher addresses. The code above is supposed to reserve enough
2511 space for this. */
2512 {
2513 int fr = 0;
2514 int gr = 2;
c0cc4c83 2515 CORE_ADDR starg = sp + 16*word_size + 32;
78f8b424 2516
b0cf273e 2517 /* A struct is returned using general register 2. */
4d819d0e 2518 if (struct_return)
b0cf273e
JB
2519 {
2520 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
34201ae3 2521 struct_addr);
b0cf273e
JB
2522 gr++;
2523 }
4d819d0e 2524
78f8b424
JB
2525 for (i = 0; i < nargs; i++)
2526 {
34201ae3
UW
2527 struct value *arg = args[i];
2528 struct type *type = check_typedef (value_type (arg));
2529 unsigned length = TYPE_LENGTH (type);
b0cf273e
JB
2530
2531 if (s390_function_arg_pass_by_reference (type))
2532 {
c0cc4c83
UW
2533 /* Actually copy the argument contents to the stack slot
2534 that was reserved above. */
2535 write_memory (copy_addr[i], value_contents (arg), length);
2536
b0cf273e
JB
2537 if (gr <= 6)
2538 {
2539 regcache_cooked_write_unsigned (regcache, S390_R0_REGNUM + gr,
34201ae3 2540 copy_addr[i]);
b0cf273e
JB
2541 gr++;
2542 }
2543 else
2544 {
e17a4113
UW
2545 write_memory_unsigned_integer (starg, word_size, byte_order,
2546 copy_addr[i]);
b0cf273e
JB
2547 starg += word_size;
2548 }
2549 }
2550 else if (s390_function_arg_float (type))
2551 {
2552 /* The GNU/Linux for S/390 ABI uses FPRs 0 and 2 to pass arguments,
2553 the GNU/Linux for zSeries ABI uses 0, 2, 4, and 6. */
2554 if (fr <= (tdep->abi == ABI_LINUX_S390 ? 2 : 6))
2555 {
2556 /* When we store a single-precision value in an FP register,
2557 it occupies the leftmost bits. */
2558 regcache_cooked_write_part (regcache, S390_F0_REGNUM + fr,
0fd88904 2559 0, length, value_contents (arg));
b0cf273e
JB
2560 fr += 2;
2561 }
2562 else
2563 {
2564 /* When we store a single-precision value in a stack slot,
2565 it occupies the rightmost bits. */
2566 starg = align_up (starg + length, word_size);
34201ae3 2567 write_memory (starg - length, value_contents (arg), length);
b0cf273e
JB
2568 }
2569 }
2570 else if (s390_function_arg_integer (type) && length <= word_size)
2571 {
2572 if (gr <= 6)
2573 {
2574 /* Integer arguments are always extended to word size. */
2575 regcache_cooked_write_signed (regcache, S390_R0_REGNUM + gr,
c378eb4e
MS
2576 extend_simple_arg (gdbarch,
2577 arg));
b0cf273e
JB
2578 gr++;
2579 }
2580 else
2581 {
2582 /* Integer arguments are always extended to word size. */
e17a4113 2583 write_memory_signed_integer (starg, word_size, byte_order,
34201ae3
UW
2584 extend_simple_arg (gdbarch, arg));
2585 starg += word_size;
b0cf273e
JB
2586 }
2587 }
2588 else if (s390_function_arg_integer (type) && length == 2*word_size)
2589 {
2590 if (gr <= 5)
2591 {
2592 regcache_cooked_write (regcache, S390_R0_REGNUM + gr,
0fd88904 2593 value_contents (arg));
b0cf273e 2594 regcache_cooked_write (regcache, S390_R0_REGNUM + gr + 1,
0fd88904 2595 value_contents (arg) + word_size);
b0cf273e
JB
2596 gr += 2;
2597 }
2598 else
2599 {
2600 /* If we skipped r6 because we couldn't fit a DOUBLE_ARG
2601 in it, then don't go back and use it again later. */
2602 gr = 7;
2603
0fd88904 2604 write_memory (starg, value_contents (arg), length);
b0cf273e
JB
2605 starg += length;
2606 }
2607 }
2608 else
e2e0b3e5 2609 internal_error (__FILE__, __LINE__, _("unknown argument type"));
78f8b424
JB
2610 }
2611 }
2612
8de7d199
UW
2613 /* Store return PSWA. In 31-bit mode, keep addressing mode bit. */
2614 if (word_size == 4)
2615 {
2616 ULONGEST pswa;
2617 regcache_cooked_read_unsigned (regcache, S390_PSWA_REGNUM, &pswa);
2618 bp_addr = (bp_addr & 0x7fffffff) | (pswa & 0x80000000);
2619 }
b0cf273e 2620 regcache_cooked_write_unsigned (regcache, S390_RETADDR_REGNUM, bp_addr);
8de7d199 2621
b0cf273e
JB
2622 /* Store updated stack pointer. */
2623 regcache_cooked_write_unsigned (regcache, S390_SP_REGNUM, sp);
78f8b424 2624
a8c99f38 2625 /* We need to return the 'stack part' of the frame ID,
121d8485
UW
2626 which is actually the top of the register save area. */
2627 return sp + 16*word_size + 32;
5769d3cd
AC
2628}
2629
f089c433 2630/* Assuming THIS_FRAME is a dummy, return the frame ID of that
b0cf273e
JB
2631 dummy frame. The frame ID's base needs to match the TOS value
2632 returned by push_dummy_call, and the PC match the dummy frame's
2633 breakpoint. */
2634static struct frame_id
f089c433 2635s390_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
b0cf273e 2636{
a8c99f38 2637 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
f089c433
UW
2638 CORE_ADDR sp = get_frame_register_unsigned (this_frame, S390_SP_REGNUM);
2639 sp = gdbarch_addr_bits_remove (gdbarch, sp);
a8c99f38 2640
121d8485 2641 return frame_id_build (sp + 16*word_size + 32,
34201ae3 2642 get_frame_pc (this_frame));
b0cf273e 2643}
c8f9d51c 2644
4074e13c
JB
2645static CORE_ADDR
2646s390_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
2647{
2648 /* Both the 32- and 64-bit ABI's say that the stack pointer should
2649 always be aligned on an eight-byte boundary. */
2650 return (addr & -8);
2651}
2652
2653
b0cf273e
JB
2654/* Function return value access. */
2655
2656static enum return_value_convention
2657s390_return_value_convention (struct gdbarch *gdbarch, struct type *type)
c8f9d51c 2658{
354ecfd5 2659 if (TYPE_LENGTH (type) > 8)
b0cf273e
JB
2660 return RETURN_VALUE_STRUCT_CONVENTION;
2661
2662 switch (TYPE_CODE (type))
2663 {
2664 case TYPE_CODE_STRUCT:
2665 case TYPE_CODE_UNION:
2666 case TYPE_CODE_ARRAY:
56b9d9ac 2667 case TYPE_CODE_COMPLEX:
b0cf273e 2668 return RETURN_VALUE_STRUCT_CONVENTION;
c8f9d51c 2669
b0cf273e
JB
2670 default:
2671 return RETURN_VALUE_REGISTER_CONVENTION;
2672 }
c8f9d51c
JB
2673}
2674
b0cf273e 2675static enum return_value_convention
6a3a010b 2676s390_return_value (struct gdbarch *gdbarch, struct value *function,
c055b101
CV
2677 struct type *type, struct regcache *regcache,
2678 gdb_byte *out, const gdb_byte *in)
5769d3cd 2679{
e17a4113 2680 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
b0cf273e 2681 int word_size = gdbarch_ptr_bit (gdbarch) / 8;
56b9d9ac
UW
2682 enum return_value_convention rvc;
2683 int length;
2684
2685 type = check_typedef (type);
2686 rvc = s390_return_value_convention (gdbarch, type);
2687 length = TYPE_LENGTH (type);
2688
b0cf273e
JB
2689 if (in)
2690 {
2691 switch (rvc)
2692 {
2693 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2694 if (TYPE_CODE (type) == TYPE_CODE_FLT
2695 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2696 {
2697 /* When we store a single-precision value in an FP register,
2698 it occupies the leftmost bits. */
34201ae3 2699 regcache_cooked_write_part (regcache, S390_F0_REGNUM,
b0cf273e
JB
2700 0, length, in);
2701 }
2702 else if (length <= word_size)
2703 {
2704 /* Integer arguments are always extended to word size. */
2705 if (TYPE_UNSIGNED (type))
2706 regcache_cooked_write_unsigned (regcache, S390_R2_REGNUM,
e17a4113 2707 extract_unsigned_integer (in, length, byte_order));
b0cf273e
JB
2708 else
2709 regcache_cooked_write_signed (regcache, S390_R2_REGNUM,
e17a4113 2710 extract_signed_integer (in, length, byte_order));
b0cf273e
JB
2711 }
2712 else if (length == 2*word_size)
2713 {
2714 regcache_cooked_write (regcache, S390_R2_REGNUM, in);
43af2100 2715 regcache_cooked_write (regcache, S390_R3_REGNUM, in + word_size);
b0cf273e
JB
2716 }
2717 else
e2e0b3e5 2718 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e
JB
2719 break;
2720
2721 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2722 error (_("Cannot set function return value."));
b0cf273e
JB
2723 break;
2724 }
2725 }
2726 else if (out)
2727 {
2728 switch (rvc)
2729 {
2730 case RETURN_VALUE_REGISTER_CONVENTION:
a16b8bcd
UW
2731 if (TYPE_CODE (type) == TYPE_CODE_FLT
2732 || TYPE_CODE (type) == TYPE_CODE_DECFLOAT)
b0cf273e
JB
2733 {
2734 /* When we store a single-precision value in an FP register,
2735 it occupies the leftmost bits. */
34201ae3 2736 regcache_cooked_read_part (regcache, S390_F0_REGNUM,
b0cf273e
JB
2737 0, length, out);
2738 }
2739 else if (length <= word_size)
2740 {
2741 /* Integer arguments occupy the rightmost bits. */
34201ae3 2742 regcache_cooked_read_part (regcache, S390_R2_REGNUM,
b0cf273e
JB
2743 word_size - length, length, out);
2744 }
2745 else if (length == 2*word_size)
2746 {
2747 regcache_cooked_read (regcache, S390_R2_REGNUM, out);
43af2100 2748 regcache_cooked_read (regcache, S390_R3_REGNUM, out + word_size);
b0cf273e
JB
2749 }
2750 else
e2e0b3e5 2751 internal_error (__FILE__, __LINE__, _("invalid return type"));
b0cf273e 2752 break;
5769d3cd 2753
b0cf273e 2754 case RETURN_VALUE_STRUCT_CONVENTION:
8a3fe4f8 2755 error (_("Function return value unknown."));
b0cf273e
JB
2756 break;
2757 }
2758 }
2759
2760 return rvc;
2761}
5769d3cd
AC
2762
2763
a8c99f38
JB
2764/* Breakpoints. */
2765
43af2100 2766static const gdb_byte *
c378eb4e
MS
2767s390_breakpoint_from_pc (struct gdbarch *gdbarch,
2768 CORE_ADDR *pcptr, int *lenptr)
5769d3cd 2769{
43af2100 2770 static const gdb_byte breakpoint[] = { 0x0, 0x1 };
5769d3cd
AC
2771
2772 *lenptr = sizeof (breakpoint);
2773 return breakpoint;
2774}
2775
5769d3cd 2776
a8c99f38 2777/* Address handling. */
5769d3cd
AC
2778
2779static CORE_ADDR
24568a2c 2780s390_addr_bits_remove (struct gdbarch *gdbarch, CORE_ADDR addr)
5769d3cd 2781{
a8c99f38 2782 return addr & 0x7fffffff;
5769d3cd
AC
2783}
2784
ffc65945
KB
2785static int
2786s390_address_class_type_flags (int byte_size, int dwarf2_addr_class)
2787{
2788 if (byte_size == 4)
119ac181 2789 return TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2790 else
2791 return 0;
2792}
2793
2794static const char *
2795s390_address_class_type_flags_to_name (struct gdbarch *gdbarch, int type_flags)
2796{
119ac181 2797 if (type_flags & TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1)
ffc65945
KB
2798 return "mode32";
2799 else
2800 return NULL;
2801}
2802
a78f21af 2803static int
c378eb4e
MS
2804s390_address_class_name_to_type_flags (struct gdbarch *gdbarch,
2805 const char *name,
ffc65945
KB
2806 int *type_flags_ptr)
2807{
2808 if (strcmp (name, "mode32") == 0)
2809 {
119ac181 2810 *type_flags_ptr = TYPE_INSTANCE_FLAG_ADDRESS_CLASS_1;
ffc65945
KB
2811 return 1;
2812 }
2813 else
2814 return 0;
2815}
2816
60abeae4
AA
2817/* Implement gdbarch_gcc_target_options. GCC does not know "-m32" or
2818 "-mcmodel=large". */
a2658feb
JK
2819
2820static char *
2821s390_gcc_target_options (struct gdbarch *gdbarch)
2822{
60abeae4
AA
2823 return xstrdup (gdbarch_ptr_bit (gdbarch) == 64 ? "-m64" : "-m31");
2824}
2825
2826/* Implement gdbarch_gnu_triplet_regexp. Target triplets are "s390-*"
2827 for 31-bit and "s390x-*" for 64-bit, while the BFD arch name is
2828 always "s390". Note that an s390x compiler supports "-m31" as
2829 well. */
2830
2831static const char *
2832s390_gnu_triplet_regexp (struct gdbarch *gdbarch)
2833{
2834 return "s390x?";
a2658feb
JK
2835}
2836
55aa24fb
SDJ
2837/* Implementation of `gdbarch_stap_is_single_operand', as defined in
2838 gdbarch.h. */
2839
2840static int
2841s390_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
2842{
2843 return ((isdigit (*s) && s[1] == '(' && s[2] == '%') /* Displacement
2844 or indirection. */
2845 || *s == '%' /* Register access. */
2846 || isdigit (*s)); /* Literal number. */
2847}
2848
a8c99f38
JB
2849/* Set up gdbarch struct. */
2850
a78f21af 2851static struct gdbarch *
5769d3cd
AC
2852s390_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2853{
7803799a
UW
2854 const struct target_desc *tdesc = info.target_desc;
2855 struct tdesc_arch_data *tdesc_data = NULL;
5769d3cd
AC
2856 struct gdbarch *gdbarch;
2857 struct gdbarch_tdep *tdep;
7803799a
UW
2858 int tdep_abi;
2859 int have_upper = 0;
c642a434
UW
2860 int have_linux_v1 = 0;
2861 int have_linux_v2 = 0;
5aa82d05 2862 int have_tdb = 0;
7803799a 2863 int first_pseudo_reg, last_pseudo_reg;
05c0465e
SDJ
2864 static const char *const stap_register_prefixes[] = { "%", NULL };
2865 static const char *const stap_register_indirection_prefixes[] = { "(",
2866 NULL };
2867 static const char *const stap_register_indirection_suffixes[] = { ")",
2868 NULL };
7803799a
UW
2869
2870 /* Default ABI and register size. */
2871 switch (info.bfd_arch_info->mach)
2872 {
2873 case bfd_mach_s390_31:
2874 tdep_abi = ABI_LINUX_S390;
2875 break;
2876
2877 case bfd_mach_s390_64:
2878 tdep_abi = ABI_LINUX_ZSERIES;
2879 break;
2880
2881 default:
2882 return NULL;
2883 }
2884
2885 /* Use default target description if none provided by the target. */
2886 if (!tdesc_has_registers (tdesc))
2887 {
2888 if (tdep_abi == ABI_LINUX_S390)
2889 tdesc = tdesc_s390_linux32;
2890 else
2891 tdesc = tdesc_s390x_linux64;
2892 }
2893
2894 /* Check any target description for validity. */
2895 if (tdesc_has_registers (tdesc))
2896 {
2897 static const char *const gprs[] = {
2898 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2899 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2900 };
2901 static const char *const fprs[] = {
2902 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
2903 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15"
2904 };
2905 static const char *const acrs[] = {
2906 "acr0", "acr1", "acr2", "acr3", "acr4", "acr5", "acr6", "acr7",
2907 "acr8", "acr9", "acr10", "acr11", "acr12", "acr13", "acr14", "acr15"
2908 };
2909 static const char *const gprs_lower[] = {
2910 "r0l", "r1l", "r2l", "r3l", "r4l", "r5l", "r6l", "r7l",
2911 "r8l", "r9l", "r10l", "r11l", "r12l", "r13l", "r14l", "r15l"
2912 };
2913 static const char *const gprs_upper[] = {
2914 "r0h", "r1h", "r2h", "r3h", "r4h", "r5h", "r6h", "r7h",
2915 "r8h", "r9h", "r10h", "r11h", "r12h", "r13h", "r14h", "r15h"
2916 };
4ac33720
UW
2917 static const char *const tdb_regs[] = {
2918 "tdb0", "tac", "tct", "atia",
2919 "tr0", "tr1", "tr2", "tr3", "tr4", "tr5", "tr6", "tr7",
2920 "tr8", "tr9", "tr10", "tr11", "tr12", "tr13", "tr14", "tr15"
2921 };
7803799a
UW
2922 const struct tdesc_feature *feature;
2923 int i, valid_p = 1;
2924
2925 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.core");
2926 if (feature == NULL)
2927 return NULL;
2928
2929 tdesc_data = tdesc_data_alloc ();
2930
2931 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2932 S390_PSWM_REGNUM, "pswm");
2933 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2934 S390_PSWA_REGNUM, "pswa");
2935
2936 if (tdesc_unnumbered_register (feature, "r0"))
2937 {
2938 for (i = 0; i < 16; i++)
2939 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2940 S390_R0_REGNUM + i, gprs[i]);
2941 }
2942 else
2943 {
2944 have_upper = 1;
2945
2946 for (i = 0; i < 16; i++)
2947 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2948 S390_R0_REGNUM + i,
2949 gprs_lower[i]);
2950 for (i = 0; i < 16; i++)
2951 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2952 S390_R0_UPPER_REGNUM + i,
2953 gprs_upper[i]);
2954 }
2955
2956 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.fpr");
2957 if (feature == NULL)
2958 {
2959 tdesc_data_cleanup (tdesc_data);
2960 return NULL;
2961 }
2962
2963 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2964 S390_FPC_REGNUM, "fpc");
2965 for (i = 0; i < 16; i++)
2966 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2967 S390_F0_REGNUM + i, fprs[i]);
5769d3cd 2968
7803799a
UW
2969 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.acr");
2970 if (feature == NULL)
2971 {
2972 tdesc_data_cleanup (tdesc_data);
2973 return NULL;
2974 }
2975
2976 for (i = 0; i < 16; i++)
2977 valid_p &= tdesc_numbered_register (feature, tdesc_data,
2978 S390_A0_REGNUM + i, acrs[i]);
2979
94eae614 2980 /* Optional GNU/Linux-specific "registers". */
c642a434
UW
2981 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.linux");
2982 if (feature)
2983 {
2984 tdesc_numbered_register (feature, tdesc_data,
2985 S390_ORIG_R2_REGNUM, "orig_r2");
2986
2987 if (tdesc_numbered_register (feature, tdesc_data,
2988 S390_LAST_BREAK_REGNUM, "last_break"))
2989 have_linux_v1 = 1;
2990
2991 if (tdesc_numbered_register (feature, tdesc_data,
2992 S390_SYSTEM_CALL_REGNUM, "system_call"))
2993 have_linux_v2 = 1;
2994
2995 if (have_linux_v2 > have_linux_v1)
2996 valid_p = 0;
2997 }
2998
4ac33720
UW
2999 /* Transaction diagnostic block. */
3000 feature = tdesc_find_feature (tdesc, "org.gnu.gdb.s390.tdb");
3001 if (feature)
3002 {
3003 for (i = 0; i < ARRAY_SIZE (tdb_regs); i++)
3004 valid_p &= tdesc_numbered_register (feature, tdesc_data,
3005 S390_TDB_DWORD0_REGNUM + i,
3006 tdb_regs[i]);
5aa82d05 3007 have_tdb = 1;
4ac33720
UW
3008 }
3009
7803799a
UW
3010 if (!valid_p)
3011 {
3012 tdesc_data_cleanup (tdesc_data);
3013 return NULL;
3014 }
3015 }
5769d3cd 3016
7803799a
UW
3017 /* Find a candidate among extant architectures. */
3018 for (arches = gdbarch_list_lookup_by_info (arches, &info);
3019 arches != NULL;
3020 arches = gdbarch_list_lookup_by_info (arches->next, &info))
3021 {
3022 tdep = gdbarch_tdep (arches->gdbarch);
3023 if (!tdep)
3024 continue;
3025 if (tdep->abi != tdep_abi)
3026 continue;
3027 if ((tdep->gpr_full_regnum != -1) != have_upper)
3028 continue;
3029 if (tdesc_data != NULL)
3030 tdesc_data_cleanup (tdesc_data);
3031 return arches->gdbarch;
3032 }
5769d3cd 3033
7803799a 3034 /* Otherwise create a new gdbarch for the specified machine type. */
fc270c35 3035 tdep = XCNEW (struct gdbarch_tdep);
7803799a 3036 tdep->abi = tdep_abi;
5aa82d05
AA
3037 tdep->have_linux_v1 = have_linux_v1;
3038 tdep->have_linux_v2 = have_linux_v2;
3039 tdep->have_tdb = have_tdb;
d0f54f9d 3040 gdbarch = gdbarch_alloc (&info, tdep);
5769d3cd
AC
3041
3042 set_gdbarch_believe_pcc_promotion (gdbarch, 0);
4e409299 3043 set_gdbarch_char_signed (gdbarch, 0);
5769d3cd 3044
1de90795
UW
3045 /* S/390 GNU/Linux uses either 64-bit or 128-bit long doubles.
3046 We can safely let them default to 128-bit, since the debug info
3047 will give the size of type actually used in each case. */
3048 set_gdbarch_long_double_bit (gdbarch, 128);
3049 set_gdbarch_long_double_format (gdbarch, floatformats_ia64_quad);
3050
aaab4dba 3051 /* Amount PC must be decremented by after a breakpoint. This is
3b3b875c 3052 often the number of bytes returned by gdbarch_breakpoint_from_pc but not
aaab4dba 3053 always. */
5769d3cd 3054 set_gdbarch_decr_pc_after_break (gdbarch, 2);
5769d3cd
AC
3055 /* Stack grows downward. */
3056 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
5769d3cd
AC
3057 set_gdbarch_breakpoint_from_pc (gdbarch, s390_breakpoint_from_pc);
3058 set_gdbarch_skip_prologue (gdbarch, s390_skip_prologue);
d0f54f9d 3059 set_gdbarch_in_function_epilogue_p (gdbarch, s390_in_function_epilogue_p);
a8c99f38 3060
7803799a 3061 set_gdbarch_num_regs (gdbarch, S390_NUM_REGS);
5769d3cd 3062 set_gdbarch_sp_regnum (gdbarch, S390_SP_REGNUM);
d0f54f9d 3063 set_gdbarch_fp0_regnum (gdbarch, S390_F0_REGNUM);
d0f54f9d 3064 set_gdbarch_stab_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
d0f54f9d 3065 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, s390_dwarf_reg_to_regnum);
9acbedc0 3066 set_gdbarch_value_from_register (gdbarch, s390_value_from_register);
7803799a 3067 set_gdbarch_core_read_description (gdbarch, s390_core_read_description);
5aa82d05
AA
3068 set_gdbarch_iterate_over_regset_sections (gdbarch,
3069 s390_iterate_over_regset_sections);
c642a434
UW
3070 set_gdbarch_cannot_store_register (gdbarch, s390_cannot_store_register);
3071 set_gdbarch_write_pc (gdbarch, s390_write_pc);
7803799a
UW
3072 set_gdbarch_pseudo_register_read (gdbarch, s390_pseudo_register_read);
3073 set_gdbarch_pseudo_register_write (gdbarch, s390_pseudo_register_write);
3074 set_tdesc_pseudo_register_name (gdbarch, s390_pseudo_register_name);
3075 set_tdesc_pseudo_register_type (gdbarch, s390_pseudo_register_type);
3076 set_tdesc_pseudo_register_reggroup_p (gdbarch,
34201ae3 3077 s390_pseudo_register_reggroup_p);
7803799a
UW
3078 tdesc_use_registers (gdbarch, tdesc, tdesc_data);
3079
3080 /* Assign pseudo register numbers. */
3081 first_pseudo_reg = gdbarch_num_regs (gdbarch);
3082 last_pseudo_reg = first_pseudo_reg;
3083 tdep->gpr_full_regnum = -1;
3084 if (have_upper)
3085 {
3086 tdep->gpr_full_regnum = last_pseudo_reg;
3087 last_pseudo_reg += 16;
3088 }
3089 tdep->pc_regnum = last_pseudo_reg++;
3090 tdep->cc_regnum = last_pseudo_reg++;
3091 set_gdbarch_pc_regnum (gdbarch, tdep->pc_regnum);
3092 set_gdbarch_num_pseudo_regs (gdbarch, last_pseudo_reg - first_pseudo_reg);
5769d3cd 3093
b0cf273e
JB
3094 /* Inferior function calls. */
3095 set_gdbarch_push_dummy_call (gdbarch, s390_push_dummy_call);
f089c433 3096 set_gdbarch_dummy_id (gdbarch, s390_dummy_id);
4074e13c 3097 set_gdbarch_frame_align (gdbarch, s390_frame_align);
b0cf273e 3098 set_gdbarch_return_value (gdbarch, s390_return_value);
5769d3cd 3099
237b092b
AA
3100 /* Syscall handling. */
3101 set_gdbarch_get_syscall_number (gdbarch, s390_linux_get_syscall_number);
3102
a8c99f38 3103 /* Frame handling. */
a431654a 3104 dwarf2_frame_set_init_reg (gdbarch, s390_dwarf2_frame_init_reg);
7803799a 3105 dwarf2_frame_set_adjust_regnum (gdbarch, s390_adjust_frame_regnum);
f089c433 3106 dwarf2_append_unwinders (gdbarch);
a431654a 3107 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
f089c433
UW
3108 frame_unwind_append_unwinder (gdbarch, &s390_stub_frame_unwind);
3109 frame_unwind_append_unwinder (gdbarch, &s390_sigtramp_frame_unwind);
3110 frame_unwind_append_unwinder (gdbarch, &s390_frame_unwind);
a8c99f38
JB
3111 frame_base_set_default (gdbarch, &s390_frame_base);
3112 set_gdbarch_unwind_pc (gdbarch, s390_unwind_pc);
3113 set_gdbarch_unwind_sp (gdbarch, s390_unwind_sp);
3114
1db4e8a0
UW
3115 /* Displaced stepping. */
3116 set_gdbarch_displaced_step_copy_insn (gdbarch,
34201ae3 3117 simple_displaced_step_copy_insn);
1db4e8a0
UW
3118 set_gdbarch_displaced_step_fixup (gdbarch, s390_displaced_step_fixup);
3119 set_gdbarch_displaced_step_free_closure (gdbarch,
34201ae3 3120 simple_displaced_step_free_closure);
1db4e8a0 3121 set_gdbarch_displaced_step_location (gdbarch,
34201ae3 3122 displaced_step_at_entry_point);
1db4e8a0
UW
3123 set_gdbarch_max_insn_length (gdbarch, S390_MAX_INSTR_SIZE);
3124
70728992
PA
3125 /* Note that GNU/Linux is the only OS supported on this
3126 platform. */
3127 linux_init_abi (info, gdbarch);
3128
7803799a 3129 switch (tdep->abi)
5769d3cd 3130 {
7803799a 3131 case ABI_LINUX_S390:
5769d3cd 3132 set_gdbarch_addr_bits_remove (gdbarch, s390_addr_bits_remove);
76a9d10f
MK
3133 set_solib_svr4_fetch_link_map_offsets
3134 (gdbarch, svr4_ilp32_fetch_link_map_offsets);
c642a434 3135
458c8db8 3136 set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_S390);
5769d3cd 3137 break;
b0cf273e 3138
7803799a 3139 case ABI_LINUX_ZSERIES:
5769d3cd
AC
3140 set_gdbarch_long_bit (gdbarch, 64);
3141 set_gdbarch_long_long_bit (gdbarch, 64);
3142 set_gdbarch_ptr_bit (gdbarch, 64);
76a9d10f
MK
3143 set_solib_svr4_fetch_link_map_offsets
3144 (gdbarch, svr4_lp64_fetch_link_map_offsets);
ffc65945 3145 set_gdbarch_address_class_type_flags (gdbarch,
34201ae3 3146 s390_address_class_type_flags);
ffc65945 3147 set_gdbarch_address_class_type_flags_to_name (gdbarch,
34201ae3 3148 s390_address_class_type_flags_to_name);
ffc65945 3149 set_gdbarch_address_class_name_to_type_flags (gdbarch,
34201ae3 3150 s390_address_class_name_to_type_flags);
458c8db8 3151 set_xml_syscall_file_name (gdbarch, XML_SYSCALL_FILENAME_S390);
5769d3cd
AC
3152 break;
3153 }
3154
36482093
AC
3155 set_gdbarch_print_insn (gdbarch, print_insn_s390);
3156
982e9687
UW
3157 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
3158
b2756930
KB
3159 /* Enable TLS support. */
3160 set_gdbarch_fetch_tls_load_module_address (gdbarch,
34201ae3 3161 svr4_fetch_objfile_link_map);
b2756930 3162
1dd635ac
UW
3163 set_gdbarch_get_siginfo_type (gdbarch, linux_get_siginfo_type);
3164
55aa24fb 3165 /* SystemTap functions. */
05c0465e
SDJ
3166 set_gdbarch_stap_register_prefixes (gdbarch, stap_register_prefixes);
3167 set_gdbarch_stap_register_indirection_prefixes (gdbarch,
3168 stap_register_indirection_prefixes);
3169 set_gdbarch_stap_register_indirection_suffixes (gdbarch,
3170 stap_register_indirection_suffixes);
55aa24fb 3171 set_gdbarch_stap_is_single_operand (gdbarch, s390_stap_is_single_operand);
60abeae4
AA
3172 set_gdbarch_gcc_target_options (gdbarch, s390_gcc_target_options);
3173 set_gdbarch_gnu_triplet_regexp (gdbarch, s390_gnu_triplet_regexp);
55aa24fb 3174
5769d3cd
AC
3175 return gdbarch;
3176}
3177
3178
a78f21af
AC
3179extern initialize_file_ftype _initialize_s390_tdep; /* -Wmissing-prototypes */
3180
5769d3cd 3181void
5ae5f592 3182_initialize_s390_tdep (void)
5769d3cd 3183{
5769d3cd
AC
3184 /* Hook us into the gdbarch mechanism. */
3185 register_gdbarch_init (bfd_arch_s390, s390_gdbarch_init);
7803799a 3186
94eae614 3187 /* Initialize the GNU/Linux target descriptions. */
7803799a 3188 initialize_tdesc_s390_linux32 ();
c642a434
UW
3189 initialize_tdesc_s390_linux32v1 ();
3190 initialize_tdesc_s390_linux32v2 ();
7803799a 3191 initialize_tdesc_s390_linux64 ();
c642a434
UW
3192 initialize_tdesc_s390_linux64v1 ();
3193 initialize_tdesc_s390_linux64v2 ();
4ac33720 3194 initialize_tdesc_s390_te_linux64 ();
7803799a 3195 initialize_tdesc_s390x_linux64 ();
c642a434
UW
3196 initialize_tdesc_s390x_linux64v1 ();
3197 initialize_tdesc_s390x_linux64v2 ();
4ac33720 3198 initialize_tdesc_s390x_te_linux64 ();
5769d3cd 3199}
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